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-rw-r--r--demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/chconf.h8
-rw-r--r--demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h8
-rw-r--r--os/hal/src/hal_community.c2
-rw-r--r--os/hal/src/onewire.c23
-rw-r--r--testhal/STM32/STM32F0xx/crc/chconf.h8
-rw-r--r--testhal/STM32/STM32F0xx/onewire/chconf.h8
-rw-r--r--testhal/STM32/STM32F1xx/onewire/chconf.h8
-rw-r--r--testhal/STM32/STM32F4xx/EICU/chconf.h8
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h8
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h8
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h8
-rw-r--r--testhal/STM32/STM32F4xx/onewire/chconf.h8
12 files changed, 11 insertions, 94 deletions
diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/chconf.h b/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/chconf.h
index 48ada74..71e0cac 100644
--- a/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/chconf.h
+++ b/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/chconf.h
@@ -263,14 +263,6 @@
#define CH_CFG_USE_MAILBOXES TRUE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h
index 9e83c6b..ebc01e2 100644
--- a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h
+++ b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h
@@ -263,14 +263,6 @@
#define CH_CFG_USE_MAILBOXES FALSE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES FALSE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
diff --git a/os/hal/src/hal_community.c b/os/hal/src/hal_community.c
index 4c48113..981aa25 100644
--- a/os/hal/src/hal_community.c
+++ b/os/hal/src/hal_community.c
@@ -15,7 +15,7 @@
*/
/**
- * @file hal.c
+ * @file hal_community.c
* @brief HAL subsystem code.
*
* @addtogroup HAL
diff --git a/os/hal/src/onewire.c b/os/hal/src/onewire.c
index d11196c..85f0fdc 100644
--- a/os/hal/src/onewire.c
+++ b/os/hal/src/onewire.c
@@ -664,11 +664,11 @@ bool onewireReset(onewireDriver *owp) {
pwmcfg->channels[sch].mode = PWM_OUTPUT_ACTIVE_LOW;
ow_bus_active(owp);
- pwmEnableChannel(pwmd, mch, ONEWIRE_RESET_LOW_WIDTH);
- pwmEnableChannel(pwmd, sch, ONEWIRE_RESET_SAMPLE_WIDTH);
- pwmEnableChannelNotification(pwmd, sch);
osalSysLock();
+ pwmEnableChannelI(pwmd, mch, ONEWIRE_RESET_LOW_WIDTH);
+ pwmEnableChannelI(pwmd, sch, ONEWIRE_RESET_SAMPLE_WIDTH);
+ pwmEnableChannelNotificationI(pwmd, sch);
osalThreadSuspendS(&owp->thread);
osalSysUnlock();
@@ -717,11 +717,10 @@ void onewireRead(onewireDriver *owp, uint8_t *rxbuf, size_t rxbytes) {
pwmcfg->channels[sch].mode = PWM_OUTPUT_ACTIVE_LOW;
ow_bus_active(owp);
- pwmEnableChannel(pwmd, mch, ONEWIRE_ONE_WIDTH);
- pwmEnableChannel(pwmd, sch, ONEWIRE_SAMPLE_WIDTH);
- pwmEnableChannelNotification(pwmd, sch);
-
osalSysLock();
+ pwmEnableChannelI(pwmd, mch, ONEWIRE_ONE_WIDTH);
+ pwmEnableChannelI(pwmd, sch, ONEWIRE_SAMPLE_WIDTH);
+ pwmEnableChannelNotificationI(pwmd, sch);
osalThreadSuspendS(&owp->thread);
osalSysUnlock();
@@ -776,9 +775,8 @@ void onewireWrite(onewireDriver *owp, uint8_t *txbuf,
#endif
ow_bus_active(owp);
- pwmEnablePeriodicNotification(pwmd);
-
osalSysLock();
+ pwmEnablePeriodicNotificationI(pwmd);
osalThreadSuspendS(&owp->thread);
osalSysUnlock();
@@ -853,11 +851,10 @@ size_t onewireSearchRom(onewireDriver *owp, uint8_t *result,
pwmcfg->channels[sch].mode = PWM_OUTPUT_ACTIVE_LOW;
ow_bus_active(owp);
- pwmEnableChannel(pwmd, mch, ONEWIRE_ONE_WIDTH);
- pwmEnableChannel(pwmd, sch, ONEWIRE_SAMPLE_WIDTH);
- pwmEnableChannelNotification(pwmd, sch);
-
osalSysLock();
+ pwmEnableChannelI(pwmd, mch, ONEWIRE_ONE_WIDTH);
+ pwmEnableChannelI(pwmd, sch, ONEWIRE_SAMPLE_WIDTH);
+ pwmEnableChannelNotificationI(pwmd, sch);
osalThreadSuspendS(&owp->thread);
osalSysUnlock();
diff --git a/testhal/STM32/STM32F0xx/crc/chconf.h b/testhal/STM32/STM32F0xx/crc/chconf.h
index be19c6d..64394a2 100644
--- a/testhal/STM32/STM32F0xx/crc/chconf.h
+++ b/testhal/STM32/STM32F0xx/crc/chconf.h
@@ -265,14 +265,6 @@
#define CH_CFG_USE_MAILBOXES TRUE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
diff --git a/testhal/STM32/STM32F0xx/onewire/chconf.h b/testhal/STM32/STM32F0xx/onewire/chconf.h
index 9bf08a3..0b74391 100644
--- a/testhal/STM32/STM32F0xx/onewire/chconf.h
+++ b/testhal/STM32/STM32F0xx/onewire/chconf.h
@@ -265,14 +265,6 @@
#define CH_CFG_USE_MAILBOXES TRUE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
diff --git a/testhal/STM32/STM32F1xx/onewire/chconf.h b/testhal/STM32/STM32F1xx/onewire/chconf.h
index 732776d..dba8354 100644
--- a/testhal/STM32/STM32F1xx/onewire/chconf.h
+++ b/testhal/STM32/STM32F1xx/onewire/chconf.h
@@ -265,14 +265,6 @@
#define CH_CFG_USE_MAILBOXES TRUE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
diff --git a/testhal/STM32/STM32F4xx/EICU/chconf.h b/testhal/STM32/STM32F4xx/EICU/chconf.h
index a554d39..c33aa31 100644
--- a/testhal/STM32/STM32F4xx/EICU/chconf.h
+++ b/testhal/STM32/STM32F4xx/EICU/chconf.h
@@ -265,14 +265,6 @@
#define CH_CFG_USE_MAILBOXES TRUE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h b/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h
index 55ea10b..01cc4a0 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h
@@ -265,14 +265,6 @@
#define CH_CFG_USE_MAILBOXES TRUE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h
index 55ea10b..01cc4a0 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h
@@ -265,14 +265,6 @@
#define CH_CFG_USE_MAILBOXES TRUE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h
index 55ea10b..01cc4a0 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h
@@ -265,14 +265,6 @@
#define CH_CFG_USE_MAILBOXES TRUE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
diff --git a/testhal/STM32/STM32F4xx/onewire/chconf.h b/testhal/STM32/STM32F4xx/onewire/chconf.h
index 55ea10b..01cc4a0 100644
--- a/testhal/STM32/STM32F4xx/onewire/chconf.h
+++ b/testhal/STM32/STM32F4xx/onewire/chconf.h
@@ -265,14 +265,6 @@
#define CH_CFG_USE_MAILBOXES TRUE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-28 17:11:00 +0000