diff options
| -rw-r--r-- | os/hal/hal.mk | 3 | ||||
| -rw-r--r-- | os/hal/include/hal_community.h | 5 | ||||
| -rw-r--r-- | os/hal/include/hal_opamp.h | 110 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/OPAMPv1/driver.mk | 9 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c | 184 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.h | 257 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F3xx/platform.mk | 1 | ||||
| -rw-r--r-- | os/hal/src/hal_opamp.c | 155 | ||||
| -rw-r--r-- | testhal/STM32/STM32F3xx/OPAMP/Makefile | 214 | ||||
| -rw-r--r-- | testhal/STM32/STM32F3xx/OPAMP/chconf.h | 696 | ||||
| -rw-r--r-- | testhal/STM32/STM32F3xx/OPAMP/halconf.h | 419 | ||||
| -rw-r--r-- | testhal/STM32/STM32F3xx/OPAMP/halconf_community.h | 180 | ||||
| -rw-r--r-- | testhal/STM32/STM32F3xx/OPAMP/main.c | 124 | ||||
| -rw-r--r-- | testhal/STM32/STM32F3xx/OPAMP/mcuconf.h | 255 | ||||
| -rw-r--r-- | testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h | 164 |
15 files changed, 2776 insertions, 0 deletions
diff --git a/os/hal/hal.mk b/os/hal/hal.mk index 377ffa9..f6b4edd 100644 --- a/os/hal/hal.mk +++ b/os/hal/hal.mk @@ -72,6 +72,9 @@ endif ifneq ($(findstring HAL_USE_COMP TRUE,$(HALCONF)),)
HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_comp.c
endif
+ifneq ($(findstring HAL_USE_OPAMP TRUE,$(HALCONF)),)
+HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_opamp.c
+endif
else
HALSRC_CONTRIB := ${CHIBIOS_CONTRIB}/os/hal/src/hal_community.c \
${CHIBIOS_CONTRIB}/os/hal/src/hal_nand.c \
diff --git a/os/hal/include/hal_community.h b/os/hal/include/hal_community.h index 83b1f02..f84e90a 100644 --- a/os/hal/include/hal_community.h +++ b/os/hal/include/hal_community.h @@ -75,6 +75,10 @@ #define HAL_USE_COMP FALSE
#endif
+#if !defined(HAL_USE_OPAMP)
+#define HAL_USE_OPAMP FALSE
+#endif
+
/* Abstract interfaces.*/
/* Shared headers.*/
@@ -87,6 +91,7 @@ #include "hal_timcap.h"
#include "hal_qei.h"
#include "hal_comp.h"
+#include "hal_opamp.h"
/* Complex drivers.*/
#include "hal_onewire.h"
diff --git a/os/hal/include/hal_opamp.h b/os/hal/include/hal_opamp.h new file mode 100644 index 0000000..383e928 --- /dev/null +++ b/os/hal/include/hal_opamp.h @@ -0,0 +1,110 @@ +/* + ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio + Copyright (C) 2019 Fabien Poussin (fabien.poussin (at) google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HAL_OPAMP_H_ +#define HAL_OPAMP_H_ + +#include "hal.h" + +#if (HAL_USE_OPAMP == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Driver state machine possible states. + */ +typedef enum { + OPAMP_UNINIT = 0, /**< Not initialized. */ + OPAMP_STOP = 1, /**< Stopped. */ + OPAMP_READY = 2, /**< Ready. */ + OPAMP_ACTIVE = 3, /**< Active cycle phase. */ +} opampstate_t; + +/** + * @brief Type of a structure representing an OPAMP driver. + */ +typedef struct OPAMPDriver OPAMPDriver; + +#include "hal_opamp_lld.h" + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @name Macro Functions + * @{ + */ +/** + * @brief Enables the input capture. + * + * @param[in] opamp pointer to the @p OPAMPDriver object + * + * @iclass + */ +#define opampEnableI(opamp) opamp_lld_enable(opamp) + +/** + * @brief Disables the input capture. + * + * @param[in] opamp pointer to the @p OPAMPDriver object + * + * @iclass + */ +#define opampDisableI(opamp) opamp_lld_disable(opamp) +/** @} */ + + +/** + * @name Low Level driver helper macros + * @{ + */ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void opampInit(void); + void opampObjectInit(OPAMPDriver *opamp); + void opampStart(OPAMPDriver *opamp, const OPAMPConfig *config); + void opampStop(OPAMPDriver *opamp); + void opampEnable(OPAMPDriver *opamp); + void opampDisable(OPAMPDriver *opamp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_OPAMP */ + +#endif /* HAL_OPAMP_H_ */ diff --git a/os/hal/ports/STM32/LLD/OPAMPv1/driver.mk b/os/hal/ports/STM32/LLD/OPAMPv1/driver.mk new file mode 100644 index 0000000..08dc0f4 --- /dev/null +++ b/os/hal/ports/STM32/LLD/OPAMPv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes)
+ifneq ($(findstring HAL_USE_OPAMP TRUE,$(HALCONF)),)
+PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c
+endif
+else
+PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c
+endif
+
+PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/OPAMPv1
diff --git a/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c b/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c new file mode 100644 index 0000000..7251002 --- /dev/null +++ b/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c @@ -0,0 +1,184 @@ +/* + ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio + Copyright (C) 2019 Fabien Poussin (fabien.poussin (at) google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + + +/** + * @file STM32/hal_opamp_lld.c + * @brief STM32 Operational Amplifier subsystem low level driver header. + * + * @addtogroup OPAMP + * @{ + */ + +#include "hal.h" + +#if HAL_USE_OPAMP || defined(__DOXYGEN__) + +#include "hal_opamp.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief OPAMPD1 driver identifier. + * @note The driver OPAMPD1 allocates the comparator OPAMP1 when enabled. + */ +#if STM32_OPAMP_USE_OPAMP1 || defined(__DOXYGEN__) +OPAMPDriver OPAMPD1; +#endif + +/** + * @brief OPAMPD2 driver identifier. + * @note The driver OPAMPD2 allocates the comparator OPAMP2 when enabled. + */ +#if STM32_OPAMP_USE_OPAMP2 || defined(__DOXYGEN__) +OPAMPDriver OPAMPD2; +#endif + +/** + * @brief OPAMPD3 driver identifier. + * @note The driver OPAMPD3 allocates the comparator OPAMP3 when enabled. + */ +#if STM32_OPAMP_USE_OPAMP3 || defined(__DOXYGEN__) +OPAMPDriver OPAMPD3; +#endif + +/** + * @brief OPAMPD4 driver identifier. + * @note The driver OPAMPD4 allocates the comparator OPAMP4 when enabled. + */ +#if STM32_OPAMP_USE_OPAMP4 || defined(__DOXYGEN__) +OPAMPDriver OPAMPD4; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level OPAMP driver initialization. + * + * @notapi + */ +void opamp_lld_init(void) { + +#if STM32_OPAMP_USE_OPAMP1 + /* Driver initialization.*/ + opampObjectInit(&OPAMPD1); + OPAMPD1.reg = OPAMP; + OPAMPD1.reg->CSR = 0; +#endif + +#if STM32_OPAMP_USE_OPAMP2 + /* Driver initialization.*/ + opampObjectInit(&OPAMPD2); + OPAMPD2.reg = OPAMP2; + OPAMPD2.reg->CSR = 0; +#endif + +#if STM32_OPAMP_USE_OPAMP3 + /* Driver initialization.*/ + opampObjectInit(&OPAMPD3); + OPAMPD3.reg = OPAMP3; + OPAMPD3.reg->CSR = 0; +#endif + +#if STM32_OPAMP_USE_OPAMP4 + /* Driver initialization.*/ + opampObjectInit(&OPAMPD4); + OPAMPD4.reg = OPAMP4; + OPAMPD4.reg->CSR = 0; +#endif + +} + +/** + * @brief Configures and activates the OPAMP peripheral. + * + * @param[in] compp pointer to the @p OPAMPDriver object + * + * @notapi + */ +void opamp_lld_start(OPAMPDriver *compp) { + + // Apply CSR Execpt the enable bit. + compp->reg->CSR = compp->config->csr & ~OPAMP_CSR_OPAMPxEN; + +} + +/** + * @brief Deactivates the comp peripheral. + * + * @param[in] compp pointer to the @p OPAMPDriver object + * + * @notapi + */ +void opamp_lld_stop(OPAMPDriver *compp) { + + if (compp->state == OPAMP_READY) { + + compp->reg->CSR = 0; + } + +} + +/** + * @brief Enables the output. + * + * @param[in] compp pointer to the @p OPAMPDriver object + * + * @notapi + */ +void opamp_lld_enable(OPAMPDriver *compp) { + + compp->reg->CSR |= OPAMP_CSR_OPAMPxEN; /* Enable */ +} + +/** + * @brief Disables the output. + * + * @param[in] compp pointer to the @p OPAMPDriver object + * + * @notapi + */ +void opamp_lld_disable(OPAMPDriver *compp) { + + compp->reg->CSR &= ~OPAMP_CSR_OPAMPxEN; /* Disable */ +} + +#endif /* HAL_USE_OPAMP */ + +/** @} */ diff --git a/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.h b/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.h new file mode 100644 index 0000000..508cea7 --- /dev/null +++ b/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.h @@ -0,0 +1,257 @@ +/* + ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio + Copyright (C) 2019 Fabien Poussin (fabien.poussin (at) google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file STM32/opamp_lld.h + * @brief STM32 Operational Amplifier subsystem low level driver header. + * + * @addtogroup OPAMP + * @{ + */ + +#ifndef HAL_OPAMP_LLD_H_ +#define HAL_OPAMP_LLD_H_ + +#include "hal.h" + +#if HAL_USE_OPAMP || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + + +#define STM32_OPAMP_InvertingInput_IO1 ((uint32_t)0x00000000) /*!< IO1 (PC5 for OPAMP1 and OPAMP2, PB10 for OPAMP3 and OPAMP4) + connected to OPAMPx inverting input */ +#define STM32_OPAMP_InvertingInput_IO2 OPAMP_CSR_VMSEL_0 /*!< IO2 (PA3 for OPAMP1, PA5 for OPAMP2, PB2 for OPAMP3, PD8 for OPAMP4) + connected to OPAMPx inverting input */ +#define STM32_OPAMP_InvertingInput_PGA OPAMP_CSR_VMSEL_1 /*!< Resistor feedback output connected to OPAMPx inverting input (PGA mode) */ +#define STM32_OPAMP_InvertingInput_Vout OPAMP_CSR_VMSEL /*!< Vout connected to OPAMPx inverting input (follower mode) */ + + +#define STM32_OPAMP_NonInvertingInput_IO1 ((uint32_t)0x00000000) /*!< IO1 (PA7 for OPAMP1, PD14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4) + connected to OPAMPx non inverting input */ +#define STM32_OPAMP_NonInvertingInput_IO2 OPAMP_CSR_VPSEL_0 /*!< IO2 (PA5 for OPAMP1, PB14 for OPAMP2, PA5 for OPAMP3, PB11 for OPAMP4) + connected to OPAMPx non inverting input */ +#define STM32_OPAMP_NonInvertingInput_IO3 OPAMP_CSR_VPSEL_1 /*!< IO3 (PA3 for OPAMP1, PB0 for OPAMP2, PA1 for OPAMP3, PA4 for OPAMP4) + connected to OPAMPx non inverting input */ +#define STM32_OPAMP_NonInvertingInput_IO4 OPAMP_CSR_VPSEL /*!< IO4 (PA1 for OPAMP1, PA7 for OPAMP2, PB0 for OPAMP3, PB13 for OPAMP4) + connected to OPAMPx non inverting input */ + + +#define STM32_OPAMP_PGAGain_2 ((uint32_t)0x00000000) +#define STM32_OPAMP_PGAGain_4 OPAMP_CSR_PGGAIN_0 +#define STM32_OPAMP_PGAGain_8 OPAMP_CSR_PGGAIN_1 +#define STM32_OPAMP_PGAGain_16 ((uint32_t)0x0000C000) + +#define STM32_OPAMP_PGAConnect_No ((uint32_t)0x00000000) +#define STM32_OPAMP_PGAConnect_IO1 OPAMP_CSR_PGGAIN_3 +#define STM32_OPAMP_PGAConnect_IO2 ((uint32_t)0x00030000) + +#define STM32_OPAMP_Input_Inverting ((uint32_t)0x00000018) /*!< Inverting input */ +#define STM32_OPAMP_Input_NonInverting ((uint32_t)0x00000013) /*!< Non inverting input */ + +#define STM32_OPAMP_Vref_3VDDA ((uint32_t)0x00000000) /*!< OPMAP Vref = 3.3% VDDA */ +#define STM32_OPAMP_Vref_10VDDA OPAMP_CSR_CALSEL_0 /*!< OPMAP Vref = 10% VDDA */ +#define STM32_OPAMP_Vref_50VDDA OPAMP_CSR_CALSEL_1 /*!< OPMAP Vref = 50% VDDA */ +#define STM32_OPAMP_Vref_90VDDA OPAMP_CSR_CALSEL /*!< OPMAP Vref = 90% VDDA */ + +#define STM32_OPAMP_Trimming_Factory ((uint32_t)0x00000000) /*!< Factory trimming */ +#define STM32_OPAMP_Trimming_User OPAMP_CSR_USERTRIM /*!< User trimming */ + +#define STM32_OPAMP_OutputLevel_High OPAMP_CSR_OUTCAL +#define STM32_OPAMP_OutputLevel_Low ((uint32_t)0x00000000) + + +#if defined(STM32F302xB) || defined(STM32F302xC) || defined(STM32F302xD) \ +|| defined(STM32F302xE) || defined(STM32F302xc) || defined(STM32F302xe) \ +|| defined(STM32L1XX) || defined(STM32L4XX) || defined(STM32H7XX) +#define STM32_HAS_OPAMP1 TRUE +#define STM32_HAS_OPAMP2 TRUE +#define STM32_HAS_OPAMP3 FALSE +#define STM32_HAS_OPAMP4 FALSE + +#elif defined(STM32F303xB) || defined(STM32F303xC) || defined(STM32F303xE) \ +|| defined(STM32F358xx) || defined(STM32F398xx) +#define STM32_HAS_OPAMP1 TRUE +#define STM32_HAS_OPAMP2 TRUE +#define STM32_HAS_OPAMP3 TRUE +#define STM32_HAS_OPAMP4 TRUE + +#else +#define STM32_HAS_OPAMP1 FALSE +#define STM32_HAS_OPAMP2 FALSE +#define STM32_HAS_OPAMP3 FALSE +#define STM32_HAS_OPAMP4 FALSE + +#endif + + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ + +/** + * @brief OPAMPD1 driver enable switch. + * @details If set to @p TRUE the support for OPAMPD1 is included. + * @note The default is @p FALSE. + */ +#if !defined(STM32_OPAMP_USE_OPAMP1) || defined(__DOXYGEN__) +#define STM32_OPAMP_USE_OPAMP1 FALSE +#endif + +/** + * @brief OPAMPD2 driver enable switch. + * @details If set to @p TRUE the support for OPAMPD2 is included. + * @note The default is @p FALSE. + */ +#if !defined(STM32_OPAMP_USE_OPAMP2) || defined(__DOXYGEN__) +#define STM32_OPAMP_USE_OPAMP2 FALSE +#endif + +/** + * @brief OPAMPD3 driver enable switch. + * @details If set to @p TRUE the support for OPAMPD3 is included. + * @note The default is @p FALSE. + */ +#if !defined(STM32_OPAMP_USE_OPAMP3) || defined(__DOXYGEN__) +#define STM32_OPAMP_USE_OPAMP3 FALSE +#endif + +/** + * @brief OPAMPD4 driver enable switch. + * @details If set to @p TRUE the support for OPAMPD4 is included. + * @note The default is @p FALSE. + */ +#if !defined(STM32_OPAMP_USE_OPAMP4) || defined(__DOXYGEN__) +#define STM32_OPAMP_USE_OPAMP4 FALSE +#endif + + +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + + +#if STM32_OPAMP_USE_OPAMP1 && !STM32_HAS_OPAMP1 +#error "OPAMP1 not present in the selected device" +#endif + +#if STM32_OPAMP_USE_OPAMP2 && !STM32_HAS_OPAMP2 +#error "OPAMP2 not present in the selected device" +#endif + +#if STM32_OPAMP_USE_OPAMP3 && !STM32_HAS_OPAMP3 +#error "OPAMP3 not present in the selected device" +#endif + +#if STM32_OPAMP_USE_OPAMP4 && !STM32_HAS_OPAMP4 +#error "OPAMP4 not present in the selected device" +#endif + +#if !STM32_OPAMP_USE_OPAMP1 && !STM32_OPAMP_USE_OPAMP2 && \ + !STM32_OPAMP_USE_OPAMP3 && !STM32_OPAMP_USE_OPAMP4 +#error "OPAMP driver activated but no OPAMP peripheral assigned" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief OPAMP CSR register initialization data. + * @note The value of this field should normally be equal to zero. + */ + uint32_t csr; +} OPAMPConfig; + +/** + * @brief Structure representing an OPAMP driver. + */ +struct OPAMPDriver { + /** + * @brief Driver state. + */ + opampstate_t state; + /** + * @brief Current configuration data. + */ + const OPAMPConfig *config; +#if defined(OPAMP_DRIVER_EXT_FIELDS) + OPAMP_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the OPAMPx registers block. + */ + OPAMP_TypeDef *reg; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if STM32_OPAMP_USE_OPAMP1 && !defined(__DOXYGEN__) +extern OPAMPDriver OPAMPD1; +#endif + +#if STM32_OPAMP_USE_OPAMP2 && !defined(__DOXYGEN__) +extern OPAMPDriver OPAMPD2; +#endif + +#if STM32_OPAMP_USE_OPAMP3 && !defined(__DOXYGEN__) +extern OPAMPDriver OPAMPD3; +#endif + +#if STM32_OPAMP_USE_OPAMP4 && !defined(__DOXYGEN__) +extern OPAMPDriver OPAMPD4; +#endif + + +#ifdef __cplusplus +extern "C" { +#endif + void opamp_lld_init(void); + void opamp_lld_start(OPAMPDriver *compp); + void opamp_lld_stop(OPAMPDriver *compp); + void opamp_lld_enable(OPAMPDriver *compp); + void opamp_lld_disable(OPAMPDriver *compp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_OPAMP */ + +#endif /* _opamp_lld_H_ */ + +/** @} */ diff --git a/os/hal/ports/STM32/STM32F3xx/platform.mk b/os/hal/ports/STM32/STM32F3xx/platform.mk index f41da95..befe229 100644 --- a/os/hal/ports/STM32/STM32F3xx/platform.mk +++ b/os/hal/ports/STM32/STM32F3xx/platform.mk @@ -15,6 +15,7 @@ endif include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/COMPv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/OPAMPv1/driver.mk # Shared variables ALLCSRC += $(PLATFORMSRC_CONTRIB) diff --git a/os/hal/src/hal_opamp.c b/os/hal/src/hal_opamp.c new file mode 100644 index 0000000..ba718a7 --- /dev/null +++ b/os/hal/src/hal_opamp.c @@ -0,0 +1,155 @@ +/* + ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio + Copyright (C) 2019 Fabien Poussin (fabien.poussin (at) google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_opamp.c + * @brief OPAMP Driver code. + * + * @addtogroup OPAMP + * @{ + */ + +#include "hal_opamp.h" + +#if HAL_USE_OPAMP || defined(__DOXYGEN__) + + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief OPAMP Driver initialization. + * @note This function is implicitly invoked by @p halInit(), there is + * no need to explicitly initialize the driver. + * + * @init + */ +void opampInit(void) { + + opamp_lld_init(); +} + +/** + * @brief Initializes the standard part of a @p OPAMPDriver structure. + * + * @param[out] opampp pointer to the @p OPAMPDriver object + * + * @init + */ +void opampObjectInit(OPAMPDriver *opampp) { + + opampp->state = OPAMP_STOP; + opampp->config = NULL; +} + +/** + * @brief Configures and activates the OPAMP peripheral. + * + * @param[in] opampp pointer to the @p OPAMPDriver object + * @param[in] config pointer to the @p OPAMPConfig object + * + * @api + */ +void opampStart(OPAMPDriver *opampp, const OPAMPConfig *config) { + + osalDbgCheck((opampp != NULL) && (config != NULL)); + + osalSysLock(); + osalDbgAssert((opampp->state == OPAMP_STOP) || (opampp->state == OPAMP_READY), + "invalid state"); + opampp->config = config; + opamp_lld_start(opampp); + opampp->state = OPAMP_READY; + osalSysUnlock(); +} + +/** + * @brief Deactivates the OPAMP peripheral. + * + * @param[in] opampp pointer to the @p OPAMPDriver object + * + * @api + */ +void opampStop(OPAMPDriver *opampp) { + + osalDbgCheck(opampp != NULL); + + osalSysLock(); + osalDbgAssert((opampp->state == OPAMP_STOP) || (opampp->state == OPAMP_READY), + "invalid state"); + opamp_lld_stop(opampp); + opampp->state = OPAMP_STOP; + osalSysUnlock(); +} + +/** + * @brief Activates the opamp. + * + * @param[in] opampp pointer to the @p OPAMPDriver object + * + * @api + */ +void opampEnable(OPAMPDriver *opampp) { + + osalDbgCheck(opampp != NULL); + + osalSysLock(); + osalDbgAssert(opampp->state == OPAMP_READY, "invalid state"); + opamp_lld_enable(opampp); + opampp->state = OPAMP_ACTIVE; + osalSysUnlock(); +} + +/** + * @brief Deactivates the opamp. + * + * @param[in] opampp pointer to the @p OPAMPDriver object + * + * @api + */ +void opampDisable(OPAMPDriver *opampp) { + + osalDbgCheck(opampp != NULL); + + osalSysLock(); + osalDbgAssert((opampp->state == OPAMP_READY) || (opampp->state == OPAMP_ACTIVE), + "invalid state"); + opamp_lld_disable(opampp); + opampp->state = OPAMP_READY; + osalSysUnlock(); +} + +#endif /* HAL_USE_OPAMP */ + +/** @} */ diff --git a/testhal/STM32/STM32F3xx/OPAMP/Makefile b/testhal/STM32/STM32F3xx/OPAMP/Makefile new file mode 100644 index 0000000..3730513 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/Makefile @@ -0,0 +1,214 @@ +##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+ USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+ USE_LTO = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+ USE_SMART_BUILD = yes
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the Cortex-M process stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_PROCESS_STACKSIZE),)
+ USE_PROCESS_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the Cortex-M main/exceptions stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+ USE_EXCEPTIONS_STACKSIZE = 0x400
+endif
+
+# Enables the use of FPU (no, softfp, hard).
+ifeq ($(USE_FPU),)
+ USE_FPU = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Imported source files and paths
+CHIBIOS = ../../../../../ChibiOS-RT
+CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
+# Licensing files.
+include $(CHIBIOS)/os/license/license.mk
+# Startup files.
+include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk
+# HAL-OSAL files (optional).
+include $(CHIBIOS_CONTRIB)/os/hal/hal.mk
+include $(CHIBIOS_CONTRIB)/os/hal/ports/STM32/STM32F3xx/platform.mk
+include $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY/board.mk
+include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+# RTOS files (optional).
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+# Other files (optional).
+#include $(CHIBIOS)/test/lib/test.mk
+#include $(CHIBIOS)/test/rt/rt_test.mk
+#include $(CHIBIOS)/test/oslib/oslib_test.mk
+
+# Define linker script file here
+LDSCRIPT= $(STARTUPLD)/STM32F303xC.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(ALLCSRC) \
+ $(TESTSRC) \
+ main.c
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC = $(ALLCPPSRC)
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(ALLASMSRC)
+ASMXSRC = $(ALLXASMSRC)
+
+INCDIR = $(ALLINC) $(TESTINC)
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = cortex-m4
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+AR = $(TRGT)ar
+OD = $(TRGT)objdump
+SZ = $(TRGT)size
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra -Wundef
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
+include $(RULESPATH)/rules.mk
diff --git a/testhal/STM32/STM32F3xx/OPAMP/chconf.h b/testhal/STM32/STM32F3xx/OPAMP/chconf.h new file mode 100644 index 0000000..58cd5db --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/chconf.h @@ -0,0 +1,696 @@ +/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef CHCONF_H
+#define CHCONF_H
+
+#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_1_
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System time counter resolution.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#if !defined(CH_CFG_ST_RESOLUTION)
+#define CH_CFG_ST_RESOLUTION 32
+#endif
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#if !defined(CH_CFG_ST_FREQUENCY)
+#define CH_CFG_ST_FREQUENCY 10000
+#endif
+
+/**
+ * @brief Time intervals data size.
+ * @note Allowed values are 16, 32 or 64 bits.
+ */
+#if !defined(CH_CFG_INTERVALS_SIZE)
+#define CH_CFG_INTERVALS_SIZE 32
+#endif
+
+/**
+ * @brief Time types data size.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#if !defined(CH_CFG_TIME_TYPES_SIZE)
+#define CH_CFG_TIME_TYPES_SIZE 32
+#endif
+
+/**
+ * @brief Time delta constant for the tick-less mode.
+ * @note If this value is zero then the system uses the classic
+ * periodic tick. This value represents the minimum number
+ * of ticks that is safe to specify in a timeout directive.
+ * The value one is not valid, timeouts are rounded up to
+ * this value.
+ */
+#if !defined(CH_CFG_ST_TIMEDELTA)
+#define CH_CFG_ST_TIMEDELTA 2
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ * @note The round robin preemption is not supported in tickless mode and
+ * must be set to zero in that case.
+ */
+#if !defined(CH_CFG_TIME_QUANTUM)
+#define CH_CFG_TIME_QUANTUM 0
+#endif
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_CFG_USE_MEMCORE.
+ */
+#if !defined(CH_CFG_MEMCORE_SIZE)
+#define CH_CFG_MEMCORE_SIZE 0
+#endif
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread. The application @p main()
+ * function becomes the idle thread and must implement an
+ * infinite loop.
+ */
+#if !defined(CH_CFG_NO_IDLE_THREAD)
+#define CH_CFG_NO_IDLE_THREAD FALSE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_CFG_OPTIMIZE_SPEED)
+#define CH_CFG_OPTIMIZE_SPEED TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Time Measurement APIs.
+ * @details If enabled then the time measurement APIs are included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_TM)
+#define CH_CFG_USE_TM FALSE
+#endif
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_REGISTRY)
+#define CH_CFG_USE_REGISTRY TRUE
+#endif
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_WAITEXIT)
+#define CH_CFG_USE_WAITEXIT TRUE
+#endif
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_SEMAPHORES)
+#define CH_CFG_USE_SEMAPHORES TRUE
+#endif
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
+#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_MUTEXES)
+#define CH_CFG_USE_MUTEXES TRUE
+#endif
+
+/**
+ * @brief Enables recursive behavior on mutexes.
+ * @note Recursive mutexes are heavier and have an increased
+ * memory footprint.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
+#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
+#endif
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#if !defined(CH_CFG_USE_CONDVARS)
+#define CH_CFG_USE_CONDVARS TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_CONDVARS.
+ */
+#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
+#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_EVENTS)
+#define CH_CFG_USE_EVENTS TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_EVENTS.
+ */
+#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
+#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_MESSAGES)
+#define CH_CFG_USE_MESSAGES TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_MESSAGES.
+ */
+#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
+#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#if !defined(CH_CFG_USE_MAILBOXES)
+#define CH_CFG_USE_MAILBOXES TRUE
+#endif
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_MEMCORE)
+#define CH_CFG_USE_MEMCORE TRUE
+#endif
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
+ * @p CH_CFG_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_CFG_USE_HEAP)
+#define CH_CFG_USE_HEAP TRUE
+#endif
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_MEMPOOLS)
+#define CH_CFG_USE_MEMPOOLS TRUE
+#endif
+
+/**
+ * @brief Objects FIFOs APIs.
+ * @details If enabled then the objects FIFOs APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_CFG_USE_OBJ_FIFOS)
+#define CH_CFG_USE_OBJ_FIFOS TRUE
+#endif
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_WAITEXIT.
+ * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
+ */
+#if !defined(CH_CFG_USE_DYNAMIC)
+#define CH_CFG_USE_DYNAMIC TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Objects factory options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Objects Factory APIs.
+ * @details If enabled then the objects factory APIs are included in the
+ * kernel.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_CFG_USE_FACTORY)
+#define CH_CFG_USE_FACTORY TRUE
+#endif
+
+/**
+ * @brief Maximum length for object names.
+ * @details If the specified length is zero then the name is stored by
+ * pointer but this could have unintended side effects.
+ */
+#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
+#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
+#endif
+
+/**
+ * @brief Enables the registry of generic objects.
+ */
+#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
+#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
+#endif
+
+/**
+ * @brief Enables factory for generic buffers.
+ */
+#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
+#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
+#endif
+
+/**
+ * @brief Enables factory for semaphores.
+ */
+#if !defined(CH_CFG_FACTORY_SEMAPHORES)
+#define CH_CFG_FACTORY_SEMAPHORES TRUE
+#endif
+
+/**
+ * @brief Enables factory for mailboxes.
+ */
+#if !defined(CH_CFG_FACTORY_MAILBOXES)
+#define CH_CFG_FACTORY_MAILBOXES TRUE
+#endif
+
+/**
+ * @brief Enables factory for objects FIFOs.
+ */
+#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
+#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, kernel statistics.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_STATISTICS)
+#define CH_DBG_STATISTICS FALSE
+#endif
+
+/**
+ * @brief Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ * at runtime.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
+#define CH_DBG_SYSTEM_STATE_CHECK TRUE
+#endif
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS)
+#define CH_DBG_ENABLE_CHECKS TRUE
+#endif
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS)
+#define CH_DBG_ENABLE_ASSERTS TRUE
+#endif
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the trace buffer is activated.
+ *
+ * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#if !defined(CH_DBG_TRACE_MASK)
+#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL
+#endif
+
+/**
+ * @brief Trace buffer entries.
+ * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
+ * different from @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
+#define CH_DBG_TRACE_BUFFER_SIZE 128
+#endif
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK)
+#define CH_DBG_ENABLE_STACK_CHECK TRUE
+#endif
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_FILL_THREADS)
+#define CH_DBG_FILL_THREADS TRUE
+#endif
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p thread_t structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p FALSE.
+ * @note This debug option is not currently compatible with the
+ * tickless mode.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING)
+#define CH_DBG_THREADS_PROFILING FALSE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System structure extension.
+ * @details User fields added to the end of the @p ch_system_t structure.
+ */
+#define CH_CFG_SYSTEM_EXTRA_FIELDS \
+ /* Add threads custom fields here.*/
+
+/**
+ * @brief System initialization hook.
+ * @details User initialization code added to the @p chSysInit() function
+ * just before interrupts are enabled globally.
+ */
+#define CH_CFG_SYSTEM_INIT_HOOK() { \
+ /* Add threads initialization code here.*/ \
+}
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define CH_CFG_THREAD_EXTRA_FIELDS \
+ /* Add threads custom fields here.*/
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p _thread_init() function.
+ *
+ * @note It is invoked from within @p _thread_init() and implicitly from all
+ * the threads creation APIs.
+ */
+#define CH_CFG_THREAD_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ */
+#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+
+/**
+ * @brief Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
+ /* Context switch code here.*/ \
+}
+
+/**
+ * @brief ISR enter hook.
+ */
+#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
+ /* IRQ prologue code here.*/ \
+}
+
+/**
+ * @brief ISR exit hook.
+ */
+#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
+ /* IRQ epilogue code here.*/ \
+}
+
+/**
+ * @brief Idle thread enter hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to activate a power saving mode.
+ */
+#define CH_CFG_IDLE_ENTER_HOOK() { \
+ /* Idle-enter code here.*/ \
+}
+
+/**
+ * @brief Idle thread leave hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to deactivate a power saving mode.
+ */
+#define CH_CFG_IDLE_LEAVE_HOOK() { \
+ /* Idle-leave code here.*/ \
+}
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#define CH_CFG_IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#define CH_CFG_SYSTEM_TICK_HOOK() { \
+ /* System tick event code here.*/ \
+}
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
+ /* System halt code here.*/ \
+}
+
+/**
+ * @brief Trace hook.
+ * @details This hook is invoked each time a new record is written in the
+ * trace buffer.
+ */
+#define CH_CFG_TRACE_HOOK(tep) { \
+ /* Trace code here.*/ \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* CHCONF_H */
+
+/** @} */
diff --git a/testhal/STM32/STM32F3xx/OPAMP/halconf.h b/testhal/STM32/STM32F3xx/OPAMP/halconf.h new file mode 100644 index 0000000..9192b27 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/halconf.h @@ -0,0 +1,419 @@ +/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef HALCONF_H
+#define HALCONF_H
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC TRUE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the cryptographic subsystem.
+ */
+#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
+#define HAL_USE_CRY FALSE
+#endif
+
+/**
+ * @brief Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC TRUE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT TRUE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the QSPI subsystem.
+ */
+#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
+#define HAL_USE_QSPI FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
+/**
+ * @brief Enables the WDG subsystem.
+ */
+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
+#define HAL_USE_WDG FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* CRY driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the SW fall-back of the cryptographic driver.
+ * @details When enabled, this option, activates a fall-back software
+ * implementation for algorithms not supported by the underlying
+ * hardware.
+ * @note Fall-back implementations may not be present for all algorithms.
+ */
+#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
+#define HAL_CRY_USE_FALLBACK FALSE
+#endif
+
+/**
+ * @brief Makes the driver forcibly use the fall-back implementations.
+ */
+#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
+#define HAL_CRY_ENFORCE_FALLBACK FALSE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY FALSE
+#endif
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 16 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SERIAL_USB driver related setting. */
+/*===========================================================================*/
+
+/**
+ * @brief Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ * the USB data endpoint maximum packet size.
+ * @note The default is 256 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE 256
+#endif
+
+/**
+ * @brief Serial over USB number of buffers.
+ * @note The default is 2 buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_NUMBER 2
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
+#define UART_USE_WAIT FALSE
+#endif
+
+/**
+ * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define UART_USE_MUTUAL_EXCLUSION FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT FALSE
+#endif
+
+#include "halconf_community.h"
+
+#endif /* HALCONF_H */
+
+/** @} */
diff --git a/testhal/STM32/STM32F3xx/OPAMP/halconf_community.h b/testhal/STM32/STM32F3xx/OPAMP/halconf_community.h new file mode 100644 index 0000000..6f56cd8 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/halconf_community.h @@ -0,0 +1,180 @@ +/*
+ ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef HALCONF_COMMUNITY_H
+#define HALCONF_COMMUNITY_H
+
+/**
+ * @brief Enables the community overlay.
+ */
+#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__)
+#define HAL_USE_COMMUNITY TRUE
+#endif
+
+/**
+ * @brief Enables the FSMC subsystem.
+ */
+#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__)
+#define HAL_USE_FSMC FALSE
+#endif
+
+/**
+ * @brief Enables the NAND subsystem.
+ */
+#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
+#define HAL_USE_NAND FALSE
+#endif
+
+/**
+ * @brief Enables the 1-wire subsystem.
+ */
+#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__)
+#define HAL_USE_ONEWIRE FALSE
+#endif
+
+/**
+ * @brief Enables the EICU subsystem.
+ */
+#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__)
+#define HAL_USE_EICU FALSE
+#endif
+
+/**
+ * @brief Enables the CRC subsystem.
+ */
+#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__)
+#define HAL_USE_CRC FALSE
+#endif
+
+/**
+ * @brief Enables the RNG subsystem.
+ */
+#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__)
+#define HAL_USE_RNG FALSE
+#endif
+
+/**
+ * @brief Enables the EEPROM subsystem.
+ */
+#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__)
+#define HAL_USE_EEPROM FALSE
+#endif
+
+/**
+ * @brief Enables the TIMCAP subsystem.
+ */
+#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__)
+#define HAL_USE_TIMCAP FALSE
+#endif
+
+/**
+ * @brief Enables the TIMCAP subsystem.
+ */
+#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__)
+#define HAL_USE_COMP TRUE
+#endif
+
+/**
+ * @brief Enables the OPAMP subsystem.
+ */
+#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__)
+#define HAL_USE_OPAMP TRUE
+#endif
+
+/**
+ * @brief Enables the QEI subsystem.
+ */
+#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)
+#define HAL_USE_QEI FALSE
+#endif
+
+/**
+ * @brief Enables the USBH subsystem.
+ */
+#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__)
+#define HAL_USE_USBH FALSE
+#endif
+
+/**
+ * @brief Enables the USB_MSD subsystem.
+ */
+#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__)
+#define HAL_USE_USB_MSD FALSE
+#endif
+
+/*===========================================================================*/
+/* FSMCNAND driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define NAND_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* 1-wire driver related settings. */
+/*===========================================================================*/
+/**
+ * @brief Enables strong pull up feature.
+ * @note Disabling this option saves both code and data space.
+ */
+#define ONEWIRE_USE_STRONG_PULLUP FALSE
+
+/**
+ * @brief Enables search ROM feature.
+ * @note Disabling this option saves both code and data space.
+ */
+#define ONEWIRE_USE_SEARCH_ROM TRUE
+
+/*===========================================================================*/
+/* QEI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables discard of overlow
+ */
+#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__)
+#define QEI_USE_OVERFLOW_DISCARD FALSE
+#endif
+
+/**
+ * @brief Enables min max of overlow
+ */
+#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__)
+#define QEI_USE_OVERFLOW_MINMAX FALSE
+#endif
+
+/*===========================================================================*/
+/* EEProm driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables 24xx series I2C eeprom device driver.
+ * @note Disabling this option saves both code and data space.
+ */
+#define EEPROM_USE_EE24XX FALSE
+ /**
+ * @brief Enables 25xx series SPI eeprom device driver.
+ * @note Disabling this option saves both code and data space.
+ */
+#define EEPROM_USE_EE25XX FALSE
+
+#endif /* HALCONF_COMMUNITY_H */
+
+/** @} */
diff --git a/testhal/STM32/STM32F3xx/OPAMP/main.c b/testhal/STM32/STM32F3xx/OPAMP/main.c new file mode 100644 index 0000000..0345f12 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/main.c @@ -0,0 +1,124 @@ +/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+#define DAC_BUFFER_SIZE 360
+
+/*
+ * DAC test buffer (sine wave).
+ */
+static const dacsample_t dac_buffer[DAC_BUFFER_SIZE] = {
+ 2047, 2082, 2118, 2154, 2189, 2225, 2260, 2296, 2331, 2367, 2402, 2437,
+ 2472, 2507, 2542, 2576, 2611, 2645, 2679, 2713, 2747, 2780, 2813, 2846,
+ 2879, 2912, 2944, 2976, 3008, 3039, 3070, 3101, 3131, 3161, 3191, 3221,
+ 3250, 3278, 3307, 3335, 3362, 3389, 3416, 3443, 3468, 3494, 3519, 3544,
+ 3568, 3591, 3615, 3637, 3660, 3681, 3703, 3723, 3744, 3763, 3782, 3801,
+ 3819, 3837, 3854, 3870, 3886, 3902, 3917, 3931, 3944, 3958, 3970, 3982,
+ 3993, 4004, 4014, 4024, 4033, 4041, 4049, 4056, 4062, 4068, 4074, 4078,
+ 4082, 4086, 4089, 4091, 4092, 4093, 4094, 4093, 4092, 4091, 4089, 4086,
+ 4082, 4078, 4074, 4068, 4062, 4056, 4049, 4041, 4033, 4024, 4014, 4004,
+ 3993, 3982, 3970, 3958, 3944, 3931, 3917, 3902, 3886, 3870, 3854, 3837,
+ 3819, 3801, 3782, 3763, 3744, 3723, 3703, 3681, 3660, 3637, 3615, 3591,
+ 3568, 3544, 3519, 3494, 3468, 3443, 3416, 3389, 3362, 3335, 3307, 3278,
+ 3250, 3221, 3191, 3161, 3131, 3101, 3070, 3039, 3008, 2976, 2944, 2912,
+ 2879, 2846, 2813, 2780, 2747, 2713, 2679, 2645, 2611, 2576, 2542, 2507,
+ 2472, 2437, 2402, 2367, 2331, 2296, 2260, 2225, 2189, 2154, 2118, 2082,
+ 2047, 2012, 1976, 1940, 1905, 1869, 1834, 1798, 1763, 1727, 1692, 1657,
+ 1622, 1587, 1552, 1518, 1483, 1449, 1415, 1381, 1347, 1314, 1281, 1248,
+ 1215, 1182, 1150, 1118, 1086, 1055, 1024, 993, 963, 933, 903, 873,
+ 844, 816, 787, 759, 732, 705, 678, 651, 626, 600, 575, 550,
+ 526, 503, 479, 457, 434, 413, 391, 371, 350, 331, 312, 293,
+ 275, 257, 240, 224, 208, 192, 177, 163, 150, 136, 124, 112,
+ 101, 90, 80, 70, 61, 53, 45, 38, 32, 26, 20, 16,
+ 12, 8, 5, 3, 2, 1, 0, 1, 2, 3, 5, 8,
+ 12, 16, 20, 26, 32, 38, 45, 53, 61, 70, 80, 90,
+ 101, 112, 124, 136, 150, 163, 177, 192, 208, 224, 240, 257,
+ 275, 293, 312, 331, 350, 371, 391, 413, 434, 457, 479, 503,
+ 526, 550, 575, 600, 626, 651, 678, 705, 732, 759, 787, 816,
+ 844, 873, 903, 933, 963, 993, 1024, 1055, 1086, 1118, 1150, 1182,
+ 1215, 1248, 1281, 1314, 1347, 1381, 1415, 1449, 1483, 1518, 1552, 1587,
+ 1622, 1657, 1692, 1727, 1763, 1798, 1834, 1869, 1905, 1940, 1976, 2012
+};
+
+static const DACConfig dac1cfg1 = {
+ .init = 2047U,
+ .datamode = DAC_DHRM_12BIT_RIGHT,
+ .cr = 0
+};
+
+static const DACConversionGroup dacgrpcfg1 = {
+ .num_channels = 1U,
+ .end_cb = NULL,
+ .error_cb = NULL,
+ .trigger = DAC_TRG(0)
+};
+
+/*
+ * GPT6 configuration.
+ */
+static const GPTConfig gpt6cfg1 = {
+ .frequency = 10000U,
+ .callback = NULL,
+ .cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
+ .dier = 0U
+};
+
+static const OPAMPConfig opamp1_conf = {
+ 0
+};
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+ halInit();
+ chSysInit();
+
+ /*
+ * Set PA3 - PA1 to Analog (DAC1_CH1, OPAMP1_INP)
+ * You will have to connect these with a jumper wire
+ */
+ palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
+ palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG);
+
+ /*
+ * Start peripherals
+ */
+ dacStart(&DACD1, &dac1cfg1);
+ opampStart(&OPAMPD1, &opamp1_conf);
+ gptStart(&GPTD6, &gpt6cfg1);
+
+ /*
+ * Starting a continuous conversion.
+ */
+ dacStartConversion(&DACD1, &dacgrpcfg1, dac_buffer, DAC_BUFFER_SIZE);
+ gptStartContinuous(&GPTD6, 2U);
+
+ opampEnable(&OPAMPD1);
+
+ /*
+ * Normal main() thread activity.
+ */
+ while (true) {
+
+ chThdSleepMilliseconds(250);
+ palToggleLine(LINE_LED3_RED);
+ }
+ return 0;
+}
diff --git a/testhal/STM32/STM32F3xx/OPAMP/mcuconf.h b/testhal/STM32/STM32F3xx/OPAMP/mcuconf.h new file mode 100644 index 0000000..9b14ad7 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/mcuconf.h @@ -0,0 +1,255 @@ +/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
+/*
+ * STM32F3xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+#define STM32F3xx_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT FALSE
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
+#define STM32_HSI_ENABLED TRUE
+#define STM32_LSI_ENABLED TRUE
+#define STM32_HSE_ENABLED TRUE
+#define STM32_LSE_ENABLED FALSE
+#define STM32_SW STM32_SW_PLL
+#define STM32_PLLSRC STM32_PLLSRC_HSE
+#define STM32_PREDIV_VALUE 1
+#define STM32_PLLMUL_VALUE 9
+#define STM32_HPRE STM32_HPRE_DIV1
+#define STM32_PPRE1 STM32_PPRE1_DIV2
+#define STM32_PPRE2 STM32_PPRE2_DIV2
+#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
+#define STM32_ADC12PRES STM32_ADC12PRES_DIV1
+#define STM32_ADC34PRES STM32_ADC34PRES_DIV1
+#define STM32_USART1SW STM32_USART1SW_PCLK
+#define STM32_USART2SW STM32_USART2SW_PCLK
+#define STM32_USART3SW STM32_USART3SW_PCLK
+#define STM32_UART4SW STM32_UART4SW_PCLK
+#define STM32_UART5SW STM32_UART5SW_PCLK
+#define STM32_I2C1SW STM32_I2C1SW_SYSCLK
+#define STM32_I2C2SW STM32_I2C2SW_SYSCLK
+#define STM32_TIM1SW STM32_TIM1SW_PCLK2
+#define STM32_TIM8SW STM32_TIM8SW_PCLK2
+#define STM32_RTCSEL STM32_RTCSEL_LSI
+#define STM32_USB_CLOCK_REQUIRED TRUE
+#define STM32_USBPRE STM32_USBPRE_DIV1P5
+
+/*
+ * IRQ system settings.
+ */
+#define STM32_IRQ_EXTI0_PRIORITY 6
+#define STM32_IRQ_EXTI1_PRIORITY 6
+#define STM32_IRQ_EXTI2_PRIORITY 6
+#define STM32_IRQ_EXTI3_PRIORITY 6
+#define STM32_IRQ_EXTI4_PRIORITY 6
+#define STM32_IRQ_EXTI5_9_PRIORITY 6
+#define STM32_IRQ_EXTI10_15_PRIORITY 6
+#define STM32_IRQ_EXTI16_PRIORITY 6
+#define STM32_IRQ_EXTI17_PRIORITY 6
+#define STM32_IRQ_EXTI18_PRIORITY 6
+#define STM32_IRQ_EXTI19_PRIORITY 6
+#define STM32_IRQ_EXTI20_PRIORITY 6
+#define STM32_IRQ_EXTI21_22_29_PRIORITY 6
+#define STM32_IRQ_EXTI30_32_PRIORITY 6
+#define STM32_IRQ_EXTI33_PRIORITY 6
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_DUAL_MODE FALSE
+#define STM32_ADC_COMPACT_SAMPLES FALSE
+#define STM32_ADC_USE_ADC1 TRUE
+#define STM32_ADC_USE_ADC2 TRUE
+#define STM32_ADC_USE_ADC3 TRUE
+#define STM32_ADC_USE_ADC4 TRUE
+#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
+#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
+#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
+#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
+#define STM32_ADC_ADC1_DMA_PRIORITY 2
+#define STM32_ADC_ADC2_DMA_PRIORITY 2
+#define STM32_ADC_ADC3_DMA_PRIORITY 2
+#define STM32_ADC_ADC4_DMA_PRIORITY 2
+#define STM32_ADC_ADC12_IRQ_PRIORITY 5
+#define STM32_ADC_ADC3_IRQ_PRIORITY 5
+#define STM32_ADC_ADC4_IRQ_PRIORITY 5
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
+#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5
+#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
+#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1 FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY 11
+
+/*
+ * DAC driver system settings.
+ */
+#define STM32_DAC_DUAL_MODE FALSE
+#define STM32_DAC_USE_DAC1_CH1 TRUE
+#define STM32_DAC_USE_DAC1_CH2 TRUE
+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1 FALSE
+#define STM32_GPT_USE_TIM2 FALSE
+#define STM32_GPT_USE_TIM3 FALSE
+#define STM32_GPT_USE_TIM4 FALSE
+#define STM32_GPT_USE_TIM6 TRUE
+#define STM32_GPT_USE_TIM7 FALSE
+#define STM32_GPT_USE_TIM8 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY 7
+#define STM32_GPT_TIM2_IRQ_PRIORITY 7
+#define STM32_GPT_TIM3_IRQ_PRIORITY 7
+#define STM32_GPT_TIM4_IRQ_PRIORITY 7
+#define STM32_GPT_TIM6_IRQ_PRIORITY 7
+#define STM32_GPT_TIM7_IRQ_PRIORITY 7
+#define STM32_GPT_TIM8_IRQ_PRIORITY 7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1 FALSE
+#define STM32_I2C_USE_I2C2 FALSE
+#define STM32_I2C_BUSY_TIMEOUT 50
+#define STM32_I2C_I2C1_IRQ_PRIORITY 10
+#define STM32_I2C_I2C2_IRQ_PRIORITY 10
+#define STM32_I2C_USE_DMA TRUE
+#define STM32_I2C_I2C1_DMA_PRIORITY 1
+#define STM32_I2C_I2C2_DMA_PRIORITY 1
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1 FALSE
+#define STM32_ICU_USE_TIM2 FALSE
+#define STM32_ICU_USE_TIM3 FALSE
+#define STM32_ICU_USE_TIM4 FALSE
+#define STM32_ICU_USE_TIM8 FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY 7
+#define STM32_ICU_TIM2_IRQ_PRIORITY 7
+#define STM32_ICU_TIM3_IRQ_PRIORITY 7
+#define STM32_ICU_TIM4_IRQ_PRIORITY 7
+#define STM32_ICU_TIM8_IRQ_PRIORITY 7
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED FALSE
+#define STM32_PWM_USE_TIM1 FALSE
+#define STM32_PWM_USE_TIM2 FALSE
+#define STM32_PWM_USE_TIM3 FALSE
+#define STM32_PWM_USE_TIM4 FALSE
+#define STM32_PWM_USE_TIM8 FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY 7
+#define STM32_PWM_TIM2_IRQ_PRIORITY 7
+#define STM32_PWM_TIM3_IRQ_PRIORITY 7
+#define STM32_PWM_TIM4_IRQ_PRIORITY 7
+#define STM32_PWM_TIM8_IRQ_PRIORITY 7
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 FALSE
+#define STM32_SERIAL_USE_USART2 FALSE
+#define STM32_SERIAL_USE_USART3 FALSE
+#define STM32_SERIAL_USE_UART4 FALSE
+#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USART1_PRIORITY 12
+#define STM32_SERIAL_USART2_PRIORITY 12
+#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 FALSE
+#define STM32_SPI_USE_SPI2 FALSE
+#define STM32_SPI_USE_SPI3 FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY 1
+#define STM32_SPI_SPI2_DMA_PRIORITY 1
+#define STM32_SPI_SPI3_DMA_PRIORITY 1
+#define STM32_SPI_SPI1_IRQ_PRIORITY 10
+#define STM32_SPI_SPI2_IRQ_PRIORITY 10
+#define STM32_SPI_SPI3_IRQ_PRIORITY 10
+#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY 8
+#define STM32_ST_USE_TIMER 2
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART2 FALSE
+#define STM32_UART_USE_USART3 FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY 12
+#define STM32_UART_USART2_IRQ_PRIORITY 12
+#define STM32_UART_USART3_IRQ_PRIORITY 12
+#define STM32_UART_USART1_DMA_PRIORITY 0
+#define STM32_UART_USART2_DMA_PRIORITY 0
+#define STM32_UART_USART3_DMA_PRIORITY 0
+#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1 FALSE
+#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
+#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
+
+/*
+ * WDG driver system settings.
+ */
+#define STM32_WDG_USE_IWDG FALSE
+
+#include "mcuconf_community.h"
+
+#endif /* MCUCONF_H */
diff --git a/testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h b/testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h new file mode 100644 index 0000000..76f9429 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h @@ -0,0 +1,164 @@ +/* + ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * FSMC driver system settings. + */ +#define STM32_FSMC_USE_FSMC1 FALSE +#define STM32_FSMC_FSMC1_IRQ_PRIORITY 10 + +/* + * FSMC NAND driver system settings. + */ +#define STM32_NAND_USE_FSMC_NAND1 FALSE +#define STM32_NAND_USE_FSMC_NAND2 FALSE +#define STM32_NAND_USE_EXT_INT FALSE +#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_NAND_DMA_PRIORITY 0 +#define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") + +/* + * FSMC SRAM driver system settings. + */ +#define STM32_USE_FSMC_SRAM FALSE +#define STM32_SRAM_USE_FSMC_SRAM1 FALSE +#define STM32_SRAM_USE_FSMC_SRAM2 FALSE +#define STM32_SRAM_USE_FSMC_SRAM3 FALSE +#define STM32_SRAM_USE_FSMC_SRAM4 FALSE + +/* + * FSMC SDRAM driver system settings. + */ +#define STM32_USE_FSMC_SDRAM FALSE + +/* + * TIMCAP driver system settings. + */ +#define STM32_TIMCAP_USE_TIM1 TRUE +#define STM32_TIMCAP_USE_TIM2 FALSE +#define STM32_TIMCAP_USE_TIM3 TRUE +#define STM32_TIMCAP_USE_TIM4 TRUE +#define STM32_TIMCAP_USE_TIM5 TRUE +#define STM32_TIMCAP_USE_TIM8 TRUE +#define STM32_TIMCAP_USE_TIM9 TRUE +#define STM32_TIMCAP_TIM1_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM2_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM3_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM4_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM5_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM8_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM9_IRQ_PRIORITY 3 + +/* + * COMP driver system settings. + */ +#define STM32_COMP_USE_COMP1 TRUE +#define STM32_COMP_USE_COMP2 TRUE +#define STM32_COMP_USE_COMP3 TRUE +#define STM32_COMP_USE_COMP4 TRUE +#define STM32_COMP_USE_COMP5 TRUE +#define STM32_COMP_USE_COMP6 TRUE +#define STM32_COMP_USE_COMP7 TRUE + +#define STM32_COMP_USE_INTERRUPTS TRUE +#define STM32_COMP_1_2_3_IRQ_PRIORITY 5 +#define STM32_COMP_4_5_6_IRQ_PRIORITY 5 +#define STM32_COMP_7_IRQ_PRIORITY 5 + +#if STM32_COMP_USE_INTERRUPTS +#define STM32_DISABLE_EXTI21_22_29_HANDLER +#define STM32_DISABLE_EXTI30_32_HANDLER +#define STM32_DISABLE_EXTI33_HANDLER +#endif + +/* + * OPAMP driver system settings. + */ + +#define STM32_OPAMP_USE_OPAMP1 TRUE +#define STM32_OPAMP_USE_OPAMP2 TRUE +#define STM32_OPAMP_USE_OPAMP3 TRUE +#define STM32_OPAMP_USE_OPAMP4 TRUE + +/* + * USBH driver system settings. + */ +#define STM32_OTG1_CHANNELS_NUMBER 8 +#define STM32_OTG2_CHANNELS_NUMBER 12 + +#define STM32_USBH_USE_OTG1 1 +#define STM32_OTG1_RXFIFO_SIZE 1024 +#define STM32_OTG1_PTXFIFO_SIZE 128 +#define STM32_OTG1_NPTXFIFO_SIZE 128 + +#define STM32_USBH_USE_OTG2 0 +#define STM32_OTG2_RXFIFO_SIZE 2048 +#define STM32_OTG2_PTXFIFO_SIZE 1024 +#define STM32_OTG2_NPTXFIFO_SIZE 1024 + +#define STM32_USBH_MIN_QSPACE 4 +#define STM32_USBH_CHANNELS_NP 4 + +/* + * CRC driver system settings. + */ +#define STM32_CRC_USE_CRC1 TRUE +#define STM32_CRC_CRC1_DMA_IRQ_PRIORITY 1 +#define STM32_CRC_CRC1_DMA_PRIORITY 2 +#define STM32_CRC_CRC1_DMA_STREAM STM32_DMA1_STREAM2 + +#define CRCSW_USE_CRC1 FALSE +#define CRCSW_CRC32_TABLE TRUE +#define CRCSW_CRC16_TABLE TRUE +#define CRCSW_PROGRAMMABLE TRUE + +/* + * EICU driver system settings. + */ +#define STM32_EICU_USE_TIM1 TRUE +#define STM32_EICU_USE_TIM2 FALSE +#define STM32_EICU_USE_TIM3 TRUE +#define STM32_EICU_USE_TIM4 TRUE +#define STM32_EICU_USE_TIM5 TRUE +#define STM32_EICU_USE_TIM8 TRUE +#define STM32_EICU_USE_TIM9 TRUE +#define STM32_EICU_USE_TIM10 TRUE +#define STM32_EICU_USE_TIM11 TRUE +#define STM32_EICU_USE_TIM12 TRUE +#define STM32_EICU_USE_TIM13 TRUE +#define STM32_EICU_USE_TIM14 TRUE +#define STM32_EICU_TIM1_IRQ_PRIORITY 7 +#define STM32_EICU_TIM2_IRQ_PRIORITY 7 +#define STM32_EICU_TIM3_IRQ_PRIORITY 7 +#define STM32_EICU_TIM4_IRQ_PRIORITY 7 +#define STM32_EICU_TIM5_IRQ_PRIORITY 7 +#define STM32_EICU_TIM8_IRQ_PRIORITY 7 +#define STM32_EICU_TIM9_IRQ_PRIORITY 7 +#define STM32_EICU_TIM10_IRQ_PRIORITY 7 +#define STM32_EICU_TIM11_IRQ_PRIORITY 7 +#define STM32_EICU_TIM12_IRQ_PRIORITY 7 +#define STM32_EICU_TIM13_IRQ_PRIORITY 7 +#define STM32_EICU_TIM14_IRQ_PRIORITY 7 + +/* + * QEI driver system settings. + */ +#define STM32_QEI_USE_TIM1 TRUE +#define STM32_QEI_USE_TIM2 FALSE +#define STM32_QEI_USE_TIM3 TRUE +#define STM32_QEI_TIM1_IRQ_PRIORITY 3 +#define STM32_QEI_TIM2_IRQ_PRIORITY 3 +#define STM32_QEI_TIM3_IRQ_PRIORITY 3 |