diff options
Diffstat (limited to 'os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h')
-rw-r--r-- | os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h | 100 |
1 files changed, 54 insertions, 46 deletions
diff --git a/os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h b/os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h index fbd0ff3..8aaecbf 100644 --- a/os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h +++ b/os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h @@ -17,23 +17,33 @@ /** * @file TM4C123x/cmparams.h * @brief ARM Cortex-M4 parameters for the TM4C123x. + * + * @defgroup ARMCMx_TM4C123x TM4C123x Specific Parameters + * @ingroup ARMCMx_SPECIFIC + * @details This file contains the Cortex-M4 specific parameters for the + * TM4C123x platform. * @{ */ #ifndef CMPARAMS_H #define CMPARAMS_H +/* Defines required for correct CMSIS header functioning */ +#define __MPU_PRESENT 1 /**< MPU present */ +#define __NVIC_PRIO_BITS 3 /**< Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 1 /**< Use different SysTick Config */ +#define __FPU_PRESENT 1 /**< FPU present */ + +/* The following two defines are needed by ChibiOS */ +#define SVCall_IRQn -5 +#define PendSV_IRQn -3 + /** * @brief Cortex core model. */ #define CORTEX_MODEL 4 /** - * @brief Memory Protection unit presence. - */ -#define CORTEX_HAS_MPU 1 - -/** * @brief Floating Point unit presence. */ #define CORTEX_HAS_FPU 1 @@ -57,56 +67,54 @@ /* If the device type is not externally defined, for example from the Makefile, then a file named board.h is included. This file must contain a device definition compatible with the include file.*/ -#if !defined(TM4C1230C3PM) && !defined(TM4C1230D5PM) && \ - !defined(TM4C1230E6PM) && !defined(TM4C1230H6PM) && \ - !defined(TM4C1231C3PM) && !defined(TM4C1231D5PM) && \ - !defined(TM4C1231D5PZ) && !defined(TM4C1231E6PM) && \ - !defined(TM4C1231E6PZ) && !defined(TM4C1231H6PGE) && \ - !defined(TM4C1231H6PM) && !defined(TM4C1231H6PZ) && \ - !defined(TM4C1232C3PM) && !defined(TM4C1232D5PM) && \ - !defined(TM4C1232E6PM) && !defined(TM4C1232H6PM) && \ - !defined(TM4C1233C3PM) && !defined(TM4C1233D5PM) && \ - !defined(TM4C1233D5PZ) && !defined(TM4C1233E6PM) && \ - !defined(TM4C1233E6PZ) && !defined(TM4C1233H6PGE) && \ - !defined(TM4C1233H6PM) && !defined(TM4C1233H6PZ) && \ - !defined(TM4C1236D5PM) && !defined(TM4C1236E6PM) && \ - !defined(TM4C1236H6PM) && !defined(TM4C1237D5PM) && \ - !defined(TM4C1237D5PZ) && !defined(TM4C1237E6PM) && \ - !defined(TM4C1237E6PZ) && !defined(TM4C1237H6PGE) && \ - !defined(TM4C1237H6PM) && !defined(TM4C1237H6PZ) && \ - !defined(TM4C123AE6PM) && !defined(TM4C123AH6PM) && \ - !defined(TM4C123BE6PM) && !defined(TM4C123BE6PZ) && \ - !defined(TM4C123BH6PGE) && !defined(TM4C123BH6PM) && \ - !defined(TM4C123BH6PZ) && !defined(TM4C123BH6ZRB) && \ - !defined(TM4C123FE6PM) && !defined(TM4C123FH6PM) && \ - !defined(TM4C123GE6PM) && !defined(TM4C123GE6PZ) && \ - !defined(TM4C123GH6PGE) && !defined(TM4C123GH6PM) && \ - !defined(TM4C123GH6PZ) && !defined(TM4C123GH6ZRB) && \ - !defined(TM4C123GH5ZXR) +#if !defined (PART_TM4C1230C3PM) && !defined (PART_TM4C1230D5PM) && \ + !defined (PART_TM4C1230E6PM) && !defined (PART_TM4C1230H6PM) && \ + !defined (PART_TM4C1231C3PM) && !defined (PART_TM4C1231D5PM) && \ + !defined (PART_TM4C1231D5PZ) && !defined (PART_TM4C1231E6PM) && \ + !defined (PART_TM4C1231E6PZ) && !defined (PART_TM4C1231H6PGE) && \ + !defined (PART_TM4C1231H6PM) && !defined (PART_TM4C1231H6PZ) && \ + !defined (PART_TM4C1232C3PM) && !defined (PART_TM4C1232D5PM) && \ + !defined (PART_TM4C1232E6PM) && !defined (PART_TM4C1232H6PM) && \ + !defined (PART_TM4C1233C3PM) && !defined (PART_TM4C1233D5PM) && \ + !defined (PART_TM4C1233D5PZ) && !defined (PART_TM4C1233E6PM) && \ + !defined (PART_TM4C1233E6PZ) && !defined (PART_TM4C1233H6PGE) && \ + !defined (PART_TM4C1233H6PM) && !defined (PART_TM4C1233H6PZ) && \ + !defined (PART_TM4C1236D5PM) && !defined (PART_TM4C1236E6PM) && \ + !defined (PART_TM4C1236H6PM) && !defined (PART_TM4C1237D5PM) && \ + !defined (PART_TM4C1237D5PZ) && !defined (PART_TM4C1237E6PM) && \ + !defined (PART_TM4C1237E6PZ) && !defined (PART_TM4C1237H6PGE) && \ + !defined (PART_TM4C1237H6PM) && !defined (PART_TM4C1237H6PZ) && \ + !defined (PART_TM4C123AE6PM) && !defined (PART_TM4C123AH6PM) && \ + !defined (PART_TM4C123BE6PM) && !defined (PART_TM4C123BE6PZ) && \ + !defined (PART_TM4C123BH6PGE) && !defined (PART_TM4C123BH6PM) && \ + !defined (PART_TM4C123BH6PZ) && !defined (PART_TM4C123BH6ZRB) && \ + !defined (PART_TM4C123FE6PM) && !defined (PART_TM4C123FH6PM) && \ + !defined (PART_TM4C123GE6PM) && !defined (PART_TM4C123GE6PZ) && \ + !defined (PART_TM4C123GH6PGE) && !defined (PART_TM4C123GH6PM) && \ + !defined (PART_TM4C123GH6PZ) && !defined (PART_TM4C123GH6ZRB) && \ + !defined (PART_TM4C123GH5ZXR) #include "board.h" #endif -/* Including the device CMSIS header. Note, we are not using the definitions - from this header because we need this file to be usable also from - assembler source files. We verify that the info matches instead.*/ -#include "tm4c123x.h" +typedef int IRQn_Type; -#if !CORTEX_HAS_MPU != !__MPU_PRESENT -#error "CMSIS __MPU_PRESENT mismatch" -#endif +#include "core_cm4.h" -#if !CORTEX_HAS_FPU != !__FPU_PRESENT -#error "CMSIS __FPU_PRESENT mismatch" -#endif +/* Including the TivaWare peripheral headers.*/ +#include "inc/hw_ints.h" +#include "inc/hw_memmap.h" +#include "inc/hw_types.h" +#include "inc/hw_timer.h" +#include "inc/hw_sysctl.h" +#include "inc/hw_gpio.h" +#include "inc/hw_uart.h" -#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS -#error "CMSIS __NVIC_PRIO_BITS mismatch" +#if CORTEX_NUM_VECTORS != ((((NUM_INTERRUPTS - 16) + 7) / 8) * 8) +#error "TivaWare NUM_INTERRUPTS mismatch" #endif #endif /* !defined(_FROM_ASM_) */ #endif /* CMPARAMS_H */ -/** - * @} - */ +/** @} */ |