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-rw-r--r--os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h100
-rw-r--r--os/common/startup/ARMCMx/devices/TM4C129x/cmparams.h70
2 files changed, 93 insertions, 77 deletions
diff --git a/os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h b/os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h
index fbd0ff3..8aaecbf 100644
--- a/os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h
+++ b/os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h
@@ -17,23 +17,33 @@
/**
* @file TM4C123x/cmparams.h
* @brief ARM Cortex-M4 parameters for the TM4C123x.
+ *
+ * @defgroup ARMCMx_TM4C123x TM4C123x Specific Parameters
+ * @ingroup ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M4 specific parameters for the
+ * TM4C123x platform.
* @{
*/
#ifndef CMPARAMS_H
#define CMPARAMS_H
+/* Defines required for correct CMSIS header functioning */
+#define __MPU_PRESENT 1 /**< MPU present */
+#define __NVIC_PRIO_BITS 3 /**< Bits used for Priority Levels */
+#define __Vendor_SysTickConfig 1 /**< Use different SysTick Config */
+#define __FPU_PRESENT 1 /**< FPU present */
+
+/* The following two defines are needed by ChibiOS */
+#define SVCall_IRQn -5
+#define PendSV_IRQn -3
+
/**
* @brief Cortex core model.
*/
#define CORTEX_MODEL 4
/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU 1
-
-/**
* @brief Floating Point unit presence.
*/
#define CORTEX_HAS_FPU 1
@@ -57,56 +67,54 @@
/* If the device type is not externally defined, for example from the Makefile,
then a file named board.h is included. This file must contain a device
definition compatible with the include file.*/
-#if !defined(TM4C1230C3PM) && !defined(TM4C1230D5PM) && \
- !defined(TM4C1230E6PM) && !defined(TM4C1230H6PM) && \
- !defined(TM4C1231C3PM) && !defined(TM4C1231D5PM) && \
- !defined(TM4C1231D5PZ) && !defined(TM4C1231E6PM) && \
- !defined(TM4C1231E6PZ) && !defined(TM4C1231H6PGE) && \
- !defined(TM4C1231H6PM) && !defined(TM4C1231H6PZ) && \
- !defined(TM4C1232C3PM) && !defined(TM4C1232D5PM) && \
- !defined(TM4C1232E6PM) && !defined(TM4C1232H6PM) && \
- !defined(TM4C1233C3PM) && !defined(TM4C1233D5PM) && \
- !defined(TM4C1233D5PZ) && !defined(TM4C1233E6PM) && \
- !defined(TM4C1233E6PZ) && !defined(TM4C1233H6PGE) && \
- !defined(TM4C1233H6PM) && !defined(TM4C1233H6PZ) && \
- !defined(TM4C1236D5PM) && !defined(TM4C1236E6PM) && \
- !defined(TM4C1236H6PM) && !defined(TM4C1237D5PM) && \
- !defined(TM4C1237D5PZ) && !defined(TM4C1237E6PM) && \
- !defined(TM4C1237E6PZ) && !defined(TM4C1237H6PGE) && \
- !defined(TM4C1237H6PM) && !defined(TM4C1237H6PZ) && \
- !defined(TM4C123AE6PM) && !defined(TM4C123AH6PM) && \
- !defined(TM4C123BE6PM) && !defined(TM4C123BE6PZ) && \
- !defined(TM4C123BH6PGE) && !defined(TM4C123BH6PM) && \
- !defined(TM4C123BH6PZ) && !defined(TM4C123BH6ZRB) && \
- !defined(TM4C123FE6PM) && !defined(TM4C123FH6PM) && \
- !defined(TM4C123GE6PM) && !defined(TM4C123GE6PZ) && \
- !defined(TM4C123GH6PGE) && !defined(TM4C123GH6PM) && \
- !defined(TM4C123GH6PZ) && !defined(TM4C123GH6ZRB) && \
- !defined(TM4C123GH5ZXR)
+#if !defined (PART_TM4C1230C3PM) && !defined (PART_TM4C1230D5PM) && \
+ !defined (PART_TM4C1230E6PM) && !defined (PART_TM4C1230H6PM) && \
+ !defined (PART_TM4C1231C3PM) && !defined (PART_TM4C1231D5PM) && \
+ !defined (PART_TM4C1231D5PZ) && !defined (PART_TM4C1231E6PM) && \
+ !defined (PART_TM4C1231E6PZ) && !defined (PART_TM4C1231H6PGE) && \
+ !defined (PART_TM4C1231H6PM) && !defined (PART_TM4C1231H6PZ) && \
+ !defined (PART_TM4C1232C3PM) && !defined (PART_TM4C1232D5PM) && \
+ !defined (PART_TM4C1232E6PM) && !defined (PART_TM4C1232H6PM) && \
+ !defined (PART_TM4C1233C3PM) && !defined (PART_TM4C1233D5PM) && \
+ !defined (PART_TM4C1233D5PZ) && !defined (PART_TM4C1233E6PM) && \
+ !defined (PART_TM4C1233E6PZ) && !defined (PART_TM4C1233H6PGE) && \
+ !defined (PART_TM4C1233H6PM) && !defined (PART_TM4C1233H6PZ) && \
+ !defined (PART_TM4C1236D5PM) && !defined (PART_TM4C1236E6PM) && \
+ !defined (PART_TM4C1236H6PM) && !defined (PART_TM4C1237D5PM) && \
+ !defined (PART_TM4C1237D5PZ) && !defined (PART_TM4C1237E6PM) && \
+ !defined (PART_TM4C1237E6PZ) && !defined (PART_TM4C1237H6PGE) && \
+ !defined (PART_TM4C1237H6PM) && !defined (PART_TM4C1237H6PZ) && \
+ !defined (PART_TM4C123AE6PM) && !defined (PART_TM4C123AH6PM) && \
+ !defined (PART_TM4C123BE6PM) && !defined (PART_TM4C123BE6PZ) && \
+ !defined (PART_TM4C123BH6PGE) && !defined (PART_TM4C123BH6PM) && \
+ !defined (PART_TM4C123BH6PZ) && !defined (PART_TM4C123BH6ZRB) && \
+ !defined (PART_TM4C123FE6PM) && !defined (PART_TM4C123FH6PM) && \
+ !defined (PART_TM4C123GE6PM) && !defined (PART_TM4C123GE6PZ) && \
+ !defined (PART_TM4C123GH6PGE) && !defined (PART_TM4C123GH6PM) && \
+ !defined (PART_TM4C123GH6PZ) && !defined (PART_TM4C123GH6ZRB) && \
+ !defined (PART_TM4C123GH5ZXR)
#include "board.h"
#endif
-/* Including the device CMSIS header. Note, we are not using the definitions
- from this header because we need this file to be usable also from
- assembler source files. We verify that the info matches instead.*/
-#include "tm4c123x.h"
+typedef int IRQn_Type;
-#if !CORTEX_HAS_MPU != !__MPU_PRESENT
-#error "CMSIS __MPU_PRESENT mismatch"
-#endif
+#include "core_cm4.h"
-#if !CORTEX_HAS_FPU != !__FPU_PRESENT
-#error "CMSIS __FPU_PRESENT mismatch"
-#endif
+/* Including the TivaWare peripheral headers.*/
+#include "inc/hw_ints.h"
+#include "inc/hw_memmap.h"
+#include "inc/hw_types.h"
+#include "inc/hw_timer.h"
+#include "inc/hw_sysctl.h"
+#include "inc/hw_gpio.h"
+#include "inc/hw_uart.h"
-#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
-#error "CMSIS __NVIC_PRIO_BITS mismatch"
+#if CORTEX_NUM_VECTORS != ((((NUM_INTERRUPTS - 16) + 7) / 8) * 8)
+#error "TivaWare NUM_INTERRUPTS mismatch"
#endif
#endif /* !defined(_FROM_ASM_) */
#endif /* CMPARAMS_H */
-/**
- * @}
- */
+/** @} */
diff --git a/os/common/startup/ARMCMx/devices/TM4C129x/cmparams.h b/os/common/startup/ARMCMx/devices/TM4C129x/cmparams.h
index 669a446..bd9dc0d 100644
--- a/os/common/startup/ARMCMx/devices/TM4C129x/cmparams.h
+++ b/os/common/startup/ARMCMx/devices/TM4C129x/cmparams.h
@@ -17,23 +17,33 @@
/**
* @file TM4C129x/cmparams.h
* @brief ARM Cortex-M4 parameters for the TM4C129x.
+ *
+ * @defgroup ARMCMx_TM4C129x TM4C129x Specific Parameters
+ * @ingroup ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M4 specific parameters for the
+ * TM4C129x platform.
* @{
*/
#ifndef CMPARAMS_H
#define CMPARAMS_H
+/* Defines required for correct CMSIS header functioning */
+#define __MPU_PRESENT 1 /**< MPU present */
+#define __NVIC_PRIO_BITS 3 /**< Bits used for Priority Levels */
+#define __Vendor_SysTickConfig 1 /**< Use different SysTick Config */
+#define __FPU_PRESENT 1 /**< FPU present */
+
+/* The following two defines are needed by ChibiOS */
+#define SVCall_IRQn -5
+#define PendSV_IRQn -3
+
/**
* @brief Cortex core model.
*/
#define CORTEX_MODEL 4
/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU 1
-
-/**
* @brief Floating Point unit presence.
*/
#define CORTEX_HAS_FPU 1
@@ -48,7 +58,7 @@
* @note This number does not include the 16 system vectors and must be
* rounded to a multiple of 8.
*/
-#define CORTEX_NUM_VECTORS 112
+#define CORTEX_NUM_VECTORS 120
/* The following code is not processed when the file is included from an
asm module.*/
@@ -57,40 +67,38 @@
/* If the device type is not externally defined, for example from the Makefile,
then a file named board.h is included. This file must contain a device
definition compatible with the include file.*/
-#if !defined(TM4C1290NCPDT) && !defined(TM4C1290NCZAD) \
- && !defined(TM4C1292NCPDT) && !defined(TM4C1292NCZAD) \
- && !defined(TM4C1294KCPDT) && !defined(TM4C1294NCPDT) \
- && !defined(TM4C1294NCZAD) && !defined(TM4C1297NCZAD) \
- && !defined(TM4C1299KCZAD) && !defined(TM4C1299NCZAD) \
- && !defined(TM4C129CNCPDT) && !defined(TM4C129CNCZAD) \
- && !defined(TM4C129DNCPDT) && !defined(TM4C129DNCZAD) \
- && !defined(TM4C129EKCPDT) && !defined(TM4C129ENCPDT) \
- && !defined(TM4C129ENCZAD) && !defined(TM4C129LNCZAD) \
- && !defined(TM4C129XKCZAD) && !defined(TM4C129XNCZAD)
+#if !defined (PART_TM4C1290NCPDT) && !defined (PART_TM4C1290NCZAD) && \
+ !defined (PART_TM4C1292NCPDT) && !defined (PART_TM4C1292NCZAD) && \
+ !defined (PART_TM4C1294KCPDT) && !defined (PART_TM4C1294NCPDT) && \
+ !defined (PART_TM4C1294NCZAD) && !defined (PART_TM4C1297NCZAD) && \
+ !defined (PART_TM4C1299KCZAD) && !defined (PART_TM4C1299NCZAD) && \
+ !defined (PART_TM4C129CNCPDT) && !defined (PART_TM4C129CNCZAD) && \
+ !defined (PART_TM4C129DNCPDT) && !defined (PART_TM4C129DNCZAD) && \
+ !defined (PART_TM4C129EKCPDT) && !defined (PART_TM4C129ENCPDT) && \
+ !defined (PART_TM4C129ENCZAD) && !defined (PART_TM4C129LNCZAD) && \
+ !defined (PART_TM4C129XKCZAD) && !defined (PART_TM4C129XNCZAD)
#include "board.h"
#endif
-/* Including the device CMSIS header. Note, we are not using the definitions
- from this header because we need this file to be usable also from
- assembler source files. We verify that the info matches instead.*/
-#include "tm4c129x.h"
+typedef int IRQn_Type;
-#if !CORTEX_HAS_MPU != !__MPU_PRESENT
-#error "CMSIS __MPU_PRESENT mismatch"
-#endif
+#include "core_cm4.h"
-#if !CORTEX_HAS_FPU != !__FPU_PRESENT
-#error "CMSIS __FPU_PRESENT mismatch"
-#endif
+/* Including the TivaWare peripheral headers.*/
+#include "inc/hw_ints.h"
+#include "inc/hw_memmap.h"
+#include "inc/hw_types.h"
+#include "inc/hw_timer.h"
+#include "inc/hw_sysctl.h"
+#include "inc/hw_gpio.h"
+#include "inc/hw_uart.h"
-#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
-#error "CMSIS __NVIC_PRIO_BITS mismatch"
+#if CORTEX_NUM_VECTORS != ((((NUM_INTERRUPTS - 16) + 7) / 8) * 8)
+#error "TivaWare NUM_INTERRUPTS mismatch"
#endif
#endif /* !defined(_FROM_ASM_) */
#endif /* CMPARAMS_H */
-/**
- * @}
- */
+/** @} */
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-30 14:35:36 +0000