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-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld50
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR3.ld41
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR4.ld41
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256.ld50
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256BLDR8.ld91
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/MKL26Z64.ld50
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/MKL27Z256.ld50
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/MKL2xZ128.ld52
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/NRF51822.ld84
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis.ld372
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis_bldr.ld367
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk2
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk2
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk10
-rw-r--r--os/common/startup/ARMCMx/devices/NRF51822/cmparams.h82
-rw-r--r--os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld390
-rw-r--r--os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk10
-rw-r--r--os/common/startup/MSP430X/compilers/GCC/rules.mk269
18 files changed, 1245 insertions, 768 deletions
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld
index 57678ef..1725c78 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld
@@ -27,8 +27,13 @@
MEMORY
{
flash0 : org = 0x00000000, len = 0x100
- flashcfg : org = 0x00000400, len = 0x10
- flash : org = 0x00000410, len = 128k - 0x410
+ flash1 : org = 0x00000400, len = 0x10
+ flash2 : org = 0x00000410, len = 128k - 0x410
+ flash3 : org = 0x00000000, len = 0
+ flash4 : org = 0x00000000, len = 0
+ flash5 : org = 0x00000000, len = 0
+ flash6 : org = 0x00000000, len = 0
+ flash7 : org = 0x00000000, len = 0
ram0 : org = 0x1FFFE000, len = 16k
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
@@ -39,8 +44,43 @@ MEMORY
ram7 : org = 0x00000000, len = 0
}
+/* Flash region for the configuration bytes.*/
+SECTIONS
+{
+ .cfmprotect : ALIGN(4) SUBALIGN(4)
+ {
+ KEEP(*(.cfmconfig))
+ } > flash1
+}
+
+/* For each data/text section two region are defined, a virtual region
+ and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash2);
+REGION_ALIAS("XTORS_FLASH_LMA", flash2);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash2);
+REGION_ALIAS("TEXT_FLASH_LMA", flash2);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash2);
+REGION_ALIAS("RODATA_FLASH_LMA", flash2);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash2);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
+
/* RAM region to be used for Main stack. This stack accommodates the processing
- of all exceptions and interrupts*/
+ of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
@@ -49,6 +89,7 @@ REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash2);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
@@ -56,4 +97,5 @@ REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
-INCLUDE rules_kinetis.ld
+/* Generic rules inclusion.*/
+INCLUDE rules.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR3.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR3.ld
index af47ac5..986de7c 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR3.ld
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR3.ld
@@ -26,7 +26,14 @@
*/
MEMORY
{
- flash : org = 0x00000c00, len = 128k - 0xc00
+ flash0 : org = 0x00000c00, len = 128k - 0xc00
+ flash1 : org = 0x00000000, len = 0
+ flash2 : org = 0x00000000, len = 0
+ flash3 : org = 0x00000000, len = 0
+ flash4 : org = 0x00000000, len = 0
+ flash5 : org = 0x00000000, len = 0
+ flash6 : org = 0x00000000, len = 0
+ flash7 : org = 0x00000000, len = 0
ram0 : org = 0x1FFFE000, len = 16k
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
@@ -37,8 +44,34 @@ MEMORY
ram7 : org = 0x00000000, len = 0
}
+/* For each data/text section two region are defined, a virtual region
+ and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash0);
+REGION_ALIAS("XTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash0);
+REGION_ALIAS("TEXT_FLASH_LMA", flash0);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash0);
+REGION_ALIAS("RODATA_FLASH_LMA", flash0);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash0);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
+
/* RAM region to be used for Main stack. This stack accommodates the processing
- of all exceptions and interrupts*/
+ of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
@@ -47,6 +80,7 @@ REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash0);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
@@ -54,4 +88,5 @@ REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
-INCLUDE rules_kinetis_bldr.ld
+/* Generic rules inclusion.*/
+INCLUDE rules.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR4.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR4.ld
index 28c1033..f00dc37 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR4.ld
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR4.ld
@@ -26,7 +26,14 @@
*/
MEMORY
{
- flash : org = 0x00001000, len = 128k - 0x1000
+ flash0 : org = 0x00001000, len = 128k - 0x1000
+ flash1 : org = 0x00000000, len = 0
+ flash2 : org = 0x00000000, len = 0
+ flash3 : org = 0x00000000, len = 0
+ flash4 : org = 0x00000000, len = 0
+ flash5 : org = 0x00000000, len = 0
+ flash6 : org = 0x00000000, len = 0
+ flash7 : org = 0x00000000, len = 0
ram0 : org = 0x1FFFE000, len = 16k
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
@@ -37,8 +44,34 @@ MEMORY
ram7 : org = 0x00000000, len = 0
}
+/* For each data/text section two region are defined, a virtual region
+ and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash0);
+REGION_ALIAS("XTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash0);
+REGION_ALIAS("TEXT_FLASH_LMA", flash0);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash0);
+REGION_ALIAS("RODATA_FLASH_LMA", flash0);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash0);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
+
/* RAM region to be used for Main stack. This stack accommodates the processing
- of all exceptions and interrupts*/
+ of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
@@ -47,6 +80,7 @@ REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash0);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
@@ -54,4 +88,5 @@ REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
-INCLUDE rules_kinetis_bldr.ld
+/* Generic rules inclusion.*/
+INCLUDE rules.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256.ld
index 35a63f6..66bc6b8 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256.ld
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256.ld
@@ -27,8 +27,13 @@
MEMORY
{
flash0 : org = 0x00000000, len = 0x400
- flashcfg : org = 0x00000400, len = 0x10
- flash : org = 0x00000410, len = 256k - 0x410
+ flash1 : org = 0x00000400, len = 0x10
+ flash2 : org = 0x00000410, len = 256k - 0x410
+ flash3 : org = 0x00000000, len = 0
+ flash4 : org = 0x00000000, len = 0
+ flash5 : org = 0x00000000, len = 0
+ flash6 : org = 0x00000000, len = 0
+ flash7 : org = 0x00000000, len = 0
ram0 : org = 0x1FFF8000, len = 64k
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
@@ -39,8 +44,43 @@ MEMORY
ram7 : org = 0x00000000, len = 0
}
+/* Flash region for the configuration bytes.*/
+SECTIONS
+{
+ .cfmprotect : ALIGN(4) SUBALIGN(4)
+ {
+ KEEP(*(.cfmconfig))
+ } > flash1
+}
+
+/* For each data/text section two region are defined, a virtual region
+ and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash2);
+REGION_ALIAS("XTORS_FLASH_LMA", flash2);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash2);
+REGION_ALIAS("TEXT_FLASH_LMA", flash2);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash2);
+REGION_ALIAS("RODATA_FLASH_LMA", flash2);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash2);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
+
/* RAM region to be used for Main stack. This stack accommodates the processing
- of all exceptions and interrupts*/
+ of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
@@ -49,6 +89,7 @@ REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash2);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
@@ -56,4 +97,5 @@ REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
-INCLUDE rules_kinetis.ld
+/* Generic rules inclusion.*/
+INCLUDE rules.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256BLDR8.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256BLDR8.ld
new file mode 100644
index 0000000..20c3000
--- /dev/null
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256BLDR8.ld
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+ * MK20DX256 memory setup (8k bootloader section).
+ */
+MEMORY
+{
+ flash0 : org = 0x00002000, len = 256k - 0x2000
+ flash1 : org = 0x00000000, len = 0
+ flash2 : org = 0x00000000, len = 0
+ flash3 : org = 0x00000000, len = 0
+ flash4 : org = 0x00000000, len = 0
+ flash5 : org = 0x00000000, len = 0
+ flash6 : org = 0x00000000, len = 0
+ flash7 : org = 0x00000000, len = 0
+ ram0 : org = 0x1FFF8000, len = 64k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
+}
+
+/* For each data/text section two region are defined, a virtual region
+ and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash0);
+REGION_ALIAS("XTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash0);
+REGION_ALIAS("TEXT_FLASH_LMA", flash0);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash0);
+REGION_ALIAS("RODATA_FLASH_LMA", flash0);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash0);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts.*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+/* Generic rules inclusion.*/
+INCLUDE rules.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MKL26Z64.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL26Z64.ld
index d079e2d..6527edc 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/MKL26Z64.ld
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL26Z64.ld
@@ -27,8 +27,13 @@
MEMORY
{
flash0 : org = 0x00000000, len = 0x100
- flashcfg : org = 0x00000400, len = 0x10
- flash : org = 0x00000410, len = 64k - 0x410
+ flash1 : org = 0x00000400, len = 0x10
+ flash2 : org = 0x00000410, len = 64k - 0x410
+ flash3 : org = 0x00000000, len = 0
+ flash4 : org = 0x00000000, len = 0
+ flash5 : org = 0x00000000, len = 0
+ flash6 : org = 0x00000000, len = 0
+ flash7 : org = 0x00000000, len = 0
ram0 : org = 0x1FFFF800, len = 8k
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
@@ -39,8 +44,43 @@ MEMORY
ram7 : org = 0x00000000, len = 0
}
+/* Flash region for the configuration bytes.*/
+SECTIONS
+{
+ .cfmprotect : ALIGN(4) SUBALIGN(4)
+ {
+ KEEP(*(.cfmconfig))
+ } > flash1
+}
+
+/* For each data/text section two region are defined, a virtual region
+ and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash2);
+REGION_ALIAS("XTORS_FLASH_LMA", flash2);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash2);
+REGION_ALIAS("TEXT_FLASH_LMA", flash2);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash2);
+REGION_ALIAS("RODATA_FLASH_LMA", flash2);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash2);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
+
/* RAM region to be used for Main stack. This stack accommodates the processing
- of all exceptions and interrupts*/
+ of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
@@ -49,6 +89,7 @@ REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash2);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
@@ -56,4 +97,5 @@ REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
-INCLUDE rules_kinetis.ld
+/* Generic rules inclusion.*/
+INCLUDE rules.ld \ No newline at end of file
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MKL27Z256.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL27Z256.ld
index fc405a8..f0f107a 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/MKL27Z256.ld
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL27Z256.ld
@@ -27,8 +27,13 @@
MEMORY
{
flash0 : org = 0x00000000, len = 0x100
- flashcfg : org = 0x00000400, len = 0x10
- flash : org = 0x00000410, len = 256k - 0x410
+ flash1 : org = 0x00000400, len = 0x10
+ flash2 : org = 0x00000410, len = 256k - 0x410
+ flash3 : org = 0x00000000, len = 0
+ flash4 : org = 0x00000000, len = 0
+ flash5 : org = 0x00000000, len = 0
+ flash6 : org = 0x00000000, len = 0
+ flash7 : org = 0x00000000, len = 0
ram0 : org = 0x1FFFE000, len = 32k
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
@@ -39,8 +44,43 @@ MEMORY
ram7 : org = 0x00000000, len = 0
}
+/* Flash region for the configuration bytes.*/
+SECTIONS
+{
+ .cfmprotect : ALIGN(4) SUBALIGN(4)
+ {
+ KEEP(*(.cfmconfig))
+ } > flash1
+}
+
+/* For each data/text section two region are defined, a virtual region
+ and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash2);
+REGION_ALIAS("XTORS_FLASH_LMA", flash2);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash2);
+REGION_ALIAS("TEXT_FLASH_LMA", flash2);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash2);
+REGION_ALIAS("RODATA_FLASH_LMA", flash2);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash2);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
+
/* RAM region to be used for Main stack. This stack accommodates the processing
- of all exceptions and interrupts*/
+ of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
@@ -49,6 +89,7 @@ REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash2);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
@@ -56,4 +97,5 @@ REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
-INCLUDE rules_kinetis.ld
+/* Generic rules inclusion.*/
+INCLUDE rules.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MKL2xZ128.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL2xZ128.ld
index 2e04ab3..e2a5e4a 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/MKL2xZ128.ld
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL2xZ128.ld
@@ -22,13 +22,18 @@
*/
/*
- * KL26Z128 memory setup.
+ * KL2xZ128 memory setup.
*/
MEMORY
{
flash0 : org = 0x00000000, len = 0x100
- flashcfg : org = 0x00000400, len = 0x10
- flash : org = 0x00000410, len = 128k - 0x410
+ flash1 : org = 0x00000400, len = 0x10
+ flash2 : org = 0x00000410, len = 128k - 0x410
+ flash3 : org = 0x00000000, len = 0
+ flash4 : org = 0x00000000, len = 0
+ flash5 : org = 0x00000000, len = 0
+ flash6 : org = 0x00000000, len = 0
+ flash7 : org = 0x00000000, len = 0
ram0 : org = 0x1FFFF000, len = 16k
ram1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0
@@ -39,8 +44,43 @@ MEMORY
ram7 : org = 0x00000000, len = 0
}
+/* Flash region for the configuration bytes.*/
+SECTIONS
+{
+ .cfmprotect : ALIGN(4) SUBALIGN(4)
+ {
+ KEEP(*(.cfmconfig))
+ } > flash1
+}
+
+/* For each data/text section two region are defined, a virtual region
+ and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash2);
+REGION_ALIAS("XTORS_FLASH_LMA", flash2);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash2);
+REGION_ALIAS("TEXT_FLASH_LMA", flash2);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash2);
+REGION_ALIAS("RODATA_FLASH_LMA", flash2);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash2);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
+
/* RAM region to be used for Main stack. This stack accommodates the processing
- of all exceptions and interrupts*/
+ of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
@@ -49,6 +89,7 @@ REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash2);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
@@ -56,4 +97,5 @@ REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
-INCLUDE rules_kinetis.ld
+/* Generic rules inclusion.*/
+INCLUDE rules.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/NRF51822.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/NRF51822.ld
new file mode 100644
index 0000000..d4db7d4
--- /dev/null
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/NRF51822.ld
@@ -0,0 +1,84 @@
+/*
+ Copyright (C) 2015 Fabio Utzig
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * NRF51822 memory setup.
+ */
+MEMORY
+{
+ flash0 : org = 0x00000000, len = 256k
+ flash1 : org = 0x00000000, len = 0
+ flash2 : org = 0x00000000, len = 0
+ flash3 : org = 0x00000000, len = 0
+ flash4 : org = 0x00000000, len = 0
+ flash5 : org = 0x00000000, len = 0
+ flash6 : org = 0x00000000, len = 0
+ flash7 : org = 0x00000000, len = 0
+ ram0 : org = 0x20000000, len = 32k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
+}
+
+/* For each data/text section two region are defined, a virtual region
+ and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash0);
+REGION_ALIAS("XTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash0);
+REGION_ALIAS("TEXT_FLASH_LMA", flash0);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash0);
+REGION_ALIAS("RODATA_FLASH_LMA", flash0);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash0);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for HEAP segment.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+INCLUDE rules.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis.ld
deleted file mode 100644
index 1e95c5f..0000000
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis.ld
+++ /dev/null
@@ -1,372 +0,0 @@
-/*
- * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
- * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-__ram0_start__ = ORIGIN(ram0);
-__ram0_size__ = LENGTH(ram0);
-__ram0_end__ = __ram0_start__ + __ram0_size__;
-__ram1_start__ = ORIGIN(ram1);
-__ram1_size__ = LENGTH(ram1);
-__ram1_end__ = __ram1_start__ + __ram1_size__;
-__ram2_start__ = ORIGIN(ram2);
-__ram2_size__ = LENGTH(ram2);
-__ram2_end__ = __ram2_start__ + __ram2_size__;
-__ram3_start__ = ORIGIN(ram3);
-__ram3_size__ = LENGTH(ram3);
-__ram3_end__ = __ram3_start__ + __ram3_size__;
-__ram4_start__ = ORIGIN(ram4);
-__ram4_size__ = LENGTH(ram4);
-__ram4_end__ = __ram4_start__ + __ram4_size__;
-__ram5_start__ = ORIGIN(ram5);
-__ram5_size__ = LENGTH(ram5);
-__ram5_end__ = __ram5_start__ + __ram5_size__;
-__ram6_start__ = ORIGIN(ram6);
-__ram6_size__ = LENGTH(ram6);
-__ram6_end__ = __ram6_start__ + __ram6_size__;
-__ram7_start__ = ORIGIN(ram7);
-__ram7_size__ = LENGTH(ram7);
-__ram7_end__ = __ram7_start__ + __ram7_size__;
-
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
- . = 0;
-
- .isr : ALIGN(4) SUBALIGN(4)
- {
- KEEP(*(.vectors))
- } > flash0
-
- .cfmprotect : ALIGN(4) SUBALIGN(4)
- {
- KEEP(*(.cfmconfig))
- } > flashcfg
-
- _text = .;
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- __init_array_start = .;
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- __init_array_end = .;
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- __fini_array_start = .;
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- __fini_array_end = .;
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- __exidx_start = .;
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- __exidx_end = .;
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- /* Legacy symbol, not used anywhere.*/
- . = ALIGN(4);
- PROVIDE(_etext = .);
-
- /* Special section for exceptions stack.*/
- .mstack :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- } > MAIN_STACK_RAM
-
- /* Special section for process stack.*/
- .pstack :
- {
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > PROCESS_STACK_RAM
-
- .data : ALIGN(4)
- {
- . = ALIGN(4);
- PROVIDE(_textdata = LOADADDR(.data));
- PROVIDE(_data = .);
- _textdata_start = LOADADDR(.data);
- _data_start = .;
- *(.data)
- *(.data.*)
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- _data_end = .;
- } > DATA_RAM AT > flash
-
- .bss (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- _bss_start = .;
- *(.bss)
- *(.bss.*)
- *(COMMON)
- . = ALIGN(4);
- _bss_end = .;
- PROVIDE(end = .);
- } > BSS_RAM
-
- .ram0_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram0_init_text__ = LOADADDR(.ram0_init);
- __ram0_init__ = .;
- *(.ram0_init)
- *(.ram0_init.*)
- . = ALIGN(4);
- } > ram0 AT > flash
-
- .ram0 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram0_clear__ = .;
- *(.ram0_clear)
- *(.ram0_clear.*)
- . = ALIGN(4);
- __ram0_noinit__ = .;
- *(.ram0)
- *(.ram0.*)
- . = ALIGN(4);
- __ram0_free__ = .;
- } > ram0
-
- .ram1_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram1_init_text__ = LOADADDR(.ram1_init);
- __ram1_init__ = .;
- *(.ram1_init)
- *(.ram1_init.*)
- . = ALIGN(4);
- } > ram1 AT > flash
-
- .ram1 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram1_clear__ = .;
- *(.ram1_clear)
- *(.ram1_clear.*)
- . = ALIGN(4);
- __ram1_noinit__ = .;
- *(.ram1)
- *(.ram1.*)
- . = ALIGN(4);
- __ram1_free__ = .;
- } > ram1
-
- .ram2_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram2_init_text__ = LOADADDR(.ram2_init);
- __ram2_init__ = .;
- *(.ram2_init)
- *(.ram2_init.*)
- . = ALIGN(4);
- } > ram2 AT > flash
-
- .ram2 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram2_clear__ = .;
- *(.ram2_clear)
- *(.ram2_clear.*)
- . = ALIGN(4);
- __ram2_noinit__ = .;
- *(.ram2)
- *(.ram2.*)
- . = ALIGN(4);
- __ram2_free__ = .;
- } > ram2
-
- .ram3_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram3_init_text__ = LOADADDR(.ram3_init);
- __ram3_init__ = .;
- *(.ram3_init)
- *(.ram3_init.*)
- . = ALIGN(4);
- } > ram3 AT > flash
-
- .ram3 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram3_clear__ = .;
- *(.ram3_clear)
- *(.ram3_clear.*)
- . = ALIGN(4);
- __ram3_noinit__ = .;
- *(.ram3)
- *(.ram3.*)
- . = ALIGN(4);
- __ram3_free__ = .;
- } > ram3
-
- .ram4_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram4_init_text__ = LOADADDR(.ram4_init);
- __ram4_init__ = .;
- *(.ram4_init)
- *(.ram4_init.*)
- . = ALIGN(4);
- } > ram4 AT > flash
-
- .ram4 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram4_clear__ = .;
- *(.ram4_clear)
- *(.ram4_clear.*)
- . = ALIGN(4);
- __ram4_noinit__ = .;
- *(.ram4)
- *(.ram4.*)
- . = ALIGN(4);
- __ram4_free__ = .;
- } > ram4
-
- .ram5_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram5_init_text__ = LOADADDR(.ram5_init);
- __ram5_init__ = .;
- *(.ram5_init)
- *(.ram5_init.*)
- . = ALIGN(4);
- } > ram5 AT > flash
-
- .ram5 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram5_clear__ = .;
- *(.ram5_clear)
- *(.ram5_clear.*)
- . = ALIGN(4);
- __ram5_noinit__ = .;
- *(.ram5)
- *(.ram5.*)
- . = ALIGN(4);
- __ram5_free__ = .;
- } > ram5
-
- .ram6_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram6_init_text__ = LOADADDR(.ram6_init);
- __ram6_init__ = .;
- *(.ram6_init)
- *(.ram6_init.*)
- . = ALIGN(4);
- } > ram6 AT > flash
-
- .ram6 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram6_clear__ = .;
- *(.ram6_clear)
- *(.ram6_clear.*)
- . = ALIGN(4);
- __ram6_noinit__ = .;
- *(.ram6)
- *(.ram6.*)
- . = ALIGN(4);
- __ram6_free__ = .;
- } > ram6
-
- .ram7_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram7_init_text__ = LOADADDR(.ram7_init);
- __ram7_init__ = .;
- *(.ram7_init)
- *(.ram7_init.*)
- . = ALIGN(4);
- } > ram7 AT > flash
-
- .ram7 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram7_clear__ = .;
- *(.ram7_clear)
- *(.ram7_clear.*)
- . = ALIGN(4);
- __ram7_noinit__ = .;
- *(.ram7)
- *(.ram7.*)
- . = ALIGN(4);
- __ram7_free__ = .;
- } > ram7
-
- /* The default heap uses the (statically) unused part of a RAM section.*/
- .heap (NOLOAD) :
- {
- . = ALIGN(8);
- __heap_base__ = .;
- . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM);
- __heap_end__ = .;
- } > HEAP_RAM
-}
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis_bldr.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis_bldr.ld
deleted file mode 100644
index 4ae8dc1..0000000
--- a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis_bldr.ld
+++ /dev/null
@@ -1,367 +0,0 @@
-/*
- * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
- * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-__ram0_start__ = ORIGIN(ram0);
-__ram0_size__ = LENGTH(ram0);
-__ram0_end__ = __ram0_start__ + __ram0_size__;
-__ram1_start__ = ORIGIN(ram1);
-__ram1_size__ = LENGTH(ram1);
-__ram1_end__ = __ram1_start__ + __ram1_size__;
-__ram2_start__ = ORIGIN(ram2);
-__ram2_size__ = LENGTH(ram2);
-__ram2_end__ = __ram2_start__ + __ram2_size__;
-__ram3_start__ = ORIGIN(ram3);
-__ram3_size__ = LENGTH(ram3);
-__ram3_end__ = __ram3_start__ + __ram3_size__;
-__ram4_start__ = ORIGIN(ram4);
-__ram4_size__ = LENGTH(ram4);
-__ram4_end__ = __ram4_start__ + __ram4_size__;
-__ram5_start__ = ORIGIN(ram5);
-__ram5_size__ = LENGTH(ram5);
-__ram5_end__ = __ram5_start__ + __ram5_size__;
-__ram6_start__ = ORIGIN(ram6);
-__ram6_size__ = LENGTH(ram6);
-__ram6_end__ = __ram6_start__ + __ram6_size__;
-__ram7_start__ = ORIGIN(ram7);
-__ram7_size__ = LENGTH(ram7);
-__ram7_end__ = __ram7_start__ + __ram7_size__;
-
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
- . = 0;
-
- .isr : ALIGN(4) SUBALIGN(4)
- {
- KEEP(*(.vectors))
- } > flash
-
- _text = .;
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- __init_array_start = .;
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- __init_array_end = .;
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- __fini_array_start = .;
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- __fini_array_end = .;
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- __exidx_start = .;
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- __exidx_end = .;
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- /* Legacy symbol, not used anywhere.*/
- . = ALIGN(4);
- PROVIDE(_etext = .);
-
- /* Special section for exceptions stack.*/
- .mstack :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- } > MAIN_STACK_RAM
-
- /* Special section for process stack.*/
- .pstack :
- {
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > PROCESS_STACK_RAM
-
- .data : ALIGN(4)
- {
- . = ALIGN(4);
- PROVIDE(_textdata = LOADADDR(.data));
- PROVIDE(_data = .);
- _textdata_start = LOADADDR(.data);
- _data_start = .;
- *(.data)
- *(.data.*)
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- _data_end = .;
- } > DATA_RAM AT > flash
-
- .bss (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- _bss_start = .;
- *(.bss)
- *(.bss.*)
- *(COMMON)
- . = ALIGN(4);
- _bss_end = .;
- PROVIDE(end = .);
- } > BSS_RAM
-
- .ram0_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram0_init_text__ = LOADADDR(.ram0_init);
- __ram0_init__ = .;
- *(.ram0_init)
- *(.ram0_init.*)
- . = ALIGN(4);
- } > ram0 AT > flash
-
- .ram0 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram0_clear__ = .;
- *(.ram0_clear)
- *(.ram0_clear.*)
- . = ALIGN(4);
- __ram0_noinit__ = .;
- *(.ram0)
- *(.ram0.*)
- . = ALIGN(4);
- __ram0_free__ = .;
- } > ram0
-
- .ram1_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram1_init_text__ = LOADADDR(.ram1_init);
- __ram1_init__ = .;
- *(.ram1_init)
- *(.ram1_init.*)
- . = ALIGN(4);
- } > ram1 AT > flash
-
- .ram1 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram1_clear__ = .;
- *(.ram1_clear)
- *(.ram1_clear.*)
- . = ALIGN(4);
- __ram1_noinit__ = .;
- *(.ram1)
- *(.ram1.*)
- . = ALIGN(4);
- __ram1_free__ = .;
- } > ram1
-
- .ram2_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram2_init_text__ = LOADADDR(.ram2_init);
- __ram2_init__ = .;
- *(.ram2_init)
- *(.ram2_init.*)
- . = ALIGN(4);
- } > ram2 AT > flash
-
- .ram2 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram2_clear__ = .;
- *(.ram2_clear)
- *(.ram2_clear.*)
- . = ALIGN(4);
- __ram2_noinit__ = .;
- *(.ram2)
- *(.ram2.*)
- . = ALIGN(4);
- __ram2_free__ = .;
- } > ram2
-
- .ram3_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram3_init_text__ = LOADADDR(.ram3_init);
- __ram3_init__ = .;
- *(.ram3_init)
- *(.ram3_init.*)
- . = ALIGN(4);
- } > ram3 AT > flash
-
- .ram3 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram3_clear__ = .;
- *(.ram3_clear)
- *(.ram3_clear.*)
- . = ALIGN(4);
- __ram3_noinit__ = .;
- *(.ram3)
- *(.ram3.*)
- . = ALIGN(4);
- __ram3_free__ = .;
- } > ram3
-
- .ram4_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram4_init_text__ = LOADADDR(.ram4_init);
- __ram4_init__ = .;
- *(.ram4_init)
- *(.ram4_init.*)
- . = ALIGN(4);
- } > ram4 AT > flash
-
- .ram4 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram4_clear__ = .;
- *(.ram4_clear)
- *(.ram4_clear.*)
- . = ALIGN(4);
- __ram4_noinit__ = .;
- *(.ram4)
- *(.ram4.*)
- . = ALIGN(4);
- __ram4_free__ = .;
- } > ram4
-
- .ram5_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram5_init_text__ = LOADADDR(.ram5_init);
- __ram5_init__ = .;
- *(.ram5_init)
- *(.ram5_init.*)
- . = ALIGN(4);
- } > ram5 AT > flash
-
- .ram5 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram5_clear__ = .;
- *(.ram5_clear)
- *(.ram5_clear.*)
- . = ALIGN(4);
- __ram5_noinit__ = .;
- *(.ram5)
- *(.ram5.*)
- . = ALIGN(4);
- __ram5_free__ = .;
- } > ram5
-
- .ram6_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram6_init_text__ = LOADADDR(.ram6_init);
- __ram6_init__ = .;
- *(.ram6_init)
- *(.ram6_init.*)
- . = ALIGN(4);
- } > ram6 AT > flash
-
- .ram6 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram6_clear__ = .;
- *(.ram6_clear)
- *(.ram6_clear.*)
- . = ALIGN(4);
- __ram6_noinit__ = .;
- *(.ram6)
- *(.ram6.*)
- . = ALIGN(4);
- __ram6_free__ = .;
- } > ram6
-
- .ram7_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram7_init_text__ = LOADADDR(.ram7_init);
- __ram7_init__ = .;
- *(.ram7_init)
- *(.ram7_init.*)
- . = ALIGN(4);
- } > ram7 AT > flash
-
- .ram7 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram7_clear__ = .;
- *(.ram7_clear)
- *(.ram7_clear.*)
- . = ALIGN(4);
- __ram7_noinit__ = .;
- *(.ram7)
- *(.ram7.*)
- . = ALIGN(4);
- __ram7_free__ = .;
- } > ram7
-
- /* The default heap uses the (statically) unused part of a RAM section.*/
- .heap (NOLOAD) :
- {
- . = ALIGN(8);
- __heap_base__ = .;
- . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM);
- __heap_end__ = .;
- } > HEAP_RAM
-}
diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk
index 410e607..0c2ec7d 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk
+++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk
@@ -2,7 +2,7 @@
STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \
$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c
-STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s
+STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S
STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \
$(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/K20x \
diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk
index ada23f6..ca67f10 100644
--- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk
+++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk
@@ -2,7 +2,7 @@
STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \
$(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c
-STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s
+STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S
STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \
$(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/KL2x \
diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk
new file mode 100644
index 0000000..f005ce0
--- /dev/null
+++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk
@@ -0,0 +1,10 @@
+# List of the ChibiOS generic NRF51 startup and CMSIS files.
+STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \
+ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c
+
+STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S
+
+STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/NRF51822 \
+ $(CHIBIOS)/os/common/ext/CMSIS/include
+
+STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld
diff --git a/os/common/startup/ARMCMx/devices/NRF51822/cmparams.h b/os/common/startup/ARMCMx/devices/NRF51822/cmparams.h
new file mode 100644
index 0000000..126acf6
--- /dev/null
+++ b/os/common/startup/ARMCMx/devices/NRF51822/cmparams.h
@@ -0,0 +1,82 @@
+/*
+ Copyright (C) 2015 Fabio Utzig
+
+ This file is part of ChibiOS.
+
+ ChibiOS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file NRF51822/cmparams.h
+ * @brief ARM Cortex-M0 parameters for the Nordic Semi NRF51822 family.
+ *
+ * @defgroup ARMCMx_NRF51x Nordic semiconductor NRF51x.
+ * @ingroup ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M0 specific parameters for the
+ * NRF51x platform.
+ * @{
+ */
+
+#ifndef _CMPARAMS_H_
+#define _CMPARAMS_H_
+
+/**
+ * @brief Cortex core model.
+ */
+#define CORTEX_MODEL 0
+
+/**
+ * @brief Memory Protection unit presence.
+ */
+#define CORTEX_HAS_MPU 1
+
+/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU 0
+
+/**
+ * @brief Number of bits in priority masks.
+ */
+#define CORTEX_PRIORITY_BITS 2
+
+/**
+ * @brief Number of interrupt vectors.
+ * @note This number does not include the 16 system vectors and must be
+ * rounded to a multiple of 8.
+ */
+#define CORTEX_NUM_VECTORS 32
+
+/* The following code is not processed when the file is included from an
+ asm module.*/
+#if !defined(_FROM_ASM_)
+
+/* Including the device CMSIS header. Note, we are not using the definitions
+ from this header because we need this file to be usable also from
+ assembler source files. We verify that the info matches instead.*/
+#include "nrf51.h"
+
+#if CORTEX_MODEL != __CORTEX_M
+#error "CMSIS __CORTEX_M mismatch"
+#endif
+
+#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
+#error "CMSIS __NVIC_PRIO_BITS mismatch"
+#endif
+
+#endif /* !defined(_FROM_ASM_) */
+
+#endif /* _CMPARAMS_H_ */
+
+/** @} */
diff --git a/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld b/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld
new file mode 100644
index 0000000..b618455
--- /dev/null
+++ b/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld
@@ -0,0 +1,390 @@
+/* This file supports MSP430FR5969 devices. */
+/* Version: 1.0 */
+/* ChibiOS linker script, for normal executables */
+
+OUTPUT_ARCH(msp430)
+ENTRY(_start)
+
+MEMORY {
+ SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */
+ PERIPHERAL_8BIT : ORIGIN = 0x0010, LENGTH = 0x00F0 /* END=0x0100, size 240 */
+ PERIPHERAL_16BIT : ORIGIN = 0x0100, LENGTH = 0x0100 /* END=0x0200, size 256 */
+ RAM : ORIGIN = 0x1C00, LENGTH = 0x0800 /* END=0x23FF, size 2048 */
+ INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 as 4 128-byte segments */
+ INFOA : ORIGIN = 0x1980, LENGTH = 0x0080 /* END=0x19FF, size 128 */
+ INFOB : ORIGIN = 0x1900, LENGTH = 0x0080 /* END=0x197F, size 128 */
+ INFOC : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x18FF, size 128 */
+ INFOD : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x187F, size 128 */
+ FRAM (rxw) : ORIGIN = 0x4400, LENGTH = 0xBB80 /* END=0xFF7F, size 48000 */
+ VECT1 : ORIGIN = 0xFF90, LENGTH = 0x0002
+ VECT2 : ORIGIN = 0xFF92, LENGTH = 0x0002
+ VECT3 : ORIGIN = 0xFF94, LENGTH = 0x0002
+ VECT4 : ORIGIN = 0xFF96, LENGTH = 0x0002
+ VECT5 : ORIGIN = 0xFF98, LENGTH = 0x0002
+ VECT6 : ORIGIN = 0xFF9A, LENGTH = 0x0002
+ VECT7 : ORIGIN = 0xFF9C, LENGTH = 0x0002
+ VECT8 : ORIGIN = 0xFF9E, LENGTH = 0x0002
+ VECT9 : ORIGIN = 0xFFA0, LENGTH = 0x0002
+ VECT10 : ORIGIN = 0xFFA2, LENGTH = 0x0002
+ VECT11 : ORIGIN = 0xFFA4, LENGTH = 0x0002
+ VECT12 : ORIGIN = 0xFFA6, LENGTH = 0x0002
+ VECT13 : ORIGIN = 0xFFA8, LENGTH = 0x0002
+ VECT14 : ORIGIN = 0xFFAA, LENGTH = 0x0002
+ VECT15 : ORIGIN = 0xFFAC, LENGTH = 0x0002
+ VECT16 : ORIGIN = 0xFFAE, LENGTH = 0x0002
+ VECT17 : ORIGIN = 0xFFB0, LENGTH = 0x0002
+ VECT18 : ORIGIN = 0xFFB2, LENGTH = 0x0002
+ VECT19 : ORIGIN = 0xFFB4, LENGTH = 0x0002
+ VECT20 : ORIGIN = 0xFFB6, LENGTH = 0x0002
+ VECT21 : ORIGIN = 0xFFB8, LENGTH = 0x0002
+ VECT22 : ORIGIN = 0xFFBA, LENGTH = 0x0002
+ VECT23 : ORIGIN = 0xFFBC, LENGTH = 0x0002
+ VECT24 : ORIGIN = 0xFFBE, LENGTH = 0x0002
+ VECT25 : ORIGIN = 0xFFC0, LENGTH = 0x0002
+ VECT26 : ORIGIN = 0xFFC2, LENGTH = 0x0002
+ VECT27 : ORIGIN = 0xFFC4, LENGTH = 0x0002
+ VECT28 : ORIGIN = 0xFFC6, LENGTH = 0x0002
+ VECT29 : ORIGIN = 0xFFC8, LENGTH = 0x0002
+ VECT30 : ORIGIN = 0xFFCA, LENGTH = 0x0002
+ VECT31 : ORIGIN = 0xFFCC, LENGTH = 0x0002
+ VECT32 : ORIGIN = 0xFFCE, LENGTH = 0x0002
+ VECT33 : ORIGIN = 0xFFD0, LENGTH = 0x0002
+ VECT34 : ORIGIN = 0xFFD2, LENGTH = 0x0002
+ VECT35 : ORIGIN = 0xFFD4, LENGTH = 0x0002
+ VECT36 : ORIGIN = 0xFFD6, LENGTH = 0x0002
+ VECT37 : ORIGIN = 0xFFD8, LENGTH = 0x0002
+ VECT38 : ORIGIN = 0xFFDA, LENGTH = 0x0002
+ VECT39 : ORIGIN = 0xFFDC, LENGTH = 0x0002
+ VECT40 : ORIGIN = 0xFFDE, LENGTH = 0x0002
+ VECT41 : ORIGIN = 0xFFE0, LENGTH = 0x0002
+ VECT42 : ORIGIN = 0xFFE2, LENGTH = 0x0002
+ VECT43 : ORIGIN = 0xFFE4, LENGTH = 0x0002
+ VECT44 : ORIGIN = 0xFFE6, LENGTH = 0x0002
+ VECT45 : ORIGIN = 0xFFE8, LENGTH = 0x0002
+ VECT46 : ORIGIN = 0xFFEA, LENGTH = 0x0002
+ VECT47 : ORIGIN = 0xFFEC, LENGTH = 0x0002
+ VECT48 : ORIGIN = 0xFFEE, LENGTH = 0x0002
+ VECT49 : ORIGIN = 0xFFF0, LENGTH = 0x0002
+ VECT50 : ORIGIN = 0xFFF2, LENGTH = 0x0002
+ VECT51 : ORIGIN = 0xFFF4, LENGTH = 0x0002
+ VECT52 : ORIGIN = 0xFFF6, LENGTH = 0x0002
+ VECT53 : ORIGIN = 0xFFF8, LENGTH = 0x0002
+ VECT54 : ORIGIN = 0xFFFA, LENGTH = 0x0002
+ VECT55 : ORIGIN = 0xFFFC, LENGTH = 0x0002
+ RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
+ BSL : ORIGIN = 0x1000, LENGTH = 0x0800
+ HIFRAM (rxw) : ORIGIN = 0x00010000, LENGTH = 0x00003FFF
+}
+
+PHDRS {
+ vectors PT_LOAD ;
+ stack PT_LOAD ;
+ rodata PT_LOAD ;
+ data PT_LOAD ;
+ text PT_LOAD ;
+ upper_rodata PT_LOAD ;
+ upper_data PT_LOAD ;
+ upper_text PT_LOAD ;
+}
+
+SECTIONS
+{
+ __interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1 :vectors =0x3C00
+ __interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2 =0x3C00
+ __interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3 =0x3C00
+ __interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4 =0x3C00
+ __interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5 =0x3C00
+ __interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6 =0x3C00
+ __interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7 =0x3C00
+ __interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8 =0x3C00
+ __interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9 =0x3C00
+ __interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) } > VECT10 =0x3C00
+ __interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) } > VECT11 =0x3C00
+ __interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12 =0x3C00
+ __interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13 =0x3C00
+ __interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14 =0x3C00
+ __interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) } > VECT15 =0x3C00
+ __interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) } > VECT16 =0x3C00
+ __interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) } > VECT17 =0x3C00
+ __interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) } > VECT18 =0x3C00
+ __interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) } > VECT19 =0x3C00
+ __interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) } > VECT20 =0x3C00
+ __interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) } > VECT21 =0x3C00
+ __interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) } > VECT22 =0x3C00
+ __interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) } > VECT23 =0x3C00
+ __interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) } > VECT24 =0x3C00
+ __interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) } > VECT25 =0x3C00
+ __interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) } > VECT26 =0x3C00
+ __interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) } > VECT27 =0x3C00
+ __interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) } > VECT28 =0x3C00
+ __interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) } > VECT29 =0x3C00
+ __interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) } > VECT30 =0x3C00
+ __interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_aes256)) } > VECT31 =0x3C00
+ __interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) KEEP (*(__interrupt_vector_rtc)) } > VECT32 =0x3C00
+ __interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) KEEP (*(__interrupt_vector_port4)) } > VECT33 =0x3C00
+ __interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) KEEP (*(__interrupt_vector_port3)) } > VECT34 =0x3C00
+ __interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) KEEP (*(__interrupt_vector_timer3_a1)) } > VECT35 =0x3C00
+ __interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) KEEP (*(__interrupt_vector_timer3_a0)) } > VECT36 =0x3C00
+ __interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) KEEP (*(__interrupt_vector_port2)) } > VECT37 =0x3C00
+ __interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT38 =0x3C00
+ __interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT39 =0x3C00
+ __interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) KEEP (*(__interrupt_vector_port1)) } > VECT40 =0x3C00
+ __interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT41 =0x3C00
+ __interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT42 =0x3C00
+ __interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_dma)) } > VECT43 =0x3C00
+ __interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_usci_a1)) } > VECT44 =0x3C00
+ __interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT45 =0x3C00
+ __interrupt_vector_46 : { KEEP (*(__interrupt_vector_46)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT46 =0x3C00
+ __interrupt_vector_47 : { KEEP (*(__interrupt_vector_47)) KEEP (*(__interrupt_vector_adc12)) } > VECT47 =0x3C00
+ __interrupt_vector_48 : { KEEP (*(__interrupt_vector_48)) KEEP (*(__interrupt_vector_usci_b0)) } > VECT48 =0x3C00
+ __interrupt_vector_49 : { KEEP (*(__interrupt_vector_49)) KEEP (*(__interrupt_vector_usci_a0)) } > VECT49 =0x3C00
+ __interrupt_vector_50 : { KEEP (*(__interrupt_vector_50)) KEEP (*(__interrupt_vector_wdt)) } > VECT50 =0x3C00
+ __interrupt_vector_51 : { KEEP (*(__interrupt_vector_51)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT51 =0x3C00
+ __interrupt_vector_52 : { KEEP (*(__interrupt_vector_52)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT52 =0x3C00
+ __interrupt_vector_53 : { KEEP (*(__interrupt_vector_53)) KEEP (*(__interrupt_vector_comp_e)) } > VECT53 =0x3C00
+ __interrupt_vector_54 : { KEEP (*(__interrupt_vector_54)) KEEP (*(__interrupt_vector_unmi)) } > VECT54 =0x3C00
+ __interrupt_vector_55 : { KEEP (*(__interrupt_vector_55)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT55 =0x3C00
+ __reset_vector :
+ {
+ KEEP (*(__interrupt_vector_56))
+ KEEP (*(__interrupt_vector_reset))
+ KEEP (*(.resetvec))
+ } > RESETVEC
+
+ .stack :
+ {
+ __main_thread_stack_base__ = .;
+ *(.stack)
+ . += __idle_stack_size__;
+ PROVIDE (__stack = .);
+ . = ALIGN(2);
+ __main_thread_stack_end__ = .;
+ } > FRAM :stack
+
+ .rodata :
+ {
+ . = ALIGN(2);
+ *(.plt)
+ *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
+ *(.rodata1)
+ *(.lower.rodata.* .lower.rodata)
+
+ *(.eh_frame_hdr)
+ KEEP (*(.eh_frame))
+ KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
+ PROVIDE (__preinit_array_start = .);
+ KEEP (*(.preinit_array))
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array))
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ KEEP (*(.fini_array))
+ KEEP (*(SORT(.fini_array.*)))
+ PROVIDE (__fini_array_end = .);
+ LONG(0); /* Sentinel. */
+
+ /* gcc uses crtbegin.o to find the start of the constructors, so
+ we make sure it is first. Because this is a wildcard, it
+ doesn't matter if the user does not actually link against
+ crtbegin.o; the linker won't look for a file to match a
+ wildcard. The wildcard also means that it doesn't matter which
+ directory crtbegin.o is in. */
+ KEEP (*crtbegin*.o(.ctors))
+
+ /* We don't want to include the .ctor section from from the
+ crtend.o file until after the sorted ctors. The .ctor section
+ from the crtend file contains the end of ctors marker and it
+ must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } > FRAM :rodata
+
+ .data :
+ {
+ . = ALIGN(2);
+ PROVIDE (__datastart = .);
+
+ KEEP (*(.jcr))
+ *(.data.rel.ro.local) *(.data.rel.ro*)
+ *(.dynamic)
+
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ *(.data1)
+ *(.got.plt) *(.got)
+
+ /* We want the small data sections together, so single-instruction offsets
+ can access them all, and initialized data all before uninitialized, so
+ we can shorten the on-disk segment size. */
+ . = ALIGN(2);
+ *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
+
+ . = ALIGN(2);
+ *(.lower.data.* .lower.data)
+ . = ALIGN(2);
+
+ _edata = .;
+ PROVIDE (edata = .);
+ PROVIDE (__dataend = .);
+ } > FRAM :data
+
+ /* Note that crt0 assumes this is a multiple of two; all the
+ start/stop symbols are also assumed word-aligned. */
+ PROVIDE(__romdatastart = LOADADDR(.data));
+ PROVIDE (__romdatacopysize = SIZEOF(.data));
+
+ .bss :
+ {
+ . = ALIGN(2);
+ PROVIDE (__bssstart = .);
+ *(.dynbss)
+ *(.sbss .sbss.*)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(.lower.bss.* .lower.bss)
+ . = ALIGN(2);
+ *(COMMON)
+ PROVIDE (__bssend = .);
+ } > FRAM
+ PROVIDE (__bsssize = SIZEOF(.bss));
+
+ /* This section contains data that is not initialised at startup. */
+ .noinit (NOLOAD) :
+ {
+ . = ALIGN(2);
+ PROVIDE (__noinit_start = .);
+ *(.noinit)
+ . = ALIGN(2);
+ PROVIDE (__noinit_end = .);
+ } > FRAM /* Because I think this has to go right above .bss */
+
+ _end = .;
+ PROVIDE (end = .);
+
+ .text :
+ {
+ PROVIDE (_start = .);
+
+ . = ALIGN(2);
+ KEEP (*(SORT(.crt_*)))
+
+ . = ALIGN(2);
+ KEEP (*(.lowtext))
+
+ . = ALIGN(2);
+ *(.lower.text.* .lower.text)
+
+ . = ALIGN(2);
+ *(.text .stub .text.* .gnu.linkonce.t.* .text:*)
+
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.interp .hash .dynsym .dynstr .gnu.version*)
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ . = ALIGN(2);
+ KEEP (*(.init))
+ KEEP (*(.fini))
+ KEEP (*(.tm_clone_table))
+ } > FRAM :text
+
+ .upper.rodata :
+ {
+ *(.upper.rodata.* .upper.rodata)
+ } > HIFRAM :upper_rodata
+
+ .upper.data :
+ {
+ __upper_data_init = LOADADDR (.upper.data);
+ /* Status word. */
+ SHORT(1);
+ __high_datastart = .;
+ *(.upper.data.* .upper.data)
+ __high_dataend = .;
+ } > HIFRAM :upper_data
+
+ __rom_highdatacopysize = SIZEOF(.upper.data) - 2;
+ __rom_highdatastart = LOADADDR(.upper.data) + 2;
+
+ .upper.bss :
+ {
+ . = ALIGN(2);
+ __high_bssstart = .;
+ *(.upper.bss.* .upper.bss)
+ . = ALIGN(2);
+ __high_bssend = .;
+ } > HIFRAM
+
+ .upper.text :
+ {
+ . = ALIGN(2);
+ *(.upper.text.* .upper.text)
+ } > HIFRAM :upper_text
+
+ .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
+ .infoB : {} > INFOB
+ .infoC : {} > INFOC
+ .infoD : {} > INFOD
+
+ /* The rest are all not normally part of the runtime image. */
+
+ .MP430.attributes 0 :
+ {
+ KEEP (*(.MSP430.attributes))
+ KEEP (*(.gnu.attributes))
+ KEEP (*(__TI_build_attributes))
+ }
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1. */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions. */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2. */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2. */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions. */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ /* DWARF 3 */
+ .debug_pubtypes 0 : { *(.debug_pubtypes) }
+ .debug_ranges 0 : { *(.debug_ranges) }
+ /* DWARF Extension. */
+ .debug_macro 0 : { *(.debug_macro) }
+
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
+
+INCLUDE msp430fr5969_symbols.ld
diff --git a/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk b/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk
new file mode 100644
index 0000000..9c063cd
--- /dev/null
+++ b/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk
@@ -0,0 +1,10 @@
+# List of the ChibiOS generic MSP430X startup and linker files.
+STARTUPSRC =
+#$(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/vectors.c
+
+STARTUPASM =
+
+STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC
+
+STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/ld
+
diff --git a/os/common/startup/MSP430X/compilers/GCC/rules.mk b/os/common/startup/MSP430X/compilers/GCC/rules.mk
new file mode 100644
index 0000000..a431b96
--- /dev/null
+++ b/os/common/startup/MSP430X/compilers/GCC/rules.mk
@@ -0,0 +1,269 @@
+# ARM Cortex-Mx common makefile scripts and rules.
+
+##############################################################################
+# Processing options coming from the upper Makefile.
+#
+
+# Compiler options
+OPT = $(USE_OPT)
+COPT = $(USE_COPT)
+CPPOPT = $(USE_CPPOPT)
+
+# Garbage collection
+ifeq ($(USE_LINK_GC),yes)
+ OPT += -ffunction-sections -fdata-sections -fno-common
+ LDOPT := ,--gc-sections
+else
+ LDOPT :=
+endif
+
+# Linker extra options
+ifneq ($(USE_LDOPT),)
+ LDOPT := $(LDOPT),$(USE_LDOPT)
+endif
+
+# Link time optimizations
+ifeq ($(USE_LTO),yes)
+ OPT += -flto
+endif
+
+# HWMULT-related options
+ifeq ($(USE_HWMULT),)
+ USE_HWMULT = none
+endif
+ifneq ($(USE_HWMULT),none)
+ OPT += -mhwmult=$(USE_HWMULT)
+endif
+
+# Idle thread stack size
+ifeq ($(USE_IDLE_STACKSIZE),)
+ LDOPT := $(LDOPT),--defsym=__idle_stack_size__=0x40
+else
+ LDOPT := $(LDOPT),--defsym=__idle_stack_size__=$(USE_IDLE_STACKSIZE)
+endif
+
+# Output directory and files
+ifeq ($(BUILDDIR),)
+ BUILDDIR = build
+endif
+ifeq ($(BUILDDIR),.)
+ BUILDDIR = build
+endif
+OUTFILES = $(BUILDDIR)/$(PROJECT).elf \
+ $(BUILDDIR)/$(PROJECT).hex \
+ $(BUILDDIR)/$(PROJECT).bin \
+ $(BUILDDIR)/$(PROJECT).dmp \
+ $(BUILDDIR)/$(PROJECT).list
+
+ifdef SREC
+ OUTFILES += $(BUILDDIR)/$(PROJECT).srec
+endif
+
+# Source files groups and paths
+ACSRC = $(CSRC)
+ACPPSRC = $(CPPSRC)
+ASRC = $(CSRC)$(CPPSRC)
+SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)))
+
+# Various directories
+OBJDIR = $(BUILDDIR)/obj
+LSTDIR = $(BUILDDIR)/lst
+
+# Object files groups
+ACOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))
+ACPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))
+ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
+ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))
+OBJS = $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS)
+
+# Paths
+IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
+LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
+
+# Macros
+DEFS = $(DDEFS) $(UDEFS)
+ADEFS = $(DADEFS) $(UADEFS)
+
+# Libs
+LIBS = $(DLIBS) $(ULIBS)
+
+# Various settings
+MCFLAGS = -mmcu=$(MCU) $(MOPT)
+ODFLAGS = -x --syms
+ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)
+ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)
+CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)
+CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
+LDFLAGS = $(MCFLAGS) $(OPT) -minrt $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH)/ld,--script=$(LDSCRIPT)$(LDOPT)
+
+# Temporary specfile to deal with messed-up msp430-elf default spec file
+SPECFILE := $(shell mktemp -u)
+
+# Generate dependency information
+ASFLAGS += -MD -MP -MF .dep/$(@F).d
+CFLAGS += -MD -MP -MF .dep/$(@F).d
+CPPFLAGS += -MD -MP -MF .dep/$(@F).d
+
+# Paths where to search for sources
+VPATH = $(SRCPATHS)
+
+#
+# Makefile rules
+#
+
+all: PRE_MAKE_ALL_RULE_HOOK $(OBJS) $(OUTFILES) POST_MAKE_ALL_RULE_HOOK
+
+PRE_MAKE_ALL_RULE_HOOK:
+
+POST_MAKE_ALL_RULE_HOOK:
+
+$(OBJS): | $(BUILDDIR) $(OBJDIR) $(LSTDIR)
+
+$(BUILDDIR):
+ifneq ($(USE_VERBOSE_COMPILE),yes)
+ @echo Compiler Options
+ @echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o
+ @echo
+endif
+ @mkdir -p $(BUILDDIR)
+
+$(OBJDIR):
+ @mkdir -p $(OBJDIR)
+
+$(LSTDIR):
+ @mkdir -p $(LSTDIR)
+
+$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+endif
+
+$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+endif
+
+$(ACOBJS) : $(OBJDIR)/%.o : %.c Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+endif
+
+$(TCOBJS) : $(OBJDIR)/%.o : %.c Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+endif
+
+$(ASMOBJS) : $(OBJDIR)/%.o : %.s Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
+endif
+
+$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+endif
+
+# This is gcc-specific - if LD isn't gcc it will fail
+$(SPECFILE) :
+ $(LD) -dumpspecs > $(SPECFILE)
+ sed -i 's/%{!T.*}//' $(SPECFILE)
+
+$(BUILDDIR)/$(PROJECT).elf: $(OBJS) $(LDSCRIPT) $(SPECFILE)
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(LD) $(LDFLAGS) -specs=$(SPECFILE) $(OBJS) $(LIBS) -o $@
+else
+ @echo Linking $@
+ @$(LD) $(LDFLAGS) -specs=$(SPECFILE) $(OBJS) $(LIBS) -o $@
+endif
+
+%.hex: %.elf
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ $(HEX) $< $@
+else
+ @echo Creating $@
+ @$(HEX) $< $@
+endif
+
+%.bin: %.elf
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ $(BIN) $< $@
+else
+ @echo Creating $@
+ @$(BIN) $< $@
+endif
+
+%.srec: %.elf
+ifdef SREC
+ ifeq ($(USE_VERBOSE_COMPILE),yes)
+ $(SREC) $< $@
+ else
+ @echo Creating $@
+ @$(SREC) $< $@
+ endif
+endif
+
+%.dmp: %.elf
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ $(OD) $(ODFLAGS) $< > $@
+ $(SZ) $<
+else
+ @echo Creating $@
+ @$(OD) $(ODFLAGS) $< > $@
+ @echo
+ @$(SZ) $<
+endif
+
+%.list: %.elf
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ $(OD) -S $< > $@
+else
+ @echo Creating $@
+ @$(OD) -S $< > $@
+ @echo
+ @echo Done
+endif
+
+lib: $(OBJS) $(BUILDDIR)/lib$(PROJECT).a
+
+$(BUILDDIR)/lib$(PROJECT).a: $(OBJS)
+ @$(AR) -r $@ $^
+ @echo
+ @echo Done
+
+clean:
+ @echo Cleaning
+ -rm -fR .dep $(BUILDDIR)
+ @echo
+ @echo Done
+
+#
+# Include the dependency files, should be the last of the makefile
+#
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+# *** EOF ***