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-rw-r--r--os/hal/boards/EXP430FR5969/board.c6
-rw-r--r--os/hal/boards/EXP430FR5969/board.h6
-rw-r--r--os/hal/boards/EXP430FR6989/board.c12
-rw-r--r--os/hal/boards/EXP430FR6989/board.h14
-rw-r--r--os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h18
5 files changed, 14 insertions, 42 deletions
diff --git a/os/hal/boards/EXP430FR5969/board.c b/os/hal/boards/EXP430FR5969/board.c
index ac48ba0..0643cce 100644
--- a/os/hal/boards/EXP430FR5969/board.c
+++ b/os/hal/boards/EXP430FR5969/board.c
@@ -25,11 +25,11 @@
const PALConfig pal_default_config =
{
{VAL_IOPORT1_OUT, VAL_IOPORT1_DIR, VAL_IOPORT1_REN, VAL_IOPORT1_SEL0,
- VAL_IOPORT1_SEL1, VAL_IOPORT1_IES, VAL_IOPORT1_IE},
+ VAL_IOPORT1_SEL1},
{VAL_IOPORT2_OUT, VAL_IOPORT2_DIR, VAL_IOPORT2_REN, VAL_IOPORT2_SEL0,
- VAL_IOPORT2_SEL1, VAL_IOPORT2_IES, VAL_IOPORT2_IE},
+ VAL_IOPORT2_SEL1},
{VAL_IOPORT0_OUT, VAL_IOPORT0_DIR, VAL_IOPORT0_REN, VAL_IOPORT0_SEL0,
- VAL_IOPORT0_SEL1, VAL_IOPORT0_IES, VAL_IOPORT0_IE}
+ VAL_IOPORT0_SEL1}
}; /* Set UART TX pin correctly */
#endif /* HAL_USE_PAL */
diff --git a/os/hal/boards/EXP430FR5969/board.h b/os/hal/boards/EXP430FR5969/board.h
index 97103d3..3abe1cc 100644
--- a/os/hal/boards/EXP430FR5969/board.h
+++ b/os/hal/boards/EXP430FR5969/board.h
@@ -65,8 +65,6 @@
#define VAL_IOPORT1_REN 0xFCFE
#define VAL_IOPORT1_SEL0 0x0000
#define VAL_IOPORT1_SEL1 0x0300
-#define VAL_IOPORT1_IES 0x0000
-#define VAL_IOPORT1_IE 0x0000
/*
* Port B setup:
@@ -93,8 +91,6 @@
#define VAL_IOPORT2_REN 0xBDFF
#define VAL_IOPORT2_SEL0 0x0000
#define VAL_IOPORT2_SEL1 0x0000
-#define VAL_IOPORT2_IES 0x0000
-#define VAL_IOPORT2_IE 0x0000
/*
* Port J setup:
@@ -113,8 +109,6 @@
#define VAL_IOPORT0_REN 0x00CF
#define VAL_IOPORT0_SEL0 0x0030
#define VAL_IOPORT0_SEL1 0x0000
-#define VAL_IOPORT0_IES 0x0000
-#define VAL_IOPORT0_IE 0x0000
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
diff --git a/os/hal/boards/EXP430FR6989/board.c b/os/hal/boards/EXP430FR6989/board.c
index a6836cf..475a2ea 100644
--- a/os/hal/boards/EXP430FR6989/board.c
+++ b/os/hal/boards/EXP430FR6989/board.c
@@ -25,17 +25,17 @@
const PALConfig pal_default_config =
{
{VAL_IOPORT1_OUT, VAL_IOPORT1_DIR, VAL_IOPORT1_REN, VAL_IOPORT1_SEL0,
- VAL_IOPORT1_SEL1, VAL_IOPORT1_IES, VAL_IOPORT1_IE},
+ VAL_IOPORT1_SEL1},
{VAL_IOPORT2_OUT, VAL_IOPORT2_DIR, VAL_IOPORT2_REN, VAL_IOPORT2_SEL0,
- VAL_IOPORT2_SEL1, VAL_IOPORT2_IES, VAL_IOPORT2_IE},
+ VAL_IOPORT2_SEL1},
{VAL_IOPORT3_OUT, VAL_IOPORT3_DIR, VAL_IOPORT3_REN, VAL_IOPORT3_SEL0,
- VAL_IOPORT3_SEL1, VAL_IOPORT3_IES, VAL_IOPORT3_IE},
+ VAL_IOPORT3_SEL1},
{VAL_IOPORT4_OUT, VAL_IOPORT4_DIR, VAL_IOPORT4_REN, VAL_IOPORT4_SEL0,
- VAL_IOPORT4_SEL1, VAL_IOPORT4_IES, VAL_IOPORT4_IE},
+ VAL_IOPORT4_SEL1},
{VAL_IOPORT5_OUT, VAL_IOPORT5_DIR, VAL_IOPORT5_REN, VAL_IOPORT5_SEL0,
- VAL_IOPORT5_SEL1, VAL_IOPORT5_IES, VAL_IOPORT5_IE},
+ VAL_IOPORT5_SEL1},
{VAL_IOPORT0_OUT, VAL_IOPORT0_DIR, VAL_IOPORT0_REN, VAL_IOPORT0_SEL0,
- VAL_IOPORT0_SEL1, VAL_IOPORT0_IES, VAL_IOPORT0_IE}
+ VAL_IOPORT0_SEL1}
}; /* Set UART TX pin correctly */
#endif /* HAL_USE_PAL */
diff --git a/os/hal/boards/EXP430FR6989/board.h b/os/hal/boards/EXP430FR6989/board.h
index 83b8fbb..d5afe29 100644
--- a/os/hal/boards/EXP430FR6989/board.h
+++ b/os/hal/boards/EXP430FR6989/board.h
@@ -69,8 +69,6 @@
#define VAL_IOPORT1_REN 0xFFFE
#define VAL_IOPORT1_SEL0 0x0000
#define VAL_IOPORT1_SEL1 0x0000
-#define VAL_IOPORT1_IES 0x0006
-#define VAL_IOPORT1_IE 0x0006
/*
* Port B setup:
@@ -97,8 +95,6 @@
#define VAL_IOPORT2_REN 0xFFCF
#define VAL_IOPORT2_SEL0 0x0030
#define VAL_IOPORT2_SEL1 0x0000
-#define VAL_IOPORT2_IES 0x0000
-#define VAL_IOPORT2_IE 0x0000
/*
* Port C setup:
@@ -125,8 +121,6 @@
#define VAL_IOPORT3_REN 0xFFFF
#define VAL_IOPORT3_SEL0 0x0000
#define VAL_IOPORT3_SEL1 0x0000
-#define VAL_IOPORT3_IES 0x0000
-#define VAL_IOPORT3_IE 0x0000
/*
* Port D setup:
@@ -153,11 +147,9 @@
#define VAL_IOPORT4_REN 0xFFFF
#define VAL_IOPORT4_SEL0 0x0000
#define VAL_IOPORT4_SEL1 0x0000
-#define VAL_IOPORT4_IES 0x0000
-#define VAL_IOPORT4_IE 0x0000
/*
- * Port D setup:
+ * Port E setup:
*
* P9.0 - BoosterPack BP27 (input pullup)
* P9.1 - BoosterPack BP28 (input pullup)
@@ -181,8 +173,6 @@
#define VAL_IOPORT5_REN 0xFF7F
#define VAL_IOPORT5_SEL0 0x0000
#define VAL_IOPORT5_SEL1 0x0000
-#define VAL_IOPORT5_IES 0x0000
-#define VAL_IOPORT5_IE 0x0000
/*
* Port J setup:
@@ -201,8 +191,6 @@
#define VAL_IOPORT0_REN 0x00CF
#define VAL_IOPORT0_SEL0 0x0030
#define VAL_IOPORT0_SEL1 0x0000
-#define VAL_IOPORT0_IES 0x0000
-#define VAL_IOPORT0_IE 0x0000
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
diff --git a/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h b/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h
index 05aeceb..0788eb7 100644
--- a/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h
+++ b/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h
@@ -587,19 +587,14 @@
PIN_OSPEED_100M(GPIOD_MEM_D0) | \
PIN_OSPEED_100M(GPIOD_MEM_D1))
-#if STM32_NAND_USE_EXT_INT
-#define NAND_RB_NWAIT_PUPDR(pin) (PIN_PUPDR_PULLUP(pin))
-#else
-#define NAND_RB_NWAIT_PUPDR(pin) (PIN_PUPDR_FLOATING(pin))
-#endif
#define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(GPIOD_MEM_D2) | \
PIN_PUPDR_FLOATING(GPIOD_MEM_D3) | \
PIN_PUPDR_FLOATING(GPIOD_PIN2) | \
PIN_PUPDR_FLOATING(GPIOD_PIN3) | \
PIN_PUPDR_FLOATING(GPIOD_MEM_OE) | \
PIN_PUPDR_FLOATING(GPIOD_MEM_WE) | \
- NAND_RB_NWAIT_PUPDR(GPIOD_NAND_RB_NWAIT) | \
- PIN_PUPDR_PULLUP(GPIOD_NAND_CE1) | \
+ PIN_PUPDR_FLOATING(GPIOD_NAND_RB_NWAIT) |\
+ PIN_PUPDR_PULLUP(GPIOD_NAND_CE1) | \
PIN_PUPDR_FLOATING(GPIOD_MEM_D13) | \
PIN_PUPDR_FLOATING(GPIOD_MEM_D14) | \
PIN_PUPDR_FLOATING(GPIOD_MEM_D15) | \
@@ -893,21 +888,16 @@
PIN_OSPEED_100M(GPIOG_PIN14) | \
PIN_OSPEED_100M(GPIOG_PIN15))
-#if STM32_NAND_USE_EXT_INT
-#define NAND_RB1_PUPDR(pin) (PIN_PUPDR_FLOATING(pin))
-#else
-#define NAND_RB1_PUPDR(pin) (PIN_PUPDR_PULLUP(pin))
-#endif
#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_MEM_A10) | \
PIN_PUPDR_FLOATING(GPIOG_MEM_A11) | \
PIN_PUPDR_FLOATING(GPIOG_MEM_A12) | \
PIN_PUPDR_FLOATING(GPIOG_MEM_A13) | \
PIN_PUPDR_FLOATING(GPIOG_MEM_A14) | \
PIN_PUPDR_FLOATING(GPIOG_MEM_A15) | \
- NAND_RB1_PUPDR(GPIOG_NAND_RB1) | \
+ PIN_PUPDR_PULLUP(GPIOG_NAND_RB1) | \
PIN_PUPDR_FLOATING(GPIOG_NAND_RB2) | \
PIN_PUPDR_FLOATING(GPIOG_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOG_NAND_CE2) | \
+ PIN_PUPDR_PULLUP(GPIOG_NAND_CE2) | \
PIN_PUPDR_FLOATING(GPIOG_PIN10) | \
PIN_PUPDR_FLOATING(GPIOG_PIN11) | \
PIN_PUPDR_FLOATING(GPIOG_SRAM_CS1) | \
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-19 09:29:25 +0000