aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal/ports/STM32/LLD/CRCv1
diff options
context:
space:
mode:
Diffstat (limited to 'os/hal/ports/STM32/LLD/CRCv1')
-rwxr-xr-x[-rw-r--r--]os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c14
-rw-r--r--os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.h8
2 files changed, 11 insertions, 11 deletions
diff --git a/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c b/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c
index 601deca..a2cf026 100644..100755
--- a/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c
+++ b/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c
@@ -15,7 +15,7 @@
*/
/**
- * @file STM32/CRCv1/crc_lld.c
+ * @file STM32/CRCv1/hal_crc_lld.c
* @brief STM32 CRC subsystem low level driver source.
*
* @addtogroup CRC
@@ -185,15 +185,15 @@ void crc_lld_start(CRCDriver *crcp) {
crcp->crc->CR |= CRC_CR_REV_OUT;
}
#else
- osalDbgAssert(crcp->config->initial_val != default_config.initial_val,
+ osalDbgAssert(crcp->config->initial_val == default_config.initial_val,
"hardware doesn't support programmable initial value");
- osalDbgAssert(crcp->config->poly_size != default_config.poly_size,
+ osalDbgAssert(crcp->config->poly_size == default_config.poly_size,
"hardware doesn't support programmable polynomial size");
- osalDbgAssert(crcp->config->poly != default_config.poly,
+ osalDbgAssert(crcp->config->poly == default_config.poly,
"hardware doesn't support programmable polynomial");
- osalDbgAssert(crcp->config->reflect_data != default_config.reflect_data,
+ osalDbgAssert(crcp->config->reflect_data == default_config.reflect_data,
"hardware doesn't support reflect of input data");
- osalDbgAssert(crcp->config->reflect_remainder != default_config.reflect_remainder,
+ osalDbgAssert(crcp->config->reflect_remainder == default_config.reflect_remainder,
"hardware doesn't support reflect of output remainder");
#endif
@@ -299,7 +299,7 @@ uint32_t crc_lld_calc(CRCDriver *crcp, size_t n, const void *buf) {
n--;
}
#else
- osalDbgAssert(n != 0, "STM32 CRC Unit only supports WORD accesses");
+ osalDbgAssert(n == 0, "STM32 CRC Unit only supports WORD accesses");
#endif
#endif
diff --git a/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.h b/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.h
index ecdaf81..213d346 100644
--- a/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.h
+++ b/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.h
@@ -15,15 +15,15 @@
*/
/**
- * @file STM32/CRCv1/crc_lld.h
+ * @file STM32/CRCv1/hal_crc_lld.h
* @brief STM32 CRC subsystem low level driver header.
*
* @addtogroup CRC
* @{
*/
-#ifndef _CRC_LLD_H_
-#define _CRC_LLD_H_
+#ifndef HAL_CRC_LLD_H_
+#define HAL_CRC_LLD_H_
#if (HAL_USE_CRC == TRUE) || defined(__DOXYGEN__)
@@ -244,6 +244,6 @@ extern "C" {
#endif /* HAL_USE_CRC */
-#endif /* _CRC_LLD_H_ */
+#endif /* HAL_CRC_LLD_H_ */
/** @} */