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-rw-r--r--os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.h16
-rw-r--r--os/hal/ports/TIVA/LLD/pal_lld.c2
-rw-r--r--os/hal/ports/TIVA/LLD/serial_lld.c4
-rw-r--r--os/hal/ports/TIVA/TM4C129x/hal_lld.c4
4 files changed, 17 insertions, 9 deletions
diff --git a/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.h b/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.h
index 37590d2..0ef06ef 100644
--- a/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.h
+++ b/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.h
@@ -28,6 +28,14 @@
#define BOARD_NAME "Texas Instruments TM4C1294 Launchpad"
/*
+ * Ethernet PHY type.
+ */
+#define BOARD_PHY_ADDR 0 /* 0 is internal PHY */
+#define BOARD_PHY_ID 0x2000A221 /* internal PHY ID */
+/* uncomment when using RMII */
+//#define BOARD_PHY_RMII
+
+/*
* MCU type
*/
//#define TM4C1290NCPDT
@@ -269,18 +277,18 @@
#define VAL_GPIOE_PCTL 0x00000000
#define VAL_GPIOF_DATA 0b00000000
-#define VAL_GPIOF_DIR 0b00010001
-#define VAL_GPIOF_AFSEL 0b00000000
+#define VAL_GPIOF_DIR 0b00010011
+#define VAL_GPIOF_AFSEL 0b00010011
#define VAL_GPIOF_DR2R 0b11111111
#define VAL_GPIOF_DR4R 0b00000000
#define VAL_GPIOF_DR8R 0b00000000
#define VAL_GPIOF_ODR 0b00000000
-#define VAL_GPIOF_PUR 0b00010001
+#define VAL_GPIOF_PUR 0b00000000
#define VAL_GPIOF_PDR 0b00000000
#define VAL_GPIOF_SLR 0b00000000
#define VAL_GPIOF_DEN 0b11111111
#define VAL_GPIOF_AMSEL 0b0000
-#define VAL_GPIOF_PCTL 0x00000000
+#define VAL_GPIOF_PCTL 0x00050055
#define VAL_GPIOG_DATA 0b00000000
#define VAL_GPIOG_DIR 0b00000000
diff --git a/os/hal/ports/TIVA/LLD/pal_lld.c b/os/hal/ports/TIVA/LLD/pal_lld.c
index 9939331..657f982 100644
--- a/os/hal/ports/TIVA/LLD/pal_lld.c
+++ b/os/hal/ports/TIVA/LLD/pal_lld.c
@@ -165,7 +165,7 @@ void gpio_init (GPIO_TypeDef *gpiop, const tiva_gpio_setup_t *config)
*/
void _pal_lld_init(const PALConfig *config)
{
- SYSCTL->RCGC.GPIO = RCGCGPIO_VALUE;
+ SYSCTL->RCGCGPIO = RCGCGPIO_VALUE;
__NOP();
__NOP();
diff --git a/os/hal/ports/TIVA/LLD/serial_lld.c b/os/hal/ports/TIVA/LLD/serial_lld.c
index 9238942..92761dc 100644
--- a/os/hal/ports/TIVA/LLD/serial_lld.c
+++ b/os/hal/ports/TIVA/LLD/serial_lld.c
@@ -507,7 +507,7 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config)
if (sdp->state == SD_STOP) {
#if TIVA_SERIAL_USE_UART0
if (&SD1 == sdp) {
- SYSCTL->RCGC.UART |= (1 << 0);
+ SYSCTL->RCGCUART |= (1 << 0);
nvicEnableVector(TIVA_UART0_NUMBER, TIVA_SERIAL_UART0_PRIORITY);
}
#endif
@@ -570,7 +570,7 @@ void sd_lld_stop(SerialDriver *sdp)
uart_deinit(sdp->uart);
#if TIVA_SERIAL_USE_UART0
if (&SD1 == sdp) {
- SYSCTL->RCGC.UART &= ~(1 << 0); /* disable UART0 module */
+ SYSCTL->RCGCUART &= ~(1 << 0); /* disable UART0 module */
nvicDisableVector(TIVA_UART0_NUMBER);
return;
}
diff --git a/os/hal/ports/TIVA/TM4C129x/hal_lld.c b/os/hal/ports/TIVA/TM4C129x/hal_lld.c
index 3bfe485..4f2a968 100644
--- a/os/hal/ports/TIVA/TM4C129x/hal_lld.c
+++ b/os/hal/ports/TIVA/TM4C129x/hal_lld.c
@@ -109,8 +109,8 @@ void tiva_clock_init(void)
* 6. Write the PLLFREQ0 and PLLFREQ1 registers with the values of Q, N, MINT, and MFRAC to
* the configure the desired VCO frequency setting.
*/
- SYSCTL->PLLFREQ[1] = (0x04 << 0); // 5 - 1
- SYSCTL->PLLFREQ[0] = (0x60 << 0) | PLLFREQ0_PLLPWR;
+ SYSCTL->PLLFREQ1 = (0x04 << 0); // 5 - 1
+ SYSCTL->PLLFREQ0 = (0x60 << 0) | PLLFREQ0_PLLPWR;
/*
* 7. Write the MEMTIM0 register to correspond to the new system clock setting.