diff options
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/fsmc.c | 8 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.c | 2 |
2 files changed, 5 insertions, 5 deletions
diff --git a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c index 01f6183..63f4af1 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c @@ -24,7 +24,7 @@ #include "hal.h" #include "fsmc.h" -#if HAL_USE_NAND || STM32_USE_FSMC_SRAM || STM32_USE_FSMC_SDRAM || \ +#if (HAL_USE_NAND || STM32_USE_FSMC_SRAM || STM32_USE_FSMC_SDRAM) || \ defined(__DOXYGEN__) /*===========================================================================*/ @@ -119,7 +119,7 @@ void fsmc_init(void) { void fsmc_start(FSMCDriver *fsmcp) { osalDbgAssert((fsmcp->state == FSMC_STOP) || (fsmcp->state == FSMC_READY), - "invalid state"); + "invalid state"); if (fsmcp->state == FSMC_STOP) { /* Enables the peripheral.*/ @@ -174,12 +174,12 @@ CH_IRQ_HANDLER(STM32_FSMC_HANDLER) { CH_IRQ_PROLOGUE(); #if STM32_NAND_USE_FSMC_NAND1 - if (FSMCD1.nand1->SR & FSMC_SR_ISR_MASK){ + if (FSMCD1.nand1->SR & FSMC_SR_ISR_MASK) { NANDD1.isr_handler(&NANDD1); } #endif #if STM32_NAND_USE_FSMC_NAND2 - if (FSMCD1.nand2->SR & FSMC_SR_ISR_MASK){ + if (FSMCD1.nand2->SR & FSMC_SR_ISR_MASK) { NANDD2.isr_handler(&NANDD2); } #endif diff --git a/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.c b/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.c index f6009dd..33b9e80 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.c @@ -102,7 +102,7 @@ static void _sdram_init_sequence(const SDRAMConfig *cfgp) { SDRAMD.sdram->SDCMR = FMCCM_CLK_ENABLED | command_target; /* Step 4: Insert delay (tipically 100uS).*/ - osalThreadSleepMilliseconds(100); + osalThreadSleepMilliseconds(1); /* Step 5: Configure a PALL (precharge all) command.*/ _sdram_wait_ready(); |