diff options
Diffstat (limited to 'testhal/STM32')
40 files changed, 6144 insertions, 2140 deletions
diff --git a/testhal/STM32/STM32F0xx/onewire/.project b/testhal/STM32/STM32F0xx/onewire/.project index 6599a83..8776e6e 100644 --- a/testhal/STM32/STM32F0xx/onewire/.project +++ b/testhal/STM32/STM32F0xx/onewire/.project @@ -25,6 +25,11 @@ </natures>
<linkedResources>
<link>
+ <name>hw_abstracted</name>
+ <type>2</type>
+ <locationURI>PARENT-3-PROJECT_LOC/hw_abstracted</locationURI>
+ </link>
+ <link>
<name>os-community</name>
<type>2</type>
<locationURI>PARENT-4-PROJECT_LOC/os</locationURI>
diff --git a/testhal/STM32/STM32F0xx/onewire/Makefile b/testhal/STM32/STM32F0xx/onewire/Makefile index d121cee..e478e3a 100644 --- a/testhal/STM32/STM32F0xx/onewire/Makefile +++ b/testhal/STM32/STM32F0xx/onewire/Makefile @@ -77,6 +77,7 @@ PROJECT = ch # Imported source files and paths
CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
+TESTHAL = $(CHIBIOS_CONTRIB)/testhal/common/onewire
# Startup files.
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk
# HAL-OSAL files (optional).
@@ -102,7 +103,7 @@ CSRC = $(STARTUPSRC) \ $(BOARDSRC) \
$(TESTSRC) \
main.c \
- onewire_test.c
+ $(TESTHAL)/testhal_onewire.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
@@ -135,7 +136,8 @@ ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) INCDIR = $(CHIBIOS)/os/license \
$(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
- $(CHIBIOS)/os/various
+ $(CHIBIOS)/os/various \
+ $(TESTHAL)
#
# Project, sources and paths
diff --git a/testhal/STM32/STM32F0xx/onewire/onewire_test.h b/testhal/STM32/STM32F0xx/onewire/boarddef.h index 1bec2d0..fd9842b 100644 --- a/testhal/STM32/STM32F0xx/onewire/onewire_test.h +++ b/testhal/STM32/STM32F0xx/onewire/boarddef.h @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS/RT - Copyright (C) 2016 Uladzimir Pylinsky aka barthess Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -14,15 +14,15 @@ limitations under the License. */ -#ifndef ONEWIRE_TEST_H_ -#define ONEWIRE_TEST_H_ +#ifndef BOARDDEF_H_ +#define BOARDDEF_H_ -#ifdef __cplusplus -extern "C" { -#endif - void onewireTest(void); -#ifdef __cplusplus -} -#endif +#define ONEWIRE_PORT GPIOB +#define ONEWIRE_PIN GPIOB_PIN0 +#define ONEWIRE_PAD_MODE_ACTIVE (PAL_MODE_ALTERNATE(1) | PAL_STM32_OTYPE_OPENDRAIN) +#define search_led_off() (palClearPad(GPIOC, GPIOC_LED4)) +#define search_led_on() (palSetPad(GPIOC, GPIOC_LED4)) +#define ONEWIRE_MASTER_CHANNEL 2 +#define ONEWIRE_SAMPLE_CHANNEL 3 -#endif /* ONEWIRE_TEST_H_ */ +#endif /* BOARDDEF_H_ */ diff --git a/testhal/STM32/STM32F0xx/onewire/main.c b/testhal/STM32/STM32F0xx/onewire/main.c index 793bffe..5265edc 100644 --- a/testhal/STM32/STM32F0xx/onewire/main.c +++ b/testhal/STM32/STM32F0xx/onewire/main.c @@ -17,7 +17,7 @@ #include "ch.h"
#include "hal.h"
-#include "onewire_test.h"
+#include "testhal_onewire.h"
/*
* Application entry point.
diff --git a/testhal/STM32/STM32F0xx/onewire/onewire_test.c b/testhal/STM32/STM32F0xx/onewire/onewire_test.c deleted file mode 100644 index be20dbc..0000000 --- a/testhal/STM32/STM32F0xx/onewire/onewire_test.c +++ /dev/null @@ -1,257 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include <string.h> - -#include "hal.h" - -/* - ****************************************************************************** - * DEFINES - ****************************************************************************** - */ - -#if defined(BOARD_ST_STM32F4_DISCOVERY) || \ - defined(BOARD_ST_STM32F0_DISCOVERY) || \ - defined(BOARD_ST_STM32F0308_DISCOVERY) - #if ONEWIRE_USE_STRONG_PULLUP - #error "This board has not enough voltage for this feature" - #endif -#endif - -#if defined(BOARD_ST_STM32F0308_DISCOVERY) - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN GPIOB_PIN0 - #define ONEWIRE_PAD_MODE_ACTIVE (PAL_MODE_ALTERNATE(1) | PAL_STM32_OTYPE_OPENDRAIN) - #define search_led_off() (palClearPad(GPIOC, GPIOC_LED4)) - #define search_led_on() (palSetPad(GPIOC, GPIOC_LED4)) - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#elif defined(BOARD_ST_STM32F4_DISCOVERY) - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN GPIOB_PIN0 - #define ONEWIRE_PAD_MODE_ACTIVE (PAL_MODE_ALTERNATE(2) | PAL_STM32_OTYPE_OPENDRAIN) - #define search_led_off() (palClearPad(GPIOD, GPIOD_LED4)) - #define search_led_on() (palSetPad(GPIOD, GPIOD_LED4)) - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#elif defined(BOARD_OLIMEX_STM32_103STK) - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN 0 - #define ONEWIRE_PAD_MODE_IDLE PAL_MODE_INPUT - #define ONEWIRE_PAD_MODE_ACTIVE PAL_MODE_STM32_ALTERNATE_OPENDRAIN - #define search_led_on() (palClearPad(GPIOC, GPIOC_LED)) - #define search_led_off() (palSetPad(GPIOC, GPIOC_LED)) - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#else - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN GPIOB_TACHOMETER - #include "pads.h" - #define ONEWIRE_PAD_MODE_ACTIVE (PAL_MODE_ALTERNATE(2) | PAL_STM32_OTYPE_OPENDRAIN) - #define search_led_on red_led_on - #define search_led_off red_led_off - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#endif - -/* - ****************************************************************************** - * EXTERNS - ****************************************************************************** - */ - -/* - ****************************************************************************** - * PROTOTYPES - ****************************************************************************** - */ -/* - * Forward declarations - */ -#if ONEWIRE_USE_STRONG_PULLUP -static void strong_pullup_assert(void); -static void strong_pullup_release(void); -#endif - -/* - ****************************************************************************** - * GLOBAL VARIABLES - ****************************************************************************** - */ - -static uint8_t testbuf[12]; - -/* stores 3 temperature values in millicelsius */ -static int32_t temperature[3]; - -/* - * Config for underlied PWM driver. - * Note! It is NOT constant because 1-wire driver needs to change them - * during functioning. - */ -static PWMConfig pwm_cfg = { - 0, - 0, - NULL, - { - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} - }, - 0, -#if STM32_PWM_USE_ADVANCED - 0, -#endif - 0 -}; - -/* - * - */ -static const onewireConfig ow_cfg = { - &PWMD3, - &pwm_cfg, - PWM_OUTPUT_ACTIVE_LOW, - ONEWIRE_MASTER_CHANNEL, - ONEWIRE_SAMPLE_CHANNEL, - ONEWIRE_PORT, - ONEWIRE_PIN, -#if defined(STM32F1XX) - ONEWIRE_PAD_MODE_IDLE, -#endif - ONEWIRE_PAD_MODE_ACTIVE, -#if ONEWIRE_USE_STRONG_PULLUP - strong_pullup_assert, - strong_pullup_release -#endif -}; - -/* - ****************************************************************************** - ****************************************************************************** - * LOCAL FUNCTIONS - ****************************************************************************** - ****************************************************************************** - */ - -#if ONEWIRE_USE_STRONG_PULLUP -/** - * - */ -static void strong_pullup_assert(void) { - palSetPadMode(ONEWIRE_PORT, ONEWIRE_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL); -} - -/** - * - */ -static void strong_pullup_release(void) { - palSetPadMode(ONEWIRE_PORT, ONEWIRE_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); -} -#endif /* ONEWIRE_USE_STRONG_PULLUP */ - -/* - ****************************************************************************** - * EXPORTED FUNCTIONS - ****************************************************************************** - */ - -/** - * - */ -void onewireTest(void) { - - int16_t tmp; - uint8_t rombuf[24]; - size_t devices_on_bus = 0; - size_t i = 0; - bool presence; - - onewireObjectInit(&OWD1); - onewireStart(&OWD1, &ow_cfg); - -#if ONEWIRE_SYNTH_SEARCH_TEST - synthSearchRomTest(&OWD1); -#endif - - for (i=0; i<3; i++) - temperature[i] = -666; - - while (true) { - if (true == onewireReset(&OWD1)){ - - memset(rombuf, 0x55, sizeof(rombuf)); - search_led_on(); - devices_on_bus = onewireSearchRom(&OWD1, rombuf, 3); - search_led_off(); - osalDbgCheck(devices_on_bus <= 3); - osalDbgCheck(devices_on_bus > 0); - - if (1 == devices_on_bus){ - /* test read rom command */ - presence = onewireReset(&OWD1); - osalDbgCheck(true == presence); - testbuf[0] = ONEWIRE_CMD_READ_ROM; - onewireWrite(&OWD1, testbuf, 1, 0); - onewireRead(&OWD1, testbuf, 8); - osalDbgCheck(testbuf[7] == onewireCRC(testbuf, 7)); - osalDbgCheck(0 == memcmp(rombuf, testbuf, 8)); - } - - /* start temperature measurement on all connected devices at once */ - presence = onewireReset(&OWD1); - osalDbgCheck(true == presence); - testbuf[0] = ONEWIRE_CMD_SKIP_ROM; - testbuf[1] = ONEWIRE_CMD_CONVERT_TEMP; - -#if ONEWIRE_USE_STRONG_PULLUP - onewireWrite(&OWD1, testbuf, 2, MS2ST(750)); -#else - onewireWrite(&OWD1, testbuf, 2, 0); - /* poll bus waiting ready signal from all connected devices */ - testbuf[0] = 0; - while (testbuf[0] == 0){ - osalThreadSleepMilliseconds(50); - onewireRead(&OWD1, testbuf, 1); - } -#endif - - for (i=0; i<devices_on_bus; i++) { - /* read temperature device by device from their scratchpads */ - presence = onewireReset(&OWD1); - osalDbgCheck(true == presence); - - testbuf[0] = ONEWIRE_CMD_MATCH_ROM; - memcpy(&testbuf[1], &rombuf[i*8], 8); - testbuf[9] = ONEWIRE_CMD_READ_SCRATCHPAD; - onewireWrite(&OWD1, testbuf, 10, 0); - - onewireRead(&OWD1, testbuf, 9); - osalDbgCheck(testbuf[8] == onewireCRC(testbuf, 8)); - memcpy(&tmp, &testbuf, 2); - temperature[i] = ((int32_t)tmp * 625) / 10; - } - } - else { - osalSysHalt("No devices found"); - } - osalThreadSleep(1); /* enforce ChibiOS's stack overflow check */ - } - - onewireStop(&OWD1); -} diff --git a/testhal/STM32/STM32F0xx/onewire/real_roms.txt b/testhal/STM32/STM32F0xx/onewire/real_roms.txt deleted file mode 100644 index ea19c1a..0000000 --- a/testhal/STM32/STM32F0xx/onewire/real_roms.txt +++ /dev/null @@ -1,27 +0,0 @@ -rombuf[0] 0x28 -rombuf[1] 0xec -rombuf[2] 0xf5 -rombuf[3] 0x67 -rombuf[4] 0x5 -rombuf[5] 0x0 -rombuf[6] 0x0 -rombuf[7] 0x1d - -rombuf[8] 0x28 -rombuf[9] 0xbd -rombuf[10] 0x1a -rombuf[11] 0x60 -rombuf[12] 0x5 -rombuf[13] 0x0 -rombuf[14] 0x0 -rombuf[15] 0x37 - -rombuf[16] 0x28 -rombuf[17] 0x83 -rombuf[18] 0x7d -rombuf[19] 0x67 -rombuf[20] 0x5 -rombuf[21] 0x0 -rombuf[22] 0x0 -rombuf[23] 0xf - diff --git a/testhal/STM32/STM32F0xx/onewire/search_rom_synth.c b/testhal/STM32/STM32F0xx/onewire/search_rom_synth.c deleted file mode 100644 index cd2528f..0000000 --- a/testhal/STM32/STM32F0xx/onewire/search_rom_synth.c +++ /dev/null @@ -1,370 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include <stdlib.h> - -/* - ****************************************************************************** - * DEFINES - ****************************************************************************** - */ - -/* do not set it more than 64 because of some fill_pattern functions - * will be broken.*/ -#define SYNTH_DEVICES_MAX 64 - -/* - * synthetic device - */ -typedef struct { - bool active; - uint64_t id; -} OWSynthDevice; - -/* - * synthetic bus - */ -typedef struct { - OWSynthDevice devices[SYNTH_DEVICES_MAX]; - size_t dev_present; - bool complement_bit; - ioline_t rom_bit; -} OWSynthBus; - -/* - ****************************************************************************** - * EXTERNS - ****************************************************************************** - */ - -/* - ****************************************************************************** - * PROTOTYPES - ****************************************************************************** - */ - -/* - ****************************************************************************** - * GLOBAL VARIABLES - ****************************************************************************** - */ - -static OWSynthBus synth_bus; - -/* - * local buffer for discovered ROMs - */ -static uint64_t detected_devices[SYNTH_DEVICES_MAX]; - -/* - ****************************************************************************** - ****************************************************************************** - * LOCAL FUNCTIONS - ****************************************************************************** - ****************************************************************************** - */ - -/* - ****************************************************************************** - * EXPORTED FUNCTIONS - ****************************************************************************** - */ - -/** - * - */ -void _synth_ow_write_bit(onewireDriver *owp, ioline_t bit) { - (void)owp; - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) { - if (((synth_bus.devices[i].id >> synth_bus.rom_bit) & 1U) != bit) { - synth_bus.devices[i].active = false; - } - } - synth_bus.rom_bit++; -} - -/** - * - */ -ioline_t _synth_ow_read_bit(void) { - ioline_t ret = 0xFF; - size_t i; - ioline_t bit; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) { - if (synth_bus.devices[i].active){ - bit = (synth_bus.devices[i].id >> synth_bus.rom_bit) & 1U; - if (synth_bus.complement_bit){ - bit ^= 1U; - } - if (0xFF == ret) - ret = bit; - else - ret &= bit; - } - } - synth_bus.complement_bit = !synth_bus.complement_bit; - return ret; -} - -/** - * - */ -static void synth_reset_pulse(void){ - size_t i; - - for (i=0; i<synth_bus.dev_present; i++){ - synth_bus.devices[i].active = true; - } -} - -/** - * - */ -static size_t synth_search_rom(onewireDriver *owp, uint8_t *result, size_t max_rom_cnt) { - - size_t i; - - search_clean_start(&owp->search_rom); - - do { - /* initialize buffer to store result */ - if (owp->search_rom.reg.devices_found >= max_rom_cnt) - owp->search_rom.retbuf = result + 8*(max_rom_cnt-1); - else - owp->search_rom.retbuf = result + 8*owp->search_rom.reg.devices_found; - memset(owp->search_rom.retbuf, 0, 8); - - /* clean iteration state */ - search_clean_iteration(&owp->search_rom); - - /**/ - synth_reset_pulse(); - synth_bus.rom_bit = 0; - synth_bus.complement_bit = false; - for (i=0; i<64*3 - 1; i++){ - ow_search_rom_cb(NULL, owp); - } - - if (ONEWIRE_SEARCH_ROM_ERROR != owp->search_rom.reg.result) { - /* store cached result for usage in next iteration */ - memcpy(owp->search_rom.prev_path, owp->search_rom.retbuf, 8); - } - } - while (ONEWIRE_SEARCH_ROM_SUCCESS == owp->search_rom.reg.result); - - /**/ - if (ONEWIRE_SEARCH_ROM_ERROR == owp->search_rom.reg.result) - return 0; - else - return owp->search_rom.reg.devices_found; -} - -/** - * - */ -static void fill_pattern_real_devices(void) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - synth_bus.devices[0].active = true; - synth_bus.devices[0].id = 0x1d00000567f5ec28; - - synth_bus.devices[1].active = true; - synth_bus.devices[1].id = 0x37000005601abd28; - - synth_bus.devices[2].active = true; - synth_bus.devices[2].id = 0x0f000005677d8328; -} - -/** - * - */ -static void fill_pattern_00(size_t devices, size_t start) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = (start + i); - } -} - -/** - * - */ -static void fill_pattern_01(size_t devices) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = (devices - i); - } -} - -/** - * - */ -static void fill_pattern_02(size_t devices) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = ((uint64_t)1 << i); - } -} - -/** - * - */ -static void fill_pattern_03(size_t devices) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = ((uint64_t)0x8000000000000000 >> i); - } -} - -/** - * @brief random pattern helper - */ -static bool is_id_uniq(const OWSynthDevice *dev, size_t n, uint64_t id) { - size_t i; - - for (i=0; i<n; i++) { - if (dev[i].id == id) - return false; - } - return true; -} - -/** - * - */ -static void fill_pattern_rand(size_t devices) { - size_t i; - uint64_t new_id; - - for (i=0; i<SYNTH_DEVICES_MAX; i++){ - synth_bus.devices[i].active = false; - synth_bus.devices[i].id = 0; - } - - for (i=0; i<devices; i++) { - do { - new_id = rand(); - new_id = (new_id << 32) | rand(); - } while (true != is_id_uniq(synth_bus.devices, i, new_id)); - - synth_bus.devices[i].id = new_id; - synth_bus.devices[i].active = true; - } -} - -/** - * - */ -static bool check_result(size_t detected) { - - size_t i,j; - bool match = false; - - for (i=0; i<detected; i++){ - match = false; - for (j=0; j<detected; j++){ - if (synth_bus.devices[i].id == detected_devices[j]){ - match = true; - break; - } - } - if (false == match) - return OSAL_FAILED; - } - return OSAL_SUCCESS; -} - -/** - * - */ -void synthSearchRomTest(onewireDriver *owp) { - - size_t detected = 0; - size_t i; - - synth_bus.dev_present = 3; - fill_pattern_real_devices(); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - for (i=1; i<=SYNTH_DEVICES_MAX; i++){ - synth_bus.dev_present = i; - - fill_pattern_00(synth_bus.dev_present, 0); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_00(synth_bus.dev_present, 1); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_01(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_02(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_03(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - } - - i = 0; - while (i < 1000) { - synth_bus.dev_present = 1 + (rand() & 63); - - fill_pattern_rand(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - i++; - } -} - - diff --git a/testhal/STM32/STM32F1xx/onewire/.cproject b/testhal/STM32/STM32F1xx/onewire/.cproject index 11b29ed..78e793f 100644 --- a/testhal/STM32/STM32F1xx/onewire/.cproject +++ b/testhal/STM32/STM32F1xx/onewire/.cproject @@ -52,4 +52,5 @@ </scannerConfigBuildInfo> </storageModule> <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> + <storageModule moduleId="refreshScope"/> </cproject> diff --git a/testhal/STM32/STM32F1xx/onewire/.project b/testhal/STM32/STM32F1xx/onewire/.project index 9c1fc51..062afeb 100644 --- a/testhal/STM32/STM32F1xx/onewire/.project +++ b/testhal/STM32/STM32F1xx/onewire/.project @@ -1,6 +1,6 @@ <?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
- <name>STM32F1xx-onewire</name>
+ <name>STM32F1xx-1-Wire</name>
<comment></comment>
<projects>
</projects>
@@ -80,12 +80,18 @@ <link>
<name>os-community</name>
<type>2</type>
- <locationURI>PARENT-4-PROJECT_LOC/os</locationURI>
+ <locationURI>CHIBIOS_CONTRIB/os</locationURI>
</link>
<link>
<name>os-git</name>
<type>2</type>
- <locationURI>PARENT-5-PROJECT_LOC/ChibiOS-RT/os</locationURI>
+ <locationURI>copy_PARENT/ChibiOS-RT/os</locationURI>
</link>
</linkedResources>
+ <variableList>
+ <variable>
+ <name>copy_PARENT</name>
+ <value>$%7BPARENT-1-CHIBIOS%7D</value>
+ </variable>
+ </variableList>
</projectDescription>
diff --git a/testhal/STM32/STM32F1xx/onewire/Makefile b/testhal/STM32/STM32F1xx/onewire/Makefile index d2e25b1..e9d4238 100644 --- a/testhal/STM32/STM32F1xx/onewire/Makefile +++ b/testhal/STM32/STM32F1xx/onewire/Makefile @@ -82,6 +82,7 @@ PROJECT = ch # Imported source files and paths
CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
+TESTHAL = $(CHIBIOS_CONTRIB)/testhal/common/onewire
# Startup files.
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk
# HAL-OSAL files (optional).
@@ -109,7 +110,7 @@ CSRC = $(STARTUPSRC) \ $(BOARDSRC) \
$(TESTSRC) \
main.c \
- onewire_test.c
+ $(TESTHAL)/testhal_onewire.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
@@ -142,7 +143,8 @@ ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) INCDIR = $(CHIBIOS)/os/license \
$(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
- $(CHIBIOS)/os/various
+ $(CHIBIOS)/os/various \
+ $(TESTHAL)
#
# Project, sources and paths
diff --git a/testhal/STM32/STM32F1xx/onewire/boarddef.h b/testhal/STM32/STM32F1xx/onewire/boarddef.h new file mode 100644 index 0000000..2b1b466 --- /dev/null +++ b/testhal/STM32/STM32F1xx/onewire/boarddef.h @@ -0,0 +1,29 @@ +/* + ChibiOS/RT - Copyright (C) 2016 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef BOARDDEF_H_ +#define BOARDDEF_H_ + +#define ONEWIRE_PORT GPIOB +#define ONEWIRE_PIN 0 +#define ONEWIRE_PAD_MODE_IDLE PAL_MODE_INPUT +#define ONEWIRE_PAD_MODE_ACTIVE PAL_MODE_STM32_ALTERNATE_OPENDRAIN +#define search_led_on() (palClearPad(GPIOC, GPIOC_LED)) +#define search_led_off() (palSetPad(GPIOC, GPIOC_LED)) +#define ONEWIRE_MASTER_CHANNEL 2 +#define ONEWIRE_SAMPLE_CHANNEL 3 + +#endif /* BOARDDEF_H_ */ diff --git a/testhal/STM32/STM32F1xx/onewire/main.c b/testhal/STM32/STM32F1xx/onewire/main.c index 793bffe..5265edc 100644 --- a/testhal/STM32/STM32F1xx/onewire/main.c +++ b/testhal/STM32/STM32F1xx/onewire/main.c @@ -17,7 +17,7 @@ #include "ch.h"
#include "hal.h"
-#include "onewire_test.h"
+#include "testhal_onewire.h"
/*
* Application entry point.
diff --git a/testhal/STM32/STM32F1xx/onewire/onewire_test.c b/testhal/STM32/STM32F1xx/onewire/onewire_test.c deleted file mode 100644 index be20dbc..0000000 --- a/testhal/STM32/STM32F1xx/onewire/onewire_test.c +++ /dev/null @@ -1,257 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include <string.h> - -#include "hal.h" - -/* - ****************************************************************************** - * DEFINES - ****************************************************************************** - */ - -#if defined(BOARD_ST_STM32F4_DISCOVERY) || \ - defined(BOARD_ST_STM32F0_DISCOVERY) || \ - defined(BOARD_ST_STM32F0308_DISCOVERY) - #if ONEWIRE_USE_STRONG_PULLUP - #error "This board has not enough voltage for this feature" - #endif -#endif - -#if defined(BOARD_ST_STM32F0308_DISCOVERY) - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN GPIOB_PIN0 - #define ONEWIRE_PAD_MODE_ACTIVE (PAL_MODE_ALTERNATE(1) | PAL_STM32_OTYPE_OPENDRAIN) - #define search_led_off() (palClearPad(GPIOC, GPIOC_LED4)) - #define search_led_on() (palSetPad(GPIOC, GPIOC_LED4)) - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#elif defined(BOARD_ST_STM32F4_DISCOVERY) - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN GPIOB_PIN0 - #define ONEWIRE_PAD_MODE_ACTIVE (PAL_MODE_ALTERNATE(2) | PAL_STM32_OTYPE_OPENDRAIN) - #define search_led_off() (palClearPad(GPIOD, GPIOD_LED4)) - #define search_led_on() (palSetPad(GPIOD, GPIOD_LED4)) - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#elif defined(BOARD_OLIMEX_STM32_103STK) - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN 0 - #define ONEWIRE_PAD_MODE_IDLE PAL_MODE_INPUT - #define ONEWIRE_PAD_MODE_ACTIVE PAL_MODE_STM32_ALTERNATE_OPENDRAIN - #define search_led_on() (palClearPad(GPIOC, GPIOC_LED)) - #define search_led_off() (palSetPad(GPIOC, GPIOC_LED)) - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#else - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN GPIOB_TACHOMETER - #include "pads.h" - #define ONEWIRE_PAD_MODE_ACTIVE (PAL_MODE_ALTERNATE(2) | PAL_STM32_OTYPE_OPENDRAIN) - #define search_led_on red_led_on - #define search_led_off red_led_off - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#endif - -/* - ****************************************************************************** - * EXTERNS - ****************************************************************************** - */ - -/* - ****************************************************************************** - * PROTOTYPES - ****************************************************************************** - */ -/* - * Forward declarations - */ -#if ONEWIRE_USE_STRONG_PULLUP -static void strong_pullup_assert(void); -static void strong_pullup_release(void); -#endif - -/* - ****************************************************************************** - * GLOBAL VARIABLES - ****************************************************************************** - */ - -static uint8_t testbuf[12]; - -/* stores 3 temperature values in millicelsius */ -static int32_t temperature[3]; - -/* - * Config for underlied PWM driver. - * Note! It is NOT constant because 1-wire driver needs to change them - * during functioning. - */ -static PWMConfig pwm_cfg = { - 0, - 0, - NULL, - { - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} - }, - 0, -#if STM32_PWM_USE_ADVANCED - 0, -#endif - 0 -}; - -/* - * - */ -static const onewireConfig ow_cfg = { - &PWMD3, - &pwm_cfg, - PWM_OUTPUT_ACTIVE_LOW, - ONEWIRE_MASTER_CHANNEL, - ONEWIRE_SAMPLE_CHANNEL, - ONEWIRE_PORT, - ONEWIRE_PIN, -#if defined(STM32F1XX) - ONEWIRE_PAD_MODE_IDLE, -#endif - ONEWIRE_PAD_MODE_ACTIVE, -#if ONEWIRE_USE_STRONG_PULLUP - strong_pullup_assert, - strong_pullup_release -#endif -}; - -/* - ****************************************************************************** - ****************************************************************************** - * LOCAL FUNCTIONS - ****************************************************************************** - ****************************************************************************** - */ - -#if ONEWIRE_USE_STRONG_PULLUP -/** - * - */ -static void strong_pullup_assert(void) { - palSetPadMode(ONEWIRE_PORT, ONEWIRE_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL); -} - -/** - * - */ -static void strong_pullup_release(void) { - palSetPadMode(ONEWIRE_PORT, ONEWIRE_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); -} -#endif /* ONEWIRE_USE_STRONG_PULLUP */ - -/* - ****************************************************************************** - * EXPORTED FUNCTIONS - ****************************************************************************** - */ - -/** - * - */ -void onewireTest(void) { - - int16_t tmp; - uint8_t rombuf[24]; - size_t devices_on_bus = 0; - size_t i = 0; - bool presence; - - onewireObjectInit(&OWD1); - onewireStart(&OWD1, &ow_cfg); - -#if ONEWIRE_SYNTH_SEARCH_TEST - synthSearchRomTest(&OWD1); -#endif - - for (i=0; i<3; i++) - temperature[i] = -666; - - while (true) { - if (true == onewireReset(&OWD1)){ - - memset(rombuf, 0x55, sizeof(rombuf)); - search_led_on(); - devices_on_bus = onewireSearchRom(&OWD1, rombuf, 3); - search_led_off(); - osalDbgCheck(devices_on_bus <= 3); - osalDbgCheck(devices_on_bus > 0); - - if (1 == devices_on_bus){ - /* test read rom command */ - presence = onewireReset(&OWD1); - osalDbgCheck(true == presence); - testbuf[0] = ONEWIRE_CMD_READ_ROM; - onewireWrite(&OWD1, testbuf, 1, 0); - onewireRead(&OWD1, testbuf, 8); - osalDbgCheck(testbuf[7] == onewireCRC(testbuf, 7)); - osalDbgCheck(0 == memcmp(rombuf, testbuf, 8)); - } - - /* start temperature measurement on all connected devices at once */ - presence = onewireReset(&OWD1); - osalDbgCheck(true == presence); - testbuf[0] = ONEWIRE_CMD_SKIP_ROM; - testbuf[1] = ONEWIRE_CMD_CONVERT_TEMP; - -#if ONEWIRE_USE_STRONG_PULLUP - onewireWrite(&OWD1, testbuf, 2, MS2ST(750)); -#else - onewireWrite(&OWD1, testbuf, 2, 0); - /* poll bus waiting ready signal from all connected devices */ - testbuf[0] = 0; - while (testbuf[0] == 0){ - osalThreadSleepMilliseconds(50); - onewireRead(&OWD1, testbuf, 1); - } -#endif - - for (i=0; i<devices_on_bus; i++) { - /* read temperature device by device from their scratchpads */ - presence = onewireReset(&OWD1); - osalDbgCheck(true == presence); - - testbuf[0] = ONEWIRE_CMD_MATCH_ROM; - memcpy(&testbuf[1], &rombuf[i*8], 8); - testbuf[9] = ONEWIRE_CMD_READ_SCRATCHPAD; - onewireWrite(&OWD1, testbuf, 10, 0); - - onewireRead(&OWD1, testbuf, 9); - osalDbgCheck(testbuf[8] == onewireCRC(testbuf, 8)); - memcpy(&tmp, &testbuf, 2); - temperature[i] = ((int32_t)tmp * 625) / 10; - } - } - else { - osalSysHalt("No devices found"); - } - osalThreadSleep(1); /* enforce ChibiOS's stack overflow check */ - } - - onewireStop(&OWD1); -} diff --git a/testhal/STM32/STM32F1xx/onewire/real_roms.txt b/testhal/STM32/STM32F1xx/onewire/real_roms.txt deleted file mode 100644 index ea19c1a..0000000 --- a/testhal/STM32/STM32F1xx/onewire/real_roms.txt +++ /dev/null @@ -1,27 +0,0 @@ -rombuf[0] 0x28 -rombuf[1] 0xec -rombuf[2] 0xf5 -rombuf[3] 0x67 -rombuf[4] 0x5 -rombuf[5] 0x0 -rombuf[6] 0x0 -rombuf[7] 0x1d - -rombuf[8] 0x28 -rombuf[9] 0xbd -rombuf[10] 0x1a -rombuf[11] 0x60 -rombuf[12] 0x5 -rombuf[13] 0x0 -rombuf[14] 0x0 -rombuf[15] 0x37 - -rombuf[16] 0x28 -rombuf[17] 0x83 -rombuf[18] 0x7d -rombuf[19] 0x67 -rombuf[20] 0x5 -rombuf[21] 0x0 -rombuf[22] 0x0 -rombuf[23] 0xf - diff --git a/testhal/STM32/STM32F1xx/onewire/search_rom_synth.c b/testhal/STM32/STM32F1xx/onewire/search_rom_synth.c deleted file mode 100644 index cd2528f..0000000 --- a/testhal/STM32/STM32F1xx/onewire/search_rom_synth.c +++ /dev/null @@ -1,370 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include <stdlib.h> - -/* - ****************************************************************************** - * DEFINES - ****************************************************************************** - */ - -/* do not set it more than 64 because of some fill_pattern functions - * will be broken.*/ -#define SYNTH_DEVICES_MAX 64 - -/* - * synthetic device - */ -typedef struct { - bool active; - uint64_t id; -} OWSynthDevice; - -/* - * synthetic bus - */ -typedef struct { - OWSynthDevice devices[SYNTH_DEVICES_MAX]; - size_t dev_present; - bool complement_bit; - ioline_t rom_bit; -} OWSynthBus; - -/* - ****************************************************************************** - * EXTERNS - ****************************************************************************** - */ - -/* - ****************************************************************************** - * PROTOTYPES - ****************************************************************************** - */ - -/* - ****************************************************************************** - * GLOBAL VARIABLES - ****************************************************************************** - */ - -static OWSynthBus synth_bus; - -/* - * local buffer for discovered ROMs - */ -static uint64_t detected_devices[SYNTH_DEVICES_MAX]; - -/* - ****************************************************************************** - ****************************************************************************** - * LOCAL FUNCTIONS - ****************************************************************************** - ****************************************************************************** - */ - -/* - ****************************************************************************** - * EXPORTED FUNCTIONS - ****************************************************************************** - */ - -/** - * - */ -void _synth_ow_write_bit(onewireDriver *owp, ioline_t bit) { - (void)owp; - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) { - if (((synth_bus.devices[i].id >> synth_bus.rom_bit) & 1U) != bit) { - synth_bus.devices[i].active = false; - } - } - synth_bus.rom_bit++; -} - -/** - * - */ -ioline_t _synth_ow_read_bit(void) { - ioline_t ret = 0xFF; - size_t i; - ioline_t bit; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) { - if (synth_bus.devices[i].active){ - bit = (synth_bus.devices[i].id >> synth_bus.rom_bit) & 1U; - if (synth_bus.complement_bit){ - bit ^= 1U; - } - if (0xFF == ret) - ret = bit; - else - ret &= bit; - } - } - synth_bus.complement_bit = !synth_bus.complement_bit; - return ret; -} - -/** - * - */ -static void synth_reset_pulse(void){ - size_t i; - - for (i=0; i<synth_bus.dev_present; i++){ - synth_bus.devices[i].active = true; - } -} - -/** - * - */ -static size_t synth_search_rom(onewireDriver *owp, uint8_t *result, size_t max_rom_cnt) { - - size_t i; - - search_clean_start(&owp->search_rom); - - do { - /* initialize buffer to store result */ - if (owp->search_rom.reg.devices_found >= max_rom_cnt) - owp->search_rom.retbuf = result + 8*(max_rom_cnt-1); - else - owp->search_rom.retbuf = result + 8*owp->search_rom.reg.devices_found; - memset(owp->search_rom.retbuf, 0, 8); - - /* clean iteration state */ - search_clean_iteration(&owp->search_rom); - - /**/ - synth_reset_pulse(); - synth_bus.rom_bit = 0; - synth_bus.complement_bit = false; - for (i=0; i<64*3 - 1; i++){ - ow_search_rom_cb(NULL, owp); - } - - if (ONEWIRE_SEARCH_ROM_ERROR != owp->search_rom.reg.result) { - /* store cached result for usage in next iteration */ - memcpy(owp->search_rom.prev_path, owp->search_rom.retbuf, 8); - } - } - while (ONEWIRE_SEARCH_ROM_SUCCESS == owp->search_rom.reg.result); - - /**/ - if (ONEWIRE_SEARCH_ROM_ERROR == owp->search_rom.reg.result) - return 0; - else - return owp->search_rom.reg.devices_found; -} - -/** - * - */ -static void fill_pattern_real_devices(void) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - synth_bus.devices[0].active = true; - synth_bus.devices[0].id = 0x1d00000567f5ec28; - - synth_bus.devices[1].active = true; - synth_bus.devices[1].id = 0x37000005601abd28; - - synth_bus.devices[2].active = true; - synth_bus.devices[2].id = 0x0f000005677d8328; -} - -/** - * - */ -static void fill_pattern_00(size_t devices, size_t start) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = (start + i); - } -} - -/** - * - */ -static void fill_pattern_01(size_t devices) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = (devices - i); - } -} - -/** - * - */ -static void fill_pattern_02(size_t devices) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = ((uint64_t)1 << i); - } -} - -/** - * - */ -static void fill_pattern_03(size_t devices) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = ((uint64_t)0x8000000000000000 >> i); - } -} - -/** - * @brief random pattern helper - */ -static bool is_id_uniq(const OWSynthDevice *dev, size_t n, uint64_t id) { - size_t i; - - for (i=0; i<n; i++) { - if (dev[i].id == id) - return false; - } - return true; -} - -/** - * - */ -static void fill_pattern_rand(size_t devices) { - size_t i; - uint64_t new_id; - - for (i=0; i<SYNTH_DEVICES_MAX; i++){ - synth_bus.devices[i].active = false; - synth_bus.devices[i].id = 0; - } - - for (i=0; i<devices; i++) { - do { - new_id = rand(); - new_id = (new_id << 32) | rand(); - } while (true != is_id_uniq(synth_bus.devices, i, new_id)); - - synth_bus.devices[i].id = new_id; - synth_bus.devices[i].active = true; - } -} - -/** - * - */ -static bool check_result(size_t detected) { - - size_t i,j; - bool match = false; - - for (i=0; i<detected; i++){ - match = false; - for (j=0; j<detected; j++){ - if (synth_bus.devices[i].id == detected_devices[j]){ - match = true; - break; - } - } - if (false == match) - return OSAL_FAILED; - } - return OSAL_SUCCESS; -} - -/** - * - */ -void synthSearchRomTest(onewireDriver *owp) { - - size_t detected = 0; - size_t i; - - synth_bus.dev_present = 3; - fill_pattern_real_devices(); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - for (i=1; i<=SYNTH_DEVICES_MAX; i++){ - synth_bus.dev_present = i; - - fill_pattern_00(synth_bus.dev_present, 0); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_00(synth_bus.dev_present, 1); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_01(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_02(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_03(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - } - - i = 0; - while (i < 1000) { - synth_bus.dev_present = 1 + (rand() & 63); - - fill_pattern_rand(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - i++; - } -} - - diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/.cproject b/testhal/STM32/STM32F4xx/FSMC_NAND/.cproject index d5451e0..034a4fc 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/.cproject +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/.cproject @@ -1,33 +1,79 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> <storageModule moduleId="org.eclipse.cdt.core.settings"> - <cconfiguration id="0.1641850078"> - <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.1641850078" moduleId="org.eclipse.cdt.core.settings" name="Default"> + <cconfiguration id="0.114656749"> + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.114656749" moduleId="org.eclipse.cdt.core.settings" name="Default"> <externalSettings/> <extensions> - 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<tool id="org.eclipse.cdt.build.core.settings.holder.1841372361" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder"> - <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1747701731" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/> + <tool id="org.eclipse.cdt.build.core.settings.holder.1165165914" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder"> + <option id="org.eclipse.cdt.build.core.settings.holder.incpaths.143231825" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath"> + <listOptionValue builtIn="false" value="/opt/arm-none-eabi/arm-none-eabi/include"/> + <listOptionValue builtIn="false" value=""/opt/arm-none-eabi/lib/gcc/arm-none-eabi/${GCC_VERSION}/include""/> + <listOptionValue builtIn="false" value=""/opt/arm-none-eabi/lib/gcc/arm-none-eabi/${GCC_VERSION}/include-fixed""/> + </option> + <option id="org.eclipse.cdt.build.core.settings.holder.undef.incpaths.1282112545" name="Undefined Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.undef.incpaths" valueType="undefIncludePath"> + <listOptionValue builtIn="false" value="/usr/lib/gcc/x86_64-pc-linux-gnu/5.4.0/include/g++-v5"/> + <listOptionValue builtIn="false" value="/usr/include"/> + <listOptionValue builtIn="false" value="/usr/lib/gcc/x86_64-pc-linux-gnu/5.4.0/include/g++-v5/backward"/> + <listOptionValue builtIn="false" value="/usr/lib/gcc/x86_64-pc-linux-gnu/5.4.0/include"/> + <listOptionValue builtIn="false" value="/usr/lib/gcc/x86_64-pc-linux-gnu/5.4.0/include-fixed"/> + <listOptionValue builtIn="false" value="/usr/lib/gcc/x86_64-pc-linux-gnu/5.4.0/include/g++-v5/x86_64-pc-linux-gnu"/> + </option> + <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.714476670" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/> </tool> </toolChain> </folderInfo> @@ -41,12 +87,10 @@ </storageModule> <storageModule moduleId="scannerConfiguration"> <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - <scannerConfigBuildInfo instanceId="0.1570569554"> + <scannerConfigBuildInfo instanceId="0.114656749"> <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/> </scannerConfigBuildInfo> - <scannerConfigBuildInfo instanceId="0.1641850078"> - <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - </scannerConfigBuildInfo> </storageModule> <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> + <storageModule moduleId="refreshScope"/> </cproject> diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_spi.c b/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_spi.c index e36fbc9..3c60484 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_spi.c +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_spi.c @@ -53,6 +53,7 @@ static const SPIConfig spicfg = { GPIOA, GPIOA_SPI1_NSS, 0, //SPI_CR1_BR_1 | SPI_CR1_BR_0 + 0 }; static uint32_t ints; diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf.h b/testhal/STM32/STM32F4xx/FSMC_NAND/halconf.h index e690d15..dbc1950 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf.h +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/halconf.h @@ -62,7 +62,7 @@ * @brief Enables the EXT subsystem. */ #if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT TRUE +#define HAL_USE_EXT FALSE #endif /** diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c b/testhal/STM32/STM32F4xx/FSMC_NAND/main.c index 2379a12..e75a937 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/main.c @@ -56,8 +56,6 @@ ****************************************************************************** */ -#define USE_BAD_MAP TRUE - #define USE_KILL_BLOCK_TEST FALSE #define FSMCNAND_TIME_SET ((uint32_t) 2) //(8nS) @@ -74,7 +72,7 @@ #define NAND_COL_WRITE_CYCLES 2 #define NAND_TEST_START_BLOCK 1200 -#define NAND_TEST_END_BLOCK 1220 +#define NAND_TEST_END_BLOCK 1300 #if USE_KILL_BLOCK_TEST #define NAND_TEST_KILL_BLOCK 8000 @@ -88,6 +86,8 @@ #error "You should enable at least one NAND interface" #endif +#define BAD_MAP_LEN (NAND_BLOCKS_COUNT / (sizeof(bitmap_word_t) * 8)) + /* ****************************************************************************** * EXTERNS @@ -99,11 +99,6 @@ * PROTOTYPES ****************************************************************************** */ -#if STM32_NAND_USE_EXT_INT -static void ready_isr_enable(void); -static void ready_isr_disable(void); -static void nand_ready_cb(EXTDriver *extp, expchannel_t channel); -#endif /* ****************************************************************************** @@ -126,14 +121,14 @@ static time_measurement_t tmu_read_data; static time_measurement_t tmu_read_spare; static time_measurement_t tmu_driver_start; -#if USE_BAD_MAP -#define BAD_MAP_LEN (NAND_BLOCKS_COUNT / (sizeof(bitmap_word_t) * 8)) -static bitmap_word_t badblock_map_array[BAD_MAP_LEN]; +/* + * + */ +static bitmap_word_t badblock_map_array[BAD_MAP_LEN]; static bitmap_t badblock_map = { badblock_map_array, BAD_MAP_LEN }; -#endif /* * @@ -147,47 +142,11 @@ static const NANDConfig nandcfg = { NAND_COL_WRITE_CYCLES, /* stm32 specific fields */ ((FSMCNAND_TIME_HIZ << 24) | (FSMCNAND_TIME_HOLD << 16) | \ - (FSMCNAND_TIME_WAIT << 8) | FSMCNAND_TIME_SET), -#if STM32_NAND_USE_EXT_INT - ready_isr_enable, - ready_isr_disable -#endif + (FSMCNAND_TIME_WAIT << 8) | FSMCNAND_TIME_SET) }; -/** - * - */ -#if STM32_NAND_USE_EXT_INT -static const EXTConfig extcfg = { - { - {EXT_CH_MODE_DISABLED, NULL}, //0 - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, //4 - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_RISING_EDGE | EXT_MODE_GPIOD, nand_ready_cb}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, //8 - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, //12 - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, //16 - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, //20 - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - } -}; -#endif /* STM32_NAND_USE_EXT_INT */ - static volatile uint32_t BackgroundThdCnt = 0; +static thread_reference_t background_thd_ptr = NULL; #if USE_KILL_BLOCK_TEST static uint32_t KillCycle = 0; @@ -202,25 +161,10 @@ static uint32_t KillCycle = 0; */ static void nand_wp_assert(void) {palClearPad(GPIOB, GPIOB_NAND_WP);} static void nand_wp_release(void) {palSetPad(GPIOB, GPIOB_NAND_WP);} -static void red_led_on(void) {palSetPad(GPIOI, GPIOI_LED_R);} +//static void red_led_on(void) {palSetPad(GPIOI, GPIOI_LED_R);} static void red_led_off(void) {palClearPad(GPIOI, GPIOI_LED_R);} - -#if STM32_NAND_USE_EXT_INT -static void nand_ready_cb(EXTDriver *extp, expchannel_t channel){ - (void)extp; - (void)channel; - - NAND.isr_handler(&NAND); -} - -static void ready_isr_enable(void) { - extChannelEnable(&EXTD1, GPIOD_NAND_RB_NWAIT); -} - -static void ready_isr_disable(void) { - extChannelDisable(&EXTD1, GPIOD_NAND_RB_NWAIT); -} -#endif /* STM32_NAND_USE_EXT_INT */ +static void red_led_toggle(void) {palTogglePad(GPIOI, GPIOI_LED_R);} +static void green_led_toggle(void) {palTogglePad(GPIOI, GPIOI_LED_G);} /** * @@ -467,8 +411,6 @@ static void general_test (NANDDriver *nandp, size_t first, uint8_t op_status; uint32_t recc, wecc; - red_led_on(); - /* initialize time measurement units */ chTMObjectInit(&tmu_erase); chTMObjectInit(&tmu_write_data); @@ -478,16 +420,38 @@ static void general_test (NANDDriver *nandp, size_t first, /* perform basic checks */ for (block=first; block<last; block++){ + red_led_toggle(); + if (!nandIsBad(nandp, block)){ + if (!is_erased(nandp, block)){ + op_status = nandErase(nandp, block); + osalDbgCheck(0 == (op_status & 1)); /* operation failed */ + } + } + } + + /* check fail status */ + for (block=first; block<last; block++){ if (!nandIsBad(nandp, block)){ if (!is_erased(nandp, block)){ op_status = nandErase(nandp, block); osalDbgCheck(0 == (op_status & 1)); /* operation failed */ } + pattern_fill(); + op_status = nandWritePageData(nandp, block, 0, + nand_buf, nandp->config->page_data_size, &wecc); + osalDbgCheck(0 == (op_status & 1)); + + pattern_fill(); + op_status = nandWritePageData(nandp, block, 0, + nand_buf, nandp->config->page_data_size, &wecc); + /* operation must failed here because of write in unerased space */ + osalDbgCheck(1 == (op_status & 1)); } } /* write block with pattern, read it back and compare */ for (block=first; block<last; block++){ + red_led_toggle(); if (!nandIsBad(nandp, block)){ for (page=0; page<nandp->config->pages_per_block; page++){ pattern_fill(); @@ -538,17 +502,10 @@ static void general_test (NANDDriver *nandp, size_t first, red_led_off(); } - /* - ****************************************************************************** - * EXPORTED FUNCTIONS - ****************************************************************************** - */ - -/* - * Application entry point. + * */ -int main(void) { +static void nand_test(bool use_badblock_map) { /* performance counters */ int32_t adc_ints = 0; @@ -560,40 +517,26 @@ int main(void) { uint32_t background_cnt = 0; systime_t T = 0; - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - -#if STM32_NAND_USE_EXT_INT - extStart(&EXTD1, &extcfg); -#endif chTMObjectInit(&tmu_driver_start); chTMStartMeasurementX(&tmu_driver_start); -#if USE_BAD_MAP - nandStart(&NAND, &nandcfg, &badblock_map); -#else - nandStart(&NAND, &nandcfg, NULL); -#endif + if (use_badblock_map) { + nandStart(&NAND, &nandcfg, &badblock_map); + } + else { + nandStart(&NAND, &nandcfg, NULL); + } chTMStopMeasurementX(&tmu_driver_start); chThdSleepMilliseconds(4000); - chThdCreateStatic(BackgroundThreadWA, - sizeof(BackgroundThreadWA), - NORMALPRIO - 20, - BackgroundThread, - NULL); - - nand_wp_release(); + BackgroundThdCnt = 0; + if (NULL != background_thd_ptr) { + background_thd_ptr = chThdCreateStatic(BackgroundThreadWA, + sizeof(BackgroundThreadWA), NORMALPRIO - 10, BackgroundThread, NULL); + } /* - * run NAND test in parallel with DMA load and background thread + * run NAND test in parallel with DMA loads and background thread */ dma_storm_adc_start(); dma_storm_uart_start(); @@ -601,9 +544,9 @@ int main(void) { T = chVTGetSystemTimeX(); general_test(&NAND, NAND_TEST_START_BLOCK, NAND_TEST_END_BLOCK, 1); T = chVTGetSystemTimeX() - T; - adc_ints = dma_storm_adc_stop(); + adc_ints = dma_storm_adc_stop(); uart_ints = dma_storm_uart_stop(); - spi_ints = dma_storm_spi_stop(); + spi_ints = dma_storm_spi_stop(); chSysLock(); background_cnt = BackgroundThdCnt; BackgroundThdCnt = 0; @@ -632,6 +575,35 @@ int main(void) { * perform ECC calculation test */ ecc_test(&NAND, NAND_TEST_END_BLOCK); +} + +/* + ****************************************************************************** + * EXPORTED FUNCTIONS + ****************************************************************************** + */ + +/* + * Application entry point. + */ +int main(void) { + + + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + nand_wp_release(); + + nand_test(true); + nand_test(false); #if USE_KILL_BLOCK_TEST kill_block(&NAND, NAND_TEST_KILL_BLOCK); @@ -642,7 +614,9 @@ int main(void) { /* * Normal main() thread activity, in this demo it does nothing. */ + red_led_off(); while (true) { + green_led_toggle(); chThdSleepMilliseconds(500); } } diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h index 9638dbe..dd72e66 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h @@ -26,7 +26,6 @@ */ #define STM32_NAND_USE_FSMC_NAND1 TRUE #define STM32_NAND_USE_FSMC_NAND2 FALSE -#define STM32_NAND_USE_EXT_INT FALSE #define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_NAND_DMA_PRIORITY 0 #define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") diff --git a/testhal/STM32/STM32F4xx/onewire/.cproject b/testhal/STM32/STM32F4xx/onewire/.cproject index f6e2450..d2cdbd2 100644 --- a/testhal/STM32/STM32F4xx/onewire/.cproject +++ b/testhal/STM32/STM32F4xx/onewire/.cproject @@ -49,4 +49,5 @@ </scannerConfigBuildInfo>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+ <storageModule moduleId="refreshScope"/>
</cproject>
diff --git a/testhal/STM32/STM32F4xx/onewire/.project b/testhal/STM32/STM32F4xx/onewire/.project index 30d6ff3..a82f065 100644 --- a/testhal/STM32/STM32F4xx/onewire/.project +++ b/testhal/STM32/STM32F4xx/onewire/.project @@ -1,6 +1,6 @@ <?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
- <name>STM32F4xx-onewire</name>
+ <name>STM32F4xx-1-Wire</name>
<comment></comment>
<projects>
</projects>
@@ -80,12 +80,18 @@ <link>
<name>os-community</name>
<type>2</type>
- <locationURI>PARENT-4-PROJECT_LOC/os</locationURI>
+ <locationURI>CHIBIOS_CONTRIB/os</locationURI>
</link>
<link>
<name>os-git</name>
<type>2</type>
- <locationURI>PARENT-5-PROJECT_LOC/ChibiOS-RT/os</locationURI>
+ <locationURI>copy_PARENT/ChibiOS-RT/os</locationURI>
</link>
</linkedResources>
+ <variableList>
+ <variable>
+ <name>copy_PARENT</name>
+ <value>$%7BPARENT-1-CHIBIOS%7D</value>
+ </variable>
+ </variableList>
</projectDescription>
diff --git a/testhal/STM32/STM32F4xx/onewire/Makefile b/testhal/STM32/STM32F4xx/onewire/Makefile index 02ab018..092b023 100644 --- a/testhal/STM32/STM32F4xx/onewire/Makefile +++ b/testhal/STM32/STM32F4xx/onewire/Makefile @@ -88,6 +88,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +TESTHAL = $(CHIBIOS_CONTRIB)/testhal/common/onewire # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk # HAL-OSAL files (optional). @@ -113,7 +114,7 @@ CSRC = $(STARTUPSRC) \ $(BOARDSRC) \ $(TESTSRC) \ main.c \ - onewire_test.c + $(TESTHAL)/testhal_onewire.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -146,7 +147,8 @@ ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) INCDIR = $(CHIBIOS)/os/license \ $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various + $(CHIBIOS)/os/various \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/STM32/STM32F4xx/onewire/onewire_test.h b/testhal/STM32/STM32F4xx/onewire/boarddef.h index 1bec2d0..a048dcb 100644 --- a/testhal/STM32/STM32F4xx/onewire/onewire_test.h +++ b/testhal/STM32/STM32F4xx/onewire/boarddef.h @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS/RT - Copyright (C) 2016 Uladzimir Pylinsky aka barthess Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -14,15 +14,15 @@ limitations under the License. */ -#ifndef ONEWIRE_TEST_H_ -#define ONEWIRE_TEST_H_ +#ifndef BOARDDEF_H_ +#define BOARDDEF_H_ -#ifdef __cplusplus -extern "C" { -#endif - void onewireTest(void); -#ifdef __cplusplus -} -#endif +#define ONEWIRE_PORT GPIOB +#define ONEWIRE_PIN GPIOB_PIN0 +#define ONEWIRE_PAD_MODE_ACTIVE (PAL_MODE_ALTERNATE(2) | PAL_STM32_OTYPE_OPENDRAIN) +#define search_led_off() (palClearPad(GPIOD, GPIOD_LED4)) +#define search_led_on() (palSetPad(GPIOD, GPIOD_LED4)) +#define ONEWIRE_MASTER_CHANNEL 2 +#define ONEWIRE_SAMPLE_CHANNEL 3 -#endif /* ONEWIRE_TEST_H_ */ +#endif /* BOARDDEF_H_ */ diff --git a/testhal/STM32/STM32F4xx/onewire/main.c b/testhal/STM32/STM32F4xx/onewire/main.c index 793bffe..5265edc 100644 --- a/testhal/STM32/STM32F4xx/onewire/main.c +++ b/testhal/STM32/STM32F4xx/onewire/main.c @@ -17,7 +17,7 @@ #include "ch.h"
#include "hal.h"
-#include "onewire_test.h"
+#include "testhal_onewire.h"
/*
* Application entry point.
diff --git a/testhal/STM32/STM32F4xx/onewire/onewire_test.c b/testhal/STM32/STM32F4xx/onewire/onewire_test.c deleted file mode 100644 index be20dbc..0000000 --- a/testhal/STM32/STM32F4xx/onewire/onewire_test.c +++ /dev/null @@ -1,257 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include <string.h> - -#include "hal.h" - -/* - ****************************************************************************** - * DEFINES - ****************************************************************************** - */ - -#if defined(BOARD_ST_STM32F4_DISCOVERY) || \ - defined(BOARD_ST_STM32F0_DISCOVERY) || \ - defined(BOARD_ST_STM32F0308_DISCOVERY) - #if ONEWIRE_USE_STRONG_PULLUP - #error "This board has not enough voltage for this feature" - #endif -#endif - -#if defined(BOARD_ST_STM32F0308_DISCOVERY) - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN GPIOB_PIN0 - #define ONEWIRE_PAD_MODE_ACTIVE (PAL_MODE_ALTERNATE(1) | PAL_STM32_OTYPE_OPENDRAIN) - #define search_led_off() (palClearPad(GPIOC, GPIOC_LED4)) - #define search_led_on() (palSetPad(GPIOC, GPIOC_LED4)) - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#elif defined(BOARD_ST_STM32F4_DISCOVERY) - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN GPIOB_PIN0 - #define ONEWIRE_PAD_MODE_ACTIVE (PAL_MODE_ALTERNATE(2) | PAL_STM32_OTYPE_OPENDRAIN) - #define search_led_off() (palClearPad(GPIOD, GPIOD_LED4)) - #define search_led_on() (palSetPad(GPIOD, GPIOD_LED4)) - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#elif defined(BOARD_OLIMEX_STM32_103STK) - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN 0 - #define ONEWIRE_PAD_MODE_IDLE PAL_MODE_INPUT - #define ONEWIRE_PAD_MODE_ACTIVE PAL_MODE_STM32_ALTERNATE_OPENDRAIN - #define search_led_on() (palClearPad(GPIOC, GPIOC_LED)) - #define search_led_off() (palSetPad(GPIOC, GPIOC_LED)) - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#else - #define ONEWIRE_PORT GPIOB - #define ONEWIRE_PIN GPIOB_TACHOMETER - #include "pads.h" - #define ONEWIRE_PAD_MODE_ACTIVE (PAL_MODE_ALTERNATE(2) | PAL_STM32_OTYPE_OPENDRAIN) - #define search_led_on red_led_on - #define search_led_off red_led_off - #define ONEWIRE_MASTER_CHANNEL 2 - #define ONEWIRE_SAMPLE_CHANNEL 3 -#endif - -/* - ****************************************************************************** - * EXTERNS - ****************************************************************************** - */ - -/* - ****************************************************************************** - * PROTOTYPES - ****************************************************************************** - */ -/* - * Forward declarations - */ -#if ONEWIRE_USE_STRONG_PULLUP -static void strong_pullup_assert(void); -static void strong_pullup_release(void); -#endif - -/* - ****************************************************************************** - * GLOBAL VARIABLES - ****************************************************************************** - */ - -static uint8_t testbuf[12]; - -/* stores 3 temperature values in millicelsius */ -static int32_t temperature[3]; - -/* - * Config for underlied PWM driver. - * Note! It is NOT constant because 1-wire driver needs to change them - * during functioning. - */ -static PWMConfig pwm_cfg = { - 0, - 0, - NULL, - { - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} - }, - 0, -#if STM32_PWM_USE_ADVANCED - 0, -#endif - 0 -}; - -/* - * - */ -static const onewireConfig ow_cfg = { - &PWMD3, - &pwm_cfg, - PWM_OUTPUT_ACTIVE_LOW, - ONEWIRE_MASTER_CHANNEL, - ONEWIRE_SAMPLE_CHANNEL, - ONEWIRE_PORT, - ONEWIRE_PIN, -#if defined(STM32F1XX) - ONEWIRE_PAD_MODE_IDLE, -#endif - ONEWIRE_PAD_MODE_ACTIVE, -#if ONEWIRE_USE_STRONG_PULLUP - strong_pullup_assert, - strong_pullup_release -#endif -}; - -/* - ****************************************************************************** - ****************************************************************************** - * LOCAL FUNCTIONS - ****************************************************************************** - ****************************************************************************** - */ - -#if ONEWIRE_USE_STRONG_PULLUP -/** - * - */ -static void strong_pullup_assert(void) { - palSetPadMode(ONEWIRE_PORT, ONEWIRE_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL); -} - -/** - * - */ -static void strong_pullup_release(void) { - palSetPadMode(ONEWIRE_PORT, ONEWIRE_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); -} -#endif /* ONEWIRE_USE_STRONG_PULLUP */ - -/* - ****************************************************************************** - * EXPORTED FUNCTIONS - ****************************************************************************** - */ - -/** - * - */ -void onewireTest(void) { - - int16_t tmp; - uint8_t rombuf[24]; - size_t devices_on_bus = 0; - size_t i = 0; - bool presence; - - onewireObjectInit(&OWD1); - onewireStart(&OWD1, &ow_cfg); - -#if ONEWIRE_SYNTH_SEARCH_TEST - synthSearchRomTest(&OWD1); -#endif - - for (i=0; i<3; i++) - temperature[i] = -666; - - while (true) { - if (true == onewireReset(&OWD1)){ - - memset(rombuf, 0x55, sizeof(rombuf)); - search_led_on(); - devices_on_bus = onewireSearchRom(&OWD1, rombuf, 3); - search_led_off(); - osalDbgCheck(devices_on_bus <= 3); - osalDbgCheck(devices_on_bus > 0); - - if (1 == devices_on_bus){ - /* test read rom command */ - presence = onewireReset(&OWD1); - osalDbgCheck(true == presence); - testbuf[0] = ONEWIRE_CMD_READ_ROM; - onewireWrite(&OWD1, testbuf, 1, 0); - onewireRead(&OWD1, testbuf, 8); - osalDbgCheck(testbuf[7] == onewireCRC(testbuf, 7)); - osalDbgCheck(0 == memcmp(rombuf, testbuf, 8)); - } - - /* start temperature measurement on all connected devices at once */ - presence = onewireReset(&OWD1); - osalDbgCheck(true == presence); - testbuf[0] = ONEWIRE_CMD_SKIP_ROM; - testbuf[1] = ONEWIRE_CMD_CONVERT_TEMP; - -#if ONEWIRE_USE_STRONG_PULLUP - onewireWrite(&OWD1, testbuf, 2, MS2ST(750)); -#else - onewireWrite(&OWD1, testbuf, 2, 0); - /* poll bus waiting ready signal from all connected devices */ - testbuf[0] = 0; - while (testbuf[0] == 0){ - osalThreadSleepMilliseconds(50); - onewireRead(&OWD1, testbuf, 1); - } -#endif - - for (i=0; i<devices_on_bus; i++) { - /* read temperature device by device from their scratchpads */ - presence = onewireReset(&OWD1); - osalDbgCheck(true == presence); - - testbuf[0] = ONEWIRE_CMD_MATCH_ROM; - memcpy(&testbuf[1], &rombuf[i*8], 8); - testbuf[9] = ONEWIRE_CMD_READ_SCRATCHPAD; - onewireWrite(&OWD1, testbuf, 10, 0); - - onewireRead(&OWD1, testbuf, 9); - osalDbgCheck(testbuf[8] == onewireCRC(testbuf, 8)); - memcpy(&tmp, &testbuf, 2); - temperature[i] = ((int32_t)tmp * 625) / 10; - } - } - else { - osalSysHalt("No devices found"); - } - osalThreadSleep(1); /* enforce ChibiOS's stack overflow check */ - } - - onewireStop(&OWD1); -} diff --git a/testhal/STM32/STM32F4xx/onewire/real_roms.txt b/testhal/STM32/STM32F4xx/onewire/real_roms.txt deleted file mode 100644 index ea19c1a..0000000 --- a/testhal/STM32/STM32F4xx/onewire/real_roms.txt +++ /dev/null @@ -1,27 +0,0 @@ -rombuf[0] 0x28 -rombuf[1] 0xec -rombuf[2] 0xf5 -rombuf[3] 0x67 -rombuf[4] 0x5 -rombuf[5] 0x0 -rombuf[6] 0x0 -rombuf[7] 0x1d - -rombuf[8] 0x28 -rombuf[9] 0xbd -rombuf[10] 0x1a -rombuf[11] 0x60 -rombuf[12] 0x5 -rombuf[13] 0x0 -rombuf[14] 0x0 -rombuf[15] 0x37 - -rombuf[16] 0x28 -rombuf[17] 0x83 -rombuf[18] 0x7d -rombuf[19] 0x67 -rombuf[20] 0x5 -rombuf[21] 0x0 -rombuf[22] 0x0 -rombuf[23] 0xf - diff --git a/testhal/STM32/STM32F4xx/onewire/search_rom_synth.c b/testhal/STM32/STM32F4xx/onewire/search_rom_synth.c deleted file mode 100644 index cd2528f..0000000 --- a/testhal/STM32/STM32F4xx/onewire/search_rom_synth.c +++ /dev/null @@ -1,370 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include <stdlib.h> - -/* - ****************************************************************************** - * DEFINES - ****************************************************************************** - */ - -/* do not set it more than 64 because of some fill_pattern functions - * will be broken.*/ -#define SYNTH_DEVICES_MAX 64 - -/* - * synthetic device - */ -typedef struct { - bool active; - uint64_t id; -} OWSynthDevice; - -/* - * synthetic bus - */ -typedef struct { - OWSynthDevice devices[SYNTH_DEVICES_MAX]; - size_t dev_present; - bool complement_bit; - ioline_t rom_bit; -} OWSynthBus; - -/* - ****************************************************************************** - * EXTERNS - ****************************************************************************** - */ - -/* - ****************************************************************************** - * PROTOTYPES - ****************************************************************************** - */ - -/* - ****************************************************************************** - * GLOBAL VARIABLES - ****************************************************************************** - */ - -static OWSynthBus synth_bus; - -/* - * local buffer for discovered ROMs - */ -static uint64_t detected_devices[SYNTH_DEVICES_MAX]; - -/* - ****************************************************************************** - ****************************************************************************** - * LOCAL FUNCTIONS - ****************************************************************************** - ****************************************************************************** - */ - -/* - ****************************************************************************** - * EXPORTED FUNCTIONS - ****************************************************************************** - */ - -/** - * - */ -void _synth_ow_write_bit(onewireDriver *owp, ioline_t bit) { - (void)owp; - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) { - if (((synth_bus.devices[i].id >> synth_bus.rom_bit) & 1U) != bit) { - synth_bus.devices[i].active = false; - } - } - synth_bus.rom_bit++; -} - -/** - * - */ -ioline_t _synth_ow_read_bit(void) { - ioline_t ret = 0xFF; - size_t i; - ioline_t bit; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) { - if (synth_bus.devices[i].active){ - bit = (synth_bus.devices[i].id >> synth_bus.rom_bit) & 1U; - if (synth_bus.complement_bit){ - bit ^= 1U; - } - if (0xFF == ret) - ret = bit; - else - ret &= bit; - } - } - synth_bus.complement_bit = !synth_bus.complement_bit; - return ret; -} - -/** - * - */ -static void synth_reset_pulse(void){ - size_t i; - - for (i=0; i<synth_bus.dev_present; i++){ - synth_bus.devices[i].active = true; - } -} - -/** - * - */ -static size_t synth_search_rom(onewireDriver *owp, uint8_t *result, size_t max_rom_cnt) { - - size_t i; - - search_clean_start(&owp->search_rom); - - do { - /* initialize buffer to store result */ - if (owp->search_rom.reg.devices_found >= max_rom_cnt) - owp->search_rom.retbuf = result + 8*(max_rom_cnt-1); - else - owp->search_rom.retbuf = result + 8*owp->search_rom.reg.devices_found; - memset(owp->search_rom.retbuf, 0, 8); - - /* clean iteration state */ - search_clean_iteration(&owp->search_rom); - - /**/ - synth_reset_pulse(); - synth_bus.rom_bit = 0; - synth_bus.complement_bit = false; - for (i=0; i<64*3 - 1; i++){ - ow_search_rom_cb(NULL, owp); - } - - if (ONEWIRE_SEARCH_ROM_ERROR != owp->search_rom.reg.result) { - /* store cached result for usage in next iteration */ - memcpy(owp->search_rom.prev_path, owp->search_rom.retbuf, 8); - } - } - while (ONEWIRE_SEARCH_ROM_SUCCESS == owp->search_rom.reg.result); - - /**/ - if (ONEWIRE_SEARCH_ROM_ERROR == owp->search_rom.reg.result) - return 0; - else - return owp->search_rom.reg.devices_found; -} - -/** - * - */ -static void fill_pattern_real_devices(void) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - synth_bus.devices[0].active = true; - synth_bus.devices[0].id = 0x1d00000567f5ec28; - - synth_bus.devices[1].active = true; - synth_bus.devices[1].id = 0x37000005601abd28; - - synth_bus.devices[2].active = true; - synth_bus.devices[2].id = 0x0f000005677d8328; -} - -/** - * - */ -static void fill_pattern_00(size_t devices, size_t start) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = (start + i); - } -} - -/** - * - */ -static void fill_pattern_01(size_t devices) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = (devices - i); - } -} - -/** - * - */ -static void fill_pattern_02(size_t devices) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = ((uint64_t)1 << i); - } -} - -/** - * - */ -static void fill_pattern_03(size_t devices) { - size_t i; - - for (i=0; i<SYNTH_DEVICES_MAX; i++) - synth_bus.devices[i].active = false; - - for (i=0; i<devices; i++){ - synth_bus.devices[i].active = true; - synth_bus.devices[i].id = ((uint64_t)0x8000000000000000 >> i); - } -} - -/** - * @brief random pattern helper - */ -static bool is_id_uniq(const OWSynthDevice *dev, size_t n, uint64_t id) { - size_t i; - - for (i=0; i<n; i++) { - if (dev[i].id == id) - return false; - } - return true; -} - -/** - * - */ -static void fill_pattern_rand(size_t devices) { - size_t i; - uint64_t new_id; - - for (i=0; i<SYNTH_DEVICES_MAX; i++){ - synth_bus.devices[i].active = false; - synth_bus.devices[i].id = 0; - } - - for (i=0; i<devices; i++) { - do { - new_id = rand(); - new_id = (new_id << 32) | rand(); - } while (true != is_id_uniq(synth_bus.devices, i, new_id)); - - synth_bus.devices[i].id = new_id; - synth_bus.devices[i].active = true; - } -} - -/** - * - */ -static bool check_result(size_t detected) { - - size_t i,j; - bool match = false; - - for (i=0; i<detected; i++){ - match = false; - for (j=0; j<detected; j++){ - if (synth_bus.devices[i].id == detected_devices[j]){ - match = true; - break; - } - } - if (false == match) - return OSAL_FAILED; - } - return OSAL_SUCCESS; -} - -/** - * - */ -void synthSearchRomTest(onewireDriver *owp) { - - size_t detected = 0; - size_t i; - - synth_bus.dev_present = 3; - fill_pattern_real_devices(); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - for (i=1; i<=SYNTH_DEVICES_MAX; i++){ - synth_bus.dev_present = i; - - fill_pattern_00(synth_bus.dev_present, 0); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_00(synth_bus.dev_present, 1); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_01(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_02(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - - fill_pattern_03(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - } - - i = 0; - while (i < 1000) { - synth_bus.dev_present = 1 + (rand() & 63); - - fill_pattern_rand(synth_bus.dev_present); - detected = synth_search_rom(owp, (uint8_t *)detected_devices, SYNTH_DEVICES_MAX); - osalDbgCheck(synth_bus.dev_present == detected); - osalDbgCheck(OSAL_SUCCESS == check_result(detected)); - i++; - } -} - - diff --git a/testhal/STM32/STM32F7xx/USB_MSD/.cproject b/testhal/STM32/STM32F7xx/USB_MSD/.cproject new file mode 100644 index 0000000..e263f01 --- /dev/null +++ b/testhal/STM32/STM32F7xx/USB_MSD/.cproject @@ -0,0 +1,50 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> 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superClass="org.eclipse.cdt.build.core.settings.holder"> + <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.154285937" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/> + </tool> + </toolChain> + </folderInfo> + </configuration> + </storageModule> + <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/> + </cconfiguration> + </storageModule> + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> + <project id="STM32F7xx-USB_RAW.null.1373754647" name="STM32F7xx-USB_RAW"/> + </storageModule> + <storageModule moduleId="scannerConfiguration"> + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> + <scannerConfigBuildInfo instanceId="0.1487191575"> + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/> + </scannerConfigBuildInfo> + </storageModule> + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> + <storageModule moduleId="refreshScope"/> +</cproject> diff --git a/testhal/STM32/STM32F7xx/USB_MSD/.project b/testhal/STM32/STM32F7xx/USB_MSD/.project new file mode 100644 index 0000000..ac40e79 --- /dev/null +++ b/testhal/STM32/STM32F7xx/USB_MSD/.project @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32F7xx-USB_MSD</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <triggers>full,incremental,</triggers> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>os</name> + <type>2</type> + <locationURI>CHIBIOS/os</locationURI> + </link> + <link> + <name>os-contrib</name> + <type>2</type> + <locationURI>CHIBIOS_CONTRIB/os</locationURI> + </link> + <link> + <name>test</name> + <type>2</type> + <locationURI>CHIBIOS/test</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/testhal/STM32/STM32F7xx/USB_MSD/Makefile b/testhal/STM32/STM32F7xx/USB_MSD/Makefile new file mode 100644 index 0000000..ac17448 --- /dev/null +++ b/testhal/STM32/STM32F7xx/USB_MSD/Makefile @@ -0,0 +1,233 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = no +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# FPU-related options. +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv5-sp-d16 -fsingle-precision-constant +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib + +# Startup files. +include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk +# HAL-OSAL files (optional). +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk +include $(CHIBIOS)/os/hal/ports/STM32/STM32F7xx/platform.mk +include $(CHIBIOS)/os/hal/boards/ST_NUCLEO144_F767ZI/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# Other files (optional). +include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/os/hal/lib/streams/streams.mk +include $(CHIBIOS)/os/various/shell/shell.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/STM32F767Zx.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(STARTUPSRC) \ + $(KERNSRC) \ + $(PORTSRC) \ + $(OSALSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(TESTSRC) \ + $(STREAMSSRC) \ + $(SHELLSRC) \ + $(CHIBIOS_CONTRIB)/os/various/ramdisk.c \ + $(CHIBIOS_CONTRIB)/os/various/lib_scsi.c \ + usbcfg.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = +ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) + +INCDIR = $(CHIBIOS)/os/license \ + $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ + $(STREAMSINC) $(SHELLINC) \ + $(CHIBIOS_CONTRIB)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m7 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = ccache $(TRGT)gcc +CPPC = ccache $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra -Wundef + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/testhal/STM32/STM32F7xx/USB_MSD/chconf.h b/testhal/STM32/STM32F7xx/USB_MSD/chconf.h new file mode 100644 index 0000000..8bdd9f2 --- /dev/null +++ b/testhal/STM32/STM32F7xx/USB_MSD/chconf.h @@ -0,0 +1,522 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_ST_RESOLUTION 32 + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#define CH_CFG_ST_FREQUENCY 10000 + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#define CH_CFG_ST_TIMEDELTA 2 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#define CH_CFG_TIME_QUANTUM 0 + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#define CH_CFG_MEMCORE_SIZE 0 + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#define CH_CFG_NO_IDLE_THREAD FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#define CH_CFG_OPTIMIZE_SPEED TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_TM TRUE + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_REGISTRY TRUE + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_WAITEXIT TRUE + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_SEMAPHORES TRUE + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MUTEXES TRUE + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#define CH_CFG_USE_CONDVARS TRUE + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_EVENTS TRUE + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MESSAGES TRUE + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_MAILBOXES TRUE + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMCORE TRUE + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#define CH_CFG_USE_HEAP TRUE + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMPOOLS TRUE + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#define CH_CFG_USE_DYNAMIC TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_STATISTICS FALSE + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_SYSTEM_STATE_CHECK TRUE + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_CHECKS TRUE + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_ASSERTS TRUE + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#define CH_DBG_TRACE_BUFFER_SIZE 128 + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#define CH_DBG_ENABLE_STACK_CHECK TRUE + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_FILL_THREADS TRUE + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#define CH_DBG_THREADS_PROFILING FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#define CORTEX_VTOR_INIT 0x00200000U + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testhal/STM32/STM32F7xx/USB_MSD/halconf.h b/testhal/STM32/STM32F7xx/USB_MSD/halconf.h new file mode 100644 index 0000000..bf1b023 --- /dev/null +++ b/testhal/STM32/STM32F7xx/USB_MSD/halconf.h @@ -0,0 +1,401 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the QSPI subsystem. + */ +#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__) +#define HAL_USE_QSPI FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 115200 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 80 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT TRUE +#endif + +/*===========================================================================*/ +/* Community drivers's includes */ +/*===========================================================================*/ + +#include "halconf_community.h" + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/testhal/STM32/STM32F7xx/USB_MSD/halconf_community.h b/testhal/STM32/STM32F7xx/USB_MSD/halconf_community.h new file mode 100644 index 0000000..943992f --- /dev/null +++ b/testhal/STM32/STM32F7xx/USB_MSD/halconf_community.h @@ -0,0 +1,105 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _HALCONF_COMMUNITY_H_ +#define _HALCONF_COMMUNITY_H_ + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD TRUE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +#endif /* _HALCONF_COMMUNITY_H_ */ + +/** @} */ diff --git a/testhal/STM32/STM32F7xx/USB_MSD/main.c b/testhal/STM32/STM32F7xx/USB_MSD/main.c new file mode 100644 index 0000000..cae2b74 --- /dev/null +++ b/testhal/STM32/STM32F7xx/USB_MSD/main.c @@ -0,0 +1,126 @@ +/* + ChibiOS/HAL - Copyright (C) 2016 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include <stdio.h> +#include <string.h> + +#include "ch.h" +#include "hal.h" + +#include "usbcfg.h" +#include "hal_usb_msd.h" + +#include "ramdisk.h" +#include "romfs_img.h" + +#define RAMDISK_BLOCK_SIZE 512U +#define RAMDISK_BLOCK_CNT 700U + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static THD_WORKING_AREA(waThread1, 128); +static THD_FUNCTION(Thread1, arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (true) { + systime_t time; + + time = USBD1.state == USB_ACTIVE ? 100 : 500; + palSetPad(GPIOB, GPIOB_LED1); + chThdSleepMilliseconds(time); + palClearPad(GPIOB, GPIOB_LED1); + chThdSleepMilliseconds(time); + } +} + +RamDisk ramdisk; +__attribute__((section("DATA_RAM"))) static uint8_t ramdisk_storage[RAMDISK_BLOCK_SIZE * RAMDISK_BLOCK_CNT]; +static uint8_t blkbuf[RAMDISK_BLOCK_SIZE]; + +BaseSequentialStream *GlobalDebugChannel; + +static const SerialConfig sercfg = { + 115200, + 0, + 0, + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + sdStart(&SD3, &sercfg); + GlobalDebugChannel = (BaseSequentialStream *)&SD3; + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + * Note, a delay is inserted in order to not have to disconnect the cable + * after a reset. + */ + usbDisconnectBus(&USBD1); + chThdSleepMilliseconds(1500); + usbStart(&USBD1, &usbcfg); + + /* + * start RAM disk + */ + ramdiskObjectInit(&ramdisk); + memset(ramdisk_storage, 0x55, sizeof(ramdisk_storage)); + osalDbgCheck(sizeof(ramdisk_storage) >= romfs_bin_len); + memcpy(ramdisk_storage, romfs_bin, romfs_bin_len); + ramdiskStart(&ramdisk, ramdisk_storage, RAMDISK_BLOCK_SIZE, + RAMDISK_BLOCK_CNT, false); + + /* + * start mass storage + */ + msdObjectInit(&USBMSD1); + msdStart(&USBMSD1, &USBD1, (BaseBlockDevice *)&ramdisk, blkbuf, NULL); + + /* + * + */ + usbConnectBus(&USBD1); + + /* + * Starting threads. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (true) { + chThdSleepMilliseconds(1000); + } + + msdStop(&USBMSD1); +} diff --git a/testhal/STM32/STM32F7xx/USB_MSD/mcuconf.h b/testhal/STM32/STM32F7xx/USB_MSD/mcuconf.h new file mode 100644 index 0000000..c7bf7a1 --- /dev/null +++ b/testhal/STM32/STM32F7xx/USB_MSD/mcuconf.h @@ -0,0 +1,386 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F7xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED TRUE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 432 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE_VALUE 25 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV4 +#define STM32_I2SSRC STM32_I2SSRC_PLLI2S +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SP_VALUE 4 +#define STM32_PLLI2SQ_VALUE 4 +#define STM32_PLLI2SR_VALUE 4 +#define STM32_PLLSAIN_VALUE 192 +#define STM32_PLLSAIP_VALUE 4 +#define STM32_PLLSAIQ_VALUE 4 +#define STM32_PLLSAIR_VALUE 4 +#define STM32_PLLSAIDIVR STM32_PLLSAIDIVR_OFF +#define STM32_SAI1SEL STM32_SAI1SEL_OFF +#define STM32_SAI2SEL STM32_SAI2SEL_OFF +#define STM32_USART1SEL STM32_USART1SEL_PCLK2 +#define STM32_USART2SEL STM32_USART2SEL_PCLK1 +#define STM32_USART3SEL STM32_USART3SEL_PCLK1 +#define STM32_UART4SEL STM32_UART4SEL_PCLK1 +#define STM32_UART5SEL STM32_UART5SEL_PCLK1 +#define STM32_USART6SEL STM32_USART6SEL_PCLK2 +#define STM32_UART7SEL STM32_UART7SEL_PCLK1 +#define STM32_UART8SEL STM32_UART8SEL_PCLK1 +#define STM32_I2C1SEL STM32_I2C1SEL_PCLK1 +#define STM32_I2C2SEL STM32_I2C2SEL_PCLK1 +#define STM32_I2C3SEL STM32_I2C3SEL_PCLK1 +#define STM32_I2C4SEL STM32_I2C4SEL_PCLK1 +#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 +#define STM32_CECSEL STM32_CECSEL_LSE +#define STM32_CK48MSEL STM32_CK48MSEL_PLL +#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SRAM2_NOCACHE FALSE + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 FALSE +#define STM32_DAC_USE_DAC1_CH2 FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_USE_I2C4 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C4_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C4_DMA_PRIORITY 3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 + +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 + +/* + * SDC driver system settings. + */ +#define STM32_SDC_USE_SDMMC1 FALSE +#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE +#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000 +#define STM32_SDC_SDMMC_READ_TIMEOUT 1000 +#define STM32_SDC_SDMMC_CLOCK_DELAY 10 +#define STM32_SDC_SDMMC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SDC_SDMMC1_DMA_PRIORITY 3 +#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 TRUE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USE_UART7 FALSE +#define STM32_SERIAL_USE_UART8 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 +#define STM32_SERIAL_UART7_PRIORITY 12 +#define STM32_SERIAL_UART8_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI4 FALSE +#define STM32_SPI_USE_SPI5 FALSE +#define STM32_SPI_USE_SPI6 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_SPI_SPI5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_SPI_SPI6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) +#define STM32_SPI_SPI6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI4_DMA_PRIORITY 1 +#define STM32_SPI_SPI5_DMA_PRIORITY 1 +#define STM32_SPI_SPI6_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI4_IRQ_PRIORITY 10 +#define STM32_SPI_SPI5_IRQ_PRIORITY 10 +#define STM32_SPI_SPI6_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_UART4 FALSE +#define STM32_UART_USE_UART5 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USE_UART7 FALSE +#define STM32_UART_USE_UART8 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_UART7_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART7_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_UART8_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_UART8_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_UART4_IRQ_PRIORITY 12 +#define STM32_UART_UART5_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_UART4_DMA_PRIORITY 0 +#define STM32_UART_UART5_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_UART7_DMA_PRIORITY 0 +#define STM32_UART_UART8_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 TRUE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */ diff --git a/testhal/STM32/STM32F7xx/USB_MSD/readme.txt b/testhal/STM32/STM32F7xx/USB_MSD/readme.txt new file mode 100644 index 0000000..ba23a07 --- /dev/null +++ b/testhal/STM32/STM32F7xx/USB_MSD/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/HAL - USB MSD driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an ST NUCLEO144-F767ZI board. + +** The Demo ** + +The application demonstrates the use of the STM32 USB (OTG) driver as +a mass storage device. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32/STM32F7xx/USB_MSD/romfs_img.h b/testhal/STM32/STM32F7xx/USB_MSD/romfs_img.h new file mode 100644 index 0000000..2755b37 --- /dev/null +++ b/testhal/STM32/STM32F7xx/USB_MSD/romfs_img.h @@ -0,0 +1,3775 @@ +/* + ChibiOS/HAL - Copyright (C) 2016 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +const uint8_t romfs_bin[] = { + 0x2d, 0x72, 0x6f, 0x6d, 0x31, 0x66, 0x73, 0x2d, 0x00, 0x00, 0xb0, 0x00, + 0x5a, 0xbe, 0xcd, 0xd1, 0x72, 0x6f, 0x6d, 0x20, 0x35, 0x37, 0x66, 0x63, + 0x61, 0x39, 0x36, 0x65, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, + 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0xd1, 0xff, 0xff, 0x97, + 0x2e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x20, + 0x00, 0x00, 0x00, 0x00, 0xd1, 0xd1, 0xff, 0x80, 0x2e, 0x2e, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x24, 0xc9, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, + 0x2a, 0x25, 0xf9, 0xd7, 0x74, 0x65, 0x78, 0x6d, 0x61, 0x74, 0x68, 0x73, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" + +#include "hal_usb_cdc.h" +#include "hal_usb_msd.h" +#include "usbcfg.h" + +/* + * USB Device Descriptor. + */ +static const uint8_t vcom_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0200, /* bcdUSB (2.0). */ + 0x02, /* bDeviceClass (CDC). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x5740, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor vcom_device_descriptor = { + sizeof vcom_device_descriptor_data, + vcom_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t vcom_configuration_descriptor_data[67] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(0x0020, /* wTotalLength. */ + 0x01, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 0x32), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x08, /* bInterfaceClass (Mass Storage) */ + 0x06, /* bInterfaceSubClass (SCSI + Transparent storage class) */ + 0x50, /* bInterfaceProtocol (Bulk Only) */ + 0), /* iInterface. (none) */ + /* Mass Storage Data In Endpoint Descriptor.*/ + USB_DESC_ENDPOINT (USB_MSD_DATA_EP | 0x80, + 0x02, /* bmAttributes (Bulk). */ + USB_MSD_EP_SIZE, /* wMaxPacketSize. */ + 0x00), /* bInterval. 1ms */ + /* Mass Storage Data Out Endpoint Descriptor.*/ + USB_DESC_ENDPOINT (USB_MSD_DATA_EP, + 0x02, /* bmAttributes (Bulk). */ + USB_MSD_EP_SIZE, /* wMaxPacketSize. */ + 0x00) /* bInterval. 1ms */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor vcom_configuration_descriptor = { + sizeof vcom_configuration_descriptor_data, + vcom_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t vcom_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t vcom_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t vcom_string2[] = { + USB_DESC_BYTE(62), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0, ' ', 0, + 'S', 0, 't', 0, 'o', 0, 'r', 0, 'a', 0, 'g', 0, 'e', 0, ' ', 0, + 'D', 0, 'e', 0, 'v', 0, 'i', 0, 'c', 0, 'e', 0 +}; + +static const uint8_t vcom_string3[] = { + USB_DESC_BYTE(26), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'A', 0, 'E', 0, 'C', 0, 'C', 0, 'E', 0, 'C', 0, 'C', 0, 'C', 0, 'C', 0, + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor vcom_strings[] = { + {sizeof vcom_string0, vcom_string0}, + {sizeof vcom_string1, vcom_string1}, + {sizeof vcom_string2, vcom_string2}, + {sizeof vcom_string3, vcom_string3} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &vcom_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &vcom_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 4) + return &vcom_strings[dindex]; + } + return NULL; +} + +/** + * @brief IN EP1 state. + */ +static USBInEndpointState ep1instate; + +/** + * @brief OUT EP1 state. + */ +static USBOutEndpointState ep1outstate; + +/** + * @brief EP1 initialization structure (both IN and OUT). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK, + NULL, + NULL, + NULL, + USB_MSD_EP_SIZE, + USB_MSD_EP_SIZE, + &ep1instate, + &ep1outstate, + 4, + NULL +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + chSysLockFromISR(); + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + usbInitEndpointI(usbp, USBD1_DATA_REQUEST_EP, &ep1config); + chSysUnlockFromISR(); + return; + case USB_EVENT_UNCONFIGURED: + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * USB driver configuration. + */ +const USBConfig usbcfg = { + usb_event, + get_descriptor, + msd_request_hook, + NULL +}; + diff --git a/testhal/STM32/STM32F1xx/onewire/onewire_test.h b/testhal/STM32/STM32F7xx/USB_MSD/usbcfg.h index 1bec2d0..496f478 100644 --- a/testhal/STM32/STM32F1xx/onewire/onewire_test.h +++ b/testhal/STM32/STM32F7xx/USB_MSD/usbcfg.h @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -14,15 +14,15 @@ limitations under the License. */ -#ifndef ONEWIRE_TEST_H_ -#define ONEWIRE_TEST_H_ +#ifndef USBCFG_H +#define USBCFG_H -#ifdef __cplusplus -extern "C" { -#endif - void onewireTest(void); -#ifdef __cplusplus -} -#endif +#define USBD1_DATA_REQUEST_EP 1 +#define USBD1_DATA_AVAILABLE_EP 1 +#define USBD1_INTERRUPT_REQUEST_EP 2 -#endif /* ONEWIRE_TEST_H_ */ +extern const USBConfig usbcfg; + +#endif /* USBCFG_H */ + +/** @} */ |