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* Add CRC DriverMichael Spradling2015-08-162-0/+159
| | | | | | | | | | | | | | | | | | | | | | This patch includes a high level and two low level drivers. The high level driver is enabled with flag HAL_USE_CRC The low level drivers include: * Hardware CRC for the STM32 cortex processor lines.(when supported) * Enabled with flag STM32_CRC_USE_CRC1 * DMA is enabled with CRC_USE_DMA * SYNC api will use DMA, but put calling thread to sleep * ASYNC api enabled. * DMA Disabled * SYNC api spin while calculating CRC * ASYNC api disabled * Software CRC (3 modes) * CRCSW_CRC32_TABLE - Enables crc32 with lookup table. * CRCSW_CRC16_TABLE - Enables crc16 with lookup tables. * CRCSW_PROGRAMMBLE - Enables any crc done with computation. * Can calculate any crc configuration. * CRC_USE_DMA obviously not support with software CRC
* Fixed copyright notesbarthess2015-05-023-32/+20
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* NAND code changed to use bitmap classbarthess2015-05-021-17/+14
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* EICU. Updated authors.barthess2015-03-131-0/+4
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* EICU. Cosmetical improvements.barthess2015-03-031-11/+11
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* EICU now able to capture data on all channelsbarthess2015-03-031-77/+19
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* EICU. Fixed handlign of 32-bit timers. General code cleanup. PWM mode still ↵barthess2015-03-011-35/+41
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* EICU. Fixed another portion of typos.barthess2015-03-011-1/+1
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* Added EICU driver in HAL. Added STM32 backend for EICU.barthess2015-02-282-0/+240
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* 1-wire. STM32F1xx code testedbarthess2014-12-181-10/+22
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* 1-wire. Search ROM feature now optionalbarthess2014-12-061-2/+11
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* 1-wire. Improved commentsbarthess2014-12-061-34/+130
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* Added onewire driverbarthess2014-12-062-0/+235
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* Fixed copyrightsbarthess2014-12-061-2/+1
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* Added hooks for community sourcebarthess2014-11-161-0/+74
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* Added fsmc codebarthess2014-10-181-0/+148