Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | STM32 mass update to current naming convention in ChibiOS | barthess | 2016-04-07 | 16 | -4147/+4147 |
| | |||||
* | 1-wire. Fixed possible deadlock situation. | barthess | 2016-03-28 | 1 | -13/+10 |
| | | | | | In old code thread could be suspended *after* the callback was called. New code protected with more wide critical section. | ||||
* | QUEUES flags deleted from chconf.h files | barthess | 2016-03-28 | 1 | -1/+1 |
| | |||||
* | Merge branch 'master' into rng | Stephane D'Alu | 2016-02-21 | 12 | -0/+5264 |
|\ | | | | | | | | | | | | | | | | | Added haltest Conflicts: os/hal/hal.mk os/hal/include/hal_community.h os/hal/src/hal_community.c | ||||
| * | TIMCAP: Initial commit | Fabien Poussin | 2016-02-16 | 2 | -0/+163 |
| | | |||||
| * | EEPROM: Initial commit | Fabien Poussin | 2016-02-16 | 3 | -0/+954 |
| | | |||||
| * | USB-Host: Initial commit | Fabien Poussin | 2016-02-15 | 8 | -0/+4147 |
| | | |||||
* | | cleanup | Stephane D'Alu | 2016-02-09 | 1 | -11/+8 |
| | | |||||
* | | Random Number Generator driver | Stephane D'Alu | 2016-02-08 | 2 | -0/+189 |
|/ | |||||
* | Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib | barthess | 2016-01-24 | 5 | -5/+5 |
|\ | |||||
| * | Fixed typo | barthess | 2015-10-14 | 1 | -1/+1 |
| | | |||||
| * | FSMC code cleanup | barthess | 2015-10-14 | 5 | -5/+5 |
| | | |||||
* | | 1-wire driver improvements. | barthess | 2016-01-24 | 1 | -47/+45 |
|/ | |||||
* | Update code from code feedback | Michael Spradling | 2015-08-16 | 1 | -5/+6 |
| | |||||
* | Add CRC Driver | Michael Spradling | 2015-08-16 | 2 | -0/+267 |
| | | | | | | | | | | | | | | | | | | | | | | This patch includes a high level and two low level drivers. The high level driver is enabled with flag HAL_USE_CRC The low level drivers include: * Hardware CRC for the STM32 cortex processor lines.(when supported) * Enabled with flag STM32_CRC_USE_CRC1 * DMA is enabled with CRC_USE_DMA * SYNC api will use DMA, but put calling thread to sleep * ASYNC api enabled. * DMA Disabled * SYNC api spin while calculating CRC * ASYNC api disabled * Software CRC (3 modes) * CRCSW_CRC32_TABLE - Enables crc32 with lookup table. * CRCSW_CRC16_TABLE - Enables crc16 with lookup tables. * CRCSW_PROGRAMMBLE - Enables any crc done with computation. * Can calculate any crc configuration. * CRC_USE_DMA obviously not support with software CRC | ||||
* | NAND. Minor improvements | barthess | 2015-05-08 | 1 | -19/+16 |
| | |||||
* | Fixed copyright notes | barthess | 2015-05-02 | 2 | -30/+20 |
| | |||||
* | NAND code changed to use bitmap class | barthess | 2015-05-02 | 1 | -82/+59 |
| | |||||
* | EICU. Updated authors. | barthess | 2015-03-13 | 1 | -0/+4 |
| | |||||
* | EICU. Fixed handlign of 32-bit timers. General code cleanup. PWM mode still ↵ | barthess | 2015-03-01 | 1 | -2/+2 |
| | | | | untested. | ||||
* | EICU. Fixed another portion of typos. | barthess | 2015-03-01 | 1 | -1/+1 |
| | |||||
* | Added EICU driver in HAL. Added STM32 backend for EICU. | barthess | 2015-02-28 | 2 | -0/+153 |
| | |||||
* | [1-wire] Cosmetical cleanups | barthess | 2014-12-27 | 1 | -30/+29 |
| | |||||
* | 1-wire. STM32F1xx code tested | barthess | 2014-12-18 | 1 | -63/+105 |
| | |||||
* | 1-wire. Added workaround form F1xx MCUs | barthess | 2014-12-14 | 1 | -6/+17 |
| | |||||
* | 1-wire. Fixed incorrect debug check | barthess | 2014-12-14 | 1 | -1/+1 |
| | |||||
* | Onewire. Deleted unneded time measurement unig | barthess | 2014-12-08 | 1 | -12/+1 |
| | |||||
* | 1-wire. Search ROM feature now optional | barthess | 2014-12-06 | 1 | -0/+8 |
| | |||||
* | 1-wire. Improved comments | barthess | 2014-12-06 | 1 | -14/+12 |
| | |||||
* | Added onewire driver | barthess | 2014-12-06 | 1 | -0/+848 |
| | |||||
* | Fixed copyrights | barthess | 2014-12-06 | 1 | -2/+1 |
| | |||||
* | Added hooks for community source | barthess | 2014-11-16 | 1 | -0/+66 |
| | |||||
* | Added fsmc code | barthess | 2014-10-18 | 1 | -0/+601 |