aboutsummaryrefslogtreecommitdiffstats
path: root/os/various
Commit message (Collapse)AuthorAgeFilesLines
* Fix F7 cache invalidation on write operationJosé Simões2019-03-101-6/+17
|
* Add call to cache flush on disk writeJosé Simões2019-03-071-0/+3
| | | | - This is required for F7 targets (and others that feature memory cache). - The call is provided empty for all the other series, so it's OK to use it as it is.
* Fixes for USB MSDJosé Simões2019-02-271-31/+53
| | | | | | | | | - Fix return value on succesfull scsi_requestsense. - Fix calls to LL SMT32 API for OTG2. - Port changes from ChibiOS fatfs_diskio. - Rework checks to allow simultaneous use of SD Card and USB MSD. Signed-off-by: José Simões <jose.simoes@eclo.solutions>
* Adding median libraryFabien Poussin2019-01-102-0/+171
|
* added NRF52 pwm, icu, i2c, radio esb driversandru2019-01-082-0/+1367
|
* Adopt sources to new HAL.Konstantin Oblaukhov2018-09-243-6/+11
|
* Renaming PID struct typedef to avoid conflictsFabien Poussin2018-03-252-38/+38
|
* Adding basic PID demo.Fabien Poussin2018-03-222-5/+5
|
* Cleaning PID lib.Fabien Poussin2018-03-222-41/+44
|
* Adding PID libraryFabien Poussin2018-03-222-0/+269
|
* lib_sci: FIX 'for' loop initial declarations are only allowed in C99 or C11 modeRomain Reignier2018-03-121-1/+2
|
* fatfs: update to latest ChibiOS changesRomain Reignier2018-03-122-11/+11
|
* SCSI: Respond to TEST UNIT READY command, Fix REQUEST SENSE replyingKimmo Lindholm2017-10-211-18/+53
| | | | | | | | | | When host sends TEST UNIT READY command, set sense 'all ok' if block device reports that medium is inserted, or set sense 'medium not present' if medium is not inserted. Do not override sense by default with 'all ok', allow REQUEST SENSE command to be responded with correct sense data which was set on last failure. Check just DESC bit when responding to REQUEST SENSE command.
* SCSI: Respond to unit serial number inquiryKimmo Lindholm2017-10-122-1/+21
|
* USBH: Fix compile with FATFS 0.12bDiego Ismirlian2017-08-071-12/+12
|
* USB Host fixesDiego Ismirlian2017-06-052-0/+327
| | | | | | | | - Cleaned up alignment macros for GCC & IAR - Corrected EP halt and Clear halt behaviours - Initialization of class drivers by USB Host main driver - Minor cosmetic fixes - Updated USB_HOST testhal app
* Fixed typo in ramdisk.barthess2017-01-061-1/+1
|
* Added debug printf macrosbarthess2016-10-281-0/+41
|
* USB_MSD. Added READ_FORMAT_CAPACITIES handlerbarthess2016-10-283-38/+90
|
* Updated include guardsbarthess2016-10-172-6/+6
|
* USB_MSD. Initial commit.barthess2016-10-174-0/+1038
|
* NRF52832 implementationStephane D'Alu2016-07-091-0/+4
|
* extend to 64 bits intStephane D'Alu2016-02-281-0/+55
|
* Merge pull request #35 from sdalu/sensor_hdc1000Fabio Utzig2016-02-1511-0/+2563
|\ | | | | Sensor hdc1000, mcp9808, tsl2561, tsl2591
| * included copyrightStephane D'Alu2016-02-152-6/+39
| |
| * correctly pack structure, remove unused fieldsStephane D'Alu2016-02-104-31/+54
| |
| * fixed tsl2561, added tsl2591Stephane D'Alu2016-02-093-14/+511
| |
| * updated licenseStephane D'Alu2016-02-098-13/+94
| |
| * changed file layout, move startup/bootup time to #defineStephane D'Alu2016-02-087-31/+63
| |
| * added TSL2561 Light sesnorStephane D'Alu2016-02-087-148/+750
| |
| * small fixStephane D'Alu2016-02-071-3/+10
| |
| * cleanupStephane D'Alu2016-02-073-141/+3
| |
| * mcp9808 temperature sensorStephane D'Alu2016-02-072-0/+396
| |
| * fixed comments, set default i2c addressStephane D'Alu2016-02-071-5/+4
| |
| * hdc1008 sensorStephane D'Alu2016-02-075-0/+1031
| |
* | ease dev with flash/debug targetStephane D'Alu2016-02-052-0/+46
|/
* Memtest. Cosmetical improvementsbarthess2015-12-211-9/+15
|
* Memtest. Cosmetical cleanup.barthess2015-10-151-1/+1
|
* Memtest. Added uint64_t test.barthess2015-10-152-10/+27
|
* Memtest. Changed way to specify memtest data widthbarthess2015-09-282-28/+24
|
* Update code from code feedbackMichael Spradling2015-08-161-76/+76
|
* Add CRC DriverMichael Spradling2015-08-162-0/+553
| | | | | | | | | | | | | | | | | | | | | | This patch includes a high level and two low level drivers. The high level driver is enabled with flag HAL_USE_CRC The low level drivers include: * Hardware CRC for the STM32 cortex processor lines.(when supported) * Enabled with flag STM32_CRC_USE_CRC1 * DMA is enabled with CRC_USE_DMA * SYNC api will use DMA, but put calling thread to sleep * ASYNC api enabled. * DMA Disabled * SYNC api spin while calculating CRC * ASYNC api disabled * Software CRC (3 modes) * CRCSW_CRC32_TABLE - Enables crc32 with lookup table. * CRCSW_CRC16_TABLE - Enables crc16 with lookup tables. * CRCSW_PROGRAMMBLE - Enables any crc done with computation. * Can calculate any crc configuration. * CRC_USE_DMA obviously not support with software CRC
* Improved FSMC.barthess2015-08-042-5/+5
| | | | SRAM configuration is much more flexible now.
* Memtest improvementsbarthess2015-08-042-7/+29
|
* Merge pull request #20 from RoccoMarco/masterUladzimir Pylinski2015-08-021-7/+7
|\ | | | | minor fixes on max7219.h
| * minor fixes on max7219.hRocco Marco Guglielmi2015-08-021-7/+7
| |
* | Added descriptions and code simplifiedTexZK2015-07-081-1/+1
| |
* | Added shell commands to control triple buffer demoTexZK2015-07-071-1/+3
| |
* | TriBuf demos updated and workingTexZK2015-07-061-2/+3
| |
* | Added TriBuf files and demo [WIP]TexZK2015-07-042-0/+436
| |