From f376aec4d8d0d1b9e32ae6af5611ba291d97bca2 Mon Sep 17 00:00:00 2001 From: marcoveeneman Date: Thu, 26 Feb 2015 21:11:51 +0100 Subject: Changed the Tiva pal driver RCGCGPIO enable mask name. Added a note about the RCGC register. --- os/hal/ports/TIVA/LLD/pal_lld.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'os/hal/ports/TIVA/LLD') diff --git a/os/hal/ports/TIVA/LLD/pal_lld.c b/os/hal/ports/TIVA/LLD/pal_lld.c index 49b6426..7393b83 100644 --- a/os/hal/ports/TIVA/LLD/pal_lld.c +++ b/os/hal/ports/TIVA/LLD/pal_lld.c @@ -109,7 +109,7 @@ #define RCGCGPIOT 0 #endif -#define RCGCGPIO_VALUE (RCGCGPIOA | RCGCGPIOB | RCGCGPIOC | RCGCGPIOD | \ +#define RCGCGPIO_MASK (RCGCGPIOA | RCGCGPIOB | RCGCGPIOC | RCGCGPIOD | \ RCGCGPIOE | RCGCGPIOF | RCGCGPIOG | RCGCGPIOH | \ RCGCGPIOJ | RCGCGPIOK | RCGCGPIOL | RCGCGPIOM | \ RCGCGPION | RCGCGPIOP | RCGCGPIOQ | RCGCGPIOR | \ @@ -165,8 +165,11 @@ void gpio_init (GPIO_TypeDef *gpiop, const tiva_gpio_setup_t *config) */ void _pal_lld_init(const PALConfig *config) { - SYSCTL->RCGCGPIO = RCGCGPIO_VALUE; + SYSCTL->RCGCGPIO = RCGCGPIO_MASK; + /* Datasheet chapter 5.2.6: "There must be a delay of 3 system clocks after a + * peripheral module clock is enabled in the RCGC register before any module + * registers are accessed." */ __NOP(); __NOP(); __NOP(); -- cgit v1.2.3