From cd2787ea883144601fe4ee069aaaf691c652368b Mon Sep 17 00:00:00 2001 From: Stephen Caudle Date: Tue, 8 Sep 2015 23:22:01 -0400 Subject: Add GPT driver for nRF51 --- os/hal/ports/NRF51/NRF51822/gpt_lld.c | 358 ++++++++++++++++++++++++++++++++ os/hal/ports/NRF51/NRF51822/gpt_lld.h | 266 ++++++++++++++++++++++++ os/hal/ports/NRF51/NRF51822/platform.mk | 3 +- 3 files changed, 626 insertions(+), 1 deletion(-) create mode 100644 os/hal/ports/NRF51/NRF51822/gpt_lld.c create mode 100644 os/hal/ports/NRF51/NRF51822/gpt_lld.h (limited to 'os/hal') diff --git a/os/hal/ports/NRF51/NRF51822/gpt_lld.c b/os/hal/ports/NRF51/NRF51822/gpt_lld.c new file mode 100644 index 0000000..f39470f --- /dev/null +++ b/os/hal/ports/NRF51/NRF51822/gpt_lld.c @@ -0,0 +1,358 @@ +/* + ChibiOS - 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file NRF51x22/gpt_lld.c + * @brief NRF51x22 GPT subsystem low level driver source. + * + * @addtogroup GPT + * @{ + */ + +#include "hal.h" + +#if HAL_USE_GPT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#define NRF51_TIMER_PRESCALER_NUM 10 +#define NRF51_TIMER_COMPARE_NUM 4 + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief GPTD1 driver identifier. + * @note The driver GPTD1 allocates the complex timer TIM1 when enabled. + */ +#if NRF51_GPT_USE_TIMER0 || defined(__DOXYGEN__) +GPTDriver GPTD1; +#endif + +/** + * @brief GPTD2 driver identifier. + * @note The driver GPTD2 allocates the timer TIM2 when enabled. + */ +#if NRF51_GPT_USE_TIMER1 || defined(__DOXYGEN__) +GPTDriver GPTD2; +#endif + +/** + * @brief GPTD3 driver identifier. + * @note The driver GPTD3 allocates the timer TIM3 when enabled. + */ +#if NRF51_GPT_USE_TIMER2 || defined(__DOXYGEN__) +GPTDriver GPTD3; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static uint8_t prescaler(uint16_t freq) +{ + uint8_t i; + static const gptfreq_t frequencies[] = { + NRF51_GPT_FREQ_16MHZ, + NRF51_GPT_FREQ_8MHZ, + NRF51_GPT_FREQ_4MHZ, + NRF51_GPT_FREQ_2MHZ, + NRF51_GPT_FREQ_1MHZ, + NRF51_GPT_FREQ_500KHZ, + NRF51_GPT_FREQ_250KHZ, + NRF51_GPT_FREQ_125KHZ, + NRF51_GPT_FREQ_62500HZ, + NRF51_GPT_FREQ_31250HZ, + }; + + for (i = 0; i < NRF51_TIMER_PRESCALER_NUM; i++) + if (freq == frequencies[i]) + return i; + + osalDbgAssert(FALSE, "invalid timer frequency"); + + return 0; +} + +/** + * @brief Shared IRQ handler. + * + * @param[in] gptp pointer to a @p GPTDriver object + */ +static void gpt_lld_serve_interrupt(GPTDriver *gptp) { + + gptp->tim->EVENTS_COMPARE[gptp->cc_int] = 0; + if (gptp->state == GPT_ONESHOT) + gptp->state = GPT_READY; /* Back in GPT_READY state. */ + gptp->config->callback(gptp); +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if NRF51_GPT_USE_TIMER0 +/** + * @brief TIMER0 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector60) { + + OSAL_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD1); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF51_GPT_USE_TIMER0 */ + +#if NRF51_GPT_USE_TIMER1 +/** + * @brief TIMER1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector64) { + + OSAL_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD2); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF51_GPT_USE_TIMER1 */ + +#if NRF51_GPT_USE_TIMER2 +/** + * @brief TIMER2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector68) { + + OSAL_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD3); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF51_GPT_USE_TIMER2 */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level GPT driver initialization. + * + * @notapi + */ +void gpt_lld_init(void) { + +#if NRF51_GPT_USE_TIMER0 + /* Driver initialization.*/ + GPTD1.tim = NRF_TIMER0; + gptObjectInit(&GPTD1); +#endif + +#if NRF51_GPT_USE_TIMER1 + /* Driver initialization.*/ + GPTD2.tim = NRF_TIMER1; + gptObjectInit(&GPTD2); +#endif + +#if NRF51_GPT_USE_TIMER2 + /* Driver initialization.*/ + GPTD3.tim = NRF_TIMER2; + gptObjectInit(&GPTD3); +#endif +} + +/** + * @brief Configures and activates the GPT peripheral. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_start(GPTDriver *gptp) { + + NRF_TIMER_Type *tim = gptp->tim; + + if (gptp->state == GPT_STOP) { + osalDbgAssert(gptp->cc_int < NRF51_TIMER_COMPARE_NUM, + "invalid capture/compare index"); + + tim->INTENSET = TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int; +#if NRF51_GPT_USE_TIMER0 + if (&GPTD1 == gptp) + nvicEnableVector(TIMER0_IRQn, NRF51_GPT_TIMER0_IRQ_PRIORITY); +#endif +#if NRF51_GPT_USE_TIMER1 + if (&GPTD2 == gptp) + nvicEnableVector(TIMER1_IRQn, NRF51_GPT_TIMER1_IRQ_PRIORITY); +#endif +#if NRF51_GPT_USE_TIMER2 + if (&GPTD3 == gptp) + nvicEnableVector(TIMER2_IRQn, NRF51_GPT_TIMER2_IRQ_PRIORITY); +#endif + } + + /* Prescaler value calculation.*/ + tim->PRESCALER = prescaler(gptp->config->frequency); + + /* Timer configuration.*/ + tim->MODE = TIMER_MODE_MODE_Timer << TIMER_MODE_MODE_Pos; + + switch (gptp->config->resolution) { + + case 8: + tim->BITMODE = TIMER_BITMODE_BITMODE_08Bit << TIMER_BITMODE_BITMODE_Pos; + break; + + case 16: + tim->BITMODE = TIMER_BITMODE_BITMODE_16Bit << TIMER_BITMODE_BITMODE_Pos; + break; + +#if NRF51_GPT_USE_TIMER0 + case 24: + tim->BITMODE = TIMER_BITMODE_BITMODE_24Bit << TIMER_BITMODE_BITMODE_Pos; + break; + + case 32: + tim->BITMODE = TIMER_BITMODE_BITMODE_32Bit << TIMER_BITMODE_BITMODE_Pos; + break; +#endif + + default: + osalDbgAssert(FALSE, "invalid timer resolution"); + break; + }; +} + +/** + * @brief Deactivates the GPT peripheral. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_stop(GPTDriver *gptp) { + + if (gptp->state == GPT_READY) { + gptp->tim->TASKS_SHUTDOWN = 1; + +#if NRF51_GPT_USE_TIMER0 + if (&GPTD1 == gptp) + nvicDisableVector(TIMER0_IRQn); +#endif +#if NRF51_GPT_USE_TIMER1 + if (&GPTD2 == gptp) + nvicDisableVector(TIMER1_IRQn); +#endif +#if NRF51_GPT_USE_TIMER2 + if (&GPTD3 == gptp) + nvicDisableVector(TIMER2_IRQn); +#endif + gptp->tim->INTENCLR = TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int; + } +} + +/** + * @brief Starts the timer in continuous mode. + * + * @param[in] gptp pointer to the @p GPTDriver object + * @param[in] interval period in ticks + * + * @notapi + */ +void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) { + + NRF_TIMER_Type *tim = gptp->tim; + + tim->TASKS_CLEAR = 1; + tim->CC[gptp->cc_int] = (uint32_t)(interval - 1); /* Time constant. */ + if (gptp->state == GPT_ONESHOT) + gptp->tim->SHORTS = TIMER_SHORTS_COMPARE0_STOP_Msk << gptp->cc_int; + else if (gptp->state == GPT_CONTINUOUS) + gptp->tim->SHORTS = TIMER_SHORTS_COMPARE0_CLEAR_Msk << gptp->cc_int; + tim->TASKS_START = 1; +} + +/** + * @brief Stops the timer. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_stop_timer(GPTDriver *gptp) { + + gptp->tim->TASKS_STOP = 1; +} + +/** + * @brief Starts the timer in one shot mode and waits for completion. + * @details This function specifically polls the timer waiting for completion + * in order to not have extra delays caused by interrupt servicing, + * this function is only recommended for short delays. + * + * @param[in] gptp pointer to the @p GPTDriver object + * @param[in] interval time interval in ticks + * + * @notapi + */ +void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval) { + + NRF_TIMER_Type *tim = gptp->tim; + + tim->INTENCLR = (1UL << gptp->cc_int) << TIMER_INTENSET_COMPARE0_Pos; + tim->TASKS_CLEAR = 1; + tim->CC[gptp->cc_int] = (uint32_t)(interval - 1); /* Time constant. */ + tim->TASKS_START = 1; + while (!(tim->INTENSET & (TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int))) + ; + tim->INTENSET = TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int; +} + +/** + * @brief Returns the counter value of GPT peripheral. + * @pre The GPT unit must be running in continuous mode. + * @note The nature of the counter is not defined, it may count upward + * or downward, it could be continuously running or not. + * + * @param[in] gptp pointer to a @p GPTDriver object + * @return The current counter value. + * + * @notapi + */ +gptcnt_t gpt_lld_get_counter(GPTDriver *gptp) { + + gptp->tim->TASKS_CAPTURE[gptp->cc_get] = 1; + return gptp->tim->CC[gptp->cc_get]; +} + +#endif /* HAL_USE_GPT */ + +/** @} */ diff --git a/os/hal/ports/NRF51/NRF51822/gpt_lld.h b/os/hal/ports/NRF51/NRF51822/gpt_lld.h new file mode 100644 index 0000000..d707cda --- /dev/null +++ b/os/hal/ports/NRF51/NRF51822/gpt_lld.h @@ -0,0 +1,266 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file NRF51x22/gpt_lld.h + * @brief NRF51x22 GPT subsystem low level driver header. + * + * @addtogroup GPT + * @{ + */ + +#ifndef _GPT_LLD_H_ +#define _GPT_LLD_H_ + +#if HAL_USE_GPT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief GPTD1 driver enable switch. + * @details If set to @p TRUE the support for GPTD1 is included. + * @note The default is @p TRUE. + */ +#if !defined(NRF51_GPT_USE_TIMER0) || defined(__DOXYGEN__) +#define NRF51_GPT_USE_TIMER0 FALSE +#endif + +/** + * @brief GPTD2 driver enable switch. + * @details If set to @p TRUE the support for GPTD2 is included. + * @note The default is @p TRUE. + */ +#if !defined(NRF51_GPT_USE_TIMER1) || defined(__DOXYGEN__) +#define NRF51_GPT_USE_TIMER1 FALSE +#endif + +/** + * @brief GPTD3 driver enable switch. + * @details If set to @p TRUE the support for GPTD3 is included. + * @note The default is @p TRUE. + */ +#if !defined(NRF51_GPT_USE_TIMER2) || defined(__DOXYGEN__) +#define NRF51_GPT_USE_TIMER2 FALSE +#endif + +/** + * @brief GPTD1 interrupt priority level setting. + */ +#if !defined(NRF51_GPT_TIMER0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF51_GPT_TIMER0_IRQ_PRIORITY 7 +#endif + +/** + * @brief GPTD2 interrupt priority level setting. + */ +#if !defined(NRF51_GPT_TIMER1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF51_GPT_TIMER1_IRQ_PRIORITY 7 +#endif + +/** + * @brief GPTD3 interrupt priority level setting. + */ +#if !defined(NRF51_GPT_TIMER2_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF51_GPT_TIMER2_IRQ_PRIORITY 7 +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if !NRF51_GPT_USE_TIMER0 && !NRF51_GPT_USE_TIMER1 && \ + !NRF51_GPT_USE_TIMER2 +#error "GPT driver activated but no TIM peripheral assigned" +#endif + +#if 0 +#if NRF51_GPT_USE_TIMER0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF51_GPT_TIMER0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER0" +#endif + +#if NRF51_GPT_USE_TIMER1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF51_GPT_TIMER1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER1" +#endif + +#if NRF51_GPT_USE_TIMER2 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF51_GPT_TIMER2_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER2" +#endif +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief GPT frequency type. + */ +typedef enum { + NRF51_GPT_FREQ_31250HZ = 31250, + NRF51_GPT_FREQ_62500HZ = 62500, + NRF51_GPT_FREQ_125KHZ = 125000, + NRF51_GPT_FREQ_250KHZ = 250000, + NRF51_GPT_FREQ_500KHZ = 500000, + NRF51_GPT_FREQ_1MHZ = 1000000, + NRF51_GPT_FREQ_2MHZ = 2000000, + NRF51_GPT_FREQ_4MHZ = 4000000, + NRF51_GPT_FREQ_8MHZ = 8000000, + NRF51_GPT_FREQ_16MHZ = 16000000, +} gptfreq_t; + +/** + * @brief GPT counter type. + */ +typedef uint32_t gptcnt_t; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief Timer clock in Hz. + * @note The low level can use assertions in order to catch invalid + * frequency specifications. + */ + gptfreq_t frequency; + /** + * @brief Timer callback pointer. + * @note This callback is invoked on GPT counter events. + * @note This callback can be set to @p NULL but in that case the + * one-shot mode cannot be used. + */ + gptcallback_t callback; + /* End of the mandatory fields.*/ + /** + * @brief The timer resolution in bits (8/16/24/32) + * @note The default value of this field is 16 bits + * @note The 24 and 32 bit modes are only valid for TIMER0 + */ + uint8_t resolution; +} GPTConfig; + +/** + * @brief Structure representing a GPT driver. + */ +struct GPTDriver { + /** + * @brief Driver state. + */ + gptstate_t state; + /** + * @brief Current configuration data. + */ + const GPTConfig *config; +#if defined(GPT_DRIVER_EXT_FIELDS) + GPT_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the TIMERx registers block. + */ + NRF_TIMER_Type *tim; + /** + * @brief Index of the TIMERx capture/compare register used for setting the + * interval between compare events. + */ + uint8_t cc_int; + /** + * @brief Index of the TIMERx capture/compare register used for getting the + * current timer counter value. + */ + uint8_t cc_get; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Changes the interval of GPT peripheral. + * @details This function changes the interval of a running GPT unit. + * @pre The GPT unit must be running in continuous mode. + * @post The GPT unit interval is changed to the new value. + * @note The function has effect at the next cycle start. + * + * @param[in] gptp pointer to a @p GPTDriver object + * @param[in] interval new cycle time in timer ticks + * + * @notapi + */ +#define gpt_lld_change_interval(gptp, interval) \ + ((gptp)->tim->CC[(gptp)->cc_int] = (uint32_t)((interval) - 1)) + +/** + * @brief Returns the interval of GPT peripheral. + * @pre The GPT unit must be running in continuous mode. + * + * @param[in] gptp pointer to a @p GPTDriver object + * @return The current interval. + * + * @notapi + */ +#define gpt_lld_get_interval(gptp) \ + ((gptcnt_t)((gptp)->tim->CC[(gptp)->cc_int]) + 1) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if NRF51_GPT_USE_TIMER0 && !defined(__DOXYGEN__) +extern GPTDriver GPTD1; +#endif + +#if NRF51_GPT_USE_TIMER1 && !defined(__DOXYGEN__) +extern GPTDriver GPTD2; +#endif + +#if NRF51_GPT_USE_TIMER2 && !defined(__DOXYGEN__) +extern GPTDriver GPTD3; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void gpt_lld_init(void); + void gpt_lld_start(GPTDriver *gptp); + void gpt_lld_stop(GPTDriver *gptp); + void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t period); + void gpt_lld_stop_timer(GPTDriver *gptp); + void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval); + gptcnt_t gpt_lld_get_counter(GPTDriver *gptp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_GPT */ + +#endif /* _GPT_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/NRF51/NRF51822/platform.mk b/os/hal/ports/NRF51/NRF51822/platform.mk index 3fc8342..244a0d1 100644 --- a/os/hal/ports/NRF51/NRF51822/platform.mk +++ b/os/hal/ports/NRF51/NRF51822/platform.mk @@ -8,7 +8,8 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/ext_lld_isr.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/ext_lld.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/i2c_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/adc_lld.c + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/adc_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF51/NRF51822/gpt_lld.c # Required include directories PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \ -- cgit v1.2.3 From a2f9bc469a30a16b125d7f1a01f9bd2fbfc7eeac Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 14 Oct 2015 17:46:40 +0300 Subject: FSMC code cleanup --- os/hal/include/eicu.h | 2 +- os/hal/include/nand.h | 2 +- os/hal/include/onewire.h | 2 +- os/hal/ports/STM32/LLD/CRCv1/crc_lld.c | 2 +- os/hal/ports/STM32/LLD/CRCv1/crc_lld.h | 2 +- os/hal/ports/STM32/LLD/FSMCv1/fsmc.c | 9 ++------- os/hal/ports/STM32/LLD/FSMCv1/fsmc.h | 7 ++----- os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.c | 2 +- os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.h | 2 +- os/hal/ports/STM32/LLD/FSMCv1/fsmc_sram.c | 2 +- os/hal/ports/STM32/LLD/FSMCv1/fsmc_sram.h | 2 +- os/hal/ports/STM32/LLD/FSMCv1/nand_lld.c | 2 +- os/hal/ports/STM32/LLD/FSMCv1/nand_lld.h | 2 +- os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c | 2 +- os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h | 2 +- os/hal/src/crc.c | 2 +- os/hal/src/eicu.c | 2 +- os/hal/src/hal_community.c | 2 +- os/hal/src/nand.c | 2 +- os/hal/src/onewire.c | 2 +- 20 files changed, 22 insertions(+), 30 deletions(-) (limited to 'os/hal') diff --git a/os/hal/include/eicu.h b/os/hal/include/eicu.h index a4fb342..d9e08de 100644 --- a/os/hal/include/eicu.h +++ b/os/hal/include/eicu.h @@ -25,7 +25,7 @@ #ifndef _EICU_H_ #define _EICU_H_ -#if HAL_USE_EICU || defined(__DOXYGEN__) +#if (HAL_USE_EICU == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ diff --git a/os/hal/include/nand.h b/os/hal/include/nand.h index a1d2f86..ffd5de7 100644 --- a/os/hal/include/nand.h +++ b/os/hal/include/nand.h @@ -25,7 +25,7 @@ #ifndef _NAND_H_ #define _NAND_H_ -#if HAL_USE_NAND || defined(__DOXYGEN__) +#if (HAL_USE_NAND == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ diff --git a/os/hal/include/onewire.h b/os/hal/include/onewire.h index a2760e6..fac0b54 100644 --- a/os/hal/include/onewire.h +++ b/os/hal/include/onewire.h @@ -25,7 +25,7 @@ #ifndef _ONEWIRE_H_ #define _ONEWIRE_H_ -#if HAL_USE_ONEWIRE || defined(__DOXYGEN__) +#if (HAL_USE_ONEWIRE == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ diff --git a/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c b/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c index 4bcb771..aaa52e9 100644 --- a/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c +++ b/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c @@ -24,7 +24,7 @@ #include "hal.h" -#if HAL_USE_CRC || defined(__DOXYGEN__) +#if (HAL_USE_CRC = TRUE) || defined(__DOXYGEN__) /** * Allow CRC Software override for ST drivers. Some ST CRC implimentations diff --git a/os/hal/ports/STM32/LLD/CRCv1/crc_lld.h b/os/hal/ports/STM32/LLD/CRCv1/crc_lld.h index 6f70b42..ec9904c 100644 --- a/os/hal/ports/STM32/LLD/CRCv1/crc_lld.h +++ b/os/hal/ports/STM32/LLD/CRCv1/crc_lld.h @@ -25,7 +25,7 @@ #ifndef _CRC_LLD_H_ #define _CRC_LLD_H_ -#if HAL_USE_CRC || defined(__DOXYGEN__) +#if (HAL_USE_CRC = TRUE) || defined(__DOXYGEN__) /* * This error check must occur outsite of CRCSW_USE_CRC1 to check if diff --git a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c index 63f4af1..27bc429 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.c @@ -24,8 +24,7 @@ #include "hal.h" #include "fsmc.h" -#if (HAL_USE_NAND || STM32_USE_FSMC_SRAM || STM32_USE_FSMC_SDRAM) || \ - defined(__DOXYGEN__) +#if (HAL_USE_FSMC == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ @@ -96,10 +95,6 @@ void fsmc_init(void) { FSMCD1.nand2 = (FSMC_NAND_TypeDef *)FSMC_Bank3_R_BASE; #endif -#if STM32_USE_FSMC_PCCARD - FSMCD1.pccard = (FSMC_PCCARD_TypeDef *)FSMC_Bank4_R_BASE; -#endif - #if (defined(STM32F427xx) || defined(STM32F437xx) || \ defined(STM32F429xx) || defined(STM32F439xx)) #if STM32_USE_FSMC_SDRAM @@ -187,6 +182,6 @@ CH_IRQ_HANDLER(STM32_FSMC_HANDLER) { } #endif /* !STM32_NAND_USE_EXT_INT */ -#endif /* HAL_USE_FSMC || STM32_USE_FSMC_SRAM || STM32_USE_FSMC_SDRAM */ +#endif /* HAL_USE_FSMC */ /** @} */ diff --git a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h index c21884c..7889b01 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h @@ -25,7 +25,7 @@ #ifndef _FSMC_H_ #define _FSMC_H_ -#if HAL_USE_NAND || STM32_USE_FSMC_SRAM || STM32_USE_FSMC_SDRAM || defined(__DOXYGEN__) +#if (HAL_USE_FSMC == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ @@ -302,9 +302,6 @@ struct FSMCDriver { #if STM32_NAND_USE_FSMC_NAND2 FSMC_NAND_TypeDef *nand2; #endif -#if STM32_USE_FSMC_PCCARD - FSMC_PCCard_TypeDef *pccard; -#endif #if (defined(STM32F427xx) || defined(STM32F437xx) || \ defined(STM32F429xx) || defined(STM32F439xx)) #if STM32_USE_FSMC_SDRAM @@ -335,7 +332,7 @@ extern "C" { } #endif -#endif /* HAL_USE_NAND || STM32_USE_FSMC_SRAM || STM32_USE_FSMC_SDRAM */ +#endif /* HAL_USE_FSMC */ #endif /* _FSMC_H_ */ diff --git a/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.c b/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.c index 33b9e80..d8db8a6 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.c @@ -30,7 +30,7 @@ #if (defined(STM32F427xx) || defined(STM32F437xx) || \ defined(STM32F429xx) || defined(STM32F439xx)) -#if STM32_USE_FSMC_SDRAM || defined(__DOXYGEN__) +#if (STM32_USE_FSMC_SDRAM == TRUE) || defined(__DOXYGEN__) #include "fsmc_sdram.h" diff --git a/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.h b/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.h index 78c854f..d5d5476 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sdram.h @@ -33,7 +33,7 @@ #include "fsmc.h" -#if STM32_USE_FSMC_SDRAM || defined(__DOXYGEN__) +#if (STM32_USE_FSMC_SDRAM == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ diff --git a/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sram.c b/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sram.c index 114f9bc..2375738 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sram.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sram.c @@ -24,7 +24,7 @@ #include "hal.h" #include "fsmc_sram.h" -#if STM32_USE_FSMC_SRAM || defined(__DOXYGEN__) +#if (STM32_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ diff --git a/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sram.h b/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sram.h index 0abfd86..bf5c32a 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sram.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sram.h @@ -27,7 +27,7 @@ #include "fsmc.h" -#if STM32_USE_FSMC_SRAM || defined(__DOXYGEN__) +#if (STM32_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ diff --git a/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.c b/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.c index cd2f421..32fe468 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.c @@ -24,7 +24,7 @@ #include "hal.h" -#if HAL_USE_NAND || defined(__DOXYGEN__) +#if (HAL_USE_NAND == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ diff --git a/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.h b/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.h index 1d2edef..23e8e51 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/nand_lld.h @@ -28,7 +28,7 @@ #include "fsmc.h" #include "bitmap.h" -#if HAL_USE_NAND || defined(__DOXYGEN__) +#if (HAL_USE_NAND == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ diff --git a/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c b/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c index a3e6cbd..67c3fbe 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c @@ -31,7 +31,7 @@ */ #include "hal.h" -#if HAL_USE_EICU || defined(__DOXYGEN__) +#if (HAL_USE_EICU = TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ diff --git a/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h b/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h index 4d20c2f..8002342 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h @@ -27,7 +27,7 @@ #include "stm32_tim.h" -#if HAL_USE_EICU || defined(__DOXYGEN__) +#if (HAL_USE_EICU = TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ diff --git a/os/hal/src/crc.c b/os/hal/src/crc.c index e8c2d0b..8587674 100644 --- a/os/hal/src/crc.c +++ b/os/hal/src/crc.c @@ -19,7 +19,7 @@ */ #include "hal.h" -#if HAL_USE_CRC || defined(__DOXYGEN__) +#if (HAL_USE_CRC = TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ diff --git a/os/hal/src/eicu.c b/os/hal/src/eicu.c index 102b346..f75c58b 100644 --- a/os/hal/src/eicu.c +++ b/os/hal/src/eicu.c @@ -27,7 +27,7 @@ */ #include "hal.h" -#if HAL_USE_EICU || defined(__DOXYGEN__) +#if (HAL_USE_EICU == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ diff --git a/os/hal/src/hal_community.c b/os/hal/src/hal_community.c index b9700ba..a24d26e 100644 --- a/os/hal/src/hal_community.c +++ b/os/hal/src/hal_community.c @@ -24,7 +24,7 @@ #include "hal.h" -#if HAL_USE_COMMUNITY || defined(__DOXYGEN__) +#if (HAL_USE_COMMUNITY == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ diff --git a/os/hal/src/nand.c b/os/hal/src/nand.c index a621604..24dd6de 100644 --- a/os/hal/src/nand.c +++ b/os/hal/src/nand.c @@ -24,7 +24,7 @@ #include "hal.h" -#if HAL_USE_NAND || defined(__DOXYGEN__) +#if (HAL_USE_NAND == TRUE) || defined(__DOXYGEN__) #include "string.h" /* for memset */ diff --git a/os/hal/src/onewire.c b/os/hal/src/onewire.c index 10cb090..8c92434 100644 --- a/os/hal/src/onewire.c +++ b/os/hal/src/onewire.c @@ -55,7 +55,7 @@ on every timer overflow event. #include "hal.h" -#if HAL_USE_ONEWIRE || defined(__DOXYGEN__) +#if (HAL_USE_ONEWIRE == TRUE) || defined(__DOXYGEN__) #include -- cgit v1.2.3 From c757be0c16fb68bab56294b46f1de15e39abfcdb Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 14 Oct 2015 17:52:47 +0300 Subject: Fixed typo --- os/hal/include/crc.h | 2 +- os/hal/ports/STM32/LLD/CRCv1/crc_lld.c | 2 +- os/hal/ports/STM32/LLD/CRCv1/crc_lld.h | 2 +- os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c | 2 +- os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h | 2 +- os/hal/src/crc.c | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) (limited to 'os/hal') diff --git a/os/hal/include/crc.h b/os/hal/include/crc.h index 2f50f8f..afa27e1 100644 --- a/os/hal/include/crc.h +++ b/os/hal/include/crc.h @@ -17,7 +17,7 @@ #ifndef _CRC_H_ #define _CRC_H_ -#if HAL_USE_CRC || defined(__DOXYGEN__) +#if (HAL_USE_CRC == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ diff --git a/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c b/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c index aaa52e9..601deca 100644 --- a/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c +++ b/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c @@ -24,7 +24,7 @@ #include "hal.h" -#if (HAL_USE_CRC = TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_CRC == TRUE) || defined(__DOXYGEN__) /** * Allow CRC Software override for ST drivers. Some ST CRC implimentations diff --git a/os/hal/ports/STM32/LLD/CRCv1/crc_lld.h b/os/hal/ports/STM32/LLD/CRCv1/crc_lld.h index ec9904c..ecdaf81 100644 --- a/os/hal/ports/STM32/LLD/CRCv1/crc_lld.h +++ b/os/hal/ports/STM32/LLD/CRCv1/crc_lld.h @@ -25,7 +25,7 @@ #ifndef _CRC_LLD_H_ #define _CRC_LLD_H_ -#if (HAL_USE_CRC = TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_CRC == TRUE) || defined(__DOXYGEN__) /* * This error check must occur outsite of CRCSW_USE_CRC1 to check if diff --git a/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c b/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c index 67c3fbe..c04278e 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c @@ -31,7 +31,7 @@ */ #include "hal.h" -#if (HAL_USE_EICU = TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_EICU == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ diff --git a/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h b/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h index 8002342..927eb6f 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.h @@ -27,7 +27,7 @@ #include "stm32_tim.h" -#if (HAL_USE_EICU = TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_EICU == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ diff --git a/os/hal/src/crc.c b/os/hal/src/crc.c index 8587674..63799e4 100644 --- a/os/hal/src/crc.c +++ b/os/hal/src/crc.c @@ -19,7 +19,7 @@ */ #include "hal.h" -#if (HAL_USE_CRC = TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_CRC == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ -- cgit v1.2.3