From f5b812a2e765258c21691e84aafd446089618f62 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 8 May 2015 00:04:09 +0300 Subject: NAND. Minor improvements --- os/hal/src/nand.c | 35 ++++++++++++++++------------------- 1 file changed, 16 insertions(+), 19 deletions(-) (limited to 'os') diff --git a/os/hal/src/nand.c b/os/hal/src/nand.c index a2a5863..a621604 100644 --- a/os/hal/src/nand.c +++ b/os/hal/src/nand.c @@ -68,32 +68,32 @@ static void pagesize_check(size_t page_data_size) { /** * @brief Translate block-page-offset scheme to NAND internal address. * - * @param[in] cfg pointer to the @p NANDConfig from - * corresponding NAND driver - * @param[in] block block number - * @param[in] page page number related to begin of block - * @param[in] offset data offset related to begin of page - * @param[out] addr buffer to store calculated address - * @param[in] addr_len length of address buffer + * @param[in] cfg pointer to the @p NANDConfig from + * corresponding NAND driver + * @param[in] block block number + * @param[in] page page number related to begin of block + * @param[in] page_offset data offset related to begin of page + * @param[out] addr buffer to store calculated address + * @param[in] addr_len length of address buffer * * @notapi */ static void calc_addr(const NANDConfig *cfg, uint32_t block, uint32_t page, - uint32_t offset, uint8_t *addr, size_t addr_len) { + uint32_t page_offset, uint8_t *addr, size_t addr_len) { size_t i = 0; uint32_t row = 0; /* Incorrect buffer length.*/ osalDbgCheck(cfg->rowcycles + cfg->colcycles == addr_len); osalDbgCheck((block < cfg->blocks) && (page < cfg->pages_per_block) && - (offset < cfg->page_data_size + cfg->page_spare_size)); + (page_offset < cfg->page_data_size + cfg->page_spare_size)); /* convert address to NAND specific */ memset(addr, 0, addr_len); row = (block * cfg->pages_per_block) + page; for (i=0; icolcycles; i++){ - addr[i] = offset & 0xFF; - offset = offset >> 8; + addr[i] = page_offset & 0xFF; + page_offset = page_offset >> 8; } for (; i