From cf02c79b5aa7209542cbf1b0cefe703a2c0c60be Mon Sep 17 00:00:00 2001 From: awygle Date: Wed, 4 May 2016 23:47:33 -0700 Subject: Merge pull request #68 from awygle/msp430x MSP430X DMA Support, EXP430FR6989 Demo + Makefile Updates --- testhal/MSP430X/EXP430FR5969/DMA/Makefile | 207 +++++++++++++ testhal/MSP430X/EXP430FR5969/DMA/chconf.h | 274 +++++++++++++++++ testhal/MSP430X/EXP430FR5969/DMA/halconf.h | 388 +++++++++++++++++++++++++ testhal/MSP430X/EXP430FR5969/DMA/main.c | 287 ++++++++++++++++++ testhal/MSP430X/EXP430FR5969/DMA/mcuconf.h | 55 ++++ testhal/MSP430X/EXP430FR5969/DMA/msp_vectors.c | 316 ++++++++++++++++++++ 6 files changed, 1527 insertions(+) create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/Makefile create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/chconf.h create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/halconf.h create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/main.c create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/mcuconf.h create mode 100644 testhal/MSP430X/EXP430FR5969/DMA/msp_vectors.c (limited to 'testhal/MSP430X/EXP430FR5969/DMA') diff --git a/testhal/MSP430X/EXP430FR5969/DMA/Makefile b/testhal/MSP430X/EXP430FR5969/DMA/Makefile new file mode 100644 index 0000000..e109c95 --- /dev/null +++ b/testhal/MSP430X/EXP430FR5969/DMA/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Optimization level, can be [0, 1, 2, 3, s]. +# 0 = turn off optimization. s = optimize for size. +# (Note: 3 is not always the best optimization level. See avr-libc FAQ.) +OPTIMIZE = 0 + +# Debugging format. +DEBUG = +#DEBUG = stabs + +# Memory/data model +MODEL = small + +# Object files directory +# To put object files in current directory, use a dot (.), do NOT make +# this an empty or blank macro! +OBJDIR = . + +# Compiler flag to set the C Standard level. +# c89 = "ANSI" C +# gnu89 = c89 plus GCC extensions +# c99 = ISO C99 standard (not yet fully implemented) +# gnu99 = c99 plus GCC extensions +CSTANDARD = -std=gnu11 + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O$(OPTIMIZE) -g$(DEBUG) + USE_OPT += -funsigned-char -fshort-enums +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = no +endif + +# Enable the selected hardware multiplier +ifeq ($(USE_HWMULT),) + USE_HWMULT = f5series +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = yes +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the idle thread stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_IDLE_STACKSIZE),) + USE_IDLE_STACKSIZE = 0xC00 +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = nil + +# Imported source files and paths +CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS_CONTRIB = ../../../.. +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/EXP430FR5969/board.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/MSP430X/platform.mk +include $(CHIBIOS)/os/hal/osal/nil/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/nil/nil.mk +include $(CHIBIOS_CONTRIB)/os/common/ports/MSP430X/compilers/GCC/mk/port.mk +# Other files (optional). +include $(CHIBIOS)/test/nil/test.mk + +# Define linker script file here +LDSCRIPT = $(STARTUPLD)/msp430fr5969.ld + +# C sources +CSRC = $(STARTUPSRC) \ + $(KERNSRC) \ + $(PORTSRC) \ + $(OSALSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(TESTSRC) \ + msp_vectors.c \ + main.c + +# C++ sources +CPPSRC = + +# List ASM source files here +ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) + +INCDIR = $(CHIBIOS)/os/license \ + $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = msp430fr5969 + +TRGT = msp430-elf- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# MSP430-specific options here +MOPT = -m$(MODEL) + +# Define C warning options here +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra -Wundef + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/testhal/MSP430X/EXP430FR5969/DMA/chconf.h b/testhal/MSP430X/EXP430FR5969/DMA/chconf.h new file mode 100644 index 0000000..cb45526 --- /dev/null +++ b/testhal/MSP430X/EXP430FR5969/DMA/chconf.h @@ -0,0 +1,274 @@ +/* + ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file nilconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_NIL_CONF_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of user threads in the application. + * @note This number is not inclusive of the idle thread which is + * Implicitly handled. + */ +#define CH_CFG_NUM_THREADS 1 + +/** @} */ + +/*===========================================================================*/ +/** + * @name System timer settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_ST_RESOLUTION 16 + +/** + * @brief System tick frequency. + * @note This value together with the @p CH_CFG_ST_RESOLUTION + * option defines the maximum amount of time allowed for + * timeouts. + */ +#define CH_CFG_ST_FREQUENCY 1000 + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#define CH_CFG_ST_TIMEDELTA 0 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_SEMAPHORES TRUE + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note Feature not currently implemented. + * @note The default is @p FALSE. + */ +#define CH_CFG_USE_MUTEXES FALSE + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_EVENTS TRUE + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_MAILBOXES TRUE + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMCORE TRUE + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_HEAP TRUE + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMPOOLS TRUE + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#define CH_CFG_MEMCORE_SIZE 0 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note Feature not currently implemented. + * @note The default is @p FALSE. + */ +#define CH_DBG_STATISTICS FALSE + +/** + * @brief Debug option, system state check. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_SYSTEM_STATE_CHECK FALSE + +/** + * @brief Debug option, parameters checks. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_CHECKS FALSE + +/** + * @brief System assertions. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_ASSERTS FALSE + +/** + * @brief Stack check. + * + *@note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_STACK_CHECK TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System initialization hook. + */ +#if !defined(CH_CFG_SYSTEM_INIT_HOOK) || defined(__DOXYGEN__) +#define CH_CFG_SYSTEM_INIT_HOOK() { \ +} +#endif + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + */ +#define CH_CFG_THREAD_EXT_INIT_HOOK(tr) { \ + /* Add custom threads initialization code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ +} + +/** + * @brief System halt hook. + */ +#if !defined(CH_CFG_SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in nilcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/MSP430X/EXP430FR5969/DMA/halconf.h b/testhal/MSP430X/EXP430FR5969/DMA/halconf.h new file mode 100644 index 0000000..81a620d --- /dev/null +++ b/testhal/MSP430X/EXP430FR5969/DMA/halconf.h @@ -0,0 +1,388 @@ +/* + ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the DMA subsystem. + */ +#if !defined(HAL_USE_DMA) || defined(__DOXYGEN__) +#define HAL_USE_DMA TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE FALSE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS FALSE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING FALSE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING FALSE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/MSP430X/EXP430FR5969/DMA/main.c b/testhal/MSP430X/EXP430FR5969/DMA/main.c new file mode 100644 index 0000000..96f45d0 --- /dev/null +++ b/testhal/MSP430X/EXP430FR5969/DMA/main.c @@ -0,0 +1,287 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" +#include "ch.h" +#include "string.h" +#include "hal_dma_lld.h" + +const char * start_msg = "\r\n\r\nExecuting DMA test suite...\r\n"; +const char * test_1_msg = "TEST 1: Word-to-word memcpy with DMA engine, no callbacks\r\n"; +const char * test_2_msg = "TEST 2: Byte-to-byte memcpy with DMA engine, no callbacks\r\n"; +const char * test_3_msg = "TEST 3: Byte-to-byte memset with DMA engine, no callbacks\r\n"; +const char * test_4_msg = "TEST 4: Word-to-word memcpy with DMA engine, with callback\r\n"; +const char * test_5_msg = "TEST 5: Claim DMA channel 0, perform a Word-to-word memcpy\r\n"; +const char * test_6_msg = "TEST 6: Attempt to claim already claimed DMA channel, fail. Release it, try to claim it again, and succeed.\r\n"; +const char * test_7_msg = "TEST 7: Claim DMA channel 1, perform a Word-to-word memcpy, and release it\r\n"; + +const char * succeed_string = "SUCCESS\r\n\r\n"; +const char * fail_string = "FAILURE\r\n\r\n"; + +char instring[256]; +char outstring[256]; +msp430x_dma_req_t *request; +uint8_t cb_arg = 1; + +void dma_callback_test(void* args) { + + *((uint8_t *)args) = 0; +} + +msp430x_dma_req_t test_1_req = { + instring, /* source address */ + outstring, /* destination address */ + 9, /* number of words */ + MSP430X_DMA_SRCINCR | MSP430X_DMA_DSTINCR, /* address mode - dual increment */ + MSP430X_DMA_SRCWORD | MSP430X_DMA_DSTWORD, /* word transfer */ + MSP430X_DMA_BLOCK, /* block (and blocking) transfer */ + DMA_TRIGGER_MNEM(DMAREQ), /* software-requested trigger */ + { + NULL, /* no callback */ + NULL /* no arguments */ + } +}; + +msp430x_dma_req_t test_2_req = { + instring, /* source address */ + outstring, /* destination address */ + 18, /* number of bytes */ + MSP430X_DMA_SRCINCR | MSP430X_DMA_DSTINCR, /* address mode - dual increment */ + MSP430X_DMA_SRCBYTE | MSP430X_DMA_DSTBYTE, /* byte transfer */ + MSP430X_DMA_BLOCK, /* block (and blocking) transfer */ + DMA_TRIGGER_MNEM(DMAREQ), /* software-requested trigger */ + { + NULL, /* no callback */ + NULL /* no arguments */ + } +}; + +msp430x_dma_req_t test_3_req = { + instring, /* source address */ + outstring, /* destination address */ + 16, /* number of words */ + MSP430X_DMA_DSTINCR, /* address mode - dest increment only */ + MSP430X_DMA_SRCBYTE | MSP430X_DMA_DSTBYTE, /* word transfer */ + MSP430X_DMA_BLOCK, /* block (and blocking) transfer */ + DMA_TRIGGER_MNEM(DMAREQ), /* software-requested trigger */ + { + NULL, /* no callback */ + NULL /* no arguments */ + } +}; + +msp430x_dma_req_t test_4_req = { + instring, /* source address */ + outstring, /* destination address */ + 9, /* number of words */ + MSP430X_DMA_SRCINCR | MSP430X_DMA_DSTINCR, /* address mode - dual increment */ + MSP430X_DMA_SRCWORD | MSP430X_DMA_DSTWORD, /* word transfer */ + MSP430X_DMA_BLOCK, /* block (and blocking) transfer */ + DMA_TRIGGER_MNEM(DMAREQ), /* software-requested trigger */ + { + &dma_callback_test, /* test callback */ + &cb_arg /* test arguments */ + } +}; + +msp430x_dma_req_t test_5_req = { + instring, /* source address */ + outstring, /* destination address */ + 9, /* number of words */ + MSP430X_DMA_SRCINCR | MSP430X_DMA_DSTINCR, /* address mode - dual increment */ + MSP430X_DMA_SRCWORD | MSP430X_DMA_DSTWORD, /* word transfer */ + MSP430X_DMA_BLOCK, /* block (and blocking) transfer */ + DMA_TRIGGER_MNEM(DMAREQ), /* software-requested trigger */ + { + NULL, /* no callback */ + NULL /* no arguments */ + } +}; + +msp430x_dma_ch_t ch = { + NULL, + NULL, + NULL +}; + +/* + * Thread 2. + */ +THD_WORKING_AREA(waThread1, 2048); +THD_FUNCTION(Thread1, arg) { + + (void)arg; + + /* + * Activate the serial driver 0 using the driver default configuration. + */ + sdStart(&SD0, NULL); + + while (chnGetTimeout(&SD0, TIME_INFINITE)) { + chnWrite(&SD0, (const uint8_t *)start_msg, strlen(start_msg)); + chThdSleepMilliseconds(2000); + + /* Test 1 - use DMA engine to execute a word-wise memory-to-memory copy. */ + chnWrite(&SD0, (const uint8_t *)test_1_msg, strlen(test_1_msg)); + strcpy( instring, "After DMA test \r\n" ); + strcpy( outstring, "Before DMA test \r\n"); + if (strcmp("Before DMA test \r\n", outstring)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + request = &test_1_req; + dmaRequest(request, TIME_INFINITE); + if (strcmp("After DMA test \r\n", outstring)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + else { + chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string)); + } + + /* Test 2 - use DMA engine to execute a byte-wise memory-to-memory copy. */ + chnWrite(&SD0, (const uint8_t *)test_2_msg, strlen(test_2_msg)); + strcpy( instring, "After DMA test \r\n" ); + strcpy( outstring, "Before DMA test \r\n"); + if (strcmp("Before DMA test \r\n", outstring)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + request = &test_2_req; + dmaRequest(request, TIME_INFINITE); + if (strcmp("After DMA test \r\n", outstring)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + else { + chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string)); + } + + /* Test 3 - use DMA engine to execute a word-wise memory-to-memory set. */ + chnWrite(&SD0, (const uint8_t *)test_3_msg, strlen(test_3_msg)); + strcpy( instring, "After DMA test \r\n" ); + strcpy( outstring, "Before DMA test \r\n"); + if (strcmp("Before DMA test \r\n", outstring)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + request = &test_3_req; + dmaRequest(request, TIME_INFINITE); + if (strcmp("AAAAAAAAAAAAAAAA\r\n", outstring)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + else { + chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string)); + } + + /* Test 4 - use DMA engine to execute a word-wise memory-to-memory copy, + * then call a callback. */ + chnWrite(&SD0, (const uint8_t *)test_4_msg, strlen(test_4_msg)); + strcpy( instring, "After DMA test \r\n" ); + strcpy( outstring, "Before DMA test \r\n"); + if (strcmp("Before DMA test \r\n", outstring) || (cb_arg != 1)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + request = &test_4_req; + dmaRequest(request, TIME_INFINITE); + if (strcmp("After DMA test \r\n", outstring) || cb_arg) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + else { + chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string)); + } + + /* Test 5 - use exclusive DMA channel 0 to execute a word-wise memory-to-memory copy. */ + chnWrite(&SD0, (const uint8_t *)test_5_msg, strlen(test_5_msg)); + strcpy( instring, "After DMA test \r\n" ); + strcpy( outstring, "Before DMA test \r\n"); + if (strcmp("Before DMA test \r\n", outstring)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + request = &test_5_req; + dmaAcquire(&ch, 0); + dmaTransfer(&ch, request); + if (strcmp("After DMA test \r\n", outstring)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + else { + chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string)); + } + + /* Test 6 - Attempt to claim DMA channel 0, fail, release it, attempt to claim it again */ + chnWrite(&SD0, (const uint8_t *)test_6_msg, strlen(test_6_msg)); + if (!dmaAcquire(&ch, 0)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + dmaRelease(&ch); + if (dmaAcquire(&ch, 0)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + else { + chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string)); + } + dmaRelease(&ch); + + /* Test 7 - use exclusive DMA channel 1 to execute a word-wise memory-to-memory copy. */ + chnWrite(&SD0, (const uint8_t *)test_7_msg, strlen(test_7_msg)); + strcpy( instring, "After DMA test \r\n" ); + strcpy( outstring, "Before DMA test \r\n"); + if (strcmp("Before DMA test \r\n", outstring)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + request = &test_5_req; + dmaAcquire(&ch, 1); + dmaTransfer(&ch, request); + if (strcmp("After DMA test \r\n", outstring)) { + chnWrite(&SD0, (const uint8_t *)fail_string, strlen(fail_string)); + } + else { + chnWrite(&SD0, (const uint8_t *)succeed_string, strlen(succeed_string)); + } + dmaRelease(&ch); + } +} + + +/* + * Threads static table, one entry per thread. The number of entries must + * match NIL_CFG_NUM_THREADS. + */ +THD_TABLE_BEGIN + THD_TABLE_ENTRY(waThread1, "dma_test", Thread1, NULL) +THD_TABLE_END + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + WDTCTL = WDTPW | WDTHOLD; + + + halInit(); + chSysInit(); + dmaInit(); + + /* This is now the idle thread loop, you may perform here a low priority + task but you must never try to sleep or wait in this loop. Note that + this tasks runs at the lowest priority level so any instruction added + here will be executed after all other tasks have been started.*/ + while (true) { + } +} diff --git a/testhal/MSP430X/EXP430FR5969/DMA/mcuconf.h b/testhal/MSP430X/EXP430FR5969/DMA/mcuconf.h new file mode 100644 index 0000000..f47ee12 --- /dev/null +++ b/testhal/MSP430X/EXP430FR5969/DMA/mcuconf.h @@ -0,0 +1,55 @@ +/* + ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * MSP430X drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + */ + +#define MSP430X_MCUCONF + +/* HAL driver system settings */ +#define MSP430X_ACLK_SRC MSP430X_VLOCLK +#define MSP430X_LFXTCLK_FREQ 0 +#define MSP430X_HFXTCLK_FREQ 0 +#define MSP430X_DCOCLK_FREQ 8000000 +#define MSP430X_MCLK_DIV 1 +#define MSP430X_SMCLK_DIV 32 + +/* + * SERIAL driver system settings. + */ +#define MSP430X_SERIAL_USE_USART0 TRUE +#define MSP430X_USART0_CLK_SRC MSP430X_SMCLK_SRC +#define MSP430X_SERIAL_USE_USART1 FALSE +#define MSP430X_SERIAL_USE_USART2 FALSE +#define MSP430X_SERIAL_USE_USART3 FALSE + +/* + * ST driver system settings. + */ +#define MSP430X_ST_CLK_SRC MSP430X_SMCLK_SRC +#define MSP430X_ST_TIMER_TYPE B +#define MSP430X_ST_TIMER_INDEX 0 + +#endif /* _MCUCONF_H_ */ diff --git a/testhal/MSP430X/EXP430FR5969/DMA/msp_vectors.c b/testhal/MSP430X/EXP430FR5969/DMA/msp_vectors.c new file mode 100644 index 0000000..8968fb9 --- /dev/null +++ b/testhal/MSP430X/EXP430FR5969/DMA/msp_vectors.c @@ -0,0 +1,316 @@ +#include + +__attribute__((interrupt(1))) +void Vector1(void) { + + while (1) { + } +} +__attribute__((interrupt(2))) +void Vector2(void) { + + while (1) { + } +} +__attribute__((interrupt(3))) +void Vector3(void) { + + while (1) { + } +} +__attribute__((interrupt(4))) +void Vector4(void) { + + while (1) { + } +} +__attribute__((interrupt(5))) +void Vector5(void) { + + while (1) { + } +} +__attribute__((interrupt(6))) +void Vector6(void) { + + while (1) { + } +} +__attribute__((interrupt(7))) +void Vector7(void) { + + while (1) { + } +} +__attribute__((interrupt(8))) +void Vector8(void) { + + while (1) { + } +} +__attribute__((interrupt(9))) +void Vector9(void) { + + while (1) { + } +} +__attribute__((interrupt(10))) +void Vector10(void) { + + while (1) { + } +} +__attribute__((interrupt(11))) +void Vector11(void) { + + while (1) { + } +} +__attribute__((interrupt(12))) +void Vector12(void) { + + while (1) { + } +} +__attribute__((interrupt(13))) +void Vector13(void) { + + while (1) { + } +} +__attribute__((interrupt(14))) +void Vector14(void) { + + while (1) { + } +} +__attribute__((interrupt(15))) +void Vector15(void) { + + while (1) { + } +} +__attribute__((interrupt(16))) +void Vector16(void) { + + while (1) { + } +} +__attribute__((interrupt(17))) +void Vector17(void) { + + while (1) { + } +} +__attribute__((interrupt(18))) +void Vector18(void) { + + while (1) { + } +} +__attribute__((interrupt(19))) +void Vector19(void) { + + while (1) { + } +} +__attribute__((interrupt(20))) +void Vector20(void) { + + while (1) { + } +} +__attribute__((interrupt(21))) +void Vector21(void) { + + while (1) { + } +} +__attribute__((interrupt(22))) +void Vector22(void) { + + while (1) { + } +} +__attribute__((interrupt(23))) +void Vector23(void) { + + while (1) { + } +} +__attribute__((interrupt(24))) +void Vector24(void) { + + while (1) { + } +} +__attribute__((interrupt(25))) +void Vector25(void) { + + while (1) { + } +} +__attribute__((interrupt(26))) +void Vector26(void) { + + while (1) { + } +} +__attribute__((interrupt(27))) +void Vector27(void) { + + while (1) { + } +} +__attribute__((interrupt(28))) +void Vector28(void) { + + while (1) { + } +} +__attribute__((interrupt(29))) +void Vector29(void) { + + while (1) { + } +} +__attribute__((interrupt(30))) +void Vector30(void) { + + while (1) { + } +} +__attribute__((interrupt(31))) +void Vector31(void) { + + while (1) { + } +} +__attribute__((interrupt(32))) +void Vector32(void) { + + while (1) { + } +} +__attribute__((interrupt(33))) +void Vector33(void) { + + while (1) { + } +} +__attribute__((interrupt(34))) +void Vector34(void) { + + while (1) { + } +} +__attribute__((interrupt(35))) +void Vector35(void) { + + while (1) { + } +} +__attribute__((interrupt(36))) +void Vector36(void) { + + while (1) { + } +} +__attribute__((interrupt(37))) +void Vector37(void) { + + while (1) { + } +} +__attribute__((interrupt(38))) +void Vector38(void) { + + while (1) { + } +} +__attribute__((interrupt(39))) +void Vector39(void) { + + while (1) { + } +} +__attribute__((interrupt(40))) +void Vector40(void) { + + while (1) { + } +} +__attribute__((interrupt(41))) +void Vector41(void) { + + while (1) { + } +} +__attribute__((interrupt(42))) +void Vector42(void) { + + while (1) { + } +} +__attribute__((interrupt(44))) +void Vector44(void) { + + while (1) { + } +} +__attribute__((interrupt(45))) +void Vector45(void) { + + while (1) { + } +} +__attribute__((interrupt(46))) +void Vector46(void) { + + while (1) { + } +} +__attribute__((interrupt(47))) +void Vector47(void) { + + while (1) { + } +} +__attribute__((interrupt(48))) +void Vector48(void) { + + while (1) { + } +} +__attribute__((interrupt(50))) +void Vector50(void) { + + while (1) { + } +} +__attribute__((interrupt(51))) +void Vector51(void) { + + while (1) { + } +} +__attribute__((interrupt(53))) +void Vector53(void) { + + while (1) { + } +} +__attribute__((interrupt(54))) +void Vector54(void) { + + while (1) { + } +} +__attribute__((interrupt(55))) +void Vector55(void) { + + while (1) { + } +} + + -- cgit v1.2.3