From 97b7064031ed2be5980a59cdab8174a9074febb4 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Tue, 29 Oct 2019 19:38:09 +0100 Subject: Updating FSMC driver (SDRAM part first) --- .../STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h | 18 +++++++++++++-- testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c | 1 - .../STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h | 26 ++++++++++------------ 3 files changed, 28 insertions(+), 17 deletions(-) (limited to 'testhal/STM32/STM32F4xx/FSMC_SDRAM') diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h index da9c607..d1d3ada 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h @@ -27,8 +27,22 @@ /** * @brief Enables the FSMC subsystem. */ -#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) -#define HAL_USE_FSMC TRUE +#if !defined(HAL_USE_FSMC_SDRAM) || defined(__DOXYGEN__) +#define HAL_USE_FSMC_SDRAM TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC_SRAM) || defined(__DOXYGEN__) +#define HAL_USE_FSMC_SRAM FALSE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC_NAND) || defined(__DOXYGEN__) +#define HAL_USE_FSMC_NAND FALSE #endif /** diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c b/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c index 1ec34d2..45e8db6 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c @@ -23,7 +23,6 @@ #include "string.h" -#include "hal_fsmc_sdram.h" #include "membench.h" #include "memtest.h" diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h index c8d995f..4494929 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h @@ -22,32 +22,30 @@ #define STM32_FSMC_USE_FSMC1 TRUE #define STM32_FSMC_FSMC1_IRQ_PRIORITY 10 #define STM32_FSMC_DMA_CHN 0x03010201 +#define STM32_FSMC_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_FSMC_DMA_PRIORITY 0 +#define STM32_FSMC_DMA_ERROR_HOOK(nandp) osalSysHalt("FSMC DMA failure") /* * FSMC NAND driver system settings. */ -#define STM32_NAND_USE_FSMC_NAND1 FALSE -#define STM32_NAND_USE_FSMC_NAND2 FALSE -#define STM32_NAND_USE_EXT_INT FALSE -#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_NAND_DMA_PRIORITY 0 -#define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") +#define STM32_FSMC_USE_NAND1 FALSE +#define STM32_FSMC_USE_NAND2 FALSE +#define STM32_FSMC_USE_NAND_EXT_INT FALSE /* * FSMC SRAM driver system settings. */ -#define STM32_USE_FSMC_SRAM FALSE -#define STM32_SRAM_USE_FSMC_SRAM1 FALSE -#define STM32_SRAM_USE_FSMC_SRAM2 FALSE -#define STM32_SRAM_USE_FSMC_SRAM3 FALSE -#define STM32_SRAM_USE_FSMC_SRAM4 FALSE +#define STM32_FSMC_USE_SRAM1 FALSE +#define STM32_FSMC_USE_SRAM2 FALSE +#define STM32_FSMC_USE_SRAM3 FALSE +#define STM32_FSMC_USE_SRAM4 FALSE /* * FSMC SDRAM driver system settings. */ -#define STM32_USE_FSMC_SDRAM TRUE -#define STM32_SDRAM_USE_FSMC_SDRAM1 FALSE -#define STM32_SDRAM_USE_FSMC_SDRAM2 TRUE +#define STM32_FSMC_USE_SDRAM1 FALSE +#define STM32_FSMC_USE_SDRAM2 TRUE /* * TIMCAP driver system settings. -- cgit v1.2.3 From 90f32c35466c9edbd59716de66903b3f537f5abb Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Tue, 29 Oct 2019 20:16:08 +0100 Subject: Updating FSMC driver (SRAM part) --- testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h | 7 ------- 1 file changed, 7 deletions(-) (limited to 'testhal/STM32/STM32F4xx/FSMC_SDRAM') diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h index d1d3ada..9ad41fd 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h @@ -45,13 +45,6 @@ #define HAL_USE_FSMC_NAND FALSE #endif -/** - * @brief Enables the NAND subsystem. - */ -#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) -#define HAL_USE_NAND FALSE -#endif - /** * @brief Enables the 1-wire subsystem. */ -- cgit v1.2.3 From 13ebce61e2f0af08d6ffa0c13397da5ad31292c4 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 30 Oct 2019 10:53:30 +0100 Subject: Moved SDRAM defines out of example --- testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c | 78 ------------------------------- 1 file changed, 78 deletions(-) (limited to 'testhal/STM32/STM32F4xx/FSMC_SDRAM') diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c b/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c index 45e8db6..1ff7740 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c @@ -32,84 +32,6 @@ ****************************************************************************** */ -/* - * FMC SDRAM Mode definition register defines - */ -#define FMC_SDCMR_MRD_BURST_LENGTH_1 ((uint16_t)0x0000) -#define FMC_SDCMR_MRD_BURST_LENGTH_2 ((uint16_t)0x0001) -#define FMC_SDCMR_MRD_BURST_LENGTH_4 ((uint16_t)0x0002) -#define FMC_SDCMR_MRD_BURST_LENGTH_8 ((uint16_t)0x0004) -#define FMC_SDCMR_MRD_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000) -#define FMC_SDCMR_MRD_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008) -#define FMC_SDCMR_MRD_CAS_LATENCY_2 ((uint16_t)0x0020) -#define FMC_SDCMR_MRD_CAS_LATENCY_3 ((uint16_t)0x0030) -#define FMC_SDCMR_MRD_OPERATING_MODE_STANDARD ((uint16_t)0x0000) -#define FMC_SDCMR_MRD_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000) -#define FMC_SDCMR_MRD_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200) - -/* - * FMC_ReadPipe_Delay - */ -#define FMC_ReadPipe_Delay_0 ((uint32_t)0x00000000) -#define FMC_ReadPipe_Delay_1 ((uint32_t)0x00002000) -#define FMC_ReadPipe_Delay_2 ((uint32_t)0x00004000) -#define FMC_ReadPipe_Delay_Mask ((uint32_t)0x00006000) - -/* - * FMC_Read_Burst - */ -#define FMC_Read_Burst_Disable ((uint32_t)0x00000000) -#define FMC_Read_Burst_Enable ((uint32_t)0x00001000) -#define FMC_Read_Burst_Mask ((uint32_t)0x00001000) - -/* - * FMC_SDClock_Period - */ -#define FMC_SDClock_Disable ((uint32_t)0x00000000) -#define FMC_SDClock_Period_2 ((uint32_t)0x00000800) -#define FMC_SDClock_Period_3 ((uint32_t)0x00000C00) -#define FMC_SDClock_Period_Mask ((uint32_t)0x00000C00) - -/* - * FMC_ColumnBits_Number - */ -#define FMC_ColumnBits_Number_8b ((uint32_t)0x00000000) -#define FMC_ColumnBits_Number_9b ((uint32_t)0x00000001) -#define FMC_ColumnBits_Number_10b ((uint32_t)0x00000002) -#define FMC_ColumnBits_Number_11b ((uint32_t)0x00000003) - -/* - * FMC_RowBits_Number - */ -#define FMC_RowBits_Number_11b ((uint32_t)0x00000000) -#define FMC_RowBits_Number_12b ((uint32_t)0x00000004) -#define FMC_RowBits_Number_13b ((uint32_t)0x00000008) - -/* - * FMC_SDMemory_Data_Width - */ -#define FMC_SDMemory_Width_8b ((uint32_t)0x00000000) -#define FMC_SDMemory_Width_16b ((uint32_t)0x00000010) -#define FMC_SDMemory_Width_32b ((uint32_t)0x00000020) - -/* - * FMC_InternalBank_Number - */ -#define FMC_InternalBank_Number_2 ((uint32_t)0x00000000) -#define FMC_InternalBank_Number_4 ((uint32_t)0x00000040) - -/* - * FMC_CAS_Latency - */ -#define FMC_CAS_Latency_1 ((uint32_t)0x00000080) -#define FMC_CAS_Latency_2 ((uint32_t)0x00000100) -#define FMC_CAS_Latency_3 ((uint32_t)0x00000180) - -/* - * FMC_Write_Protection - */ -#define FMC_Write_Protection_Disable ((uint32_t)0x00000000) -#define FMC_Write_Protection_Enable ((uint32_t)0x00000200) #define SDRAM_SIZE (8 * 1024 * 1024) #define SDRAM_START ((void *)FSMC_Bank6_MAP_BASE) -- cgit v1.2.3 From 915b474b02349add9c17fa43ff0351503c3c5020 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 30 Oct 2019 12:52:31 +0100 Subject: Re-organised FSMC drivers --- .../STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h | 22 ++++++++++++-------- testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c | 4 ++-- .../STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h | 24 +++++++++++----------- 3 files changed, 28 insertions(+), 22 deletions(-) (limited to 'testhal/STM32/STM32F4xx/FSMC_SDRAM') diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h index 9ad41fd..91ad637 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h @@ -27,24 +27,30 @@ /** * @brief Enables the FSMC subsystem. */ -#if !defined(HAL_USE_FSMC_SDRAM) || defined(__DOXYGEN__) -#define HAL_USE_FSMC_SDRAM TRUE +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC TRUE #endif /** - * @brief Enables the FSMC subsystem. + * @brief Enables the SDRAM subsystem. */ -#if !defined(HAL_USE_FSMC_SRAM) || defined(__DOXYGEN__) -#define HAL_USE_FSMC_SRAM FALSE +#if !defined(HAL_USE_SDRAM) || defined(__DOXYGEN__) +#define HAL_USE_SDRAM TRUE #endif /** - * @brief Enables the FSMC subsystem. + * @brief Enables the SRAM subsystem. */ -#if !defined(HAL_USE_FSMC_NAND) || defined(__DOXYGEN__) -#define HAL_USE_FSMC_NAND FALSE +#if !defined(HAL_USE_SRAM) || defined(__DOXYGEN__) +#define HAL_USE_SRAM FALSE #endif +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif /** * @brief Enables the 1-wire subsystem. */ diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c b/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c index 1ff7740..0d3feee 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c @@ -183,8 +183,8 @@ int main(void) { halInit(); chSysInit(); - fsmcSdramInit(); - fsmcSdramStart(&SDRAMD, &sdram_cfg); + sdramInit(); + sdramStart(&SDRAMD1, &sdram_cfg); membench(); memtest(); diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h index 4494929..4e08dfe 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h @@ -22,30 +22,30 @@ #define STM32_FSMC_USE_FSMC1 TRUE #define STM32_FSMC_FSMC1_IRQ_PRIORITY 10 #define STM32_FSMC_DMA_CHN 0x03010201 -#define STM32_FSMC_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_FSMC_DMA_PRIORITY 0 -#define STM32_FSMC_DMA_ERROR_HOOK(nandp) osalSysHalt("FSMC DMA failure") /* * FSMC NAND driver system settings. */ -#define STM32_FSMC_USE_NAND1 FALSE -#define STM32_FSMC_USE_NAND2 FALSE -#define STM32_FSMC_USE_NAND_EXT_INT FALSE +#define STM32_NAND_USE_NAND1 FALSE +#define STM32_NAND_USE_NAND2 FALSE +#define STM32_NAND_USE_EXT_INT FALSE +#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_NAND_DMA_PRIORITY 0 +#define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") /* * FSMC SRAM driver system settings. */ -#define STM32_FSMC_USE_SRAM1 FALSE -#define STM32_FSMC_USE_SRAM2 FALSE -#define STM32_FSMC_USE_SRAM3 FALSE -#define STM32_FSMC_USE_SRAM4 FALSE +#define STM32_SRAM_USE_SRAM1 FALSE +#define STM32_SRAM_USE_SRAM2 FALSE +#define STM32_SRAM_USE_SRAM3 FALSE +#define STM32_SRAM_USE_SRAM4 FALSE /* * FSMC SDRAM driver system settings. */ -#define STM32_FSMC_USE_SDRAM1 FALSE -#define STM32_FSMC_USE_SDRAM2 TRUE +#define STM32_SDRAM_USE_SDRAM1 FALSE +#define STM32_SDRAM_USE_SDRAM2 TRUE /* * TIMCAP driver system settings. -- cgit v1.2.3 From f6b1a12ecf14e4c703b18f3d13537e878215e91a Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 30 Oct 2019 13:19:08 +0100 Subject: Fixed DMA2D example --- testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h | 1 + 1 file changed, 1 insertion(+) (limited to 'testhal/STM32/STM32F4xx/FSMC_SDRAM') diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h index 91ad637..51524e1 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h @@ -51,6 +51,7 @@ #if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) #define HAL_USE_NAND FALSE #endif + /** * @brief Enables the 1-wire subsystem. */ -- cgit v1.2.3