From ae7a4d40b84d8afc999691577210696f16e682f6 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 8 Mar 2018 20:14:13 +0100 Subject: Fixes for STM32F0 testhal --- testhal/STM32/STM32F0xx/crc/chconf.h | 93 +++++++++++++++++++- testhal/STM32/STM32F0xx/crc/halconf.h | 88 +++++++++++++++++-- testhal/STM32/STM32F0xx/crc/halconf_community.h | 20 ----- testhal/STM32/STM32F0xx/crc/mcuconf.h | 76 ++++++++++++----- testhal/STM32/STM32F0xx/onewire/chconf.h | 97 +++++++++++++++++++-- testhal/STM32/STM32F0xx/onewire/halconf.h | 38 ++++++++- testhal/STM32/STM32F0xx/onewire/mcuconf.h | 73 +++++++++++----- testhal/STM32/STM32F0xx/qei/chconf.h | 107 +++++++++++++++++++++--- testhal/STM32/STM32F0xx/qei/halconf.h | 38 ++++++++- testhal/STM32/STM32F0xx/qei/mcuconf.h | 85 +++++++++++-------- 10 files changed, 591 insertions(+), 124 deletions(-) (limited to 'testhal/STM32') diff --git a/testhal/STM32/STM32F0xx/crc/chconf.h b/testhal/STM32/STM32F0xx/crc/chconf.h index 6a187da..53bd676 100644 --- a/testhal/STM32/STM32F0xx/crc/chconf.h +++ b/testhal/STM32/STM32F0xx/crc/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -51,6 +51,18 @@ */ #define CH_CFG_ST_FREQUENCY 10000 +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#define CH_CFG_INTERVALS_SIZE 32 + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_TIME_TYPES_SIZE 32 + /** * @brief Time delta constant for the tick-less mode. * @note If this value is zero then the system uses the classic @@ -295,6 +307,15 @@ */ #define CH_CFG_USE_MEMPOOLS TRUE +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_OBJ_FIFOS TRUE + /** * @brief Dynamic Threads APIs. * @details If enabled then the dynamic threads creation APIs are included @@ -308,6 +329,56 @@ /** @} */ +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#define CH_CFG_USE_FACTORY TRUE + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 + +/** + * @brief Enables the registry of generic objects. + */ +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE + +/** + * @brief Enables factory for generic buffers. + */ +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE + +/** + * @brief Enables factory for semaphores. + */ +#define CH_CFG_FACTORY_SEMAPHORES TRUE + +/** + * @brief Enables factory for mailboxes. + */ +#define CH_CFG_FACTORY_MAILBOXES TRUE + +/** + * @brief Enables factory for objects FIFOs. + */ +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE + +/** @} */ + /*===========================================================================*/ /** * @name Debug options @@ -407,6 +478,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -416,9 +503,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ diff --git a/testhal/STM32/STM32F0xx/crc/halconf.h b/testhal/STM32/STM32F0xx/crc/halconf.h index 6e2d3c7..ef429c4 100644 --- a/testhal/STM32/STM32F0xx/crc/halconf.h +++ b/testhal/STM32/STM32F0xx/crc/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2015 Michael D. Spradling + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,8 +25,8 @@ * @{ */ -#ifndef _HALCONF_H_ -#define _HALCONF_H_ +#ifndef HALCONF_H +#define HALCONF_H #include "mcuconf.h" @@ -51,6 +51,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + /** * @brief Enables the DAC subsystem. */ @@ -114,6 +121,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the QSPI subsystem. + */ +#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__) +#define HAL_USE_QSPI FALSE +#endif + /** * @brief Enables the RTC subsystem. */ @@ -201,6 +215,28 @@ #define CAN_USE_SLEEP_MODE TRUE #endif +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + /*===========================================================================*/ /* I2C driver related settings. */ /*===========================================================================*/ @@ -294,7 +330,7 @@ * @brief Serial buffers size. * @details Configuration parameter, you can change the depth of the queue * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive + * @note The default is 16 bytes for both the transmission and receive * buffers. */ #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) @@ -309,13 +345,21 @@ * @brief Serial over USB buffers size. * @details Configuration parameter, the buffer size must be a multiple of * the USB data endpoint maximum packet size. - * @note The default is 64 bytes for both the transmission and receive + * @note The default is 256 bytes for both the transmission and receive * buffers. */ #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) #define SERIAL_USB_BUFFERS_SIZE 256 #endif +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + /*===========================================================================*/ /* SPI driver related settings. */ /*===========================================================================*/ @@ -336,12 +380,44 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + /*===========================================================================*/ /* Community drivers's includes */ /*===========================================================================*/ #include "halconf_community.h" -#endif /* _HALCONF_H_ */ +#endif /* HALCONF_H */ /** @} */ diff --git a/testhal/STM32/STM32F0xx/crc/halconf_community.h b/testhal/STM32/STM32F0xx/crc/halconf_community.h index 31ac01e..1f45ee5 100644 --- a/testhal/STM32/STM32F0xx/crc/halconf_community.h +++ b/testhal/STM32/STM32F0xx/crc/halconf_community.h @@ -93,26 +93,6 @@ */ #define ONEWIRE_USE_SEARCH_ROM TRUE -/*===========================================================================*/ -/* CRC driver settings. */ -/*===========================================================================*/ - -/** - * @brief Enables DMA engine when performing CRC transactions. - * @note Enabling this option also enables asynchronous API. - */ -#if !defined(CRC_USE_DMA) || defined(__DOXYGEN__) -#define CRC_USE_DMA FALSE -#endif - -/** - * @brief Enables the @p crcAcquireUnit() and @p crcReleaseUnit() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(CRC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define CRC_USE_MUTUAL_EXCLUSION TRUE -#endif - #endif /* HALCONF_COMMUNITY_H */ /** @} */ diff --git a/testhal/STM32/STM32F0xx/crc/mcuconf.h b/testhal/STM32/STM32F0xx/crc/mcuconf.h index ad184cd..98a9e21 100644 --- a/testhal/STM32/STM32F0xx/crc/mcuconf.h +++ b/testhal/STM32/STM32F0xx/crc/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2015 Michael D. Spradling + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -14,8 +14,8 @@ limitations under the License. */ -#ifndef _MCUCONF_H_ -#define _MCUCONF_H_ +#ifndef MCUCONF_H +#define MCUCONF_H /* * STM32F0xx drivers configuration. @@ -50,32 +50,33 @@ #define STM32_PLLMUL_VALUE 12 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 -#define STM32_ADCSW STM32_ADCSW_HSI14 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 +#define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_RTCSEL STM32_RTCSEL_LSI /* - * ADC driver system settings. + * IRQ system settings. */ -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 2 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 +#define STM32_IRQ_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI16_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI17_20_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI21_22_IRQ_PRIORITY 3 /* - * EXT driver system settings. + * ADC driver system settings. */ -#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_CKMODE STM32_ADC_CKMODE_ADCCLK +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) /* * GPT driver system settings. @@ -100,8 +101,31 @@ #define STM32_I2C_USE_DMA TRUE #define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI1 FALSE +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \ + STM32_I2S_MODE_RX) +#define STM32_I2S_SPI2_MODE (STM32_I2S_MODE_MASTER | \ + STM32_I2S_MODE_RX) +#define STM32_I2S_SPI1_IRQ_PRIORITY 2 +#define STM32_I2S_SPI2_IRQ_PRIORITY 2 +#define STM32_I2S_SPI1_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + /* * ICU driver system settings. */ @@ -140,6 +164,10 @@ #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 2 #define STM32_SPI_SPI2_IRQ_PRIORITY 2 +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* @@ -157,10 +185,20 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + /* * header for community drivers. */ #include "mcuconf_community.h" -#endif /* _MCUCONF_H_ */ + +#endif /* MCUCONF_H */ diff --git a/testhal/STM32/STM32F0xx/onewire/chconf.h b/testhal/STM32/STM32F0xx/onewire/chconf.h index 4b2d922..9339775 100644 --- a/testhal/STM32/STM32F0xx/onewire/chconf.h +++ b/testhal/STM32/STM32F0xx/onewire/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -42,14 +42,26 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ -#define CH_CFG_ST_RESOLUTION 32 +#define CH_CFG_ST_RESOLUTION 16 /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ -#define CH_CFG_ST_FREQUENCY 1000 +#define CH_CFG_ST_FREQUENCY 10000 + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#define CH_CFG_INTERVALS_SIZE 16 + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_TIME_TYPES_SIZE 16 /** * @brief Time delta constant for the tick-less mode. @@ -295,6 +307,15 @@ */ #define CH_CFG_USE_MEMPOOLS TRUE +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_OBJ_FIFOS TRUE + /** * @brief Dynamic Threads APIs. * @details If enabled then the dynamic threads creation APIs are included @@ -308,6 +329,56 @@ /** @} */ +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#define CH_CFG_USE_FACTORY TRUE + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 + +/** + * @brief Enables the registry of generic objects. + */ +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE + +/** + * @brief Enables factory for generic buffers. + */ +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE + +/** + * @brief Enables factory for semaphores. + */ +#define CH_CFG_FACTORY_SEMAPHORES TRUE + +/** + * @brief Enables factory for mailboxes. + */ +#define CH_CFG_FACTORY_MAILBOXES TRUE + +/** + * @brief Enables factory for objects FIFOs. + */ +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE + +/** @} */ + /*===========================================================================*/ /** * @name Debug options @@ -407,6 +478,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -416,9 +503,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ diff --git a/testhal/STM32/STM32F0xx/onewire/halconf.h b/testhal/STM32/STM32F0xx/onewire/halconf.h index 64811a5..35b4ed5 100644 --- a/testhal/STM32/STM32F0xx/onewire/halconf.h +++ b/testhal/STM32/STM32F0xx/onewire/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -51,6 +51,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + /** * @brief Enables the DAC subsystem. */ @@ -114,6 +121,13 @@ #define HAL_USE_PWM TRUE #endif +/** + * @brief Enables the QSPI subsystem. + */ +#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__) +#define HAL_USE_QSPI FALSE +#endif + /** * @brief Enables the RTC subsystem. */ @@ -201,6 +215,28 @@ #define CAN_USE_SLEEP_MODE TRUE #endif +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + /*===========================================================================*/ /* I2C driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/STM32F0xx/onewire/mcuconf.h b/testhal/STM32/STM32F0xx/onewire/mcuconf.h index 7773406..e09937d 100644 --- a/testhal/STM32/STM32F0xx/onewire/mcuconf.h +++ b/testhal/STM32/STM32F0xx/onewire/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -50,42 +50,41 @@ #define STM32_PLLMUL_VALUE 12 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 -#define STM32_ADCSW STM32_ADCSW_HSI14 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 +#define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_RTCSEL STM32_RTCSEL_LSI /* - * ADC driver system settings. + * IRQ system settings. */ -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 2 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 +#define STM32_IRQ_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI16_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI17_20_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI21_22_IRQ_PRIORITY 3 /* - * EXT driver system settings. + * ADC driver system settings. */ -#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_CKMODE STM32_ADC_CKMODE_ADCCLK +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) /* * GPT driver system settings. */ #define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 2 -#define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 #define STM32_GPT_TIM14_IRQ_PRIORITY 2 @@ -97,18 +96,40 @@ #define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_I2C1_IRQ_PRIORITY 3 #define STM32_I2C_I2C2_IRQ_PRIORITY 3 +#define STM32_I2C_USE_DMA TRUE #define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI1 FALSE +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \ + STM32_I2S_MODE_RX) +#define STM32_I2S_SPI2_MODE (STM32_I2S_MODE_MASTER | \ + STM32_I2S_MODE_RX) +#define STM32_I2S_SPI1_IRQ_PRIORITY 2 +#define STM32_I2S_SPI2_IRQ_PRIORITY 2 +#define STM32_I2S_SPI1_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 3 -#define STM32_ICU_TIM2_IRQ_PRIORITY 3 #define STM32_ICU_TIM3_IRQ_PRIORITY 3 /* @@ -116,11 +137,9 @@ */ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 TRUE #define STM32_PWM_TIM1_IRQ_PRIORITY 3 -#define STM32_PWM_TIM2_IRQ_PRIORITY 3 -#define STM32_PWM_TIM3_IRQ_PRIORITY 0 +#define STM32_PWM_TIM3_IRQ_PRIORITY 3 /* * SERIAL driver system settings. @@ -139,6 +158,10 @@ #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 2 #define STM32_SPI_SPI2_IRQ_PRIORITY 2 +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* @@ -156,6 +179,10 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* diff --git a/testhal/STM32/STM32F0xx/qei/chconf.h b/testhal/STM32/STM32F0xx/qei/chconf.h index b3260d4..53bd676 100644 --- a/testhal/STM32/STM32F0xx/qei/chconf.h +++ b/testhal/STM32/STM32F0xx/qei/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -42,7 +42,7 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ -#define CH_CFG_ST_RESOLUTION 16 +#define CH_CFG_ST_RESOLUTION 32 /** * @brief System tick frequency. @@ -51,6 +51,18 @@ */ #define CH_CFG_ST_FREQUENCY 10000 +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#define CH_CFG_INTERVALS_SIZE 32 + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_TIME_TYPES_SIZE 32 + /** * @brief Time delta constant for the tick-less mode. * @note If this value is zero then the system uses the classic @@ -295,6 +307,15 @@ */ #define CH_CFG_USE_MEMPOOLS TRUE +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_OBJ_FIFOS TRUE + /** * @brief Dynamic Threads APIs. * @details If enabled then the dynamic threads creation APIs are included @@ -308,6 +329,56 @@ /** @} */ +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#define CH_CFG_USE_FACTORY TRUE + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 + +/** + * @brief Enables the registry of generic objects. + */ +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE + +/** + * @brief Enables factory for generic buffers. + */ +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE + +/** + * @brief Enables factory for semaphores. + */ +#define CH_CFG_FACTORY_SEMAPHORES TRUE + +/** + * @brief Enables factory for mailboxes. + */ +#define CH_CFG_FACTORY_MAILBOXES TRUE + +/** + * @brief Enables factory for objects FIFOs. + */ +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE + +/** @} */ + /*===========================================================================*/ /** * @name Debug options @@ -329,7 +400,7 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE /** * @brief Debug option, parameters checks. @@ -338,7 +409,7 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE /** * @brief Debug option, consistency checks. @@ -348,7 +419,7 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE /** * @brief Debug option, trace buffer. @@ -356,7 +427,7 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL /** * @brief Trace buffer entries. @@ -375,7 +446,7 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE /** * @brief Debug option, stacks initialization. @@ -385,7 +456,7 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE /** * @brief Debug option, threads profiling. @@ -407,6 +478,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -416,9 +503,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ diff --git a/testhal/STM32/STM32F0xx/qei/halconf.h b/testhal/STM32/STM32F0xx/qei/halconf.h index 93cc713..ef429c4 100644 --- a/testhal/STM32/STM32F0xx/qei/halconf.h +++ b/testhal/STM32/STM32F0xx/qei/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -51,6 +51,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + /** * @brief Enables the DAC subsystem. */ @@ -114,6 +121,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the QSPI subsystem. + */ +#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__) +#define HAL_USE_QSPI FALSE +#endif + /** * @brief Enables the RTC subsystem. */ @@ -201,6 +215,28 @@ #define CAN_USE_SLEEP_MODE TRUE #endif +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + /*===========================================================================*/ /* I2C driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/STM32F0xx/qei/mcuconf.h b/testhal/STM32/STM32F0xx/qei/mcuconf.h index 6fb24b0..98a9e21 100644 --- a/testhal/STM32/STM32F0xx/qei/mcuconf.h +++ b/testhal/STM32/STM32F0xx/qei/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -50,38 +50,33 @@ #define STM32_PLLMUL_VALUE 12 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 -#define STM32_ADCSW STM32_ADCSW_HSI14 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_PLLNODIV STM32_PLLNODIV_DIV2 +#define STM32_USBSW STM32_USBSW_HSI48 #define STM32_CECSW STM32_CECSW_HSI #define STM32_I2C1SW STM32_I2C1SW_HSI #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_RTCSEL STM32_RTCSEL_LSI /* - * ADC driver system settings. + * IRQ system settings. */ -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 2 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 +#define STM32_IRQ_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI16_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI17_20_IRQ_PRIORITY 3 +#define STM32_IRQ_EXTI21_22_IRQ_PRIORITY 3 /* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. + * ADC driver system settings. */ -#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_CKMODE STM32_ADC_CKMODE_ADCCLK +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) /* * GPT driver system settings. @@ -106,8 +101,31 @@ #define STM32_I2C_USE_DMA TRUE #define STM32_I2C_I2C1_DMA_PRIORITY 1 #define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI1 FALSE +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \ + STM32_I2S_MODE_RX) +#define STM32_I2S_SPI2_MODE (STM32_I2S_MODE_MASTER | \ + STM32_I2S_MODE_RX) +#define STM32_I2S_SPI1_IRQ_PRIORITY 2 +#define STM32_I2S_SPI2_IRQ_PRIORITY 2 +#define STM32_I2S_SPI1_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + /* * ICU driver system settings. */ @@ -129,11 +147,6 @@ #define STM32_PWM_TIM2_IRQ_PRIORITY 3 #define STM32_PWM_TIM3_IRQ_PRIORITY 3 -/* - * RTC driver system settings. - */ -#define STM32_RTC_IRQ_PRIORITY 15 - /* * SERIAL driver system settings. */ @@ -151,6 +164,10 @@ #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 2 #define STM32_SPI_SPI2_IRQ_PRIORITY 2 +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* @@ -168,20 +185,16 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 FALSE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 - /* * WDG driver system settings. */ -#define STM32_WDG_USE_IWDG TRUE +#define STM32_WDG_USE_IWDG FALSE /* * header for community drivers. -- cgit v1.2.3