/* Copyright 2017 Jason Williams (Wilba) * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation, either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ #include "config.h" #include "keymap.h" // to get keymaps[][][] #include "tmk_core/common/eeprom.h" #include "progmem.h" // to read default from flash #include "quantum.h" // for send_string() #include "dynamic_keymap.h" #include "via.h" // for default VIA_EEPROM_ADDR_END #ifndef DYNAMIC_KEYMAP_LAYER_COUNT # define DYNAMIC_KEYMAP_LAYER_COUNT 4 #endif #ifndef DYNAMIC_KEYMAP_MACRO_COUNT # define DYNAMIC_KEYMAP_MACRO_COUNT 16 #endif // This is the default EEPROM max address to use for dynamic keymaps. // The default is the ATmega32u4 EEPROM max address. // Explicitly override it if the keyboard uses a microcontroller with // more EEPROM *and* it makes sense to increase it. #ifndef DYNAMIC_KEYMAP_EEPROM_MAX_ADDR # define DYNAMIC_KEYMAP_EEPROM_MAX_ADDR 1023 #endif // If DYNAMIC_KEYMAP_EEPROM_ADDR not explicitly defined in config.h, // default it start after VIA_EEPROM_CUSTOM_ADDR+VIA_EEPROM_CUSTOM_SIZE #ifndef DYNAMIC_KEYMAP_EEPROM_ADDR # ifdef VIA_EEPROM_CUSTOM_CONFIG_ADDR # define DYNAMIC_KEYMAP_EEPROM_ADDR (VIA_EEPROM_CUSTOM_CONFIG_ADDR + VIA_EEPROM_CUSTOM_CONFIG_SIZE) # else # error DYNAMIC_KEYMAP_EEPROM_ADDR not defined # endif #endif // Dynamic macro starts after dynamic keymaps #ifndef DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR # define DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR (DYNAMIC_KEYMAP_EEPROM_ADDR + (DYNAMIC_KEYMAP_LAYER_COUNT * MATRIX_ROWS * MATRIX_COLS * 2)) #endif // Sanity check that dynamic keymaps fit in available EEPROM // If there's not 100 bytes available for macros, then something is wrong. // The keyboard should override DYNAMIC_KEYMAP_LAYER_COUNT to reduce it, // or DYNAMIC_KEYMAP_EEPROM_MAX_ADDR to increase it, *only if* the microcontroller has // more than the default. #if DYNAMIC_KEYMAP_EEPROM_MAX_ADDR - DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR < 100 # error Dynamic keymaps are configured to use more EEPROM than is available. #endif // Dynamic macros are stored after the keymaps and use what is available // up to and including DYNAMIC_KEYMAP_EEPROM_MAX_ADDR. #ifndef DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE # define DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE (DYNAMIC_KEYMAP_EEPROM_MAX_ADDR - DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR + 1) #endif uint8_t dynamic_keymap_get_layer_count(void) { return DYNAMIC_KEYMAP_LAYER_COUNT; } void *dynamic_keymap_key_to_eeprom_address(uint8_t layer, uint8_t row, uint8_t column) { // TODO: optimize this with some left shifts return ((void *)DYNAMIC_KEYMAP_EEPROM_ADDR) + (layer * MATRIX_ROWS * MATRIX_COLS * 2) + (row * MATRIX_COLS * 2) + (column * 2); } uint16_t dynamic_keymap_get_keycode(uint8_t layer, uint8_t row, uint8_t column) { void *address = dynamic_keymap_key_to_eeprom_address(layer, row, column); // Big endian, so we can read/write EEPROM directly from host if we want uint16_t keycode = eeprom_read_byte(address) << 8; keycode |= eeprom_read_byte(address + 1); return keycode; } void dynamic_keymap_set_keycode(uint8_t layer, uint8_t row, uint8_t column, uint16_t keycode) { void *address = dynamic_keymap_key_to_eeprom_address(layer, row, column); // Big endian, so we can read/write EEPROM directly from host if we want eeprom_update_byte(address, (uint8_t)(keycode >> 8)); eeprom_update_byte(address + 1, (uint8_t)(keycode & 0xFF)); } void dynamic_keymap_reset(void) { // Reset the keymaps in EEPROM to what is in flash. // All keyboards using dynamic keymaps should define a layout // for the same number of layers as DYNAMIC_KEYMAP_LAYER_COUNT. for (int layer = 0; layer < DYNAMIC_KEYMAP_LAYER_COUNT; layer++) { for (int row = 0; row < MATRIX_ROWS; row++) { for (int column = 0; column < MATRIX_COLS; column++) { dynamic_keymap_set_keycode(layer, row, column, pgm_read_word(&keymaps[layer][row][column])); } } } } void dynamic_keymap_get_buffer(uint16_t offset, uint16_t size, uint8_t *data) { uint16_t dynamic_keymap_eeprom_size = DYNAMIC_KEYMAP_LAYER_COUNT * MATRIX_ROWS * MATRIX_COLS * 2; void * source = (void *)(DYNAMIC_KEYMAP_EEPROM_ADDR + offset); uint8_t *target = data; for (uint16_t i = 0; i < size; i++) { if (offset + i < dynamic_keymap_eeprom_size) { *target = eeprom_read_byte(source); } else { *target = 0x00; } source++; target++; } } void dynamic_keymap_set_buffer(uint16_t offset, uint16_t size, uint8_t *data) { uint16_t dynamic_keymap_eeprom_size = DYNAMIC_KEYMAP_LAYER_COUNT * MATRIX_ROWS * MATRIX_COLS * 2; void * target = (void *)(DYNAMIC_KEYMAP_EEPROM_ADDR + offset); uint8_t *source = data; for (uint16_t i = 0; i < size; i++) { if (offset + i < dynamic_keymap_eeprom_size) { eeprom_update_byte(target, *source); } source++; target++; } } // This overrides the one in quantum/keymap_common.c uint16_t keymap_key_to_keycode(uint8_t layer, keypos_t key) { if (layer < DYNAMIC_KEYMAP_LAYER_COUNT && key.row < MATRIX_ROWS && key.col < MATRIX_COLS) { return dynamic_keymap_get_keycode(layer, key.row, key.col); } else { return KC_NO; } } uint8_t dynamic_keymap_macro_get_count(void) { return DYNAMIC_KEYMAP_MACRO_COUNT; } uint16_t dynamic_keymap_macro_get_buffer_size(void) { return DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE; } void dynamic_keymap_macro_get_buffer(uint16_t offset, uint16_t size, uint8_t *data) { void * source = (void *)(DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR + offset); uint8_t *target = data; for (uint16_t i = 0; i < size; i++) { if (offset + i < DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE) { *target = eeprom_read_byte(source); } else { *target = 0x00; } source++; target++; } } void dynamic_keymap_macro_set_buffer(uint16_t offset, uint16_t size, uint8_t *data) { void * target = (void *)(DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR + offset); uint8_t *source = data; for (uint16_t i = 0; i < size; i++) { if (offset + i < DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE) { eeprom_update_byte(target, *source); } source++; target++; } } void dynamic_keymap_macro_reset(void) { void *p = (void *)(DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR); void *end = (void *)(DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR + DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE); while (p != end) { eeprom_update_byte(p, 0); ++p; } } void dynamic_keymap_macro_send(uint8_t id) { if (id >= DYNAMIC_KEYMAP_MACRO_COUNT) { return; } // Check the last byte of the buffer. // If it's not zero, then we are in the middle // of buffer writing, possibly an aborted buffer // write. So do nothing. void *p = (void *)(DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR + DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE - 1); if (eeprom_read_byte(p) != 0) { return; } // Skip N null characters // p will then point to the Nth macro p = (void *)(DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR); void *end = (void *)(DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR + DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE); while (id > 0) { // If we are past the end of the buffer, then the buffer // contents are garbage, i.e. there were not DYNAMIC_KEYMAP_MACRO_COUNT // nulls in the buffer. if (p == end) { return; } if (eeprom_read_byte(p) == 0) { --id; } ++p; } // Send the macro string one or three chars at a time // by making temporary 1 or 3 char strings char data[4] = {0, 0, 0, 0}; // We already checked there was a null at the end of // the buffer, so this cannot go past the end while (1) { data[0] = eeprom_read_byte(p++); data[1] = 0; // Stop at the null terminator of this macro string if (data[0] == 0) { break; } // If the char is magic (tap, down, up), // add the next char (key to use) and send a 3 char string. if (data[0] == SS_TAP_CODE || data[0] == SS_DOWN_CODE || data[0] == SS_UP_CODE) { data[1] = data[0]; data[0] = SS_QMK_PREFIX; data[2] = eeprom_read_byte(p++); if (data[2] == 0) { break; } } send_string(data); } } 68 169 170 171 172 173 174 175 176 177 178
//*****************************************************************************
//
// hw_qei.h - Macros used when accessing the QEI hardware.
//
// Copyright (c) 2005-2016 Texas Instruments Incorporated.  All rights reserved.
// Software License Agreement
// 
//   Redistribution and use in source and binary forms, with or without
//   modification, are permitted provided that the following conditions
//   are met:
// 
//   Redistributions of source code must retain the above copyright
//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the
//   documentation and/or other materials provided with the  
//   distribution.
// 
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// 
// This is part of revision 2.1.3.156 of the Tiva Firmware Development Package.
//
//*****************************************************************************

#ifndef __HW_QEI_H__
#define __HW_QEI_H__

//*****************************************************************************
//
// The following are defines for the QEI register offsets.
//
//*****************************************************************************
#define QEI_O_CTL               0x00000000  // QEI Control
#define QEI_O_STAT              0x00000004  // QEI Status
#define QEI_O_POS               0x00000008  // QEI Position
#define QEI_O_MAXPOS            0x0000000C  // QEI Maximum Position
#define QEI_O_LOAD              0x00000010  // QEI Timer Load
#define QEI_O_TIME              0x00000014  // QEI Timer
#define QEI_O_COUNT             0x00000018  // QEI Velocity Counter
#define QEI_O_SPEED             0x0000001C  // QEI Velocity
#define QEI_O_INTEN             0x00000020  // QEI Interrupt Enable
#define QEI_O_RIS               0x00000024  // QEI Raw Interrupt Status
#define QEI_O_ISC               0x00000028  // QEI Interrupt Status and Clear

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_CTL register.
//
//*****************************************************************************
#define QEI_CTL_FILTCNT_M       0x000F0000  // Input Filter Prescale Count
#define QEI_CTL_FILTEN          0x00002000  // Enable Input Filter
#define QEI_CTL_STALLEN         0x00001000  // Stall QEI
#define QEI_CTL_INVI            0x00000800  // Invert Index Pulse
#define QEI_CTL_INVB            0x00000400  // Invert PhB
#define QEI_CTL_INVA            0x00000200  // Invert PhA
#define QEI_CTL_VELDIV_M        0x000001C0  // Predivide Velocity
#define QEI_CTL_VELDIV_1        0x00000000  // QEI clock /1
#define QEI_CTL_VELDIV_2        0x00000040  // QEI clock /2
#define QEI_CTL_VELDIV_4        0x00000080  // QEI clock /4
#define QEI_CTL_VELDIV_8        0x000000C0  // QEI clock /8
#define QEI_CTL_VELDIV_16       0x00000100  // QEI clock /16
#define QEI_CTL_VELDIV_32       0x00000140  // QEI clock /32
#define QEI_CTL_VELDIV_64       0x00000180  // QEI clock /64
#define QEI_CTL_VELDIV_128      0x000001C0  // QEI clock /128
#define QEI_CTL_VELEN           0x00000020  // Capture Velocity
#define QEI_CTL_RESMODE         0x00000010  // Reset Mode
#define QEI_CTL_CAPMODE         0x00000008  // Capture Mode
#define QEI_CTL_SIGMODE         0x00000004  // Signal Mode
#define QEI_CTL_SWAP            0x00000002  // Swap Signals
#define QEI_CTL_ENABLE          0x00000001  // Enable QEI
#define QEI_CTL_FILTCNT_S       16

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_STAT register.
//
//*****************************************************************************
#define QEI_STAT_DIRECTION      0x00000002  // Direction of Rotation
#define QEI_STAT_ERROR          0x00000001  // Error Detected

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_POS register.
//
//*****************************************************************************
#define QEI_POS_M               0xFFFFFFFF  // Current Position Integrator
                                            // Value
#define QEI_POS_S               0

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_MAXPOS register.
//
//*****************************************************************************
#define QEI_MAXPOS_M            0xFFFFFFFF  // Maximum Position Integrator
                                            // Value
#define QEI_MAXPOS_S            0

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_LOAD register.
//
//*****************************************************************************
#define QEI_LOAD_M              0xFFFFFFFF  // Velocity Timer Load Value
#define QEI_LOAD_S              0

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_TIME register.
//
//*****************************************************************************
#define QEI_TIME_M              0xFFFFFFFF  // Velocity Timer Current Value
#define QEI_TIME_S              0

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_COUNT register.
//
//*****************************************************************************
#define QEI_COUNT_M             0xFFFFFFFF  // Velocity Pulse Count
#define QEI_COUNT_S             0

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_SPEED register.
//
//*****************************************************************************
#define QEI_SPEED_M             0xFFFFFFFF  // Velocity
#define QEI_SPEED_S             0

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_INTEN register.
//
//*****************************************************************************
#define QEI_INTEN_ERROR         0x00000008  // Phase Error Interrupt Enable
#define QEI_INTEN_DIR           0x00000004  // Direction Change Interrupt
                                            // Enable
#define QEI_INTEN_TIMER         0x00000002  // Timer Expires Interrupt Enable
#define QEI_INTEN_INDEX         0x00000001  // Index Pulse Detected Interrupt
                                            // Enable

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_RIS register.
//
//*****************************************************************************
#define QEI_RIS_ERROR           0x00000008  // Phase Error Detected
#define QEI_RIS_DIR             0x00000004  // Direction Change Detected
#define QEI_RIS_TIMER           0x00000002  // Velocity Timer Expired
#define QEI_RIS_INDEX           0x00000001  // Index Pulse Asserted

//*****************************************************************************
//
// The following are defines for the bit fields in the QEI_O_ISC register.
//
//*****************************************************************************
#define QEI_ISC_ERROR           0x00000008  // Phase Error Interrupt
#define QEI_ISC_DIR             0x00000004  // Direction Change Interrupt
#define QEI_ISC_TIMER           0x00000002  // Velocity Timer Expired Interrupt
#define QEI_ISC_INDEX           0x00000001  // Index Pulse Interrupt

#endif // __HW_QEI_H__