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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2007-10-30 10:46:57 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2007-10-30 10:46:57 +0000 |
| commit | 35dea10cc76722976bfbf368dd50f7617ca86a45 (patch) | |
| tree | c900ffd7fbee5e95c02c1e20c023873c26f877f7 /demos/ARM7-LPC214x-GCC | |
| parent | 5eeed3ddb57efd621240097b87129c49ed6185a6 (diff) | |
| download | ChibiOS-35dea10cc76722976bfbf368dd50f7617ca86a45.tar.gz ChibiOS-35dea10cc76722976bfbf368dd50f7617ca86a45.tar.bz2 ChibiOS-35dea10cc76722976bfbf368dd50f7617ca86a45.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@69 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos/ARM7-LPC214x-GCC')
| -rw-r--r-- | demos/ARM7-LPC214x-GCC/Makefile | 1 | ||||
| -rw-r--r-- | demos/ARM7-LPC214x-GCC/chcore.c | 3 | ||||
| -rw-r--r-- | demos/ARM7-LPC214x-GCC/chcore2.s | 10 |
3 files changed, 14 insertions, 0 deletions
diff --git a/demos/ARM7-LPC214x-GCC/Makefile b/demos/ARM7-LPC214x-GCC/Makefile index fb9dba78b..310124c2a 100644 --- a/demos/ARM7-LPC214x-GCC/Makefile +++ b/demos/ARM7-LPC214x-GCC/Makefile @@ -64,6 +64,7 @@ UADEFS = # List ARM-mode C source files here
ASRC = chcore.c main.c buzzer.c ../../src/lib/evtimer.c ../../test/test.c \
../../ports/ARM7-LPC214x/GCC/vic.c ../../ports/ARM7-LPC214x/GCC/lpc214x_serial.c \
+ ../../ports/ARM7-LPC214x/GCC/lpc214x_ssp.c \
../../src/chinit.c ../../src/chlists.c ../../src/chdelta.c ../../src/chschd.c \
../../src/chthreads.c ../../src/chsem.c ../../src/chevents.c ../../src/chmsg.c \
../../src/chsleep.c ../../src/chqueues.c ../../src/chserial.c
diff --git a/demos/ARM7-LPC214x-GCC/chcore.c b/demos/ARM7-LPC214x-GCC/chcore.c index e0de6fc02..beee2a7ae 100644 --- a/demos/ARM7-LPC214x-GCC/chcore.c +++ b/demos/ARM7-LPC214x-GCC/chcore.c @@ -22,6 +22,7 @@ #include "lpc214x.h"
#include "vic.h"
#include "lpc214x_serial.h"
+#include "lpc214x_ssp.h"
#include "buzzer.h"
@@ -117,6 +118,7 @@ void hwinit(void) { SetVICVector(T0IrqHandler, 0, SOURCE_Timer0);
SetVICVector(UART0IrqHandler, 1, SOURCE_UART0);
SetVICVector(UART1IrqHandler, 2, SOURCE_UART1);
+ SetVICVector(SSPIrqHandler, 3, SOURCE_SPI1);
/*
* System Timer initialization, 1ms intervals.
@@ -133,6 +135,7 @@ void hwinit(void) { * Other subsystems.
*/
InitSerial();
+ InitSSP();
InitBuzzer();
}
diff --git a/demos/ARM7-LPC214x-GCC/chcore2.s b/demos/ARM7-LPC214x-GCC/chcore2.s index f734eebba..97a38fdfe 100644 --- a/demos/ARM7-LPC214x-GCC/chcore2.s +++ b/demos/ARM7-LPC214x-GCC/chcore2.s @@ -155,6 +155,16 @@ UART1IrqHandler: bl UART1Irq
b IrqCommon
+.globl SSPIrqHandler
+SSPIrqHandler:
+ sub lr, lr, #4
+ stmfd sp!, {r0-r3, r12, lr}
+ mrs r0, SPSR // Workaround for ARM7TDMI+VIC
+ tst r0, #I_BIT // spurious interrupts.
+ ldmnefd sp!, {r0-r3, r12, pc}^
+ bl SSPIrq
+ b IrqCommon
+
/*
* Common exit point for all IRQ routines, it performs the rescheduling if
* required.
|