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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2008-04-11 14:39:49 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2008-04-11 14:39:49 +0000
commite1613c5169d7c792015d6a0bd2224626873af4e2 (patch)
treec5436f76dd1c0c944560c8c7e1618d3be9bcd41d /ports/ARMCM3/chcore.c
parent2f99ed97a977f64fd7a11cb6cce569c879be4420 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@259 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'ports/ARMCM3/chcore.c')
-rw-r--r--ports/ARMCM3/chcore.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/ports/ARMCM3/chcore.c b/ports/ARMCM3/chcore.c
index ea33f62eb..d691cee20 100644
--- a/ports/ARMCM3/chcore.c
+++ b/ports/ARMCM3/chcore.c
@@ -95,10 +95,10 @@ void chSysIRQExitI(void) {
asm volatile ("mrs r0, PSP \n\t" \
"ldr r1, =retaddr \n\t" \
- "ldr r2, [r0, #18] \n\t" \
+ "ldr r2, [r0, #24] \n\t" \
"str r2, [r1] \n\t" \
"ldr r1, =threadswitch \n\t" \
- "str r1, [r0, #18] ");
+ "str r1, [r0, #24] ");
return; /* Note, returns *without* re-enabling interrupts.*/
}
}
@@ -106,7 +106,7 @@ void chSysIRQExitI(void) {
}
/*
- * This code is execute in thread mode when exiting from an ISR routine that
+ * This code is executed in thread mode when exiting from an ISR routine that
* requires rescheduling.
*/
__attribute__((naked, weak))