diff options
Diffstat (limited to 'demos/ARMCM3-STM32F103-GCC/stm32lib/inc')
23 files changed, 0 insertions, 8211 deletions
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/misc.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/misc.h deleted file mode 100644 index db6426244..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/misc.h +++ /dev/null @@ -1,219 +0,0 @@ -/**
- ******************************************************************************
- * @file misc.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the miscellaneous
- * firmware library functions (add-on to CMSIS functions).
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __MISC_H
-#define __MISC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup MISC
- * @{
- */
-
-/** @defgroup MISC_Exported_Types
- * @{
- */
-
-/**
- * @brief NVIC Init Structure definition
- */
-
-typedef struct
-{
- uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
- This parameter can be a value of @ref IRQn_Type
- (For the complete STM32 Devices IRQ Channels list, please
- refer to stm32f10x.h file) */
-
- uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
- specified in NVIC_IRQChannel. This parameter can be a value
- between 0 and 15 as described in the table @ref NVIC_Priority_Table */
-
- uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
- in NVIC_IRQChannel. This parameter can be a value
- between 0 and 15 as described in the table @ref NVIC_Priority_Table */
-
- FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
- will be enabled or disabled.
- This parameter can be set either to ENABLE or DISABLE */
-} NVIC_InitTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup NVIC_Priority_Table
- * @{
- */
-
-/**
-@code
- The table below gives the allowed values of the pre-emption priority and subpriority according
- to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
- ============================================================================================================================
- NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
- ============================================================================================================================
- NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority
- | | | 4 bits for subpriority
- ----------------------------------------------------------------------------------------------------------------------------
- NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
- | | | 3 bits for subpriority
- ----------------------------------------------------------------------------------------------------------------------------
- NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
- | | | 2 bits for subpriority
- ----------------------------------------------------------------------------------------------------------------------------
- NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
- | | | 1 bits for subpriority
- ----------------------------------------------------------------------------------------------------------------------------
- NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority
- | | | 0 bits for subpriority
- ============================================================================================================================
-@endcode
-*/
-
-/**
- * @}
- */
-
-/** @defgroup MISC_Exported_Constants
- * @{
- */
-
-/** @defgroup Vector_Table_Base
- * @{
- */
-
-#define NVIC_VectTab_RAM ((uint32_t)0x20000000)
-#define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
-#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
- ((VECTTAB) == NVIC_VectTab_FLASH))
-/**
- * @}
- */
-
-/** @defgroup System_Low_Power
- * @{
- */
-
-#define NVIC_LP_SEVONPEND ((uint8_t)0x10)
-#define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
-#define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
-#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
- ((LP) == NVIC_LP_SLEEPDEEP) || \
- ((LP) == NVIC_LP_SLEEPONEXIT))
-/**
- * @}
- */
-
-/** @defgroup Preemption_Priority_Group
- * @{
- */
-
-#define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
- 4 bits for subpriority */
-#define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
- 3 bits for subpriority */
-#define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
- 2 bits for subpriority */
-#define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
- 1 bits for subpriority */
-#define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
- 0 bits for subpriority */
-
-#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
- ((GROUP) == NVIC_PriorityGroup_1) || \
- ((GROUP) == NVIC_PriorityGroup_2) || \
- ((GROUP) == NVIC_PriorityGroup_3) || \
- ((GROUP) == NVIC_PriorityGroup_4))
-
-#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
-
-#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
-
-#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x0007FFFF)
-
-/**
- * @}
- */
-
-/** @defgroup SysTick_clock_source
- * @{
- */
-
-#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
-#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
-#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
- ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup MISC_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup MISC_Exported_Functions
- * @{
- */
-
-void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
-void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
-void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
-void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
-void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __MISC_H */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_adc.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_adc.h deleted file mode 100644 index fd02a62cd..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_adc.h +++ /dev/null @@ -1,479 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_adc.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the ADC firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_ADC_H
-#define __STM32F10x_ADC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup ADC
- * @{
- */
-
-/** @defgroup ADC_Exported_Types
- * @{
- */
-
-/**
- * @brief ADC Init structure definition
- */
-
-typedef struct
-{
- uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or
- dual mode.
- This parameter can be a value of @ref ADC_mode */
-
- FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in
- Scan (multichannels) or Single (one channel) mode.
- This parameter can be set to ENABLE or DISABLE */
-
- FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in
- Continuous or Single mode.
- This parameter can be set to ENABLE or DISABLE. */
-
- uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog
- to digital conversion of regular channels. This parameter
- can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
-
- uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
- This parameter can be a value of @ref ADC_data_align */
-
- uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted
- using the sequencer for regular channel group.
- This parameter must range from 1 to 16. */
-}ADC_InitTypeDef;
-/**
- * @}
- */
-
-/** @defgroup ADC_Exported_Constants
- * @{
- */
-
-#define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
- ((PERIPH) == ADC2) || \
- ((PERIPH) == ADC3))
-
-#define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
- ((PERIPH) == ADC3))
-
-/** @defgroup ADC_mode
- * @{
- */
-
-#define ADC_Mode_Independent ((uint32_t)0x00000000)
-#define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000)
-#define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000)
-#define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000)
-#define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000)
-#define ADC_Mode_InjecSimult ((uint32_t)0x00050000)
-#define ADC_Mode_RegSimult ((uint32_t)0x00060000)
-#define ADC_Mode_FastInterl ((uint32_t)0x00070000)
-#define ADC_Mode_SlowInterl ((uint32_t)0x00080000)
-#define ADC_Mode_AlterTrig ((uint32_t)0x00090000)
-
-#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
- ((MODE) == ADC_Mode_RegInjecSimult) || \
- ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \
- ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \
- ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \
- ((MODE) == ADC_Mode_InjecSimult) || \
- ((MODE) == ADC_Mode_RegSimult) || \
- ((MODE) == ADC_Mode_FastInterl) || \
- ((MODE) == ADC_Mode_SlowInterl) || \
- ((MODE) == ADC_Mode_AlterTrig))
-/**
- * @}
- */
-
-/** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion
- * @{
- */
-
-#define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */
-#define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */
-#define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */
-#define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */
-#define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */
-#define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */
-
-#define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */
-#define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */
-
-#define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */
-#define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */
-#define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */
-#define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */
-#define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */
-#define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */
-
-#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
- ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
- ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
- ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
- ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
- ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
- ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \
- ((REGTRIG) == ADC_ExternalTrigConv_None) || \
- ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
- ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
- ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
- ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
- ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
- ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3))
-/**
- * @}
- */
-
-/** @defgroup ADC_data_align
- * @{
- */
-
-#define ADC_DataAlign_Right ((uint32_t)0x00000000)
-#define ADC_DataAlign_Left ((uint32_t)0x00000800)
-#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
- ((ALIGN) == ADC_DataAlign_Left))
-/**
- * @}
- */
-
-/** @defgroup ADC_channels
- * @{
- */
-
-#define ADC_Channel_0 ((uint8_t)0x00)
-#define ADC_Channel_1 ((uint8_t)0x01)
-#define ADC_Channel_2 ((uint8_t)0x02)
-#define ADC_Channel_3 ((uint8_t)0x03)
-#define ADC_Channel_4 ((uint8_t)0x04)
-#define ADC_Channel_5 ((uint8_t)0x05)
-#define ADC_Channel_6 ((uint8_t)0x06)
-#define ADC_Channel_7 ((uint8_t)0x07)
-#define ADC_Channel_8 ((uint8_t)0x08)
-#define ADC_Channel_9 ((uint8_t)0x09)
-#define ADC_Channel_10 ((uint8_t)0x0A)
-#define ADC_Channel_11 ((uint8_t)0x0B)
-#define ADC_Channel_12 ((uint8_t)0x0C)
-#define ADC_Channel_13 ((uint8_t)0x0D)
-#define ADC_Channel_14 ((uint8_t)0x0E)
-#define ADC_Channel_15 ((uint8_t)0x0F)
-#define ADC_Channel_16 ((uint8_t)0x10)
-#define ADC_Channel_17 ((uint8_t)0x11)
-
-#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
- ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
- ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
- ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
- ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \
- ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \
- ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \
- ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \
- ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17))
-/**
- * @}
- */
-
-/** @defgroup ADC_sampling_time
- * @{
- */
-
-#define ADC_SampleTime_1Cycles5 ((uint8_t)0x00)
-#define ADC_SampleTime_7Cycles5 ((uint8_t)0x01)
-#define ADC_SampleTime_13Cycles5 ((uint8_t)0x02)
-#define ADC_SampleTime_28Cycles5 ((uint8_t)0x03)
-#define ADC_SampleTime_41Cycles5 ((uint8_t)0x04)
-#define ADC_SampleTime_55Cycles5 ((uint8_t)0x05)
-#define ADC_SampleTime_71Cycles5 ((uint8_t)0x06)
-#define ADC_SampleTime_239Cycles5 ((uint8_t)0x07)
-#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
- ((TIME) == ADC_SampleTime_7Cycles5) || \
- ((TIME) == ADC_SampleTime_13Cycles5) || \
- ((TIME) == ADC_SampleTime_28Cycles5) || \
- ((TIME) == ADC_SampleTime_41Cycles5) || \
- ((TIME) == ADC_SampleTime_55Cycles5) || \
- ((TIME) == ADC_SampleTime_71Cycles5) || \
- ((TIME) == ADC_SampleTime_239Cycles5))
-/**
- * @}
- */
-
-/** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion
- * @{
- */
-
-#define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */
-#define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */
-#define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */
-#define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */
-#define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */
-
-#define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */
-#define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */
-#define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */
-
-#define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */
-#define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */
-#define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */
-#define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */
-#define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */
-
-#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \
- ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4))
-/**
- * @}
- */
-
-/** @defgroup ADC_injected_channel_selection
- * @{
- */
-
-#define ADC_InjectedChannel_1 ((uint8_t)0x14)
-#define ADC_InjectedChannel_2 ((uint8_t)0x18)
-#define ADC_InjectedChannel_3 ((uint8_t)0x1C)
-#define ADC_InjectedChannel_4 ((uint8_t)0x20)
-#define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
- ((CHANNEL) == ADC_InjectedChannel_2) || \
- ((CHANNEL) == ADC_InjectedChannel_3) || \
- ((CHANNEL) == ADC_InjectedChannel_4))
-/**
- * @}
- */
-
-/** @defgroup ADC_analog_watchdog_selection
- * @{
- */
-
-#define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
-#define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
-#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
-#define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)
-#define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)
-#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
-#define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
-
-#define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
- ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
- ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
- ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
- ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
- ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
- ((WATCHDOG) == ADC_AnalogWatchdog_None))
-/**
- * @}
- */
-
-/** @defgroup ADC_interrupts_definition
- * @{
- */
-
-#define ADC_IT_EOC ((uint16_t)0x0220)
-#define ADC_IT_AWD ((uint16_t)0x0140)
-#define ADC_IT_JEOC ((uint16_t)0x0480)
-
-#define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00))
-
-#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
- ((IT) == ADC_IT_JEOC))
-/**
- * @}
- */
-
-/** @defgroup ADC_flags_definition
- * @{
- */
-
-#define ADC_FLAG_AWD ((uint8_t)0x01)
-#define ADC_FLAG_EOC ((uint8_t)0x02)
-#define ADC_FLAG_JEOC ((uint8_t)0x04)
-#define ADC_FLAG_JSTRT ((uint8_t)0x08)
-#define ADC_FLAG_STRT ((uint8_t)0x10)
-#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00))
-#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \
- ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \
- ((FLAG) == ADC_FLAG_STRT))
-/**
- * @}
- */
-
-/** @defgroup ADC_thresholds
- * @{
- */
-
-#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
-
-/**
- * @}
- */
-
-/** @defgroup ADC_injected_offset
- * @{
- */
-
-#define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
-
-/**
- * @}
- */
-
-/** @defgroup ADC_injected_length
- * @{
- */
-
-#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
-
-/**
- * @}
- */
-
-/** @defgroup ADC_injected_rank
- * @{
- */
-
-#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
-
-/**
- * @}
- */
-
-
-/** @defgroup ADC_regular_length
- * @{
- */
-
-#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
-/**
- * @}
- */
-
-/** @defgroup ADC_regular_rank
- * @{
- */
-
-#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
-
-/**
- * @}
- */
-
-/** @defgroup ADC_regular_discontinuous_mode_number
- * @{
- */
-
-#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup ADC_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup ADC_Exported_Functions
- * @{
- */
-
-void ADC_DeInit(ADC_TypeDef* ADCx);
-void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
-void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
-void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
-void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
-void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
-void ADC_ResetCalibration(ADC_TypeDef* ADCx);
-FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx);
-void ADC_StartCalibration(ADC_TypeDef* ADCx);
-FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
-void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
-FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
-void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
-void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
-void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
-void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
-uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
-uint32_t ADC_GetDualModeConversionValue(void);
-void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
-void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
-void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
-void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
-void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
-FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
-void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
-void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length);
-void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset);
-uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
-void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
-void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
-void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
-void ADC_TempSensorVrefintCmd(FunctionalState NewState);
-FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
-void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
-ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
-void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32F10x_ADC_H */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_bkp.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_bkp.h deleted file mode 100644 index 531d61f17..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_bkp.h +++ /dev/null @@ -1,194 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_bkp.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the BKP firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_BKP_H
-#define __STM32F10x_BKP_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup BKP
- * @{
- */
-
-/** @defgroup BKP_Exported_Types
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup BKP_Exported_Constants
- * @{
- */
-
-/** @defgroup Tamper_Pin_active_level
- * @{
- */
-
-#define BKP_TamperPinLevel_High ((uint16_t)0x0000)
-#define BKP_TamperPinLevel_Low ((uint16_t)0x0001)
-#define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \
- ((LEVEL) == BKP_TamperPinLevel_Low))
-/**
- * @}
- */
-
-/** @defgroup RTC_output_source_to_output_on_the_Tamper_pin
- * @{
- */
-
-#define BKP_RTCOutputSource_None ((uint16_t)0x0000)
-#define BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080)
-#define BKP_RTCOutputSource_Alarm ((uint16_t)0x0100)
-#define BKP_RTCOutputSource_Second ((uint16_t)0x0300)
-#define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \
- ((SOURCE) == BKP_RTCOutputSource_CalibClock) || \
- ((SOURCE) == BKP_RTCOutputSource_Alarm) || \
- ((SOURCE) == BKP_RTCOutputSource_Second))
-/**
- * @}
- */
-
-/** @defgroup Data_Backup_Register
- * @{
- */
-
-#define BKP_DR1 ((uint16_t)0x0004)
-#define BKP_DR2 ((uint16_t)0x0008)
-#define BKP_DR3 ((uint16_t)0x000C)
-#define BKP_DR4 ((uint16_t)0x0010)
-#define BKP_DR5 ((uint16_t)0x0014)
-#define BKP_DR6 ((uint16_t)0x0018)
-#define BKP_DR7 ((uint16_t)0x001C)
-#define BKP_DR8 ((uint16_t)0x0020)
-#define BKP_DR9 ((uint16_t)0x0024)
-#define BKP_DR10 ((uint16_t)0x0028)
-#define BKP_DR11 ((uint16_t)0x0040)
-#define BKP_DR12 ((uint16_t)0x0044)
-#define BKP_DR13 ((uint16_t)0x0048)
-#define BKP_DR14 ((uint16_t)0x004C)
-#define BKP_DR15 ((uint16_t)0x0050)
-#define BKP_DR16 ((uint16_t)0x0054)
-#define BKP_DR17 ((uint16_t)0x0058)
-#define BKP_DR18 ((uint16_t)0x005C)
-#define BKP_DR19 ((uint16_t)0x0060)
-#define BKP_DR20 ((uint16_t)0x0064)
-#define BKP_DR21 ((uint16_t)0x0068)
-#define BKP_DR22 ((uint16_t)0x006C)
-#define BKP_DR23 ((uint16_t)0x0070)
-#define BKP_DR24 ((uint16_t)0x0074)
-#define BKP_DR25 ((uint16_t)0x0078)
-#define BKP_DR26 ((uint16_t)0x007C)
-#define BKP_DR27 ((uint16_t)0x0080)
-#define BKP_DR28 ((uint16_t)0x0084)
-#define BKP_DR29 ((uint16_t)0x0088)
-#define BKP_DR30 ((uint16_t)0x008C)
-#define BKP_DR31 ((uint16_t)0x0090)
-#define BKP_DR32 ((uint16_t)0x0094)
-#define BKP_DR33 ((uint16_t)0x0098)
-#define BKP_DR34 ((uint16_t)0x009C)
-#define BKP_DR35 ((uint16_t)0x00A0)
-#define BKP_DR36 ((uint16_t)0x00A4)
-#define BKP_DR37 ((uint16_t)0x00A8)
-#define BKP_DR38 ((uint16_t)0x00AC)
-#define BKP_DR39 ((uint16_t)0x00B0)
-#define BKP_DR40 ((uint16_t)0x00B4)
-#define BKP_DR41 ((uint16_t)0x00B8)
-#define BKP_DR42 ((uint16_t)0x00BC)
-
-#define IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || \
- ((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || \
- ((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || \
- ((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \
- ((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \
- ((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \
- ((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \
- ((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \
- ((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \
- ((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \
- ((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \
- ((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \
- ((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \
- ((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42))
-
-#define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F)
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup BKP_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup BKP_Exported_Functions
- * @{
- */
-
-void BKP_DeInit(void);
-void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel);
-void BKP_TamperPinCmd(FunctionalState NewState);
-void BKP_ITConfig(FunctionalState NewState);
-void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource);
-void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue);
-void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data);
-uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR);
-FlagStatus BKP_GetFlagStatus(void);
-void BKP_ClearFlag(void);
-ITStatus BKP_GetITStatus(void);
-void BKP_ClearITPendingBit(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_BKP_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_can.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_can.h deleted file mode 100644 index 712e34c00..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_can.h +++ /dev/null @@ -1,535 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_can.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the CAN firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_CAN_H
-#define __STM32F10x_CAN_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup CAN
- * @{
- */
-
-/** @defgroup CAN_Exported_Types
- * @{
- */
-
-#define IS_CAN_ALL_PERIPH(PERIPH) (((PERIPH) == CAN1) || \
- ((PERIPH) == CAN2))
-
-/**
- * @brief CAN init structure definition
- */
-
-typedef struct
-{
- uint16_t CAN_Prescaler; /*!< Specifies the length of a time quantum. It ranges from 1 to 1024. */
-
- uint8_t CAN_Mode; /*!< Specifies the CAN operating mode.
- This parameter can be a value of @ref CAN_operating_mode */
-
- uint8_t CAN_SJW; /*!< Specifies the maximum number of time quanta the CAN hardware
- is allowed to lengthen or shorten a bit to perform resynchronization.
- This parameter can be a value of @ref CAN_synchronisation_jump_width */
-
- uint8_t CAN_BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
- This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
-
- uint8_t CAN_BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
- This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
-
- FunctionalState CAN_TTCM; /*!< Enable or disable the time triggered communication mode.
- This parameter can be set either to ENABLE or DISABLE. */
-
- FunctionalState CAN_ABOM; /*!< Enable or disable the automatic bus-off management.
- This parameter can be set either to ENABLE or DISABLE. */
-
- FunctionalState CAN_AWUM; /*!< Enable or disable the automatic wake-up mode.
- This parameter can be set either to ENABLE or DISABLE. */
-
- FunctionalState CAN_NART; /*!< Enable or disable the no-automatic retransmission mode.
- This parameter can be set either to ENABLE or DISABLE. */
-
- FunctionalState CAN_RFLM; /*!< Enable or disable the Receive FIFO Locked mode.
- This parameter can be set either to ENABLE or DISABLE. */
-
- FunctionalState CAN_TXFP; /*!< Enable or disable the transmit FIFO priority.
- This parameter can be set either to ENABLE or DISABLE. */
-} CAN_InitTypeDef;
-
-/**
- * @brief CAN filter init structure definition
- */
-
-typedef struct
-{
- uint16_t CAN_FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
- configuration, first one for a 16-bit configuration).
- This parameter can be a value between 0x0000 and 0xFFFF */
-
- uint16_t CAN_FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
- configuration, second one for a 16-bit configuration).
- This parameter can be a value between 0x0000 and 0xFFFF */
-
- uint16_t CAN_FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
- according to the mode (MSBs for a 32-bit configuration,
- first one for a 16-bit configuration).
- This parameter can be a value between 0x0000 and 0xFFFF */
-
- uint16_t CAN_FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
- according to the mode (LSBs for a 32-bit configuration,
- second one for a 16-bit configuration).
- This parameter can be a value between 0x0000 and 0xFFFF */
-
- uint16_t CAN_FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
- This parameter can be a value of @ref CAN_filter_FIFO */
-
- uint8_t CAN_FilterNumber; /*!< Specifies the filter which will be initialized. It ranges from 0 to 13. */
-
- uint8_t CAN_FilterMode; /*!< Specifies the filter mode to be initialized.
- This parameter can be a value of @ref CAN_filter_mode */
-
- uint8_t CAN_FilterScale; /*!< Specifies the filter scale.
- This parameter can be a value of @ref CAN_filter_scale */
-
- FunctionalState CAN_FilterActivation; /*!< Enable or disable the filter.
- This parameter can be set either to ENABLE or DISABLE. */
-} CAN_FilterInitTypeDef;
-
-/**
- * @brief CAN Tx message structure definition
- */
-
-typedef struct
-{
- uint32_t StdId; /*!< Specifies the standard identifier.
- This parameter can be a value between 0 to 0x7FF. */
-
- uint32_t ExtId; /*!< Specifies the extended identifier.
- This parameter can be a value between 0 to 0x1FFFFFFF. */
-
- uint8_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
- This parameter can be a value of @ref CAN_identifier_type */
-
- uint8_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
- This parameter can be a value of @ref CAN_remote_transmission_request */
-
- uint8_t DLC; /*!< Specifies the length of the frame that will be transmitted.
- This parameter can be a value between 0 to 8 */
-
- uint8_t Data[8]; /*!< Contains the data to be transmitted. It ranges from 0 to 0xFF. */
-} CanTxMsg;
-
-/**
- * @brief CAN Rx message structure definition
- */
-
-typedef struct
-{
- uint32_t StdId; /*!< Specifies the standard identifier.
- This parameter can be a value between 0 to 0x7FF. */
-
- uint32_t ExtId; /*!< Specifies the extended identifier.
- This parameter can be a value between 0 to 0x1FFFFFFF. */
-
- uint8_t IDE; /*!< Specifies the type of identifier for the message that will be received.
- This parameter can be a value of @ref CAN_identifier_type */
-
- uint8_t RTR; /*!< Specifies the type of frame for the received message.
- This parameter can be a value of @ref CAN_remote_transmission_request */
-
- uint8_t DLC; /*!< Specifies the length of the frame that will be received.
- This parameter can be a value between 0 to 8 */
-
- uint8_t Data[8]; /*!< Contains the data to be received. It ranges from 0 to 0xFF. */
-
- uint8_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
- This parameter can be a value between 0 to 0xFF */
-} CanRxMsg;
-
-/**
- * @}
- */
-
-/** @defgroup CAN_Exported_Constants
- * @{
- */
-
-/** @defgroup CAN_sleep_constants
- * @{
- */
-
-#define CANINITFAILED ((uint8_t)0x00) /*!< CAN initialization failed */
-#define CANINITOK ((uint8_t)0x01) /*!< CAN initialization failed */
-
-/**
- * @}
- */
-
-/** @defgroup CAN_operating_mode
- * @{
- */
-
-#define CAN_Mode_Normal ((uint8_t)0x00) /*!< normal mode */
-#define CAN_Mode_LoopBack ((uint8_t)0x01) /*!< loopback mode */
-#define CAN_Mode_Silent ((uint8_t)0x02) /*!< silent mode */
-#define CAN_Mode_Silent_LoopBack ((uint8_t)0x03) /*!< loopback combined with silent mode */
-
-#define IS_CAN_MODE(MODE) (((MODE) == CAN_Mode_Normal) || ((MODE) == CAN_Mode_LoopBack)|| \
- ((MODE) == CAN_Mode_Silent) || ((MODE) == CAN_Mode_Silent_LoopBack))
-/**
- * @}
- */
-
-/** @defgroup CAN_synchronisation_jump_width
- * @{
- */
-
-#define CAN_SJW_1tq ((uint8_t)0x00) /*!< 1 time quantum */
-#define CAN_SJW_2tq ((uint8_t)0x01) /*!< 2 time quantum */
-#define CAN_SJW_3tq ((uint8_t)0x02) /*!< 3 time quantum */
-#define CAN_SJW_4tq ((uint8_t)0x03) /*!< 4 time quantum */
-
-#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1tq) || ((SJW) == CAN_SJW_2tq)|| \
- ((SJW) == CAN_SJW_3tq) || ((SJW) == CAN_SJW_4tq))
-/**
- * @}
- */
-
-/** @defgroup CAN_time_quantum_in_bit_segment_1
- * @{
- */
-
-#define CAN_BS1_1tq ((uint8_t)0x00) /*!< 1 time quantum */
-#define CAN_BS1_2tq ((uint8_t)0x01) /*!< 2 time quantum */
-#define CAN_BS1_3tq ((uint8_t)0x02) /*!< 3 time quantum */
-#define CAN_BS1_4tq ((uint8_t)0x03) /*!< 4 time quantum */
-#define CAN_BS1_5tq ((uint8_t)0x04) /*!< 5 time quantum */
-#define CAN_BS1_6tq ((uint8_t)0x05) /*!< 6 time quantum */
-#define CAN_BS1_7tq ((uint8_t)0x06) /*!< 7 time quantum */
-#define CAN_BS1_8tq ((uint8_t)0x07) /*!< 8 time quantum */
-#define CAN_BS1_9tq ((uint8_t)0x08) /*!< 9 time quantum */
-#define CAN_BS1_10tq ((uint8_t)0x09) /*!< 10 time quantum */
-#define CAN_BS1_11tq ((uint8_t)0x0A) /*!< 11 time quantum */
-#define CAN_BS1_12tq ((uint8_t)0x0B) /*!< 12 time quantum */
-#define CAN_BS1_13tq ((uint8_t)0x0C) /*!< 13 time quantum */
-#define CAN_BS1_14tq ((uint8_t)0x0D) /*!< 14 time quantum */
-#define CAN_BS1_15tq ((uint8_t)0x0E) /*!< 15 time quantum */
-#define CAN_BS1_16tq ((uint8_t)0x0F) /*!< 16 time quantum */
-
-#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16tq)
-/**
- * @}
- */
-
-/** @defgroup CAN_time_quantum_in_bit_segment_2
- * @{
- */
-
-#define CAN_BS2_1tq ((uint8_t)0x00) /*!< 1 time quantum */
-#define CAN_BS2_2tq ((uint8_t)0x01) /*!< 2 time quantum */
-#define CAN_BS2_3tq ((uint8_t)0x02) /*!< 3 time quantum */
-#define CAN_BS2_4tq ((uint8_t)0x03) /*!< 4 time quantum */
-#define CAN_BS2_5tq ((uint8_t)0x04) /*!< 5 time quantum */
-#define CAN_BS2_6tq ((uint8_t)0x05) /*!< 6 time quantum */
-#define CAN_BS2_7tq ((uint8_t)0x06) /*!< 7 time quantum */
-#define CAN_BS2_8tq ((uint8_t)0x07) /*!< 8 time quantum */
-
-#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8tq)
-
-/**
- * @}
- */
-
-/** @defgroup CAN_clock_prescaler
- * @{
- */
-
-#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
-
-/**
- * @}
- */
-
-/** @defgroup CAN_filter_number
- * @{
- */
-#ifndef STM32F10X_CL
- #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 13)
-#else
- #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
-#endif /* STM32F10X_CL */
-/**
- * @}
- */
-
-/** @defgroup CAN_filter_mode
- * @{
- */
-
-#define CAN_FilterMode_IdMask ((uint8_t)0x00) /*!< id/mask mode */
-#define CAN_FilterMode_IdList ((uint8_t)0x01) /*!< identifier list mode */
-
-#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FilterMode_IdMask) || \
- ((MODE) == CAN_FilterMode_IdList))
-/**
- * @}
- */
-
-/** @defgroup CAN_filter_scale
- * @{
- */
-
-#define CAN_FilterScale_16bit ((uint8_t)0x00) /*!< Two 16-bit filters */
-#define CAN_FilterScale_32bit ((uint8_t)0x01) /*!< One 32-bit filter */
-
-#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FilterScale_16bit) || \
- ((SCALE) == CAN_FilterScale_32bit))
-
-/**
- * @}
- */
-
-/** @defgroup CAN_filter_FIFO
- * @{
- */
-
-#define CAN_FilterFIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
-#define CAN_FilterFIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
-#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FilterFIFO0) || \
- ((FIFO) == CAN_FilterFIFO1))
-
-/**
- * @}
- */
-
-/** @defgroup Start_bank_filter_for_slave_CAN
- * @{
- */
-#define IS_CAN_BANKNUMBER(BANKNUMBER) (((BANKNUMBER) >= 1) && ((BANKNUMBER) <= 27))
-/**
- * @}
- */
-
-/** @defgroup CAN_Tx
- * @{
- */
-
-#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
-#define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
-#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
-#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
-
-/**
- * @}
- */
-
-/** @defgroup CAN_identifier_type
- * @{
- */
-
-#define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */
-#define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */
-#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || ((IDTYPE) == CAN_ID_EXT))
-
-/**
- * @}
- */
-
-/** @defgroup CAN_remote_transmission_request
- * @{
- */
-
-#define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */
-#define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */
-#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
-
-/**
- * @}
- */
-
-/** @defgroup CAN_transmit_constants
- * @{
- */
-
-#define CANTXFAILED ((uint8_t)0x00) /*!< CAN transmission failed */
-#define CANTXOK ((uint8_t)0x01) /*!< CAN transmission succeeded */
-#define CANTXPENDING ((uint8_t)0x02) /*!< CAN transmission pending */
-#define CAN_NO_MB ((uint8_t)0x04) /*!< CAN cell did not provide an empty mailbox */
-
-/**
- * @}
- */
-
-/** @defgroup CAN_receive_FIFO_number_constants
- * @{
- */
-
-#define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO0 used to receive */
-#define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO1 used to receive */
-
-#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
-
-/**
- * @}
- */
-
-/** @defgroup CAN_sleep_constants
- * @{
- */
-
-#define CANSLEEPFAILED ((uint8_t)0x00) /*!< CAN did not enter the sleep mode */
-#define CANSLEEPOK ((uint8_t)0x01) /*!< CAN entered the sleep mode */
-
-/**
- * @}
- */
-
-/** @defgroup CAN_wake_up_constants
- * @{
- */
-
-#define CANWAKEUPFAILED ((uint8_t)0x00) /*!< CAN did not leave the sleep mode */
-#define CANWAKEUPOK ((uint8_t)0x01) /*!< CAN leaved the sleep mode */
-
-/**
- * @}
- */
-
-/** @defgroup CAN_flags
- * @{
- */
-
-#define CAN_FLAG_EWG ((uint32_t)0x00000001) /*!< Error Warning Flag */
-#define CAN_FLAG_EPV ((uint32_t)0x00000002) /*!< Error Passive Flag */
-#define CAN_FLAG_BOF ((uint32_t)0x00000004) /*!< Bus-Off Flag */
-
-#define IS_CAN_FLAG(FLAG) (((FLAG) == CAN_FLAG_EWG) || ((FLAG) == CAN_FLAG_EPV) ||\
- ((FLAG) == CAN_FLAG_BOF))
-
-/**
- * @}
- */
-
-/** @defgroup CAN_interrupts
- * @{
- */
-
-#define CAN_IT_RQCP0 ((uint32_t)0x00000005) /*!< Request completed mailbox 0 */
-#define CAN_IT_RQCP1 ((uint32_t)0x00000006) /*!< Request completed mailbox 1 */
-#define CAN_IT_RQCP2 ((uint32_t)0x00000007) /*!< Request completed mailbox 2 */
-#define CAN_IT_TME ((uint32_t)0x00000001) /*!< Transmit mailbox empty */
-#define CAN_IT_FMP0 ((uint32_t)0x00000002) /*!< FIFO 0 message pending */
-#define CAN_IT_FF0 ((uint32_t)0x00000004) /*!< FIFO 0 full */
-#define CAN_IT_FOV0 ((uint32_t)0x00000008) /*!< FIFO 0 overrun */
-#define CAN_IT_FMP1 ((uint32_t)0x00000010) /*!< FIFO 1 message pending */
-#define CAN_IT_FF1 ((uint32_t)0x00000020) /*!< FIFO 1 full */
-#define CAN_IT_FOV1 ((uint32_t)0x00000040) /*!< FIFO 1 overrun */
-#define CAN_IT_EWG ((uint32_t)0x00000100) /*!< Error warning */
-#define CAN_IT_EPV ((uint32_t)0x00000200) /*!< Error passive */
-#define CAN_IT_BOF ((uint32_t)0x00000400) /*!< Bus-off */
-#define CAN_IT_LEC ((uint32_t)0x00000800) /*!< Last error code */
-#define CAN_IT_ERR ((uint32_t)0x00008000) /*!< Error */
-#define CAN_IT_WKU ((uint32_t)0x00010000) /*!< Wake-up */
-#define CAN_IT_SLK ((uint32_t)0x00020000) /*!< Sleep */
-
-#define IS_CAN_ITConfig(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\
- ((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\
- ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\
- ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\
- ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
- ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\
- ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
-
-#define IS_CAN_ITStatus(IT) (((IT) == CAN_IT_RQCP0) || ((IT) == CAN_IT_RQCP1) ||\
- ((IT) == CAN_IT_RQCP2) || ((IT) == CAN_IT_FF0) ||\
- ((IT) == CAN_IT_FOV0) || ((IT) == CAN_IT_FF1) ||\
- ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\
- ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
- ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup CAN_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup CAN_Exported_Functions
- * @{
- */
-
-void CAN_DeInit(CAN_TypeDef* CANx);
-uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct);
-void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct);
-void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct);
-void CAN_SlaveStartBank(uint8_t CAN_BankNumber);
-void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState);
-uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage);
-uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox);
-void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox);
-void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber);
-uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber);
-void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage);
-void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState);
-uint8_t CAN_Sleep(CAN_TypeDef* CANx);
-uint8_t CAN_WakeUp(CAN_TypeDef* CANx);
-FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG);
-void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG);
-ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT);
-void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_CAN_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_conf.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_conf.h deleted file mode 100644 index e7805cfd9..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_conf.h +++ /dev/null @@ -1,76 +0,0 @@ -/**
- ******************************************************************************
- * @file Project/Template/stm32f10x_conf.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief Library configuration file.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_CONF_H
-#define __STM32F10x_CONF_H
-
-/* Includes ------------------------------------------------------------------*/
-/* Uncomment the line below to enable peripheral header file inclusion */
-/* #include "stm32f10x_adc.h" */
-/* #include "stm32f10x_bkp.h" */
-/* #include "stm32f10x_can.h" */
-/* #include "stm32f10x_crc.h" */
-/* #include "stm32f10x_dac.h" */
-/* #include "stm32f10x_dbgmcu.h" */
-/* #include "stm32f10x_dma.h" */
-#include "stm32f10x_exti.h"
-/* #include "stm32f10x_flash.h" */
-#include "stm32f10x_fsmc.h"
-#include "stm32f10x_gpio.h"
-/* #include "stm32f10x_i2c.h" */
-/* #include "stm32f10x_iwdg.h" */
-/* #include "stm32f10x_pwr.h" */
-#include "stm32f10x_rcc.h"
-/* #include "stm32f10x_rtc.h" */
-/* #include "stm32f10x_sdio.h" */
-#include "stm32f10x_spi.h"
-/* #include "stm32f10x_tim.h" */
-#include "stm32f10x_usart.h"
-/* #include "stm32f10x_wwdg.h" */
-#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/* Uncomment the line below to expanse the "assert_param" macro in the
- Standard Peripheral Library drivers code */
-/* #define USE_FULL_ASSERT 1 */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef USE_FULL_ASSERT
-
-/**
- * @brief The assert_param macro is used for function's parameters check.
- * @param expr: If expr is false, it calls assert_failed function
- * which reports the name of the source file and the source
- * line number of the call that failed.
- * If expr is true, it returns no value.
- * @retval None
- */
- #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
- void assert_failed(uint8_t* file, uint32_t line);
-#else
- #define assert_param(expr) ((void)0)
-#endif /* USE_FULL_ASSERT */
-
-#endif /* __STM32F10x_CONF_H */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_crc.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_crc.h deleted file mode 100644 index 848c15ff2..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_crc.h +++ /dev/null @@ -1,93 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_crc.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the CRC firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_CRC_H
-#define __STM32F10x_CRC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup CRC
- * @{
- */
-
-/** @defgroup CRC_Exported_Types
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup CRC_Exported_Constants
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup CRC_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup CRC_Exported_Functions
- * @{
- */
-
-void CRC_ResetDR(void);
-uint32_t CRC_CalcCRC(uint32_t Data);
-uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
-uint32_t CRC_GetCRC(void);
-void CRC_SetIDRegister(uint8_t IDValue);
-uint8_t CRC_GetIDRegister(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_CRC_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_dac.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_dac.h deleted file mode 100644 index 6c4bc8003..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_dac.h +++ /dev/null @@ -1,282 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_dac.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the DAC firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_DAC_H
-#define __STM32F10x_DAC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup DAC
- * @{
- */
-
-/** @defgroup DAC_Exported_Types
- * @{
- */
-
-/**
- * @brief DAC Init structure definition
- */
-
-typedef struct
-{
- uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
- This parameter can be a value of @ref DAC_trigger_selection */
-
- uint32_t DAC_WaveGeneration; /*!< Specifies whether DAC channel noise waves or triangle waves
- are generated, or whether no wave is generated.
- This parameter can be a value of @ref DAC_wave_generation */
-
- uint32_t DAC_LFSRUnmask_TriangleAmplitude; /*!< Specifies the LFSR mask for noise wave generation or
- the maximum amplitude triangle generation for the DAC channel.
- This parameter can be a value of @ref DAC_lfsrunmask_triangleamplitude */
-
- uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
- This parameter can be a value of @ref DAC_output_buffer */
-}DAC_InitTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup DAC_Exported_Constants
- * @{
- */
-
-/** @defgroup DAC_trigger_selection
- * @{
- */
-
-#define DAC_Trigger_None ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
- has been loaded, and not by external trigger */
-#define DAC_Trigger_T6_TRGO ((uint32_t)0x00000004) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
-#define DAC_Trigger_T8_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel
- only in High-density devices*/
-#define DAC_Trigger_T3_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel
- only in Connectivity line devices */
-#define DAC_Trigger_T7_TRGO ((uint32_t)0x00000014) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
-#define DAC_Trigger_T5_TRGO ((uint32_t)0x0000001C) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
-#define DAC_Trigger_T2_TRGO ((uint32_t)0x00000024) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
-#define DAC_Trigger_T4_TRGO ((uint32_t)0x0000002C) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
-#define DAC_Trigger_Ext_IT9 ((uint32_t)0x00000034) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
-#define DAC_Trigger_Software ((uint32_t)0x0000003C) /*!< Conversion started by software trigger for DAC channel */
-
-#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_Trigger_None) || \
- ((TRIGGER) == DAC_Trigger_T6_TRGO) || \
- ((TRIGGER) == DAC_Trigger_T8_TRGO) || \
- ((TRIGGER) == DAC_Trigger_T7_TRGO) || \
- ((TRIGGER) == DAC_Trigger_T5_TRGO) || \
- ((TRIGGER) == DAC_Trigger_T2_TRGO) || \
- ((TRIGGER) == DAC_Trigger_T4_TRGO) || \
- ((TRIGGER) == DAC_Trigger_Ext_IT9) || \
- ((TRIGGER) == DAC_Trigger_Software))
-
-/**
- * @}
- */
-
-/** @defgroup DAC_wave_generation
- * @{
- */
-
-#define DAC_WaveGeneration_None ((uint32_t)0x00000000)
-#define DAC_WaveGeneration_Noise ((uint32_t)0x00000040)
-#define DAC_WaveGeneration_Triangle ((uint32_t)0x00000080)
-#define IS_DAC_GENERATE_WAVE(WAVE) (((WAVE) == DAC_WaveGeneration_None) || \
- ((WAVE) == DAC_WaveGeneration_Noise) || \
- ((WAVE) == DAC_WaveGeneration_Triangle))
-/**
- * @}
- */
-
-/** @defgroup DAC_lfsrunmask_triangleamplitude
- * @{
- */
-
-#define DAC_LFSRUnmask_Bit0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */
-#define DAC_LFSRUnmask_Bits1_0 ((uint32_t)0x00000100) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */
-#define DAC_LFSRUnmask_Bits2_0 ((uint32_t)0x00000200) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */
-#define DAC_LFSRUnmask_Bits3_0 ((uint32_t)0x00000300) /*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */
-#define DAC_LFSRUnmask_Bits4_0 ((uint32_t)0x00000400) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */
-#define DAC_LFSRUnmask_Bits5_0 ((uint32_t)0x00000500) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */
-#define DAC_LFSRUnmask_Bits6_0 ((uint32_t)0x00000600) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */
-#define DAC_LFSRUnmask_Bits7_0 ((uint32_t)0x00000700) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */
-#define DAC_LFSRUnmask_Bits8_0 ((uint32_t)0x00000800) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */
-#define DAC_LFSRUnmask_Bits9_0 ((uint32_t)0x00000900) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */
-#define DAC_LFSRUnmask_Bits10_0 ((uint32_t)0x00000A00) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */
-#define DAC_LFSRUnmask_Bits11_0 ((uint32_t)0x00000B00) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */
-#define DAC_TriangleAmplitude_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */
-#define DAC_TriangleAmplitude_3 ((uint32_t)0x00000100) /*!< Select max triangle amplitude of 3 */
-#define DAC_TriangleAmplitude_7 ((uint32_t)0x00000200) /*!< Select max triangle amplitude of 7 */
-#define DAC_TriangleAmplitude_15 ((uint32_t)0x00000300) /*!< Select max triangle amplitude of 15 */
-#define DAC_TriangleAmplitude_31 ((uint32_t)0x00000400) /*!< Select max triangle amplitude of 31 */
-#define DAC_TriangleAmplitude_63 ((uint32_t)0x00000500) /*!< Select max triangle amplitude of 63 */
-#define DAC_TriangleAmplitude_127 ((uint32_t)0x00000600) /*!< Select max triangle amplitude of 127 */
-#define DAC_TriangleAmplitude_255 ((uint32_t)0x00000700) /*!< Select max triangle amplitude of 255 */
-#define DAC_TriangleAmplitude_511 ((uint32_t)0x00000800) /*!< Select max triangle amplitude of 511 */
-#define DAC_TriangleAmplitude_1023 ((uint32_t)0x00000900) /*!< Select max triangle amplitude of 1023 */
-#define DAC_TriangleAmplitude_2047 ((uint32_t)0x00000A00) /*!< Select max triangle amplitude of 2047 */
-#define DAC_TriangleAmplitude_4095 ((uint32_t)0x00000B00) /*!< Select max triangle amplitude of 4095 */
-
-#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || \
- ((VALUE) == DAC_LFSRUnmask_Bits1_0) || \
- ((VALUE) == DAC_LFSRUnmask_Bits2_0) || \
- ((VALUE) == DAC_LFSRUnmask_Bits3_0) || \
- ((VALUE) == DAC_LFSRUnmask_Bits4_0) || \
- ((VALUE) == DAC_LFSRUnmask_Bits5_0) || \
- ((VALUE) == DAC_LFSRUnmask_Bits6_0) || \
- ((VALUE) == DAC_LFSRUnmask_Bits7_0) || \
- ((VALUE) == DAC_LFSRUnmask_Bits8_0) || \
- ((VALUE) == DAC_LFSRUnmask_Bits9_0) || \
- ((VALUE) == DAC_LFSRUnmask_Bits10_0) || \
- ((VALUE) == DAC_LFSRUnmask_Bits11_0) || \
- ((VALUE) == DAC_TriangleAmplitude_1) || \
- ((VALUE) == DAC_TriangleAmplitude_3) || \
- ((VALUE) == DAC_TriangleAmplitude_7) || \
- ((VALUE) == DAC_TriangleAmplitude_15) || \
- ((VALUE) == DAC_TriangleAmplitude_31) || \
- ((VALUE) == DAC_TriangleAmplitude_63) || \
- ((VALUE) == DAC_TriangleAmplitude_127) || \
- ((VALUE) == DAC_TriangleAmplitude_255) || \
- ((VALUE) == DAC_TriangleAmplitude_511) || \
- ((VALUE) == DAC_TriangleAmplitude_1023) || \
- ((VALUE) == DAC_TriangleAmplitude_2047) || \
- ((VALUE) == DAC_TriangleAmplitude_4095))
-/**
- * @}
- */
-
-/** @defgroup DAC_output_buffer
- * @{
- */
-
-#define DAC_OutputBuffer_Enable ((uint32_t)0x00000000)
-#define DAC_OutputBuffer_Disable ((uint32_t)0x00000002)
-#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OutputBuffer_Enable) || \
- ((STATE) == DAC_OutputBuffer_Disable))
-/**
- * @}
- */
-
-/** @defgroup DAC_Channel_selection
- * @{
- */
-
-#define DAC_Channel_1 ((uint32_t)0x00000000)
-#define DAC_Channel_2 ((uint32_t)0x00000010)
-#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_Channel_1) || \
- ((CHANNEL) == DAC_Channel_2))
-/**
- * @}
- */
-
-/** @defgroup DAC_data_alignement
- * @{
- */
-
-#define DAC_Align_12b_R ((uint32_t)0x00000000)
-#define DAC_Align_12b_L ((uint32_t)0x00000004)
-#define DAC_Align_8b_R ((uint32_t)0x00000008)
-#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_Align_12b_R) || \
- ((ALIGN) == DAC_Align_12b_L) || \
- ((ALIGN) == DAC_Align_8b_R))
-/**
- * @}
- */
-
-/** @defgroup DAC_wave_generation
- * @{
- */
-
-#define DAC_Wave_Noise ((uint32_t)0x00000040)
-#define DAC_Wave_Triangle ((uint32_t)0x00000080)
-#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_Wave_Noise) || \
- ((WAVE) == DAC_Wave_Triangle))
-/**
- * @}
- */
-
-/** @defgroup DAC_data
- * @{
- */
-
-#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup DAC_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup DAC_Exported_Functions
- * @{
- */
-
-void DAC_DeInit(void);
-void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct);
-void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct);
-void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState);
-void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState);
-void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState);
-void DAC_DualSoftwareTriggerCmd(FunctionalState NewState);
-void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState);
-void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data);
-void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data);
-void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1);
-uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32F10x_DAC_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_dbgmcu.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_dbgmcu.h deleted file mode 100644 index 0889683a5..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_dbgmcu.h +++ /dev/null @@ -1,109 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_dbgmcu.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the DBGMCU
- * firmware library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_DBGMCU_H
-#define __STM32F10x_DBGMCU_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup DBGMCU
- * @{
- */
-
-/** @defgroup DBGMCU_Exported_Types
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup DBGMCU_Exported_Constants
- * @{
- */
-
-#define DBGMCU_SLEEP ((uint32_t)0x00000001)
-#define DBGMCU_STOP ((uint32_t)0x00000002)
-#define DBGMCU_STANDBY ((uint32_t)0x00000004)
-#define DBGMCU_IWDG_STOP ((uint32_t)0x00000100)
-#define DBGMCU_WWDG_STOP ((uint32_t)0x00000200)
-#define DBGMCU_TIM1_STOP ((uint32_t)0x00000400)
-#define DBGMCU_TIM2_STOP ((uint32_t)0x00000800)
-#define DBGMCU_TIM3_STOP ((uint32_t)0x00001000)
-#define DBGMCU_TIM4_STOP ((uint32_t)0x00002000)
-#define DBGMCU_CAN1_STOP ((uint32_t)0x00004000)
-#define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000)
-#define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000)
-#define DBGMCU_TIM8_STOP ((uint32_t)0x00020000)
-#define DBGMCU_TIM5_STOP ((uint32_t)0x00040000)
-#define DBGMCU_TIM6_STOP ((uint32_t)0x00080000)
-#define DBGMCU_TIM7_STOP ((uint32_t)0x00100000)
-#define DBGMCU_CAN2_STOP ((uint32_t)0x00200000)
-
-#define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFC000F8) == 0x00) && ((PERIPH) != 0x00))
-/**
- * @}
- */
-
-/** @defgroup DBGMCU_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup DBGMCU_Exported_Functions
- * @{
- */
-
-uint32_t DBGMCU_GetREVID(void);
-uint32_t DBGMCU_GetDEVID(void);
-void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_DBGMCU_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_dma.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_dma.h deleted file mode 100644 index 9a1fe4b78..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_dma.h +++ /dev/null @@ -1,437 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_dma.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the DMA firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_DMA_H
-#define __STM32F10x_DMA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup DMA
- * @{
- */
-
-/** @defgroup DMA_Exported_Types
- * @{
- */
-
-/**
- * @brief DMA Init structure definition
- */
-
-typedef struct
-{
- uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */
-
- uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */
-
- uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination.
- This parameter can be a value of @ref DMA_data_transfer_direction */
-
- uint32_t DMA_BufferSize; /*!< Specifies the buffer size, in data unit, of the specified Channel.
- The data unit is equal to the configuration set in DMA_PeripheralDataSize
- or DMA_MemoryDataSize members depending in the transfer direction. */
-
- uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not.
- This parameter can be a value of @ref DMA_peripheral_incremented_mode */
-
- uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not.
- This parameter can be a value of @ref DMA_memory_incremented_mode */
-
- uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data width.
- This parameter can be a value of @ref DMA_peripheral_data_size */
-
- uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data width.
- This parameter can be a value of @ref DMA_memory_data_size */
-
- uint32_t DMA_Mode; /*!< Specifies the operation mode of the DMAy Channelx.
- This parameter can be a value of @ref DMA_circular_normal_mode.
- @note: The circular buffer mode cannot be used if the memory-to-memory
- data transfer is configured on the selected Channel */
-
- uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx.
- This parameter can be a value of @ref DMA_priority_level */
-
- uint32_t DMA_M2M; /*!< Specifies if the DMAy Channelx will be used in memory-to-memory transfer.
- This parameter can be a value of @ref DMA_memory_to_memory */
-}DMA_InitTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup DMA_Exported_Constants
- * @{
- */
-
-#define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \
- ((PERIPH) == DMA1_Channel2) || \
- ((PERIPH) == DMA1_Channel3) || \
- ((PERIPH) == DMA1_Channel4) || \
- ((PERIPH) == DMA1_Channel5) || \
- ((PERIPH) == DMA1_Channel6) || \
- ((PERIPH) == DMA1_Channel7) || \
- ((PERIPH) == DMA2_Channel1) || \
- ((PERIPH) == DMA2_Channel2) || \
- ((PERIPH) == DMA2_Channel3) || \
- ((PERIPH) == DMA2_Channel4) || \
- ((PERIPH) == DMA2_Channel5))
-
-/** @defgroup DMA_data_transfer_direction
- * @{
- */
-
-#define DMA_DIR_PeripheralDST ((uint32_t)0x00000010)
-#define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000)
-#define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \
- ((DIR) == DMA_DIR_PeripheralSRC))
-/**
- * @}
- */
-
-/** @defgroup DMA_peripheral_incremented_mode
- * @{
- */
-
-#define DMA_PeripheralInc_Enable ((uint32_t)0x00000040)
-#define DMA_PeripheralInc_Disable ((uint32_t)0x00000000)
-#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \
- ((STATE) == DMA_PeripheralInc_Disable))
-/**
- * @}
- */
-
-/** @defgroup DMA_memory_incremented_mode
- * @{
- */
-
-#define DMA_MemoryInc_Enable ((uint32_t)0x00000080)
-#define DMA_MemoryInc_Disable ((uint32_t)0x00000000)
-#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \
- ((STATE) == DMA_MemoryInc_Disable))
-/**
- * @}
- */
-
-/** @defgroup DMA_peripheral_data_size
- * @{
- */
-
-#define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000)
-#define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100)
-#define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200)
-#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \
- ((SIZE) == DMA_PeripheralDataSize_HalfWord) || \
- ((SIZE) == DMA_PeripheralDataSize_Word))
-/**
- * @}
- */
-
-/** @defgroup DMA_memory_data_size
- * @{
- */
-
-#define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000)
-#define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400)
-#define DMA_MemoryDataSize_Word ((uint32_t)0x00000800)
-#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \
- ((SIZE) == DMA_MemoryDataSize_HalfWord) || \
- ((SIZE) == DMA_MemoryDataSize_Word))
-/**
- * @}
- */
-
-/** @defgroup DMA_circular_normal_mode
- * @{
- */
-
-#define DMA_Mode_Circular ((uint32_t)0x00000020)
-#define DMA_Mode_Normal ((uint32_t)0x00000000)
-#define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal))
-/**
- * @}
- */
-
-/** @defgroup DMA_priority_level
- * @{
- */
-
-#define DMA_Priority_VeryHigh ((uint32_t)0x00003000)
-#define DMA_Priority_High ((uint32_t)0x00002000)
-#define DMA_Priority_Medium ((uint32_t)0x00001000)
-#define DMA_Priority_Low ((uint32_t)0x00000000)
-#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \
- ((PRIORITY) == DMA_Priority_High) || \
- ((PRIORITY) == DMA_Priority_Medium) || \
- ((PRIORITY) == DMA_Priority_Low))
-/**
- * @}
- */
-
-/** @defgroup DMA_memory_to_memory
- * @{
- */
-
-#define DMA_M2M_Enable ((uint32_t)0x00004000)
-#define DMA_M2M_Disable ((uint32_t)0x00000000)
-#define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable))
-
-/**
- * @}
- */
-
-/** @defgroup DMA_interrupts_definition
- * @{
- */
-
-#define DMA_IT_TC ((uint32_t)0x00000002)
-#define DMA_IT_HT ((uint32_t)0x00000004)
-#define DMA_IT_TE ((uint32_t)0x00000008)
-#define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00))
-
-#define DMA1_IT_GL1 ((uint32_t)0x00000001)
-#define DMA1_IT_TC1 ((uint32_t)0x00000002)
-#define DMA1_IT_HT1 ((uint32_t)0x00000004)
-#define DMA1_IT_TE1 ((uint32_t)0x00000008)
-#define DMA1_IT_GL2 ((uint32_t)0x00000010)
-#define DMA1_IT_TC2 ((uint32_t)0x00000020)
-#define DMA1_IT_HT2 ((uint32_t)0x00000040)
-#define DMA1_IT_TE2 ((uint32_t)0x00000080)
-#define DMA1_IT_GL3 ((uint32_t)0x00000100)
-#define DMA1_IT_TC3 ((uint32_t)0x00000200)
-#define DMA1_IT_HT3 ((uint32_t)0x00000400)
-#define DMA1_IT_TE3 ((uint32_t)0x00000800)
-#define DMA1_IT_GL4 ((uint32_t)0x00001000)
-#define DMA1_IT_TC4 ((uint32_t)0x00002000)
-#define DMA1_IT_HT4 ((uint32_t)0x00004000)
-#define DMA1_IT_TE4 ((uint32_t)0x00008000)
-#define DMA1_IT_GL5 ((uint32_t)0x00010000)
-#define DMA1_IT_TC5 ((uint32_t)0x00020000)
-#define DMA1_IT_HT5 ((uint32_t)0x00040000)
-#define DMA1_IT_TE5 ((uint32_t)0x00080000)
-#define DMA1_IT_GL6 ((uint32_t)0x00100000)
-#define DMA1_IT_TC6 ((uint32_t)0x00200000)
-#define DMA1_IT_HT6 ((uint32_t)0x00400000)
-#define DMA1_IT_TE6 ((uint32_t)0x00800000)
-#define DMA1_IT_GL7 ((uint32_t)0x01000000)
-#define DMA1_IT_TC7 ((uint32_t)0x02000000)
-#define DMA1_IT_HT7 ((uint32_t)0x04000000)
-#define DMA1_IT_TE7 ((uint32_t)0x08000000)
-
-#define DMA2_IT_GL1 ((uint32_t)0x10000001)
-#define DMA2_IT_TC1 ((uint32_t)0x10000002)
-#define DMA2_IT_HT1 ((uint32_t)0x10000004)
-#define DMA2_IT_TE1 ((uint32_t)0x10000008)
-#define DMA2_IT_GL2 ((uint32_t)0x10000010)
-#define DMA2_IT_TC2 ((uint32_t)0x10000020)
-#define DMA2_IT_HT2 ((uint32_t)0x10000040)
-#define DMA2_IT_TE2 ((uint32_t)0x10000080)
-#define DMA2_IT_GL3 ((uint32_t)0x10000100)
-#define DMA2_IT_TC3 ((uint32_t)0x10000200)
-#define DMA2_IT_HT3 ((uint32_t)0x10000400)
-#define DMA2_IT_TE3 ((uint32_t)0x10000800)
-#define DMA2_IT_GL4 ((uint32_t)0x10001000)
-#define DMA2_IT_TC4 ((uint32_t)0x10002000)
-#define DMA2_IT_HT4 ((uint32_t)0x10004000)
-#define DMA2_IT_TE4 ((uint32_t)0x10008000)
-#define DMA2_IT_GL5 ((uint32_t)0x10010000)
-#define DMA2_IT_TC5 ((uint32_t)0x10020000)
-#define DMA2_IT_HT5 ((uint32_t)0x10040000)
-#define DMA2_IT_TE5 ((uint32_t)0x10080000)
-
-#define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00))
-
-#define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \
- ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \
- ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \
- ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \
- ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \
- ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \
- ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \
- ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \
- ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \
- ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \
- ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \
- ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \
- ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \
- ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \
- ((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \
- ((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \
- ((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \
- ((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \
- ((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \
- ((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \
- ((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \
- ((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \
- ((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \
- ((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5))
-
-/**
- * @}
- */
-
-/** @defgroup DMA_flags_definition
- * @{
- */
-#define DMA1_FLAG_GL1 ((uint32_t)0x00000001)
-#define DMA1_FLAG_TC1 ((uint32_t)0x00000002)
-#define DMA1_FLAG_HT1 ((uint32_t)0x00000004)
-#define DMA1_FLAG_TE1 ((uint32_t)0x00000008)
-#define DMA1_FLAG_GL2 ((uint32_t)0x00000010)
-#define DMA1_FLAG_TC2 ((uint32_t)0x00000020)
-#define DMA1_FLAG_HT2 ((uint32_t)0x00000040)
-#define DMA1_FLAG_TE2 ((uint32_t)0x00000080)
-#define DMA1_FLAG_GL3 ((uint32_t)0x00000100)
-#define DMA1_FLAG_TC3 ((uint32_t)0x00000200)
-#define DMA1_FLAG_HT3 ((uint32_t)0x00000400)
-#define DMA1_FLAG_TE3 ((uint32_t)0x00000800)
-#define DMA1_FLAG_GL4 ((uint32_t)0x00001000)
-#define DMA1_FLAG_TC4 ((uint32_t)0x00002000)
-#define DMA1_FLAG_HT4 ((uint32_t)0x00004000)
-#define DMA1_FLAG_TE4 ((uint32_t)0x00008000)
-#define DMA1_FLAG_GL5 ((uint32_t)0x00010000)
-#define DMA1_FLAG_TC5 ((uint32_t)0x00020000)
-#define DMA1_FLAG_HT5 ((uint32_t)0x00040000)
-#define DMA1_FLAG_TE5 ((uint32_t)0x00080000)
-#define DMA1_FLAG_GL6 ((uint32_t)0x00100000)
-#define DMA1_FLAG_TC6 ((uint32_t)0x00200000)
-#define DMA1_FLAG_HT6 ((uint32_t)0x00400000)
-#define DMA1_FLAG_TE6 ((uint32_t)0x00800000)
-#define DMA1_FLAG_GL7 ((uint32_t)0x01000000)
-#define DMA1_FLAG_TC7 ((uint32_t)0x02000000)
-#define DMA1_FLAG_HT7 ((uint32_t)0x04000000)
-#define DMA1_FLAG_TE7 ((uint32_t)0x08000000)
-
-#define DMA2_FLAG_GL1 ((uint32_t)0x10000001)
-#define DMA2_FLAG_TC1 ((uint32_t)0x10000002)
-#define DMA2_FLAG_HT1 ((uint32_t)0x10000004)
-#define DMA2_FLAG_TE1 ((uint32_t)0x10000008)
-#define DMA2_FLAG_GL2 ((uint32_t)0x10000010)
-#define DMA2_FLAG_TC2 ((uint32_t)0x10000020)
-#define DMA2_FLAG_HT2 ((uint32_t)0x10000040)
-#define DMA2_FLAG_TE2 ((uint32_t)0x10000080)
-#define DMA2_FLAG_GL3 ((uint32_t)0x10000100)
-#define DMA2_FLAG_TC3 ((uint32_t)0x10000200)
-#define DMA2_FLAG_HT3 ((uint32_t)0x10000400)
-#define DMA2_FLAG_TE3 ((uint32_t)0x10000800)
-#define DMA2_FLAG_GL4 ((uint32_t)0x10001000)
-#define DMA2_FLAG_TC4 ((uint32_t)0x10002000)
-#define DMA2_FLAG_HT4 ((uint32_t)0x10004000)
-#define DMA2_FLAG_TE4 ((uint32_t)0x10008000)
-#define DMA2_FLAG_GL5 ((uint32_t)0x10010000)
-#define DMA2_FLAG_TC5 ((uint32_t)0x10020000)
-#define DMA2_FLAG_HT5 ((uint32_t)0x10040000)
-#define DMA2_FLAG_TE5 ((uint32_t)0x10080000)
-
-#define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00))
-
-#define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \
- ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \
- ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \
- ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \
- ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \
- ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \
- ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \
- ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \
- ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \
- ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \
- ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \
- ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \
- ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \
- ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \
- ((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \
- ((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \
- ((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \
- ((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \
- ((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \
- ((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \
- ((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \
- ((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \
- ((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \
- ((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5))
-/**
- * @}
- */
-
-/** @defgroup DMA_Buffer_Size
- * @{
- */
-
-#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup DMA_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup DMA_Exported_Functions
- * @{
- */
-
-void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx);
-void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct);
-void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct);
-void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState);
-void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState);
-uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx);
-FlagStatus DMA_GetFlagStatus(uint32_t DMA_FLAG);
-void DMA_ClearFlag(uint32_t DMA_FLAG);
-ITStatus DMA_GetITStatus(uint32_t DMA_IT);
-void DMA_ClearITPendingBit(uint32_t DMA_IT);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32F10x_DMA_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_exti.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_exti.h deleted file mode 100644 index 8c011c1c8..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_exti.h +++ /dev/null @@ -1,183 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_exti.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the EXTI firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_EXTI_H
-#define __STM32F10x_EXTI_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup EXTI
- * @{
- */
-
-/** @defgroup EXTI_Exported_Types
- * @{
- */
-
-/**
- * @brief EXTI mode enumeration
- */
-
-typedef enum
-{
- EXTI_Mode_Interrupt = 0x00,
- EXTI_Mode_Event = 0x04
-}EXTIMode_TypeDef;
-
-#define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
-
-/**
- * @brief EXTI Trigger enumeration
- */
-
-typedef enum
-{
- EXTI_Trigger_Rising = 0x08,
- EXTI_Trigger_Falling = 0x0C,
- EXTI_Trigger_Rising_Falling = 0x10
-}EXTITrigger_TypeDef;
-
-#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
- ((TRIGGER) == EXTI_Trigger_Falling) || \
- ((TRIGGER) == EXTI_Trigger_Rising_Falling))
-/**
- * @brief EXTI Init Structure definition
- */
-
-typedef struct
-{
- uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled.
- This parameter can be any combination of @ref EXTI_Lines */
-
- EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines.
- This parameter can be a value of @ref EXTIMode_TypeDef */
-
- EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
- This parameter can be a value of @ref EXTIMode_TypeDef */
-
- FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
- This parameter can be set either to ENABLE or DISABLE */
-}EXTI_InitTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup EXTI_Exported_Constants
- * @{
- */
-
-/** @defgroup EXTI_Lines
- * @{
- */
-
-#define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */
-#define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */
-#define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */
-#define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */
-#define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */
-#define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */
-#define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */
-#define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */
-#define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */
-#define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */
-#define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */
-#define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */
-#define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */
-#define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */
-#define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */
-#define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */
-#define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */
-#define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */
-#define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS
- Wakeup from suspend event */
-#define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
-
-#define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00))
-
-#define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
- ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
- ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
- ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
- ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
- ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
- ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
- ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
- ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
- ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19))
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup EXTI_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup EXTI_Exported_Functions
- * @{
- */
-
-void EXTI_DeInit(void);
-void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
-void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
-void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
-FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
-void EXTI_ClearFlag(uint32_t EXTI_Line);
-ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
-void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_EXTI_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_flash.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_flash.h deleted file mode 100644 index 1c310231c..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_flash.h +++ /dev/null @@ -1,346 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_flash.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the FLASH
- * firmware library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_FLASH_H
-#define __STM32F10x_FLASH_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup FLASH
- * @{
- */
-
-/** @defgroup FLASH_Exported_Types
- * @{
- */
-
-/**
- * @brief FLASH Status
- */
-
-typedef enum
-{
- FLASH_BUSY = 1,
- FLASH_ERROR_PG,
- FLASH_ERROR_WRP,
- FLASH_COMPLETE,
- FLASH_TIMEOUT
-}FLASH_Status;
-
-/**
- * @}
- */
-
-/** @defgroup FLASH_Exported_Constants
- * @{
- */
-
-/** @defgroup Flash_Latency
- * @{
- */
-
-#define FLASH_Latency_0 ((uint32_t)0x00000000) /*!< FLASH Zero Latency cycle */
-#define FLASH_Latency_1 ((uint32_t)0x00000001) /*!< FLASH One Latency cycle */
-#define FLASH_Latency_2 ((uint32_t)0x00000002) /*!< FLASH Two Latency cycles */
-#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
- ((LATENCY) == FLASH_Latency_1) || \
- ((LATENCY) == FLASH_Latency_2))
-/**
- * @}
- */
-
-/** @defgroup Half_Cycle_Enable_Disable
- * @{
- */
-
-#define FLASH_HalfCycleAccess_Enable ((uint32_t)0x00000008) /*!< FLASH Half Cycle Enable */
-#define FLASH_HalfCycleAccess_Disable ((uint32_t)0x00000000) /*!< FLASH Half Cycle Disable */
-#define IS_FLASH_HALFCYCLEACCESS_STATE(STATE) (((STATE) == FLASH_HalfCycleAccess_Enable) || \
- ((STATE) == FLASH_HalfCycleAccess_Disable))
-/**
- * @}
- */
-
-/** @defgroup Prefetch_Buffer_Enable_Disable
- * @{
- */
-
-#define FLASH_PrefetchBuffer_Enable ((uint32_t)0x00000010) /*!< FLASH Prefetch Buffer Enable */
-#define FLASH_PrefetchBuffer_Disable ((uint32_t)0x00000000) /*!< FLASH Prefetch Buffer Disable */
-#define IS_FLASH_PREFETCHBUFFER_STATE(STATE) (((STATE) == FLASH_PrefetchBuffer_Enable) || \
- ((STATE) == FLASH_PrefetchBuffer_Disable))
-/**
- * @}
- */
-
-/** @defgroup Option_Bytes_Write_Protection
- * @{
- */
-
-/* Values to be used with STM32 Low and Medium density devices */
-#define FLASH_WRProt_Pages0to3 ((uint32_t)0x00000001) /*!< STM32 Low and Medium density devices: Write protection of page 0 to 3 */
-#define FLASH_WRProt_Pages4to7 ((uint32_t)0x00000002) /*!< STM32 Low and Medium density devices: Write protection of page 4 to 7 */
-#define FLASH_WRProt_Pages8to11 ((uint32_t)0x00000004) /*!< STM32 Low and Medium density devices: Write protection of page 8 to 11 */
-#define FLASH_WRProt_Pages12to15 ((uint32_t)0x00000008) /*!< STM32 Low and Medium density devices: Write protection of page 12 to 15 */
-#define FLASH_WRProt_Pages16to19 ((uint32_t)0x00000010) /*!< STM32 Low and Medium density devices: Write protection of page 16 to 19 */
-#define FLASH_WRProt_Pages20to23 ((uint32_t)0x00000020) /*!< STM32 Low and Medium density devices: Write protection of page 20 to 23 */
-#define FLASH_WRProt_Pages24to27 ((uint32_t)0x00000040) /*!< STM32 Low and Medium density devices: Write protection of page 24 to 27 */
-#define FLASH_WRProt_Pages28to31 ((uint32_t)0x00000080) /*!< STM32 Low and Medium density devices: Write protection of page 28 to 31 */
-
-/* Values to be used with STM32 Medium-density devices */
-#define FLASH_WRProt_Pages32to35 ((uint32_t)0x00000100) /*!< STM32 Medium-density devices: Write protection of page 32 to 35 */
-#define FLASH_WRProt_Pages36to39 ((uint32_t)0x00000200) /*!< STM32 Medium-density devices: Write protection of page 36 to 39 */
-#define FLASH_WRProt_Pages40to43 ((uint32_t)0x00000400) /*!< STM32 Medium-density devices: Write protection of page 40 to 43 */
-#define FLASH_WRProt_Pages44to47 ((uint32_t)0x00000800) /*!< STM32 Medium-density devices: Write protection of page 44 to 47 */
-#define FLASH_WRProt_Pages48to51 ((uint32_t)0x00001000) /*!< STM32 Medium-density devices: Write protection of page 48 to 51 */
-#define FLASH_WRProt_Pages52to55 ((uint32_t)0x00002000) /*!< STM32 Medium-density devices: Write protection of page 52 to 55 */
-#define FLASH_WRProt_Pages56to59 ((uint32_t)0x00004000) /*!< STM32 Medium-density devices: Write protection of page 56 to 59 */
-#define FLASH_WRProt_Pages60to63 ((uint32_t)0x00008000) /*!< STM32 Medium-density devices: Write protection of page 60 to 63 */
-#define FLASH_WRProt_Pages64to67 ((uint32_t)0x00010000) /*!< STM32 Medium-density devices: Write protection of page 64 to 67 */
-#define FLASH_WRProt_Pages68to71 ((uint32_t)0x00020000) /*!< STM32 Medium-density devices: Write protection of page 68 to 71 */
-#define FLASH_WRProt_Pages72to75 ((uint32_t)0x00040000) /*!< STM32 Medium-density devices: Write protection of page 72 to 75 */
-#define FLASH_WRProt_Pages76to79 ((uint32_t)0x00080000) /*!< STM32 Medium-density devices: Write protection of page 76 to 79 */
-#define FLASH_WRProt_Pages80to83 ((uint32_t)0x00100000) /*!< STM32 Medium-density devices: Write protection of page 80 to 83 */
-#define FLASH_WRProt_Pages84to87 ((uint32_t)0x00200000) /*!< STM32 Medium-density devices: Write protection of page 84 to 87 */
-#define FLASH_WRProt_Pages88to91 ((uint32_t)0x00400000) /*!< STM32 Medium-density devices: Write protection of page 88 to 91 */
-#define FLASH_WRProt_Pages92to95 ((uint32_t)0x00800000) /*!< STM32 Medium-density devices: Write protection of page 92 to 95 */
-#define FLASH_WRProt_Pages96to99 ((uint32_t)0x01000000) /*!< STM32 Medium-density devices: Write protection of page 96 to 99 */
-#define FLASH_WRProt_Pages100to103 ((uint32_t)0x02000000) /*!< STM32 Medium-density devices: Write protection of page 100 to 103 */
-#define FLASH_WRProt_Pages104to107 ((uint32_t)0x04000000) /*!< STM32 Medium-density devices: Write protection of page 104 to 107 */
-#define FLASH_WRProt_Pages108to111 ((uint32_t)0x08000000) /*!< STM32 Medium-density devices: Write protection of page 108 to 111 */
-#define FLASH_WRProt_Pages112to115 ((uint32_t)0x10000000) /*!< STM32 Medium-density devices: Write protection of page 112 to 115 */
-#define FLASH_WRProt_Pages116to119 ((uint32_t)0x20000000) /*!< STM32 Medium-density devices: Write protection of page 115 to 119 */
-#define FLASH_WRProt_Pages120to123 ((uint32_t)0x40000000) /*!< STM32 Medium-density devices: Write protection of page 120 to 123 */
-#define FLASH_WRProt_Pages124to127 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 124 to 127 */
-
-/* Values to be used with STM32 High-density and STM32F10X Connectivity line devices */
-#define FLASH_WRProt_Pages0to1 ((uint32_t)0x00000001) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 0 to 1 */
-#define FLASH_WRProt_Pages2to3 ((uint32_t)0x00000002) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 2 to 3 */
-#define FLASH_WRProt_Pages4to5 ((uint32_t)0x00000004) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 4 to 5 */
-#define FLASH_WRProt_Pages6to7 ((uint32_t)0x00000008) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 6 to 7 */
-#define FLASH_WRProt_Pages8to9 ((uint32_t)0x00000010) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 8 to 9 */
-#define FLASH_WRProt_Pages10to11 ((uint32_t)0x00000020) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 10 to 11 */
-#define FLASH_WRProt_Pages12to13 ((uint32_t)0x00000040) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 12 to 13 */
-#define FLASH_WRProt_Pages14to15 ((uint32_t)0x00000080) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 14 to 15 */
-#define FLASH_WRProt_Pages16to17 ((uint32_t)0x00000100) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 16 to 17 */
-#define FLASH_WRProt_Pages18to19 ((uint32_t)0x00000200) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 18 to 19 */
-#define FLASH_WRProt_Pages20to21 ((uint32_t)0x00000400) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 20 to 21 */
-#define FLASH_WRProt_Pages22to23 ((uint32_t)0x00000800) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 22 to 23 */
-#define FLASH_WRProt_Pages24to25 ((uint32_t)0x00001000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 24 to 25 */
-#define FLASH_WRProt_Pages26to27 ((uint32_t)0x00002000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 26 to 27 */
-#define FLASH_WRProt_Pages28to29 ((uint32_t)0x00004000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 28 to 29 */
-#define FLASH_WRProt_Pages30to31 ((uint32_t)0x00008000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 30 to 31 */
-#define FLASH_WRProt_Pages32to33 ((uint32_t)0x00010000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 32 to 33 */
-#define FLASH_WRProt_Pages34to35 ((uint32_t)0x00020000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 34 to 35 */
-#define FLASH_WRProt_Pages36to37 ((uint32_t)0x00040000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 36 to 37 */
-#define FLASH_WRProt_Pages38to39 ((uint32_t)0x00080000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 38 to 39 */
-#define FLASH_WRProt_Pages40to41 ((uint32_t)0x00100000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 40 to 41 */
-#define FLASH_WRProt_Pages42to43 ((uint32_t)0x00200000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 42 to 43 */
-#define FLASH_WRProt_Pages44to45 ((uint32_t)0x00400000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 44 to 45 */
-#define FLASH_WRProt_Pages46to47 ((uint32_t)0x00800000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 46 to 47 */
-#define FLASH_WRProt_Pages48to49 ((uint32_t)0x01000000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 48 to 49 */
-#define FLASH_WRProt_Pages50to51 ((uint32_t)0x02000000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 50 to 51 */
-#define FLASH_WRProt_Pages52to53 ((uint32_t)0x04000000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 52 to 53 */
-#define FLASH_WRProt_Pages54to55 ((uint32_t)0x08000000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 54 to 55 */
-#define FLASH_WRProt_Pages56to57 ((uint32_t)0x10000000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 56 to 57 */
-#define FLASH_WRProt_Pages58to59 ((uint32_t)0x20000000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 58 to 59 */
-#define FLASH_WRProt_Pages60to61 ((uint32_t)0x40000000) /*!< STM32 Medium-density and Connectivity line devices:
- Write protection of page 60 to 61 */
-#define FLASH_WRProt_Pages62to127 ((uint32_t)0x80000000) /*!< STM32 Connectivity line devices: Write protection of page 62 to 127 */
-#define FLASH_WRProt_Pages62to255 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 62 to 255 */
-
-#define FLASH_WRProt_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */
-
-#define IS_FLASH_WRPROT_PAGE(PAGE) (((PAGE) != 0x00000000))
-
-#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x0807FFFF))
-
-#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806))
-
-/**
- * @}
- */
-
-/** @defgroup Option_Bytes_IWatchdog
- * @{
- */
-
-#define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */
-#define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */
-#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
-
-/**
- * @}
- */
-
-/** @defgroup Option_Bytes_nRST_STOP
- * @{
- */
-
-#define OB_STOP_NoRST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */
-#define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */
-#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST))
-
-/**
- * @}
- */
-
-/** @defgroup Option_Bytes_nRST_STDBY
- * @{
- */
-
-#define OB_STDBY_NoRST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */
-#define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */
-#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
-
-/**
- * @}
- */
-
-/** @defgroup FLASH_Interrupts
- * @{
- */
-
-#define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC error interrupt source */
-#define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH Operation Interrupt source */
-#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000)))
-
-/**
- * @}
- */
-
-/** @defgroup FLASH_Flags
- * @{
- */
-
-#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */
-#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */
-#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */
-#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */
-#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */
-
-#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000))
-#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \
- ((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \
- ((FLAG) == FLASH_FLAG_OPTERR))
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup FLASH_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup FLASH_Exported_Functions
- * @{
- */
-
-void FLASH_SetLatency(uint32_t FLASH_Latency);
-void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess);
-void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer);
-void FLASH_Unlock(void);
-void FLASH_Lock(void);
-FLASH_Status FLASH_ErasePage(uint32_t Page_Address);
-FLASH_Status FLASH_EraseAllPages(void);
-FLASH_Status FLASH_EraseOptionBytes(void);
-FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
-FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
-FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data);
-FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages);
-FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState);
-FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY);
-uint32_t FLASH_GetUserOptionByte(void);
-uint32_t FLASH_GetWriteProtectionOptionByte(void);
-FlagStatus FLASH_GetReadOutProtectionStatus(void);
-FlagStatus FLASH_GetPrefetchBufferStatus(void);
-void FLASH_ITConfig(uint16_t FLASH_IT, FunctionalState NewState);
-FlagStatus FLASH_GetFlagStatus(uint16_t FLASH_FLAG);
-void FLASH_ClearFlag(uint16_t FLASH_FLAG);
-FLASH_Status FLASH_GetStatus(void);
-FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_FLASH_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_fsmc.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_fsmc.h deleted file mode 100644 index 1340e218a..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_fsmc.h +++ /dev/null @@ -1,716 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_fsmc.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the FSMC firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_FSMC_H
-#define __STM32F10x_FSMC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup FSMC
- * @{
- */
-
-/** @defgroup FSMC_Exported_Types
- * @{
- */
-
-/**
- * @brief Timing parameters For NOR/SRAM Banks
- */
-
-typedef struct
-{
- uint32_t FSMC_AddressSetupTime; /*!< Defines the number of HCLK cycles to configure
- the duration of the address setup time.
- This parameter can be a value between 0 and 0xF.
- @note: It is not used with synchronous NOR Flash memories. */
-
- uint32_t FSMC_AddressHoldTime; /*!< Defines the number of HCLK cycles to configure
- the duration of the address hold time.
- This parameter can be a value between 0 and 0xF.
- @note: It is not used with synchronous NOR Flash memories.*/
-
- uint32_t FSMC_DataSetupTime; /*!< Defines the number of HCLK cycles to configure
- the duration of the data setup time.
- This parameter can be a value between 0 and 0xFF.
- @note: It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories. */
-
- uint32_t FSMC_BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure
- the duration of the bus turnaround.
- This parameter can be a value between 0 and 0xF.
- @note: It is only used for multiplexed NOR Flash memories. */
-
- uint32_t FSMC_CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
- This parameter can be a value between 1 and 0xF.
- @note: This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses. */
-
- uint32_t FSMC_DataLatency; /*!< Defines the number of memory clock cycles to issue
- to the memory before getting the first data.
- The value of this parameter depends on the memory type as shown below:
- - It must be set to 0 in case of a CRAM
- - It is don’t care in asynchronous NOR, SRAM or ROM accesses
- - It may assume a value between 0 and 0xF in NOR Flash memories
- with synchronous burst mode enable */
-
- uint32_t FSMC_AccessMode; /*!< Specifies the asynchronous access mode.
- This parameter can be a value of @ref FSMC_Access_Mode */
-}FSMC_NORSRAMTimingInitTypeDef;
-
-/**
- * @brief FSMC NOR/SRAM Init structure definition
- */
-
-typedef struct
-{
- uint32_t FSMC_Bank; /*!< Specifies the NOR/SRAM memory bank that will be used.
- This parameter can be a value of @ref FSMC_NORSRAM_Bank */
-
- uint32_t FSMC_DataAddressMux; /*!< Specifies whether the address and data values are
- multiplexed on the databus or not.
- This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */
-
- uint32_t FSMC_MemoryType; /*!< Specifies the type of external memory attached to
- the corresponding memory bank.
- This parameter can be a value of @ref FSMC_Memory_Type */
-
- uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width.
- This parameter can be a value of @ref FSMC_Data_Width */
-
- uint32_t FSMC_BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
- valid only with synchronous burst Flash memories.
- This parameter can be a value of @ref FSMC_Burst_Access_Mode */
-
- uint32_t FSMC_WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
- the Flash memory in burst mode.
- This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */
-
- uint32_t FSMC_WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash
- memory, valid only when accessing Flash memories in burst mode.
- This parameter can be a value of @ref FSMC_Wrap_Mode */
-
- uint32_t FSMC_WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
- clock cycle before the wait state or during the wait state,
- valid only when accessing memories in burst mode.
- This parameter can be a value of @ref FSMC_Wait_Timing */
-
- uint32_t FSMC_WriteOperation; /*!< Enables or disables the write operation in the selected bank by the FSMC.
- This parameter can be a value of @ref FSMC_Write_Operation */
-
- uint32_t FSMC_WaitSignal; /*!< Enables or disables the wait-state insertion via wait
- signal, valid for Flash memory access in burst mode.
- This parameter can be a value of @ref FSMC_Wait_Signal */
-
- uint32_t FSMC_ExtendedMode; /*!< Enables or disables the extended mode.
- This parameter can be a value of @ref FSMC_Extended_Mode */
-
- uint32_t FSMC_WriteBurst; /*!< Enables or disables the write burst operation.
- This parameter can be a value of @ref FSMC_Write_Burst */
-
- FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct; /*!< Timing Parameters for write and read access if the ExtendedMode is not used*/
-
- FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct; /*!< Timing Parameters for write access if the ExtendedMode is used*/
-}FSMC_NORSRAMInitTypeDef;
-
-/**
- * @brief Timing parameters For FSMC NAND and PCCARD Banks
- */
-
-typedef struct
-{
- uint32_t FSMC_SetupTime; /*!< Defines the number of HCLK cycles to setup address before
- the command assertion for NAND-Flash read or write access
- to common/Attribute or I/O memory space (depending on
- the memory space timing to be configured).
- This parameter can be a value between 0 and 0xFF.*/
-
- uint32_t FSMC_WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the
- command for NAND-Flash read or write access to
- common/Attribute or I/O memory space (depending on the
- memory space timing to be configured).
- This parameter can be a number between 0x00 and 0xFF */
-
- uint32_t FSMC_HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address
- (and data for write access) after the command deassertion
- for NAND-Flash read or write access to common/Attribute
- or I/O memory space (depending on the memory space timing
- to be configured).
- This parameter can be a number between 0x00 and 0xFF */
-
- uint32_t FSMC_HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the
- databus is kept in HiZ after the start of a NAND-Flash
- write access to common/Attribute or I/O memory space (depending
- on the memory space timing to be configured).
- This parameter can be a number between 0x00 and 0xFF */
-}FSMC_NAND_PCCARDTimingInitTypeDef;
-
-/**
- * @brief FSMC NAND Init structure definition
- */
-
-typedef struct
-{
- uint32_t FSMC_Bank; /*!< Specifies the NAND memory bank that will be used.
- This parameter can be a value of @ref FSMC_NAND_Bank */
-
- uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory Bank.
- This parameter can be any value of @ref FSMC_Wait_feature */
-
- uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width.
- This parameter can be any value of @ref FSMC_Data_Width */
-
- uint32_t FSMC_ECC; /*!< Enables or disables the ECC computation.
- This parameter can be any value of @ref FSMC_ECC */
-
- uint32_t FSMC_ECCPageSize; /*!< Defines the page size for the extended ECC.
- This parameter can be any value of @ref FSMC_ECC_Page_Size */
-
- uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
- delay between CLE low and RE low.
- This parameter can be a value between 0 and 0xFF. */
-
- uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
- delay between ALE low and RE low.
- This parameter can be a number between 0x0 and 0xFF */
-
- FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */
-
- FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */
-}FSMC_NANDInitTypeDef;
-
-/**
- * @brief FSMC PCCARD Init structure definition
- */
-
-typedef struct
-{
- uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the Memory Bank.
- This parameter can be any value of @ref FSMC_Wait_feature */
-
- uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
- delay between CLE low and RE low.
- This parameter can be a value between 0 and 0xFF. */
-
- uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
- delay between ALE low and RE low.
- This parameter can be a number between 0x0 and 0xFF */
-
-
- FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */
-
- FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */
-
- FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_IOSpaceTimingStruct; /*!< FSMC IO Space Timing */
-}FSMC_PCCARDInitTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Exported_Constants
- * @{
- */
-
-/** @defgroup FSMC_NORSRAM_Bank
- * @{
- */
-#define FSMC_Bank1_NORSRAM1 ((uint32_t)0x00000000)
-#define FSMC_Bank1_NORSRAM2 ((uint32_t)0x00000002)
-#define FSMC_Bank1_NORSRAM3 ((uint32_t)0x00000004)
-#define FSMC_Bank1_NORSRAM4 ((uint32_t)0x00000006)
-/**
- * @}
- */
-
-/** @defgroup FSMC_NAND_Bank
- * @{
- */
-#define FSMC_Bank2_NAND ((uint32_t)0x00000010)
-#define FSMC_Bank3_NAND ((uint32_t)0x00000100)
-/**
- * @}
- */
-
-/** @defgroup FSMC_PCCARD_Bank
- * @{
- */
-#define FSMC_Bank4_PCCARD ((uint32_t)0x00001000)
-/**
- * @}
- */
-
-#define IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || \
- ((BANK) == FSMC_Bank1_NORSRAM2) || \
- ((BANK) == FSMC_Bank1_NORSRAM3) || \
- ((BANK) == FSMC_Bank1_NORSRAM4))
-
-#define IS_FSMC_NAND_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
- ((BANK) == FSMC_Bank3_NAND))
-
-#define IS_FSMC_GETFLAG_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
- ((BANK) == FSMC_Bank3_NAND) || \
- ((BANK) == FSMC_Bank4_PCCARD))
-
-#define IS_FSMC_IT_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
- ((BANK) == FSMC_Bank3_NAND) || \
- ((BANK) == FSMC_Bank4_PCCARD))
-
-/** @defgroup NOR_SRAM_Controller
- * @{
- */
-
-/** @defgroup FSMC_Data_Address_Bus_Multiplexing
- * @{
- */
-
-#define FSMC_DataAddressMux_Disable ((uint32_t)0x00000000)
-#define FSMC_DataAddressMux_Enable ((uint32_t)0x00000002)
-#define IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || \
- ((MUX) == FSMC_DataAddressMux_Enable))
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Memory_Type
- * @{
- */
-
-#define FSMC_MemoryType_SRAM ((uint32_t)0x00000000)
-#define FSMC_MemoryType_PSRAM ((uint32_t)0x00000004)
-#define FSMC_MemoryType_NOR ((uint32_t)0x00000008)
-#define IS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || \
- ((MEMORY) == FSMC_MemoryType_PSRAM)|| \
- ((MEMORY) == FSMC_MemoryType_NOR))
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Data_Width
- * @{
- */
-
-#define FSMC_MemoryDataWidth_8b ((uint32_t)0x00000000)
-#define FSMC_MemoryDataWidth_16b ((uint32_t)0x00000010)
-#define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \
- ((WIDTH) == FSMC_MemoryDataWidth_16b))
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Burst_Access_Mode
- * @{
- */
-
-#define FSMC_BurstAccessMode_Disable ((uint32_t)0x00000000)
-#define FSMC_BurstAccessMode_Enable ((uint32_t)0x00000100)
-#define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \
- ((STATE) == FSMC_BurstAccessMode_Enable))
-/**
- * @}
- */
-
-/** @defgroup FSMC_Wait_Signal_Polarity
- * @{
- */
-
-#define FSMC_WaitSignalPolarity_Low ((uint32_t)0x00000000)
-#define FSMC_WaitSignalPolarity_High ((uint32_t)0x00000200)
-#define IS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || \
- ((POLARITY) == FSMC_WaitSignalPolarity_High))
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Wrap_Mode
- * @{
- */
-
-#define FSMC_WrapMode_Disable ((uint32_t)0x00000000)
-#define FSMC_WrapMode_Enable ((uint32_t)0x00000400)
-#define IS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || \
- ((MODE) == FSMC_WrapMode_Enable))
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Wait_Timing
- * @{
- */
-
-#define FSMC_WaitSignalActive_BeforeWaitState ((uint32_t)0x00000000)
-#define FSMC_WaitSignalActive_DuringWaitState ((uint32_t)0x00000800)
-#define IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || \
- ((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState))
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Write_Operation
- * @{
- */
-
-#define FSMC_WriteOperation_Disable ((uint32_t)0x00000000)
-#define FSMC_WriteOperation_Enable ((uint32_t)0x00001000)
-#define IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || \
- ((OPERATION) == FSMC_WriteOperation_Enable))
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Wait_Signal
- * @{
- */
-
-#define FSMC_WaitSignal_Disable ((uint32_t)0x00000000)
-#define FSMC_WaitSignal_Enable ((uint32_t)0x00002000)
-#define IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || \
- ((SIGNAL) == FSMC_WaitSignal_Enable))
-/**
- * @}
- */
-
-/** @defgroup FSMC_Extended_Mode
- * @{
- */
-
-#define FSMC_ExtendedMode_Disable ((uint32_t)0x00000000)
-#define FSMC_ExtendedMode_Enable ((uint32_t)0x00004000)
-
-#define IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || \
- ((MODE) == FSMC_ExtendedMode_Enable))
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Write_Burst
- * @{
- */
-
-#define FSMC_WriteBurst_Disable ((uint32_t)0x00000000)
-#define FSMC_WriteBurst_Enable ((uint32_t)0x00080000)
-#define IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || \
- ((BURST) == FSMC_WriteBurst_Enable))
-/**
- * @}
- */
-
-/** @defgroup FSMC_Address_Setup_Time
- * @{
- */
-
-#define IS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF)
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Address_Hold_Time
- * @{
- */
-
-#define IS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF)
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Data_Setup_Time
- * @{
- */
-
-#define IS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF))
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Bus_Turn_around_Duration
- * @{
- */
-
-#define IS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF)
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_CLK_Division
- * @{
- */
-
-#define IS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF)
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Data_Latency
- * @{
- */
-
-#define IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF)
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Access_Mode
- * @{
- */
-
-#define FSMC_AccessMode_A ((uint32_t)0x00000000)
-#define FSMC_AccessMode_B ((uint32_t)0x10000000)
-#define FSMC_AccessMode_C ((uint32_t)0x20000000)
-#define FSMC_AccessMode_D ((uint32_t)0x30000000)
-#define IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || \
- ((MODE) == FSMC_AccessMode_B) || \
- ((MODE) == FSMC_AccessMode_C) || \
- ((MODE) == FSMC_AccessMode_D))
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup NAND_PCCARD_Controller
- * @{
- */
-
-/** @defgroup FSMC_Wait_feature
- * @{
- */
-
-#define FSMC_Waitfeature_Disable ((uint32_t)0x00000000)
-#define FSMC_Waitfeature_Enable ((uint32_t)0x00000002)
-#define IS_FSMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FSMC_Waitfeature_Disable) || \
- ((FEATURE) == FSMC_Waitfeature_Enable))
-
-/**
- * @}
- */
-
-
-/** @defgroup FSMC_ECC
- * @{
- */
-
-#define FSMC_ECC_Disable ((uint32_t)0x00000000)
-#define FSMC_ECC_Enable ((uint32_t)0x00000040)
-#define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_ECC_Disable) || \
- ((STATE) == FSMC_ECC_Enable))
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_ECC_Page_Size
- * @{
- */
-
-#define FSMC_ECCPageSize_256Bytes ((uint32_t)0x00000000)
-#define FSMC_ECCPageSize_512Bytes ((uint32_t)0x00020000)
-#define FSMC_ECCPageSize_1024Bytes ((uint32_t)0x00040000)
-#define FSMC_ECCPageSize_2048Bytes ((uint32_t)0x00060000)
-#define FSMC_ECCPageSize_4096Bytes ((uint32_t)0x00080000)
-#define FSMC_ECCPageSize_8192Bytes ((uint32_t)0x000A0000)
-#define IS_FSMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FSMC_ECCPageSize_256Bytes) || \
- ((SIZE) == FSMC_ECCPageSize_512Bytes) || \
- ((SIZE) == FSMC_ECCPageSize_1024Bytes) || \
- ((SIZE) == FSMC_ECCPageSize_2048Bytes) || \
- ((SIZE) == FSMC_ECCPageSize_4096Bytes) || \
- ((SIZE) == FSMC_ECCPageSize_8192Bytes))
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_TCLR_Setup_Time
- * @{
- */
-
-#define IS_FSMC_TCLR_TIME(TIME) ((TIME) <= 0xFF)
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_TAR_Setup_Time
- * @{
- */
-
-#define IS_FSMC_TAR_TIME(TIME) ((TIME) <= 0xFF)
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Setup_Time
- * @{
- */
-
-#define IS_FSMC_SETUP_TIME(TIME) ((TIME) <= 0xFF)
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Wait_Setup_Time
- * @{
- */
-
-#define IS_FSMC_WAIT_TIME(TIME) ((TIME) <= 0xFF)
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Hold_Setup_Time
- * @{
- */
-
-#define IS_FSMC_HOLD_TIME(TIME) ((TIME) <= 0xFF)
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_HiZ_Setup_Time
- * @{
- */
-
-#define IS_FSMC_HIZ_TIME(TIME) ((TIME) <= 0xFF)
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Interrupt_sources
- * @{
- */
-
-#define FSMC_IT_RisingEdge ((uint32_t)0x00000008)
-#define FSMC_IT_Level ((uint32_t)0x00000010)
-#define FSMC_IT_FallingEdge ((uint32_t)0x00000020)
-#define IS_FSMC_IT(IT) ((((IT) & (uint32_t)0xFFFFFFC7) == 0x00000000) && ((IT) != 0x00000000))
-#define IS_FSMC_GET_IT(IT) (((IT) == FSMC_IT_RisingEdge) || \
- ((IT) == FSMC_IT_Level) || \
- ((IT) == FSMC_IT_FallingEdge))
-/**
- * @}
- */
-
-/** @defgroup FSMC_Flags
- * @{
- */
-
-#define FSMC_FLAG_RisingEdge ((uint32_t)0x00000001)
-#define FSMC_FLAG_Level ((uint32_t)0x00000002)
-#define FSMC_FLAG_FallingEdge ((uint32_t)0x00000004)
-#define FSMC_FLAG_FEMPT ((uint32_t)0x00000040)
-#define IS_FSMC_GET_FLAG(FLAG) (((FLAG) == FSMC_FLAG_RisingEdge) || \
- ((FLAG) == FSMC_FLAG_Level) || \
- ((FLAG) == FSMC_FLAG_FallingEdge) || \
- ((FLAG) == FSMC_FLAG_FEMPT))
-
-#define IS_FSMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000))
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup FSMC_Exported_Functions
- * @{
- */
-
-void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank);
-void FSMC_NANDDeInit(uint32_t FSMC_Bank);
-void FSMC_PCCARDDeInit(void);
-void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
-void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct);
-void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct);
-void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
-void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct);
-void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct);
-void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState);
-void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState);
-void FSMC_PCCARDCmd(FunctionalState NewState);
-void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState);
-uint32_t FSMC_GetECC(uint32_t FSMC_Bank);
-void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState);
-FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG);
-void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG);
-ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT);
-void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32F10x_FSMC_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_gpio.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_gpio.h deleted file mode 100644 index 94f234d8d..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_gpio.h +++ /dev/null @@ -1,359 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_gpio.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the GPIO
- * firmware library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_GPIO_H
-#define __STM32F10x_GPIO_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup GPIO
- * @{
- */
-
-/** @defgroup GPIO_Exported_Types
- * @{
- */
-
-#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
- ((PERIPH) == GPIOB) || \
- ((PERIPH) == GPIOC) || \
- ((PERIPH) == GPIOD) || \
- ((PERIPH) == GPIOE) || \
- ((PERIPH) == GPIOF) || \
- ((PERIPH) == GPIOG))
-
-/**
- * @brief Output Maximum frequency selection
- */
-
-typedef enum
-{
- GPIO_Speed_10MHz = 1,
- GPIO_Speed_2MHz,
- GPIO_Speed_50MHz
-}GPIOSpeed_TypeDef;
-#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \
- ((SPEED) == GPIO_Speed_50MHz))
-
-/**
- * @brief Configuration Mode enumeration
- */
-
-typedef enum
-{ GPIO_Mode_AIN = 0x0,
- GPIO_Mode_IN_FLOATING = 0x04,
- GPIO_Mode_IPD = 0x28,
- GPIO_Mode_IPU = 0x48,
- GPIO_Mode_Out_OD = 0x14,
- GPIO_Mode_Out_PP = 0x10,
- GPIO_Mode_AF_OD = 0x1C,
- GPIO_Mode_AF_PP = 0x18
-}GPIOMode_TypeDef;
-
-#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \
- ((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \
- ((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \
- ((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))
-
-/**
- * @brief GPIO Init structure definition
- */
-
-typedef struct
-{
- uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
- This parameter can be any value of @ref GPIO_pins_define */
-
- GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
- This parameter can be a value of @ref GPIOSpeed_TypeDef */
-
- GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
- This parameter can be a value of @ref GPIOMode_TypeDef */
-}GPIO_InitTypeDef;
-
-
-/**
- * @brief Bit_SET and Bit_RESET enumeration
- */
-
-typedef enum
-{ Bit_RESET = 0,
- Bit_SET
-}BitAction;
-
-#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
-
-/**
- * @}
- */
-
-/** @defgroup GPIO_Exported_Constants
- * @{
- */
-
-/** @defgroup GPIO_pins_define
- * @{
- */
-
-#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
-#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
-#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
-#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
-#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
-#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
-#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
-#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
-#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
-#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
-#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
-#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
-#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
-#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
-#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
-#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
-#define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
-
-#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))
-
-#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
- ((PIN) == GPIO_Pin_1) || \
- ((PIN) == GPIO_Pin_2) || \
- ((PIN) == GPIO_Pin_3) || \
- ((PIN) == GPIO_Pin_4) || \
- ((PIN) == GPIO_Pin_5) || \
- ((PIN) == GPIO_Pin_6) || \
- ((PIN) == GPIO_Pin_7) || \
- ((PIN) == GPIO_Pin_8) || \
- ((PIN) == GPIO_Pin_9) || \
- ((PIN) == GPIO_Pin_10) || \
- ((PIN) == GPIO_Pin_11) || \
- ((PIN) == GPIO_Pin_12) || \
- ((PIN) == GPIO_Pin_13) || \
- ((PIN) == GPIO_Pin_14) || \
- ((PIN) == GPIO_Pin_15))
-
-/**
- * @}
- */
-
-/** @defgroup GPIO_Remap_define
- * @{
- */
-
-#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */
-#define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */
-#define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */
-#define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */
-#define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */
-#define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */
-#define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */
-#define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */
-#define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */
-#define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */
-#define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */
-#define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */
-#define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */
-#define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */
-#define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */
-#define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */
-#define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */
-#define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */
-#define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */
-#define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */
-#define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */
-#define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */
-#define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */
-#define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */
-#define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */
-#define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */
-#define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */
-#define GPIO_Remap_SPI3 ((uint32_t)0x00201000) /*!< SPI3 Alternate Function mapping (only for Connectivity line devices) */
-#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected
- to TIM2 Internal Trigger 1 for calibration
- (only for Connectivity line devices) */
-#define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */
-
-#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \
- ((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \
- ((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \
- ((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \
- ((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \
- ((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \
- ((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \
- ((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \
- ((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \
- ((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \
- ((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \
- ((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \
- ((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \
- ((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \
- ((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS))
-
-/**
- * @}
- */
-
-/** @defgroup GPIO_Port_Sources
- * @{
- */
-
-#define GPIO_PortSourceGPIOA ((uint8_t)0x00)
-#define GPIO_PortSourceGPIOB ((uint8_t)0x01)
-#define GPIO_PortSourceGPIOC ((uint8_t)0x02)
-#define GPIO_PortSourceGPIOD ((uint8_t)0x03)
-#define GPIO_PortSourceGPIOE ((uint8_t)0x04)
-#define GPIO_PortSourceGPIOF ((uint8_t)0x05)
-#define GPIO_PortSourceGPIOG ((uint8_t)0x06)
-#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
- ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
- ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
- ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
- ((PORTSOURCE) == GPIO_PortSourceGPIOE))
-
-#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
- ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
- ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
- ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
- ((PORTSOURCE) == GPIO_PortSourceGPIOE) || \
- ((PORTSOURCE) == GPIO_PortSourceGPIOF) || \
- ((PORTSOURCE) == GPIO_PortSourceGPIOG))
-
-/**
- * @}
- */
-
-/** @defgroup GPIO_Pin_sources
- * @{
- */
-
-#define GPIO_PinSource0 ((uint8_t)0x00)
-#define GPIO_PinSource1 ((uint8_t)0x01)
-#define GPIO_PinSource2 ((uint8_t)0x02)
-#define GPIO_PinSource3 ((uint8_t)0x03)
-#define GPIO_PinSource4 ((uint8_t)0x04)
-#define GPIO_PinSource5 ((uint8_t)0x05)
-#define GPIO_PinSource6 ((uint8_t)0x06)
-#define GPIO_PinSource7 ((uint8_t)0x07)
-#define GPIO_PinSource8 ((uint8_t)0x08)
-#define GPIO_PinSource9 ((uint8_t)0x09)
-#define GPIO_PinSource10 ((uint8_t)0x0A)
-#define GPIO_PinSource11 ((uint8_t)0x0B)
-#define GPIO_PinSource12 ((uint8_t)0x0C)
-#define GPIO_PinSource13 ((uint8_t)0x0D)
-#define GPIO_PinSource14 ((uint8_t)0x0E)
-#define GPIO_PinSource15 ((uint8_t)0x0F)
-
-#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
- ((PINSOURCE) == GPIO_PinSource1) || \
- ((PINSOURCE) == GPIO_PinSource2) || \
- ((PINSOURCE) == GPIO_PinSource3) || \
- ((PINSOURCE) == GPIO_PinSource4) || \
- ((PINSOURCE) == GPIO_PinSource5) || \
- ((PINSOURCE) == GPIO_PinSource6) || \
- ((PINSOURCE) == GPIO_PinSource7) || \
- ((PINSOURCE) == GPIO_PinSource8) || \
- ((PINSOURCE) == GPIO_PinSource9) || \
- ((PINSOURCE) == GPIO_PinSource10) || \
- ((PINSOURCE) == GPIO_PinSource11) || \
- ((PINSOURCE) == GPIO_PinSource12) || \
- ((PINSOURCE) == GPIO_PinSource13) || \
- ((PINSOURCE) == GPIO_PinSource14) || \
- ((PINSOURCE) == GPIO_PinSource15))
-
-/**
- * @}
- */
-
-/** @defgroup Ethernet_Media_Interface
- * @{
- */
-#define GPIO_ETH_MediaInterface_MII ((u32)0x00000000)
-#define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001)
-
-#define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \
- ((INTERFACE) == GPIO_ETH_MediaInterface_RMII))
-
-/**
- * @}
- */
-/**
- * @}
- */
-
-/** @defgroup GPIO_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup GPIO_Exported_Functions
- * @{
- */
-
-void GPIO_DeInit(GPIO_TypeDef* GPIOx);
-void GPIO_AFIODeInit(void);
-void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
-void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
-uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
-uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
-uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
-uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
-void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
-void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
-void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
-void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
-void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
-void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
-void GPIO_EventOutputCmd(FunctionalState NewState);
-void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState);
-void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
-void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_GPIO_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_i2c.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_i2c.h deleted file mode 100644 index 4da8ed30b..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_i2c.h +++ /dev/null @@ -1,472 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_i2c.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the I2C firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_I2C_H
-#define __STM32F10x_I2C_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup I2C
- * @{
- */
-
-/** @defgroup I2C_Exported_Types
- * @{
- */
-
-/**
- * @brief I2C Init structure definition
- */
-
-typedef struct
-{
- uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency.
- This parameter must be set to a value lower than 400kHz */
-
- uint16_t I2C_Mode; /*!< Specifies the I2C mode.
- This parameter can be a value of @ref I2C_mode */
-
- uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
- This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
-
- uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address.
- This parameter can be a 7-bit or 10-bit address. */
-
- uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement.
- This parameter can be a value of @ref I2C_acknowledgement */
-
- uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
- This parameter can be a value of @ref I2C_acknowledged_address */
-}I2C_InitTypeDef;
-
-/**
- * @}
- */
-
-
-/** @defgroup I2C_Exported_Constants
- * @{
- */
-
-#define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
- ((PERIPH) == I2C2))
-/** @defgroup I2C_mode
- * @{
- */
-
-#define I2C_Mode_I2C ((uint16_t)0x0000)
-#define I2C_Mode_SMBusDevice ((uint16_t)0x0002)
-#define I2C_Mode_SMBusHost ((uint16_t)0x000A)
-#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
- ((MODE) == I2C_Mode_SMBusDevice) || \
- ((MODE) == I2C_Mode_SMBusHost))
-/**
- * @}
- */
-
-/** @defgroup I2C_duty_cycle_in_fast_mode
- * @{
- */
-
-#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */
-#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */
-#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
- ((CYCLE) == I2C_DutyCycle_2))
-/**
- * @}
- */
-
-/** @defgroup I2C_acknowledgement
- * @{
- */
-
-#define I2C_Ack_Enable ((uint16_t)0x0400)
-#define I2C_Ack_Disable ((uint16_t)0x0000)
-#define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
- ((STATE) == I2C_Ack_Disable))
-/**
- * @}
- */
-
-/** @defgroup I2C_transfer_direction
- * @{
- */
-
-#define I2C_Direction_Transmitter ((uint8_t)0x00)
-#define I2C_Direction_Receiver ((uint8_t)0x01)
-#define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
- ((DIRECTION) == I2C_Direction_Receiver))
-/**
- * @}
- */
-
-/** @defgroup I2C_acknowledged_address
- * @{
- */
-
-#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
-#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
-#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
- ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
-/**
- * @}
- */
-
-/** @defgroup I2C_registers
- * @{
- */
-
-#define I2C_Register_CR1 ((uint8_t)0x00)
-#define I2C_Register_CR2 ((uint8_t)0x04)
-#define I2C_Register_OAR1 ((uint8_t)0x08)
-#define I2C_Register_OAR2 ((uint8_t)0x0C)
-#define I2C_Register_DR ((uint8_t)0x10)
-#define I2C_Register_SR1 ((uint8_t)0x14)
-#define I2C_Register_SR2 ((uint8_t)0x18)
-#define I2C_Register_CCR ((uint8_t)0x1C)
-#define I2C_Register_TRISE ((uint8_t)0x20)
-#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
- ((REGISTER) == I2C_Register_CR2) || \
- ((REGISTER) == I2C_Register_OAR1) || \
- ((REGISTER) == I2C_Register_OAR2) || \
- ((REGISTER) == I2C_Register_DR) || \
- ((REGISTER) == I2C_Register_SR1) || \
- ((REGISTER) == I2C_Register_SR2) || \
- ((REGISTER) == I2C_Register_CCR) || \
- ((REGISTER) == I2C_Register_TRISE))
-/**
- * @}
- */
-
-/** @defgroup I2C_SMBus_alert_pin_level
- * @{
- */
-
-#define I2C_SMBusAlert_Low ((uint16_t)0x2000)
-#define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
-#define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
- ((ALERT) == I2C_SMBusAlert_High))
-/**
- * @}
- */
-
-/** @defgroup I2C_PEC_position
- * @{
- */
-
-#define I2C_PECPosition_Next ((uint16_t)0x0800)
-#define I2C_PECPosition_Current ((uint16_t)0xF7FF)
-#define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
- ((POSITION) == I2C_PECPosition_Current))
-/**
- * @}
- */
-
-/** @defgroup I2C_interrupts_definition
- * @{
- */
-
-#define I2C_IT_BUF ((uint16_t)0x0400)
-#define I2C_IT_EVT ((uint16_t)0x0200)
-#define I2C_IT_ERR ((uint16_t)0x0100)
-#define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
-/**
- * @}
- */
-
-/** @defgroup I2C_interrupts_definition
- * @{
- */
-
-#define I2C_IT_SMBALERT ((uint32_t)0x01008000)
-#define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
-#define I2C_IT_PECERR ((uint32_t)0x01001000)
-#define I2C_IT_OVR ((uint32_t)0x01000800)
-#define I2C_IT_AF ((uint32_t)0x01000400)
-#define I2C_IT_ARLO ((uint32_t)0x01000200)
-#define I2C_IT_BERR ((uint32_t)0x01000100)
-#define I2C_IT_TXE ((uint32_t)0x06000080)
-#define I2C_IT_RXNE ((uint32_t)0x06000040)
-#define I2C_IT_STOPF ((uint32_t)0x02000010)
-#define I2C_IT_ADD10 ((uint32_t)0x02000008)
-#define I2C_IT_BTF ((uint32_t)0x02000004)
-#define I2C_IT_ADDR ((uint32_t)0x02000002)
-#define I2C_IT_SB ((uint32_t)0x02000001)
-
-#define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
-
-#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
- ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
- ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
- ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
- ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
- ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
- ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
-/**
- * @}
- */
-
-/** @defgroup I2C_flags_definition
- * @{
- */
-
-/**
- * @brief SR2 register flags
- */
-
-#define I2C_FLAG_DUALF ((uint32_t)0x00800000)
-#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
-#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
-#define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
-#define I2C_FLAG_TRA ((uint32_t)0x00040000)
-#define I2C_FLAG_BUSY ((uint32_t)0x00020000)
-#define I2C_FLAG_MSL ((uint32_t)0x00010000)
-
-/**
- * @brief SR1 register flags
- */
-
-#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
-#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
-#define I2C_FLAG_PECERR ((uint32_t)0x10001000)
-#define I2C_FLAG_OVR ((uint32_t)0x10000800)
-#define I2C_FLAG_AF ((uint32_t)0x10000400)
-#define I2C_FLAG_ARLO ((uint32_t)0x10000200)
-#define I2C_FLAG_BERR ((uint32_t)0x10000100)
-#define I2C_FLAG_TXE ((uint32_t)0x10000080)
-#define I2C_FLAG_RXNE ((uint32_t)0x10000040)
-#define I2C_FLAG_STOPF ((uint32_t)0x10000010)
-#define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
-#define I2C_FLAG_BTF ((uint32_t)0x10000004)
-#define I2C_FLAG_ADDR ((uint32_t)0x10000002)
-#define I2C_FLAG_SB ((uint32_t)0x10000001)
-
-#define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
-
-#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
- ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
- ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
- ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
- ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
- ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
- ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
- ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
- ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
- ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
- ((FLAG) == I2C_FLAG_SB))
-/**
- * @}
- */
-
-/** @defgroup I2C_Events
- * @{
- */
-
-/**
- * @brief EV1
- */
-
-#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
-#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
-#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
-#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
-#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
-
-/**
- * @brief EV2
- */
-
-#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
-
-/**
- * @brief EV3
- */
-
-#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
-
-/**
- * @brief EV4
- */
-
-#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
-
-/**
- * @brief EV5
- */
-
-#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
-
-/**
- * @brief EV6
- */
-
-#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
-#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
-
-/**
- * @brief EV7
- */
-
-#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
-
-/**
- * @brief EV8
- */
-
-#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
-
-/**
- * @brief EV8_2
- */
-
-#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
-
-/**
- * @brief EV9
- */
-
-#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
-
-/**
- * @brief EV3_2
- */
-
-#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
-
-#define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
- ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
- ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
- ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
- ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
- ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
- ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
- ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
- ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
- ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
- ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
- ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
- ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
- ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
- ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
- ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
- ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
- ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
- ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
- ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
-/**
- * @}
- */
-
-/** @defgroup I2C_own_address1
- * @{
- */
-
-#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
-/**
- * @}
- */
-
-/** @defgroup I2C_clock_speed
- * @{
- */
-
-#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup I2C_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup I2C_Exported_Functions
- * @{
- */
-
-void I2C_DeInit(I2C_TypeDef* I2Cx);
-void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
-void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
-void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
-void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
-void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
-uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
-void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
-uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
-void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
-void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
-void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
-uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
-void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
-void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
-uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
-ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
-FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
-void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
-ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
-void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32F10x_I2C_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_iwdg.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_iwdg.h deleted file mode 100644 index d32fb0aae..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_iwdg.h +++ /dev/null @@ -1,139 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_iwdg.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the IWDG
- * firmware library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_IWDG_H
-#define __STM32F10x_IWDG_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup IWDG
- * @{
- */
-
-/** @defgroup IWDG_Exported_Types
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup IWDG_Exported_Constants
- * @{
- */
-
-/** @defgroup IWDG_WriteAccess
- * @{
- */
-
-#define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
-#define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
-#define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
- ((ACCESS) == IWDG_WriteAccess_Disable))
-/**
- * @}
- */
-
-/** @defgroup IWDG_prescaler
- * @{
- */
-
-#define IWDG_Prescaler_4 ((uint8_t)0x00)
-#define IWDG_Prescaler_8 ((uint8_t)0x01)
-#define IWDG_Prescaler_16 ((uint8_t)0x02)
-#define IWDG_Prescaler_32 ((uint8_t)0x03)
-#define IWDG_Prescaler_64 ((uint8_t)0x04)
-#define IWDG_Prescaler_128 ((uint8_t)0x05)
-#define IWDG_Prescaler_256 ((uint8_t)0x06)
-#define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
- ((PRESCALER) == IWDG_Prescaler_8) || \
- ((PRESCALER) == IWDG_Prescaler_16) || \
- ((PRESCALER) == IWDG_Prescaler_32) || \
- ((PRESCALER) == IWDG_Prescaler_64) || \
- ((PRESCALER) == IWDG_Prescaler_128)|| \
- ((PRESCALER) == IWDG_Prescaler_256))
-/**
- * @}
- */
-
-/** @defgroup IWDG_Flag
- * @{
- */
-
-#define IWDG_FLAG_PVU ((uint16_t)0x0001)
-#define IWDG_FLAG_RVU ((uint16_t)0x0002)
-#define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
-#define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup IWDG_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup IWDG_Exported_Functions
- * @{
- */
-
-void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
-void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
-void IWDG_SetReload(uint16_t Reload);
-void IWDG_ReloadCounter(void);
-void IWDG_Enable(void);
-FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_IWDG_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_pwr.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_pwr.h deleted file mode 100644 index e435ee3a6..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_pwr.h +++ /dev/null @@ -1,155 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_pwr.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the PWR firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_PWR_H
-#define __STM32F10x_PWR_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup PWR
- * @{
- */
-
-/** @defgroup PWR_Exported_Types
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup PWR_Exported_Constants
- * @{
- */
-
-/** @defgroup PVD_detection_level
- * @{
- */
-
-#define PWR_PVDLevel_2V2 ((uint32_t)0x00000000)
-#define PWR_PVDLevel_2V3 ((uint32_t)0x00000020)
-#define PWR_PVDLevel_2V4 ((uint32_t)0x00000040)
-#define PWR_PVDLevel_2V5 ((uint32_t)0x00000060)
-#define PWR_PVDLevel_2V6 ((uint32_t)0x00000080)
-#define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0)
-#define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0)
-#define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0)
-#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \
- ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \
- ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \
- ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9))
-/**
- * @}
- */
-
-/** @defgroup Regulator_state_is_STOP_mode
- * @{
- */
-
-#define PWR_Regulator_ON ((uint32_t)0x00000000)
-#define PWR_Regulator_LowPower ((uint32_t)0x00000001)
-#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
- ((REGULATOR) == PWR_Regulator_LowPower))
-/**
- * @}
- */
-
-/** @defgroup STOP_mode_entry
- * @{
- */
-
-#define PWR_STOPEntry_WFI ((uint8_t)0x01)
-#define PWR_STOPEntry_WFE ((uint8_t)0x02)
-#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
-
-/**
- * @}
- */
-
-/** @defgroup PWR_Flag
- * @{
- */
-
-#define PWR_FLAG_WU ((uint32_t)0x00000001)
-#define PWR_FLAG_SB ((uint32_t)0x00000002)
-#define PWR_FLAG_PVDO ((uint32_t)0x00000004)
-#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
- ((FLAG) == PWR_FLAG_PVDO))
-
-#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup PWR_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup PWR_Exported_Functions
- * @{
- */
-
-void PWR_DeInit(void);
-void PWR_BackupAccessCmd(FunctionalState NewState);
-void PWR_PVDCmd(FunctionalState NewState);
-void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
-void PWR_WakeUpPinCmd(FunctionalState NewState);
-void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
-void PWR_EnterSTANDBYMode(void);
-FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
-void PWR_ClearFlag(uint32_t PWR_FLAG);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_PWR_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_rcc.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_rcc.h deleted file mode 100644 index c2a0339ca..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_rcc.h +++ /dev/null @@ -1,700 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_rcc.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the RCC firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_RCC_H
-#define __STM32F10x_RCC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup RCC
- * @{
- */
-
-/** @defgroup RCC_Exported_Types
- * @{
- */
-
-typedef struct
-{
- uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */
- uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */
- uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */
- uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */
- uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */
-}RCC_ClocksTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup RCC_Exported_Constants
- * @{
- */
-
-/** @defgroup HSE_configuration
- * @{
- */
-
-#define RCC_HSE_OFF ((uint32_t)0x00000000)
-#define RCC_HSE_ON ((uint32_t)0x00010000)
-#define RCC_HSE_Bypass ((uint32_t)0x00040000)
-#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
- ((HSE) == RCC_HSE_Bypass))
-
-/**
- * @}
- */
-
-/** @defgroup PLL_entry_clock_source
- * @{
- */
-
-#define RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000)
-
-#ifndef STM32F10X_CL
- #define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000)
- #define RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000)
- #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
- ((SOURCE) == RCC_PLLSource_HSE_Div1) || \
- ((SOURCE) == RCC_PLLSource_HSE_Div2))
-#else
- #define RCC_PLLSource_PREDIV1 ((uint32_t)0x00010000)
-#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
- ((SOURCE) == RCC_PLLSource_PREDIV1))
-#endif /* STM32F10X_CL */
-
-/**
- * @}
- */
-
-/** @defgroup PLL_multiplication_factor
- * @{
- */
-#ifndef STM32F10X_CL
- #define RCC_PLLMul_2 ((uint32_t)0x00000000)
- #define RCC_PLLMul_3 ((uint32_t)0x00040000)
- #define RCC_PLLMul_4 ((uint32_t)0x00080000)
- #define RCC_PLLMul_5 ((uint32_t)0x000C0000)
- #define RCC_PLLMul_6 ((uint32_t)0x00100000)
- #define RCC_PLLMul_7 ((uint32_t)0x00140000)
- #define RCC_PLLMul_8 ((uint32_t)0x00180000)
- #define RCC_PLLMul_9 ((uint32_t)0x001C0000)
- #define RCC_PLLMul_10 ((uint32_t)0x00200000)
- #define RCC_PLLMul_11 ((uint32_t)0x00240000)
- #define RCC_PLLMul_12 ((uint32_t)0x00280000)
- #define RCC_PLLMul_13 ((uint32_t)0x002C0000)
- #define RCC_PLLMul_14 ((uint32_t)0x00300000)
- #define RCC_PLLMul_15 ((uint32_t)0x00340000)
- #define RCC_PLLMul_16 ((uint32_t)0x00380000)
- #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \
- ((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
- ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
- ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
- ((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \
- ((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \
- ((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \
- ((MUL) == RCC_PLLMul_16))
-
-#else
- #define RCC_PLLMul_4 ((uint32_t)0x00080000)
- #define RCC_PLLMul_5 ((uint32_t)0x000C0000)
- #define RCC_PLLMul_6 ((uint32_t)0x00100000)
- #define RCC_PLLMul_7 ((uint32_t)0x00140000)
- #define RCC_PLLMul_8 ((uint32_t)0x00180000)
- #define RCC_PLLMul_9 ((uint32_t)0x001C0000)
- #define RCC_PLLMul_6_5 ((uint32_t)0x00340000)
-
- #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
- ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
- ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
- ((MUL) == RCC_PLLMul_6_5))
-#endif /* STM32F10X_CL */
-/**
- * @}
- */
-
-#ifdef STM32F10X_CL
-/** @defgroup PREDIV1_division_factor
- * @{
- */
- #define RCC_PREDIV1_Div1 ((uint32_t)0x00000000)
- #define RCC_PREDIV1_Div2 ((uint32_t)0x00000001)
- #define RCC_PREDIV1_Div3 ((uint32_t)0x00000002)
- #define RCC_PREDIV1_Div4 ((uint32_t)0x00000003)
- #define RCC_PREDIV1_Div5 ((uint32_t)0x00000004)
- #define RCC_PREDIV1_Div6 ((uint32_t)0x00000005)
- #define RCC_PREDIV1_Div7 ((uint32_t)0x00000006)
- #define RCC_PREDIV1_Div8 ((uint32_t)0x00000007)
- #define RCC_PREDIV1_Div9 ((uint32_t)0x00000008)
- #define RCC_PREDIV1_Div10 ((uint32_t)0x00000009)
- #define RCC_PREDIV1_Div11 ((uint32_t)0x0000000A)
- #define RCC_PREDIV1_Div12 ((uint32_t)0x0000000B)
- #define RCC_PREDIV1_Div13 ((uint32_t)0x0000000C)
- #define RCC_PREDIV1_Div14 ((uint32_t)0x0000000D)
- #define RCC_PREDIV1_Div15 ((uint32_t)0x0000000E)
- #define RCC_PREDIV1_Div16 ((uint32_t)0x0000000F)
-
- #define IS_RCC_PREDIV1(PREDIV1) (((PREDIV1) == RCC_PREDIV1_Div1) || ((PREDIV1) == RCC_PREDIV1_Div2) || \
- ((PREDIV1) == RCC_PREDIV1_Div3) || ((PREDIV1) == RCC_PREDIV1_Div4) || \
- ((PREDIV1) == RCC_PREDIV1_Div5) || ((PREDIV1) == RCC_PREDIV1_Div6) || \
- ((PREDIV1) == RCC_PREDIV1_Div7) || ((PREDIV1) == RCC_PREDIV1_Div8) || \
- ((PREDIV1) == RCC_PREDIV1_Div9) || ((PREDIV1) == RCC_PREDIV1_Div10) || \
- ((PREDIV1) == RCC_PREDIV1_Div11) || ((PREDIV1) == RCC_PREDIV1_Div12) || \
- ((PREDIV1) == RCC_PREDIV1_Div13) || ((PREDIV1) == RCC_PREDIV1_Div14) || \
- ((PREDIV1) == RCC_PREDIV1_Div15) || ((PREDIV1) == RCC_PREDIV1_Div16))
-/**
- * @}
- */
-
-
-/** @defgroup PREDIV1_clock_source
- * @{
- */
-/* PREDIV1 clock source (only for STM32 connectivity line devices) */
- #define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000)
- #define RCC_PREDIV1_Source_PLL2 ((uint32_t)0x00010000)
-
- #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE) || \
- ((SOURCE) == RCC_PREDIV1_Source_PLL2))
-/**
- * @}
- */
-
-
-/** @defgroup PREDIV2_division_factor
- * @{
- */
-
- #define RCC_PREDIV2_Div1 ((uint32_t)0x00000000)
- #define RCC_PREDIV2_Div2 ((uint32_t)0x00000010)
- #define RCC_PREDIV2_Div3 ((uint32_t)0x00000020)
- #define RCC_PREDIV2_Div4 ((uint32_t)0x00000030)
- #define RCC_PREDIV2_Div5 ((uint32_t)0x00000040)
- #define RCC_PREDIV2_Div6 ((uint32_t)0x00000050)
- #define RCC_PREDIV2_Div7 ((uint32_t)0x00000060)
- #define RCC_PREDIV2_Div8 ((uint32_t)0x00000070)
- #define RCC_PREDIV2_Div9 ((uint32_t)0x00000080)
- #define RCC_PREDIV2_Div10 ((uint32_t)0x00000090)
- #define RCC_PREDIV2_Div11 ((uint32_t)0x000000A0)
- #define RCC_PREDIV2_Div12 ((uint32_t)0x000000B0)
- #define RCC_PREDIV2_Div13 ((uint32_t)0x000000C0)
- #define RCC_PREDIV2_Div14 ((uint32_t)0x000000D0)
- #define RCC_PREDIV2_Div15 ((uint32_t)0x000000E0)
- #define RCC_PREDIV2_Div16 ((uint32_t)0x000000F0)
-
- #define IS_RCC_PREDIV2(PREDIV2) (((PREDIV2) == RCC_PREDIV2_Div1) || ((PREDIV2) == RCC_PREDIV2_Div2) || \
- ((PREDIV2) == RCC_PREDIV2_Div3) || ((PREDIV2) == RCC_PREDIV2_Div4) || \
- ((PREDIV2) == RCC_PREDIV2_Div5) || ((PREDIV2) == RCC_PREDIV2_Div6) || \
- ((PREDIV2) == RCC_PREDIV2_Div7) || ((PREDIV2) == RCC_PREDIV2_Div8) || \
- ((PREDIV2) == RCC_PREDIV2_Div9) || ((PREDIV2) == RCC_PREDIV2_Div10) || \
- ((PREDIV2) == RCC_PREDIV2_Div11) || ((PREDIV2) == RCC_PREDIV2_Div12) || \
- ((PREDIV2) == RCC_PREDIV2_Div13) || ((PREDIV2) == RCC_PREDIV2_Div14) || \
- ((PREDIV2) == RCC_PREDIV2_Div15) || ((PREDIV2) == RCC_PREDIV2_Div16))
-/**
- * @}
- */
-
-
-/** @defgroup PLL2_multiplication_factor
- * @{
- */
-
- #define RCC_PLL2Mul_8 ((uint32_t)0x00000600)
- #define RCC_PLL2Mul_9 ((uint32_t)0x00000700)
- #define RCC_PLL2Mul_10 ((uint32_t)0x00000800)
- #define RCC_PLL2Mul_11 ((uint32_t)0x00000900)
- #define RCC_PLL2Mul_12 ((uint32_t)0x00000A00)
- #define RCC_PLL2Mul_13 ((uint32_t)0x00000B00)
- #define RCC_PLL2Mul_14 ((uint32_t)0x00000C00)
- #define RCC_PLL2Mul_16 ((uint32_t)0x00000E00)
- #define RCC_PLL2Mul_20 ((uint32_t)0x00000F00)
-
- #define IS_RCC_PLL2_MUL(MUL) (((MUL) == RCC_PLL2Mul_8) || ((MUL) == RCC_PLL2Mul_9) || \
- ((MUL) == RCC_PLL2Mul_10) || ((MUL) == RCC_PLL2Mul_11) || \
- ((MUL) == RCC_PLL2Mul_12) || ((MUL) == RCC_PLL2Mul_13) || \
- ((MUL) == RCC_PLL2Mul_14) || ((MUL) == RCC_PLL2Mul_16) || \
- ((MUL) == RCC_PLL2Mul_20))
-/**
- * @}
- */
-
-
-/** @defgroup PLL3_multiplication_factor
- * @{
- */
-
- #define RCC_PLL3Mul_8 ((uint32_t)0x00006000)
- #define RCC_PLL3Mul_9 ((uint32_t)0x00007000)
- #define RCC_PLL3Mul_10 ((uint32_t)0x00008000)
- #define RCC_PLL3Mul_11 ((uint32_t)0x00009000)
- #define RCC_PLL3Mul_12 ((uint32_t)0x0000A000)
- #define RCC_PLL3Mul_13 ((uint32_t)0x0000B000)
- #define RCC_PLL3Mul_14 ((uint32_t)0x0000C000)
- #define RCC_PLL3Mul_16 ((uint32_t)0x0000E000)
- #define RCC_PLL3Mul_20 ((uint32_t)0x0000F000)
-
- #define IS_RCC_PLL3_MUL(MUL) (((MUL) == RCC_PLL3Mul_8) || ((MUL) == RCC_PLL3Mul_9) || \
- ((MUL) == RCC_PLL3Mul_10) || ((MUL) == RCC_PLL3Mul_11) || \
- ((MUL) == RCC_PLL3Mul_12) || ((MUL) == RCC_PLL3Mul_13) || \
- ((MUL) == RCC_PLL3Mul_14) || ((MUL) == RCC_PLL3Mul_16) || \
- ((MUL) == RCC_PLL3Mul_20))
-/**
- * @}
- */
-
-#endif /* STM32F10X_CL */
-
-
-/** @defgroup System_clock_source
- * @{
- */
-
-#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000)
-#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001)
-#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)
-#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \
- ((SOURCE) == RCC_SYSCLKSource_HSE) || \
- ((SOURCE) == RCC_SYSCLKSource_PLLCLK))
-/**
- * @}
- */
-
-/** @defgroup AHB_clock_source
- * @{
- */
-
-#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000)
-#define RCC_SYSCLK_Div2 ((uint32_t)0x00000080)
-#define RCC_SYSCLK_Div4 ((uint32_t)0x00000090)
-#define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)
-#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)
-#define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)
-#define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0)
-#define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)
-#define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)
-#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
- ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
- ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
- ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
- ((HCLK) == RCC_SYSCLK_Div512))
-/**
- * @}
- */
-
-/** @defgroup APB1_APB2_clock_source
- * @{
- */
-
-#define RCC_HCLK_Div1 ((uint32_t)0x00000000)
-#define RCC_HCLK_Div2 ((uint32_t)0x00000400)
-#define RCC_HCLK_Div4 ((uint32_t)0x00000500)
-#define RCC_HCLK_Div8 ((uint32_t)0x00000600)
-#define RCC_HCLK_Div16 ((uint32_t)0x00000700)
-#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \
- ((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \
- ((PCLK) == RCC_HCLK_Div16))
-/**
- * @}
- */
-
-/** @defgroup RCC_Interrupt_source
- * @{
- */
-
-#define RCC_IT_LSIRDY ((uint8_t)0x01)
-#define RCC_IT_LSERDY ((uint8_t)0x02)
-#define RCC_IT_HSIRDY ((uint8_t)0x04)
-#define RCC_IT_HSERDY ((uint8_t)0x08)
-#define RCC_IT_PLLRDY ((uint8_t)0x10)
-#define RCC_IT_CSS ((uint8_t)0x80)
-
-#ifndef STM32F10X_CL
- #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00))
- #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
- ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
- ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS))
- #define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00))
-#else
- #define RCC_IT_PLL2RDY ((uint8_t)0x20)
- #define RCC_IT_PLL3RDY ((uint8_t)0x40)
- #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00))
- #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
- ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
- ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \
- ((IT) == RCC_IT_PLL2RDY) || ((IT) == RCC_IT_PLL3RDY))
- #define IS_RCC_CLEAR_IT(IT) ((IT) != 0x00)
-#endif /* STM32F10X_CL */
-
-
-/**
- * @}
- */
-
-#ifndef STM32F10X_CL
-/** @defgroup USB_Device_clock_source
- * @{
- */
-
- #define RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00)
- #define RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01)
-
- #define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \
- ((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1))
-#else
-/** @defgroup USB_OTG_FS_clock_source
- * @{
- */
- #define RCC_OTGFSCLKSource_PLLVCO_Div3 ((uint8_t)0x00)
- #define RCC_OTGFSCLKSource_PLLVCO_Div2 ((uint8_t)0x01)
-
- #define IS_RCC_OTGFSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div3) || \
- ((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div2))
-#endif /* STM32F10X_CL */
-/**
- * @}
- */
-
-#ifdef STM32F10X_CL
-/** @defgroup I2S2_clock_source
- * @{
- */
- #define RCC_I2S2CLKSource_SYSCLK ((uint8_t)0x00)
- #define RCC_I2S2CLKSource_PLL3_VCO ((uint8_t)0x01)
-
- #define IS_RCC_I2S2CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_SYSCLK) || \
- ((SOURCE) == RCC_I2S2CLKSource_PLL3_VCO))
-/**
- * @}
- */
-
-/** @defgroup I2S3_clock_source
- * @{
- */
- #define RCC_I2S3CLKSource_SYSCLK ((uint8_t)0x00)
- #define RCC_I2S3CLKSource_PLL3_VCO ((uint8_t)0x01)
-
- #define IS_RCC_I2S3CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S3CLKSource_SYSCLK) || \
- ((SOURCE) == RCC_I2S3CLKSource_PLL3_VCO))
-/**
- * @}
- */
-#endif /* STM32F10X_CL */
-
-
-/** @defgroup ADC_clock_source
- * @{
- */
-
-#define RCC_PCLK2_Div2 ((uint32_t)0x00000000)
-#define RCC_PCLK2_Div4 ((uint32_t)0x00004000)
-#define RCC_PCLK2_Div6 ((uint32_t)0x00008000)
-#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000)
-#define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \
- ((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8))
-/**
- * @}
- */
-
-/** @defgroup LSE_configuration
- * @{
- */
-
-#define RCC_LSE_OFF ((uint8_t)0x00)
-#define RCC_LSE_ON ((uint8_t)0x01)
-#define RCC_LSE_Bypass ((uint8_t)0x04)
-#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \
- ((LSE) == RCC_LSE_Bypass))
-/**
- * @}
- */
-
-/** @defgroup RTC_clock_source
- * @{
- */
-
-#define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100)
-#define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200)
-#define RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300)
-#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \
- ((SOURCE) == RCC_RTCCLKSource_LSI) || \
- ((SOURCE) == RCC_RTCCLKSource_HSE_Div128))
-/**
- * @}
- */
-
-/** @defgroup AHB_peripheral
- * @{
- */
-
-#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)
-#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)
-#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)
-#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)
-#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040)
-
-#ifndef STM32F10X_CL
- #define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)
- #define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)
- #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00))
-#else
- #define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000)
- #define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000)
- #define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000)
- #define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000)
-
- #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFE2FA8) == 0x00) && ((PERIPH) != 0x00))
- #define IS_RCC_AHB_PERIPH_RESET(PERIPH) ((((PERIPH) & 0xFFFFAFFF) == 0x00) && ((PERIPH) != 0x00))
-#endif /* STM32F10X_CL */
-/**
- * @}
- */
-
-/** @defgroup APB2_peripheral
- * @{
- */
-
-#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)
-#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
-#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)
-#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)
-#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)
-#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)
-#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)
-#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)
-#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)
-#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)
-#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)
-#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
-#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)
-#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)
-#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)
-
-#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFFF0002) == 0x00) && ((PERIPH) != 0x00))
-/**
- * @}
- */
-
-/** @defgroup APB1_peripheral
- * @{
- */
-
-#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
-#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
-#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
-#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
-#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
-#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
-#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
-#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
-#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
-#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
-#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
-#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
-#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
-#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
-#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
-#define RCC_APB1Periph_USB ((uint32_t)0x00800000)
-#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
-#define RCC_APB1Periph_BKP ((uint32_t)0x08000000)
-#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
-#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
-#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
-#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0xC10137C0) == 0x00) && ((PERIPH) != 0x00))
-
-/**
- * @}
- */
-
-/** @defgroup Clock_source_to_output_on_MCO_pin
- * @{
- */
-
-#define RCC_MCO_NoClock ((uint8_t)0x00)
-#define RCC_MCO_SYSCLK ((uint8_t)0x04)
-#define RCC_MCO_HSI ((uint8_t)0x05)
-#define RCC_MCO_HSE ((uint8_t)0x06)
-#define RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07)
-
-#ifndef STM32F10X_CL
- #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
- ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
- ((MCO) == RCC_MCO_PLLCLK_Div2))
-#else
- #define RCC_MCO_PLL2CLK ((uint8_t)0x08)
- #define RCC_MCO_PLL3CLK_Div2 ((uint8_t)0x09)
- #define RCC_MCO_XT1 ((uint8_t)0x0A)
- #define RCC_MCO_PLL3CLK ((uint8_t)0x0B)
-
- #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
- ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
- ((MCO) == RCC_MCO_PLLCLK_Div2) || ((MCO) == RCC_MCO_PLL2CLK) || \
- ((MCO) == RCC_MCO_PLL3CLK_Div2) || ((MCO) == RCC_MCO_XT1) || \
- ((MCO) == RCC_MCO_PLL3CLK))
-#endif /* STM32F10X_CL */
-
-/**
- * @}
- */
-
-/** @defgroup RCC_Flag
- * @{
- */
-
-#define RCC_FLAG_HSIRDY ((uint8_t)0x21)
-#define RCC_FLAG_HSERDY ((uint8_t)0x31)
-#define RCC_FLAG_PLLRDY ((uint8_t)0x39)
-#define RCC_FLAG_LSERDY ((uint8_t)0x41)
-#define RCC_FLAG_LSIRDY ((uint8_t)0x61)
-#define RCC_FLAG_PINRST ((uint8_t)0x7A)
-#define RCC_FLAG_PORRST ((uint8_t)0x7B)
-#define RCC_FLAG_SFTRST ((uint8_t)0x7C)
-#define RCC_FLAG_IWDGRST ((uint8_t)0x7D)
-#define RCC_FLAG_WWDGRST ((uint8_t)0x7E)
-#define RCC_FLAG_LPWRRST ((uint8_t)0x7F)
-
-#ifndef STM32F10X_CL
- #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
- ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
- ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
- ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
- ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
- ((FLAG) == RCC_FLAG_LPWRRST))
-#else
- #define RCC_FLAG_PLL2RDY ((uint8_t)0x3B)
- #define RCC_FLAG_PLL3RDY ((uint8_t)0x3D)
- #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
- ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
- ((FLAG) == RCC_FLAG_PLL2RDY) || ((FLAG) == RCC_FLAG_PLL3RDY) || \
- ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
- ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
- ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
- ((FLAG) == RCC_FLAG_LPWRRST))
-#endif /* STM32F10X_CL */
-
-#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup RCC_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup RCC_Exported_Functions
- * @{
- */
-
-void RCC_DeInit(void);
-void RCC_HSEConfig(uint32_t RCC_HSE);
-ErrorStatus RCC_WaitForHSEStartUp(void);
-void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
-void RCC_HSICmd(FunctionalState NewState);
-void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul);
-void RCC_PLLCmd(FunctionalState NewState);
-
-#ifdef STM32F10X_CL
- void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div);
- void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div);
- void RCC_PLL2Config(uint32_t RCC_PLL2Mul);
- void RCC_PLL2Cmd(FunctionalState NewState);
- void RCC_PLL3Config(uint32_t RCC_PLL3Mul);
- void RCC_PLL3Cmd(FunctionalState NewState);
-#endif /* STM32F10X_CL */
-
-void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
-uint8_t RCC_GetSYSCLKSource(void);
-void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
-void RCC_PCLK1Config(uint32_t RCC_HCLK);
-void RCC_PCLK2Config(uint32_t RCC_HCLK);
-void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
-
-#ifndef STM32F10X_CL
- void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource);
-#else
- void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource);
-#endif /* STM32F10X_CL */
-
-void RCC_ADCCLKConfig(uint32_t RCC_PCLK2);
-
-#ifdef STM32F10X_CL
- void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource);
- void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource);
-#endif /* STM32F10X_CL */
-
-void RCC_LSEConfig(uint8_t RCC_LSE);
-void RCC_LSICmd(FunctionalState NewState);
-void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
-void RCC_RTCCLKCmd(FunctionalState NewState);
-void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
-void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
-void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
-void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
-
-#ifdef STM32F10X_CL
-void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
-#endif /* STM32F10X_CL */
-
-void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
-void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
-void RCC_BackupResetCmd(FunctionalState NewState);
-void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
-void RCC_MCOConfig(uint8_t RCC_MCO);
-FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
-void RCC_ClearFlag(void);
-ITStatus RCC_GetITStatus(uint8_t RCC_IT);
-void RCC_ClearITPendingBit(uint8_t RCC_IT);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_RCC_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_rtc.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_rtc.h deleted file mode 100644 index 8e40d0291..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_rtc.h +++ /dev/null @@ -1,134 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_rtc.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the RTC firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_RTC_H
-#define __STM32F10x_RTC_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup RTC
- * @{
- */
-
-/** @defgroup RTC_Exported_Types
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup RTC_Exported_Constants
- * @{
- */
-
-/** @defgroup RTC_interrupts_define
- * @{
- */
-
-#define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */
-#define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */
-#define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */
-#define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00))
-#define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \
- ((IT) == RTC_IT_SEC))
-/**
- * @}
- */
-
-/** @defgroup RTC_interrupts_flags
- * @{
- */
-
-#define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */
-#define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */
-#define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */
-#define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */
-#define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */
-#define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00))
-#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \
- ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \
- ((FLAG) == RTC_FLAG_SEC))
-#define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF)
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup RTC_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup RTC_Exported_Functions
- * @{
- */
-
-void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState);
-void RTC_EnterConfigMode(void);
-void RTC_ExitConfigMode(void);
-uint32_t RTC_GetCounter(void);
-void RTC_SetCounter(uint32_t CounterValue);
-void RTC_SetPrescaler(uint32_t PrescalerValue);
-void RTC_SetAlarm(uint32_t AlarmValue);
-uint32_t RTC_GetDivider(void);
-void RTC_WaitForLastTask(void);
-void RTC_WaitForSynchro(void);
-FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG);
-void RTC_ClearFlag(uint16_t RTC_FLAG);
-ITStatus RTC_GetITStatus(uint16_t RTC_IT);
-void RTC_ClearITPendingBit(uint16_t RTC_IT);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_RTC_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_sdio.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_sdio.h deleted file mode 100644 index 4c7a04a43..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_sdio.h +++ /dev/null @@ -1,530 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_sdio.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the SDIO firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_SDIO_H
-#define __STM32F10x_SDIO_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup SDIO
- * @{
- */
-
-/** @defgroup SDIO_Exported_Types
- * @{
- */
-
-typedef struct
-{
- uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
- This parameter can be a value of @ref SDIO_Clock_Edge */
-
- uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
- enabled or disabled.
- This parameter can be a value of @ref SDIO_Clock_Bypass */
-
- uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
- disabled when the bus is idle.
- This parameter can be a value of @ref SDIO_Clock_Power_Save */
-
- uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width.
- This parameter can be a value of @ref SDIO_Bus_Wide */
-
- uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
- This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
-
- uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
- This parameter can be a value between 0x00 and 0xFF. */
-
-} SDIO_InitTypeDef;
-
-typedef struct
-{
- uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent
- to a card as part of a command message. If a command
- contains an argument, it must be loaded into this register
- before writing the command to the command register */
-
- uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */
-
- uint32_t SDIO_Response; /*!< Specifies the SDIO response type.
- This parameter can be a value of @ref SDIO_Response_Type */
-
- uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled.
- This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
-
- uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
- is enabled or disabled.
- This parameter can be a value of @ref SDIO_CPSM_State */
-} SDIO_CmdInitTypeDef;
-
-typedef struct
-{
- uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
-
- uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */
-
- uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer.
- This parameter can be a value of @ref SDIO_Data_Block_Size */
-
- uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer
- is a read or write.
- This parameter can be a value of @ref SDIO_Transfer_Direction */
-
- uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
- This parameter can be a value of @ref SDIO_Transfer_Type */
-
- uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
- is enabled or disabled.
- This parameter can be a value of @ref SDIO_DPSM_State */
-} SDIO_DataInitTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup SDIO_Exported_Constants
- * @{
- */
-
-/** @defgroup SDIO_Clock_Edge
- * @{
- */
-
-#define SDIO_ClockEdge_Rising ((uint32_t)0x00000000)
-#define SDIO_ClockEdge_Falling ((uint32_t)0x00002000)
-#define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \
- ((EDGE) == SDIO_ClockEdge_Falling))
-/**
- * @}
- */
-
-/** @defgroup SDIO_Clock_Bypass
- * @{
- */
-
-#define SDIO_ClockBypass_Disable ((uint32_t)0x00000000)
-#define SDIO_ClockBypass_Enable ((uint32_t)0x00000400)
-#define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \
- ((BYPASS) == SDIO_ClockBypass_Enable))
-/**
- * @}
- */
-
-/** @defgroup SDIO_Clock_Power_Save
- * @{
- */
-
-#define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000)
-#define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200)
-#define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \
- ((SAVE) == SDIO_ClockPowerSave_Enable))
-/**
- * @}
- */
-
-/** @defgroup SDIO_Bus_Wide
- * @{
- */
-
-#define SDIO_BusWide_1b ((uint32_t)0x00000000)
-#define SDIO_BusWide_4b ((uint32_t)0x00000800)
-#define SDIO_BusWide_8b ((uint32_t)0x00001000)
-#define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \
- ((WIDE) == SDIO_BusWide_8b))
-
-/**
- * @}
- */
-
-/** @defgroup SDIO_Hardware_Flow_Control
- * @{
- */
-
-#define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000)
-#define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000)
-#define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \
- ((CONTROL) == SDIO_HardwareFlowControl_Enable))
-/**
- * @}
- */
-
-/** @defgroup SDIO_Power_State
- * @{
- */
-
-#define SDIO_PowerState_OFF ((uint32_t)0x00000000)
-#define SDIO_PowerState_ON ((uint32_t)0x00000003)
-#define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON))
-/**
- * @}
- */
-
-
-/** @defgroup SDIO_Interrupt_soucres
- * @{
- */
-
-#define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001)
-#define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002)
-#define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004)
-#define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008)
-#define SDIO_IT_TXUNDERR ((uint32_t)0x00000010)
-#define SDIO_IT_RXOVERR ((uint32_t)0x00000020)
-#define SDIO_IT_CMDREND ((uint32_t)0x00000040)
-#define SDIO_IT_CMDSENT ((uint32_t)0x00000080)
-#define SDIO_IT_DATAEND ((uint32_t)0x00000100)
-#define SDIO_IT_STBITERR ((uint32_t)0x00000200)
-#define SDIO_IT_DBCKEND ((uint32_t)0x00000400)
-#define SDIO_IT_CMDACT ((uint32_t)0x00000800)
-#define SDIO_IT_TXACT ((uint32_t)0x00001000)
-#define SDIO_IT_RXACT ((uint32_t)0x00002000)
-#define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000)
-#define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000)
-#define SDIO_IT_TXFIFOF ((uint32_t)0x00010000)
-#define SDIO_IT_RXFIFOF ((uint32_t)0x00020000)
-#define SDIO_IT_TXFIFOE ((uint32_t)0x00040000)
-#define SDIO_IT_RXFIFOE ((uint32_t)0x00080000)
-#define SDIO_IT_TXDAVL ((uint32_t)0x00100000)
-#define SDIO_IT_RXDAVL ((uint32_t)0x00200000)
-#define SDIO_IT_SDIOIT ((uint32_t)0x00400000)
-#define SDIO_IT_CEATAEND ((uint32_t)0x00800000)
-#define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00))
-/**
- * @}
- */
-
-/** @defgroup SDIO_Command_Index
- * @{
- */
-
-#define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40)
-/**
- * @}
- */
-
-/** @defgroup SDIO_Response_Type
- * @{
- */
-
-#define SDIO_Response_No ((uint32_t)0x00000000)
-#define SDIO_Response_Short ((uint32_t)0x00000040)
-#define SDIO_Response_Long ((uint32_t)0x000000C0)
-#define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \
- ((RESPONSE) == SDIO_Response_Short) || \
- ((RESPONSE) == SDIO_Response_Long))
-/**
- * @}
- */
-
-/** @defgroup SDIO_Wait_Interrupt_State
- * @{
- */
-
-#define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */
-#define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */
-#define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */
-#define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \
- ((WAIT) == SDIO_Wait_Pend))
-/**
- * @}
- */
-
-/** @defgroup SDIO_CPSM_State
- * @{
- */
-
-#define SDIO_CPSM_Disable ((uint32_t)0x00000000)
-#define SDIO_CPSM_Enable ((uint32_t)0x00000400)
-#define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable))
-/**
- * @}
- */
-
-/** @defgroup SDIO_Response_Registers
- * @{
- */
-
-#define SDIO_RESP1 ((uint32_t)0x00000000)
-#define SDIO_RESP2 ((uint32_t)0x00000004)
-#define SDIO_RESP3 ((uint32_t)0x00000008)
-#define SDIO_RESP4 ((uint32_t)0x0000000C)
-#define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \
- ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4))
-/**
- * @}
- */
-
-/** @defgroup SDIO_Data_Length
- * @{
- */
-
-#define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF)
-/**
- * @}
- */
-
-/** @defgroup SDIO_Data_Block_Size
- * @{
- */
-
-#define SDIO_DataBlockSize_1b ((uint32_t)0x00000000)
-#define SDIO_DataBlockSize_2b ((uint32_t)0x00000010)
-#define SDIO_DataBlockSize_4b ((uint32_t)0x00000020)
-#define SDIO_DataBlockSize_8b ((uint32_t)0x00000030)
-#define SDIO_DataBlockSize_16b ((uint32_t)0x00000040)
-#define SDIO_DataBlockSize_32b ((uint32_t)0x00000050)
-#define SDIO_DataBlockSize_64b ((uint32_t)0x00000060)
-#define SDIO_DataBlockSize_128b ((uint32_t)0x00000070)
-#define SDIO_DataBlockSize_256b ((uint32_t)0x00000080)
-#define SDIO_DataBlockSize_512b ((uint32_t)0x00000090)
-#define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0)
-#define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0)
-#define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0)
-#define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0)
-#define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0)
-#define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \
- ((SIZE) == SDIO_DataBlockSize_2b) || \
- ((SIZE) == SDIO_DataBlockSize_4b) || \
- ((SIZE) == SDIO_DataBlockSize_8b) || \
- ((SIZE) == SDIO_DataBlockSize_16b) || \
- ((SIZE) == SDIO_DataBlockSize_32b) || \
- ((SIZE) == SDIO_DataBlockSize_64b) || \
- ((SIZE) == SDIO_DataBlockSize_128b) || \
- ((SIZE) == SDIO_DataBlockSize_256b) || \
- ((SIZE) == SDIO_DataBlockSize_512b) || \
- ((SIZE) == SDIO_DataBlockSize_1024b) || \
- ((SIZE) == SDIO_DataBlockSize_2048b) || \
- ((SIZE) == SDIO_DataBlockSize_4096b) || \
- ((SIZE) == SDIO_DataBlockSize_8192b) || \
- ((SIZE) == SDIO_DataBlockSize_16384b))
-/**
- * @}
- */
-
-/** @defgroup SDIO_Transfer_Direction
- * @{
- */
-
-#define SDIO_TransferDir_ToCard ((uint32_t)0x00000000)
-#define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002)
-#define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \
- ((DIR) == SDIO_TransferDir_ToSDIO))
-/**
- * @}
- */
-
-/** @defgroup SDIO_Transfer_Type
- * @{
- */
-
-#define SDIO_TransferMode_Block ((uint32_t)0x00000000)
-#define SDIO_TransferMode_Stream ((uint32_t)0x00000004)
-#define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \
- ((MODE) == SDIO_TransferMode_Block))
-/**
- * @}
- */
-
-/** @defgroup SDIO_DPSM_State
- * @{
- */
-
-#define SDIO_DPSM_Disable ((uint32_t)0x00000000)
-#define SDIO_DPSM_Enable ((uint32_t)0x00000001)
-#define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable))
-/**
- * @}
- */
-
-/** @defgroup SDIO_Flags
- * @{
- */
-
-#define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001)
-#define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002)
-#define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004)
-#define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008)
-#define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010)
-#define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020)
-#define SDIO_FLAG_CMDREND ((uint32_t)0x00000040)
-#define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080)
-#define SDIO_FLAG_DATAEND ((uint32_t)0x00000100)
-#define SDIO_FLAG_STBITERR ((uint32_t)0x00000200)
-#define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400)
-#define SDIO_FLAG_CMDACT ((uint32_t)0x00000800)
-#define SDIO_FLAG_TXACT ((uint32_t)0x00001000)
-#define SDIO_FLAG_RXACT ((uint32_t)0x00002000)
-#define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000)
-#define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000)
-#define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000)
-#define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000)
-#define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000)
-#define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000)
-#define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000)
-#define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000)
-#define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000)
-#define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000)
-#define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \
- ((FLAG) == SDIO_FLAG_DCRCFAIL) || \
- ((FLAG) == SDIO_FLAG_CTIMEOUT) || \
- ((FLAG) == SDIO_FLAG_DTIMEOUT) || \
- ((FLAG) == SDIO_FLAG_TXUNDERR) || \
- ((FLAG) == SDIO_FLAG_RXOVERR) || \
- ((FLAG) == SDIO_FLAG_CMDREND) || \
- ((FLAG) == SDIO_FLAG_CMDSENT) || \
- ((FLAG) == SDIO_FLAG_DATAEND) || \
- ((FLAG) == SDIO_FLAG_STBITERR) || \
- ((FLAG) == SDIO_FLAG_DBCKEND) || \
- ((FLAG) == SDIO_FLAG_CMDACT) || \
- ((FLAG) == SDIO_FLAG_TXACT) || \
- ((FLAG) == SDIO_FLAG_RXACT) || \
- ((FLAG) == SDIO_FLAG_TXFIFOHE) || \
- ((FLAG) == SDIO_FLAG_RXFIFOHF) || \
- ((FLAG) == SDIO_FLAG_TXFIFOF) || \
- ((FLAG) == SDIO_FLAG_RXFIFOF) || \
- ((FLAG) == SDIO_FLAG_TXFIFOE) || \
- ((FLAG) == SDIO_FLAG_RXFIFOE) || \
- ((FLAG) == SDIO_FLAG_TXDAVL) || \
- ((FLAG) == SDIO_FLAG_RXDAVL) || \
- ((FLAG) == SDIO_FLAG_SDIOIT) || \
- ((FLAG) == SDIO_FLAG_CEATAEND))
-
-#define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00))
-
-#define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \
- ((IT) == SDIO_IT_DCRCFAIL) || \
- ((IT) == SDIO_IT_CTIMEOUT) || \
- ((IT) == SDIO_IT_DTIMEOUT) || \
- ((IT) == SDIO_IT_TXUNDERR) || \
- ((IT) == SDIO_IT_RXOVERR) || \
- ((IT) == SDIO_IT_CMDREND) || \
- ((IT) == SDIO_IT_CMDSENT) || \
- ((IT) == SDIO_IT_DATAEND) || \
- ((IT) == SDIO_IT_STBITERR) || \
- ((IT) == SDIO_IT_DBCKEND) || \
- ((IT) == SDIO_IT_CMDACT) || \
- ((IT) == SDIO_IT_TXACT) || \
- ((IT) == SDIO_IT_RXACT) || \
- ((IT) == SDIO_IT_TXFIFOHE) || \
- ((IT) == SDIO_IT_RXFIFOHF) || \
- ((IT) == SDIO_IT_TXFIFOF) || \
- ((IT) == SDIO_IT_RXFIFOF) || \
- ((IT) == SDIO_IT_TXFIFOE) || \
- ((IT) == SDIO_IT_RXFIFOE) || \
- ((IT) == SDIO_IT_TXDAVL) || \
- ((IT) == SDIO_IT_RXDAVL) || \
- ((IT) == SDIO_IT_SDIOIT) || \
- ((IT) == SDIO_IT_CEATAEND))
-
-#define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00))
-
-/**
- * @}
- */
-
-/** @defgroup SDIO_Read_Wait_Mode
- * @{
- */
-
-#define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000000)
-#define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000001)
-#define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \
- ((MODE) == SDIO_ReadWaitMode_DATA2))
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup SDIO_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup SDIO_Exported_Functions
- * @{
- */
-
-void SDIO_DeInit(void);
-void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct);
-void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct);
-void SDIO_ClockCmd(FunctionalState NewState);
-void SDIO_SetPowerState(uint32_t SDIO_PowerState);
-uint32_t SDIO_GetPowerState(void);
-void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState);
-void SDIO_DMACmd(FunctionalState NewState);
-void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
-void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct);
-uint8_t SDIO_GetCommandResponse(void);
-uint32_t SDIO_GetResponse(uint32_t SDIO_RESP);
-void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
-void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
-uint32_t SDIO_GetDataCounter(void);
-uint32_t SDIO_ReadData(void);
-void SDIO_WriteData(uint32_t Data);
-uint32_t SDIO_GetFIFOCount(void);
-void SDIO_StartSDIOReadWait(FunctionalState NewState);
-void SDIO_StopSDIOReadWait(FunctionalState NewState);
-void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
-void SDIO_SetSDIOOperation(FunctionalState NewState);
-void SDIO_SendSDIOSuspendCmd(FunctionalState NewState);
-void SDIO_CommandCompletionCmd(FunctionalState NewState);
-void SDIO_CEATAITCmd(FunctionalState NewState);
-void SDIO_SendCEATACmd(FunctionalState NewState);
-FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG);
-void SDIO_ClearFlag(uint32_t SDIO_FLAG);
-ITStatus SDIO_GetITStatus(uint32_t SDIO_IT);
-void SDIO_ClearITPendingBit(uint32_t SDIO_IT);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_SDIO_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_spi.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_spi.h deleted file mode 100644 index 8c006b8e2..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_spi.h +++ /dev/null @@ -1,490 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_spi.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the SPI firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_SPI_H
-#define __STM32F10x_SPI_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup SPI
- * @{
- */
-
-/** @defgroup SPI_Exported_Types
- * @{
- */
-
-/**
- * @brief SPI Init structure definition
- */
-
-typedef struct
-{
- uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
- This parameter can be any combination of @ref SPI_data_direction */
-
- uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
- This parameter can be any combination of @ref SPI_mode */
-
- uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
- This parameter can be any combination of @ref SPI_data_size */
-
- uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
- This parameter can be any combination of @ref SPI_Clock_Polarity */
-
- uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
- This parameter can be any combination of @ref SPI_Clock_Phase */
-
- uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
- hardware (NSS pin) or by software using the SSI bit.
- This parameter can be any combination of @ref SPI_Slave_Select_management */
-
- uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
- used to configure the transmit and receive SCK clock.
- This parameter can be any combination of @ref SPI_BaudRate_Prescaler.
- @note The communication clock is derived from the master
- clock. The slave clock does not need to be set. */
-
- uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
- This parameter can be any combination of @ref SPI_MSB_LSB_transmission */
-
- uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
-}SPI_InitTypeDef;
-
-/**
- * @brief I2S Init structure definition
- */
-
-typedef struct
-{
-
- uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
- This parameter can be any combination of @ref I2S_Mode */
-
- uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
- This parameter can be any combination of @ref I2S_Standard */
-
- uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
- This parameter can be any combination of @ref I2S_Data_Format */
-
- uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
- This parameter can be any combination of @ref I2S_MCLK_Output */
-
- uint16_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
- This parameter can be any combination of @ref I2S_Audio_Frequency */
-
- uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
- This parameter can be any combination of @ref I2S_Clock_Polarity */
-}I2S_InitTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup SPI_Exported_Constants
- * @{
- */
-
-#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
- ((PERIPH) == SPI2) || \
- ((PERIPH) == SPI3))
-
-#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
- ((PERIPH) == SPI3))
-
-/** @defgroup SPI_data_direction
- * @{
- */
-
-#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
-#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
-#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
-#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
-#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
- ((MODE) == SPI_Direction_2Lines_RxOnly) || \
- ((MODE) == SPI_Direction_1Line_Rx) || \
- ((MODE) == SPI_Direction_1Line_Tx))
-/**
- * @}
- */
-
-/** @defgroup SPI_mode
- * @{
- */
-
-#define SPI_Mode_Master ((uint16_t)0x0104)
-#define SPI_Mode_Slave ((uint16_t)0x0000)
-#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
- ((MODE) == SPI_Mode_Slave))
-/**
- * @}
- */
-
-/** @defgroup SPI_data_size
- * @{
- */
-
-#define SPI_DataSize_16b ((uint16_t)0x0800)
-#define SPI_DataSize_8b ((uint16_t)0x0000)
-#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
- ((DATASIZE) == SPI_DataSize_8b))
-/**
- * @}
- */
-
-/** @defgroup SPI_Clock_Polarity
- * @{
- */
-
-#define SPI_CPOL_Low ((uint16_t)0x0000)
-#define SPI_CPOL_High ((uint16_t)0x0002)
-#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
- ((CPOL) == SPI_CPOL_High))
-/**
- * @}
- */
-
-/** @defgroup SPI_Clock_Phase
- * @{
- */
-
-#define SPI_CPHA_1Edge ((uint16_t)0x0000)
-#define SPI_CPHA_2Edge ((uint16_t)0x0001)
-#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
- ((CPHA) == SPI_CPHA_2Edge))
-/**
- * @}
- */
-
-/** @defgroup SPI_Slave_Select_management
- * @{
- */
-
-#define SPI_NSS_Soft ((uint16_t)0x0200)
-#define SPI_NSS_Hard ((uint16_t)0x0000)
-#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
- ((NSS) == SPI_NSS_Hard))
-/**
- * @}
- */
-
-/** @defgroup SPI_BaudRate_Prescaler
- * @{
- */
-
-#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
-#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
-#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
-#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
-#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
-#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
-#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
-#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
-#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
- ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
- ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
- ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
- ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
- ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
- ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
- ((PRESCALER) == SPI_BaudRatePrescaler_256))
-/**
- * @}
- */
-
-/** @defgroup SPI_MSB_LSB_transmission
- * @{
- */
-
-#define SPI_FirstBit_MSB ((uint16_t)0x0000)
-#define SPI_FirstBit_LSB ((uint16_t)0x0080)
-#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
- ((BIT) == SPI_FirstBit_LSB))
-/**
- * @}
- */
-
-/** @defgroup I2S_Mode
- * @{
- */
-
-#define I2S_Mode_SlaveTx ((uint16_t)0x0000)
-#define I2S_Mode_SlaveRx ((uint16_t)0x0100)
-#define I2S_Mode_MasterTx ((uint16_t)0x0200)
-#define I2S_Mode_MasterRx ((uint16_t)0x0300)
-#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
- ((MODE) == I2S_Mode_SlaveRx) || \
- ((MODE) == I2S_Mode_MasterTx) || \
- ((MODE) == I2S_Mode_MasterRx) )
-/**
- * @}
- */
-
-/** @defgroup I2S_Standard
- * @{
- */
-
-#define I2S_Standard_Phillips ((uint16_t)0x0000)
-#define I2S_Standard_MSB ((uint16_t)0x0010)
-#define I2S_Standard_LSB ((uint16_t)0x0020)
-#define I2S_Standard_PCMShort ((uint16_t)0x0030)
-#define I2S_Standard_PCMLong ((uint16_t)0x00B0)
-#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
- ((STANDARD) == I2S_Standard_MSB) || \
- ((STANDARD) == I2S_Standard_LSB) || \
- ((STANDARD) == I2S_Standard_PCMShort) || \
- ((STANDARD) == I2S_Standard_PCMLong))
-/**
- * @}
- */
-
-/** @defgroup I2S_Data_Format
- * @{
- */
-
-#define I2S_DataFormat_16b ((uint16_t)0x0000)
-#define I2S_DataFormat_16bextended ((uint16_t)0x0001)
-#define I2S_DataFormat_24b ((uint16_t)0x0003)
-#define I2S_DataFormat_32b ((uint16_t)0x0005)
-#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
- ((FORMAT) == I2S_DataFormat_16bextended) || \
- ((FORMAT) == I2S_DataFormat_24b) || \
- ((FORMAT) == I2S_DataFormat_32b))
-/**
- * @}
- */
-
-/** @defgroup I2S_MCLK_Output
- * @{
- */
-
-#define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
-#define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
-#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
- ((OUTPUT) == I2S_MCLKOutput_Disable))
-/**
- * @}
- */
-
-/** @defgroup I2S_Audio_Frequency
- * @{
- */
-
-#define I2S_AudioFreq_96k ((uint16_t)96000)
-#define I2S_AudioFreq_48k ((uint16_t)48000)
-#define I2S_AudioFreq_44k ((uint16_t)44100)
-#define I2S_AudioFreq_32k ((uint16_t)32000)
-#define I2S_AudioFreq_22k ((uint16_t)22050)
-#define I2S_AudioFreq_16k ((uint16_t)16000)
-#define I2S_AudioFreq_11k ((uint16_t)11025)
-#define I2S_AudioFreq_8k ((uint16_t)8000)
-#define I2S_AudioFreq_Default ((uint16_t)2)
-#define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_96k) || \
- ((FREQ) == I2S_AudioFreq_48k) || \
- ((FREQ) == I2S_AudioFreq_44k) || \
- ((FREQ) == I2S_AudioFreq_32k) || \
- ((FREQ) == I2S_AudioFreq_22k) || \
- ((FREQ) == I2S_AudioFreq_16k) || \
- ((FREQ) == I2S_AudioFreq_11k) || \
- ((FREQ) == I2S_AudioFreq_8k) || \
- ((FREQ) == I2S_AudioFreq_Default))
-/**
- * @}
- */
-
-/** @defgroup I2S_Clock_Polarity
- * @{
- */
-
-#define I2S_CPOL_Low ((uint16_t)0x0000)
-#define I2S_CPOL_High ((uint16_t)0x0008)
-#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
- ((CPOL) == I2S_CPOL_High))
-/**
- * @}
- */
-
-/** @defgroup SPI_I2S_DMA_transfer_requests
- * @{
- */
-
-#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
-#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
-#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
-/**
- * @}
- */
-
-/** @defgroup SPI_NSS_internal_software_mangement
- * @{
- */
-
-#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
-#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
-#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
- ((INTERNAL) == SPI_NSSInternalSoft_Reset))
-/**
- * @}
- */
-
-/** @defgroup SPI_CRC_Transmit_Receive
- * @{
- */
-
-#define SPI_CRC_Tx ((uint8_t)0x00)
-#define SPI_CRC_Rx ((uint8_t)0x01)
-#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
-/**
- * @}
- */
-
-/** @defgroup SPI_direction_transmit_receive
- * @{
- */
-
-#define SPI_Direction_Rx ((uint16_t)0xBFFF)
-#define SPI_Direction_Tx ((uint16_t)0x4000)
-#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
- ((DIRECTION) == SPI_Direction_Tx))
-/**
- * @}
- */
-
-/** @defgroup SPI_I2S_interrupts_definition
- * @{
- */
-
-#define SPI_I2S_IT_TXE ((uint8_t)0x71)
-#define SPI_I2S_IT_RXNE ((uint8_t)0x60)
-#define SPI_I2S_IT_ERR ((uint8_t)0x50)
-#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
- ((IT) == SPI_I2S_IT_RXNE) || \
- ((IT) == SPI_I2S_IT_ERR))
-#define SPI_I2S_IT_OVR ((uint8_t)0x56)
-#define SPI_IT_MODF ((uint8_t)0x55)
-#define SPI_IT_CRCERR ((uint8_t)0x54)
-#define I2S_IT_UDR ((uint8_t)0x53)
-#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
-#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
- ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
- ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
-/**
- * @}
- */
-
-/** @defgroup SPI_I2S_flags_definition
- * @{
- */
-
-#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
-#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
-#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
-#define I2S_FLAG_UDR ((uint16_t)0x0008)
-#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
-#define SPI_FLAG_MODF ((uint16_t)0x0020)
-#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
-#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
-#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
-#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
- ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
- ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
- ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
-/**
- * @}
- */
-
-/** @defgroup SPI_CRC_polynomial
- * @{
- */
-
-#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup SPI_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup SPI_Exported_Functions
- * @{
- */
-
-void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
-void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
-void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
-void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
-void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
-void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
-void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
-void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
-void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
-void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
-uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
-void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
-void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
-void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
-void SPI_TransmitCRC(SPI_TypeDef* SPIx);
-void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
-uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
-uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
-void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
-FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
-void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
-ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
-void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32F10x_SPI_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_tim.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_tim.h deleted file mode 100644 index 323169bde..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_tim.h +++ /dev/null @@ -1,1040 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_tim.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the TIM firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_TIM_H
-#define __STM32F10x_TIM_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup TIM
- * @{
- */
-
-/** @defgroup TIM_Exported_Types
- * @{
- */
-
-/**
- * @brief TIM Time Base Init structure definition
- * @note This sturcture is used with all TIMx except for TIM6 and TIM7.
- */
-
-typedef struct
-{
- uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
- This parameter can be a number between 0x0000 and 0xFFFF */
-
- uint16_t TIM_CounterMode; /*!< Specifies the counter mode.
- This parameter can be a value of @ref TIM_Counter_Mode */
-
- uint16_t TIM_Period; /*!< Specifies the period value to be loaded into the active
- Auto-Reload Register at the next update event.
- This parameter must be a number between 0x0000 and 0xFFFF. */
-
- uint16_t TIM_ClockDivision; /*!< Specifies the clock division.
- This parameter can be a value of @ref TIM_Clock_Division_CKD */
-
- uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
- reaches zero, an update event is generated and counting restarts
- from the RCR value (N).
- This means in PWM mode that (N+1) corresponds to:
- - the number of PWM periods in edge-aligned mode
- - the number of half PWM period in center-aligned mode
- This parameter must be a number between 0x00 and 0xFF.
- @note This parameter is valid only for TIM1 and TIM8. */
-} TIM_TimeBaseInitTypeDef;
-
-/**
- * @brief TIM Output Compare Init structure definition
- */
-
-typedef struct
-{
- uint16_t TIM_OCMode; /*!< Specifies the TIM mode.
- This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
-
- uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state.
- This parameter can be a value of @ref TIM_Output_Compare_state */
-
- uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state.
- This parameter can be a value of @ref TIM_Output_Compare_N_state
- @note This parameter is valid only for TIM1 and TIM8. */
-
- uint16_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
- This parameter can be a number between 0x0000 and 0xFFFF */
-
- uint16_t TIM_OCPolarity; /*!< Specifies the output polarity.
- This parameter can be a value of @ref TIM_Output_Compare_Polarity */
-
- uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity.
- This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
- @note This parameter is valid only for TIM1 and TIM8. */
-
- uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
- This parameter can be a value of @ref TIM_Output_Compare_Idle_State
- @note This parameter is valid only for TIM1 and TIM8. */
-
- uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
- This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
- @note This parameter is valid only for TIM1 and TIM8. */
-} TIM_OCInitTypeDef;
-
-/**
- * @brief TIM Input Capture Init structure definition
- */
-
-typedef struct
-{
-
- uint16_t TIM_Channel; /*!< Specifies the TIM channel.
- This parameter can be a value of @ref TIM_Channel */
-
- uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal.
- This parameter can be a value of @ref TIM_Input_Capture_Polarity */
-
- uint16_t TIM_ICSelection; /*!< Specifies the input.
- This parameter can be a value of @ref TIM_Input_Capture_Selection */
-
- uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler.
- This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
-
- uint16_t TIM_ICFilter; /*!< Specifies the input capture filter.
- This parameter can be a number between 0x0 and 0xF */
-} TIM_ICInitTypeDef;
-
-/**
- * @brief BDTR structure definition
- * @note This sturcture is used only with TIM1 and TIM8.
- */
-
-typedef struct
-{
-
- uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode.
- This parameter can be a value of @ref OSSR_Off_State_Selection_for_Run_mode_state */
-
- uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state.
- This parameter can be a value of @ref OSSI_Off_State_Selection_for_Idle_mode_state */
-
- uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters.
- This parameter can be a value of @ref Lock_level */
-
- uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the
- switching-on of the outputs.
- This parameter can be a number between 0x00 and 0xFF */
-
- uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not.
- This parameter can be a value of @ref Break_Input_enable_disable */
-
- uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
- This parameter can be a value of @ref Break_Polarity */
-
- uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not.
- This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
-} TIM_BDTRInitTypeDef;
-
-/** @defgroup TIM_Exported_constants
- * @{
- */
-
-#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
- ((PERIPH) == TIM2) || \
- ((PERIPH) == TIM3) || \
- ((PERIPH) == TIM4) || \
- ((PERIPH) == TIM5) || \
- ((PERIPH) == TIM6) || \
- ((PERIPH) == TIM7) || \
- ((PERIPH) == TIM8))
-
-#define IS_TIM_18_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
- ((PERIPH) == TIM8))
-
-#define IS_TIM_123458_PERIPH(PERIPH) (((PERIPH) == TIM1) || \
- ((PERIPH) == TIM2) || \
- ((PERIPH) == TIM3) || \
- ((PERIPH) == TIM4) || \
- ((PERIPH) == TIM5) || \
- ((PERIPH) == TIM8))
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_and_PWM_modes
- * @{
- */
-
-#define TIM_OCMode_Timing ((uint16_t)0x0000)
-#define TIM_OCMode_Active ((uint16_t)0x0010)
-#define TIM_OCMode_Inactive ((uint16_t)0x0020)
-#define TIM_OCMode_Toggle ((uint16_t)0x0030)
-#define TIM_OCMode_PWM1 ((uint16_t)0x0060)
-#define TIM_OCMode_PWM2 ((uint16_t)0x0070)
-#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \
- ((MODE) == TIM_OCMode_Active) || \
- ((MODE) == TIM_OCMode_Inactive) || \
- ((MODE) == TIM_OCMode_Toggle)|| \
- ((MODE) == TIM_OCMode_PWM1) || \
- ((MODE) == TIM_OCMode_PWM2))
-#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \
- ((MODE) == TIM_OCMode_Active) || \
- ((MODE) == TIM_OCMode_Inactive) || \
- ((MODE) == TIM_OCMode_Toggle)|| \
- ((MODE) == TIM_OCMode_PWM1) || \
- ((MODE) == TIM_OCMode_PWM2) || \
- ((MODE) == TIM_ForcedAction_Active) || \
- ((MODE) == TIM_ForcedAction_InActive))
-/**
- * @}
- */
-
-/** @defgroup TIM_One_Pulse_Mode
- * @{
- */
-
-#define TIM_OPMode_Single ((uint16_t)0x0008)
-#define TIM_OPMode_Repetitive ((uint16_t)0x0000)
-#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \
- ((MODE) == TIM_OPMode_Repetitive))
-/**
- * @}
- */
-
-/** @defgroup TIM_Channel
- * @{
- */
-
-#define TIM_Channel_1 ((uint16_t)0x0000)
-#define TIM_Channel_2 ((uint16_t)0x0004)
-#define TIM_Channel_3 ((uint16_t)0x0008)
-#define TIM_Channel_4 ((uint16_t)0x000C)
-#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
- ((CHANNEL) == TIM_Channel_2) || \
- ((CHANNEL) == TIM_Channel_3) || \
- ((CHANNEL) == TIM_Channel_4))
-#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
- ((CHANNEL) == TIM_Channel_2))
-#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \
- ((CHANNEL) == TIM_Channel_2) || \
- ((CHANNEL) == TIM_Channel_3))
-/**
- * @}
- */
-
-/** @defgroup TIM_Clock_Division_CKD
- * @{
- */
-
-#define TIM_CKD_DIV1 ((uint16_t)0x0000)
-#define TIM_CKD_DIV2 ((uint16_t)0x0100)
-#define TIM_CKD_DIV4 ((uint16_t)0x0200)
-#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \
- ((DIV) == TIM_CKD_DIV2) || \
- ((DIV) == TIM_CKD_DIV4))
-/**
- * @}
- */
-
-/** @defgroup TIM_Counter_Mode
- * @{
- */
-
-#define TIM_CounterMode_Up ((uint16_t)0x0000)
-#define TIM_CounterMode_Down ((uint16_t)0x0010)
-#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020)
-#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040)
-#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060)
-#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \
- ((MODE) == TIM_CounterMode_Down) || \
- ((MODE) == TIM_CounterMode_CenterAligned1) || \
- ((MODE) == TIM_CounterMode_CenterAligned2) || \
- ((MODE) == TIM_CounterMode_CenterAligned3))
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_Polarity
- * @{
- */
-
-#define TIM_OCPolarity_High ((uint16_t)0x0000)
-#define TIM_OCPolarity_Low ((uint16_t)0x0002)
-#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \
- ((POLARITY) == TIM_OCPolarity_Low))
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_N_Polarity
- * @{
- */
-
-#define TIM_OCNPolarity_High ((uint16_t)0x0000)
-#define TIM_OCNPolarity_Low ((uint16_t)0x0008)
-#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \
- ((POLARITY) == TIM_OCNPolarity_Low))
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_state
- * @{
- */
-
-#define TIM_OutputState_Disable ((uint16_t)0x0000)
-#define TIM_OutputState_Enable ((uint16_t)0x0001)
-#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \
- ((STATE) == TIM_OutputState_Enable))
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_N_state
- * @{
- */
-
-#define TIM_OutputNState_Disable ((uint16_t)0x0000)
-#define TIM_OutputNState_Enable ((uint16_t)0x0004)
-#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \
- ((STATE) == TIM_OutputNState_Enable))
-/**
- * @}
- */
-
-/** @defgroup TIM_Capture_Compare_state
- * @{
- */
-
-#define TIM_CCx_Enable ((uint16_t)0x0001)
-#define TIM_CCx_Disable ((uint16_t)0x0000)
-#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \
- ((CCX) == TIM_CCx_Disable))
-/**
- * @}
- */
-
-/** @defgroup TIM_Capture_Compare_N_state
- * @{
- */
-
-#define TIM_CCxN_Enable ((uint16_t)0x0004)
-#define TIM_CCxN_Disable ((uint16_t)0x0000)
-#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \
- ((CCXN) == TIM_CCxN_Disable))
-/**
- * @}
- */
-
-/** @defgroup Break_Input_enable_disable
- * @{
- */
-
-#define TIM_Break_Enable ((uint16_t)0x1000)
-#define TIM_Break_Disable ((uint16_t)0x0000)
-#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \
- ((STATE) == TIM_Break_Disable))
-/**
- * @}
- */
-
-/** @defgroup Break_Polarity
- * @{
- */
-
-#define TIM_BreakPolarity_Low ((uint16_t)0x0000)
-#define TIM_BreakPolarity_High ((uint16_t)0x2000)
-#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \
- ((POLARITY) == TIM_BreakPolarity_High))
-/**
- * @}
- */
-
-/** @defgroup TIM_AOE_Bit_Set_Reset
- * @{
- */
-
-#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000)
-#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000)
-#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \
- ((STATE) == TIM_AutomaticOutput_Disable))
-/**
- * @}
- */
-
-/** @defgroup Lock_level
- * @{
- */
-
-#define TIM_LOCKLevel_OFF ((uint16_t)0x0000)
-#define TIM_LOCKLevel_1 ((uint16_t)0x0100)
-#define TIM_LOCKLevel_2 ((uint16_t)0x0200)
-#define TIM_LOCKLevel_3 ((uint16_t)0x0300)
-#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \
- ((LEVEL) == TIM_LOCKLevel_1) || \
- ((LEVEL) == TIM_LOCKLevel_2) || \
- ((LEVEL) == TIM_LOCKLevel_3))
-/**
- * @}
- */
-
-/** @defgroup OSSI_Off_State_Selection_for_Idle_mode_state
- * @{
- */
-
-#define TIM_OSSIState_Enable ((uint16_t)0x0400)
-#define TIM_OSSIState_Disable ((uint16_t)0x0000)
-#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \
- ((STATE) == TIM_OSSIState_Disable))
-/**
- * @}
- */
-
-/** @defgroup OSSR_Off_State_Selection_for_Run_mode_state
- * @{
- */
-
-#define TIM_OSSRState_Enable ((uint16_t)0x0800)
-#define TIM_OSSRState_Disable ((uint16_t)0x0000)
-#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \
- ((STATE) == TIM_OSSRState_Disable))
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_Idle_State
- * @{
- */
-
-#define TIM_OCIdleState_Set ((uint16_t)0x0100)
-#define TIM_OCIdleState_Reset ((uint16_t)0x0000)
-#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \
- ((STATE) == TIM_OCIdleState_Reset))
-/**
- * @}
- */
-
-/** @defgroup TIM_Output_Compare_N_Idle_State
- * @{
- */
-
-#define TIM_OCNIdleState_Set ((uint16_t)0x0200)
-#define TIM_OCNIdleState_Reset ((uint16_t)0x0000)
-#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \
- ((STATE) == TIM_OCNIdleState_Reset))
-/**
- * @}
- */
-
-/** @defgroup TIM_Input_Capture_Polarity
- * @{
- */
-
-#define TIM_ICPolarity_Rising ((uint16_t)0x0000)
-#define TIM_ICPolarity_Falling ((uint16_t)0x0002)
-#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \
- ((POLARITY) == TIM_ICPolarity_Falling))
-/**
- * @}
- */
-
-/** @defgroup TIM_Input_Capture_Selection
- * @{
- */
-
-#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be
- connected to IC1, IC2, IC3 or IC4, respectively */
-#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be
- connected to IC2, IC1, IC4 or IC3, respectively. */
-#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */
-#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \
- ((SELECTION) == TIM_ICSelection_IndirectTI) || \
- ((SELECTION) == TIM_ICSelection_TRC))
-/**
- * @}
- */
-
-/** @defgroup TIM_Input_Capture_Prescaler
- * @{
- */
-
-#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */
-#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */
-#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */
-#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */
-#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \
- ((PRESCALER) == TIM_ICPSC_DIV2) || \
- ((PRESCALER) == TIM_ICPSC_DIV4) || \
- ((PRESCALER) == TIM_ICPSC_DIV8))
-/**
- * @}
- */
-
-/** @defgroup TIM_interrupt_sources
- * @{
- */
-
-#define TIM_IT_Update ((uint16_t)0x0001)
-#define TIM_IT_CC1 ((uint16_t)0x0002)
-#define TIM_IT_CC2 ((uint16_t)0x0004)
-#define TIM_IT_CC3 ((uint16_t)0x0008)
-#define TIM_IT_CC4 ((uint16_t)0x0010)
-#define TIM_IT_COM ((uint16_t)0x0020)
-#define TIM_IT_Trigger ((uint16_t)0x0040)
-#define TIM_IT_Break ((uint16_t)0x0080)
-#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000))
-
-#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \
- ((IT) == TIM_IT_CC1) || \
- ((IT) == TIM_IT_CC2) || \
- ((IT) == TIM_IT_CC3) || \
- ((IT) == TIM_IT_CC4) || \
- ((IT) == TIM_IT_COM) || \
- ((IT) == TIM_IT_Trigger) || \
- ((IT) == TIM_IT_Break))
-/**
- * @}
- */
-
-/** @defgroup TIM_DMA_Base_address
- * @{
- */
-
-#define TIM_DMABase_CR1 ((uint16_t)0x0000)
-#define TIM_DMABase_CR2 ((uint16_t)0x0001)
-#define TIM_DMABase_SMCR ((uint16_t)0x0002)
-#define TIM_DMABase_DIER ((uint16_t)0x0003)
-#define TIM_DMABase_SR ((uint16_t)0x0004)
-#define TIM_DMABase_EGR ((uint16_t)0x0005)
-#define TIM_DMABase_CCMR1 ((uint16_t)0x0006)
-#define TIM_DMABase_CCMR2 ((uint16_t)0x0007)
-#define TIM_DMABase_CCER ((uint16_t)0x0008)
-#define TIM_DMABase_CNT ((uint16_t)0x0009)
-#define TIM_DMABase_PSC ((uint16_t)0x000A)
-#define TIM_DMABase_ARR ((uint16_t)0x000B)
-#define TIM_DMABase_RCR ((uint16_t)0x000C)
-#define TIM_DMABase_CCR1 ((uint16_t)0x000D)
-#define TIM_DMABase_CCR2 ((uint16_t)0x000E)
-#define TIM_DMABase_CCR3 ((uint16_t)0x000F)
-#define TIM_DMABase_CCR4 ((uint16_t)0x0010)
-#define TIM_DMABase_BDTR ((uint16_t)0x0011)
-#define TIM_DMABase_DCR ((uint16_t)0x0012)
-#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
- ((BASE) == TIM_DMABase_CR2) || \
- ((BASE) == TIM_DMABase_SMCR) || \
- ((BASE) == TIM_DMABase_DIER) || \
- ((BASE) == TIM_DMABase_SR) || \
- ((BASE) == TIM_DMABase_EGR) || \
- ((BASE) == TIM_DMABase_CCMR1) || \
- ((BASE) == TIM_DMABase_CCMR2) || \
- ((BASE) == TIM_DMABase_CCER) || \
- ((BASE) == TIM_DMABase_CNT) || \
- ((BASE) == TIM_DMABase_PSC) || \
- ((BASE) == TIM_DMABase_ARR) || \
- ((BASE) == TIM_DMABase_RCR) || \
- ((BASE) == TIM_DMABase_CCR1) || \
- ((BASE) == TIM_DMABase_CCR2) || \
- ((BASE) == TIM_DMABase_CCR3) || \
- ((BASE) == TIM_DMABase_CCR4) || \
- ((BASE) == TIM_DMABase_BDTR) || \
- ((BASE) == TIM_DMABase_DCR))
-/**
- * @}
- */
-
-/** @defgroup TIM_DMA_Burst_Length
- * @{
- */
-
-#define TIM_DMABurstLength_1Byte ((uint16_t)0x0000)
-#define TIM_DMABurstLength_2Bytes ((uint16_t)0x0100)
-#define TIM_DMABurstLength_3Bytes ((uint16_t)0x0200)
-#define TIM_DMABurstLength_4Bytes ((uint16_t)0x0300)
-#define TIM_DMABurstLength_5Bytes ((uint16_t)0x0400)
-#define TIM_DMABurstLength_6Bytes ((uint16_t)0x0500)
-#define TIM_DMABurstLength_7Bytes ((uint16_t)0x0600)
-#define TIM_DMABurstLength_8Bytes ((uint16_t)0x0700)
-#define TIM_DMABurstLength_9Bytes ((uint16_t)0x0800)
-#define TIM_DMABurstLength_10Bytes ((uint16_t)0x0900)
-#define TIM_DMABurstLength_11Bytes ((uint16_t)0x0A00)
-#define TIM_DMABurstLength_12Bytes ((uint16_t)0x0B00)
-#define TIM_DMABurstLength_13Bytes ((uint16_t)0x0C00)
-#define TIM_DMABurstLength_14Bytes ((uint16_t)0x0D00)
-#define TIM_DMABurstLength_15Bytes ((uint16_t)0x0E00)
-#define TIM_DMABurstLength_16Bytes ((uint16_t)0x0F00)
-#define TIM_DMABurstLength_17Bytes ((uint16_t)0x1000)
-#define TIM_DMABurstLength_18Bytes ((uint16_t)0x1100)
-#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Byte) || \
- ((LENGTH) == TIM_DMABurstLength_2Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_3Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_4Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_5Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_6Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_7Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_8Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_9Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_10Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_11Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_12Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_13Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_14Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_15Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_16Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_17Bytes) || \
- ((LENGTH) == TIM_DMABurstLength_18Bytes))
-/**
- * @}
- */
-
-/** @defgroup TIM_DMA_sources
- * @{
- */
-
-#define TIM_DMA_Update ((uint16_t)0x0100)
-#define TIM_DMA_CC1 ((uint16_t)0x0200)
-#define TIM_DMA_CC2 ((uint16_t)0x0400)
-#define TIM_DMA_CC3 ((uint16_t)0x0800)
-#define TIM_DMA_CC4 ((uint16_t)0x1000)
-#define TIM_DMA_COM ((uint16_t)0x2000)
-#define TIM_DMA_Trigger ((uint16_t)0x4000)
-#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000))
-
-/**
- * @}
- */
-
-/** @defgroup TIM_External_Trigger_Prescaler
- * @{
- */
-
-#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000)
-#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000)
-#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000)
-#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000)
-#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \
- ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \
- ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \
- ((PRESCALER) == TIM_ExtTRGPSC_DIV8))
-/**
- * @}
- */
-
-/** @defgroup TIM_Internal_Trigger_Selection
- * @{
- */
-
-#define TIM_TS_ITR0 ((uint16_t)0x0000)
-#define TIM_TS_ITR1 ((uint16_t)0x0010)
-#define TIM_TS_ITR2 ((uint16_t)0x0020)
-#define TIM_TS_ITR3 ((uint16_t)0x0030)
-#define TIM_TS_TI1F_ED ((uint16_t)0x0040)
-#define TIM_TS_TI1FP1 ((uint16_t)0x0050)
-#define TIM_TS_TI2FP2 ((uint16_t)0x0060)
-#define TIM_TS_ETRF ((uint16_t)0x0070)
-#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
- ((SELECTION) == TIM_TS_ITR1) || \
- ((SELECTION) == TIM_TS_ITR2) || \
- ((SELECTION) == TIM_TS_ITR3) || \
- ((SELECTION) == TIM_TS_TI1F_ED) || \
- ((SELECTION) == TIM_TS_TI1FP1) || \
- ((SELECTION) == TIM_TS_TI2FP2) || \
- ((SELECTION) == TIM_TS_ETRF))
-#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
- ((SELECTION) == TIM_TS_ITR1) || \
- ((SELECTION) == TIM_TS_ITR2) || \
- ((SELECTION) == TIM_TS_ITR3))
-/**
- * @}
- */
-
-/** @defgroup TIM_TIx_External_Clock_Source
- * @{
- */
-
-#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050)
-#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060)
-#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040)
-#define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \
- ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \
- ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED))
-/**
- * @}
- */
-
-/** @defgroup TIM_External_Trigger_Polarity
- * @{
- */
-#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000)
-#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000)
-#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \
- ((POLARITY) == TIM_ExtTRGPolarity_NonInverted))
-/**
- * @}
- */
-
-/** @defgroup TIM_Prescaler_Reload_Mode
- * @{
- */
-
-#define TIM_PSCReloadMode_Update ((uint16_t)0x0000)
-#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001)
-#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \
- ((RELOAD) == TIM_PSCReloadMode_Immediate))
-/**
- * @}
- */
-
-/** @defgroup TIM_Forced_Action
- * @{
- */
-
-#define TIM_ForcedAction_Active ((uint16_t)0x0050)
-#define TIM_ForcedAction_InActive ((uint16_t)0x0040)
-#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \
- ((ACTION) == TIM_ForcedAction_InActive))
-/**
- * @}
- */
-
-/** @defgroup TIM_Encoder_Mode
- * @{
- */
-
-#define TIM_EncoderMode_TI1 ((uint16_t)0x0001)
-#define TIM_EncoderMode_TI2 ((uint16_t)0x0002)
-#define TIM_EncoderMode_TI12 ((uint16_t)0x0003)
-#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \
- ((MODE) == TIM_EncoderMode_TI2) || \
- ((MODE) == TIM_EncoderMode_TI12))
-/**
- * @}
- */
-
-
-/** @defgroup TIM_Event_Source
- * @{
- */
-
-#define TIM_EventSource_Update ((uint16_t)0x0001)
-#define TIM_EventSource_CC1 ((uint16_t)0x0002)
-#define TIM_EventSource_CC2 ((uint16_t)0x0004)
-#define TIM_EventSource_CC3 ((uint16_t)0x0008)
-#define TIM_EventSource_CC4 ((uint16_t)0x0010)
-#define TIM_EventSource_COM ((uint16_t)0x0020)
-#define TIM_EventSource_Trigger ((uint16_t)0x0040)
-#define TIM_EventSource_Break ((uint16_t)0x0080)
-#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000))
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Update_Source
- * @{
- */
-
-#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow
- or the setting of UG bit, or an update generation
- through the slave mode controller. */
-#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */
-#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \
- ((SOURCE) == TIM_UpdateSource_Regular))
-/**
- * @}
- */
-
-/** @defgroup TIM_Ouput_Compare_Preload_State
- * @{
- */
-
-#define TIM_OCPreload_Enable ((uint16_t)0x0008)
-#define TIM_OCPreload_Disable ((uint16_t)0x0000)
-#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \
- ((STATE) == TIM_OCPreload_Disable))
-/**
- * @}
- */
-
-/** @defgroup TIM_Ouput_Compare_Fast_State
- * @{
- */
-
-#define TIM_OCFast_Enable ((uint16_t)0x0004)
-#define TIM_OCFast_Disable ((uint16_t)0x0000)
-#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \
- ((STATE) == TIM_OCFast_Disable))
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Ouput_Compare_Clear_State
- * @{
- */
-
-#define TIM_OCClear_Enable ((uint16_t)0x0080)
-#define TIM_OCClear_Disable ((uint16_t)0x0000)
-#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \
- ((STATE) == TIM_OCClear_Disable))
-/**
- * @}
- */
-
-/** @defgroup TIM_Trigger_Output_Source
- * @{
- */
-
-#define TIM_TRGOSource_Reset ((uint16_t)0x0000)
-#define TIM_TRGOSource_Enable ((uint16_t)0x0010)
-#define TIM_TRGOSource_Update ((uint16_t)0x0020)
-#define TIM_TRGOSource_OC1 ((uint16_t)0x0030)
-#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040)
-#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050)
-#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060)
-#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070)
-#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \
- ((SOURCE) == TIM_TRGOSource_Enable) || \
- ((SOURCE) == TIM_TRGOSource_Update) || \
- ((SOURCE) == TIM_TRGOSource_OC1) || \
- ((SOURCE) == TIM_TRGOSource_OC1Ref) || \
- ((SOURCE) == TIM_TRGOSource_OC2Ref) || \
- ((SOURCE) == TIM_TRGOSource_OC3Ref) || \
- ((SOURCE) == TIM_TRGOSource_OC4Ref))
-/**
- * @}
- */
-
-/** @defgroup TIM_Slave_Mode
- * @{
- */
-
-#define TIM_SlaveMode_Reset ((uint16_t)0x0004)
-#define TIM_SlaveMode_Gated ((uint16_t)0x0005)
-#define TIM_SlaveMode_Trigger ((uint16_t)0x0006)
-#define TIM_SlaveMode_External1 ((uint16_t)0x0007)
-#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \
- ((MODE) == TIM_SlaveMode_Gated) || \
- ((MODE) == TIM_SlaveMode_Trigger) || \
- ((MODE) == TIM_SlaveMode_External1))
-/**
- * @}
- */
-
-/** @defgroup TIM_Master_Slave_Mode
- * @{
- */
-
-#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080)
-#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000)
-#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \
- ((STATE) == TIM_MasterSlaveMode_Disable))
-/**
- * @}
- */
-
-/** @defgroup TIM_Flags
- * @{
- */
-
-#define TIM_FLAG_Update ((uint16_t)0x0001)
-#define TIM_FLAG_CC1 ((uint16_t)0x0002)
-#define TIM_FLAG_CC2 ((uint16_t)0x0004)
-#define TIM_FLAG_CC3 ((uint16_t)0x0008)
-#define TIM_FLAG_CC4 ((uint16_t)0x0010)
-#define TIM_FLAG_COM ((uint16_t)0x0020)
-#define TIM_FLAG_Trigger ((uint16_t)0x0040)
-#define TIM_FLAG_Break ((uint16_t)0x0080)
-#define TIM_FLAG_CC1OF ((uint16_t)0x0200)
-#define TIM_FLAG_CC2OF ((uint16_t)0x0400)
-#define TIM_FLAG_CC3OF ((uint16_t)0x0800)
-#define TIM_FLAG_CC4OF ((uint16_t)0x1000)
-#define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \
- ((FLAG) == TIM_FLAG_CC1) || \
- ((FLAG) == TIM_FLAG_CC2) || \
- ((FLAG) == TIM_FLAG_CC3) || \
- ((FLAG) == TIM_FLAG_CC4) || \
- ((FLAG) == TIM_FLAG_COM) || \
- ((FLAG) == TIM_FLAG_Trigger) || \
- ((FLAG) == TIM_FLAG_Break) || \
- ((FLAG) == TIM_FLAG_CC1OF) || \
- ((FLAG) == TIM_FLAG_CC2OF) || \
- ((FLAG) == TIM_FLAG_CC3OF) || \
- ((FLAG) == TIM_FLAG_CC4OF))
-
-
-#define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000))
-/**
- * @}
- */
-
-/** @defgroup TIM_Input_Capture_Filer_Value
- * @{
- */
-
-#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF)
-/**
- * @}
- */
-
-/** @defgroup TIM_External_Trigger_Filter
- * @{
- */
-
-#define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup TIM_Exported_Functions
- * @{
- */
-
-void TIM_DeInit(TIM_TypeDef* TIMx);
-void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
-void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
-void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
-void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
-void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
-void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
-void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
-void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct);
-void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
-void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);
-void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);
-void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct);
-void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
-void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState);
-void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState);
-void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource);
-void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);
-void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState);
-void TIM_InternalClockConfig(TIM_TypeDef* TIMx);
-void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
-void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
- uint16_t TIM_ICPolarity, uint16_t ICFilter);
-void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
- uint16_t ExtTRGFilter);
-void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
- uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
-void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
- uint16_t ExtTRGFilter);
-void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);
-void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode);
-void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);
-void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
- uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);
-void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
-void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
-void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
-void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);
-void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
-void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState);
-void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);
-void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState);
-void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
-void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
-void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
-void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);
-void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
-void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
-void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
-void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);
-void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
-void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
-void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
-void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);
-void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
-void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
-void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
-void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
-void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
-void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity);
-void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);
-void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);
-void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN);
-void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode);
-void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState);
-void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource);
-void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);
-void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode);
-void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource);
-void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
-void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode);
-void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter);
-void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload);
-void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1);
-void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2);
-void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3);
-void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4);
-void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
-void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
-void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
-void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);
-void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD);
-uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx);
-uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx);
-uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx);
-uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx);
-uint16_t TIM_GetCounter(TIM_TypeDef* TIMx);
-uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx);
-FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
-void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);
-ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT);
-void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__STM32F10x_TIM_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_usart.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_usart.h deleted file mode 100644 index 976a06c62..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_usart.h +++ /dev/null @@ -1,409 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_usart.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the USART
- * firmware library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_USART_H
-#define __STM32F10x_USART_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup USART
- * @{
- */
-
-/** @defgroup USART_Exported_Types
- * @{
- */
-
-/**
- * @brief USART Init Structure definition
- */
-
-typedef struct
-{
- uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate.
- The baud rate is computed using the following formula:
- - IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate)))
- - FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
-
- uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
- This parameter can be a value of @ref USART_Word_Length */
-
- uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted.
- This parameter can be a value of @ref USART_Stop_Bits */
-
- uint16_t USART_Parity; /*!< Specifies the parity mode.
- This parameter can be a value of @ref USART_Parity
- @note When parity is enabled, the computed parity is inserted
- at the MSB position of the transmitted data (9th bit when
- the word length is set to 9 data bits; 8th bit when the
- word length is set to 8 data bits). */
-
- uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
- This parameter can be a value of @ref USART_Mode */
-
- uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled
- or disabled.
- This parameter can be a value of @ref USART_Hardware_Flow_Control */
-} USART_InitTypeDef;
-
-/**
- * @brief USART Clock Init Structure definition
- */
-
-typedef struct
-{
-
- uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled.
- This parameter can be a value of @ref USART_Clock */
-
- uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock.
- This parameter can be a value of @ref USART_Clock_Polarity */
-
- uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made.
- This parameter can be a value of @ref USART_Clock_Phase */
-
- uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
- data bit (MSB) has to be output on the SCLK pin in synchronous mode.
- This parameter can be a value of @ref USART_Last_Bit */
-} USART_ClockInitTypeDef;
-
-/**
- * @}
- */
-
-/** @defgroup USART_Exported_Constants
- * @{
- */
-
-#define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \
- ((PERIPH) == USART2) || \
- ((PERIPH) == USART3) || \
- ((PERIPH) == UART4) || \
- ((PERIPH) == UART5))
-
-#define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \
- ((PERIPH) == USART2) || \
- ((PERIPH) == USART3))
-
-#define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \
- ((PERIPH) == USART2) || \
- ((PERIPH) == USART3) || \
- ((PERIPH) == UART4))
-/** @defgroup USART_Word_Length
- * @{
- */
-
-#define USART_WordLength_8b ((uint16_t)0x0000)
-#define USART_WordLength_9b ((uint16_t)0x1000)
-
-#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \
- ((LENGTH) == USART_WordLength_9b))
-/**
- * @}
- */
-
-/** @defgroup USART_Stop_Bits
- * @{
- */
-
-#define USART_StopBits_1 ((uint16_t)0x0000)
-#define USART_StopBits_0_5 ((uint16_t)0x1000)
-#define USART_StopBits_2 ((uint16_t)0x2000)
-#define USART_StopBits_1_5 ((uint16_t)0x3000)
-#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \
- ((STOPBITS) == USART_StopBits_0_5) || \
- ((STOPBITS) == USART_StopBits_2) || \
- ((STOPBITS) == USART_StopBits_1_5))
-/**
- * @}
- */
-
-/** @defgroup USART_Parity
- * @{
- */
-
-#define USART_Parity_No ((uint16_t)0x0000)
-#define USART_Parity_Even ((uint16_t)0x0400)
-#define USART_Parity_Odd ((uint16_t)0x0600)
-#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \
- ((PARITY) == USART_Parity_Even) || \
- ((PARITY) == USART_Parity_Odd))
-/**
- * @}
- */
-
-/** @defgroup USART_Mode
- * @{
- */
-
-#define USART_Mode_Rx ((uint16_t)0x0004)
-#define USART_Mode_Tx ((uint16_t)0x0008)
-#define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00))
-/**
- * @}
- */
-
-/** @defgroup USART_Hardware_Flow_Control
- * @{
- */
-#define USART_HardwareFlowControl_None ((uint16_t)0x0000)
-#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100)
-#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200)
-#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)
-#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\
- (((CONTROL) == USART_HardwareFlowControl_None) || \
- ((CONTROL) == USART_HardwareFlowControl_RTS) || \
- ((CONTROL) == USART_HardwareFlowControl_CTS) || \
- ((CONTROL) == USART_HardwareFlowControl_RTS_CTS))
-/**
- * @}
- */
-
-/** @defgroup USART_Clock
- * @{
- */
-#define USART_Clock_Disable ((uint16_t)0x0000)
-#define USART_Clock_Enable ((uint16_t)0x0800)
-#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \
- ((CLOCK) == USART_Clock_Enable))
-/**
- * @}
- */
-
-/** @defgroup USART_Clock_Polarity
- * @{
- */
-
-#define USART_CPOL_Low ((uint16_t)0x0000)
-#define USART_CPOL_High ((uint16_t)0x0400)
-#define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High))
-
-/**
- * @}
- */
-
-/** @defgroup USART_Clock_Phase
- * @{
- */
-
-#define USART_CPHA_1Edge ((uint16_t)0x0000)
-#define USART_CPHA_2Edge ((uint16_t)0x0200)
-#define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge))
-
-/**
- * @}
- */
-
-/** @defgroup USART_Last_Bit
- * @{
- */
-
-#define USART_LastBit_Disable ((uint16_t)0x0000)
-#define USART_LastBit_Enable ((uint16_t)0x0100)
-#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \
- ((LASTBIT) == USART_LastBit_Enable))
-/**
- * @}
- */
-
-/** @defgroup USART_Interrupt_definition
- * @{
- */
-
-#define USART_IT_PE ((uint16_t)0x0028)
-#define USART_IT_TXE ((uint16_t)0x0727)
-#define USART_IT_TC ((uint16_t)0x0626)
-#define USART_IT_RXNE ((uint16_t)0x0525)
-#define USART_IT_IDLE ((uint16_t)0x0424)
-#define USART_IT_LBD ((uint16_t)0x0846)
-#define USART_IT_CTS ((uint16_t)0x096A)
-#define USART_IT_ERR ((uint16_t)0x0060)
-#define USART_IT_ORE ((uint16_t)0x0360)
-#define USART_IT_NE ((uint16_t)0x0260)
-#define USART_IT_FE ((uint16_t)0x0160)
-#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
- ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
- ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
- ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))
-#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
- ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
- ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
- ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \
- ((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))
-#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
- ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))
-/**
- * @}
- */
-
-/** @defgroup USART_DMA_Requests
- * @{
- */
-
-#define USART_DMAReq_Tx ((uint16_t)0x0080)
-#define USART_DMAReq_Rx ((uint16_t)0x0040)
-#define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00))
-
-/**
- * @}
- */
-
-/** @defgroup USART_WakeUp_methods
- * @{
- */
-
-#define USART_WakeUp_IdleLine ((uint16_t)0x0000)
-#define USART_WakeUp_AddressMark ((uint16_t)0x0800)
-#define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \
- ((WAKEUP) == USART_WakeUp_AddressMark))
-/**
- * @}
- */
-
-/** @defgroup USART_LIN_Break_Detection_Length
- * @{
- */
-
-#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000)
-#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020)
-#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \
- (((LENGTH) == USART_LINBreakDetectLength_10b) || \
- ((LENGTH) == USART_LINBreakDetectLength_11b))
-/**
- * @}
- */
-
-/** @defgroup USART_IrDA_Low_Power
- * @{
- */
-
-#define USART_IrDAMode_LowPower ((uint16_t)0x0004)
-#define USART_IrDAMode_Normal ((uint16_t)0x0000)
-#define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \
- ((MODE) == USART_IrDAMode_Normal))
-/**
- * @}
- */
-
-/** @defgroup USART_Flags
- * @{
- */
-
-#define USART_FLAG_CTS ((uint16_t)0x0200)
-#define USART_FLAG_LBD ((uint16_t)0x0100)
-#define USART_FLAG_TXE ((uint16_t)0x0080)
-#define USART_FLAG_TC ((uint16_t)0x0040)
-#define USART_FLAG_RXNE ((uint16_t)0x0020)
-#define USART_FLAG_IDLE ((uint16_t)0x0010)
-#define USART_FLAG_ORE ((uint16_t)0x0008)
-#define USART_FLAG_NE ((uint16_t)0x0004)
-#define USART_FLAG_FE ((uint16_t)0x0002)
-#define USART_FLAG_PE ((uint16_t)0x0001)
-#define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \
- ((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \
- ((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \
- ((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \
- ((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))
-
-#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00))
-#define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\
- ((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \
- || ((USART_FLAG) != USART_FLAG_CTS))
-#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
-#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
-#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF)
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup USART_Exported_Macros
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup USART_Exported_Functions
- * @{
- */
-
-void USART_DeInit(USART_TypeDef* USARTx);
-void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct);
-void USART_StructInit(USART_InitTypeDef* USART_InitStruct);
-void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct);
-void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct);
-void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
-void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState);
-void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState);
-void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address);
-void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp);
-void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState);
-void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength);
-void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState);
-void USART_SendData(USART_TypeDef* USARTx, uint16_t Data);
-uint16_t USART_ReceiveData(USART_TypeDef* USARTx);
-void USART_SendBreak(USART_TypeDef* USARTx);
-void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime);
-void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler);
-void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState);
-void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState);
-void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState);
-void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode);
-void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState);
-FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG);
-void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG);
-ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT);
-void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_USART_H */
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
diff --git a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_wwdg.h b/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_wwdg.h deleted file mode 100644 index 39dc8e9a3..000000000 --- a/demos/ARMCM3-STM32F103-GCC/stm32lib/inc/stm32f10x_wwdg.h +++ /dev/null @@ -1,114 +0,0 @@ -/**
- ******************************************************************************
- * @file stm32f10x_wwdg.h
- * @author MCD Application Team
- * @version V3.1.0
- * @date 06/19/2009
- * @brief This file contains all the functions prototypes for the WWDG firmware
- * library.
- ******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_WWDG_H
-#define __STM32F10x_WWDG_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Driver
- * @{
- */
-
-/** @addtogroup WWDG
- * @{
- */
-
-/** @defgroup WWDG_Exported_Types
- * @{
- */
-
-/**
- * @}
- */
-
-/** @defgroup WWDG_Exported_Constants
- * @{
- */
-
-/** @defgroup WWDG_Prescaler
- * @{
- */
-
-#define WWDG_Prescaler_1 ((uint32_t)0x00000000)
-#define WWDG_Prescaler_2 ((uint32_t)0x00000080)
-#define WWDG_Prescaler_4 ((uint32_t)0x00000100)
-#define WWDG_Prescaler_8 ((uint32_t)0x00000180)
-#define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
- ((PRESCALER) == WWDG_Prescaler_2) || \
- ((PRESCALER) == WWDG_Prescaler_4) || \
- ((PRESCALER) == WWDG_Prescaler_8))
-#define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
-#define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/** @defgroup WWDG_Exported_Macros
- * @{
- */
-/**
- * @}
- */
-
-/** @defgroup WWDG_Exported_Functions
- * @{
- */
-
-void WWDG_DeInit(void);
-void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
-void WWDG_SetWindowValue(uint8_t WindowValue);
-void WWDG_EnableIT(void);
-void WWDG_SetCounter(uint8_t Counter);
-void WWDG_Enable(uint8_t Counter);
-FlagStatus WWDG_GetFlagStatus(void);
-void WWDG_ClearFlag(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F10x_WWDG_H */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
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