2 files changed, 30 insertions, 4 deletions
diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c
index edb4934ba..e098391ce 100644
--- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c
+++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c
@@ -65,6 +65,12 @@
 void _pal_lld_init(const PALConfig *config) {
   unsigned i;
 
+#if defined(SPC5_SIU_PCTL)
+  /* SIUL clock gating if present.*/
+  halSPCSetPeripheralClockMode(SPC5_SIU_PCTL,
+                               SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2));
+#endif
+
   /* Initialize PCR registers for undefined pads.*/
   for (i = 0; i < SPC5_SIU_NUM_PCRS; i++)
     SIU.PCR[i].R = config->default_mode;
diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h
index 74d2e4920..a766e1e64 100644
--- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h
+++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h
@@ -175,25 +175,45 @@ typedef struct {
 /*===========================================================================*/
 
 /**
- * @brief   I/O port 1 identifier.
+ * @brief   I/O port A identifier.
  */
 #define PA              0
 
 /**
- * @brief   I/O port 2 identifier.
+ * @brief   I/O port B identifier.
  */
 #define PB              1
 
 /**
- * @brief   I/O port 3 identifier.
+ * @brief   I/O port C identifier.
  */
 #define PC              2
 
 /**
- * @brief   I/O port 4 identifier.
+ * @brief   I/O port D identifier.
  */
 #define PD              3
 
+/**
+ * @brief   I/O port E identifier.
+ */
+#define PE              4
+
+/**
+ * @brief   I/O port F identifier.
+ */
+#define PF              5
+
+/**
+ * @brief   I/O port G identifier.
+ */
+#define PG              6
+
+/**
+ * @brief   I/O port H identifier.
+ */
+#define PH              7
+
 /*===========================================================================*/
 /* Implementation, some of the following macros could be implemented as      */
 /* functions, if so please put them in pal_lld.c.                            */