diff options
Diffstat (limited to 'ports/ARMCM3-STM32F103/pal_lld.c')
| -rw-r--r-- | ports/ARMCM3-STM32F103/pal_lld.c | 74 |
1 files changed, 34 insertions, 40 deletions
diff --git a/ports/ARMCM3-STM32F103/pal_lld.c b/ports/ARMCM3-STM32F103/pal_lld.c index 292a64f81..00688845d 100644 --- a/ports/ARMCM3-STM32F103/pal_lld.c +++ b/ports/ARMCM3-STM32F103/pal_lld.c @@ -27,78 +27,72 @@ #include <ch.h>
#include <pal.h>
+#if defined(STM32F10X_LD)
+#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
+ RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
+ RCC_APB2RSTR_AFIORST)
+#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
+ RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
+ RCC_APB2ENR_AFIOEN)
+#elif defined(STM32F10X_HD)
+#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
+ RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
+ RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_IOPFRST | \
+ RCC_APB2RSTR_IOPGRST | RCC_APB2RSTR_AFIORST);
+#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
+ RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
+ RCC_APB2ENR_IOPEEN | RCC_APB2ENR_IOPFEN | \
+ RCC_APB2ENR_IOPGEN | RCC_APB2ENR_AFIOEN)
+#else
+ /* Defaults on Medium Density devices.*/
+#define APB2_RST_MASK (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | \
+ RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST | \
+ RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_AFIORST);
+#define APB2_EN_MASK (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | \
+ RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | \
+ RCC_APB2ENR_IOPEEN | RCC_APB2ENR_AFIOEN)
+#endif
+
/**
* @brief STM32 I/O ports configuration.
- * @details Ports A-D clocks enabled, AFIO clock enabled.
+ * @details Ports A-D(E, F, G) clocks enabled, AFIO clock enabled.
*
* @param[in] config the STM32 ports configuration
*/
void _pal_lld_init(const STM32GPIOConfig *config) {
- uint32_t clocks = RCC_APB2ENR_AFIOEN;
-#if defined(_GPIOA)
- clocks |= RCC_APB2ENR_IOPAEN;
-#endif
-#if defined(_GPIOB)
- clocks |= RCC_APB2ENR_IOPBEN;
-#endif
-#if defined(_GPIOC)
- clocks |= RCC_APB2ENR_IOPCEN;
-#endif
-#if defined(_GPIOD)
- clocks |= RCC_APB2ENR_IOPDEN;
-#endif
-#if defined(_GPIOE)
- clocks |= RCC_APB2ENR_IOPEEN;
-#endif
- RCC->APB2ENR |= clocks;
+ /*
+ * Enables the GPIO related clocks. + */
+ RCC->APB2ENR |= APB2_EN_MASK;
/*
* Resets the GPIO ports and AFIO. */
- RCC->APB2RSTR = RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST |
- RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPDRST |
- RCC_APB2RSTR_IOPERST | RCC_APB2RSTR_IOPFRST |
- RCC_APB2RSTR_IOPGRST | RCC_APB2RSTR_AFIORST;
+ RCC->APB2RSTR = APB2_RST_MASK;
RCC->APB2RSTR = 0;
-#if defined(_GPIOA)
IOPORT_A->ODR = config->PAData.odr;
IOPORT_A->CRH = config->PAData.crh;
IOPORT_A->CRL = config->PAData.crl;
-#endif
-
-#if defined(_GPIOB)
IOPORT_B->ODR = config->PBData.odr;
IOPORT_B->CRH = config->PBData.crh;
IOPORT_B->CRL = config->PBData.crl;
-#endif
-
-#if defined(_GPIOC)
IOPORT_C->ODR = config->PCData.odr;
IOPORT_C->CRH = config->PCData.crh;
IOPORT_C->CRL = config->PCData.crl;
-#endif
-
-#if defined(_GPIOD)
IOPORT_D->ODR = config->PDData.odr;
IOPORT_D->CRH = config->PDData.crh;
IOPORT_D->CRL = config->PDData.crl;
-#endif
-
-#if defined(_GPIOE)
+#if !defined(STM32F10X_LD) || defined(__DOXYGEN__)
IOPORT_E->ODR = config->PEData.odr;
IOPORT_E->CRH = config->PEData.crh;
IOPORT_E->CRL = config->PEData.crl;
#endif
-
-#if defined(_GPIOF)
+#if defined(STM32F10X_HD) || defined(__DOXYGEN__)
IOPORT_F->ODR = config->PFData.odr;
IOPORT_F->CRH = config->PFData.crh;
IOPORT_F->CRL = config->PFData.crl;
-#endif
-
-#if defined(_GPIOG)
IOPORT_G->ODR = config->PGData.odr;
IOPORT_G->CRH = config->PGData.crh;
IOPORT_G->CRL = config->PGData.crl;
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