diff options
Diffstat (limited to 'testhal/STM32/CAN')
| -rw-r--r-- | testhal/STM32/CAN/ch.ld | 69 | ||||
| -rw-r--r-- | testhal/STM32/CAN/chconf.h | 47 | ||||
| -rw-r--r-- | testhal/STM32/CAN/halconf.h | 68 | ||||
| -rw-r--r-- | testhal/STM32/CAN/main.c | 25 | ||||
| -rw-r--r-- | testhal/STM32/CAN/mcuconf.h | 58 |
5 files changed, 191 insertions, 76 deletions
diff --git a/testhal/STM32/CAN/ch.ld b/testhal/STM32/CAN/ch.ld index 44f494121..4d97e7682 100644 --- a/testhal/STM32/CAN/ch.ld +++ b/testhal/STM32/CAN/ch.ld @@ -1,5 +1,6 @@ /*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
@@ -37,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS
{
. = 0;
+ _text = .;
- .text : ALIGN(16) SUBALIGN(16)
+ startup : ALIGN(16) SUBALIGN(16)
{
- _text = .;
KEEP(*(vectors))
+ } > flash
+
+ constructors : ALIGN(4) SUBALIGN(4)
+ {
+ PROVIDE(__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE(__init_array_end = .);
+ } > flash
+
+ destructors : ALIGN(4) SUBALIGN(4)
+ {
+ PROVIDE(__fini_array_start = .);
+ KEEP(*(.fini_array))
+ KEEP(*(SORT(.fini_array.*)))
+ PROVIDE(__fini_array_end = .);
+ } > flash
+
+ .text : ALIGN(16) SUBALIGN(16)
+ {
+ *(.text.startup.*)
*(.text)
*(.text.*)
*(.rodata)
@@ -51,31 +73,26 @@ SECTIONS *(.gcc*)
} > flash
- .ctors :
+ .ARM.extab :
{
- PROVIDE(_ctors_start_ = .);
- KEEP(*(SORT(.ctors.*)))
- KEEP(*(.ctors))
- PROVIDE(_ctors_end_ = .);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
} > flash
- .dtors :
+ .ARM.exidx : {
+ PROVIDE(__exidx_start = .);
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ PROVIDE(__exidx_end = .);
+ } > flash
+
+ .eh_frame_hdr :
{
- PROVIDE(_dtors_start_ = .);
- KEEP(*(SORT(.dtors.*)))
- KEEP(*(.dtors))
- PROVIDE(_dtors_end_ = .);
+ *(.eh_frame_hdr)
} > flash
- .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
-
- __exidx_start = .;
- .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
- __exidx_end = .;
-
- .eh_frame_hdr : {*(.eh_frame_hdr)}
-
- .eh_frame : ONLY_IF_RO {*(.eh_frame)}
+ .eh_frame : ONLY_IF_RO
+ {
+ *(.eh_frame)
+ } > flash
. = ALIGN(4);
_etext = .;
@@ -83,26 +100,26 @@ SECTIONS .data :
{
- _data = .;
+ PROVIDE(_data = .);
*(.data)
. = ALIGN(4);
*(.data.*)
. = ALIGN(4);
*(.ramtext)
. = ALIGN(4);
- _edata = .;
+ PROVIDE(_edata = .);
} > ram AT > flash
.bss :
{
- _bss_start = .;
+ PROVIDE(_bss_start = .);
*(.bss)
. = ALIGN(4);
*(.bss.*)
. = ALIGN(4);
*(COMMON)
. = ALIGN(4);
- _bss_end = .;
+ PROVIDE(_bss_end = .);
} > ram
}
diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h index 3353391ca..c9c4c286a 100644 --- a/testhal/STM32/CAN/chconf.h +++ b/testhal/STM32/CAN/chconf.h @@ -1,5 +1,6 @@ /*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
@@ -83,12 +84,29 @@ *
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
- * @note Requires @p CH_USE_COREMEM.
+ * @note Requires @p CH_USE_MEMCORE.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 0
#endif
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread automatically. The application has
+ * then the responsibility to do one of the following:
+ * - Spawn a custom idle thread at priority @p IDLEPRIO.
+ * - Change the main() thread priority to @p IDLEPRIO then enter
+ * an endless loop. In this scenario the @p main() thread acts as
+ * the idle thread.
+ * .
+ * @note Unless an idle thread is spawned the @p main() thread must not
+ * enter a sleep state.
+ */
+#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
+#define CH_NO_IDLE_THREAD FALSE
+#endif
+
/*===========================================================================*/
/* Performance options. */
/*===========================================================================*/
@@ -105,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE
#endif
-/**
- * @brief Exotic optimization.
- * @details If defined then a CPU register is used as storage for the global
- * @p currp variable. Caching this variable in a register greatly
- * improves both space and time OS efficiency. A side effect is that
- * one less register has to be saved during the context switch
- * resulting in lower RAM usage and faster context switch.
- *
- * @note This option is only usable with the GCC compiler and is only useful
- * on processors with many registers like ARM cores.
- * @note If this option is enabled then ALL the libraries linked to the
- * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
- * -ffixed-@<reg@>.
- * @note This option must be enabled in the Makefile, it is listed here for
- * documentation only.
- */
-#if defined(__DOXYGEN__)
-#define CH_CURRP_REGISTER_CACHE "reg"
-#endif
-
/*===========================================================================*/
/* Subsystem options. */
/*===========================================================================*/
@@ -280,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
- * @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
@@ -303,7 +300,7 @@ * in the kernel.
*
* @note The default is @p TRUE.
- * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or
+ * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
@@ -318,7 +315,7 @@ *
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
- * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the
+ * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index 10ecca545..a7ae76b45 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -1,5 +1,6 @@ /*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
@@ -55,6 +56,13 @@ #endif
/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT FALSE
+#endif
+
+/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
@@ -62,6 +70,13 @@ #endif
/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
@@ -83,6 +98,13 @@ #endif
/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
@@ -90,6 +112,13 @@ #endif
/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
@@ -103,6 +132,13 @@ #define HAL_USE_UART FALSE
#endif
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
@@ -207,6 +243,36 @@ /*===========================================================================*/
/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intevals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
diff --git a/testhal/STM32/CAN/main.c b/testhal/STM32/CAN/main.c index ab7fb1c5e..c8879d6d4 100644 --- a/testhal/STM32/CAN/main.c +++ b/testhal/STM32/CAN/main.c @@ -1,5 +1,6 @@ /*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
@@ -42,7 +43,7 @@ static msg_t can_rx(void *p) { CANRxFrame rxmsg;
(void)p;
- chEvtRegister(&CAND1.cd_rxfull_event, &el, 0);
+ chEvtRegister(&CAND1.rxfull_event, &el, 0);
while(!chThdShouldTerminate()) {
if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0)
continue;
@@ -51,24 +52,24 @@ static msg_t can_rx(void *p) { palTogglePad(IOPORT3, GPIOC_LED);
}
}
- chEvtUnregister(&CAND1.cd_rxfull_event, &el);
+ chEvtUnregister(&CAND1.rxfull_event, &el);
return 0;
}
/*
- * Transmitter thread. + * Transmitter thread.
*/
static WORKING_AREA(can_tx_wa, 256);
static msg_t can_tx(void * p) {
CANTxFrame txmsg;
(void)p;
- txmsg.cf_IDE = CAN_IDE_EXT;
- txmsg.cf_EID = 0x01234567;
- txmsg.cf_RTR = CAN_RTR_DATA;
- txmsg.cf_DLC = 8;
- txmsg.cf_data32[0] = 0x55AA55AA;
- txmsg.cf_data32[1] = 0x00FF00FF;
+ txmsg.IDE = CAN_IDE_EXT;
+ txmsg.EID = 0x01234567;
+ txmsg.RTR = CAN_RTR_DATA;
+ txmsg.DLC = 8;
+ txmsg.data32[0] = 0x55AA55AA;
+ txmsg.data32[1] = 0x00FF00FF;
while (!chThdShouldTerminate()) {
canTransmit(&CAND1, &txmsg, MS2ST(100));
@@ -93,12 +94,12 @@ int main(void) { chSysInit();
/*
- * Activates the CAN driver 1. + * Activates the CAN driver 1.
*/
canStart(&CAND1, &cancfg);
/*
- * Starting the transmitter and receiver threads. + * Starting the transmitter and receiver threads.
*/
chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL);
chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL);
diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index 4e640b93f..8f6199e69 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -1,5 +1,6 @@ /*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
@@ -49,9 +50,9 @@ * ADC driver system settings.
*/
#define STM32_ADC_USE_ADC1 TRUE
-#define STM32_ADC_ADC1_DMA_PRIORITY 3
+#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
-#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
/*
* CAN driver system settings.
@@ -60,8 +61,37 @@ #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1 FALSE
+#define STM32_GPT_USE_TIM2 FALSE
+#define STM32_GPT_USE_TIM3 FALSE
+#define STM32_GPT_USE_TIM4 FALSE
+#define STM32_GPT_USE_TIM5 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY 7
+#define STM32_GPT_TIM2_IRQ_PRIORITY 7
+#define STM32_GPT_TIM3_IRQ_PRIORITY 7
+#define STM32_GPT_TIM4_IRQ_PRIORITY 7
+#define STM32_GPT_TIM5_IRQ_PRIORITY 7
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1 FALSE
+#define STM32_ICU_USE_TIM2 FALSE
+#define STM32_ICU_USE_TIM3 FALSE
+#define STM32_ICU_USE_TIM4 TRUE
+#define STM32_ICU_USE_TIM5 FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY 7
+#define STM32_ICU_TIM2_IRQ_PRIORITY 7
+#define STM32_ICU_TIM3_IRQ_PRIORITY 7
+#define STM32_ICU_TIM4_IRQ_PRIORITY 7
+#define STM32_ICU_TIM5_IRQ_PRIORITY 7
+
+/*
* PWM driver system settings.
*/
+#define STM32_PWM_USE_ADVANCED TRUE
#define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
@@ -93,15 +123,13 @@ #define STM32_SPI_USE_SPI1 TRUE
#define STM32_SPI_USE_SPI2 TRUE
#define STM32_SPI_USE_SPI3 FALSE
-#define STM32_SPI_SPI1_DMA_PRIORITY 2
-#define STM32_SPI_SPI2_DMA_PRIORITY 2
-#define STM32_SPI_SPI3_DMA_PRIORITY 2
+#define STM32_SPI_SPI1_DMA_PRIORITY 1
+#define STM32_SPI_SPI2_DMA_PRIORITY 1
+#define STM32_SPI_SPI3_DMA_PRIORITY 1
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
-#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt()
-#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt()
-#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
/*
* UART driver system settings.
@@ -115,6 +143,12 @@ #define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
-#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt()
-#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt()
-#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1 TRUE
+#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY 6
+#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
|