From 52d583ec3b89f04d4daa3688026bde568315b64c Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 19 Jan 2018 10:13:44 +0000 Subject: Fixed #912. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11343 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h | 4 ++++ demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h | 4 ++++ os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c | 5 +++-- os/hal/ports/STM32/STM32F7xx/stm32_rcc.h | 23 +++++++++++++++++++++++ os/hal/ports/STM32/STM32H7xx/stm32_rcc.h | 23 +++++++++++++++++++++++ readme.txt | 2 ++ 6 files changed, 59 insertions(+), 2 deletions(-) diff --git a/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h b/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h index 019836253..8197d77e5 100644 --- a/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h +++ b/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h @@ -258,13 +258,17 @@ * SDC driver system settings. */ #define STM32_SDC_USE_SDMMC1 FALSE +#define STM32_SDC_USE_SDMMC2 FALSE #define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE #define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000 #define STM32_SDC_SDMMC_READ_TIMEOUT 1000 #define STM32_SDC_SDMMC_CLOCK_DELAY 10 #define STM32_SDC_SDMMC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SDC_SDMMC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SDC_SDMMC1_DMA_PRIORITY 3 +#define STM32_SDC_SDMMC2_DMA_PRIORITY 3 #define STM32_SDC_SDMMC1_IRQ_PRIORITY 9 +#define STM32_SDC_SDMMC2_IRQ_PRIORITY 9 /* * SERIAL driver system settings. diff --git a/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h b/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h index 771168c40..2a48283a8 100644 --- a/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h +++ b/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h @@ -258,13 +258,17 @@ * SDC driver system settings. */ #define STM32_SDC_USE_SDMMC1 FALSE +#define STM32_SDC_USE_SDMMC2 FALSE #define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE #define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000 #define STM32_SDC_SDMMC_READ_TIMEOUT 1000 #define STM32_SDC_SDMMC_CLOCK_DELAY 10 #define STM32_SDC_SDMMC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SDC_SDMMC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SDC_SDMMC1_DMA_PRIORITY 3 +#define STM32_SDC_SDMMC2_DMA_PRIORITY 3 #define STM32_SDC_SDMMC1_IRQ_PRIORITY 9 +#define STM32_SDC_SDMMC2_IRQ_PRIORITY 9 /* * SERIAL driver system settings. diff --git a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c index fda4db30a..bf2398711 100644 --- a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c +++ b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c @@ -424,8 +424,7 @@ void sdc_lld_start(SDCDriver *sdcp) { sdcp->config = &sdc_default_cfg; } - sdcp->dmamode = STM32_DMA_CR_CHSEL(SDMMC1_DMA_CHANNEL) | - STM32_DMA_CR_PL(STM32_SDC_SDMMC1_DMA_PRIORITY) | + sdcp->dmamode = STM32_DMA_CR_PL(STM32_SDC_SDMMC1_DMA_PRIORITY) | STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC; @@ -445,6 +444,7 @@ void sdc_lld_start(SDCDriver *sdcp) { osalDbgAssert(!b, "stream already allocated"); + sdcp->dmamode |= STM32_DMA_CR_CHSEL(SDMMC1_DMA_CHANNEL); dmaStreamSetPeripheral(sdcp->dma, &sdcp->sdmmc->FIFO); #if STM32_DMA_ADVANCED dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | @@ -461,6 +461,7 @@ void sdc_lld_start(SDCDriver *sdcp) { osalDbgAssert(!b, "stream already allocated"); + sdcp->dmamode |= STM32_DMA_CR_CHSEL(SDMMC2_DMA_CHANNEL); dmaStreamSetPeripheral(sdcp->dma, &sdcp->sdmmc->FIFO); #if STM32_DMA_ADVANCED dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | diff --git a/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h index a34ced725..dbe89349e 100644 --- a/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h @@ -772,6 +772,29 @@ * @api */ #define rccResetSDMMC1() rccResetAPB2(RCC_APB2RSTR_SDMMC1RST) + +/** + * @brief Enables the SDMMC2 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableSDMMC2(lp) rccEnableAPB2(RCC_APB2ENR_SDMMC2EN, lp) + +/** + * @brief Disables the SDMMC2 peripheral clock. + * + * @api + */ +#define rccDisableSDMMC2() rccDisableAPB2(RCC_APB2ENR_SDMMC2EN) + +/** + * @brief Resets the SDMMC2 peripheral. + * + * @api + */ +#define rccResetSDMMC2() rccResetAPB2(RCC_APB2RSTR_SDMMC2RST) /** @} */ /** diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h index b258f79b1..ce5650c70 100644 --- a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h @@ -890,6 +890,29 @@ * @api */ #define rccResetSDMMC1() rccResetAHB3(RCC_AHB3RSTR_SDMMC1RST) + +/** + * @brief Enables the SDMMC2 peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableSDMMC2(lp) rccEnableAHB3(RCC_AHB3ENR_SDMMC2EN, lp) + +/** + * @brief Disables the SDMMC2 peripheral clock. + * + * @api + */ +#define rccDisableSDMMC2() rccDisableAHB3(RCC_AHB3ENR_SDMMC2EN) + +/** + * @brief Resets the SDMMC2 peripheral. + * + * @api + */ +#define rccResetSDMMC2() rccResetAHB3(RCC_AHB3RSTR_SDMMC2RST) /** @} */ /** diff --git a/readme.txt b/readme.txt index f1dbbe31a..647a93256 100644 --- a/readme.txt +++ b/readme.txt @@ -166,6 +166,8 @@ dependencies and configuration directories. This makes possible to have multiple non-conflicting makefiles in the same project. Updated the various platform.mk implementing "smart build" mode. +- HAL: Fixed STM32 SDMMCv1 driver not setting DMA channel properly for SDCD2 + instance (bug #912)(backported to 17.6.4). - LIB: Fixed inner semaphore not updated in chGuardedPoolAllocI() function (bug #911). - RT: Fixed compile error with assertions enabled and dynamic extensions -- cgit v1.2.3