From fe3507eb99e7c411fb12c94ac38f3b689fcb7caa Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 15 Oct 2017 10:58:26 +0000 Subject: More headers updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10825 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/common/ext/ST/STM32F3xx/stm32f302xc.h | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) (limited to 'os/common/ext/ST/STM32F3xx/stm32f302xc.h') diff --git a/os/common/ext/ST/STM32F3xx/stm32f302xc.h b/os/common/ext/ST/STM32F3xx/stm32f302xc.h index 68e6441e4..807124fcc 100644 --- a/os/common/ext/ST/STM32F3xx/stm32f302xc.h +++ b/os/common/ext/ST/STM32F3xx/stm32f302xc.h @@ -2,8 +2,6 @@ ****************************************************************************** * @file stm32f302xc.h * @author MCD Application Team - * @version V2.3.1 - * @date 16-December-2016 * @brief CMSIS STM32F302xC Devices Peripheral Access Layer Header File. * * This file contains: @@ -7343,9 +7341,15 @@ typedef struct #define EXTI_IMR2_IM34 EXTI_IMR2_MR34 #define EXTI_IMR2_IM35 EXTI_IMR2_MR35 +#if defined(EXTI_IMR2_MR33) #define EXTI_IMR2_IM_Pos (0U) #define EXTI_IMR2_IM_Msk (0xFU << EXTI_IMR2_IM_Pos) /*!< 0x0000000F */ #define EXTI_IMR2_IM EXTI_IMR2_IM_Msk +#else +#define EXTI_IMR2_IM_Pos (0U) +#define EXTI_IMR2_IM_Msk (0xDU << EXTI_IMR2_IM_Pos) /*!< 0x0000000D */ +#define EXTI_IMR2_IM EXTI_IMR2_IM_Msk +#endif /******************* Bit definition for EXTI_EMR2 ****************************/ #define EXTI_EMR2_MR32_Pos (0U) @@ -7366,6 +7370,16 @@ typedef struct #define EXTI_EMR2_EM34 EXTI_EMR2_MR34 #define EXTI_EMR2_EM35 EXTI_EMR2_MR35 +#if defined(EXTI_EMR2_MR33) +#define EXTI_EMR2_EM_Pos (0U) +#define EXTI_EMR2_EM_Msk (0xFU << EXTI_EMR2_EM_Pos) /*!< 0x0000000F */ +#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk +#else +#define EXTI_EMR2_EM_Pos (0U) +#define EXTI_EMR2_EM_Msk (0xDU << EXTI_EMR2_EM_Pos) /*!< 0x0000000D */ +#define EXTI_EMR2_EM EXTI_EMR2_EM_Msk +#endif + /****************** Bit definition for EXTI_RTSR2 register ********************/ #define EXTI_RTSR2_TR32_Pos (0U) #define EXTI_RTSR2_TR32_Msk (0x1U << EXTI_RTSR2_TR32_Pos) /*!< 0x00000001 */ @@ -9295,9 +9309,9 @@ typedef struct #define RTC_CR_COSEL_Pos (19U) #define RTC_CR_COSEL_Msk (0x1U << RTC_CR_COSEL_Pos) /*!< 0x00080000 */ #define RTC_CR_COSEL RTC_CR_COSEL_Msk -#define RTC_CR_BCK_Pos (18U) -#define RTC_CR_BCK_Msk (0x1U << RTC_CR_BCK_Pos) /*!< 0x00040000 */ -#define RTC_CR_BCK RTC_CR_BCK_Msk +#define RTC_CR_BKP_Pos (18U) +#define RTC_CR_BKP_Msk (0x1U << RTC_CR_BKP_Pos) /*!< 0x00040000 */ +#define RTC_CR_BKP RTC_CR_BKP_Msk #define RTC_CR_SUB1H_Pos (17U) #define RTC_CR_SUB1H_Msk (0x1U << RTC_CR_SUB1H_Pos) /*!< 0x00020000 */ #define RTC_CR_SUB1H RTC_CR_SUB1H_Msk @@ -9347,6 +9361,11 @@ typedef struct #define RTC_CR_WUCKSEL_1 (0x2U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000002 */ #define RTC_CR_WUCKSEL_2 (0x4U << RTC_CR_WUCKSEL_Pos) /*!< 0x00000004 */ +/* Legacy defines */ +#define RTC_CR_BCK_Pos RTC_CR_BKP_Pos +#define RTC_CR_BCK_Msk RTC_CR_BKP_Msk +#define RTC_CR_BCK RTC_CR_BKP + /******************** Bits definition for RTC_ISR register ******************/ #define RTC_ISR_RECALPF_Pos (16U) #define RTC_ISR_RECALPF_Msk (0x1U << RTC_ISR_RECALPF_Pos) /*!< 0x00010000 */ -- cgit v1.2.3