From 167f5bc8781dd66539cd5db5a48f465457d9a8bb Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 22 Mar 2010 12:29:20 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1769 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/adc_lld.h | 5 +++-- os/hal/platforms/STM32/can_lld.h | 5 +++-- os/hal/platforms/STM32/hal_lld.c | 6 +++--- os/hal/platforms/STM32/pwm_lld.h | 20 ++++++++++++-------- os/hal/platforms/STM32/serial_lld.h | 30 ++++++++++++++++++------------ os/hal/platforms/STM32/spi_lld.h | 4 ++-- 6 files changed, 41 insertions(+), 29 deletions(-) (limited to 'os/hal/platforms/STM32') diff --git a/os/hal/platforms/STM32/adc_lld.h b/os/hal/platforms/STM32/adc_lld.h index 7e62a618c..bbc21244b 100644 --- a/os/hal/platforms/STM32/adc_lld.h +++ b/os/hal/platforms/STM32/adc_lld.h @@ -77,10 +77,11 @@ /** * @brief ADC1 interrupt priority level setting. - * @note @p BASEPRI_KERNEL >= @p STM32_ADC1_IRQ_PRIORITY > @p PRIORITY_PENDSV. + * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_ADC1_IRQ_PRIORITY > + * @p CORTEX_PRIORITY_PENDSV. */ #if !defined(STM32_ADC1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_ADC1_IRQ_PRIORITY 0x50 +#define STM32_ADC1_IRQ_PRIORITY CORTEX_PRIORITY(5) #endif /** diff --git a/os/hal/platforms/STM32/can_lld.h b/os/hal/platforms/STM32/can_lld.h index 25f8a2105..7f1770770 100644 --- a/os/hal/platforms/STM32/can_lld.h +++ b/os/hal/platforms/STM32/can_lld.h @@ -83,10 +83,11 @@ /** * @brief CAN1 interrupt priority level setting. - * @note @p BASEPRI_KERNEL >= @p STM32_SPI1_IRQ_PRIORITY > @p PRIORITY_PENDSV. + * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_SPI1_IRQ_PRIORITY > + * @p CORTEX_PRIORITY_PENDSV. */ #if !defined(STM32_CAN1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_CAN1_IRQ_PRIORITY 0xB0 +#define STM32_CAN1_IRQ_PRIORITY CORTEX_PRIORITY(11) #endif /*===========================================================================*/ diff --git a/os/hal/platforms/STM32/hal_lld.c b/os/hal/platforms/STM32/hal_lld.c index 616a2b4df..59e4fee58 100644 --- a/os/hal/platforms/STM32/hal_lld.c +++ b/os/hal/platforms/STM32/hal_lld.c @@ -75,9 +75,9 @@ void hal_lld_init(void) { /* Note: PRIGROUP 4:0 (4:4).*/ SCB->AIRCR = AIRCR_VECTKEY | SCB_AIRCR_PRIGROUP_0 | SCB_AIRCR_PRIGROUP_1; - NVICSetSystemHandlerPriority(HANDLER_SVCALL, PRIORITY_SVCALL); - NVICSetSystemHandlerPriority(HANDLER_SYSTICK, PRIORITY_SYSTICK); - NVICSetSystemHandlerPriority(HANDLER_PENDSV, PRIORITY_PENDSV); + NVICSetSystemHandlerPriority(HANDLER_SVCALL, CORTEX_PRIORITY_SVCALL); + NVICSetSystemHandlerPriority(HANDLER_SYSTICK, CORTEX_PRIORITY_SYSTICK); + NVICSetSystemHandlerPriority(HANDLER_PENDSV, CORTEX_PRIORITY_PENDSV); /* Systick initialization.*/ SysTick->LOAD = SYSCLK / (8000000 / CH_FREQUENCY) - 1; diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h index 3a772d023..9e7cbd080 100644 --- a/os/hal/platforms/STM32/pwm_lld.h +++ b/os/hal/platforms/STM32/pwm_lld.h @@ -80,34 +80,38 @@ /** * @brief PWM1 interrupt priority level setting. - * @note @p BASEPRI_KERNEL >= @p STM32_PWM1_IRQ_PRIORITY > @p PRIORITY_PENDSV. + * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_PWM1_IRQ_PRIORITY > + * @p CORTEX_PRIORITY_PENDSV. */ #if !defined(STM32_PWM1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_PWM1_IRQ_PRIORITY 0x70 +#define STM32_PWM1_IRQ_PRIORITY CORTEX_PRIORITY(7) #endif /** * @brief PWM2 interrupt priority level setting. - * @note @p BASEPRI_KERNEL >= @p STM32_PWM2_IRQ_PRIORITY > @p PRIORITY_PENDSV. + * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_PWM2_IRQ_PRIORITY > + * @p CORTEX_PRIORITY_PENDSV. */ #if !defined(STM32_PWM2_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_PWM2_IRQ_PRIORITY 0x70 +#define STM32_PWM2_IRQ_PRIORITY CORTEX_PRIORITY(7) #endif /** * @brief PWM3 interrupt priority level setting. - * @note @p BASEPRI_KERNEL >= @p STM32_PWM3_IRQ_PRIORITY > @p PRIORITY_PENDSV. + * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_PWM3_IRQ_PRIORITY > + * @p CORTEX_PRIORITY_PENDSV. */ #if !defined(STM32_PWM3_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_PWM3_IRQ_PRIORITY 0x70 +#define STM32_PWM3_IRQ_PRIORITY CORTEX_PRIORITY(7) #endif /** * @brief PWM4 interrupt priority level setting. - * @note @p BASEPRI_KERNEL >= @p STM32_PWM4_IRQ_PRIORITY > @p PRIORITY_PENDSV. + * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_PWM4_IRQ_PRIORITY > + * @p CORTEX_PRIORITY_PENDSV. */ #if !defined(STM32_PWM4_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_PWM4_IRQ_PRIORITY 0x80 +#define STM32_PWM4_IRQ_PRIORITY CORTEX_PRIORITY(7) #endif /*===========================================================================*/ diff --git a/os/hal/platforms/STM32/serial_lld.h b/os/hal/platforms/STM32/serial_lld.h index eb6764bb5..1fee0e879 100644 --- a/os/hal/platforms/STM32/serial_lld.h +++ b/os/hal/platforms/STM32/serial_lld.h @@ -72,7 +72,7 @@ * @note The default is @p FALSE. */ #if !defined(USE_STM32_UART4) || defined(__DOXYGEN__) -#define USE_STM32_UART4 TRUE +#define USE_STM32_UART4 TRUE #endif /** @@ -81,51 +81,57 @@ * @note The default is @p FALSE. */ #if !defined(USE_STM32_USART3) || defined(__DOXYGEN__) -#define USE_STM32_UART5 TRUE +#define USE_STM32_UART5 TRUE #endif #endif /** * @brief USART1 interrupt priority level setting. - * @note @p BASEPRI_KERNEL >= @p STM32_USART1_PRIORITY > @p PRIORITY_PENDSV. + * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART1_PRIORITY > + * @p CORTEX_PRIORITY_PENDSV. */ #if !defined(STM32_USART1_PRIORITY) || defined(__DOXYGEN__) -#define STM32_USART1_PRIORITY 0xC0 +#define STM32_USART1_PRIORITY CORTEX_PRIORITY(12) #endif /** * @brief USART2 interrupt priority level setting. - * @note @p BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > @p PRIORITY_PENDSV. + * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > + * @p CORTEX_PRIORITY_PENDSV. */ #if !defined(STM32_USART2_PRIORITY) || defined(__DOXYGEN__) -#define STM32_USART2_PRIORITY 0xC0 +#define STM32_USART2_PRIORITY CORTEX_PRIORITY(12) #endif /** * @brief USART3 interrupt priority level setting. - * @note @p BASEPRI_KERNEL >= @p STM32_USART3_PRIORITY > @p PRIORITY_PENDSV. + * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART3_PRIORITY > + * @p CORTEX_PRIORITY_PENDSV. */ #if !defined(STM32_USART3_PRIORITY) || defined(__DOXYGEN__) -#define STM32_USART3_PRIORITY 0xC0 +#define STM32_USART3_PRIORITY CORTEX_PRIORITY(12) #endif #if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(__DOXYGEN__) /** * @brief UART4 interrupt priority level setting. - * @note @p BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > @p PRIORITY_PENDSV. + * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > + * @p CORTEX_PRIORITY_PENDSV. */ #if !defined(STM32_UART4_PRIORITY) || defined(__DOXYGEN__) -#define STM32_UART4_PRIORITY 0xC0 +#define STM32_UART4_PRIORITY CORTEX_PRIORITY(12) #endif /** * @brief UART5 interrupt priority level setting. - * @note @p BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > @p PRIORITY_PENDSV. + * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > + * @p CORTEX_PRIORITY_PENDSV. */ #if !defined(STM32_UART5_PRIORITY) || defined(__DOXYGEN__) -#define STM32_UART5_PRIORITY 0xC0 +#define STM32_UART5_PRIORITY CORTEX_PRIORITY(12) #endif #endif + /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ diff --git a/os/hal/platforms/STM32/spi_lld.h b/os/hal/platforms/STM32/spi_lld.h index 3be86365c..6d8d2a257 100644 --- a/os/hal/platforms/STM32/spi_lld.h +++ b/os/hal/platforms/STM32/spi_lld.h @@ -80,7 +80,7 @@ * @note @p BASEPRI_KERNEL >= @p STM32_SPI1_IRQ_PRIORITY > @p PRIORITY_PENDSV. */ #if !defined(STM32_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_SPI1_IRQ_PRIORITY 0xA0 +#define STM32_SPI1_IRQ_PRIORITY CORTEX_PRIORITY(10) #endif /** @@ -88,7 +88,7 @@ * @note @p BASEPRI_KERNEL >= @p STM32_SPI2_IRQ_PRIORITY > @p PRIORITY_PENDSV. */ #if !defined(STM32_SPI2_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_SPI2_IRQ_PRIORITY 0xA0 +#define STM32_SPI2_IRQ_PRIORITY CORTEX_PRIORITY(10) #endif /** -- cgit v1.2.3