From 518fd1d0c7545ff362be8b4051d455a4e1937712 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 9 Sep 2012 07:36:08 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4643 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32F0xx/platform.dox | 296 ++++++++++++++++++++++++++++++++ 1 file changed, 296 insertions(+) create mode 100644 os/hal/platforms/STM32F0xx/platform.dox (limited to 'os/hal/platforms/STM32F0xx/platform.dox') diff --git a/os/hal/platforms/STM32F0xx/platform.dox b/os/hal/platforms/STM32F0xx/platform.dox new file mode 100644 index 000000000..dcbd78040 --- /dev/null +++ b/os/hal/platforms/STM32F0xx/platform.dox @@ -0,0 +1,296 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @defgroup STM32F0xx_DRIVERS STM32F0xx Drivers + * @details This section describes all the supported drivers on the STM32F0xx + * platform and the implementation details of the single drivers. + * + * @ingroup platforms + */ + +/** + * @defgroup STM32F0xx_HAL STM32F0xx Initialization Support + * @details The STM32F0xx HAL support is responsible for system initialization. + * + * @section stm32f0xx_hal_1 Supported HW resources + * - PLL1. + * - RCC. + * - Flash. + * . + * @section stm32f0xx_hal_2 STM32F0xx HAL driver implementation features + * - PLL startup and stabilization. + * - Clock tree initialization. + * - Clock source selection. + * - Flash wait states initialization based on the selected clock options. + * - SYSTICK initialization based on current clock and kernel required rate. + * - DMA support initialization. + * . + * @ingroup STM32F0xx_DRIVERS + */ + +/** + * @defgroup STM32F0xx_ADC STM32F0xx ADC Support + * @details The STM32F0xx ADC driver supports the ADC peripherals using DMA + * channels for maximum performance. + * + * @section stm32f0xx_adc_1 Supported HW resources + * - ADC1. + * - DMA1. + * . + * @section stm32f0xx_adc_2 STM32F0xx ADC driver implementation features + * - Clock stop for reduced power usage when the driver is in stop state. + * - Streaming conversion using DMA for maximum performance. + * - Programmable ADC interrupt priority level. + * - Programmable DMA bus priority for each DMA channel. + * - Programmable DMA interrupt priority for each DMA channel. + * - DMA errors detection. + * . + * @ingroup STM32F0xx_DRIVERS + */ + +/** + * @defgroup STM32F0xx_EXT STM32F0xx EXT Support + * @details The STM32F0xx EXT driver uses the EXTI peripheral. + * + * @section stm32f0xx_ext_1 Supported HW resources + * - EXTI. + * . + * @section stm32f0xx_ext_2 STM32F0xx EXT driver implementation features + * - Each EXTI channel can be independently enabled and programmed. + * - Programmable EXTI interrupts priority level. + * - Capability to work as event sources (WFE) rather than interrupt sources. + * . + * @ingroup STM32F0xx_DRIVERS + */ + +/** + * @defgroup STM32F0xx_GPT STM32F0xx GPT Support + * @details The STM32F0xx GPT driver uses the TIMx peripherals. + * + * @section stm32f0xx_gpt_1 Supported HW resources + * - TIM1. + * - TIM2. + * - TIM3. + * . + * @section stm32f0xx_gpt_2 STM32F0xx GPT driver implementation features + * - Each timer can be independently enabled and programmed. Unused + * peripherals are left in low power mode. + * - Programmable TIMx interrupts priority level. + * . + * @ingroup STM32F0xx_DRIVERS + */ + +/** + * @defgroup STM32F0xx_ICU STM32F0xx ICU Support + * @details The STM32F0xx ICU driver uses the TIMx peripherals. + * + * @section stm32f0xx_icu_1 Supported HW resources + * - TIM1. + * - TIM2. + * - TIM3. + * . + * @section stm32f0xx_icu_2 STM32F0xx ICU driver implementation features + * - Each timer can be independently enabled and programmed. Unused + * peripherals are left in low power mode. + * - Programmable TIMx interrupts priority level. + * . + * @ingroup STM32F0xx_DRIVERS + */ + +/** + * @defgroup STM32F0xx_PAL STM32F0xx PAL Support + * @details The STM32F0xx PAL driver uses the GPIO peripherals. + * + * @section stm32f0xx_pal_1 Supported HW resources + * - GPIOA. + * - GPIOB. + * - GPIOC. + * - GPIOD. + * - GPIOF. + * . + * @section stm32f0xx_pal_2 STM32F0xx PAL driver implementation features + * The PAL driver implementation fully supports the following hardware + * capabilities: + * - 16 bits wide ports. + * - Atomic set/reset functions. + * - Atomic set+reset function (atomic bus operations). + * - Output latched regardless of the pad setting. + * - Direct read of input pads regardless of the pad setting. + * . + * @section stm32f0xx_pal_3 Supported PAL setup modes + * The STM32F0xx PAL driver supports the following I/O modes: + * - @p PAL_MODE_RESET. + * - @p PAL_MODE_UNCONNECTED. + * - @p PAL_MODE_INPUT. + * - @p PAL_MODE_INPUT_PULLUP. + * - @p PAL_MODE_INPUT_PULLDOWN. + * - @p PAL_MODE_INPUT_ANALOG. + * - @p PAL_MODE_OUTPUT_PUSHPULL. + * - @p PAL_MODE_OUTPUT_OPENDRAIN. + * - @p PAL_MODE_ALTERNATE (non standard). + * . + * Any attempt to setup an invalid mode is ignored. + * + * @section stm32f0xx_pal_4 Suboptimal behavior + * The STM32F0xx GPIO is less than optimal in several areas, the limitations + * should be taken in account while using the PAL driver: + * - Pad/port toggling operations are not atomic. + * - Pad/group mode setup is not atomic. + * . + * @ingroup STM32F0xx_DRIVERS + */ + +/** + * @defgroup STM32F0xx_PWM STM32F0xx PWM Support + * @details The STM32F0xx PWM driver uses the TIMx peripherals. + * + * @section stm32f0xx_pwm_1 Supported HW resources + * - TIM1. + * - TIM2. + * - TIM3. + * . + * @section stm32f0xx_pwm_2 STM32F0xx PWM driver implementation features + * - Each timer can be independently enabled and programmed. Unused + * peripherals are left in low power mode. + * - Four independent PWM channels per timer. + * - Programmable TIMx interrupts priority level. + * . + * @ingroup STM32F0xx_DRIVERS + */ + +/** + * @defgroup STM32F0xx_SERIAL STM32F0xx Serial Support + * @details The STM32F0xx Serial driver uses the USART/UART peripherals in a + * buffered, interrupt driven, implementation. + * + * @section stm32f0xx_serial_1 Supported HW resources + * The serial driver can support any of the following hardware resources: + * - USART1. + * - USART2. + * . + * @section stm32f0xx_serial_2 STM32F0xx Serial driver implementation features + * - Clock stop for reduced power usage when the driver is in stop state. + * - Each UART/USART can be independently enabled and programmed. Unused + * peripherals are left in low power mode. + * - Fully interrupt driven. + * - Programmable priority levels for each UART/USART. + * . + * @ingroup STM32F0xx_DRIVERS + */ + +/** + * @defgroup STM32F0xx_SPI STM32F0xx SPI Support + * @details The SPI driver supports the STM32F0xx SPI peripherals using DMA + * channels for maximum performance. + * + * @section stm32f0xx_spi_1 Supported HW resources + * - SPI1. + * - SPI2. + * - DMA1. + * . + * @section stm32f0xx_spi_2 STM32F0xx SPI driver implementation features + * - Clock stop for reduced power usage when the driver is in stop state. + * - Each SPI can be independently enabled and programmed. Unused + * peripherals are left in low power mode. + * - Programmable interrupt priority levels for each SPI. + * - DMA is used for receiving and transmitting. + * - Programmable DMA bus priority for each DMA channel. + * - Programmable DMA interrupt priority for each DMA channel. + * - Programmable DMA error hook. + * . + * @ingroup STM32F0xx_DRIVERS + */ + +/** + * @defgroup STM32F0xx_UART STM32F0xx UART Support + * @details The UART driver supports the STM32F0xx USART peripherals using DMA + * channels for maximum performance. + * + * @section stm32f0xx_uart_1 Supported HW resources + * The UART driver can support any of the following hardware resources: + * - USART1. + * - USART2. + * - DMA1. + * . + * @section stm32f0xx_uart_2 STM32F0xx UART driver implementation features + * - Clock stop for reduced power usage when the driver is in stop state. + * - Each UART/USART can be independently enabled and programmed. Unused + * peripherals are left in low power mode. + * - Programmable interrupt priority levels for each UART/USART. + * - DMA is used for receiving and transmitting. + * - Programmable DMA bus priority for each DMA channel. + * - Programmable DMA interrupt priority for each DMA channel. + * - Programmable DMA error hook. + * . + * @ingroup STM32F0xx_DRIVERS + */ + +/** + * @defgroup STM32F0xx_PLATFORM_DRIVERS STM32F0xx Platform Drivers + * @details Platform support drivers. Platform drivers do not implement HAL + * standard driver templates, their role is to support platform + * specific functionalities. + * + * @ingroup STM32F0xx_DRIVERS + */ + +/** + * @defgroup STM32F0xx_DMA STM32F0xx DMA Support + * @details This DMA helper driver is used by the other drivers in order to + * access the shared DMA resources in a consistent way. + * + * @section stm32f0xx_dma_1 Supported HW resources + * The DMA driver can support any of the following hardware resources: + * - DMA1. + * - DMA2 (where present). + * . + * @section stm32f0xx_dma_2 STM32F0xx DMA driver implementation features + * - Exports helper functions/macros to the other drivers that share the + * DMA resource. + * - Automatic DMA clock stop when not in use by any driver. + * - DMA streams and interrupt vectors sharing among multiple drivers. + * . + * @ingroup STM32F0xx_PLATFORM_DRIVERS + */ + +/** + * @defgroup STM32F0xx_ISR STM32F0xx ISR Support + * @details This ISR helper driver is used by the other drivers in order to + * map ISR names to physical vector names. + * + * @ingroup STM32F0xx_PLATFORM_DRIVERS + */ + +/** + * @defgroup STM32F0xx_RCC STM32F0xx RCC Support + * @details This RCC helper driver is used by the other drivers in order to + * access the shared RCC resources in a consistent way. + * + * @section stm32f0xx_rcc_1 Supported HW resources + * - RCC. + * . + * @section stm32f0xx_rcc_2 STM32F0xx RCC driver implementation features + * - Peripherals reset. + * - Peripherals clock enable. + * - Peripherals clock disable. + * . + * @ingroup STM32F0xx_PLATFORM_DRIVERS + */ -- cgit v1.2.3 From 184a71345c6a36a9a8664eda8fbcc3ea728267a8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 2 Feb 2013 10:58:09 +0000 Subject: Updated license years. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5102 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32F0xx/platform.dox | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'os/hal/platforms/STM32F0xx/platform.dox') diff --git a/os/hal/platforms/STM32F0xx/platform.dox b/os/hal/platforms/STM32F0xx/platform.dox index dcbd78040..871ecd526 100644 --- a/os/hal/platforms/STM32F0xx/platform.dox +++ b/os/hal/platforms/STM32F0xx/platform.dox @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. -- cgit v1.2.3 From 853216256ad4cdacf5f94edb7d6b738c6be165a1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 30 Mar 2013 10:32:37 +0000 Subject: Relicensing parts of the tree under the Apache 2.0 license. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5521 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32F0xx/platform.dox | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-) (limited to 'os/hal/platforms/STM32F0xx/platform.dox') diff --git a/os/hal/platforms/STM32F0xx/platform.dox b/os/hal/platforms/STM32F0xx/platform.dox index 871ecd526..c8caa2b89 100644 --- a/os/hal/platforms/STM32F0xx/platform.dox +++ b/os/hal/platforms/STM32F0xx/platform.dox @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** -- cgit v1.2.3