From 49d71a01abeefa000a4cd7a556052d826b096d49 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 20 Jul 2013 10:12:44 +0000 Subject: Renamed or added prefix to all hernel configuration options. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6010 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32L1xx/adc_lld.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'os/hal/platforms/STM32L1xx/adc_lld.h') diff --git a/os/hal/platforms/STM32L1xx/adc_lld.h b/os/hal/platforms/STM32L1xx/adc_lld.h index 2ac857c16..0f7864c37 100644 --- a/os/hal/platforms/STM32L1xx/adc_lld.h +++ b/os/hal/platforms/STM32L1xx/adc_lld.h @@ -346,12 +346,12 @@ struct ADCDriver { Thread *thread; #endif #if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) -#if CH_USE_MUTEXES || defined(__DOXYGEN__) +#if CH_CFG_USE_MUTEXES || defined(__DOXYGEN__) /** * @brief Mutex protecting the peripheral. */ Mutex mutex; -#elif CH_USE_SEMAPHORES +#elif CH_CFG_USE_SEMAPHORES Semaphore semaphore; #endif #endif /* ADC_USE_MUTUAL_EXCLUSION */ -- cgit v1.2.3 From 8ca210a4af9fd039e290cfcc309adde543999c1f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 9 Aug 2013 08:24:22 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6108 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32L1xx/adc_lld.h | 484 ----------------------------------- 1 file changed, 484 deletions(-) delete mode 100644 os/hal/platforms/STM32L1xx/adc_lld.h (limited to 'os/hal/platforms/STM32L1xx/adc_lld.h') diff --git a/os/hal/platforms/STM32L1xx/adc_lld.h b/os/hal/platforms/STM32L1xx/adc_lld.h deleted file mode 100644 index 0f7864c37..000000000 --- a/os/hal/platforms/STM32L1xx/adc_lld.h +++ /dev/null @@ -1,484 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file STM32L1xx/adc_lld.h - * @brief STM32L1xx ADC subsystem low level driver header. - * - * @addtogroup ADC - * @{ - */ - -#ifndef _ADC_LLD_H_ -#define _ADC_LLD_H_ - -#if HAL_USE_ADC || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/** - * @name Triggers selection - * @{ - */ -#define ADC_CR2_EXTSEL_SRC(n) ((n) << 24) /**< @brief Trigger source. */ -/** @} */ - -/** - * @name ADC clock divider settings - * @{ - */ -#define ADC_CCR_ADCPRE_DIV1 0 -#define ADC_CCR_ADCPRE_DIV2 1 -#define ADC_CCR_ADCPRE_DIV4 2 -/** @} */ - -/** - * @name Available analog channels - * @{ - */ -#define ADC_CHANNEL_IN0 0 /**< @brief External analog input 0. */ -#define ADC_CHANNEL_IN1 1 /**< @brief External analog input 1. */ -#define ADC_CHANNEL_IN2 2 /**< @brief External analog input 2. */ -#define ADC_CHANNEL_IN3 3 /**< @brief External analog input 3. */ -#define ADC_CHANNEL_IN4 4 /**< @brief External analog input 4. */ -#define ADC_CHANNEL_IN5 5 /**< @brief External analog input 5. */ -#define ADC_CHANNEL_IN6 6 /**< @brief External analog input 6. */ -#define ADC_CHANNEL_IN7 7 /**< @brief External analog input 7. */ -#define ADC_CHANNEL_IN8 8 /**< @brief External analog input 8. */ -#define ADC_CHANNEL_IN9 9 /**< @brief External analog input 9. */ -#define ADC_CHANNEL_IN10 10 /**< @brief External analog input 10. */ -#define ADC_CHANNEL_IN11 11 /**< @brief External analog input 11. */ -#define ADC_CHANNEL_IN12 12 /**< @brief External analog input 12. */ -#define ADC_CHANNEL_IN13 13 /**< @brief External analog input 13. */ -#define ADC_CHANNEL_IN14 14 /**< @brief External analog input 14. */ -#define ADC_CHANNEL_IN15 15 /**< @brief External analog input 15. */ -#define ADC_CHANNEL_SENSOR 16 /**< @brief Internal temperature sensor.*/ -#define ADC_CHANNEL_VREFINT 17 /**< @brief Internal reference. */ -#define ADC_CHANNEL_IN18 18 /**< @brief External analog input 18. */ -#define ADC_CHANNEL_IN19 19 /**< @brief External analog input 19. */ -#define ADC_CHANNEL_IN20 20 /**< @brief External analog input 20. */ -#define ADC_CHANNEL_IN21 21 /**< @brief External analog input 21. */ -#define ADC_CHANNEL_IN22 22 /**< @brief External analog input 22. */ -#define ADC_CHANNEL_IN23 23 /**< @brief External analog input 23. */ -#define ADC_CHANNEL_IN24 24 /**< @brief External analog input 24. */ -#define ADC_CHANNEL_IN25 25 /**< @brief External analog input 25. */ -/** @} */ - -/** - * @name Sampling rates - * @{ - */ -#define ADC_SAMPLE_4 0 /**< @brief 4 cycles sampling time. */ -#define ADC_SAMPLE_9 1 /**< @brief 9 cycles sampling time. */ -#define ADC_SAMPLE_16 2 /**< @brief 16 cycles sampling time. */ -#define ADC_SAMPLE_24 3 /**< @brief 24 cycles sampling time. */ -#define ADC_SAMPLE_48 4 /**< @brief 48 cycles sampling time. */ -#define ADC_SAMPLE_96 5 /**< @brief 96 cycles sampling time. */ -#define ADC_SAMPLE_192 6 /**< @brief 192 cycles sampling time. */ -#define ADC_SAMPLE_384 7 /**< @brief 384 cycles sampling time. */ -/** @} */ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief ADC1 driver enable switch. - * @details If set to @p TRUE the support for ADC1 is included. - * @note The default is @p TRUE. - */ -#if !defined(STM32_ADC_USE_ADC1) || defined(__DOXYGEN__) -#define STM32_ADC_USE_ADC1 FALSE -#endif - -/** - * @brief ADC common clock divider. - * @note This setting is influenced by the VDDA voltage and other - * external conditions, please refer to the STM32L15x datasheet - * for more info.
- * See section 6.3.15 "12-bit ADC characteristics". - */ -#if !defined(STM32_ADC_ADCPRE) || defined(__DOXYGEN__) -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV1 -#endif - -/** - * @brief ADC1 DMA priority (0..3|lowest..highest). - */ -#if !defined(STM32_ADC_ADC1_DMA_PRIORITY) || defined(__DOXYGEN__) -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#endif - -/** - * @brief ADC interrupt priority level setting. - */ -#if !defined(STM32_ADC_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_ADC_IRQ_PRIORITY 5 -#endif - -/** - * @brief ADC1 DMA interrupt priority level setting. - */ -#if !defined(STM32_ADC_ADC1_DMA_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#endif - -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if STM32_ADC_USE_ADC1 && !STM32_HAS_ADC1 -#error "ADC1 not present in the selected device" -#endif - -#if !STM32_ADC_USE_ADC1 -#error "ADC driver activated but no ADC peripheral assigned" -#endif - -#if STM32_ADC_USE_ADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to ADC1" -#endif - -#if STM32_ADC_USE_ADC1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ADC_ADC1_DMA_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to ADC1 DMA" -#endif - -#if STM32_ADC_USE_ADC1 && \ - !STM32_DMA_IS_VALID_PRIORITY(STM32_ADC_ADC1_DMA_PRIORITY) -#error "Invalid DMA priority assigned to ADC1" -#endif - -#if !defined(STM32_DMA_REQUIRED) -#define STM32_DMA_REQUIRED -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief ADC sample data type. - */ -typedef uint16_t adcsample_t; - -/** - * @brief Channels number in a conversion group. - */ -typedef uint16_t adc_channels_num_t; - -/** - * @brief Possible ADC failure causes. - * @note Error codes are architecture dependent and should not relied - * upon. - */ -typedef enum { - ADC_ERR_DMAFAILURE = 0, /**< DMA operations failure. */ - ADC_ERR_OVERFLOW = 1 /**< ADC overflow condition. */ -} adcerror_t; - -/** - * @brief Type of a structure representing an ADC driver. - */ -typedef struct ADCDriver ADCDriver; - -/** - * @brief ADC notification callback type. - * - * @param[in] adcp pointer to the @p ADCDriver object triggering the - * callback - * @param[in] buffer pointer to the most recent samples data - * @param[in] n number of buffer rows available starting from @p buffer - */ -typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n); - -/** - * @brief ADC error callback type. - * - * @param[in] adcp pointer to the @p ADCDriver object triggering the - * callback - * @param[in] err ADC error code - */ -typedef void (*adcerrorcallback_t)(ADCDriver *adcp, adcerror_t err); - -/** - * @brief Conversion group configuration structure. - * @details This implementation-dependent structure describes a conversion - * operation. - * @note The use of this configuration structure requires knowledge of - * STM32 ADC cell registers interface, please refer to the STM32 - * reference manual for details. - */ -typedef struct { - /** - * @brief Enables the circular buffer mode for the group. - */ - bool_t circular; - /** - * @brief Number of the analog channels belonging to the conversion group. - */ - adc_channels_num_t num_channels; - /** - * @brief Callback function associated to the group or @p NULL. - */ - adccallback_t end_cb; - /** - * @brief Error callback or @p NULL. - */ - adcerrorcallback_t error_cb; - /* End of the mandatory fields.*/ - /** - * @brief ADC CR1 register initialization data. - * @note All the required bits must be defined into this field except - * @p ADC_CR1_SCAN that is enforced inside the driver. - */ - uint32_t cr1; - /** - * @brief ADC CR2 register initialization data. - * @note All the required bits must be defined into this field except - * @p ADC_CR2_DMA, @p ADC_CR2_CONT and @p ADC_CR2_ADON that are - * enforced inside the driver. - */ - uint32_t cr2; - /** - * @brief ADC SMPR1 register initialization data. - * @details In this field must be specified the sample times for channels - * 20...25. - */ - uint32_t smpr1; - /** - * @brief ADC SMPR2 register initialization data. - * @details In this field must be specified the sample times for channels - * 10...19. - */ - uint32_t smpr2; - /** - * @brief ADC SMPR3 register initialization data. - * @details In this field must be specified the sample times for channels - * 0...9. - */ - uint32_t smpr3; - /** - * @brief ADC SQR1 register initialization data. - * @details Conversion group sequence 25...27 + sequence length. - */ - uint32_t sqr1; - /** - * @brief ADC SQR2 register initialization data. - * @details Conversion group sequence 19...24. - */ - uint32_t sqr2; - /** - * @brief ADC SQR3 register initialization data. - * @details Conversion group sequence 13...18. - */ - uint32_t sqr3; - /** - * @brief ADC SQR3 register initialization data. - * @details Conversion group sequence 7...12. - */ - uint32_t sqr4; - /** - * @brief ADC SQR3 register initialization data. - * @details Conversion group sequence 1...6. - */ - uint32_t sqr5; -} ADCConversionGroup; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - uint32_t dummy; -} ADCConfig; - -/** - * @brief Structure representing an ADC driver. - */ -struct ADCDriver { - /** - * @brief Driver state. - */ - adcstate_t state; - /** - * @brief Current configuration data. - */ - const ADCConfig *config; - /** - * @brief Current samples buffer pointer or @p NULL. - */ - adcsample_t *samples; - /** - * @brief Current samples buffer depth or @p 0. - */ - size_t depth; - /** - * @brief Current conversion group pointer or @p NULL. - */ - const ADCConversionGroup *grpp; -#if ADC_USE_WAIT || defined(__DOXYGEN__) - /** - * @brief Waiting thread. - */ - Thread *thread; -#endif -#if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) -#if CH_CFG_USE_MUTEXES || defined(__DOXYGEN__) - /** - * @brief Mutex protecting the peripheral. - */ - Mutex mutex; -#elif CH_CFG_USE_SEMAPHORES - Semaphore semaphore; -#endif -#endif /* ADC_USE_MUTUAL_EXCLUSION */ -#if defined(ADC_DRIVER_EXT_FIELDS) - ADC_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the ADCx registers block. - */ - ADC_TypeDef *adc; - /** - * @brief Pointer to associated DMA channel. - */ - const stm32_dma_stream_t *dmastp; - /** - * @brief DMA mode bit mask. - */ - uint32_t dmamode; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @name Sequences building helper macros - * @{ - */ -/** - * @brief Number of channels in a conversion sequence. - */ -#define ADC_SQR1_NUM_CH(n) (((n) - 1) << 20) - -#define ADC_SQR5_SQ1_N(n) ((n) << 0) /**< @brief 1st channel in seq. */ -#define ADC_SQR5_SQ2_N(n) ((n) << 5) /**< @brief 2nd channel in seq. */ -#define ADC_SQR5_SQ3_N(n) ((n) << 10) /**< @brief 3rd channel in seq. */ -#define ADC_SQR5_SQ4_N(n) ((n) << 15) /**< @brief 4th channel in seq. */ -#define ADC_SQR5_SQ5_N(n) ((n) << 20) /**< @brief 5th channel in seq. */ -#define ADC_SQR5_SQ6_N(n) ((n) << 25) /**< @brief 6th channel in seq. */ - -#define ADC_SQR4_SQ7_N(n) ((n) << 0) /**< @brief 7th channel in seq. */ -#define ADC_SQR4_SQ8_N(n) ((n) << 5) /**< @brief 8th channel in seq. */ -#define ADC_SQR4_SQ9_N(n) ((n) << 10) /**< @brief 9th channel in seq. */ -#define ADC_SQR4_SQ10_N(n) ((n) << 15) /**< @brief 10th channel in seq.*/ -#define ADC_SQR4_SQ11_N(n) ((n) << 20) /**< @brief 11th channel in seq.*/ -#define ADC_SQR4_SQ12_N(n) ((n) << 25) /**< @brief 12th channel in seq.*/ - -#define ADC_SQR3_SQ13_N(n) ((n) << 0) /**< @brief 13th channel in seq.*/ -#define ADC_SQR3_SQ14_N(n) ((n) << 5) /**< @brief 14th channel in seq.*/ -#define ADC_SQR3_SQ15_N(n) ((n) << 10) /**< @brief 15th channel in seq.*/ -#define ADC_SQR3_SQ16_N(n) ((n) << 15) /**< @brief 16th channel in seq.*/ -#define ADC_SQR3_SQ17_N(n) ((n) << 20) /**< @brief 17th channel in seq.*/ -#define ADC_SQR3_SQ18_N(n) ((n) << 25) /**< @brief 18th channel in seq.*/ - -#define ADC_SQR2_SQ19_N(n) ((n) << 0) /**< @brief 19th channel in seq.*/ -#define ADC_SQR2_SQ20_N(n) ((n) << 5) /**< @brief 20th channel in seq.*/ -#define ADC_SQR2_SQ21_N(n) ((n) << 10) /**< @brief 21th channel in seq.*/ -#define ADC_SQR2_SQ22_N(n) ((n) << 15) /**< @brief 22th channel in seq.*/ -#define ADC_SQR2_SQ23_N(n) ((n) << 20) /**< @brief 23th channel in seq.*/ -#define ADC_SQR2_SQ24_N(n) ((n) << 25) /**< @brief 24th channel in seq.*/ - -#define ADC_SQR1_SQ25_N(n) ((n) << 0) /**< @brief 25th channel in seq.*/ -#define ADC_SQR1_SQ26_N(n) ((n) << 5) /**< @brief 26th channel in seq.*/ -#define ADC_SQR1_SQ27_N(n) ((n) << 10) /**< @brief 27th channel in seq.*/ -/** @} */ - -/** - * @name Sampling rate settings helper macros - * @{ - */ -#define ADC_SMPR3_SMP_AN0(n) ((n) << 0) /**< @brief AN0 sampling time. */ -#define ADC_SMPR3_SMP_AN1(n) ((n) << 3) /**< @brief AN1 sampling time. */ -#define ADC_SMPR3_SMP_AN2(n) ((n) << 6) /**< @brief AN2 sampling time. */ -#define ADC_SMPR3_SMP_AN3(n) ((n) << 9) /**< @brief AN3 sampling time. */ -#define ADC_SMPR3_SMP_AN4(n) ((n) << 12) /**< @brief AN4 sampling time. */ -#define ADC_SMPR3_SMP_AN5(n) ((n) << 15) /**< @brief AN5 sampling time. */ -#define ADC_SMPR3_SMP_AN6(n) ((n) << 18) /**< @brief AN6 sampling time. */ -#define ADC_SMPR3_SMP_AN7(n) ((n) << 21) /**< @brief AN7 sampling time. */ -#define ADC_SMPR3_SMP_AN8(n) ((n) << 24) /**< @brief AN8 sampling time. */ -#define ADC_SMPR3_SMP_AN9(n) ((n) << 27) /**< @brief AN9 sampling time. */ - -#define ADC_SMPR2_SMP_AN10(n) ((n) << 0) /**< @brief AN10 sampling time. */ -#define ADC_SMPR2_SMP_AN11(n) ((n) << 3) /**< @brief AN11 sampling time. */ -#define ADC_SMPR2_SMP_AN12(n) ((n) << 6) /**< @brief AN12 sampling time. */ -#define ADC_SMPR2_SMP_AN13(n) ((n) << 9) /**< @brief AN13 sampling time. */ -#define ADC_SMPR2_SMP_AN14(n) ((n) << 12) /**< @brief AN14 sampling time. */ -#define ADC_SMPR2_SMP_AN15(n) ((n) << 15) /**< @brief AN15 sampling time. */ -#define ADC_SMPR2_SMP_SENSOR(n) ((n) << 18) /**< @brief Temperature Sensor - sampling time. */ -#define ADC_SMPR2_SMP_VREF(n) ((n) << 21) /**< @brief Voltage Reference - sampling time. */ -#define ADC_SMPR2_SMP_AN18(n) ((n) << 24) /**< @brief AN18 sampling time. */ -#define ADC_SMPR2_SMP_AN19(n) ((n) << 27) /**< @brief AN19 sampling time. */ - -#define ADC_SMPR1_SMP_AN20(n) ((n) << 0) /**< @brief AN20 sampling time. */ -#define ADC_SMPR1_SMP_AN21(n) ((n) << 3) /**< @brief AN21 sampling time. */ -#define ADC_SMPR1_SMP_AN22(n) ((n) << 6) /**< @brief AN22 sampling time. */ -#define ADC_SMPR1_SMP_AN23(n) ((n) << 9) /**< @brief AN23 sampling time. */ -#define ADC_SMPR1_SMP_AN24(n) ((n) << 12) /**< @brief AN24 sampling time. */ -#define ADC_SMPR1_SMP_AN25(n) ((n) << 15) /**< @brief AN25 sampling time. */ -/** @} */ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if STM32_ADC_USE_ADC1 && !defined(__DOXYGEN__) -extern ADCDriver ADCD1; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void adc_lld_init(void); - void adc_lld_start(ADCDriver *adcp); - void adc_lld_stop(ADCDriver *adcp); - void adc_lld_start_conversion(ADCDriver *adcp); - void adc_lld_stop_conversion(ADCDriver *adcp); - void adcSTM32EnableTSVREFE(void); - void adcSTM32DisableTSVREFE(void); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_ADC */ - -#endif /* _ADC_LLD_H_ */ - -/** @} */ -- cgit v1.2.3