From 3a5c3788fa9bc4b900926daceb86ad525fb28df4 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Wed, 26 Aug 2015 12:42:52 +0000 Subject: Added cache handling example for F7 ADC and SPI demos. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8243 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/STM32F7xx/GPT-ADC/main.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'testhal/STM32/STM32F7xx/GPT-ADC') diff --git a/testhal/STM32/STM32F7xx/GPT-ADC/main.c b/testhal/STM32/STM32F7xx/GPT-ADC/main.c index 1f65197c3..4e1b27520 100644 --- a/testhal/STM32/STM32F7xx/GPT-ADC/main.c +++ b/testhal/STM32/STM32F7xx/GPT-ADC/main.c @@ -38,6 +38,12 @@ static const GPTConfig gpt4cfg1 = { #define ADC_GRP1_NUM_CHANNELS 2 #define ADC_GRP1_BUF_DEPTH 64 +/* Note, the buffer is aligned to a 32 bytes boundary because limitations + imposed by the data cache. Note, this is GNU specific, it must be + handled differently for other compilers.*/ +#if defined(__GNUC__) +__attribute__((aligned (32))) +#endif static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; /* @@ -46,7 +52,8 @@ static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; size_t nx = 0, ny = 0; static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { - (void)adcp; + /* DMA buffer invalidation because data cache.*/ + dmaBufferInvalidate(buffer, buffer + (n * adcp->grpp->num_channels)); /* Updating counters.*/ if (samples1 == buffer) { -- cgit v1.2.3