/** ****************************************************************************** * @file stm32f10x_dac.c * @author MCD Application Team * @version V3.1.0 * @date 06/19/2009 * @brief This file provides all the DAC firmware functions. ****************************************************************************** * @copy * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * *

© COPYRIGHT 2009 STMicroelectronics

*/ /* Includes ------------------------------------------------------------------*/ #include "stm32f10x_dac.h" #include "stm32f10x_rcc.h" /** @addtogroup STM32F10x_StdPeriph_Driver * @{ */ /** @defgroup DAC * @brief DAC driver modules * @{ */ /** @defgroup DAC_Private_TypesDefinitions * @{ */ /** * @} */ /** @defgroup DAC_Private_Defines * @{ */ /* DAC EN mask */ #define CR_EN_Set ((uint32_t)0x00000001) /* DAC DMAEN mask */ #define CR_DMAEN_Set ((uint32_t)0x00001000) /* CR register Mask */ #define CR_CLEAR_Mask ((uint32_t)0x00000FFE) /* DAC SWTRIG mask */ #define SWTRIGR_SWTRIG_Set ((uint32_t)0x00000001) /* DAC Dual Channels SWTRIG masks */ #define DUAL_SWTRIG_Set ((uint32_t)0x00000003) #define DUAL_SWTRIG_Reset ((uint32_t)0xFFFFFFFC) /* DHR registers offsets */ #define DHR12R1_Offset ((uint32_t)0x00000008) #define DHR12R2_Offset ((uint32_t)0x00000014) #define DHR12RD_Offset ((uint32_t)0x00000020) /* DOR register offset */ #define DOR_Offset ((uint32_t)0x0000002C) /** * @} */ /** @defgroup DAC_Private_Macros * @{ */ /** * @} */ /** @defgroup DAC_Private_Variables * @{ */ /** * @} */ /** @defgroup DAC_Private_FunctionPrototypes * @{ */ /** * @} */ /** @defgroup DAC_Private_Functions * @{ */ /** * @brief Deinitializes the DAC peripheral registers to their default reset values. * @param None * @retval None */ void DAC_DeInit(void) { /* Enable DAC reset state */ RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE); /* Release DAC from reset state */ RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE); } /** * @brief Initializes the DAC peripheral according to the specified * parameters in the DAC_InitStruct. * @param DAC_Channel: the selected DAC channel. * This parameter can be one of the following values: * @arg DAC_Channel_1: DAC Channel1 selected * @arg DAC_Channel_2: DAC Channel2 selected * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that * contains the configuration information for the specified DAC channel. * @retval None */ void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct) { uint32_t tmpreg1 = 0, tmpreg2 = 0; /* Check the DAC parameters */ assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger)); assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration)); assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude)); assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer)); /*---------------------------- DAC CR Configuration --------------------------*/ /* Get the DAC CR value */ tmpreg1 = DAC->CR; /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ tmpreg1 &= ~(CR_CLEAR_Mask << DAC_Channel); /* Configure for the selected DAC channel: buffer output, trigger, wave genration, mask/amplitude for wave genration */ /* Set TSELx and TENx bits according to DAC_Trigger value */ /* Set WAVEx bits according to DAC_WaveGeneration value */ /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */ /* Set BOFFx bit according to DAC_OutputBuffer value */ tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration | DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer); /* Calculate CR register value depending on DAC_Channel */ tmpreg1 |= tmpreg2 << DAC_Channel; /* Write to DAC CR */ DAC->CR = tmpreg1; } /** * @brief Fills each DAC_InitStruct member with its default value. * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will * be initialized. * @retval None */ void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct) { /*--------------- Reset DAC init structure parameters values -----------------*/ /* Initialize the DAC_Trigger member */ DAC_InitStruct->DAC_Trigger = DAC_Trigger_None; /* Initialize the DAC_WaveGeneration member */ DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None; /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */ DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0; /* Initialize the DAC_OutputBuffer member */ DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable; } /** * @brief Enables or disables the specified DAC channel. * @param DAC_Channel: the selected DAC channel. * This parameter can be one of the following values: * @arg DAC_Channel_1: DAC Channel1 selected * @arg DAC_Channel_2: DAC Channel2 selected * @param NewState: new state of the DAC channel. * This parameter can be: ENABLE or DISABLE. * @retval None */ void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState) { /* Check the parameters */ assert_param(IS_DAC_CHANNEL(DAC_Channel)); assert_param(IS_FUNCTIONAL_STATE(NewState)); if (NewState != DISABLE) { /* Enable the selected DAC channel */ DAC->CR |= CR_EN_Set << DAC_Channel; } else { /* Disable the selected DAC channel */ DAC->CR &= ~(CR_EN_Set << DAC_Channel); } } /** * @brief Enables or disables the specified DAC channel DMA request. * @param DAC_Channel: the selected DAC channel. * This parameter can be one of the following values: * @arg DAC_Channel_1: DAC Channel1 selected * @arg DAC_Channel_2: DAC Channe
/*
             LUFA Library
     Copyright (C) Dean Camera, 2017.

  dean [at] fourwalledcubicle [dot] com
           www.lufa-lib.org
*/

/*
  Copyright 2017  Dean Camera (dean [at] fourwalledcubicle [dot] com)

  Permission to use, copy, modify, distribute, and sell this
  software and its documentation for any purpose is hereby granted
  without fee, provided that the above copyright notice appear in
  all copies and that both that the copyright notice and this
  permission notice and warranty disclaimer appear in supporting
  documentation, and that the name of the author not be used in
  advertising or publicity pertaining to distribution of the
  software without specific, written prior permission.

  The author disclaims all warranties with regard to this
  software, including all implied warranties of merchantability
  and fitness.  In no event shall the author be liable for any
  special, indirect or consequential damages or any damages
  whatsoever resulting from loss of use, data or profits, whether
  in an action of contract, negligence or other tortious action,
  arising out of or in connection with the use or performance of
  this software.
*/

/** \file
 *
 *  Macros for the V2 Protocol Packet Commands and Responses.
 */

#ifndef _V2_PROTOCOL_CONSTANTS_
#define _V2_PROTOCOL_CONSTANTS_

	/* Macros: */
		#define CMD_SIGN_ON                 0x01
		#define CMD_SET_PARAMETER           0x02
		#define CMD_GET_PARAMETER           0x03
		#define CMD_OSCCAL                  0x05
		#define CMD_LOAD_ADDRESS            0x06
		#define CMD_FIRMWARE_UPGRADE        0x07
		#define CMD_RESET_PROTECTION        0x0A
		#define CMD_ENTER_PROGMODE_ISP      0x10
		#define CMD_LEAVE_PROGMODE_ISP      0x11
		#define CMD_CHIP_ERASE_ISP          0x12
		#define CMD_PROGRAM_FLASH_ISP       0x13
		#define CMD_READ_FLASH_ISP          0x14
		#define CMD_PROGRAM_EEPROM_ISP      0x15
		#define CMD_READ_EEPROM_ISP         0x16
		#define CMD_PROGRAM_FUSE_ISP        0x17
		#define CMD_READ_FUSE_ISP           0x18
		#define CMD_PROGRAM_LOCK_ISP        0x19
		#define CMD_READ_LOCK_ISP           0x1A
		#define CMD_READ_SIGNATURE_ISP      0x1B
		#define CMD_READ_OSCCAL_ISP         0x1C
		#define CMD_SPI_MULTI               0x1D
		#define CMD_XPROG                   0x50
		#define CMD_XPROG_SETMODE           0x51

		#define STATUS_CMD_OK               0x00
		#define STATUS_CMD_TOUT             0x80
		#define STATUS_RDY_BSY_TOUT         0x81
		#define STATUS_SET_PARAM_MISSING    0x82
		#define STATUS_CMD_FAILED           0xC0
		#define STATUS_CMD_UNKNOWN          0xC9
		#define STATUS_CMD_ILLEGAL_PARAM    0xCA
		#define STATUS_ISP_READY            0x00
		#define STATUS_CONN_FAIL_MOSI       0x01
		#define STATUS_CONN_FAIL_RST        0x02
		#define STATUS_CONN_FAIL_SCK        0x04
		#define STATUS_TGT_NOT_DETECTED     0x10
		#define STATUS_TGT_REVERSE_INSERTED 0x20

		#define PARAM_BUILD_NUMBER_LOW      0x80
		#define PARAM_BUILD_NUMBER_HIGH     0x81
		#define PARAM_HW_VER                0x90
		#define PARAM_SW_MAJOR              0x91
		#define PARAM_SW_MINOR              0x92
		#define PARAM_VTARGET               0x94
		#define PARAM_SCK_DURATION          0x98
		#define PARAM_RESET_POLARITY        0x9E
		#define PARAM_STATUS_TGT_CONN       0xA1
		#define PARAM_DISCHARGEDELAY        0xA4

#endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-29 16:16:54 +0000