diff options
Diffstat (limited to 'Projects')
| -rw-r--r-- | Projects/AVRISP-MKII/Lib/XPROG/TINYNVM.c | 24 | ||||
| -rw-r--r-- | Projects/AVRISP-MKII/Lib/XPROG/XMEGANVM.c | 108 | ||||
| -rw-r--r-- | Projects/AVRISP-MKII/Lib/XPROG/XMEGANVM.h | 3 | ||||
| -rw-r--r-- | Projects/AVRISP-MKII/Lib/XPROG/XPROGProtocol.c | 126 | ||||
| -rw-r--r-- | Projects/AVRISP-MKII/Lib/XPROG/XPROGProtocol.h | 100 | ||||
| -rw-r--r-- | Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h | 60 |
6 files changed, 220 insertions, 201 deletions
diff --git a/Projects/AVRISP-MKII/Lib/XPROG/TINYNVM.c b/Projects/AVRISP-MKII/Lib/XPROG/TINYNVM.c index f28386317..6d947af53 100644 --- a/Projects/AVRISP-MKII/Lib/XPROG/TINYNVM.c +++ b/Projects/AVRISP-MKII/Lib/XPROG/TINYNVM.c @@ -55,8 +55,8 @@ static void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress) static void TINYNVM_SendReadNVMRegister(const uint8_t Address) { /* The TPI command for reading from the I/O space uses strange addressing, where the I/O address's upper - * two bits of the 6-bit address are shifted left once */ - XPROGTarget_SendByte(TPI_CMD_SIN | ((Address & 0x30) << 1) | (Address & 0x0F)); + * two bits of the 6-bit address are shifted left once - use function to reduce code size */ + XPROGTarget_SendByte(TPI_CMD_SIN(Address)); } /** Sends a SOUT command to the target with the specified I/O address, ready for the data byte to be read. @@ -66,8 +66,8 @@ static void TINYNVM_SendReadNVMRegister(const uint8_t Address) static void TINYNVM_SendWriteNVMRegister(const uint8_t Address) { /* The TPI command for reading from the I/O space uses strange addressing, where the I/O address's upper - * two bits of the 6-bit address are shifted left once */ - XPROGTarget_SendByte(TPI_CMD_SOUT | ((Address & 0x30) << 1) | (Address & 0x0F)); + * two bits of the 6-bit address are shifted left once - use function to reduce code size */ + XPROGTarget_SendByte(TPI_CMD_SOUT(Address)); } /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read. @@ -80,7 +80,7 @@ bool TINYNVM_WaitWhileNVMBusBusy(void) for (;;) { /* Send the SLDCS command to read the TPI STATUS register to see the NVM bus is active */ - XPROGTarget_SendByte(TPI_CMD_SLDCS | TPI_STATUS_REG); + XPROGTarget_SendByte(TPI_CMD_SLDCS(TPI_REG_STATUS)); uint8_t StatusRegister = XPROGTarget_ReceiveByte(); @@ -129,7 +129,7 @@ bool TINYNVM_EnableTPI(void) XPROGTarget_EnableTargetTPI(); /* Lower direction change guard time to 32 USART bits */ - XPROGTarget_SendByte(TPI_CMD_SSTCS | TPI_CTRL_REG); + XPROGTarget_SendByte(TPI_CMD_SSTCS(TPI_REG_CTRL)); XPROGTarget_SendByte(0x02); /* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */ @@ -149,11 +149,11 @@ void TINYNVM_DisableTPI(void) do { /* Clear the NVMEN bit in the TPI STATUS register to disable TPI mode */ - XPROGTarget_SendByte(TPI_CMD_SSTCS | TPI_STATUS_REG); + XPROGTarget_SendByte(TPI_CMD_SSTCS(TPI_REG_STATUS)); XPROGTarget_SendByte(0x00); /* Read back the STATUS register, check to see if it took effect */ - XPROGTarget_SendByte(TPI_CMD_SLDCS | PDI_RESET_REG); + XPROGTarget_SendByte(TPI_CMD_SLDCS(TPI_REG_STATUS)); } while (XPROGTarget_ReceiveByte() != 0x00); XPROGTarget_DisableTargetTPI(); @@ -185,7 +185,7 @@ bool TINYNVM_ReadMemory(const uint16_t ReadAddress, while (ReadSize-- && TimeoutTicksRemaining) { /* Read the byte of data from the target */ - XPROGTarget_SendByte(TPI_CMD_SLD | TPI_POINTER_INDIRECT_PI); + XPROGTarget_SendByte(TPI_CMD_SLD(TPI_POINTER_INDIRECT_PI)); *(ReadBuffer++) = XPROGTarget_ReceiveByte(); } @@ -226,11 +226,11 @@ bool TINYNVM_WriteMemory(const uint16_t WriteAddress, return false; /* Write the low byte of data to the target */ - XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT_PI); + XPROGTarget_SendByte(TPI_CMD_SST(TPI_POINTER_INDIRECT_PI)); XPROGTarget_SendByte(*(WriteBuffer++)); /* Write the high byte of data to the target */ - XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT_PI); + XPROGTarget_SendByte(TPI_CMD_SST(TPI_POINTER_INDIRECT_PI)); XPROGTarget_SendByte(*(WriteBuffer++)); /* Need to decrement the write length twice, since we wrote a whole two-byte word */ @@ -260,7 +260,7 @@ bool TINYNVM_EraseMemory(const uint8_t EraseCommand, /* Write to a high byte location within the target address space to start the erase process */ TINYNVM_SendPointerAddress(Address | 0x0001); - XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT); + XPROGTarget_SendByte(TPI_CMD_SST(TPI_POINTER_INDIRECT)); XPROGTarget_SendByte(0x00); /* Wait until the NVM controller is no longer busy */ diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XMEGANVM.c b/Projects/AVRISP-MKII/Lib/XPROG/XMEGANVM.c index 06a4f7222..855ff7fcb 100644 --- a/Projects/AVRISP-MKII/Lib/XPROG/XMEGANVM.c +++ b/Projects/AVRISP-MKII/Lib/XPROG/XMEGANVM.c @@ -75,7 +75,7 @@ bool XMEGANVM_WaitWhileNVMBusBusy(void) for (;;) { /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */ - XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG); + XPROGTarget_SendByte(PDI_CMD_LDCS(PDI_REG_STATUS)); uint8_t StatusRegister = XPROGTarget_ReceiveByte(); @@ -97,14 +97,14 @@ bool XMEGANVM_WaitWhileNVMBusBusy(void) bool XMEGANVM_WaitWhileNVMControllerBusy(void) { /* Preload the pointer register with the NVM STATUS register address to check the BUSY flag */ - XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES); + XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_DIRECT, PDI_DATASIZE_4BYTES)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS); /* Poll the NVM STATUS register while the NVM controller is busy */ for (;;) { /* Fetch the current status value via the pointer register (without auto-increment afterwards) */ - XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT << 2) | PDI_DATSIZE_1BYTE); + XPROGTarget_SendByte(PDI_CMD_LD(PDI_POINTER_INDIRECT, PDI_DATASIZE_1BYTE)); uint8_t StatusRegister = XPROGTarget_ReceiveByte(); @@ -128,11 +128,11 @@ bool XMEGANVM_EnablePDI(void) XPROGTarget_EnableTargetPDI(); /* Store the RESET key into the RESET PDI register to keep the XMEGA in reset */ - XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG); + XPROGTarget_SendByte(PDI_CMD_STCS(PDI_REG_RESET)); XPROGTarget_SendByte(PDI_RESET_KEY); /* Lower direction change guard time to 32 USART bits */ - XPROGTarget_SendByte(PDI_CMD_STCS | PDI_CTRL_REG); + XPROGTarget_SendByte(PDI_CMD_STCS(PDI_REG_CTRL)); XPROGTarget_SendByte(0x02); /* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */ @@ -155,11 +155,11 @@ void XMEGANVM_DisablePDI(void) do { /* Clear reset register */ - XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG); + XPROGTarget_SendByte(PDI_CMD_STCS(PDI_REG_RESET)); XPROGTarget_SendByte(0x00); /* Read back the reset register, check to see if it took effect */ - XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_RESET_REG); + XPROGTarget_SendByte(PDI_CMD_LDCS(PDI_REG_RESET)); } while (XPROGTarget_ReceiveByte() != 0x00); XPROGTarget_DisableTargetPDI(); @@ -182,12 +182,12 @@ bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, return false; /* Set the NVM command to the correct CRC read command */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(CRCCommand); /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA); XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX); @@ -200,15 +200,15 @@ bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, return false; /* Load the PDI pointer register with the DAT0 register start address */ - XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES); + XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_DIRECT, PDI_DATASIZE_4BYTES)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0); /* Send the REPEAT command to grab the CRC bytes */ - XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE); + XPROGTarget_SendByte(PDI_CMD_REPEAT(PDI_DATASIZE_1BYTE)); XPROGTarget_SendByte(XMEGA_CRC_LENGTH_BYTES - 1); /* Read in the CRC bytes from the target */ - XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE); + XPROGTarget_SendByte(PDI_CMD_LD(PDI_POINTER_INDIRECT_PI, PDI_DATASIZE_1BYTE)); for (uint8_t i = 0; i < XMEGA_CRC_LENGTH_BYTES; i++) ((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte(); @@ -232,22 +232,32 @@ bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, return false; /* Send the READNVM command to the NVM controller for reading of an arbitrary location */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(XMEGA_NVM_CMD_READNVM); - /* Load the PDI pointer register with the start address we want to read from */ - XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES); - XMEGANVM_SendAddress(ReadAddress); - - /* Send the REPEAT command with the specified number of bytes to read */ - XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE); - XPROGTarget_SendByte(ReadSize - 1); - - /* Send a LD command with indirect access and post-increment to read out the bytes */ - XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE); - while (ReadSize-- && TimeoutTicksRemaining) - *(ReadBuffer++) = XPROGTarget_ReceiveByte(); + if (ReadSize > 1) + { + /* Load the PDI pointer register with the start address we want to read from */ + XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_DIRECT, PDI_DATASIZE_4BYTES)); + XMEGANVM_SendAddress(ReadAddress); + + /* Send the REPEAT command with the specified number of bytes to read */ + XPROGTarget_SendByte(PDI_CMD_REPEAT(PDI_DATASIZE_1BYTE)); + XPROGTarget_SendByte(ReadSize - 1); + + /* Send a LD command with indirect access and post-increment to read out the bytes */ + XPROGTarget_SendByte(PDI_CMD_LD(PDI_POINTER_INDIRECT_PI, PDI_DATASIZE_1BYTE)); + while (ReadSize-- && TimeoutTicksRemaining) + *(ReadBuffer++) = XPROGTarget_ReceiveByte(); + } + else + { + /* Send a LDS command with the read address to read out the requested byte */ + XPROGTarget_SendByte(PDI_CMD_LDS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); + XMEGANVM_SendAddress(ReadAddress); + *(ReadBuffer++) = XPROGTarget_ReceiveByte(); + } return (TimeoutTicksRemaining > 0); } @@ -269,12 +279,12 @@ bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, return false; /* Send the memory write command to the target */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(WriteCommand); /* Send new memory byte to the memory of the target */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendAddress(WriteAddress); XPROGTarget_SendByte(Byte); @@ -301,19 +311,19 @@ bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t* WriteBuffer, uint16_t WriteSize) { - if (PageMode & XPRG_PAGEMODE_ERASE) + if (PageMode & XPROG_PAGEMODE_ERASE) { /* Wait until the NVM controller is no longer busy */ if (!(XMEGANVM_WaitWhileNVMControllerBusy())) return false; /* Send the memory buffer erase command to the target */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(EraseBuffCommand); /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA); XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX); } @@ -325,37 +335,37 @@ bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, return false; /* Send the memory buffer write command to the target */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(WriteBuffCommand); /* Load the PDI pointer register with the start address we want to write to */ - XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES); + XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_DIRECT, PDI_DATASIZE_4BYTES)); XMEGANVM_SendAddress(WriteAddress); /* Send the REPEAT command with the specified number of bytes to write */ - XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE); + XPROGTarget_SendByte(PDI_CMD_REPEAT(PDI_DATASIZE_1BYTE)); XPROGTarget_SendByte(WriteSize - 1); /* Send a ST command with indirect access and post-increment to write the bytes */ - XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE); + XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_INDIRECT_PI, PDI_DATASIZE_1BYTE)); while (WriteSize--) XPROGTarget_SendByte(*(WriteBuffer++)); } - if (PageMode & XPRG_PAGEMODE_WRITE) + if (PageMode & XPROG_PAGEMODE_WRITE) { /* Wait until the NVM controller is no longer busy */ if (!(XMEGANVM_WaitWhileNVMControllerBusy())) return false; /* Send the memory write command to the target */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(WritePageCommand); /* Send the address of the first page location to write the memory page */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendAddress(WriteAddress); XPROGTarget_SendByte(0x00); } @@ -381,24 +391,24 @@ bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE) { /* Send the memory erase command to the target */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(EraseCommand); /* Set CMDEX bit in NVM CTRLA register to start the erase sequence */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA); XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX); } else if (EraseCommand == XMEGA_NVM_CMD_ERASEEEPROM) { /* Send the EEPROM page buffer erase command to the target */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF); /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA); XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX); @@ -407,42 +417,42 @@ bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, return false; /* Send the EEPROM memory buffer write command to the target */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF); /* Load the PDI pointer register with the EEPROM page start address */ - XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES); + XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_DIRECT, PDI_DATASIZE_4BYTES)); XMEGANVM_SendAddress(Address); /* Send the REPEAT command with the specified number of bytes to write */ - XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE); + XPROGTarget_SendByte(PDI_CMD_REPEAT(PDI_DATASIZE_1BYTE)); XPROGTarget_SendByte(XPROG_Param_EEPageSize - 1); /* Send a ST command with indirect access and post-increment to tag each byte in the EEPROM page buffer */ - XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE); + XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_INDIRECT_PI, PDI_DATASIZE_1BYTE)); for (uint8_t PageByte = 0; PageByte < XPROG_Param_EEPageSize; PageByte++) XPROGTarget_SendByte(0x00); /* Send the memory erase command to the target */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(EraseCommand); /* Set CMDEX bit in NVM CTRLA register to start the EEPROM erase sequence */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA); XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX); } else { /* Send the memory erase command to the target */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XPROGTarget_SendByte(EraseCommand); /* Other erase modes just need us to address a byte within the target memory space */ - XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); + XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATASIZE_4BYTES, PDI_DATASIZE_1BYTE)); XMEGANVM_SendAddress(Address); XPROGTarget_SendByte(0x00); } diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XMEGANVM.h b/Projects/AVRISP-MKII/Lib/XPROG/XMEGANVM.h index c8450cbef..37329cc2e 100644 --- a/Projects/AVRISP-MKII/Lib/XPROG/XMEGANVM.h +++ b/Projects/AVRISP-MKII/Lib/XPROG/XMEGANVM.h @@ -116,7 +116,8 @@ bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest); bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, - uint8_t* ReadBuffer, uint16_t ReadSize); + uint8_t* ReadBuffer, + uint16_t ReadSize); bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t Byte); diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGProtocol.c b/Projects/AVRISP-MKII/Lib/XPROG/XPROGProtocol.c index 17a8b47ff..33a1cc68d 100644 --- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGProtocol.c +++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGProtocol.c @@ -50,7 +50,7 @@ uint8_t XPROG_Param_NVMCMDRegAddr = 0x33; uint8_t XPROG_Param_NVMCSRRegAddr = 0x32; /** Currently selected XPROG programming protocol */ -uint8_t XPROG_SelectedProtocol = XPRG_PROTOCOL_PDI; +uint8_t XPROG_SelectedProtocol = XPROG_PROTOCOL_PDI; /** Handler for the CMD_XPROG_SETMODE command, which sets the programmer-to-target protocol used for PDI/TPI * programming. @@ -71,7 +71,7 @@ void XPROGProtocol_SetMode(void) XPROG_SelectedProtocol = SetMode_XPROG_Params.Protocol; Endpoint_Write_8(CMD_XPROG_SETMODE); - Endpoint_Write_8((SetMode_XPROG_Params.Protocol != XPRG_PROTOCOL_JTAG) ? STATUS_CMD_OK : STATUS_CMD_FAILED); + Endpoint_Write_8((SetMode_XPROG_Params.Protocol != XPROG_PROTOCOL_JTAG) ? STATUS_CMD_OK : STATUS_CMD_FAILED); Endpoint_ClearIN(); } @@ -84,25 +84,25 @@ void XPROGProtocol_Command(void) switch (XPROGCommand) { - case XPRG_CMD_ENTER_PROGMODE: + case XPROG_CMD_ENTER_PROGMODE: XPROGProtocol_EnterXPROGMode(); break; - case XPRG_CMD_LEAVE_PROGMODE: + case XPROG_CMD_LEAVE_PROGMODE: XPROGProtocol_LeaveXPROGMode(); break; - case XPRG_CMD_ERASE: + case XPROG_CMD_ERASE: XPROGProtocol_Erase(); break; - case XPRG_CMD_WRITE_MEM: + case XPROG_CMD_WRITE_MEM: XPROGProtocol_WriteMemory(); break; - case XPRG_CMD_READ_MEM: + case XPROG_CMD_READ_MEM: XPROGProtocol_ReadMemory(); break; - case XPRG_CMD_CRC: + case XPROG_CMD_CRC: XPROGProtocol_ReadCRC(); break; - case XPRG_CMD_SET_PARAM: + case XPROG_CMD_SET_PARAM: XPROGProtocol_SetParam(); break; } @@ -117,14 +117,14 @@ static void XPROGProtocol_EnterXPROGMode(void) bool NVMBusEnabled = false; - if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI) + if (XPROG_SelectedProtocol == XPROG_PROTOCOL_PDI) NVMBusEnabled = XMEGANVM_EnablePDI(); - else if (XPROG_SelectedProtocol == XPRG_PROTOCOL_TPI) + else if (XPROG_SelectedProtocol == XPROG_PROTOCOL_TPI) NVMBusEnabled = TINYNVM_EnableTPI(); Endpoint_Write_8(CMD_XPROG); - Endpoint_Write_8(XPRG_CMD_ENTER_PROGMODE); - Endpoint_Write_8(NVMBusEnabled ? XPRG_ERR_OK : XPRG_ERR_FAILED); + Endpoint_Write_8(XPROG_CMD_ENTER_PROGMODE); + Endpoint_Write_8(NVMBusEnabled ? XPROG_ERR_OK : XPROG_ERR_FAILED); Endpoint_ClearIN(); } @@ -137,7 +137,7 @@ static void XPROGProtocol_LeaveXPROGMode(void) Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR); Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); - if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI) + if (XPROG_SelectedProtocol == XPROG_PROTOCOL_PDI) XMEGANVM_DisablePDI(); else TINYNVM_DisableTPI(); @@ -149,15 +149,15 @@ static void XPROGProtocol_LeaveXPROGMode(void) #endif Endpoint_Write_8(CMD_XPROG); - Endpoint_Write_8(XPRG_CMD_LEAVE_PROGMODE); - Endpoint_Write_8(XPRG_ERR_OK); + Endpoint_Write_8(XPROG_CMD_LEAVE_PROGMODE); + Endpoint_Write_8(XPROG_ERR_OK); Endpoint_ClearIN(); } /** Handler for the XPRG ERASE command to erase a specific memory address space in the attached device. */ static void XPROGProtocol_Erase(void) { - uint8_t ReturnStatus = XPRG_ERR_OK; + uint8_t ReturnStatus = XPROG_ERR_OK; struct { @@ -174,33 +174,33 @@ static void XPROGProtocol_Erase(void) uint8_t EraseCommand; - if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI) + if (XPROG_SelectedProtocol == XPROG_PROTOCOL_PDI) { /* Determine which NVM command to send to the device depending on the memory to erase */ switch (Erase_XPROG_Params.MemoryType) { - case XPRG_ERASE_CHIP: + case XPROG_ERASE_CHIP: EraseCommand = XMEGA_NVM_CMD_CHIPERASE; break; - case XPRG_ERASE_APP: + case XPROG_ERASE_APP: EraseCommand = XMEGA_NVM_CMD_ERASEAPPSEC; break; - case XPRG_ERASE_BOOT: + case XPROG_ERASE_BOOT: EraseCommand = XMEGA_NVM_CMD_ERASEBOOTSEC; break; - case XPRG_ERASE_EEPROM: + case XPROG_ERASE_EEPROM: EraseCommand = XMEGA_NVM_CMD_ERASEEEPROM; break; - case XPRG_ERASE_APP_PAGE: + case XPROG_ERASE_APP_PAGE: EraseCommand = XMEGA_NVM_CMD_ERASEAPPSECPAGE; break; - case XPRG_ERASE_BOOT_PAGE: + case XPROG_ERASE_BOOT_PAGE: EraseCommand = XMEGA_NVM_CMD_ERASEBOOTSECPAGE; break; - case XPRG_ERASE_EEPROM_PAGE: + case XPROG_ERASE_EEPROM_PAGE: EraseCommand = XMEGA_NVM_CMD_ERASEEEPROMPAGE; break; - case XPRG_ERASE_USERSIG: + case XPROG_ERASE_USERSIG: EraseCommand = XMEGA_NVM_CMD_ERASEUSERSIG; break; default: @@ -210,22 +210,22 @@ static void XPROGProtocol_Erase(void) /* Erase the target memory, indicate timeout if occurred */ if (!(XMEGANVM_EraseMemory(EraseCommand, Erase_XPROG_Params.Address))) - ReturnStatus = XPRG_ERR_TIMEOUT; + ReturnStatus = XPROG_ERR_TIMEOUT; } else { - if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_CHIP) + if (Erase_XPROG_Params.MemoryType == XPROG_ERASE_CHIP) EraseCommand = TINY_NVM_CMD_CHIPERASE; else EraseCommand = TINY_NVM_CMD_SECTIONERASE; /* Erase the target memory, indicate timeout if occurred */ if (!(TINYNVM_EraseMemory(EraseCommand, Erase_XPROG_Params.Address))) - ReturnStatus = XPRG_ERR_TIMEOUT; + ReturnStatus = XPROG_ERR_TIMEOUT; } Endpoint_Write_8(CMD_XPROG); - Endpoint_Write_8(XPRG_CMD_ERASE); + Endpoint_Write_8(XPROG_CMD_ERASE); Endpoint_Write_8(ReturnStatus); Endpoint_ClearIN(); } @@ -233,7 +233,7 @@ static void XPROGProtocol_Erase(void) /** Handler for the XPROG WRITE_MEMORY command to write to a specific memory space within the attached device. */ static void XPROGProtocol_WriteMemory(void) { - uint8_t ReturnStatus = XPRG_ERR_OK; + uint8_t ReturnStatus = XPROG_ERR_OK; struct { @@ -263,7 +263,7 @@ static void XPROGProtocol_WriteMemory(void) Endpoint_SelectEndpoint(AVRISP_DATA_IN_EPADDR); Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); - if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI) + if (XPROG_SelectedProtocol == XPROG_PROTOCOL_PDI) { /* Assume FLASH page programming by default, as it is the common case */ uint8_t WriteCommand = XMEGA_NVM_CMD_WRITEFLASHPAGE; @@ -273,25 +273,25 @@ static void XPROGProtocol_WriteMemory(void) switch (WriteMemory_XPROG_Params.MemoryType) { - case XPRG_MEM_TYPE_APPL: + case XPROG_MEM_TYPE_APPL: WriteCommand = XMEGA_NVM_CMD_WRITEAPPSECPAGE; break; - case XPRG_MEM_TYPE_BOOT: + case XPROG_MEM_TYPE_BOOT: WriteCommand = XMEGA_NVM_CMD_WRITEBOOTSECPAGE; break; - case XPRG_MEM_TYPE_EEPROM: + case XPROG_MEM_TYPE_EEPROM: WriteCommand = XMEGA_NVM_CMD_ERASEWRITEEEPROMPAGE; WriteBuffCommand = XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF; EraseBuffCommand = XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF; break; - case XPRG_MEM_TYPE_USERSIG: + case XPROG_MEM_TYPE_USERSIG: WriteCommand = XMEGA_NVM_CMD_WRITEUSERSIG; break; - case XPRG_MEM_TYPE_FUSE: + case XPROG_MEM_TYPE_FUSE: WriteCommand = XMEGA_NVM_CMD_WRITEFUSE; PagedMemory = false; break; - case XPRG_MEM_TYPE_LOCKBITS: + case XPROG_MEM_TYPE_LOCKBITS: WriteCommand = XMEGA_NVM_CMD_WRITELOCK; PagedMemory = false; break; @@ -304,7 +304,7 @@ static void XPROGProtocol_WriteMemory(void) (!PagedMemory && !(XMEGANVM_WriteByteMemory(WriteCommand, WriteMemory_XPROG_Params.Address, WriteMemory_XPROG_Params.ProgData[0])))) { - ReturnStatus = XPRG_ERR_TIMEOUT; + ReturnStatus = XPROG_ERR_TIMEOUT; } } else @@ -313,12 +313,12 @@ static void XPROGProtocol_WriteMemory(void) if (!(TINYNVM_WriteMemory(WriteMemory_XPROG_Params.Address, WriteMemory_XPROG_Params.ProgData, WriteMemory_XPROG_Params.Length))) { - ReturnStatus = XPRG_ERR_TIMEOUT; + ReturnStatus = XPROG_ERR_TIMEOUT; } } Endpoint_Write_8(CMD_XPROG); - Endpoint_Write_8(XPRG_CMD_WRITE_MEM); + Endpoint_Write_8(XPROG_CMD_WRITE_MEM); Endpoint_Write_8(ReturnStatus); Endpoint_ClearIN(); } @@ -328,7 +328,7 @@ static void XPROGProtocol_WriteMemory(void) */ static void XPROGProtocol_ReadMemory(void) { - uint8_t ReturnStatus = XPRG_ERR_OK; + uint8_t ReturnStatus = XPROG_ERR_OK; struct { @@ -347,24 +347,24 @@ static void XPROGProtocol_ReadMemory(void) uint8_t ReadBuffer[256]; - if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI) + if (XPROG_SelectedProtocol == XPROG_PROTOCOL_PDI) { /* Read the PDI target's memory, indicate timeout if occurred */ if (!(XMEGANVM_ReadMemory(ReadMemory_XPROG_Params.Address, ReadBuffer, ReadMemory_XPROG_Params.Length))) - ReturnStatus = XPRG_ERR_TIMEOUT; + ReturnStatus = XPROG_ERR_TIMEOUT; } else { /* Read the TPI target's memory, indicate timeout if occurred */ if (!(TINYNVM_ReadMemory(ReadMemory_XPROG_Params.Address, ReadBuffer, ReadMemory_XPROG_Params.Length))) - ReturnStatus = XPRG_ERR_TIMEOUT; + ReturnStatus = XPROG_ERR_TIMEOUT; } Endpoint_Write_8(CMD_XPROG); - Endpoint_Write_8(XPRG_CMD_READ_MEM); + Endpoint_Write_8(XPROG_CMD_READ_MEM); Endpoint_Write_8(ReturnStatus); - if (ReturnStatus == XPRG_ERR_OK) + if (ReturnStatus == XPROG_ERR_OK) Endpoint_Write_Stream_LE(ReadBuffer, ReadMemory_XPROG_Params.Length, NULL); Endpoint_ClearIN(); @@ -375,7 +375,7 @@ static void XPROGProtocol_ReadMemory(void) */ static void XPROGProtocol_ReadCRC(void) { - uint8_t ReturnStatus = XPRG_ERR_OK; + uint8_t ReturnStatus = XPROG_ERR_OK; struct { @@ -390,17 +390,17 @@ static void XPROGProtocol_ReadCRC(void) uint32_t MemoryCRC; - if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI) + if (XPROG_SelectedProtocol == XPROG_PROTOCOL_PDI) { uint8_t CRCCommand; /* Determine which NVM command to send to the device depending on the memory to CRC */ switch (ReadCRC_XPROG_Params.CRCType) { - case XPRG_CRC_APP: + case XPROG_CRC_APP: CRCCommand = XMEGA_NVM_CMD_APPCRC; break; - case XPRG_CRC_BOOT: + case XPROG_CRC_BOOT: CRCCommand = XMEGA_NVM_CMD_BOOTCRC; break; default: @@ -410,19 +410,19 @@ static void XPROGProtocol_ReadCRC(void) /* Perform and retrieve the memory CRC, indicate timeout if occurred */ if (!(XMEGANVM_GetMemoryCRC(CRCCommand, &MemoryCRC))) - ReturnStatus = XPRG_ERR_TIMEOUT; + ReturnStatus = XPROG_ERR_TIMEOUT; } else { /* TPI does not support memory CRC */ - ReturnStatus = XPRG_ERR_FAILED; + ReturnStatus = XPROG_ERR_FAILED; } Endpoint_Write_8(CMD_XPROG); - Endpoint_Write_8(XPRG_CMD_CRC); + Endpoint_Write_8(XPROG_CMD_CRC); Endpoint_Write_8(ReturnStatus); - if (ReturnStatus == XPRG_ERR_OK) + if (ReturnStatus == XPROG_ERR_OK) { Endpoint_Write_8(MemoryCRC >> 16); Endpoint_Write_16_LE(MemoryCRC & 0xFFFF); @@ -436,33 +436,33 @@ static void XPROGProtocol_ReadCRC(void) */ static void XPROGProtocol_SetParam(void) { - uint8_t ReturnStatus = XPRG_ERR_OK; + uint8_t ReturnStatus = XPROG_ERR_OK; uint8_t XPROGParam = Endpoint_Read_8(); /* Determine which parameter is being set, store the new parameter value */ switch (XPROGParam) { - case XPRG_PARAM_NVMBASE: + case XPROG_PARAM_NVMBASE: XPROG_Param_NVMBase = Endpoint_Read_32_BE(); break; - case XPRG_PARAM_EEPPAGESIZE: + case XPROG_PARAM_EEPPAGESIZE: XPROG_Param_EEPageSize = Endpoint_Read_16_BE(); break; - case XPRG_PARAM_NVMCMD_REG: + case XPROG_PARAM_NVMCMD_REG: XPROG_Param_NVMCMDRegAddr = Endpoint_Read_8(); break; - case XPRG_PARAM_NVMCSR_REG: + case XPROG_PARAM_NVMCSR_REG: XPROG_Param_NVMCSRRegAddr = Endpoint_Read_8(); break; - case XPRG_PARAM_UNKNOWN_1: + case XPROG_PARAM_UNKNOWN_1: /* TODO: Undocumented parameter added in AVRStudio 5.1, purpose unknown. Must ACK and discard or the communication with AVRStudio 5.1 will fail. */ Endpoint_Discard_16(); break; default: - ReturnStatus = XPRG_ERR_FAILED; + ReturnStatus = XPROG_ERR_FAILED; break; } @@ -471,7 +471,7 @@ static void XPROGProtocol_SetParam(void) Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN); Endpoint_Write_8(CMD_XPROG); - Endpoint_Write_8(XPRG_CMD_SET_PARAM); + Endpoint_Write_8(XPROG_CMD_SET_PARAM); Endpoint_Write_8(ReturnStatus); Endpoint_ClearIN(); } diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGProtocol.h b/Projects/AVRISP-MKII/Lib/XPROG/XPROGProtocol.h index 232ab53f2..ae0aa3465 100644 --- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGProtocol.h +++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGProtocol.h @@ -47,7 +47,7 @@ #include "XMEGANVM.h" #include "TINYNVM.h" #include "Config/AppConfig.h" - + /* Preprocessor Checks: */ #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1)) /* On the XPLAIN board, we only need PDI programming @@ -62,55 +62,55 @@ #endif /* Macros: */ - #define XPRG_CMD_ENTER_PROGMODE 0x01 - #define XPRG_CMD_LEAVE_PROGMODE 0x02 - #define XPRG_CMD_ERASE 0x03 - #define XPRG_CMD_WRITE_MEM 0x04 - #define XPRG_CMD_READ_MEM 0x05 - #define XPRG_CMD_CRC 0x06 - #define XPRG_CMD_SET_PARAM 0x07 - - #define XPRG_MEM_TYPE_APPL 1 - #define XPRG_MEM_TYPE_BOOT 2 - #define XPRG_MEM_TYPE_EEPROM 3 - #define XPRG_MEM_TYPE_FUSE 4 - #define XPRG_MEM_TYPE_LOCKBITS 5 - #define XPRG_MEM_TYPE_USERSIG 6 - #define XPRG_MEM_TYPE_FACTORY_CALIBRATION 7 - - #define XPRG_ERASE_CHIP 1 - #define XPRG_ERASE_APP 2 - #define XPRG_ERASE_BOOT 3 - #define XPRG_ERASE_EEPROM 4 - #define XPRG_ERASE_APP_PAGE 5 - #define XPRG_ERASE_BOOT_PAGE 6 - #define XPRG_ERASE_EEPROM_PAGE 7 - #define XPRG_ERASE_USERSIG 8 - - #define XPRG_MEM_WRITE_ERASE 0 - #define XPRG_MEM_WRITE_WRITE 1 - - #define XPRG_CRC_APP 1 - #define XPRG_CRC_BOOT 2 - #define XPRG_CRC_FLASH 3 - - #define XPRG_ERR_OK 0 - #define XPRG_ERR_FAILED 1 - #define XPRG_ERR_COLLISION 2 - #define XPRG_ERR_TIMEOUT 3 - - #define XPRG_PARAM_NVMBASE 0x01 - #define XPRG_PARAM_EEPPAGESIZE 0x02 - #define XPRG_PARAM_NVMCMD_REG 0x03 - #define XPRG_PARAM_NVMCSR_REG 0x04 - #define XPRG_PARAM_UNKNOWN_1 0x05 - - #define XPRG_PROTOCOL_PDI 0x00 - #define XPRG_PROTOCOL_JTAG 0x01 - #define XPRG_PROTOCOL_TPI 0x02 - - #define XPRG_PAGEMODE_WRITE (1 << 1) - #define XPRG_PAGEMODE_ERASE (1 << 0) + #define XPROG_CMD_ENTER_PROGMODE 0x01 + #define XPROG_CMD_LEAVE_PROGMODE 0x02 + #define XPROG_CMD_ERASE 0x03 + #define XPROG_CMD_WRITE_MEM 0x04 + #define XPROG_CMD_READ_MEM 0x05 + #define XPROG_CMD_CRC 0x06 + #define XPROG_CMD_SET_PARAM 0x07 + + #define XPROG_MEM_TYPE_APPL 1 + #define XPROG_MEM_TYPE_BOOT 2 + #define XPROG_MEM_TYPE_EEPROM 3 + #define XPROG_MEM_TYPE_FUSE 4 + #define XPROG_MEM_TYPE_LOCKBITS 5 + #define XPROG_MEM_TYPE_USERSIG 6 + #define XPROG_MEM_TYPE_FACTORY_CALIBRATION 7 + + #define XPROG_ERASE_CHIP 1 + #define XPROG_ERASE_APP 2 + #define XPROG_ERASE_BOOT 3 + #define XPROG_ERASE_EEPROM 4 + #define XPROG_ERASE_APP_PAGE 5 + #define XPROG_ERASE_BOOT_PAGE 6 + #define XPROG_ERASE_EEPROM_PAGE 7 + #define XPROG_ERASE_USERSIG 8 + + #define XPROG_MEM_WRITE_ERASE 0 + #define XPROG_MEM_WRITE_WRITE 1 + + #define XPROG_CRC_APP 1 + #define XPROG_CRC_BOOT 2 + #define XPROG_CRC_FLASH 3 + + #define XPROG_ERR_OK 0 + #define XPROG_ERR_FAILED 1 + #define XPROG_ERR_COLLISION 2 + #define XPROG_ERR_TIMEOUT 3 + + #define XPROG_PARAM_NVMBASE 0x01 + #define XPROG_PARAM_EEPPAGESIZE 0x02 + #define XPROG_PARAM_NVMCMD_REG 0x03 + #define XPROG_PARAM_NVMCSR_REG 0x04 + #define XPROG_PARAM_UNKNOWN_1 0x05 + + #define XPROG_PROTOCOL_PDI 0x00 + #define XPROG_PROTOCOL_JTAG 0x01 + #define XPROG_PROTOCOL_TPI 0x02 + + #define XPROG_PAGEMODE_WRITE (1 << 1) + #define XPROG_PAGEMODE_ERASE (1 << 0) /* External Variables: */ extern uint32_t XPROG_Param_NVMBase; diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h index 8189d29b8..091cb9861 100644 --- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h +++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h @@ -57,50 +57,57 @@ #endif /** Serial carrier TPI/PDI speed in Hz, when hardware TPI/PDI mode is used. */ - #define XPROG_HARDWARE_SPEED 250000 + #define XPROG_HARDWARE_SPEED 2000000 /** Total number of bits in a single USART frame. */ #define BITS_IN_USART_FRAME 12 - #define PDI_CMD_LDS 0x00 - #define PDI_CMD_LD 0x20 - #define PDI_CMD_STS 0x40 - #define PDI_CMD_ST 0x60 - #define PDI_CMD_LDCS 0x80 - #define PDI_CMD_REPEAT 0xA0 - #define PDI_CMD_STCS 0xC0 - #define PDI_CMD_KEY 0xE0 - - #define PDI_STATUS_REG 0 - #define PDI_RESET_REG 1 - #define PDI_CTRL_REG 2 + /** \name PDI Related Constants + * @{ + */ + #define PDI_CMD_LDS(AddressSize, DataSize) (0x00 | ( AddressSize << 2) | DataSize) + #define PDI_CMD_LD(PointerAccess, DataSize) (0x20 | (PointerAccess << 2) | DataSize) + #define PDI_CMD_STS(AddressSize, DataSize) (0x40 | ( AddressSize << 2) | DataSize) + #define PDI_CMD_ST(PointerAccess, DataSize) (0x60 | (PointerAccess << 2) | DataSize) + #define PDI_CMD_LDCS(PDIReg) (0x80 | PDIReg) + #define PDI_CMD_REPEAT(DataSize) (0xA0 | DataSize) + #define PDI_CMD_STCS(PDIReg) (0xC0 | PDIReg) + #define PDI_CMD_KEY 0xE0 + + #define PDI_REG_STATUS 0 + #define PDI_REG_RESET 1 + #define PDI_REG_CTRL 2 #define PDI_STATUS_NVM (1 << 1) #define PDI_RESET_KEY 0x59 #define PDI_NVMENABLE_KEY (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF} - #define PDI_DATSIZE_1BYTE 0 - #define PDI_DATSIZE_2BYTES 1 - #define PDI_DATSIZE_3BYTES 2 - #define PDI_DATSIZE_4BYTES 3 + #define PDI_DATASIZE_1BYTE 0 + #define PDI_DATASIZE_2BYTES 1 + #define PDI_DATASIZE_3BYTES 2 + #define PDI_DATASIZE_4BYTES 3 #define PDI_POINTER_INDIRECT 0 #define PDI_POINTER_INDIRECT_PI 1 #define PDI_POINTER_DIRECT 2 + /** @} */ - #define TPI_CMD_SLD 0x20 - #define TPI_CMD_SST 0x60 + /** \name TPI Related Constants + * @{ + */ + #define TPI_CMD_SLD(PointerAccess) (0x20 | PointerAccess) + #define TPI_CMD_SST(PointerAccess) (0x60 | PointerAccess) #define TPI_CMD_SSTPR 0x68 - #define TPI_CMD_SIN 0x10 - #define TPI_CMD_SOUT 0x90 - #define TPI_CMD_SLDCS 0x80 - #define TPI_CMD_SSTCS 0xC0 + #define TPI_CMD_SIN(Address) (0x10 | ((Address & 0x30) << 1) | (Address & 0x0F)) + #define TPI_CMD_SOUT(Address) (0x90 | ((Address & 0x30) << 1) | (Address & 0x0F)) + #define TPI_CMD_SLDCS(TPIReg) (0x80 | TPIReg) + #define TPI_CMD_SSTCS(TPIReg) (0xC0 | TPIReg) #define TPI_CMD_SKEY 0xE0 - #define TPI_STATUS_REG 0x00 - #define TPI_CTRL_REG 0x02 - #define TPI_ID_REG 0x0F + #define TPI_REG_STATUS 0x00 + #define TPI_REG_CTRL 0x02 + #define TPI_REG_ID 0x0F #define TPI_STATUS_NVM (1 << 1) @@ -108,6 +115,7 @@ #define TPI_POINTER_INDIRECT 0 #define TPI_POINTER_INDIRECT_PI 4 + /** @} */ /* Function Prototypes: */ void XPROGTarget_EnableTargetPDI(void); |