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author | inmarket <andrewh@inmarket.com.au> | 2014-11-07 13:06:02 +1000 |
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committer | inmarket <andrewh@inmarket.com.au> | 2014-11-07 13:06:02 +1000 |
commit | baebbad6237f657762523624016cd7d6d5926999 (patch) | |
tree | d7b57f4f7dbb6e64958dfe9bff8f3ba295108879 /boards/base/STM32F429i-Discovery | |
parent | 2a1c7785ccd0cb0b4675c06c2c48e270e7d926e4 (diff) | |
download | uGFX-baebbad6237f657762523624016cd7d6d5926999.tar.gz uGFX-baebbad6237f657762523624016cd7d6d5926999.tar.bz2 uGFX-baebbad6237f657762523624016cd7d6d5926999.zip |
Fix GDISP_NEED_CONTROL for the STM32F429i-Discovery board.
Diffstat (limited to 'boards/base/STM32F429i-Discovery')
-rw-r--r-- | boards/base/STM32F429i-Discovery/board_STM32F429iDiscovery.h | 45 |
1 files changed, 11 insertions, 34 deletions
diff --git a/boards/base/STM32F429i-Discovery/board_STM32F429iDiscovery.h b/boards/base/STM32F429i-Discovery/board_STM32F429iDiscovery.h index e0b2dcb6..274c97cd 100644 --- a/boards/base/STM32F429i-Discovery/board_STM32F429iDiscovery.h +++ b/boards/base/STM32F429i-Discovery/board_STM32F429iDiscovery.h @@ -60,17 +60,17 @@ static inline void init_board(GDisplay *g) { palSetPadMode(GPIOF, GPIOF_LCD_DCX, PAL_MODE_ALTERNATE(5)); palSetPadMode(GPIOF, GPIOF_LCD_DE, PAL_MODE_ALTERNATE(14)); -#define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */ -#define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */ -#define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */ -#define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */ -#define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */ -#define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */ - -#define STM32_PLLSAIN_VALUE 192 -#define STM32_PLLSAIQ_VALUE 7 -#define STM32_PLLSAIR_VALUE 4 -#define STM32_PLLSAIR_POST STM32_SAIR_DIV4 + #define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */ + #define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */ + #define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */ + #define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */ + #define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */ + #define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */ + + #define STM32_PLLSAIN_VALUE 192 + #define STM32_PLLSAIQ_VALUE 7 + #define STM32_PLLSAIR_VALUE 4 + #define STM32_PLLSAIR_POST STM32_SAIR_DIV4 /* PLLSAI activation.*/ RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24); @@ -92,32 +92,9 @@ static inline void post_init_board(GDisplay *g) { (void) g; } -static inline void setpin_reset(GDisplay *g, bool_t state) { - (void) g; - (void) state; - /* - if(state) { - // reset lcd - palClearPad(GPIOE, GPIOE_LCD_RST); - } else { - palSetPad(GPIOE, GPIOE_LCD_RST); - } - */ -} - static inline void set_backlight(GDisplay *g, uint8_t percent) { (void) g; (void) percent; - // TODO: can probably pwm this - /* - if(percent) { - // turn back light on - palSetPad(GPIOE, GPIOE_LCD_BLED); - } else { - // turn off - palClearPad(GPIOE, GPIOE_LCD_BLED); - } - */ } static inline void acquire_bus(GDisplay *g) { |