From dbeb320fd3bf884a6c88f5183e66a91790bc98a6 Mon Sep 17 00:00:00 2001 From: inmarket Date: Fri, 10 Jul 2015 18:12:52 +1000 Subject: Example make for stm32m7 using ugfx make system (not complete) Changes to some stm32f746 files --- .../STM32F746-Discovery/Example RAW32/Makefile | 95 ++++++++++++++++++++++ .../STM32F746-Discovery/board_STM32F746Discovery.h | 85 ------------------- boards/base/STM32F746-Discovery/board_STM32LTDC.h | 85 +++++++++++++++++++ .../stm32f746g_discovery_sdram.c | 1 + boards/base/STM32F746-Discovery/stm32f7xx_ll_fmc.h | 1 + 5 files changed, 182 insertions(+), 85 deletions(-) create mode 100644 boards/base/STM32F746-Discovery/Example RAW32/Makefile delete mode 100644 boards/base/STM32F746-Discovery/board_STM32F746Discovery.h create mode 100644 boards/base/STM32F746-Discovery/board_STM32LTDC.h (limited to 'boards') diff --git a/boards/base/STM32F746-Discovery/Example RAW32/Makefile b/boards/base/STM32F746-Discovery/Example RAW32/Makefile new file mode 100644 index 00000000..48283ebb --- /dev/null +++ b/boards/base/STM32F746-Discovery/Example RAW32/Makefile @@ -0,0 +1,95 @@ +# Possible Targets: all clean Debug cleanDebug Release cleanRelease + +############################################################################################## +# Settings +# + +# General settings + # See $(GFXLIB)/tools/gmake_scripts/readme.txt for the list of variables + OPT_OS = raw32 + OPT_THUMB = yes + OPT_LINK_OPTIMIZE = yes + OPT_CPU = stm32m7 + +# uGFX settings + # See $(GFXLIB)/tools/gmake_scripts/library_ugfx.mk for the list of variables + GFXLIB = ../uGFX + GFXBOARD = STM32F746-Discovery + GFXDEMO = modules/gwin/widgets + #GFXDRIVERS = + +# ChibiOS settings +ifeq ($(OPT_OS),chibios) + # See $(GFXLIB)/tools/gmake_scripts/os_chibios.mk for the list of variables + CHIBIOS = ../ChibiOS + CHIBIOS_BOARD = ST_STM32F429I_DISCOVERY + CHIBIOS_PLATFORM = STM32F4xx + CHIBIOS_PORT = GCC/ARMCMx/STM32F4xx + CHIBIOS_LDSCRIPT = STM32F407xG.ld + + #CHIBIOS = ../ChibiOS3 + #CHIBIOS_VERSION = 3 + #CHIBIOS_BOARD = ST_STM32F429I_DISCOVERY + #CHIBIOS_CPUCLASS = ARMCMx + #CHIBIOS_PLATFORM = STM32/STM32F4xx + #CHIBIOS_PORT = stm32f4xx + #CHIBIOS_LDSCRIPT = STM32F407xG.ld +endif + +CMSIS = CMSIS +HAL = STM32F7xx_HAL_Driver +CONTROLLER = STM32F746xx + +############################################################################################## +# Set these for your project +# + +ARCH = arm-none-eabi- +SRCFLAGS = -ggdb -O0 +CFLAGS = +CXXFLAGS = -fno-rtti +ASFLAGS = +LDFLAGS = + +#SRC = $(HAL)/Src/stm32f7xx_hal.c \ + $(HAL)/Src/stm32f7xx_hal_cortex.c \ + $(HAL)/Src/stm32f7xx_hal_flash.c \ + $(HAL)/Src/stm32f7xx_hal_flash_ex.c \ + $(HAL)/Src/stm32f7xx_hal_rcc.c \ + $(HAL)/Src/stm32f7xx_hal_rcc_ex.h \ + $(HAL)/Src/stm32f7xx_hal_gpio.c \ + $(HAL)/Src/stm32f7xx_hal_pwr.c \ + $(HAL)/Src/stm32f7xx_hal_pwr_ex.c \ + $(HAL)/Src/stm32f7xx_hal_ltdc.c \ + STM32746G-Discovery/stm32746g_discovery.c \ + stm32f7xx_hal_msp.c \ + stm32f7xx_it.c \ + system_stm32f7xx.c \ + ugfx_raw32_implementations.c \ + main.c \ + startup_stm32f746xx.s + +OBJS = +DEFS = +LIBS = +INCPATH = $(CMSIS)/Device/ST/STM32F7xx/Include \ + $(CMSIS)/Include \ + $(HAL)/Inc \ + STM32746G-Discovery + +LIBPATH = +LDSCRIPT = stm32f746nghx_flash.ld + +############################################################################################## +# These should be at the end +# + +include $(GFXLIB)/tools/gmake_scripts/library_ugfx.mk +include $(GFXLIB)/tools/gmake_scripts/os_$(OPT_OS).mk +include $(GFXLIB)/tools/gmake_scripts/compiler_gcc.mk +# *** EOF *** + +#ASFLAGS = -ggdb -Wall +#CFLAGS = -ggdb -g3 -Wall -std=c99 -O0 +#CPPFLAGS = -ggdb -Wall +#LDFLAGS = -fdata-sections diff --git a/boards/base/STM32F746-Discovery/board_STM32F746Discovery.h b/boards/base/STM32F746-Discovery/board_STM32F746Discovery.h deleted file mode 100644 index 33f6e2cb..00000000 --- a/boards/base/STM32F746-Discovery/board_STM32F746Discovery.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * This file is subject to the terms of the GFX License. If a copy of - * the license was not distributed with this file, you can obtain one at: - * - * http://ugfx.org/license.html - */ - -#ifndef _GDISP_LLD_BOARD_H -#define _GDISP_LLD_BOARD_H - -#include "stm32f7xx_ll_fmc.h" -#include "stm32f746g_discovery_sdram.h" -#include - -static const ltdcConfig driverCfg = { - 480, 270, // Width, Height (pixels) - 41, 10, // Horizontal, Vertical sync (pixels) - 13, 2, // Horizontal, Vertical back porch (pixels) - 32, 2, // Horizontal, Vertical front porch (pixels) - 0, // Sync flags - 0x000000, // Clear color (RGB888) - - { // Background layer config - (LLDCOLOR_TYPE *)SDRAM_BANK_ADDR, // Frame buffer address - 480, 270, // Width, Height (pixels) - 480 * LTDC_PIXELBYTES, // Line pitch (bytes) - LTDC_PIXELFORMAT, // Pixel format - 0, 0, // Start pixel position (x, y) - 480, 270, // Size of virtual layer (cx, cy) - LTDC_COLOR_FUCHSIA, // Default color (ARGB8888) - 0x980088, // Color key (RGB888) - LTDC_BLEND_FIX1_FIX2, // Blending factors - 0, // Palette (RGB888, can be NULL) - 0, // Palette length - 0xFF, // Constant alpha factor - LTDC_LEF_ENABLE // Layer configuration flags - }, - - LTDC_UNUSED_LAYER_CONFIG // Foreground layer config -}; - -static inline void init_board(GDisplay *g) { - - // As we are not using multiple displays we set g->board to NULL as we don't use it. - g->board = 0; - - switch(g->controllerdisplay) { - case 0: - #define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */ - #define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */ - #define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */ - #define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */ - #define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */ - #define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */ - - #define STM32_PLLSAIN_VALUE 192 - #define STM32_PLLSAIQ_VALUE 7 - #define STM32_PLLSAIR_VALUE 4 - #define STM32_PLLSAIR_POST STM32_SAIR_DIV4 - - /* PLLSAI activation.*/ - RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24); - RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | STM32_PLLSAIR_POST; - RCC->CR |= RCC_CR_PLLSAION; - - // Initialise the SDRAM - SDRAM_Init(); - - // Clear the SDRAM - memset((void *)SDRAM_BANK_ADDR, 0, 0x400000); - - break; - } -} - -static inline void post_init_board(GDisplay *g) { - (void) g; -} - -static inline void set_backlight(GDisplay *g, uint8_t percent) { - (void) g; - (void) percent; -} - -#endif /* _GDISP_LLD_BOARD_H */ diff --git a/boards/base/STM32F746-Discovery/board_STM32LTDC.h b/boards/base/STM32F746-Discovery/board_STM32LTDC.h new file mode 100644 index 00000000..33f6e2cb --- /dev/null +++ b/boards/base/STM32F746-Discovery/board_STM32LTDC.h @@ -0,0 +1,85 @@ +/* + * This file is subject to the terms of the GFX License. If a copy of + * the license was not distributed with this file, you can obtain one at: + * + * http://ugfx.org/license.html + */ + +#ifndef _GDISP_LLD_BOARD_H +#define _GDISP_LLD_BOARD_H + +#include "stm32f7xx_ll_fmc.h" +#include "stm32f746g_discovery_sdram.h" +#include + +static const ltdcConfig driverCfg = { + 480, 270, // Width, Height (pixels) + 41, 10, // Horizontal, Vertical sync (pixels) + 13, 2, // Horizontal, Vertical back porch (pixels) + 32, 2, // Horizontal, Vertical front porch (pixels) + 0, // Sync flags + 0x000000, // Clear color (RGB888) + + { // Background layer config + (LLDCOLOR_TYPE *)SDRAM_BANK_ADDR, // Frame buffer address + 480, 270, // Width, Height (pixels) + 480 * LTDC_PIXELBYTES, // Line pitch (bytes) + LTDC_PIXELFORMAT, // Pixel format + 0, 0, // Start pixel position (x, y) + 480, 270, // Size of virtual layer (cx, cy) + LTDC_COLOR_FUCHSIA, // Default color (ARGB8888) + 0x980088, // Color key (RGB888) + LTDC_BLEND_FIX1_FIX2, // Blending factors + 0, // Palette (RGB888, can be NULL) + 0, // Palette length + 0xFF, // Constant alpha factor + LTDC_LEF_ENABLE // Layer configuration flags + }, + + LTDC_UNUSED_LAYER_CONFIG // Foreground layer config +}; + +static inline void init_board(GDisplay *g) { + + // As we are not using multiple displays we set g->board to NULL as we don't use it. + g->board = 0; + + switch(g->controllerdisplay) { + case 0: + #define STM32_SAISRC_NOCLOCK (0 << 23) /**< No clock. */ + #define STM32_SAISRC_PLL (1 << 23) /**< SAI_CKIN is PLL. */ + #define STM32_SAIR_DIV2 (0 << 16) /**< R divided by 2. */ + #define STM32_SAIR_DIV4 (1 << 16) /**< R divided by 4. */ + #define STM32_SAIR_DIV8 (2 << 16) /**< R divided by 8. */ + #define STM32_SAIR_DIV16 (3 << 16) /**< R divided by 16. */ + + #define STM32_PLLSAIN_VALUE 192 + #define STM32_PLLSAIQ_VALUE 7 + #define STM32_PLLSAIR_VALUE 4 + #define STM32_PLLSAIR_POST STM32_SAIR_DIV4 + + /* PLLSAI activation.*/ + RCC->PLLSAICFGR = (STM32_PLLSAIN_VALUE << 6) | (STM32_PLLSAIR_VALUE << 28) | (STM32_PLLSAIQ_VALUE << 24); + RCC->DCKCFGR = (RCC->DCKCFGR & ~RCC_DCKCFGR_PLLSAIDIVR) | STM32_PLLSAIR_POST; + RCC->CR |= RCC_CR_PLLSAION; + + // Initialise the SDRAM + SDRAM_Init(); + + // Clear the SDRAM + memset((void *)SDRAM_BANK_ADDR, 0, 0x400000); + + break; + } +} + +static inline void post_init_board(GDisplay *g) { + (void) g; +} + +static inline void set_backlight(GDisplay *g, uint8_t percent) { + (void) g; + (void) percent; +} + +#endif /* _GDISP_LLD_BOARD_H */ diff --git a/boards/base/STM32F746-Discovery/stm32f746g_discovery_sdram.c b/boards/base/STM32F746-Discovery/stm32f746g_discovery_sdram.c index 0ef2d634..5fc5e559 100644 --- a/boards/base/STM32F746-Discovery/stm32f746g_discovery_sdram.c +++ b/boards/base/STM32F746-Discovery/stm32f746g_discovery_sdram.c @@ -76,6 +76,7 @@ */ /* Includes ------------------------------------------------------------------*/ +#include "gfx.h" #include "stm32f746g_discovery_sdram.h" /** @addtogroup BSP diff --git a/boards/base/STM32F746-Discovery/stm32f7xx_ll_fmc.h b/boards/base/STM32F746-Discovery/stm32f7xx_ll_fmc.h index 019ec064..85e8bedf 100644 --- a/boards/base/STM32F746-Discovery/stm32f7xx_ll_fmc.h +++ b/boards/base/STM32F746-Discovery/stm32f7xx_ll_fmc.h @@ -44,6 +44,7 @@ #endif /* Includes ------------------------------------------------------------------*/ +#include "gfx.h" #include "stm32f7xx_hal_def.h" /** @addtogroup STM32F7xx_HAL_Driver -- cgit v1.2.3