From 1bfc5a9f85e7c3296095105ca8e3ee1215b22be8 Mon Sep 17 00:00:00 2001
From: Joel Bodenmann <joel@unormal.org>
Date: Mon, 11 Feb 2013 09:25:45 +0100
Subject: removed GDISP_LLD() macro - fix

---
 .../gdisp/S6D1121/gdisp_lld_board_olimex_e407.h    | 94 ++++++++++++++++++++++
 1 file changed, 94 insertions(+)
 create mode 100644 drivers/gdisp/S6D1121/gdisp_lld_board_olimex_e407.h

(limited to 'drivers/gdisp/S6D1121/gdisp_lld_board_olimex_e407.h')

diff --git a/drivers/gdisp/S6D1121/gdisp_lld_board_olimex_e407.h b/drivers/gdisp/S6D1121/gdisp_lld_board_olimex_e407.h
new file mode 100644
index 00000000..34224425
--- /dev/null
+++ b/drivers/gdisp/S6D1121/gdisp_lld_board_olimex_e407.h
@@ -0,0 +1,94 @@
+/*
+    ChibiOS/GFX - Copyright (C) 2012
+                 Joel Bodenmann aka Tectu <joel@unormal.org>
+
+    This file is part of ChibiOS/GFX.
+
+    ChibiOS/GFX is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/GFX is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    drivers/gdisp/S6D1121/gdisp_lld_board_olimex_e407.h
+ * @brief   GDISP Graphic Driver subsystem board interface for the S6D1121 display
+ *
+ * @addtogroup GDISP
+ * @{
+ */
+
+#ifndef _GDISP_LLD_BOARD_H
+#define _GDISP_LLD_BOARD_H
+
+#define GDISP_REG              (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
+#define GDISP_RAM              (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
+
+static __inline void init_board(void) {
+	int FSMC_Bank = 0;
+
+	/* STM32F4 FSMC init */
+	rccEnableAHB3(RCC_AHB3ENR_FSMCEN, 0);
+
+	/* set pins to FSMC mode */
+	IOBus busD = {GPIOD, (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 7) | (1 << 8) |
+ 						(1 << 9) | (1 << 10) | (1 << 11) | (1 << 14) | (1 << 15), 0};
+
+	IOBus busE = {GPIOE, (1 << 7) | (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) |
+						(1 << 13) | (1 << 14) | (1 << 15), 0};
+
+	palSetBusMode(&busD, PAL_MODE_ALTERNATE(12));
+	palSetBusMode(&busE, PAL_MODE_ALTERNATE(12));
+
+	/* FSMC timing */
+	FSMC_Bank1->BTCR[FSMC_Bank+1] = (6) | (10 << 8) | (10 << 16);
+
+	/* Bank1 NOR/SRAM control register configuration */
+	FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;	
+}
+
+static __inline void setpin_reset(bool_t state) {
+	(void)state;
+
+	/* Nothing to do here */
+}
+
+static __inline void set_backlight(uint8_t percent) {
+	(void)percent;
+
+	/* Nothing to do here */
+}
+
+static __inline void acquire_bus(void) {
+	/* Nothing to do here */
+}
+
+static __inline void release_bus(void) {
+	/* Nothing to do here */
+}
+
+static __inline void write_index(uint16_t index) {
+	GDISP_REG = index;
+}
+
+static __inline void write_data(uint16_t data) {
+	GDISP_RAM = data;
+}
+
+#if GDISP_HARDWARE_READPIXEL || GDISP_HARDWARE_SCROLL || defined(__DOXYGEN__)
+static __inline uint16_t read_data(void) {
+	return GDISP_RAM;
+}
+#endif
+
+#endif /* _GDISP_LLD_BOARD_H */
+/** @} */
+
-- 
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