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authorAlan Mishchenko <alanmi@berkeley.edu>2012-01-21 04:30:10 -0800
committerAlan Mishchenko <alanmi@berkeley.edu>2012-01-21 04:30:10 -0800
commit8014f25f6db719fa62336f997963532a14c568f6 (patch)
treec691ee91a3a2d452a2bd24ac89a8c717beaa7af7
parentc44cc5de9429e6b4f1c05045fcf43c9cb96437b5 (diff)
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Major restructuring of the code.
-rw-r--r--Makefile50
-rw-r--r--abcexe.dsp4
-rw-r--r--abclib.dsp1284
-rw-r--r--arch_flags.c17
-rw-r--r--src/aig/aig/aig.h36
-rw-r--r--src/aig/aig/aigCanon.c12
-rw-r--r--src/aig/aig/aigCuts.c4
-rw-r--r--src/aig/aig/aigDfs.c4
-rw-r--r--src/aig/aig/aigDoms.c2
-rw-r--r--src/aig/aig/aigDup.c68
-rw-r--r--src/aig/aig/aigFact.c4
-rw-r--r--src/aig/aig/aigFanout.c2
-rw-r--r--src/aig/aig/aigFrames.c4
-rw-r--r--src/aig/aig/aigInter.c4
-rw-r--r--src/aig/aig/aigJust.c6
-rw-r--r--src/aig/aig/aigMan.c12
-rw-r--r--src/aig/aig/aigMffc.c2
-rw-r--r--src/aig/aig/aigObj.c8
-rw-r--r--src/aig/aig/aigPack.c28
-rw-r--r--src/aig/aig/aigPart.c14
-rw-r--r--src/aig/aig/aigPartSat.c4
-rw-r--r--src/aig/aig/aigRepar.c8
-rw-r--r--src/aig/aig/aigRepr.c4
-rw-r--r--src/aig/aig/aigRet.c18
-rw-r--r--src/aig/aig/aigScl.c4
-rw-r--r--src/aig/aig/aigSplit.c7
-rw-r--r--src/aig/aig/aigTable.c2
-rw-r--r--src/aig/aig/aigTiming.c2
-rw-r--r--src/aig/aig/aigTruth.c2
-rw-r--r--src/aig/aig/aigTsim.c18
-rw-r--r--src/aig/aig/aigUtil.c78
-rw-r--r--src/aig/bar/module.make1
-rw-r--r--src/aig/bbl/module.make1
-rw-r--r--src/aig/bbr/module.make4
-rw-r--r--src/aig/bdc/module.make5
-rw-r--r--src/aig/cec/module.make13
-rw-r--r--src/aig/cgt/module.make5
-rw-r--r--src/aig/cnf/module.make9
-rw-r--r--src/aig/csw/module.make4
-rw-r--r--src/aig/dar/module.make10
-rw-r--r--src/aig/dch/module.make10
-rw-r--r--src/aig/fra/module.make17
-rw-r--r--src/aig/fsim/module.make6
-rw-r--r--src/aig/gia/gia.h91
-rw-r--r--src/aig/gia/giaAbs.c4
-rw-r--r--src/aig/gia/giaAbs.h4
-rw-r--r--src/aig/gia/giaAbsVta.c25
-rw-r--r--src/aig/gia/giaAig.c42
-rw-r--r--src/aig/gia/giaAig.h6
-rw-r--r--src/aig/gia/giaAiger.c54
-rw-r--r--src/aig/gia/giaBidec.c8
-rw-r--r--src/aig/gia/giaCCof.c16
-rw-r--r--src/aig/gia/giaCSat.c12
-rw-r--r--src/aig/gia/giaCSatOld.c10
-rw-r--r--src/aig/gia/giaCTas.c68
-rw-r--r--src/aig/gia/giaCof.c30
-rw-r--r--src/aig/gia/giaDup.c106
-rw-r--r--src/aig/gia/giaEmbed.c32
-rw-r--r--src/aig/gia/giaEnable.c16
-rw-r--r--src/aig/gia/giaEquiv.c64
-rw-r--r--src/aig/gia/giaEra.c18
-rw-r--r--src/aig/gia/giaEra2.c42
-rw-r--r--src/aig/gia/giaFanout.c2
-rw-r--r--src/aig/gia/giaForce.c8
-rw-r--r--src/aig/gia/giaFrames.c24
-rw-r--r--src/aig/gia/giaFront.c6
-rw-r--r--src/aig/gia/giaGiarf.c38
-rw-r--r--src/aig/gia/giaGlitch.c8
-rw-r--r--src/aig/gia/giaHash.c46
-rw-r--r--src/aig/gia/giaHcd.c22
-rw-r--r--src/aig/gia/giaIf.c14
-rw-r--r--src/aig/gia/giaMan.c15
-rw-r--r--src/aig/gia/giaPat.c4
-rw-r--r--src/aig/gia/giaReparam.c6
-rw-r--r--src/aig/gia/giaRetime.c6
-rw-r--r--src/aig/gia/giaSat.c2
-rw-r--r--src/aig/gia/giaScl.c2
-rw-r--r--src/aig/gia/giaShrink.c8
-rw-r--r--src/aig/gia/giaSim.c12
-rw-r--r--src/aig/gia/giaSim2.c6
-rw-r--r--src/aig/gia/giaSpeedup.c6
-rw-r--r--src/aig/gia/giaSupMin.c2
-rw-r--r--src/aig/gia/giaSwitch.c8
-rw-r--r--src/aig/gia/giaTsim.c22
-rw-r--r--src/aig/gia/giaUtil.c46
-rw-r--r--src/aig/hop/cudd2.c2
-rw-r--r--src/aig/hop/cudd2.h4
-rw-r--r--src/aig/hop/hop.h8
-rw-r--r--src/aig/hop/hopDfs.c4
-rw-r--r--src/aig/hop/hopTable.c38
-rw-r--r--src/aig/int/module.make11
-rw-r--r--src/aig/ioa/ioa.h8
-rw-r--r--src/aig/ioa/ioaReadAig.c4
-rw-r--r--src/aig/ioa/ioaUtil.c2
-rw-r--r--src/aig/ivy/attr.h6
-rw-r--r--src/aig/ivy/ivy.h8
-rw-r--r--src/aig/ivy/ivyFraig.c10
-rw-r--r--src/aig/ivy/ivyRwr.c4
-rw-r--r--src/aig/ivy/ivySeq.c4
-rw-r--r--src/aig/ivy/ivyTable.c37
-rw-r--r--src/aig/kit/module.make11
-rw-r--r--src/aig/live/module.make3
-rw-r--r--src/aig/llb/module.make23
-rw-r--r--src/aig/mem/module.make1
-rw-r--r--src/aig/mfx/mfx.h85
-rw-r--r--src/aig/mfx/mfxCore.c393
-rw-r--r--src/aig/mfx/mfxDiv.c308
-rw-r--r--src/aig/mfx/mfxInt.h168
-rw-r--r--src/aig/mfx/mfxInter.c368
-rw-r--r--src/aig/mfx/mfxMan.c195
-rw-r--r--src/aig/mfx/mfxResub.c566
-rw-r--r--src/aig/mfx/mfxSat.c145
-rw-r--r--src/aig/mfx/mfxStrash.c344
-rw-r--r--src/aig/mfx/mfxWin.c117
-rw-r--r--src/aig/mfx/mfx_.c52
-rw-r--r--src/aig/mfx/module.make8
-rw-r--r--src/aig/ntl/module.make17
-rw-r--r--src/aig/ntl/ntl.h426
-rw-r--r--src/aig/ntl/ntlCheck.c379
-rw-r--r--src/aig/ntl/ntlCore.c152
-rw-r--r--src/aig/ntl/ntlEc.c370
-rw-r--r--src/aig/ntl/ntlExtract.c877
-rw-r--r--src/aig/ntl/ntlFraig.c1004
-rw-r--r--src/aig/ntl/ntlInsert.c614
-rw-r--r--src/aig/ntl/ntlMan.c1068
-rw-r--r--src/aig/ntl/ntlMap.c346
-rw-r--r--src/aig/ntl/ntlNames.c471
-rw-r--r--src/aig/ntl/ntlObj.c319
-rw-r--r--src/aig/ntl/ntlReadBlif.c1446
-rw-r--r--src/aig/ntl/ntlSweep.c214
-rw-r--r--src/aig/ntl/ntlTable.c554
-rw-r--r--src/aig/ntl/ntlTime.c245
-rw-r--r--src/aig/ntl/ntlUtil.c737
-rw-r--r--src/aig/ntl/ntlWriteBlif.c697
-rw-r--r--src/aig/ntl/ntl_.c52
-rw-r--r--src/aig/nwk/module.make14
-rw-r--r--src/aig/rwt/module.make3
-rw-r--r--src/aig/saig/saig.h8
-rw-r--r--src/aig/saig/saigAbs.c4
-rw-r--r--src/aig/saig/saigAbsCba.c34
-rw-r--r--src/aig/saig/saigAbsPba.c16
-rw-r--r--src/aig/saig/saigAbsStart.c8
-rw-r--r--src/aig/saig/saigAbsVfa.c4
-rw-r--r--src/aig/saig/saigBmc.c8
-rw-r--r--src/aig/saig/saigBmc2.c12
-rw-r--r--src/aig/saig/saigBmc3.c10
-rw-r--r--src/aig/saig/saigCexMin.c60
-rw-r--r--src/aig/saig/saigConstr.c12
-rw-r--r--src/aig/saig/saigConstr2.c24
-rw-r--r--src/aig/saig/saigDup.c24
-rw-r--r--src/aig/saig/saigGlaCba.c10
-rw-r--r--src/aig/saig/saigGlaPba.c4
-rw-r--r--src/aig/saig/saigGlaPba2.c2
-rw-r--r--src/aig/saig/saigHaig.c8
-rw-r--r--src/aig/saig/saigInd.c6
-rw-r--r--src/aig/saig/saigIoa.c14
-rw-r--r--src/aig/saig/saigMiter.c34
-rw-r--r--src/aig/saig/saigOutDec.c8
-rw-r--r--src/aig/saig/saigPhase.c34
-rw-r--r--src/aig/saig/saigRefSat.c34
-rw-r--r--src/aig/saig/saigRetMin.c16
-rw-r--r--src/aig/saig/saigSimExt.c18
-rw-r--r--src/aig/saig/saigSimExt2.c22
-rw-r--r--src/aig/saig/saigSimFast.c2
-rw-r--r--src/aig/saig/saigSimMv.c6
-rw-r--r--src/aig/saig/saigSimSeq.c6
-rw-r--r--src/aig/saig/saigStrSim.c4
-rw-r--r--src/aig/saig/saigSwitch.c2
-rw-r--r--src/aig/saig/saigSynch.c4
-rw-r--r--src/aig/saig/saigTempor.c4
-rw-r--r--src/aig/saig/saigTrans.c2
-rw-r--r--src/aig/saig/saigWnd.c8
-rw-r--r--src/aig/ssw/module.make20
-rw-r--r--src/aig/tim/module.make1
-rw-r--r--src/base/abc/abc.h28
-rw-r--r--src/base/abc/abcAig.c13
-rw-r--r--src/base/abc/abcBlifMv.c16
-rw-r--r--src/base/abc/abcCheck.c4
-rw-r--r--src/base/abc/abcDfs.c8
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-rw-r--r--src/base/abc/abcHie.c5
-rw-r--r--src/base/abc/abcHieCec.c24
-rw-r--r--src/base/abc/abcHieNew.c18
-rw-r--r--src/base/abc/abcInt.h4
-rw-r--r--src/base/abc/abcLatch.c6
-rw-r--r--src/base/abc/abcLib.c3
-rw-r--r--src/base/abc/abcMinBase.c2
-rw-r--r--src/base/abc/abcNames.c19
-rw-r--r--src/base/abc/abcNetlist.c2
-rw-r--r--src/base/abc/abcNtk.c7
-rw-r--r--src/base/abc/abcObj.c5
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898 files changed, 4252 insertions, 32023 deletions
diff --git a/Makefile b/Makefile
index 727d95f0..c5d6989c 100644
--- a/Makefile
+++ b/Makefile
@@ -8,41 +8,35 @@ PROG := abc
MODULES := \
$(wildcard src/ext) src/misc/ext \
- src/base/abc src/base/abci src/base/cmd \
- src/base/io src/base/main src/base/ver src/base/test \
- src/bdd/cudd src/bdd/dsd src/bdd/epd src/bdd/mtr \
- src/bdd/parse src/bdd/reo src/bdd/cas \
- src/map/fpga src/map/mapper src/map/mio src/map/super \
- src/map/if src/map/amap src/map/cov \
- src/misc/extra src/misc/mvc src/misc/st src/misc/util \
- src/misc/nm src/misc/vec src/misc/hash \
- src/misc/bzlib src/misc/zlib \
- src/opt/cut src/opt/dec src/opt/fxu src/opt/rwr src/opt/mfs \
- src/opt/sim src/opt/ret src/opt/res src/opt/lpk \
- src/sat/bsat src/sat/csat src/sat/msat src/sat/fraig \
- src/sat/psat src/sat/pdr \
- src/aig/ivy src/aig/hop src/aig/rwt src/aig/deco \
- src/aig/mem src/aig/dar src/aig/fra src/aig/cnf \
- src/aig/csw src/aig/ioa src/aig/aig src/aig/kit \
- src/aig/bdc src/aig/bar src/aig/ntl src/aig/nwk \
- src/aig/mfx src/aig/tim src/aig/saig src/aig/bbr \
- src/aig/int src/aig/dch src/aig/ssw src/aig/cgt \
- src/aig/cec src/aig/gia src/aig/bbl src/aig/live \
- src/aig/llb \
+ src/base/abc src/base/abci src/base/cmd src/base/io \
+ src/base/main src/base/ver src/base/test \
+ src/bdd/cudd src/bdd/dsd src/bdd/epd src/bdd/mtr src/bdd/parse \
+ src/bdd/reo src/bdd/cas \
+ src/map/fpga src/map/mapper src/map/mio src/map/super src/map/if \
+ src/map/amap src/map/cov \
+ src/misc/extra src/misc/mvc src/misc/st src/misc/util src/misc/nm \
+ src/misc/vec src/misc/hash src/misc/tim src/misc/bzlib src/misc/zlib \
+ src/misc/mem src/misc/bar src/misc/bbl \
+ src/opt/cut src/opt/fxu src/opt/rwr src/opt/mfs src/opt/sim \
+ src/opt/ret src/opt/res src/opt/lpk src/opt/nwk src/opt/rwt \
+ src/opt/cgt src/opt/csw src/opt/dar \
+ src/sat/bsat src/sat/csat src/sat/msat src/sat/psat src/sat/cnf \
+ src/bool/bdc src/bool/deco src/bool/dec src/bool/kit \
+ src/proof/pdr src/proof/int src/proof/bbr src/proof/llb src/proof/live \
+ src/proof/cec src/proof/dch src/proof/fraig src/proof/fra src/proof/ssw \
+ src/aig/aig src/aig/saig src/aig/gia src/aig/ioa src/aig/ivy src/aig/hop \
src/python
all: $(PROG)
default: $(PROG)
-# Please note that to compile on 32-bit Linux the following optflags are required:
-# -DLIN -DSIZEOF_VOID_P=4 -DSIZEOF_LONG=4
+arch_flags : arch_flags.c
+ gcc arch_flags.c -o arch_flags
-#OPTFLAGS := -DNDEBUG -O3 -DLIN
-#OPTFLAGS := -DNDEBUG -O3 -DLIN64
-#OPTFLAGS := -g -O -DLIN -m32
-OPTFLAGS := -g -O -DLIN64 -DSIZEOF_VOID_P=8 -DSIZEOF_LONG=8 -DSIZEOF_INT=4 -DABC_NAMESPACE=xxx
+ARCHFLAGS := $(shell gcc arch_flags.c -o arch_flags && ./arch_flags)
+OPTFLAGS := -g -O #-DABC_NAMESPACE=xxx
-CFLAGS += -Wall -Wno-unused-function $(OPTFLAGS) $(patsubst %, -I%, $(MODULES))
+CFLAGS += -Wall -Wno-unused-function $(OPTFLAGS) $(ARCHFLAGS) -I$(PWD)
CXXFLAGS += $(CFLAGS)
#LIBS := -m32 -ldl -rdynamic -lreadline -ltermcap
diff --git a/abcexe.dsp b/abcexe.dsp
index 58aa7c14..ad15afa1 100644
--- a/abcexe.dsp
+++ b/abcexe.dsp
@@ -42,7 +42,7 @@ RSC=rc.exe
# PROP Ignore_Export_Lib 0
# PROP Target_Dir ""
# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c
-# ADD CPP /nologo /MD /W3 /GX /O2 /I "src/ext/ext" /I "src/misc/ext" /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/cov" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/misc/zlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/sat/nsat" /I "src/sat/psat" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /I "src/aig/int" /I "src/aig/dch" /I "src/aig/ssw" /I "src/sat/lsat" /I "src/aig/cec" /I "src/aig/cgt" /I "src/aig/sec" /I "src/map/amap" /I "src/aig/fsim" /I "src/aig/gia" /I "src/aig/bbl" /I "src/aig/llb" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D ABC_DLL=ABC_DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /FR /YX /FD /c
+# ADD CPP /nologo /MD /W3 /GX /O2 /I "C:/_projects/abc_niklas/" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D ABC_DLL=ABC_DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /FR /YX /FD /c
# ADD BASE RSC /l 0x409 /d "NDEBUG"
# ADD RSC /l 0x409 /d "NDEBUG"
BSC32=bscmake.exe
@@ -66,7 +66,7 @@ LINK32=link.exe
# PROP Ignore_Export_Lib 0
# PROP Target_Dir ""
# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c
-# ADD CPP /nologo /MDd /W3 /Gm /GX /ZI /Od /I "src/ext/ext" /I "src/misc/ext" /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/cov" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/misc/zlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/sat/nsat" /I "src/sat/psat" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /I "src/aig/int" /I "src/aig/dch" /I "src/aig/ssw" /I "src/sat/lsat" /I "src/aig/cec" /I "src/aig/cgt" /I "src/aig/sec" /I "src/map/amap" /I "src/aig/fsim" /I "src/aig/gia" /I "src/aig/bbl" /I "src/aig/llb" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D ABC_DLL=ABC_DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /FR /YX /FD /GZ /c
+# ADD CPP /nologo /MDd /W3 /Gm /GX /ZI /Od /I "C:/_projects/abc_niklas/" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D ABC_DLL=ABC_DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /FR /YX /FD /GZ /c
# ADD BASE RSC /l 0x409 /d "_DEBUG"
# ADD RSC /l 0x409 /d "_DEBUG"
BSC32=bscmake.exe
diff --git a/abclib.dsp b/abclib.dsp
index 064206a3..41b1c77d 100644
--- a/abclib.dsp
+++ b/abclib.dsp
@@ -41,7 +41,7 @@ RSC=rc.exe
# PROP Intermediate_Dir "ReleaseLib"
# PROP Target_Dir ""
# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /YX /FD /c
-# ADD CPP /nologo /MD /W3 /GX /O2 /I "src/sat/pdr" /I "src/ext/ext" /I "src/misc/ext" /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/cov" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/misc/zlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/sat/nsat" /I "src/sat/psat" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /I "src/aig/int" /I "src/aig/dch" /I "src/aig/ssw" /I "src/sat/lsat" /I "src/aig/cec" /I "src/aig/cgt" /I "src/aig/sec" /I "src/map/amap" /I "src/aig/fsim" /I "src/aig/gia" /I "src/aig/bbl" /I "src/aig/llb" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D ABC_DLL=ABC_DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /FR /YX /FD /c
+# ADD CPP /nologo /MD /W3 /GX /O2 /I "C:/_projects/abc_niklas/" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D ABC_DLL=ABC_DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /FR /YX /FD /c
# ADD BASE RSC /l 0x409 /d "NDEBUG"
# ADD RSC /l 0x409 /d "NDEBUG"
BSC32=bscmake.exe
@@ -64,7 +64,7 @@ LIB32=link.exe -lib
# PROP Intermediate_Dir "DebugLib"
# PROP Target_Dir ""
# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /YX /FD /GZ /c
-# ADD CPP /nologo /MDd /W3 /Gm /GX /ZI /Od /I "src/sat/pdr" /I "src/ext/ext" /I "src/misc/ext" /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/cov" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/misc/zlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/sat/nsat" /I "src/sat/psat" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /I "src/aig/int" /I "src/aig/dch" /I "src/aig/ssw" /I "src/sat/lsat" /I "src/aig/cec" /I "src/aig/cgt" /I "src/aig/sec" /I "src/map/amap" /I "src/aig/fsim" /I "src/aig/gia" /I "src/aig/bbl" /I "src/aig/llb" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D ABC_DLL=ABC_DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /FR /YX /FD /GZ /c
+# ADD CPP /nologo /MDd /W3 /Gm /GX /ZI /Od /I "C:/_projects/abc_niklas/" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D ABC_DLL=ABC_DLLEXPORT /D "_CRT_SECURE_NO_DEPRECATE" /FR /YX /FD /GZ /c
# ADD BASE RSC /l 0x409 /d "_DEBUG"
# ADD RSC /l 0x409 /d "_DEBUG"
BSC32=bscmake.exe
@@ -187,10 +187,6 @@ SOURCE=.\src\base\abci\abc.c
# End Source File
# Begin Source File
-SOURCE=.\src\base\abci\abcAbc8.c
-# End Source File
-# Begin Source File
-
SOURCE=.\src\base\abci\abcAttach.c
# End Source File
# Begin Source File
@@ -1174,70 +1170,6 @@ SOURCE=.\src\sat\msat\msatSort.c
SOURCE=.\src\sat\msat\msatVec.c
# End Source File
# End Group
-# Begin Group "fraig"
-
-# PROP Default_Filter ""
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraig.h
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigApi.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigCanon.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigChoice.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigFanout.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigFeed.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigInt.h
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigMan.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigMem.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigNode.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigPrime.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigSat.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigTable.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigUtil.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\sat\fraig\fraigVec.c
-# End Source File
-# End Group
# Begin Group "csat"
# PROP Default_Filter ""
@@ -1362,48 +1294,48 @@ SOURCE=.\src\sat\psat\m114p_types.h
SOURCE=.\src\sat\lsat\solver.h
# End Source File
# End Group
-# Begin Group "pdr"
+# Begin Group "cnf"
# PROP Default_Filter ""
# Begin Source File
-SOURCE=.\src\sat\pdr\pdr.h
+SOURCE=.\src\sat\cnf\cnf.h
# End Source File
# Begin Source File
-SOURCE=.\src\sat\pdr\pdrClass.c
+SOURCE=.\src\sat\cnf\cnfCore.c
# End Source File
# Begin Source File
-SOURCE=.\src\sat\pdr\pdrCnf.c
+SOURCE=.\src\sat\cnf\cnfCut.c
# End Source File
# Begin Source File
-SOURCE=.\src\sat\pdr\pdrCore.c
+SOURCE=.\src\sat\cnf\cnfData.c
# End Source File
# Begin Source File
-SOURCE=.\src\sat\pdr\pdrInt.h
+SOURCE=.\src\sat\cnf\cnfFast.c
# End Source File
# Begin Source File
-SOURCE=.\src\sat\pdr\pdrInv.c
+SOURCE=.\src\sat\cnf\cnfMan.c
# End Source File
# Begin Source File
-SOURCE=.\src\sat\pdr\pdrMan.c
+SOURCE=.\src\sat\cnf\cnfMap.c
# End Source File
# Begin Source File
-SOURCE=.\src\sat\pdr\pdrSat.c
+SOURCE=.\src\sat\cnf\cnfPost.c
# End Source File
# Begin Source File
-SOURCE=.\src\sat\pdr\pdrTsim.c
+SOURCE=.\src\sat\cnf\cnfUtil.c
# End Source File
# Begin Source File
-SOURCE=.\src\sat\pdr\pdrUtil.c
+SOURCE=.\src\sat\cnf\cnfWrite.c
# End Source File
# End Group
# End Group
@@ -1566,34 +1498,6 @@ SOURCE=.\src\opt\cut\cutSeq.c
SOURCE=.\src\opt\cut\cutTruth.c
# End Source File
# End Group
-# Begin Group "dec"
-
-# PROP Default_Filter ""
-# Begin Source File
-
-SOURCE=.\src\opt\dec\dec.h
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\opt\dec\decAbc.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\opt\dec\decFactor.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\opt\dec\decMan.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\opt\dec\decPrint.c
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\opt\dec\decUtil.c
-# End Source File
-# End Group
# Begin Group "sim"
# PROP Default_Filter ""
@@ -1774,10 +1678,6 @@ SOURCE=.\src\opt\lpk\lpkMux.c
SOURCE=.\src\opt\lpk\lpkSets.c
# End Source File
# End Group
-# Begin Group "fret"
-
-# PROP Default_Filter ""
-# End Group
# Begin Group "mfs"
# PROP Default_Filter ""
@@ -1822,6 +1722,214 @@ SOURCE=.\src\opt\mfs\mfsStrash.c
SOURCE=.\src\opt\mfs\mfsWin.c
# End Source File
# End Group
+# Begin Group "cgt"
+
+# PROP Default_Filter ""
+# Begin Source File
+
+SOURCE=.\src\opt\cgt\cgt.h
+# End Source File
+# Begin Source File
+
+SOURCE=.\src\opt\cgt\cgtAig.c
+# End Source File
+# Begin Source File
+
+SOURCE=.\src\opt\cgt\cgtCore.c
+# End Source File
+# Begin Source File
+
+SOURCE=.\src\opt\cgt\cgtDecide.c
+# End Source File
+# Begin Source File
+
+SOURCE=.\src\opt\cgt\cgtInt.h
+# End Source File
+# Begin Source File
+
+SOURCE=.\src\opt\cgt\cgtMan.c
+# End Source File
+# Begin Source File
+
+SOURCE=.\src\opt\cgt\cgtSat.c
+# End Source File
+# End Group
+# Begin Group "csw"
+
+# PROP Default_Filter ""
+# Begin Source File
+
+SOURCE=.\src\opt\csw\csw.h
+# End Source File
+# Begin Source File
+
+SOURCE=.\src\opt\csw\cswCore.c
+# End Source File
+# Begin Source File
+
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-SOURCE=.\src\aig\gia\giaCSatOld.c
+SOURCE=.\src\proof\llb\llb.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaCTas.c
+SOURCE=.\src\proof\llb\llb.h
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaDfs.c
+SOURCE=.\src\proof\llb\llb1Cluster.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaDup.c
+SOURCE=.\src\proof\llb\llb1Constr.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaEmbed.c
+SOURCE=.\src\proof\llb\llb1Core.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaEnable.c
+SOURCE=.\src\proof\llb\llb1Group.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaEquiv.c
+SOURCE=.\src\proof\llb\llb1Hint.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaEra.c
+SOURCE=.\src\proof\llb\llb1Man.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaEra2.c
+SOURCE=.\src\proof\llb\llb1Matrix.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaFanout.c
+SOURCE=.\src\proof\llb\llb1Pivot.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaForce.c
+SOURCE=.\src\proof\llb\llb1Reach.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaFrames.c
+SOURCE=.\src\proof\llb\llb1Sched.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaFront.c
+SOURCE=.\src\proof\llb\llb2Bad.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaGiarf.c
+SOURCE=.\src\proof\llb\llb2Core.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaGlitch.c
+SOURCE=.\src\proof\llb\llb2Driver.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaHash.c
+SOURCE=.\src\proof\llb\llb2Dump.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaHcd.c
+SOURCE=.\src\proof\llb\llb2Flow.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaIf.c
+SOURCE=.\src\proof\llb\llb2Image.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaMan.c
+SOURCE=.\src\proof\llb\llb3Image.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaMem.c
+SOURCE=.\src\proof\llb\llb3Nonlin.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaPat.c
+SOURCE=.\src\proof\llb\llb4Cex.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaReparam.c
+SOURCE=.\src\proof\llb\llb4Cluster.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaRetime.c
+SOURCE=.\src\proof\llb\llb4Image.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaScl.c
+SOURCE=.\src\proof\llb\llb4Map.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaShrink.c
+SOURCE=.\src\proof\llb\llb4Nonlin.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaSim.c
+SOURCE=.\src\proof\llb\llb4Sweep.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaSim2.c
+SOURCE=.\src\proof\llb\llbInt.h
# End Source File
+# End Group
+# Begin Group "pdr"
+
+# PROP Default_Filter ""
# Begin Source File
-SOURCE=.\src\aig\gia\giaSort.c
+SOURCE=.\src\proof\pdr\pdr.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaSpeedup.c
+SOURCE=.\src\proof\pdr\pdr.h
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaSupMin.c
+SOURCE=.\src\proof\pdr\pdrClass.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaSwitch.c
+SOURCE=.\src\proof\pdr\pdrCnf.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaTsim.c
+SOURCE=.\src\proof\pdr\pdrCore.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\gia\giaUtil.c
+SOURCE=.\src\proof\pdr\pdrInt.h
# End Source File
-# End Group
-# Begin Group "bbl"
-
-# PROP Default_Filter ""
# Begin Source File
-SOURCE=.\src\aig\bbl\bblif.c
+SOURCE=.\src\proof\pdr\pdrInv.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\bbl\bblif.h
+SOURCE=.\src\proof\pdr\pdrMan.c
# End Source File
-# End Group
-# Begin Group "live"
-
-# PROP Default_Filter ""
# Begin Source File
-SOURCE=.\src\aig\live\liveness.c
+SOURCE=.\src\proof\pdr\pdrSat.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\live\liveness_sim.c
+SOURCE=.\src\proof\pdr\pdrTsim.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\live\ltl_parser.c
+SOURCE=.\src\proof\pdr\pdrUtil.c
# End Source File
# End Group
-# Begin Group "llb"
+# Begin Group "ssw"
# PROP Default_Filter ""
# Begin Source File
-SOURCE=.\src\aig\llb\llb.h
-# End Source File
-# Begin Source File
-
-SOURCE=.\src\aig\llb\llb1Cluster.c
+SOURCE=.\src\proof\ssw\ssw.h
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb1Constr.c
+SOURCE=.\src\proof\ssw\sswAig.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb1Core.c
+SOURCE=.\src\proof\ssw\sswBmc.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb1Group.c
+SOURCE=.\src\proof\ssw\sswClass.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb1Hint.c
+SOURCE=.\src\proof\ssw\sswCnf.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb1Man.c
+SOURCE=.\src\proof\ssw\sswConstr.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb1Matrix.c
+SOURCE=.\src\proof\ssw\sswCore.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb1Pivot.c
+SOURCE=.\src\proof\ssw\sswDyn.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb1Reach.c
+SOURCE=.\src\proof\ssw\sswFilter.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb1Sched.c
+SOURCE=.\src\proof\ssw\sswInt.h
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb2Bad.c
+SOURCE=.\src\proof\ssw\sswIslands.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb2Core.c
+SOURCE=.\src\proof\ssw\sswLcorr.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb2Driver.c
+SOURCE=.\src\proof\ssw\sswMan.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb2Dump.c
+SOURCE=.\src\proof\ssw\sswPairs.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb2Flow.c
+SOURCE=.\src\proof\ssw\sswPart.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb2Image.c
+SOURCE=.\src\proof\ssw\sswRarity.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb3Image.c
+SOURCE=.\src\proof\ssw\sswRarity2.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb3Nonlin.c
+SOURCE=.\src\proof\ssw\sswSat.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb4Cex.c
+SOURCE=.\src\proof\ssw\sswSemi.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb4Image.c
+SOURCE=.\src\proof\ssw\sswSim.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb4Nonlin.c
+SOURCE=.\src\proof\ssw\sswSimSat.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llb4Sweep.c
+SOURCE=.\src\proof\ssw\sswSweep.c
# End Source File
# Begin Source File
-SOURCE=.\src\aig\llb\llbInt.h
+SOURCE=.\src\proof\ssw\sswUnique.c
# End Source File
# End Group
# End Group
diff --git a/arch_flags.c b/arch_flags.c
new file mode 100644
index 00000000..a2945ae0
--- /dev/null
+++ b/arch_flags.c
@@ -0,0 +1,17 @@
+#include <stdio.h>
+
+int main()
+{
+ if (sizeof(void*) == 8) // Assume 64-bit Linux if pointers are 8 bytes.
+ printf("-DLIN64 ");
+ else
+ printf("-DLIN ");
+
+ printf("-DSIZEOF_VOID_P=%d -DSIZEOF_LONG=%d -DSIZEOF_INT=%d\n",
+ (int)sizeof(void*),
+ (int)sizeof(long),
+ (int)sizeof(int) );
+
+
+ return 0;
+}
diff --git a/src/aig/aig/aig.h b/src/aig/aig/aig.h
index 2ed3c130..ad8ce927 100644
--- a/src/aig/aig/aig.h
+++ b/src/aig/aig/aig.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __AIG_H__
-#define __AIG_H__
+#ifndef ABC__aig__aig__aig_h
+#define ABC__aig__aig__aig_h
////////////////////////////////////////////////////////////////////////
@@ -32,8 +32,8 @@
#include <assert.h>
#include <time.h>
-#include "vec.h"
-#include "utilCex.h"
+#include "src/misc/vec/vec.h"
+#include "src/misc/util/utilCex.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
@@ -222,20 +222,6 @@ static inline Aig_Cut_t * Aig_CutNext( Aig_Cut_t * pCut ) { return
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
-static inline int Aig_IntAbs( int n ) { return (n < 0)? -n : n; }
-//static inline int Aig_Float2Int( float Val ) { return *((int *)&Val); }
-//static inline float Aig_Int2Float( int Num ) { return *((float *)&Num); }
-static inline int Aig_Float2Int( float Val ) { union { int x; float y; } v; v.y = Val; return v.x; }
-static inline float Aig_Int2Float( int Num ) { union { int x; float y; } v; v.x = Num; return v.y; }
-static inline int Aig_Base2Log( unsigned n ) { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n >>= 1, r++ ); return r; }
-static inline int Aig_Base10Log( unsigned n ) { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n /= 10, r++ ); return r; }
-static inline char * Aig_UtilStrsav( char * s ) { return s ? strcpy(ABC_ALLOC(char, strlen(s)+1), s) : NULL; }
-static inline int Aig_BitWordNum( int nBits ) { return (nBits>>5) + ((nBits&31) > 0); }
-static inline int Aig_TruthWordNum( int nVars ) { return nVars <= 5 ? 1 : (1 << (nVars - 5)); }
-static inline int Aig_InfoHasBit( unsigned * p, int i ) { return (p[(i)>>5] & (1<<((i) & 31))) > 0; }
-static inline void Aig_InfoSetBit( unsigned * p, int i ) { p[(i)>>5] |= (1<<((i) & 31)); }
-static inline void Aig_InfoXorBit( unsigned * p, int i ) { p[(i)>>5] ^= (1<<((i) & 31)); }
-static inline unsigned Aig_InfoMask( int nVar ) { return (~(unsigned)0) >> (32-nVar); }
static inline unsigned Aig_ObjCutSign( unsigned ObjId ) { return (1 << (ObjId & 31)); }
static inline int Aig_WordCountOnes( unsigned uWord )
{
@@ -254,13 +240,6 @@ static inline int Aig_WordFindFirstBit( unsigned uWord )
return -1;
}
-static inline int Aig_Var2Lit( int Var, int fCompl ) { return Var + Var + fCompl; }
-static inline int Aig_Lit2Var( int Lit ) { return Lit >> 1; }
-static inline int Aig_LitIsCompl( int Lit ) { return Lit & 1; }
-static inline int Aig_LitNot( int Lit ) { return Lit ^ 1; }
-static inline int Aig_LitNotCond( int Lit, int c ) { return Lit ^ (int)(c > 0); }
-static inline int Aig_LitRegular( int Lit ) { return Lit & ~01; }
-
static inline Aig_Obj_t * Aig_Regular( Aig_Obj_t * p ) { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) & ~01); }
static inline Aig_Obj_t * Aig_Not( Aig_Obj_t * p ) { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) ^ 01); }
static inline Aig_Obj_t * Aig_NotCond( Aig_Obj_t * p, int c ) { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) ^ (c)); }
@@ -335,10 +314,10 @@ static inline void Aig_ObjChild1Flip( Aig_Obj_t * pObj ) { assert( !Aig
static inline Aig_Obj_t * Aig_ObjCopy( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return (Aig_Obj_t *)pObj->pData; }
static inline void Aig_ObjSetCopy( Aig_Obj_t * pObj, Aig_Obj_t * pCopy ) { assert( !Aig_IsComplement(pObj) ); pObj->pData = pCopy; }
static inline Aig_Obj_t * Aig_ObjRealCopy( Aig_Obj_t * pObj ) { return Aig_NotCond((Aig_Obj_t *)Aig_Regular(pObj)->pData, Aig_IsComplement(pObj));}
-static inline int Aig_ObjToLit( Aig_Obj_t * pObj ) { return Aig_Var2Lit( Aig_ObjId(Aig_Regular(pObj)), Aig_IsComplement(pObj) ); }
-static inline Aig_Obj_t * Aig_ObjFromLit( Aig_Man_t * p,int iLit){ return Aig_NotCond( Aig_ManObj(p, Aig_Lit2Var(iLit)), Aig_LitIsCompl(iLit) ); }
+static inline int Aig_ObjToLit( Aig_Obj_t * pObj ) { return Abc_Var2Lit( Aig_ObjId(Aig_Regular(pObj)), Aig_IsComplement(pObj) ); }
+static inline Aig_Obj_t * Aig_ObjFromLit( Aig_Man_t * p,int iLit){ return Aig_NotCond( Aig_ManObj(p, Abc_Lit2Var(iLit)), Abc_LitIsCompl(iLit) ); }
static inline int Aig_ObjLevel( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return pObj->Level; }
-static inline int Aig_ObjLevelNew( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? 1 + Aig_ObjIsExor(pObj) + ABC_MAX(Aig_ObjFanin0(pObj)->Level, Aig_ObjFanin1(pObj)->Level) : Aig_ObjFanin0(pObj)->Level; }
+static inline int Aig_ObjLevelNew( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? 1 + Aig_ObjIsExor(pObj) + Abc_MaxInt(Aig_ObjFanin0(pObj)->Level, Aig_ObjFanin1(pObj)->Level) : Aig_ObjFanin0(pObj)->Level; }
static inline int Aig_ObjSetLevel( Aig_Obj_t * pObj, int i ) { assert( !Aig_IsComplement(pObj) ); return pObj->Level = i; }
static inline void Aig_ObjClean( Aig_Obj_t * pObj ) { memset( pObj, 0, sizeof(Aig_Obj_t) ); }
static inline Aig_Obj_t * Aig_ObjFanout0( Aig_Man_t * p, Aig_Obj_t * pObj ) { assert(p->pFanData && pObj->Id < p->nFansAlloc); return Aig_ManObj(p, p->pFanData[5*pObj->Id] >> 1); }
@@ -653,7 +632,6 @@ extern unsigned * Aig_ManCutTruth( Aig_Obj_t * pRoot, Vec_Ptr_t * vLeaves,
/*=== aigTsim.c ========================================================*/
extern Aig_Man_t * Aig_ManConstReduce( Aig_Man_t * p, int fUseMvSweep, int nFramesSymb, int nFramesSatur, int fVerbose, int fVeryVerbose );
/*=== aigUtil.c =========================================================*/
-extern unsigned Aig_PrimeCudd( unsigned p );
extern void Aig_ManIncrementTravId( Aig_Man_t * p );
extern char * Aig_TimeStamp();
extern int Aig_ManHasNoGaps( Aig_Man_t * p );
diff --git a/src/aig/aig/aigCanon.c b/src/aig/aig/aigCanon.c
index 706a9c61..2c5e4d17 100644
--- a/src/aig/aig/aigCanon.c
+++ b/src/aig/aig/aigCanon.c
@@ -19,9 +19,9 @@
***********************************************************************/
#include "aig.h"
-#include "kit.h"
-#include "bdc.h"
-#include "ioa.h"
+#include "src/bool/kit/kit.h"
+#include "src/bool/bdc/bdc.h"
+#include "src/aig/ioa/ioa.h"
ABC_NAMESPACE_IMPL_START
@@ -106,7 +106,7 @@ Aig_RMan_t * Aig_RManStart()
p->pAig = Aig_ManStart( 1000000 );
Aig_IthVar( p->pAig, p->nVars-1 );
// create hash table
- p->nBins = Aig_PrimeCudd(5000);
+ p->nBins = Abc_PrimeCudd(5000);
p->pBins = ABC_CALLOC( Aig_Tru_t *, p->nBins );
p->pMemTrus = Aig_MmFlexStart();
// bi-decomposition manager
@@ -182,7 +182,7 @@ clk = clock();
pBinsOld = p->pBins;
nBinsOld = p->nBins;
// get the new Bins
- p->nBins = Aig_PrimeCudd( 3 * nBinsOld );
+ p->nBins = Abc_PrimeCudd( 3 * nBinsOld );
p->pBins = ABC_CALLOC( Aig_Tru_t *, p->nBins );
// rehash the entries from the old table
Counter = 0;
@@ -628,7 +628,7 @@ void Aig_RManRecord( unsigned * pTruth, int nVarsInit )
else
s_pRMan->nTtDsdNot++;
// compute the number of words
- nWords = Aig_TruthWordNum( nVars );
+ nWords = Abc_TruthWordNum( nVars );
// copy the function
memcpy( s_pRMan->pTruthInit, Kit_DsdObjTruth(pObj), 4*nWords );
Kit_DsdNtkFree( pNtk );
diff --git a/src/aig/aig/aigCuts.c b/src/aig/aig/aigCuts.c
index 1bcf69ce..acff77d2 100644
--- a/src/aig/aig/aigCuts.c
+++ b/src/aig/aig/aigCuts.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "aig.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
@@ -58,7 +58,7 @@ Aig_ManCut_t * Aig_ManCutStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, in
p->pAig = pMan;
p->pCuts = ABC_CALLOC( Aig_Cut_t *, Aig_ManObjNumMax(pMan) );
// allocate memory manager
- p->nTruthWords = Aig_TruthWordNum(nLeafMax);
+ p->nTruthWords = Abc_TruthWordNum(nLeafMax);
p->nCutSize = sizeof(Aig_Cut_t) + sizeof(int) * nLeafMax + fTruth * sizeof(unsigned) * p->nTruthWords;
p->pMemCuts = Aig_MmFixedStart( p->nCutSize * p->nCutsMax, 512 );
// room for temporary truth tables
diff --git a/src/aig/aig/aigDfs.c b/src/aig/aig/aigDfs.c
index 0c2989d8..2da609f3 100644
--- a/src/aig/aig/aigDfs.c
+++ b/src/aig/aig/aigDfs.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "aig.h"
-#include "tim.h"
+#include "src/misc/tim/tim.h"
ABC_NAMESPACE_IMPL_START
@@ -477,7 +477,7 @@ int Aig_ManLevelNum( Aig_Man_t * p )
int i, LevelsMax;
LevelsMax = 0;
Aig_ManForEachPo( p, pObj, i )
- LevelsMax = ABC_MAX( LevelsMax, (int)Aig_ObjFanin0(pObj)->Level );
+ LevelsMax = Abc_MaxInt( LevelsMax, (int)Aig_ObjFanin0(pObj)->Level );
return LevelsMax;
}
diff --git a/src/aig/aig/aigDoms.c b/src/aig/aig/aigDoms.c
index 0ac2b358..b81279b2 100644
--- a/src/aig/aig/aigDoms.c
+++ b/src/aig/aig/aigDoms.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "aig.h"
-#include "saig.h"
+#include "src/aig/saig/saig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/aig/aigDup.c b/src/aig/aig/aigDup.c
index 94eaf497..c2127262 100644
--- a/src/aig/aig/aigDup.c
+++ b/src/aig/aig/aigDup.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "saig.h"
-#include "tim.h"
+#include "src/aig/saig/saig.h"
+#include "src/misc/tim/tim.h"
ABC_NAMESPACE_IMPL_START
@@ -52,8 +52,8 @@ Aig_Man_t * Aig_ManDupSimple( Aig_Man_t * p )
assert( p->pManHaig == NULL || Aig_ManBufNum(p) == 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nAsserts = p->nAsserts;
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
@@ -124,7 +124,7 @@ Aig_Man_t * Aig_ManDupSimpleWithHints( Aig_Man_t * p, Vec_Int_t * vHints )
assert( p->nAsserts == 0 || p->nConstrs == 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -203,8 +203,8 @@ Aig_Man_t * Aig_ManDupSimpleDfs( Aig_Man_t * p )
assert( p->pManHaig == NULL || Aig_ManBufNum(p) == 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nAsserts = p->nAsserts;
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
@@ -303,8 +303,8 @@ Aig_Man_t * Aig_ManDupOrdered( Aig_Man_t * p )
int i, nNodes;
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nAsserts = p->nAsserts;
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
@@ -379,8 +379,8 @@ Aig_Man_t * Aig_ManDupCof( Aig_Man_t * p, int iInput, int Value )
assert( p->pManHaig == NULL || Aig_ManBufNum(p) == 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nAsserts = p->nAsserts;
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
@@ -456,8 +456,8 @@ Aig_Man_t * Aig_ManDupTrim( Aig_Man_t * p )
int i, nNodes;
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nConstrs = p->nConstrs;
// create the PIs
Aig_ManCleanData( p );
@@ -505,8 +505,8 @@ Aig_Man_t * Aig_ManDupExor( Aig_Man_t * p )
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
pNew->fCatchExor = 1;
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nAsserts = p->nAsserts;
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
@@ -608,8 +608,8 @@ Aig_Man_t * Aig_ManDupDfs( Aig_Man_t * p )
int i, nNodes;
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nAsserts = p->nAsserts;
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
@@ -749,8 +749,8 @@ Aig_Man_t * Aig_ManDupDfsGuided( Aig_Man_t * p, Vec_Ptr_t * vPios )
int i, nNodes;
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nAsserts = p->nAsserts;
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
@@ -821,8 +821,8 @@ Aig_Man_t * Aig_ManDupLevelized( Aig_Man_t * p )
int i, k;
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nAsserts = p->nAsserts;
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
@@ -895,8 +895,8 @@ Aig_Man_t * Aig_ManDupWithoutPos( Aig_Man_t * p )
int i;
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -980,8 +980,8 @@ Aig_Man_t * Aig_ManDupRepres( Aig_Man_t * p )
int i;
// start the HOP package
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
@@ -1054,8 +1054,8 @@ Aig_Man_t * Aig_ManDupRepresDfs( Aig_Man_t * p )
int i;
// start the HOP package
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
@@ -1163,8 +1163,8 @@ Aig_Man_t * Aig_ManDupOrpos( Aig_Man_t * p, int fAddRegs )
}
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -1212,8 +1212,8 @@ Aig_Man_t * Aig_ManDupOneOutput( Aig_Man_t * p, int iPoNum, int fAddRegs )
assert( iPoNum < Aig_ManPoNum(p)-Aig_ManRegNum(p) );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -1263,8 +1263,8 @@ Aig_Man_t * Aig_ManDupUnsolvedOutputs( Aig_Man_t * p, int fAddRegs )
}
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -1321,7 +1321,7 @@ Aig_Man_t * Aig_ManDupArray( Vec_Ptr_t * vArray )
}
// create the new manager
pNew = Aig_ManStart( 10000 );
- pNew->pName = Aig_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Aig_ManForEachPi( p, pObj, i )
Aig_ObjCreatePi(pNew);
// create the PIs
diff --git a/src/aig/aig/aigFact.c b/src/aig/aig/aigFact.c
index 9c4e5689..40885365 100644
--- a/src/aig/aig/aigFact.c
+++ b/src/aig/aig/aigFact.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "aig.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
@@ -289,7 +289,7 @@ Vec_Ptr_t * Aig_SuppMinPerform( Aig_Man_t * p, Vec_Ptr_t * vOrGate, Vec_Ptr_t *
Aig_Obj_t * pObj;
Vec_Ptr_t * vTrSupp, * vTrNode, * vCofs;
unsigned * uFunc, * uCare, * uFunc0, * uFunc1, * uCof;
- int i, nWords = Aig_TruthWordNum( Vec_PtrSize(vSupp) );
+ int i, nWords = Abc_TruthWordNum( Vec_PtrSize(vSupp) );
// assign support nodes
vTrSupp = Vec_PtrAllocTruthTables( Vec_PtrSize(vSupp) );
Vec_PtrForEachEntry( Aig_Obj_t *, vSupp, pObj, i )
diff --git a/src/aig/aig/aigFanout.c b/src/aig/aig/aigFanout.c
index d6317f43..d2fc1fe3 100644
--- a/src/aig/aig/aigFanout.c
+++ b/src/aig/aig/aigFanout.c
@@ -112,7 +112,7 @@ void Aig_ObjAddFanout( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFanout )
assert( pFanout->Id > 0 );
if ( pObj->Id >= p->nFansAlloc || pFanout->Id >= p->nFansAlloc )
{
- int nFansAlloc = 2 * ABC_MAX( pObj->Id, pFanout->Id );
+ int nFansAlloc = 2 * Abc_MaxInt( pObj->Id, pFanout->Id );
p->pFanData = ABC_REALLOC( int, p->pFanData, 5 * nFansAlloc );
memset( p->pFanData + 5 * p->nFansAlloc, 0, sizeof(int) * 5 * (nFansAlloc - p->nFansAlloc) );
p->nFansAlloc = nFansAlloc;
diff --git a/src/aig/aig/aigFrames.c b/src/aig/aig/aigFrames.c
index fdcd14aa..6840aadf 100644
--- a/src/aig/aig/aigFrames.c
+++ b/src/aig/aig/aigFrames.c
@@ -61,8 +61,8 @@ Aig_Man_t * Aig_ManFrames( Aig_Man_t * pAig, int nFs, int fInit, int fOuts, int
// start the fraig package
pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFs );
- pFrames->pName = Aig_UtilStrsav( pAig->pName );
- pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pFrames->pName = Abc_UtilStrsav( pAig->pName );
+ pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
// map constant nodes
for ( f = 0; f < nFs; f++ )
Aig_ObjSetFrames( pObjMap, nFs, Aig_ManConst1(pAig), f, Aig_ManConst1(pFrames) );
diff --git a/src/aig/aig/aigInter.c b/src/aig/aig/aigInter.c
index aa019191..bb6cf987 100644
--- a/src/aig/aig/aigInter.c
+++ b/src/aig/aig/aigInter.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "aig.h"
-#include "cnf.h"
-#include "satStore.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satStore.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/aig/aigJust.c b/src/aig/aig/aigJust.c
index eca17d40..bff2baed 100644
--- a/src/aig/aig/aigJust.c
+++ b/src/aig/aig/aigJust.c
@@ -114,7 +114,7 @@ int Aig_NtkFindSatAssign_rec( Aig_Man_t * pAig, Aig_Obj_t * pNode, int Value, Ve
// if ( Aig_ObjId(pNode) % 1000 == 0 )
// Value ^= 1;
if ( vSuppLits )
- Vec_IntPush( vSuppLits, Aig_Var2Lit( Aig_ObjPioNum(pNode), !Value ) );
+ Vec_IntPush( vSuppLits, Abc_Var2Lit( Aig_ObjPioNum(pNode), !Value ) );
return 1;
}
assert( Aig_ObjIsNode(pNode) );
@@ -221,8 +221,8 @@ int Aig_ObjTerSimulate( Aig_Man_t * pAig, Aig_Obj_t * pNode, Vec_Int_t * vSuppLi
Aig_ManIncrementTravId( pAig );
Vec_IntForEachEntry( vSuppLits, Entry, i )
{
- pObj = Aig_ManPi( pAig, Aig_Lit2Var(Entry) );
- Aig_ObjSetTerValue( pObj, Aig_LitIsCompl(Entry) ? AIG_VAL0 : AIG_VAL1 );
+ pObj = Aig_ManPi( pAig, Abc_Lit2Var(Entry) );
+ Aig_ObjSetTerValue( pObj, Abc_LitIsCompl(Entry) ? AIG_VAL0 : AIG_VAL1 );
Aig_ObjSetTravIdCurrent( pAig, pObj );
//printf( "%d ", Entry );
}
diff --git a/src/aig/aig/aigMan.c b/src/aig/aig/aigMan.c
index b0544c90..814e5248 100644
--- a/src/aig/aig/aigMan.c
+++ b/src/aig/aig/aigMan.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "aig.h"
-#include "tim.h"
+#include "src/misc/tim/tim.h"
ABC_NAMESPACE_IMPL_START
@@ -68,7 +68,7 @@ Aig_Man_t * Aig_ManStart( int nNodesMax )
p->pConst1->fPhase = 1;
p->nObjs[AIG_OBJ_CONST1]++;
// start the table
- p->nTableSize = Aig_PrimeCudd( nNodesMax );
+ p->nTableSize = Abc_PrimeCudd( nNodesMax );
p->pTable = ABC_ALLOC( Aig_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
return p;
@@ -92,8 +92,8 @@ Aig_Man_t * Aig_ManStartFrom( Aig_Man_t * p )
int i;
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p, pObj, i )
@@ -149,8 +149,8 @@ Aig_Man_t * Aig_ManExtractMiter( Aig_Man_t * p, Aig_Obj_t * pNode1, Aig_Obj_t *
int i;
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
diff --git a/src/aig/aig/aigMffc.c b/src/aig/aig/aigMffc.c
index 2f51e442..ed0015ac 100644
--- a/src/aig/aig/aigMffc.c
+++ b/src/aig/aig/aigMffc.c
@@ -269,7 +269,7 @@ int Aig_NodeMffcExtendCut( Aig_Man_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vLeaves
// dereference the current cut
LevelMax = 0;
Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
- LevelMax = ABC_MAX( LevelMax, (int)pObj->Level );
+ LevelMax = Abc_MaxInt( LevelMax, (int)pObj->Level );
if ( LevelMax == 0 )
return 0;
// dereference the cut
diff --git a/src/aig/aig/aigObj.c b/src/aig/aig/aigObj.c
index 36578d35..71796993 100644
--- a/src/aig/aig/aigObj.c
+++ b/src/aig/aig/aigObj.c
@@ -122,11 +122,11 @@ Aig_Obj_t * Aig_ObjCreate( Aig_Man_t * p, Aig_Obj_t * pGhost )
// create the power counter
if ( p->vProbs )
{
- float Prob0 = Aig_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId0(pObj) ) );
- float Prob1 = Aig_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId1(pObj) ) );
+ float Prob0 = Abc_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId0(pObj) ) );
+ float Prob1 = Abc_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId1(pObj) ) );
Prob0 = Aig_ObjFaninC0(pObj)? 1.0 - Prob0 : Prob0;
Prob1 = Aig_ObjFaninC1(pObj)? 1.0 - Prob1 : Prob1;
- Vec_IntSetEntry( p->vProbs, pObj->Id, Aig_Float2Int(Prob0 * Prob1) );
+ Vec_IntSetEntry( p->vProbs, pObj->Id, Abc_Float2Int(Prob0 * Prob1) );
}
return pObj;
}
@@ -563,7 +563,7 @@ void Aig_ObjReplace( Aig_Man_t * p, Aig_Obj_t * pObjOld, Aig_Obj_t * pObjNew, in
if ( p->pFanData && Aig_ObjIsBuf(pObjOld) )
{
Vec_PtrPush( p->vBufs, pObjOld );
- p->nBufMax = ABC_MAX( p->nBufMax, Vec_PtrSize(p->vBufs) );
+ p->nBufMax = Abc_MaxInt( p->nBufMax, Vec_PtrSize(p->vBufs) );
Aig_ManPropagateBuffers( p, fUpdateLevel );
}
}
diff --git a/src/aig/aig/aigPack.c b/src/aig/aig/aigPack.c
index 0ecbf533..b89d6077 100644
--- a/src/aig/aig/aigPack.c
+++ b/src/aig/aig/aigPack.c
@@ -295,19 +295,19 @@ int Aig_ManPackAddPatternTry( Aig_ManPack_t * p, int iBit, Vec_Int_t * vLits )
int i, Lit;
Vec_IntForEachEntry( vLits, Lit, i )
{
- pInfo = Vec_WrdEntryP( p->vPiPats, Aig_Lit2Var(Lit) );
- pPres = Vec_WrdEntryP( p->vPiCare, Aig_Lit2Var(Lit) );
- if ( Aig_InfoHasBit( (unsigned *)pPres, iBit ) &&
- Aig_InfoHasBit( (unsigned *)pInfo, iBit ) == Aig_LitIsCompl(Lit) )
+ pInfo = Vec_WrdEntryP( p->vPiPats, Abc_Lit2Var(Lit) );
+ pPres = Vec_WrdEntryP( p->vPiCare, Abc_Lit2Var(Lit) );
+ if ( Abc_InfoHasBit( (unsigned *)pPres, iBit ) &&
+ Abc_InfoHasBit( (unsigned *)pInfo, iBit ) == Abc_LitIsCompl(Lit) )
return 0;
}
Vec_IntForEachEntry( vLits, Lit, i )
{
- pInfo = Vec_WrdEntryP( p->vPiPats, Aig_Lit2Var(Lit) );
- pPres = Vec_WrdEntryP( p->vPiCare, Aig_Lit2Var(Lit) );
- Aig_InfoSetBit( (unsigned *)pPres, iBit );
- if ( Aig_InfoHasBit( (unsigned *)pInfo, iBit ) == Aig_LitIsCompl(Lit) )
- Aig_InfoXorBit( (unsigned *)pInfo, iBit );
+ pInfo = Vec_WrdEntryP( p->vPiPats, Abc_Lit2Var(Lit) );
+ pPres = Vec_WrdEntryP( p->vPiCare, Abc_Lit2Var(Lit) );
+ Abc_InfoSetBit( (unsigned *)pPres, iBit );
+ if ( Abc_InfoHasBit( (unsigned *)pInfo, iBit ) == Abc_LitIsCompl(Lit) )
+ Abc_InfoXorBit( (unsigned *)pInfo, iBit );
}
return 1;
}
@@ -335,16 +335,16 @@ void Aig_ManPackAddPattern( Aig_ManPack_t * p, Vec_Int_t * vLits )
word * pInfo, * pPres;
int i, Lit;
Vec_IntForEachEntry( vLits, Lit, i )
- printf( "%d", Aig_LitIsCompl(Lit) );
+ printf( "%d", Abc_LitIsCompl(Lit) );
printf( "\n\n" );
for ( k = 1; k < 64; k++ )
{
Vec_IntForEachEntry( vLits, Lit, i )
{
- pInfo = Vec_WrdEntryP( p->vPiPats, Aig_Lit2Var(Lit) );
- pPres = Vec_WrdEntryP( p->vPiCare, Aig_Lit2Var(Lit) );
- if ( Aig_InfoHasBit( (unsigned *)pPres, k ) )
- printf( "%d", Aig_InfoHasBit( (unsigned *)pInfo, k ) );
+ pInfo = Vec_WrdEntryP( p->vPiPats, Abc_Lit2Var(Lit) );
+ pPres = Vec_WrdEntryP( p->vPiCare, Abc_Lit2Var(Lit) );
+ if ( Abc_InfoHasBit( (unsigned *)pPres, k ) )
+ printf( "%d", Abc_InfoHasBit( (unsigned *)pInfo, k ) );
else
printf( "-" );
}
diff --git a/src/aig/aig/aigPart.c b/src/aig/aig/aigPart.c
index 6ee3930b..1510ddc7 100644
--- a/src/aig/aig/aigPart.c
+++ b/src/aig/aig/aigPart.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "aig.h"
-#include "tim.h"
-#include "fra.h"
+#include "src/misc/tim/tim.h"
+#include "src/proof/fra/fra.h"
ABC_NAMESPACE_IMPL_START
@@ -471,13 +471,13 @@ unsigned * Aig_ManSuppCharStart( Vec_Int_t * vOne, int nPis )
{
unsigned * pBuffer;
int i, Entry;
- int nWords = Aig_BitWordNum(nPis);
+ int nWords = Abc_BitWordNum(nPis);
pBuffer = ABC_ALLOC( unsigned, nWords );
memset( pBuffer, 0, sizeof(unsigned) * nWords );
Vec_IntForEachEntry( vOne, Entry, i )
{
assert( Entry < nPis );
- Aig_InfoSetBit( pBuffer, Entry );
+ Abc_InfoSetBit( pBuffer, Entry );
}
return pBuffer;
}
@@ -499,7 +499,7 @@ void Aig_ManSuppCharAdd( unsigned * pBuffer, Vec_Int_t * vOne, int nPis )
Vec_IntForEachEntry( vOne, Entry, i )
{
assert( Entry < nPis );
- Aig_InfoSetBit( pBuffer, Entry );
+ Abc_InfoSetBit( pBuffer, Entry );
}
}
@@ -518,7 +518,7 @@ int Aig_ManSuppCharCommon( unsigned * pBuffer, Vec_Int_t * vOne )
{
int i, Entry, nCommon = 0;
Vec_IntForEachEntry( vOne, Entry, i )
- nCommon += Aig_InfoHasBit(pBuffer, Entry);
+ nCommon += Abc_InfoHasBit(pBuffer, Entry);
return nCommon;
}
@@ -558,7 +558,7 @@ int Aig_ManPartitionSmartFindPart( Vec_Ptr_t * vPartSuppsAll, Vec_Ptr_t * vParts
if ( Vec_IntSize(vPartSupp) < 100 )
Repulse = 1;
else
- Repulse = 1+Aig_Base2Log(Vec_IntSize(vPartSupp)-100);
+ Repulse = 1+Abc_Base2Log(Vec_IntSize(vPartSupp)-100);
Value = Attract/Repulse;
if ( ValueBest < Value )
{
diff --git a/src/aig/aig/aigPartSat.c b/src/aig/aig/aigPartSat.c
index 48e5cf80..52fbe2e2 100644
--- a/src/aig/aig/aigPartSat.c
+++ b/src/aig/aig/aigPartSat.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "aig.h"
-#include "satSolver.h"
-#include "cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/cnf/cnf.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/aig/aigRepar.c b/src/aig/aig/aigRepar.c
index 03155e91..e0fe4cb1 100644
--- a/src/aig/aig/aigRepar.c
+++ b/src/aig/aig/aigRepar.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "aig.h"
-#include "cnf.h"
-#include "satSolver2.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver2.h"
ABC_NAMESPACE_IMPL_START
@@ -313,7 +313,7 @@ Aig_Man_t * Aig_ManInterRepar( Aig_Man_t * pMan, int fVerbose )
// start the interpolant
pBase = Aig_ManStart( 1000 );
- pBase->pName = Aig_UtilStrsav( "repar" );
+ pBase->pName = Abc_UtilStrsav( "repar" );
for ( k = 0; k < 2*nOuts; k++ )
Aig_IthVar(pBase, i);
@@ -338,7 +338,7 @@ Aig_Man_t * Aig_ManInterRepar( Aig_Man_t * pMan, int fVerbose )
Sat_Solver2PrintStats( stdout, pSat );
// derive interpolant
- pInter = Sat_ProofInterpolant( pSat, vVars );
+ pInter = (Aig_Man_t *)Sat_ProofInterpolant( pSat, vVars );
Aig_ManPrintStats( pInter );
// make sure interpolant does not depend on useless vars
Aig_ManForEachPi( pInter, pObj, i )
diff --git a/src/aig/aig/aigRepr.c b/src/aig/aig/aigRepr.c
index 9966174f..d08b6553 100644
--- a/src/aig/aig/aigRepr.c
+++ b/src/aig/aig/aigRepr.c
@@ -271,8 +271,8 @@ Aig_Man_t * Aig_ManDupRepr( Aig_Man_t * p, int fOrdered )
int i;
// start the HOP package
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
diff --git a/src/aig/aig/aigRet.c b/src/aig/aig/aigRet.c
index f7774d22..acc5b6ec 100644
--- a/src/aig/aig/aigRet.c
+++ b/src/aig/aig/aigRet.c
@@ -176,7 +176,7 @@ void Rtm_ObjTransferToBig( Rtm_Man_t * p, Rtm_Edg_t * pEdge )
assert( pEdge->nLats == 10 );
if ( p->nExtraCur + 1 > p->nExtraAlloc )
{
- int nExtraAllocNew = ABC_MAX( 2 * p->nExtraAlloc, 1024 );
+ int nExtraAllocNew = Abc_MaxInt( 2 * p->nExtraAlloc, 1024 );
p->pExtra = ABC_REALLOC( unsigned, p->pExtra, nExtraAllocNew );
p->nExtraAlloc = nExtraAllocNew;
}
@@ -202,7 +202,7 @@ void Rtm_ObjTransferToBigger( Rtm_Man_t * p, Rtm_Edg_t * pEdge )
nWords = (pEdge->nLats + 1) >> 4;
if ( p->nExtraCur + nWords + 1 > p->nExtraAlloc )
{
- int nExtraAllocNew = ABC_MAX( 2 * p->nExtraAlloc, 1024 );
+ int nExtraAllocNew = Abc_MaxInt( 2 * p->nExtraAlloc, 1024 );
p->pExtra = ABC_REALLOC( unsigned, p->pExtra, nExtraAllocNew );
p->nExtraAlloc = nExtraAllocNew;
}
@@ -360,7 +360,7 @@ int Rtm_ManLatchMax( Rtm_Man_t * p )
assert( Val == 1 || Val == 2 );
}
*/
- nLatchMax = ABC_MAX( nLatchMax, (int)pEdge->nLats );
+ nLatchMax = Abc_MaxInt( nLatchMax, (int)pEdge->nLats );
}
return nLatchMax;
}
@@ -477,7 +477,7 @@ int Rtm_ObjGetDegreeFwd( Rtm_Obj_t * pObj )
Rtm_Obj_t * pFanin;
int i, Degree = 0;
Rtm_ObjForEachFanin( pObj, pFanin, i )
- Degree = ABC_MAX( Degree, (int)pFanin->Num );
+ Degree = Abc_MaxInt( Degree, (int)pFanin->Num );
return Degree + 1;
}
@@ -497,7 +497,7 @@ int Rtm_ObjGetDegreeBwd( Rtm_Obj_t * pObj )
Rtm_Obj_t * pFanout;
int i, Degree = 0;
Rtm_ObjForEachFanout( pObj, pFanout, i )
- Degree = ABC_MAX( Degree, (int)pFanout->Num );
+ Degree = Abc_MaxInt( Degree, (int)pFanout->Num );
return Degree + 1;
}
@@ -910,7 +910,7 @@ clk = clock();
if ( !Rtm_ObjCheckRetimeFwd( pNext ) ) // skip non-retimable
continue;
Degree = Rtm_ObjGetDegreeFwd( pNext );
- DegreeMax = ABC_MAX( DegreeMax, Degree );
+ DegreeMax = Abc_MaxInt( DegreeMax, Degree );
if ( Degree > nStepsMax ) // skip nodes with high degree
continue;
pNext->fMark = 1;
@@ -931,7 +931,7 @@ clk = clock();
if ( !Rtm_ObjCheckRetimeBwd( pNext ) ) // skip non-retimable
continue;
Degree = Rtm_ObjGetDegreeBwd( pNext );
- DegreeMax = ABC_MAX( DegreeMax, Degree );
+ DegreeMax = Abc_MaxInt( DegreeMax, Degree );
if ( Degree > nStepsMax ) // skip nodes with high degree
continue;
pNext->fMark = 1;
@@ -952,8 +952,8 @@ clk = clock();
// get the new manager
pNew = Rtm_ManToAig( pRtm );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
Rtm_ManFree( pRtm );
// group the registers
clk = clock();
diff --git a/src/aig/aig/aigScl.c b/src/aig/aig/aigScl.c
index 2bc7f8ea..74b56bcf 100644
--- a/src/aig/aig/aigScl.c
+++ b/src/aig/aig/aigScl.c
@@ -50,8 +50,8 @@ Aig_Man_t * Aig_ManRemap( Aig_Man_t * p, Vec_Ptr_t * vMap )
int i, nTruePis;
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nAsserts = p->nAsserts;
pNew->nConstrs = p->nConstrs;
assert( p->vFlopNums == NULL || Vec_IntSize(p->vFlopNums) == p->nRegs );
diff --git a/src/aig/aig/aigSplit.c b/src/aig/aig/aigSplit.c
index 51b4f982..82f60e2d 100644
--- a/src/aig/aig/aigSplit.c
+++ b/src/aig/aig/aigSplit.c
@@ -19,9 +19,8 @@
***********************************************************************/
#include "aig.h"
-#include "saig.h"
-#include "cuddInt.h"
-#include "extra.h"
+#include "src/aig/saig/saig.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
@@ -84,7 +83,7 @@ Aig_Man_t * Aig_ManConvertBddsToAigs( Aig_Man_t * p, DdManager * dd, Vec_Ptr_t *
Aig_ManCleanData( p );
// generate AIG for BDD
pNew = Aig_ManStart( Aig_ManObjNum(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p, pObj, i )
pObj->pData = Aig_ObjCreatePi( pNew );
diff --git a/src/aig/aig/aigTable.c b/src/aig/aig/aigTable.c
index 13826065..ec2531c7 100644
--- a/src/aig/aig/aigTable.c
+++ b/src/aig/aig/aigTable.c
@@ -77,7 +77,7 @@ clk = clock();
pTableOld = p->pTable;
nTableSizeOld = p->nTableSize;
// get the new table
- p->nTableSize = Aig_PrimeCudd( 2 * Aig_ManNodeNum(p) );
+ p->nTableSize = Abc_PrimeCudd( 2 * Aig_ManNodeNum(p) );
p->pTable = ABC_ALLOC( Aig_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
// rehash the entries from the old table
diff --git a/src/aig/aig/aigTiming.c b/src/aig/aig/aigTiming.c
index 4ea93e29..e855e012 100644
--- a/src/aig/aig/aigTiming.c
+++ b/src/aig/aig/aigTiming.c
@@ -121,7 +121,7 @@ int Aig_ObjReverseLevelNew( Aig_Man_t * p, Aig_Obj_t * pObj )
Aig_ObjForEachFanout( p, pObj, pFanout, iFanout, i )
{
LevelCur = Aig_ObjReverseLevel( p, pFanout );
- Level = ABC_MAX( Level, LevelCur );
+ Level = Abc_MaxInt( Level, LevelCur );
}
return Level + 1;
}
diff --git a/src/aig/aig/aigTruth.c b/src/aig/aig/aigTruth.c
index ddcb8736..5115c4f4 100644
--- a/src/aig/aig/aigTruth.c
+++ b/src/aig/aig/aigTruth.c
@@ -88,7 +88,7 @@ unsigned * Aig_ManCutTruth( Aig_Obj_t * pRoot, Vec_Ptr_t * vLeaves, Vec_Ptr_t *
Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
pObj->pData = Vec_PtrEntry( vTruthElem, i );
// compute truths for other nodes
- nWords = Aig_TruthWordNum( Vec_PtrSize(vLeaves) );
+ nWords = Abc_TruthWordNum( Vec_PtrSize(vLeaves) );
Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
pObj->pData = Aig_ManCutTruthOne( pObj, (unsigned *)Vec_PtrEntry(vTruthStore, i), nWords );
return (unsigned *)pRoot->pData;
diff --git a/src/aig/aig/aigTsim.c b/src/aig/aig/aigTsim.c
index 5e711ff6..99aa5c64 100644
--- a/src/aig/aig/aigTsim.c
+++ b/src/aig/aig/aigTsim.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "aig.h"
-#include "saig.h"
+#include "src/aig/saig/saig.h"
ABC_NAMESPACE_IMPL_START
@@ -133,10 +133,10 @@ Aig_Tsi_t * Aig_TsiStart( Aig_Man_t * pAig )
p = ABC_ALLOC( Aig_Tsi_t, 1 );
memset( p, 0, sizeof(Aig_Tsi_t) );
p->pAig = pAig;
- p->nWords = Aig_BitWordNum( 2*Aig_ManRegNum(pAig) );
+ p->nWords = Abc_BitWordNum( 2*Aig_ManRegNum(pAig) );
p->vStates = Vec_PtrAlloc( 1000 );
p->pMem = Aig_MmFixedStart( sizeof(unsigned) * p->nWords + sizeof(unsigned *), 10000 );
- p->nBins = Aig_PrimeCudd(TSI_MAX_ROUNDS/2);
+ p->nBins = Abc_PrimeCudd(TSI_MAX_ROUNDS/2);
p->pBins = ABC_ALLOC( unsigned *, p->nBins );
memset( p->pBins, 0, sizeof(unsigned *) * p->nBins );
return p;
@@ -274,7 +274,7 @@ void Aig_TsiStatePrint( Aig_Tsi_t * p, unsigned * pState )
int i, Value, nZeros = 0, nOnes = 0, nDcs = 0;
for ( i = 0; i < Aig_ManRegNum(p->pAig); i++ )
{
- Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+ Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
if ( Value == 1 )
printf( "0" ), nZeros++;
else if ( Value == 2 )
@@ -304,7 +304,7 @@ int Aig_TsiStateCount( Aig_Tsi_t * p, unsigned * pState )
int i, Value, nCounter = 0;
Aig_ManForEachLiLoSeq( p->pAig, pObjLi, pObjLo, i )
{
- Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+ Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
nCounter += (Value == 1 || Value == 2);
}
return nCounter;
@@ -369,9 +369,9 @@ Vec_Ptr_t * Aig_ManTernarySimulate( Aig_Man_t * p, int fVerbose, int fVeryVerbos
{
Value = Aig_ObjGetXsim(pObjLo);
if ( Value & 1 )
- Aig_InfoSetBit( pState, 2 * i );
+ Abc_InfoSetBit( pState, 2 * i );
if ( Value & 2 )
- Aig_InfoSetBit( pState, 2 * i + 1 );
+ Abc_InfoSetBit( pState, 2 * i + 1 );
}
// printf( "%d ", Aig_TsiStateCount(pTsi, pState) );
@@ -446,7 +446,7 @@ Aig_TsiStatePrint( pTsi, pState );
for ( i = 0; i < pTsi->nWords - 1; i++ )
if ( pState[i] != ~0 )
fConstants = 1;
- if ( pState[i] != Aig_InfoMask( 2*Aig_ManRegNum(p) - 32*(pTsi->nWords-1) ) )
+ if ( pState[i] != Abc_InfoMask( 2*Aig_ManRegNum(p) - 32*(pTsi->nWords-1) ) )
fConstants = 1;
}
if ( fConstants == 0 )
@@ -465,7 +465,7 @@ Aig_TsiStatePrint( pTsi, pState );
nCounter = 0;
Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
{
- Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+ Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
nCounter += (Value == 1 || Value == 2);
if ( Value == 1 )
Vec_PtrPush( vMap, Aig_ManConst0(p) );
diff --git a/src/aig/aig/aigUtil.c b/src/aig/aig/aigUtil.c
index 8cbaa63b..5546c776 100644
--- a/src/aig/aig/aigUtil.c
+++ b/src/aig/aig/aigUtil.c
@@ -30,42 +30,6 @@ ABC_NAMESPACE_IMPL_START
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
-/**Function********************************************************************
-
- Synopsis [Returns the next prime >= p.]
-
- Description [Copied from CUDD, for stand-aloneness.]
-
- SideEffects [None]
-
- SeeAlso []
-
-******************************************************************************/
-unsigned int Aig_PrimeCudd( unsigned int p )
-{
- int i,pn;
-
- p--;
- do {
- p++;
- if (p&1) {
- pn = 1;
- i = 3;
- while ((unsigned) (i * i) <= p) {
- if (p % i == 0) {
- pn = 0;
- break;
- }
- i += 2;
- }
- } else {
- pn = 0;
- }
- } while (!pn);
- return(p);
-
-} /* end of Cudd_Prime */
-
/**Function*************************************************************
Synopsis [Increments the current traversal ID of the network.]
@@ -140,7 +104,7 @@ int Aig_ManLevels( Aig_Man_t * p )
Aig_Obj_t * pObj;
int i, LevelMax = 0;
Aig_ManForEachPo( p, pObj, i )
- LevelMax = ABC_MAX( LevelMax, (int)Aig_ObjFanin0(pObj)->Level );
+ LevelMax = Abc_MaxInt( LevelMax, (int)Aig_ObjFanin0(pObj)->Level );
return LevelMax;
}
@@ -791,7 +755,7 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr_t * vPiNames, Vec
pObj->iData = Counter++;
Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
pObj->iData = Counter++;
- nDigits = Aig_Base10Log( Counter );
+ nDigits = Abc_Base10Log( Counter );
// write the file
pFile = fopen( pFileName, "w" );
fprintf( pFile, "# BLIF file written by procedure Aig_ManDumpBlif()\n" );
@@ -906,7 +870,7 @@ void Aig_ManDumpVerilog( Aig_Man_t * p, char * pFileName )
pObj->iData = Counter++;
Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
pObj->iData = Counter++;
- nDigits = Aig_Base10Log( Counter );
+ nDigits = Abc_Base10Log( Counter );
// write the file
pFile = fopen( pFileName, "w" );
fprintf( pFile, "// Verilog file written by procedure Aig_ManDumpVerilog()\n" );
@@ -1299,7 +1263,7 @@ void Aig_NodeIntersectLists( Vec_Ptr_t * vArr1, Vec_Ptr_t * vArr2, Vec_Ptr_t * v
Aig_Obj_t ** pBeg2 = (Aig_Obj_t **)vArr2->pArray;
Aig_Obj_t ** pEnd1 = (Aig_Obj_t **)vArr1->pArray + vArr1->nSize;
Aig_Obj_t ** pEnd2 = (Aig_Obj_t **)vArr2->pArray + vArr2->nSize;
- Vec_PtrGrow( vArr, ABC_MAX( Vec_PtrSize(vArr1), Vec_PtrSize(vArr2) ) );
+ Vec_PtrGrow( vArr, Abc_MaxInt( Vec_PtrSize(vArr1), Vec_PtrSize(vArr2) ) );
pBeg = (Aig_Obj_t **)vArr->pArray;
while ( pBeg1 < pEnd1 && pBeg2 < pEnd2 )
{
@@ -1324,8 +1288,8 @@ void Aig_NodeIntersectLists( Vec_Ptr_t * vArr1, Vec_Ptr_t * vArr2, Vec_Ptr_t * v
ABC_NAMESPACE_IMPL_END
-#include "fra.h"
-#include "saig.h"
+#include "src/proof/fra/fra.h"
+#include "src/aig/saig/saig.h"
ABC_NAMESPACE_IMPL_START
@@ -1353,45 +1317,45 @@ void Aig_ManCounterExampleValueStart( Aig_Man_t * pAig, Abc_Cex_t * pCex )
assert( Aig_ManRegNum(pAig) > 0 ); // makes sense only for sequential AIGs
assert( pAig->pData2 == NULL ); // if this fail, there may be a memory leak
// allocate memory to store simulation bits for internal nodes
- pAig->pData2 = ABC_CALLOC( unsigned, Aig_BitWordNum( (pCex->iFrame + 1) * Aig_ManObjNum(pAig) ) );
+ pAig->pData2 = ABC_CALLOC( unsigned, Abc_BitWordNum( (pCex->iFrame + 1) * Aig_ManObjNum(pAig) ) );
// the register values in the counter-example should be zero
Saig_ManForEachLo( pAig, pObj, k )
- assert( Aig_InfoHasBit(pCex->pData, iBit++) == 0 );
+ assert( Abc_InfoHasBit(pCex->pData, iBit++) == 0 );
// iterate through the timeframes
nObjs = Aig_ManObjNum(pAig);
for ( i = 0; i <= pCex->iFrame; i++ )
{
// set constant 1 node
- Aig_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + 0 );
+ Abc_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + 0 );
// set primary inputs according to the counter-example
Saig_ManForEachPi( pAig, pObj, k )
- if ( Aig_InfoHasBit(pCex->pData, iBit++) )
- Aig_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
+ if ( Abc_InfoHasBit(pCex->pData, iBit++) )
+ Abc_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
// compute values for each node
Aig_ManForEachNode( pAig, pObj, k )
{
- Val0 = Aig_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId0(pObj) );
- Val1 = Aig_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId1(pObj) );
+ Val0 = Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId0(pObj) );
+ Val1 = Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId1(pObj) );
if ( (Val0 ^ Aig_ObjFaninC0(pObj)) & (Val1 ^ Aig_ObjFaninC1(pObj)) )
- Aig_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
+ Abc_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
}
// derive values for combinational outputs
Aig_ManForEachPo( pAig, pObj, k )
{
- Val0 = Aig_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId0(pObj) );
+ Val0 = Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId0(pObj) );
if ( Val0 ^ Aig_ObjFaninC0(pObj) )
- Aig_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
+ Abc_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
}
if ( i == pCex->iFrame )
continue;
// transfer values to the register output of the next frame
Saig_ManForEachLiLo( pAig, pObjRi, pObjRo, k )
- if ( Aig_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObjRi) ) )
- Aig_InfoSetBit( (unsigned *)pAig->pData2, nObjs * (i+1) + Aig_ObjId(pObjRo) );
+ if ( Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObjRi) ) )
+ Abc_InfoSetBit( (unsigned *)pAig->pData2, nObjs * (i+1) + Aig_ObjId(pObjRo) );
}
assert( iBit == pCex->nBits );
// check that the counter-example is correct, that is, the corresponding output is asserted
- assert( Aig_InfoHasBit( (unsigned *)pAig->pData2, nObjs * pCex->iFrame + Aig_ObjId(Aig_ManPo(pAig, pCex->iPo)) ) );
+ assert( Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * pCex->iFrame + Aig_ObjId(Aig_ManPo(pAig, pCex->iPo)) ) );
}
/**Function*************************************************************
@@ -1428,7 +1392,7 @@ void Aig_ManCounterExampleValueStop( Aig_Man_t * pAig )
int Aig_ManCounterExampleValueLookup( Aig_Man_t * pAig, int Id, int iFrame )
{
assert( Id >= 0 && Id < Aig_ManObjNum(pAig) );
- return Aig_InfoHasBit( (unsigned *)pAig->pData2, Aig_ManObjNum(pAig) * iFrame + Id );
+ return Abc_InfoHasBit( (unsigned *)pAig->pData2, Aig_ManObjNum(pAig) * iFrame + Id );
}
/**Function*************************************************************
@@ -1445,7 +1409,7 @@ int Aig_ManCounterExampleValueLookup( Aig_Man_t * pAig, int Id, int iFrame )
void Aig_ManCounterExampleValueTest( Aig_Man_t * pAig, Abc_Cex_t * pCex )
{
Aig_Obj_t * pObj = Aig_ManObj( pAig, Aig_ManObjNum(pAig)/2 );
- int iFrame = ABC_MAX( 0, pCex->iFrame - 1 );
+ int iFrame = Abc_MaxInt( 0, pCex->iFrame - 1 );
printf( "\nUsing counter-example, which asserts output %d in frame %d.\n", pCex->iPo, pCex->iFrame );
Aig_ManCounterExampleValueStart( pAig, pCex );
printf( "Value of object %d in frame %d is %d.\n", Aig_ObjId(pObj), iFrame,
diff --git a/src/aig/bar/module.make b/src/aig/bar/module.make
deleted file mode 100644
index 26161ba1..00000000
--- a/src/aig/bar/module.make
+++ /dev/null
@@ -1 +0,0 @@
-SRC += src/aig/bar/bar.c
diff --git a/src/aig/bbl/module.make b/src/aig/bbl/module.make
deleted file mode 100644
index 89ed2fa3..00000000
--- a/src/aig/bbl/module.make
+++ /dev/null
@@ -1 +0,0 @@
-SRC += src/aig/bbl/bblif.c
diff --git a/src/aig/bbr/module.make b/src/aig/bbr/module.make
deleted file mode 100644
index dce30a21..00000000
--- a/src/aig/bbr/module.make
+++ /dev/null
@@ -1,4 +0,0 @@
-SRC += src/aig/bbr/bbrCex.c \
- src/aig/bbr/bbrImage.c \
- src/aig/bbr/bbrNtbdd.c \
- src/aig/bbr/bbrReach.c
diff --git a/src/aig/bdc/module.make b/src/aig/bdc/module.make
deleted file mode 100644
index 97f5b33b..00000000
--- a/src/aig/bdc/module.make
+++ /dev/null
@@ -1,5 +0,0 @@
-SRC += src/aig/bdc/bdcCore.c \
- src/aig/bdc/bdcDec.c \
- src/aig/bdc/bdcSpfd.c \
- src/aig/bdc/bdcTable.c
-
diff --git a/src/aig/cec/module.make b/src/aig/cec/module.make
deleted file mode 100644
index 42e0cd1b..00000000
--- a/src/aig/cec/module.make
+++ /dev/null
@@ -1,13 +0,0 @@
-SRC += src/aig/cec/cecCec.c \
- src/aig/cec/cecChoice.c \
- src/aig/cec/cecClass.c \
- src/aig/cec/cecCore.c \
- src/aig/cec/cecCorr.c \
- src/aig/cec/cecIso.c \
- src/aig/cec/cecMan.c \
- src/aig/cec/cecPat.c \
- src/aig/cec/cecSeq.c \
- src/aig/cec/cecSim.c \
- src/aig/cec/cecSolve.c \
- src/aig/cec/cecSynth.c \
- src/aig/cec/cecSweep.c
diff --git a/src/aig/cgt/module.make b/src/aig/cgt/module.make
deleted file mode 100644
index 911d8d1f..00000000
--- a/src/aig/cgt/module.make
+++ /dev/null
@@ -1,5 +0,0 @@
-SRC += src/aig/cgt/cgtAig.c \
- src/aig/cgt/cgtCore.c \
- src/aig/cgt/cgtDecide.c \
- src/aig/cgt/cgtMan.c \
- src/aig/cgt/cgtSat.c
diff --git a/src/aig/cnf/module.make b/src/aig/cnf/module.make
deleted file mode 100644
index 596fe31b..00000000
--- a/src/aig/cnf/module.make
+++ /dev/null
@@ -1,9 +0,0 @@
-SRC += src/aig/cnf/cnfCore.c \
- src/aig/cnf/cnfCut.c \
- src/aig/cnf/cnfData.c \
- src/aig/cnf/cnfFast.c \
- src/aig/cnf/cnfMan.c \
- src/aig/cnf/cnfMap.c \
- src/aig/cnf/cnfPost.c \
- src/aig/cnf/cnfUtil.c \
- src/aig/cnf/cnfWrite.c
diff --git a/src/aig/csw/module.make b/src/aig/csw/module.make
deleted file mode 100644
index 8fdb7bef..00000000
--- a/src/aig/csw/module.make
+++ /dev/null
@@ -1,4 +0,0 @@
-SRC += src/aig/csw/cswCore.c \
- src/aig/csw/cswCut.c \
- src/aig/csw/cswMan.c \
- src/aig/csw/cswTable.c
diff --git a/src/aig/dar/module.make b/src/aig/dar/module.make
deleted file mode 100644
index b1b0332c..00000000
--- a/src/aig/dar/module.make
+++ /dev/null
@@ -1,10 +0,0 @@
-SRC += src/aig/dar/darBalance.c \
- src/aig/dar/darCore.c \
- src/aig/dar/darCut.c \
- src/aig/dar/darData.c \
- src/aig/dar/darLib.c \
- src/aig/dar/darMan.c \
- src/aig/dar/darPrec.c \
- src/aig/dar/darRefact.c \
- src/aig/dar/darResub.c \
- src/aig/dar/darScript.c
diff --git a/src/aig/dch/module.make b/src/aig/dch/module.make
deleted file mode 100644
index 5709f87a..00000000
--- a/src/aig/dch/module.make
+++ /dev/null
@@ -1,10 +0,0 @@
-SRC += src/aig/dch/dchAig.c \
- src/aig/dch/dchChoice.c \
- src/aig/dch/dchClass.c \
- src/aig/dch/dchCnf.c \
- src/aig/dch/dchCore.c \
- src/aig/dch/dchMan.c \
- src/aig/dch/dchSat.c \
- src/aig/dch/dchSim.c \
- src/aig/dch/dchSimSat.c \
- src/aig/dch/dchSweep.c
diff --git a/src/aig/fra/module.make b/src/aig/fra/module.make
deleted file mode 100644
index e3a88aae..00000000
--- a/src/aig/fra/module.make
+++ /dev/null
@@ -1,17 +0,0 @@
-SRC += src/aig/fra/fraBmc.c \
- src/aig/fra/fraCec.c \
- src/aig/fra/fraClass.c \
- src/aig/fra/fraClau.c \
- src/aig/fra/fraClaus.c \
- src/aig/fra/fraCnf.c \
- src/aig/fra/fraCore.c \
- src/aig/fra/fraHot.c \
- src/aig/fra/fraImp.c \
- src/aig/fra/fraInd.c \
- src/aig/fra/fraIndVer.c \
- src/aig/fra/fraLcr.c \
- src/aig/fra/fraMan.c \
- src/aig/fra/fraPart.c \
- src/aig/fra/fraSat.c \
- src/aig/fra/fraSec.c \
- src/aig/fra/fraSim.c
diff --git a/src/aig/fsim/module.make b/src/aig/fsim/module.make
deleted file mode 100644
index 91c733c3..00000000
--- a/src/aig/fsim/module.make
+++ /dev/null
@@ -1,6 +0,0 @@
-SRC += src/aig/fsim/fsimCore.c \
- src/aig/fsim/fsimFront.c \
- src/aig/fsim/fsimMan.c \
- src/aig/fsim/fsimSim.c \
- src/aig/fsim/fsimSwitch.c \
- src/aig/fsim/fsimTsim.c
diff --git a/src/aig/gia/gia.h b/src/aig/gia/gia.h
index 14fd4d6e..a784ab92 100644
--- a/src/aig/gia/gia.h
+++ b/src/aig/gia/gia.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __GIA_H__
-#define __GIA_H__
+#ifndef ABC__aig__gia__gia_h
+#define ABC__aig__gia__gia_h
////////////////////////////////////////////////////////////////////////
@@ -32,8 +32,8 @@
#include <assert.h>
#include <time.h>
-#include "vec.h"
-#include "utilCex.h"
+#include "src/misc/vec/vec.h"
+#include "src/misc/util/utilCex.h"
#include "giaAbs.h"
////////////////////////////////////////////////////////////////////////
@@ -210,19 +210,6 @@ struct Gia_ParVta_t_
int iFrame; // the number of frames covered
};
-static inline int Gia_IntAbs( int n ) { return (n < 0)? -n : n; }
-static inline int Gia_Float2Int( float Val ) { union { int x; float y; } v; v.y = Val; return v.x; }
-static inline float Gia_Int2Float( int Num ) { union { int x; float y; } v; v.x = Num; return v.y; }
-static inline int Gia_Base2Log( unsigned n ) { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n >>= 1, r++ ); return r; }
-static inline int Gia_Base10Log( unsigned n ) { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n /= 10, r++ ); return r; }
-static inline int Gia_Base16Log( unsigned n ) { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n /= 16, r++ ); return r; }
-static inline char * Gia_UtilStrsav( char * s ) { return s ? strcpy(ABC_ALLOC(char, strlen(s)+1), s) : NULL; }
-static inline int Gia_BitWordNum( int nBits ) { return (nBits>>5) + ((nBits&31) > 0); }
-static inline int Gia_TruthWordNum( int nVars ) { return nVars <= 5 ? 1 : (1 << (nVars - 5)); }
-static inline int Gia_InfoHasBit( unsigned * p, int i ) { return (p[(i)>>5] & (1<<((i) & 31))) > 0; }
-static inline void Gia_InfoSetBit( unsigned * p, int i ) { p[(i)>>5] |= (1<<((i) & 31)); }
-static inline void Gia_InfoXorBit( unsigned * p, int i ) { p[(i)>>5] ^= (1<<((i) & 31)); }
-static inline unsigned Gia_InfoMask( int nVar ) { return (~(unsigned)0) >> (32-nVar); }
static inline unsigned Gia_ObjCutSign( unsigned ObjId ) { return (1 << (ObjId & 31)); }
static inline int Gia_WordHasOneBit( unsigned uWord ) { return (uWord & (uWord-1)) == 0; }
static inline int Gia_WordHasOnePair( unsigned uWord ) { return Gia_WordHasOneBit(uWord & (uWord>>1) & 0x55555555); }
@@ -246,7 +233,7 @@ static inline int Gia_WordFindFirstBit( unsigned uWord )
static inline int Gia_ManTruthIsConst0( unsigned * pIn, int nVars )
{
int w;
- for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+ for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
if ( pIn[w] )
return 0;
return 1;
@@ -254,7 +241,7 @@ static inline int Gia_ManTruthIsConst0( unsigned * pIn, int nVars )
static inline int Gia_ManTruthIsConst1( unsigned * pIn, int nVars )
{
int w;
- for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+ for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
if ( pIn[w] != ~(unsigned)0 )
return 0;
return 1;
@@ -262,35 +249,28 @@ static inline int Gia_ManTruthIsConst1( unsigned * pIn, int nVars )
static inline void Gia_ManTruthCopy( unsigned * pOut, unsigned * pIn, int nVars )
{
int w;
- for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+ for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
pOut[w] = pIn[w];
}
static inline void Gia_ManTruthClear( unsigned * pOut, int nVars )
{
int w;
- for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+ for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
pOut[w] = 0;
}
static inline void Gia_ManTruthFill( unsigned * pOut, int nVars )
{
int w;
- for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+ for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
pOut[w] = ~(unsigned)0;
}
static inline void Gia_ManTruthNot( unsigned * pOut, unsigned * pIn, int nVars )
{
int w;
- for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+ for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
pOut[w] = ~pIn[w];
}
-static inline int Gia_Var2Lit( int Var, int fCompl ) { return Var + Var + fCompl; }
-static inline int Gia_Lit2Var( int Lit ) { return Lit >> 1; }
-static inline int Gia_LitIsCompl( int Lit ) { return Lit & 1; }
-static inline int Gia_LitNot( int Lit ) { return Lit ^ 1; }
-static inline int Gia_LitNotCond( int Lit, int c ) { return Lit ^ (int)(c > 0); }
-static inline int Gia_LitRegular( int Lit ) { return Lit & ~01; }
-
static inline Gia_Obj_t * Gia_Regular( Gia_Obj_t * p ) { return (Gia_Obj_t *)((ABC_PTRUINT_T)(p) & ~01); }
static inline Gia_Obj_t * Gia_Not( Gia_Obj_t * p ) { return (Gia_Obj_t *)((ABC_PTRUINT_T)(p) ^ 01); }
static inline Gia_Obj_t * Gia_NotCond( Gia_Obj_t * p, int c ) { return (Gia_Obj_t *)((ABC_PTRUINT_T)(p) ^ (c)); }
@@ -358,33 +338,33 @@ static inline int Gia_ObjFaninId0( Gia_Obj_t * pObj, int ObjId ) {
static inline int Gia_ObjFaninId1( Gia_Obj_t * pObj, int ObjId ) { return ObjId - pObj->iDiff1; }
static inline int Gia_ObjFaninId0p( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Gia_ObjFaninId0( pObj, Gia_ObjId(p, pObj) ); }
static inline int Gia_ObjFaninId1p( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Gia_ObjFaninId1( pObj, Gia_ObjId(p, pObj) ); }
-static inline int Gia_ObjFaninLit0( Gia_Obj_t * pObj, int ObjId ) { return Gia_Var2Lit( Gia_ObjFaninId0(pObj, ObjId), Gia_ObjFaninC0(pObj) ); }
-static inline int Gia_ObjFaninLit1( Gia_Obj_t * pObj, int ObjId ) { return Gia_Var2Lit( Gia_ObjFaninId1(pObj, ObjId), Gia_ObjFaninC1(pObj) ); }
-static inline int Gia_ObjFaninLit0p( Gia_Man_t * p, Gia_Obj_t * pObj) { return Gia_Var2Lit( Gia_ObjFaninId0p(p, pObj), Gia_ObjFaninC0(pObj) ); }
-static inline int Gia_ObjFaninLit1p( Gia_Man_t * p, Gia_Obj_t * pObj) { return Gia_Var2Lit( Gia_ObjFaninId1p(p, pObj), Gia_ObjFaninC1(pObj) ); }
+static inline int Gia_ObjFaninLit0( Gia_Obj_t * pObj, int ObjId ) { return Abc_Var2Lit( Gia_ObjFaninId0(pObj, ObjId), Gia_ObjFaninC0(pObj) ); }
+static inline int Gia_ObjFaninLit1( Gia_Obj_t * pObj, int ObjId ) { return Abc_Var2Lit( Gia_ObjFaninId1(pObj, ObjId), Gia_ObjFaninC1(pObj) ); }
+static inline int Gia_ObjFaninLit0p( Gia_Man_t * p, Gia_Obj_t * pObj) { return Abc_Var2Lit( Gia_ObjFaninId0p(p, pObj), Gia_ObjFaninC0(pObj) ); }
+static inline int Gia_ObjFaninLit1p( Gia_Man_t * p, Gia_Obj_t * pObj) { return Abc_Var2Lit( Gia_ObjFaninId1p(p, pObj), Gia_ObjFaninC1(pObj) ); }
static inline void Gia_ObjFlipFaninC0( Gia_Obj_t * pObj ) { assert( Gia_ObjIsCo(pObj) ); pObj->fCompl0 ^= 1; }
static inline int Gia_ObjWhatFanin( Gia_Obj_t * pObj, Gia_Obj_t * pFanin ) { return Gia_ObjFanin0(pObj) == pFanin ? 0 : (Gia_ObjFanin1(pObj) == pFanin ? 1 : -1); }
-static inline Gia_Obj_t * Gia_ObjCopy( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Gia_ManObj( p, Gia_Lit2Var(pObj->Value) ); }
+static inline Gia_Obj_t * Gia_ObjCopy( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Gia_ManObj( p, Abc_Lit2Var(pObj->Value) ); }
-static inline int Gia_ObjFanin0Copy( Gia_Obj_t * pObj ) { return Gia_LitNotCond( Gia_ObjFanin0(pObj)->Value, Gia_ObjFaninC0(pObj) ); }
-static inline int Gia_ObjFanin1Copy( Gia_Obj_t * pObj ) { return Gia_LitNotCond( Gia_ObjFanin1(pObj)->Value, Gia_ObjFaninC1(pObj) ); }
+static inline int Gia_ObjFanin0Copy( Gia_Obj_t * pObj ) { return Abc_LitNotCond( Gia_ObjFanin0(pObj)->Value, Gia_ObjFaninC0(pObj) ); }
+static inline int Gia_ObjFanin1Copy( Gia_Obj_t * pObj ) { return Abc_LitNotCond( Gia_ObjFanin1(pObj)->Value, Gia_ObjFaninC1(pObj) ); }
static inline int Gia_ObjCopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj ) { return p->pCopies[Gia_ManObjNum(p) * f + Gia_ObjId(p,pObj)]; }
static inline void Gia_ObjSetCopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj, int iLit ) { p->pCopies[Gia_ManObjNum(p) * f + Gia_ObjId(p,pObj)] = iLit; }
-static inline int Gia_ObjFanin0CopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj ) { return Gia_LitNotCond(Gia_ObjCopyF(p, f, Gia_ObjFanin0(pObj)), Gia_ObjFaninC0(pObj)); }
-static inline int Gia_ObjFanin1CopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj ) { return Gia_LitNotCond(Gia_ObjCopyF(p, f, Gia_ObjFanin1(pObj)), Gia_ObjFaninC1(pObj)); }
+static inline int Gia_ObjFanin0CopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj ) { return Abc_LitNotCond(Gia_ObjCopyF(p, f, Gia_ObjFanin0(pObj)), Gia_ObjFaninC0(pObj)); }
+static inline int Gia_ObjFanin1CopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj ) { return Abc_LitNotCond(Gia_ObjCopyF(p, f, Gia_ObjFanin1(pObj)), Gia_ObjFaninC1(pObj)); }
-static inline Gia_Obj_t * Gia_ObjFromLit( Gia_Man_t * p, int iLit ) { return Gia_NotCond( Gia_ManObj(p, Gia_Lit2Var(iLit)), Gia_LitIsCompl(iLit) ); }
-static inline int Gia_ObjToLit( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Gia_Var2Lit( Gia_ObjId(p, Gia_Regular(pObj)), Gia_IsComplement(pObj) ); }
+static inline Gia_Obj_t * Gia_ObjFromLit( Gia_Man_t * p, int iLit ) { return Gia_NotCond( Gia_ManObj(p, Abc_Lit2Var(iLit)), Abc_LitIsCompl(iLit) ); }
+static inline int Gia_ObjToLit( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Abc_Var2Lit( Gia_ObjId(p, Gia_Regular(pObj)), Gia_IsComplement(pObj) ); }
static inline int Gia_ObjPhaseRealLit( Gia_Man_t * p, int iLit ) { return Gia_ObjPhaseReal( Gia_ObjFromLit(p, iLit) ); }
static inline int Gia_ObjLevel( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Vec_IntGetEntry(p->vLevels, Gia_ObjId(p,pObj)); }
static inline int Gia_ObjLevelId( Gia_Man_t * p, int Id ) { return Vec_IntGetEntry(p->vLevels, Id); }
static inline void Gia_ObjSetLevel( Gia_Man_t * p, Gia_Obj_t * pObj, int l ) { Vec_IntSetEntry(p->vLevels, Gia_ObjId(p,pObj), l); }
static inline void Gia_ObjSetCoLevel( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert( Gia_ObjIsCo(pObj) ); Gia_ObjSetLevel( p, pObj, Gia_ObjLevel(p,Gia_ObjFanin0(pObj)) ); }
-static inline void Gia_ObjSetAndLevel( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert( Gia_ObjIsAnd(pObj) ); Gia_ObjSetLevel( p, pObj, 1+ABC_MAX(Gia_ObjLevel(p,Gia_ObjFanin0(pObj)),Gia_ObjLevel(p,Gia_ObjFanin1(pObj))) ); }
+static inline void Gia_ObjSetAndLevel( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert( Gia_ObjIsAnd(pObj) ); Gia_ObjSetLevel( p, pObj, 1+Abc_MaxInt(Gia_ObjLevel(p,Gia_ObjFanin0(pObj)),Gia_ObjLevel(p,Gia_ObjFanin1(pObj))) ); }
static inline int Gia_ObjRefs( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert( p->pRefs); return p->pRefs[Gia_ObjId(p, pObj)]; }
static inline int Gia_ObjRefsId( Gia_Man_t * p, int Id ) { assert( p->pRefs); return p->pRefs[Id]; }
@@ -457,17 +437,17 @@ static inline int Gia_ManAppendAnd( Gia_Man_t * p, int iLit0, int iLit1 )
assert( iLit0 != iLit1 );
if ( iLit0 < iLit1 )
{
- pObj->iDiff0 = Gia_ObjId(p, pObj) - Gia_Lit2Var(iLit0);
- pObj->fCompl0 = Gia_LitIsCompl(iLit0);
- pObj->iDiff1 = Gia_ObjId(p, pObj) - Gia_Lit2Var(iLit1);
- pObj->fCompl1 = Gia_LitIsCompl(iLit1);
+ pObj->iDiff0 = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit0);
+ pObj->fCompl0 = Abc_LitIsCompl(iLit0);
+ pObj->iDiff1 = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit1);
+ pObj->fCompl1 = Abc_LitIsCompl(iLit1);
}
else
{
- pObj->iDiff1 = Gia_ObjId(p, pObj) - Gia_Lit2Var(iLit0);
- pObj->fCompl1 = Gia_LitIsCompl(iLit0);
- pObj->iDiff0 = Gia_ObjId(p, pObj) - Gia_Lit2Var(iLit1);
- pObj->fCompl0 = Gia_LitIsCompl(iLit1);
+ pObj->iDiff1 = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit0);
+ pObj->fCompl1 = Abc_LitIsCompl(iLit0);
+ pObj->iDiff0 = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit1);
+ pObj->fCompl0 = Abc_LitIsCompl(iLit1);
}
if ( p->pFanData )
{
@@ -480,8 +460,8 @@ static inline int Gia_ManAppendCo( Gia_Man_t * p, int iLit0 )
{
Gia_Obj_t * pObj = Gia_ManAppendObj( p );
pObj->fTerm = 1;
- pObj->iDiff0 = Gia_ObjId(p, pObj) - Gia_Lit2Var(iLit0);
- pObj->fCompl0 = Gia_LitIsCompl(iLit0);
+ pObj->iDiff0 = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit0);
+ pObj->fCompl0 = Abc_LitIsCompl(iLit0);
pObj->iDiff1 = Vec_IntSize( p->vCos );
Vec_IntPush( p->vCos, Gia_ObjId(p, pObj) );
if ( p->pFanData )
@@ -490,9 +470,9 @@ static inline int Gia_ManAppendCo( Gia_Man_t * p, int iLit0 )
}
static inline int Gia_ManAppendMux( Gia_Man_t * p, int iCtrl, int iData1, int iData0 )
{
- int iTemp0 = Gia_ManAppendAnd( p, Gia_LitNot(iCtrl), iData0 );
+ int iTemp0 = Gia_ManAppendAnd( p, Abc_LitNot(iCtrl), iData0 );
int iTemp1 = Gia_ManAppendAnd( p, iCtrl, iData1 );
- return Gia_LitNotCond( Gia_ManAppendAnd( p, Gia_LitNot(iTemp0), Gia_LitNot(iTemp1) ), 1 );
+ return Abc_LitNotCond( Gia_ManAppendAnd( p, Abc_LitNot(iTemp0), Abc_LitNot(iTemp1) ), 1 );
}
#define GIA_ZER 1
@@ -587,7 +567,7 @@ static inline int Gia_ObjLutFanin( Gia_Man_t * p, int Id, int i ) { re
#define Gia_ManForEachObjVec( vVec, p, pObj, i ) \
for ( i = 0; (i < Vec_IntSize(vVec)) && ((pObj) = Gia_ManObj(p, Vec_IntEntry(vVec,i))); i++ )
#define Gia_ManForEachObjVecLit( vVec, p, pObj, fCompl, i ) \
- for ( i = 0; (i < Vec_IntSize(vVec)) && ((pObj) = Gia_ManObj(p, Gia_Lit2Var(Vec_IntEntry(vVec,i)))) && (((fCompl) = Gia_LitIsCompl(Vec_IntEntry(vVec,i))),1); i++ )
+ for ( i = 0; (i < Vec_IntSize(vVec)) && ((pObj) = Gia_ManObj(p, Abc_Lit2Var(Vec_IntEntry(vVec,i)))) && (((fCompl) = Abc_LitIsCompl(Vec_IntEntry(vVec,i))),1); i++ )
#define Gia_ManForEachObjReverse( p, pObj, i ) \
for ( i = p->nObjs - 1; (i > 0) && ((pObj) = Gia_ManObj(p, i)); i-- )
#define Gia_ManForEachAnd( p, pObj, i ) \
@@ -817,7 +797,6 @@ extern Gia_Man_t * Gia_ManReduceConst( Gia_Man_t * pAig, int fVerbose );
/*=== giaUtil.c ===========================================================*/
extern unsigned Gia_ManRandom( int fReset );
extern void Gia_ManRandomInfo( Vec_Ptr_t * vInfo, int iInputStart, int iWordStart, int iWordStop );
-extern unsigned int Gia_PrimeCudd( unsigned int p );
extern char * Gia_TimeStamp();
extern char * Gia_FileNameGenericAppend( char * pBase, char * pSuffix );
extern void Gia_ManIncrementTravId( Gia_Man_t * p );
diff --git a/src/aig/gia/giaAbs.c b/src/aig/gia/giaAbs.c
index e9861977..e25ff7fb 100644
--- a/src/aig/gia/giaAbs.c
+++ b/src/aig/gia/giaAbs.c
@@ -20,7 +20,7 @@
#include "gia.h"
#include "giaAig.h"
-#include "saig.h"
+#include "src/aig/saig/saig.h"
ABC_NAMESPACE_IMPL_START
@@ -472,7 +472,7 @@ int Gia_ManGlaPbaPerform( Gia_Man_t * pGia, void * pPars, int fNewSolver )
// this obj was abstracted before
assert( Gia_ObjIsAnd(pObj) || Gia_ObjIsRo(pGia, pObj) );
// if corresponding AIG object is not abstracted, remove abstraction
- if ( !Vec_IntEntry(vGateClasses, Gia_Lit2Var(pObj->Value)) )
+ if ( !Vec_IntEntry(vGateClasses, Abc_Lit2Var(pObj->Value)) )
{
Vec_IntWriteEntry( pGia->vGateClasses, i, 0 );
Counter++;
diff --git a/src/aig/gia/giaAbs.h b/src/aig/gia/giaAbs.h
index 090d5dca..366a4d8a 100644
--- a/src/aig/gia/giaAbs.h
+++ b/src/aig/gia/giaAbs.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __GIA_ABS_H__
-#define __GIA_ABS_H__
+#ifndef ABC__aig__gia__giaAbs_h
+#define ABC__aig__gia__giaAbs_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/gia/giaAbsVta.c b/src/aig/gia/giaAbsVta.c
index fe30d0f0..3e7f2a01 100644
--- a/src/aig/gia/giaAbsVta.c
+++ b/src/aig/gia/giaAbsVta.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "gia.h"
-#include "satSolver2.h"
+#include "src/sat/bsat/satSolver2.h"
ABC_NAMESPACE_IMPL_START
@@ -210,7 +210,7 @@ Vec_Int_t * Gia_VtaConvertToGla( Gia_Man_t * p, Vec_Int_t * vAbs )
int i, Entry, nFrames = Vec_IntEntry( vAbs, 0 );
assert( Vec_IntEntry(vAbs, nFrames+1) == Vec_IntSize(vAbs) );
// get the bitmask
- nObjMask = (1 << Gia_Base2Log(nObjs)) - 1;
+ nObjMask = (1 << Abc_Base2Log(nObjs)) - 1;
assert( nObjs <= nObjMask );
// go through objects
vPresent = Vec_IntStart( nObjs );
@@ -248,7 +248,7 @@ static inline int Vta_ManReadFrameStart( Vec_Int_t * p, int nWords )
pTotal[w] |= pThis[i];
}
for ( i = nWords * 32 - 1; i >= 0; i-- )
- if ( Gia_InfoHasBit(pTotal, i) )
+ if ( Abc_InfoHasBit(pTotal, i) )
{
ABC_FREE( pTotal );
return i+1;
@@ -716,7 +716,7 @@ Abc_Cex_t * Vta_ManRefineAbstraction( Vta_Man_t * p )
if ( Gia_ObjIsRo(p->pGia, pObj) )
assert( pThis->iFrame == 0 && pThis->Value == VTA_VAR0 );
else if ( Gia_ObjIsPi(p->pGia, pObj) && pThis->Value == VTA_VAR1 )
- Gia_InfoSetBit( pCex->pData, pCex->nRegs + pThis->iFrame * pCex->nPis + Gia_ObjCioId(pObj) );
+ Abc_InfoSetBit( pCex->pData, pCex->nRegs + pThis->iFrame * pCex->nPis + Gia_ObjCioId(pObj) );
}
}
// perform refinement
@@ -776,7 +776,7 @@ Vta_Man_t * Vga_ManStart( Gia_Man_t * pGia, Gia_ParVta_t * pPars )
p->pBins = ABC_CALLOC( int, p->nBins );
p->vOrder = Vec_IntAlloc( 1013 );
// abstraction
- p->nObjBits = Gia_Base2Log( Gia_ManObjNum(pGia) );
+ p->nObjBits = Abc_Base2Log( Gia_ManObjNum(pGia) );
p->nObjMask = (1 << p->nObjBits) - 1;
assert( Gia_ManObjNum(pGia) <= (int)p->nObjMask );
p->nWords = 1;
@@ -922,7 +922,8 @@ Vec_Int_t * Vta_ManUnsatCore( int iLit, Vec_Int_t * vCla2Var, sat_solver2 * pSat
***********************************************************************/
void Vta_ManAbsPrintFrame( Vta_Man_t * p, Vec_Int_t * vCore, int nFrames )
{
- unsigned * pInfo, * pCountAll, * pCountUni;
+ unsigned * pInfo;
+ int * pCountAll, * pCountUni;
int i, k, iFrame, iObj, Entry;
// print info about frames
pCountAll = ABC_CALLOC( int, nFrames + 1 );
@@ -933,9 +934,9 @@ void Vta_ManAbsPrintFrame( Vta_Man_t * p, Vec_Int_t * vCore, int nFrames )
iFrame = (Entry >> p->nObjBits);
assert( iFrame < nFrames );
pInfo = (unsigned *)Vec_IntEntryP( p->vSeens, p->nWords * iObj );
- if ( Gia_InfoHasBit(pInfo, iFrame) == 0 )
+ if ( Abc_InfoHasBit(pInfo, iFrame) == 0 )
{
- Gia_InfoSetBit( pInfo, iFrame );
+ Abc_InfoSetBit( pInfo, iFrame );
pCountUni[iFrame+1]++;
pCountUni[0]++;
}
@@ -1062,7 +1063,7 @@ static inline int Vga_ManGetOutLit( Vta_Man_t * p, int f )
Gia_Obj_t * pObj = Gia_ManPo(p->pGia, 0);
Vta_Obj_t * pThis = Vga_ManFind( p, Gia_ObjFaninId0p(p->pGia, pObj), f );
assert( pThis != NULL && pThis->fAdded );
- return Gia_Var2Lit( Vta_ObjId(p, pThis), Gia_ObjFaninC0(pObj) );
+ return Abc_Var2Lit( Vta_ObjId(p, pThis), Gia_ObjFaninC0(pObj) );
}
/**Function*************************************************************
@@ -1105,7 +1106,7 @@ int Gia_VtaPerform( Gia_Man_t * pAig, Gia_ParVta_t * pPars )
if ( f < p->pPars->nFramesStart )
{
// load this timeframe
- Vga_ManLoadSlice( p, Vec_PtrEntry(p->vFrames, f), 0 );
+ Vga_ManLoadSlice( p, (Vec_Int_t *)Vec_PtrEntry(p->vFrames, f), 0 );
// run SAT solver
vCore = Vta_ManUnsatCore( Vga_ManGetOutLit(p, f), p->vCla2Var, p->pSat, pPars->nConfLimit, p->pPars->fVerbose, &Status );
assert( (vCore != NULL) == (Status == 1) );
@@ -1123,7 +1124,7 @@ int Gia_VtaPerform( Gia_Man_t * pAig, Gia_ParVta_t * pPars )
{
pObj = Gia_ManObj( p->pGia, pThis->iObj );
if ( Gia_ObjIsPi(p->pGia, pObj) && sat_solver2_var_value(p->pSat, Vta_ObjId(p, pThis)) )
- Gia_InfoSetBit( pCex->pData, pCex->nRegs + pThis->iFrame * pCex->nPis + Gia_ObjCioId(pObj) );
+ Abc_InfoSetBit( pCex->pData, pCex->nRegs + pThis->iFrame * pCex->nPis + Gia_ObjCioId(pObj) );
}
}
}
@@ -1133,7 +1134,7 @@ int Gia_VtaPerform( Gia_Man_t * pAig, Gia_ParVta_t * pPars )
// load the time frame
int Limit = Abc_MinInt(5, p->pPars->nFramesStart);
for ( i = 1; i <= Limit; i++ )
- Vga_ManLoadSlice( p, Vec_PtrEntry(p->vCores, f-i), i );
+ Vga_ManLoadSlice( p, (Vec_Int_t *)Vec_PtrEntry(p->vCores, f-i), i );
// iterate as long as there are counter-examples
do {
vCore = Vta_ManUnsatCore( Vga_ManGetOutLit(p, f), p->vCla2Var, p->pSat, pPars->nConfLimit, pPars->fVerbose, &Status );
diff --git a/src/aig/gia/giaAig.c b/src/aig/gia/giaAig.c
index 00148451..6da633e0 100644
--- a/src/aig/gia/giaAig.c
+++ b/src/aig/gia/giaAig.c
@@ -19,9 +19,9 @@
***********************************************************************/
#include "giaAig.h"
-#include "fra.h"
-#include "dch.h"
-#include "dar.h"
+#include "src/proof/fra/fra.h"
+#include "src/proof/dch/dch.h"
+#include "src/opt/dar/dar.h"
ABC_NAMESPACE_IMPL_START
@@ -30,8 +30,8 @@ ABC_NAMESPACE_IMPL_START
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
-static inline int Gia_ObjChild0Copy( Aig_Obj_t * pObj ) { return Gia_LitNotCond( Aig_ObjFanin0(pObj)->iData, Aig_ObjFaninC0(pObj) ); }
-static inline int Gia_ObjChild1Copy( Aig_Obj_t * pObj ) { return Gia_LitNotCond( Aig_ObjFanin1(pObj)->iData, Aig_ObjFaninC1(pObj) ); }
+static inline int Gia_ObjChild0Copy( Aig_Obj_t * pObj ) { return Abc_LitNotCond( Aig_ObjFanin0(pObj)->iData, Aig_ObjFaninC0(pObj) ); }
+static inline int Gia_ObjChild1Copy( Aig_Obj_t * pObj ) { return Abc_LitNotCond( Aig_ObjFanin1(pObj)->iData, Aig_ObjFaninC1(pObj) ); }
static inline Aig_Obj_t * Gia_ObjChild0Copy2( Aig_Obj_t ** ppNodes, Gia_Obj_t * pObj, int Id ) { return Aig_NotCond( ppNodes[Gia_ObjFaninId0(pObj, Id)], Gia_ObjFaninC0(pObj) ); }
static inline Aig_Obj_t * Gia_ObjChild1Copy2( Aig_Obj_t ** ppNodes, Gia_Obj_t * pObj, int Id ) { return Aig_NotCond( ppNodes[Gia_ObjFaninId1(pObj, Id)], Gia_ObjFaninC1(pObj) ); }
@@ -64,8 +64,8 @@ void Gia_ManFromAig_rec( Gia_Man_t * pNew, Aig_Man_t * p, Aig_Obj_t * pObj )
{
int iObjNew, iNextNew;
Gia_ManFromAig_rec( pNew, p, pNext );
- iObjNew = Gia_Lit2Var(pObj->iData);
- iNextNew = Gia_Lit2Var(pNext->iData);
+ iObjNew = Abc_Lit2Var(pObj->iData);
+ iNextNew = Abc_Lit2Var(pNext->iData);
if ( pNew->pNexts )
pNew->pNexts[iObjNew] = iNextNew;
}
@@ -89,7 +89,7 @@ Gia_Man_t * Gia_ManFromAig( Aig_Man_t * p )
int i;
// create the new manager
pNew = Gia_ManStart( Aig_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->nConstrs = p->nConstrs;
// create room to store equivalences
if ( p->pEquivs )
@@ -128,7 +128,7 @@ Gia_Man_t * Gia_ManFromAigSimple( Aig_Man_t * p )
int i;
// create the new manager
pNew = Gia_ManStart( Aig_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->nConstrs = p->nConstrs;
// create the PIs
Aig_ManCleanData( p );
@@ -167,7 +167,7 @@ Gia_Man_t * Gia_ManFromAigSwitch( Aig_Man_t * p )
int i;
// create the new manager
pNew = Gia_ManStart( Aig_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->nConstrs = p->nConstrs;
// create the PIs
Aig_ManCleanData( p );
@@ -246,9 +246,9 @@ Aig_Man_t * Gia_ManToAig( Gia_Man_t * p, int fChoices )
assert( !fChoices || (p->pNexts && p->pReprs) );
// create the new manager
pNew = Aig_ManStart( Gia_ManAndNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->nConstrs = p->nConstrs;
-// pNew->pSpec = Gia_UtilStrsav( p->pName );
+// pNew->pSpec = Abc_UtilStrsav( p->pName );
// duplicate representation of choice nodes
if ( fChoices )
pNew->pEquivs = ABC_CALLOC( Aig_Obj_t *, Gia_ManObjNum(p) );
@@ -293,9 +293,9 @@ Aig_Man_t * Gia_ManToAigSkip( Gia_Man_t * p, int nOutDelta )
assert( nOutDelta > 0 && Gia_ManCoNum(p) % nOutDelta == 0 );
// create the new manager
pNew = Aig_ManStart( Gia_ManAndNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->nConstrs = p->nConstrs;
-// pNew->pSpec = Gia_UtilStrsav( p->pName );
+// pNew->pSpec = Abc_UtilStrsav( p->pName );
// create the PIs
ppNodes = ABC_CALLOC( Aig_Obj_t *, Gia_ManObjNum(p) );
ppNodes[0] = Aig_ManConst0(pNew);
@@ -334,7 +334,7 @@ Aig_Man_t * Gia_ManToAigSimple( Gia_Man_t * p )
ppNodes = ABC_FALLOC( Aig_Obj_t *, Gia_ManObjNum(p) );
// create the new manager
pNew = Aig_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->nConstrs = p->nConstrs;
// create the PIs
Gia_ManForEachObj( p, pObj, i )
@@ -349,7 +349,7 @@ Aig_Man_t * Gia_ManToAigSimple( Gia_Man_t * p )
ppNodes[i] = Aig_ManConst0(pNew);
else
assert( 0 );
- pObj->Value = Gia_Var2Lit( Aig_ObjId(Aig_Regular(ppNodes[i])), Aig_IsComplement(ppNodes[i]) );
+ pObj->Value = Abc_Var2Lit( Aig_ObjId(Aig_Regular(ppNodes[i])), Aig_IsComplement(ppNodes[i]) );
assert( i == 0 || Aig_ObjId(ppNodes[i]) == i );
}
Aig_ManSetRegNum( pNew, Gia_ManRegNum(p) );
@@ -402,8 +402,8 @@ void Gia_ManReprToAigRepr( Aig_Man_t * pAig, Gia_Man_t * pGia )
// move pointers from AIG to GIA
Aig_ManForEachObj( pAig, pObj, i )
{
- assert( i == 0 || !Gia_LitIsCompl(pObj->iData) );
- pGiaObj = Gia_ManObj( pGia, Gia_Lit2Var(pObj->iData) );
+ assert( i == 0 || !Abc_LitIsCompl(pObj->iData) );
+ pGiaObj = Gia_ManObj( pGia, Abc_Lit2Var(pObj->iData) );
pGiaObj->Value = i;
}
// set the pointers to the nodes in AIG
@@ -441,7 +441,7 @@ void Gia_ManReprToAigRepr2( Aig_Man_t * pAig, Gia_Man_t * pGia )
pGiaRepr = Gia_ObjReprObj( pGia, i );
if ( pGiaRepr == NULL )
continue;
- Aig_ObjCreateRepr( pAig, Aig_ManObj(pAig, Gia_Lit2Var(pGiaRepr->Value)), Aig_ManObj(pAig, Gia_Lit2Var(pGiaObj->Value)) );
+ Aig_ObjCreateRepr( pAig, Aig_ManObj(pAig, Abc_Lit2Var(pGiaRepr->Value)), Aig_ManObj(pAig, Abc_Lit2Var(pGiaObj->Value)) );
}
}
@@ -472,8 +472,8 @@ void Gia_ManReprFromAigRepr( Aig_Man_t * pAig, Gia_Man_t * pGia )
// Abc_Print( 1, "%d -> %d %d\n", i, Gia_ObjValue(pObjGia), Gia_ObjValue(pObjGia)/2 );
if ( Gia_ObjIsCo(pObjGia) )
continue;
- assert( i == 0 || !Gia_LitIsCompl(Gia_ObjValue(pObjGia)) );
- pObjAig = Aig_ManObj( pAig, Gia_Lit2Var(Gia_ObjValue(pObjGia)) );
+ assert( i == 0 || !Abc_LitIsCompl(Gia_ObjValue(pObjGia)) );
+ pObjAig = Aig_ManObj( pAig, Abc_Lit2Var(Gia_ObjValue(pObjGia)) );
pObjAig->iData = i;
}
Aig_ManForEachObj( pAig, pObjAig, i )
diff --git a/src/aig/gia/giaAig.h b/src/aig/gia/giaAig.h
index 1c0a24d5..6522a5bc 100644
--- a/src/aig/gia/giaAig.h
+++ b/src/aig/gia/giaAig.h
@@ -18,15 +18,15 @@
***********************************************************************/
-#ifndef __GIA_AIG_H__
-#define __GIA_AIG_H__
+#ifndef ABC__aig__gia__giaAig_h
+#define ABC__aig__gia__giaAig_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "aig.h"
+#include "src/aig/aig/aig.h"
#include "gia.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/aig/gia/giaAiger.c b/src/aig/gia/giaAiger.c
index db194c69..2ae070d3 100644
--- a/src/aig/gia/giaAiger.c
+++ b/src/aig/gia/giaAiger.c
@@ -146,7 +146,7 @@ int Gia_FileSize( char * pFileName )
char * Gia_FileNameGeneric( char * FileName )
{
char * pDot, * pRes;
- pRes = Gia_UtilStrsav( FileName );
+ pRes = Abc_UtilStrsav( FileName );
if ( (pDot = strrchr( pRes, '.' )) )
*pDot = 0;
return pRes;
@@ -445,8 +445,8 @@ Gia_Man_t * Gia_ReadAiger2( char * pFileName, int fCheck )
// allocate the empty AIG
pNew = Gia_ManStart( nTotal + nLatches + nOutputs + 1 );
pName = Gia_FileNameGeneric( pFileName );
- pNew->pName = Gia_UtilStrsav( pName );
-// pNew->pSpec = Gia_UtilStrsav( pFileName );
+ pNew->pName = Abc_UtilStrsav( pName );
+// pNew->pSpec = Abc_UtilStrsav( pFileName );
ABC_FREE( pName );
pNew->nConstrs = nConstr;
@@ -482,8 +482,8 @@ Gia_Man_t * Gia_ReadAiger2( char * pFileName, int fCheck )
uLit1 = uLit - Gia_ReadAigerDecode( &pCur );
uLit0 = uLit1 - Gia_ReadAigerDecode( &pCur );
// assert( uLit1 > uLit0 );
- iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), uLit0 & 1 );
- iNode1 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit1 >> 1), uLit1 & 1 );
+ iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), uLit0 & 1 );
+ iNode1 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit1 >> 1), uLit1 & 1 );
assert( Vec_IntSize(vNodes) == i + 1 + nInputs + nLatches );
// Vec_IntPush( vNodes, Gia_And(pNew, iNode0, iNode1) );
Vec_IntPush( vNodes, Gia_ManAppendAnd(pNew, iNode0, iNode1) );
@@ -500,14 +500,14 @@ Gia_Man_t * Gia_ReadAiger2( char * pFileName, int fCheck )
for ( i = 0; i < nLatches; i++ )
{
uLit0 = atoi( (char *)pCur ); while ( *pCur++ != '\n' );
- iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+ iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
Vec_IntPush( vDrivers, iNode0 );
}
// read the PO driver literals
for ( i = 0; i < nOutputs; i++ )
{
uLit0 = atoi( (char *)pCur ); while ( *pCur++ != '\n' );
- iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+ iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
Vec_IntPush( vDrivers, iNode0 );
}
@@ -518,14 +518,14 @@ Gia_Man_t * Gia_ReadAiger2( char * pFileName, int fCheck )
for ( i = 0; i < nLatches; i++ )
{
uLit0 = Vec_IntEntry( vLits, i );
- iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+ iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
Vec_IntPush( vDrivers, iNode0 );
}
// read the PO driver literals
for ( i = 0; i < nOutputs; i++ )
{
uLit0 = Vec_IntEntry( vLits, i+nLatches );
- iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+ iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
Vec_IntPush( vDrivers, iNode0 );
}
Vec_IntFree( vLits );
@@ -604,7 +604,7 @@ Gia_Man_t * Gia_ReadAiger2( char * pFileName, int fCheck )
pCur++;
// read model name
ABC_FREE( pNew->pName );
- pNew->pName = Gia_UtilStrsav( (char *)pCur );
+ pNew->pName = Abc_UtilStrsav( (char *)pCur );
}
}
Vec_IntFree( vNodes );
@@ -753,8 +753,8 @@ Gia_Man_t * Gia_ReadAigerFromMemory( char * pContents, int nFileSize, int fCheck
uLit1 = uLit - Gia_ReadAigerDecode( &pCur );
uLit0 = uLit1 - Gia_ReadAigerDecode( &pCur );
// assert( uLit1 > uLit0 );
- iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), uLit0 & 1 );
- iNode1 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit1 >> 1), uLit1 & 1 );
+ iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), uLit0 & 1 );
+ iNode1 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit1 >> 1), uLit1 & 1 );
assert( Vec_IntSize(vNodes) == i + 1 + nInputs + nLatches );
// Vec_IntPush( vNodes, Gia_And(pNew, iNode0, iNode1) );
Vec_IntPush( vNodes, Gia_ManHashAnd(pNew, iNode0, iNode1) );
@@ -772,14 +772,14 @@ Gia_Man_t * Gia_ReadAigerFromMemory( char * pContents, int nFileSize, int fCheck
for ( i = 0; i < nLatches; i++ )
{
uLit0 = atoi( (char *)pCur ); while ( *pCur++ != '\n' );
- iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+ iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
Vec_IntPush( vDrivers, iNode0 );
}
// read the PO driver literals
for ( i = 0; i < nOutputs; i++ )
{
uLit0 = atoi( (char *)pCur ); while ( *pCur++ != '\n' );
- iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+ iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
Vec_IntPush( vDrivers, iNode0 );
}
@@ -790,14 +790,14 @@ Gia_Man_t * Gia_ReadAigerFromMemory( char * pContents, int nFileSize, int fCheck
for ( i = 0; i < nLatches; i++ )
{
uLit0 = Vec_IntEntry( vLits, i );
- iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+ iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
Vec_IntPush( vDrivers, iNode0 );
}
// read the PO driver literals
for ( i = 0; i < nOutputs; i++ )
{
uLit0 = Vec_IntEntry( vLits, i+nLatches );
- iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+ iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
Vec_IntPush( vDrivers, iNode0 );
}
Vec_IntFree( vLits );
@@ -877,7 +877,7 @@ Gia_Man_t * Gia_ReadAigerFromMemory( char * pContents, int nFileSize, int fCheck
pCur++;
// read model name
ABC_FREE( pNew->pName );
- pNew->pName = Gia_UtilStrsav( (char *)pCur );
+ pNew->pName = Abc_UtilStrsav( (char *)pCur );
}
}
@@ -1094,7 +1094,7 @@ Gia_Man_t * Gia_ReadAiger( char * pFileName, int fCheck )
{
ABC_FREE( pNew->pName );
pName = Gia_FileNameGeneric( pFileName );
- pNew->pName = Gia_UtilStrsav( pName );
+ pNew->pName = Abc_UtilStrsav( pName );
// pNew->pSpec = Ioa_UtilStrsav( pFileName );
ABC_FREE( pName );
}
@@ -1246,30 +1246,30 @@ unsigned char * Gia_WriteEquivClasses( Gia_Man_t * p, int * pEquivSize )
}
pBuffer = ABC_ALLOC( unsigned char, sizeof(int) * (nItems + 1) );
// write constant class
- iPos = Gia_WriteAigerEncode( pBuffer, 4, Gia_Var2Lit(0, 1) );
+ iPos = Gia_WriteAigerEncode( pBuffer, 4, Abc_Var2Lit(0, 1) );
//printf( "\nRepr = %d ", 0 );
iPrevNode = 0;
for ( iNode = 1; iNode < Gia_ManObjNum(p); iNode++ )
if ( Gia_ObjIsConst(p, iNode) )
{
//printf( "Node = %d ", iNode );
- iLit = Gia_Var2Lit( iNode - iPrevNode, Gia_ObjProved(p, iNode) );
+ iLit = Abc_Var2Lit( iNode - iPrevNode, Gia_ObjProved(p, iNode) );
iPrevNode = iNode;
- iPos = Gia_WriteAigerEncode( pBuffer, iPos, Gia_Var2Lit(iLit, 0) );
+ iPos = Gia_WriteAigerEncode( pBuffer, iPos, Abc_Var2Lit(iLit, 0) );
}
// write non-constant classes
iPrevRepr = 0;
Gia_ManForEachClass( p, iRepr )
{
//printf( "\nRepr = %d ", iRepr );
- iPos = Gia_WriteAigerEncode( pBuffer, iPos, Gia_Var2Lit(iRepr - iPrevRepr, 1) );
+ iPos = Gia_WriteAigerEncode( pBuffer, iPos, Abc_Var2Lit(iRepr - iPrevRepr, 1) );
iPrevRepr = iPrevNode = iRepr;
Gia_ClassForEachObj1( p, iRepr, iNode )
{
//printf( "Node = %d ", iNode );
- iLit = Gia_Var2Lit( iNode - iPrevNode, Gia_ObjProved(p, iNode) );
+ iLit = Abc_Var2Lit( iNode - iPrevNode, Gia_ObjProved(p, iNode) );
iPrevNode = iNode;
- iPos = Gia_WriteAigerEncode( pBuffer, iPos, Gia_Var2Lit(iLit, 0) );
+ iPos = Gia_WriteAigerEncode( pBuffer, iPos, Abc_Var2Lit(iLit, 0) );
}
}
Gia_WriteInt( pBuffer, iPos );
@@ -1291,8 +1291,8 @@ unsigned char * Gia_WriteEquivClasses( Gia_Man_t * p, int * pEquivSize )
int Gia_WriteDiffValue( unsigned char * pPos, int iPos, int iPrev, int iThis )
{
if ( iPrev < iThis )
- return Gia_WriteAigerEncode( pPos, iPos, Gia_Var2Lit(iThis - iPrev, 1) );
- return Gia_WriteAigerEncode( pPos, iPos, Gia_Var2Lit(iPrev - iThis, 0) );
+ return Gia_WriteAigerEncode( pPos, iPos, Abc_Var2Lit(iThis - iPrev, 1) );
+ return Gia_WriteAigerEncode( pPos, iPos, Abc_Var2Lit(iPrev - iThis, 0) );
}
/**Function*************************************************************
@@ -1420,7 +1420,7 @@ void Gia_WriteAiger( Gia_Man_t * pInit, char * pFileName, int fWriteSymbols, int
pBuffer = ABC_ALLOC( unsigned char, nBufferSize );
Gia_ManForEachAnd( p, pObj, i )
{
- uLit = Gia_Var2Lit( i, 0 );
+ uLit = Abc_Var2Lit( i, 0 );
uLit0 = Gia_ObjFaninLit0( pObj, i );
uLit1 = Gia_ObjFaninLit1( pObj, i );
assert( uLit0 < uLit1 );
diff --git a/src/aig/gia/giaBidec.c b/src/aig/gia/giaBidec.c
index fc17b582..54f98afd 100644
--- a/src/aig/gia/giaBidec.c
+++ b/src/aig/gia/giaBidec.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "gia.h"
-#include "bdc.h"
+#include "src/bool/bdc/bdc.h"
ABC_NAMESPACE_IMPL_START
@@ -28,7 +28,7 @@ ABC_NAMESPACE_IMPL_START
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
-static inline int Bdc_FunObjCopy( Bdc_Fun_t * pObj ) { return Gia_LitNotCond( Bdc_FuncCopyInt(Bdc_Regular(pObj)), Bdc_IsComplement(pObj) ); }
+static inline int Bdc_FunObjCopy( Bdc_Fun_t * pObj ) { return Abc_LitNotCond( Bdc_FuncCopyInt(Bdc_Regular(pObj)), Bdc_IsComplement(pObj) ); }
static inline int Bdc_FunFanin0Copy( Bdc_Fun_t * pObj ) { return Bdc_FunObjCopy( Bdc_FuncFanin0(pObj) ); }
static inline int Bdc_FunFanin1Copy( Bdc_Fun_t * pObj ) { return Bdc_FunObjCopy( Bdc_FuncFanin1(pObj) ); }
@@ -109,7 +109,7 @@ unsigned * Gia_ManConvertAigToTruth( Gia_Man_t * p, Gia_Obj_t * pRoot, Vec_Int_t
int i, nWords, nVars;
// get the number of variables and words
nVars = Vec_IntSize( vLeaves );
- nWords = Gia_TruthWordNum( nVars );
+ nWords = Abc_TruthWordNum( nVars );
// check the case of a constant
if ( Gia_ObjIsConst0( Gia_Regular(pRoot) ) )
{
@@ -263,7 +263,7 @@ Gia_Man_t * Gia_ManPerformBidec( Gia_Man_t * p, int fVerbose )
Gia_ManConst0(p)->Value = 0;
// start the new manager
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
// Gia_ManCleanLevels( pNew, Gia_ManObjNum(p) );
pManDec = Bdc_ManAlloc( pPars );
diff --git a/src/aig/gia/giaCCof.c b/src/aig/gia/giaCCof.c
index 38e5ccdf..b04d5953 100644
--- a/src/aig/gia/giaCCof.c
+++ b/src/aig/gia/giaCCof.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "gia.h"
-#include "satSolver.h"
+#include "src/sat/bsat/satSolver.h"
ABC_NAMESPACE_IMPL_START
@@ -134,10 +134,10 @@ void Gia_ManCofExtendSolver( Ccf_Man_t * p )
}
static inline int Gia_Obj0Copy( Vec_Int_t * vCopies, int Fan0, int fCompl0 )
-{ return Gia_LitNotCond( Vec_IntEntry(vCopies, Fan0), fCompl0 ); }
+{ return Abc_LitNotCond( Vec_IntEntry(vCopies, Fan0), fCompl0 ); }
static inline int Gia_Obj1Copy( Vec_Int_t * vCopies, int Fan1, int fCompl1 )
-{ return Gia_LitNotCond( Vec_IntEntry(vCopies, Fan1), fCompl1 ); }
+{ return Abc_LitNotCond( Vec_IntEntry(vCopies, Fan1), fCompl1 ); }
/**Function*************************************************************
@@ -173,7 +173,7 @@ void Gia_ManCofOneDerive_rec( Ccf_Man_t * p, int Id )
else if ( Gia_ObjCioId(pObj) >= Gia_ManRegNum(p->pGia) ) // PI
Res = sat_solver_var_value( p->pSat, Id );
else
- Res = Gia_Var2Lit( Id, 0 );
+ Res = Abc_Var2Lit( Id, 0 );
Vec_IntWriteEntry( p->vCopies, Id, Res );
}
@@ -193,15 +193,15 @@ int Gia_ManCofOneDerive( Ccf_Man_t * p, int LitProp )
int LitOut;
// derive the cofactor of the property node
Vec_IntFill( p->vCopies, Gia_ManObjNum(p->pFrames), -1 );
- Gia_ManCofOneDerive_rec( p, Gia_Lit2Var(LitProp) );
- LitOut = Vec_IntEntry( p->vCopies, Gia_Lit2Var(LitProp) );
- LitOut = Gia_LitNotCond( LitOut, Gia_LitIsCompl(LitProp) );
+ Gia_ManCofOneDerive_rec( p, Abc_Lit2Var(LitProp) );
+ LitOut = Vec_IntEntry( p->vCopies, Abc_Lit2Var(LitProp) );
+ LitOut = Abc_LitNotCond( LitOut, Abc_LitIsCompl(LitProp) );
// add new PO for the cofactor
Gia_ManAppendCo( p->pFrames, LitOut );
// add SAT clauses
Gia_ManCofExtendSolver( p );
// return negative literal of the cofactor
- return Gia_LitNot(LitOut);
+ return Abc_LitNot(LitOut);
}
/**Function*************************************************************
diff --git a/src/aig/gia/giaCSat.c b/src/aig/gia/giaCSat.c
index 745b19ba..d83f79e9 100644
--- a/src/aig/gia/giaCSat.c
+++ b/src/aig/gia/giaCSat.c
@@ -238,8 +238,8 @@ static inline void Cbs_ManSaveModel( Cbs_Man_t * p, Vec_Int_t * vCex )
p->pProp.iHead = 0;
Cbs_QueForEachEntry( p->pProp, pVar, i )
if ( Gia_ObjIsCi(pVar) )
-// Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjId(p->pAig,pVar), !Cbs_VarValue(pVar)) );
- Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjCioId(pVar), !Cbs_VarValue(pVar)) );
+// Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjId(p->pAig,pVar), !Cbs_VarValue(pVar)) );
+ Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjCioId(pVar), !Cbs_VarValue(pVar)) );
}
/**Function*************************************************************
@@ -377,7 +377,7 @@ static inline int Cbs_VarFaninFanoutMax( Cbs_Man_t * p, Gia_Obj_t * pObj )
assert( Gia_ObjIsAnd(pObj) );
Count0 = Gia_ObjRefs( p->pAig, Gia_ObjFanin0(pObj) );
Count1 = Gia_ObjRefs( p->pAig, Gia_ObjFanin1(pObj) );
- return ABC_MAX( Count0, Count1 );
+ return Abc_MaxInt( Count0, Count1 );
}
/**Function*************************************************************
@@ -504,7 +504,7 @@ static inline void Cbs_ManAssign( Cbs_Man_t * p, Gia_Obj_t * pObj, int Level, Gi
Vec_IntPush( p->vLevReas, pRes1 ? pRes1-pObjR : 0 );
assert( Vec_IntSize(p->vLevReas) == 3 * p->pProp.iTail );
// s_Counter++;
-// s_Counter = Abc_MaxInt( s_Counter, Vec_IntSize(p->vLevReas)/3 );
+// s_Counter = Abc_MaxIntInt( s_Counter, Vec_IntSize(p->vLevReas)/3 );
}
@@ -872,7 +872,7 @@ int Cbs_ManSolve_rec( Cbs_Man_t * p, int Level )
if ( Cbs_QueIsEmpty(&p->pJust) )
return 0;
// quit using resource limits
- p->Pars.nJustThis = ABC_MAX( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
+ p->Pars.nJustThis = Abc_MaxInt( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
if ( Cbs_ManCheckLimits( p ) )
return 0;
// remember the state before branching
@@ -946,7 +946,7 @@ int Cbs_ManSolve( Cbs_Man_t * p, Gia_Obj_t * pObj )
p->pJust.iHead = p->pJust.iTail = 0;
p->pClauses.iHead = p->pClauses.iTail = 1;
p->Pars.nBTTotal += p->Pars.nBTThis;
- p->Pars.nJustTotal = ABC_MAX( p->Pars.nJustTotal, p->Pars.nJustThis );
+ p->Pars.nJustTotal = Abc_MaxInt( p->Pars.nJustTotal, p->Pars.nJustThis );
if ( Cbs_ManCheckLimits( p ) )
RetValue = -1;
diff --git a/src/aig/gia/giaCSatOld.c b/src/aig/gia/giaCSatOld.c
index 983081f0..8198c17f 100644
--- a/src/aig/gia/giaCSatOld.c
+++ b/src/aig/gia/giaCSatOld.c
@@ -213,8 +213,8 @@ static inline void Cbs0_ManSaveModel( Cbs0_Man_t * p, Vec_Int_t * vCex )
p->pProp.iHead = 0;
Cbs0_QueForEachEntry( p->pProp, pVar, i )
if ( Gia_ObjIsCi(pVar) )
-// Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjId(p->pAig,pVar), !Cbs0_VarValue(pVar)) );
- Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjCioId(pVar), !Cbs0_VarValue(pVar)) );
+// Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjId(p->pAig,pVar), !Cbs0_VarValue(pVar)) );
+ Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjCioId(pVar), !Cbs0_VarValue(pVar)) );
}
/**Function*************************************************************
@@ -332,7 +332,7 @@ static inline int Cbs0_VarFaninFanoutMax( Cbs0_Man_t * p, Gia_Obj_t * pObj )
assert( Gia_ObjIsAnd(pObj) );
Count0 = Gia_ObjRefs( p->pAig, Gia_ObjFanin0(pObj) );
Count1 = Gia_ObjRefs( p->pAig, Gia_ObjFanin1(pObj) );
- return ABC_MAX( Count0, Count1 );
+ return Abc_MaxInt( Count0, Count1 );
}
/**Function*************************************************************
@@ -596,7 +596,7 @@ int Cbs0_ManSolve_rec( Cbs0_Man_t * p )
if ( Cbs0_QueIsEmpty(&p->pJust) )
return 0;
// quit using resource limits
- p->Pars.nJustThis = ABC_MAX( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
+ p->Pars.nJustThis = Abc_MaxInt( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
if ( Cbs0_ManCheckLimits( p ) )
return 0;
// remember the state before branching
@@ -656,7 +656,7 @@ int Cbs0_ManSolve( Cbs0_Man_t * p, Gia_Obj_t * pObj )
Cbs0_ManCancelUntil( p, 0 );
p->pJust.iHead = p->pJust.iTail = 0;
p->Pars.nBTTotal += p->Pars.nBTThis;
- p->Pars.nJustTotal = ABC_MAX( p->Pars.nJustTotal, p->Pars.nJustThis );
+ p->Pars.nJustTotal = Abc_MaxInt( p->Pars.nJustTotal, p->Pars.nJustThis );
if ( Cbs0_ManCheckLimits( p ) )
RetValue = -1;
// printf( "Outcome = %2d. Confs = %6d. Decision level max = %3d.\n",
diff --git a/src/aig/gia/giaCTas.c b/src/aig/gia/giaCTas.c
index c6aa3fec..7cfdac74 100644
--- a/src/aig/gia/giaCTas.c
+++ b/src/aig/gia/giaCTas.c
@@ -122,8 +122,8 @@ static inline void Tas_VarSetValue( Gia_Obj_t * pVar, int v ) { assert(pVar->fM
static inline int Tas_VarIsJust( Gia_Obj_t * pVar ) { return Gia_ObjIsAnd(pVar) && !Tas_VarIsAssigned(Gia_ObjFanin0(pVar)) && !Tas_VarIsAssigned(Gia_ObjFanin1(pVar)); }
static inline int Tas_VarFanin0Value( Gia_Obj_t * pVar ) { return !Tas_VarIsAssigned(Gia_ObjFanin0(pVar)) ? 2 : (Tas_VarValue(Gia_ObjFanin0(pVar)) ^ Gia_ObjFaninC0(pVar)); }
static inline int Tas_VarFanin1Value( Gia_Obj_t * pVar ) { return !Tas_VarIsAssigned(Gia_ObjFanin1(pVar)) ? 2 : (Tas_VarValue(Gia_ObjFanin1(pVar)) ^ Gia_ObjFaninC1(pVar)); }
-static inline int Tas_VarToLit( Tas_Man_t * p, Gia_Obj_t * pObj ) { assert( Tas_VarIsAssigned(pObj) ); return Gia_Var2Lit( Gia_ObjId(p->pAig, pObj), !Tas_VarValue(pObj) ); }
-static inline int Tas_LitIsTrue( Gia_Obj_t * pObj, int Lit ) { assert( Tas_VarIsAssigned(pObj) ); return Tas_VarValue(pObj) != Gia_LitIsCompl(Lit); }
+static inline int Tas_VarToLit( Tas_Man_t * p, Gia_Obj_t * pObj ) { assert( Tas_VarIsAssigned(pObj) ); return Abc_Var2Lit( Gia_ObjId(p->pAig, pObj), !Tas_VarValue(pObj) ); }
+static inline int Tas_LitIsTrue( Gia_Obj_t * pObj, int Lit ) { assert( Tas_VarIsAssigned(pObj) ); return Tas_VarValue(pObj) != Abc_LitIsCompl(Lit); }
static inline int Tas_ClsHandle( Tas_Man_t * p, Tas_Cls_t * pClause ) { return ((int *)pClause) - p->pStore.pData; }
static inline Tas_Cls_t * Tas_ClsFromHandle( Tas_Man_t * p, int h ) { return (Tas_Cls_t *)(p->pStore.pData + h); }
@@ -292,8 +292,8 @@ static inline void Tas_ManSaveModel( Tas_Man_t * p, Vec_Int_t * vCex )
Tas_QueForEachEntry( p->pProp, pVar, i )
{
if ( Gia_ObjIsCi(pVar) )
-// Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjId(p->pAig,pVar), !Tas_VarValue(pVar)) );
- Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjCioId(pVar), !Tas_VarValue(pVar)) );
+// Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjId(p->pAig,pVar), !Tas_VarValue(pVar)) );
+ Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjCioId(pVar), !Tas_VarValue(pVar)) );
/*
printf( "%5d(%d) = ", Gia_ObjId(p->pAig, pVar), Tas_VarValue(pVar) );
if ( Gia_ObjIsCi(pVar) )
@@ -443,7 +443,7 @@ static inline int Tas_VarFaninFanoutMax( Tas_Man_t * p, Gia_Obj_t * pObj )
assert( Gia_ObjIsAnd(pObj) );
Count0 = Gia_ObjRefs( p->pAig, Gia_ObjFanin0(pObj) );
Count1 = Gia_ObjRefs( p->pAig, Gia_ObjFanin1(pObj) );
- return ABC_MAX( Count0, Count1 );
+ return Abc_MaxInt( Count0, Count1 );
}
@@ -793,11 +793,11 @@ static inline void Tas_ManDeriveReason( Tas_Man_t * p, int Level )
if ( Tas_VarHasReasonCls( p, pObj ) )
{
Tas_Cls_t * pCls = Tas_VarReasonCls( p, pObj );
- pReason = Gia_ManObj( p->pAig, Gia_Lit2Var(pCls->pLits[0]) );
+ pReason = Gia_ManObj( p->pAig, Abc_Lit2Var(pCls->pLits[0]) );
assert( pReason == pObj );
for ( j = 1; j < pCls->nLits; j++ )
{
- pReason = Gia_ManObj( p->pAig, Gia_Lit2Var(pCls->pLits[j]) );
+ pReason = Gia_ManObj( p->pAig, Abc_Lit2Var(pCls->pLits[j]) );
iLitLevel2 = Tas_VarDecLevel( p, pReason );
assert( Tas_VarIsAssigned( pReason ) );
assert( !Tas_LitIsTrue( pReason, pCls->pLits[j] ) );
@@ -953,16 +953,16 @@ static inline Tas_Cls_t * Tas_ManAllocCls( Tas_Man_t * p, int nSize )
***********************************************************************/
static inline void Tas_ManWatchClause( Tas_Man_t * p, Tas_Cls_t * pClause, int Lit )
{
- assert( Gia_Lit2Var(Lit) < Gia_ManObjNum(p->pAig) );
+ assert( Abc_Lit2Var(Lit) < Gia_ManObjNum(p->pAig) );
assert( pClause->nLits >= 2 );
assert( pClause->pLits[0] == Lit || pClause->pLits[1] == Lit );
if ( pClause->pLits[0] == Lit )
- pClause->iNext[0] = p->pWatches[Gia_LitNot(Lit)];
+ pClause->iNext[0] = p->pWatches[Abc_LitNot(Lit)];
else
- pClause->iNext[1] = p->pWatches[Gia_LitNot(Lit)];
- if ( p->pWatches[Gia_LitNot(Lit)] == 0 )
- Vec_IntPush( p->vWatchLits, Gia_LitNot(Lit) );
- p->pWatches[Gia_LitNot(Lit)] = Tas_ClsHandle( p, pClause );
+ pClause->iNext[1] = p->pWatches[Abc_LitNot(Lit)];
+ if ( p->pWatches[Abc_LitNot(Lit)] == 0 )
+ Vec_IntPush( p->vWatchLits, Abc_LitNot(Lit) );
+ p->pWatches[Abc_LitNot(Lit)] = Tas_ClsHandle( p, pClause );
}
/**Function*************************************************************
@@ -994,7 +994,7 @@ static inline Tas_Cls_t * Tas_ManCreateCls( Tas_Man_t * p, int hClause )
for ( i = hClause; (pObj = pQue->pData[i]); i++ )
{
assert( Tas_VarIsAssigned( pObj ) );
- pClause->pLits[i-hClause] = Gia_LitNot( Tas_VarToLit(p, pObj) );
+ pClause->pLits[i-hClause] = Abc_LitNot( Tas_VarToLit(p, pObj) );
}
// add the clause as watched one
if ( nLits >= 2 )
@@ -1027,7 +1027,7 @@ static inline int Tas_ManCreateFromCls( Tas_Man_t * p, Tas_Cls_t * pCls, int Lev
Tas_QuePush( pQue, NULL );
for ( i = 0; i < pCls->nLits; i++ )
{
- pObj = Gia_ManObj( p->pAig, Gia_Lit2Var(pCls->pLits[i]) );
+ pObj = Gia_ManObj( p->pAig, Abc_Lit2Var(pCls->pLits[i]) );
assert( Tas_VarIsAssigned(pObj) );
assert( !Tas_LitIsTrue( pObj, pCls->pLits[i] ) );
Tas_QuePush( pQue, pObj );
@@ -1052,7 +1052,7 @@ static inline int Tas_ManPropagateWatch( Tas_Man_t * p, int Level, int Lit )
Gia_Obj_t * pObj;
Tas_Cls_t * pCur;
int * piPrev, iCur, iTemp;
- int i, LitF = Gia_LitNot(Lit);
+ int i, LitF = Abc_LitNot(Lit);
// iterate through the clauses
piPrev = p->pWatches + Lit;
for ( iCur = p->pWatches[Lit]; iCur; iCur = *piPrev )
@@ -1070,8 +1070,8 @@ static inline int Tas_ManPropagateWatch( Tas_Man_t * p, int Level, int Lit )
assert( pCur->pLits[1] == LitF );
// if the first literal is true, the clause is satisfied
-// if ( pCur->pLits[0] == p->pAssigns[Gia_Lit2Var(pCur->pLits[0])] )
- pObj = Gia_ManObj( p->pAig, Gia_Lit2Var(pCur->pLits[0]) );
+// if ( pCur->pLits[0] == p->pAssigns[Abc_Lit2Var(pCur->pLits[0])] )
+ pObj = Gia_ManObj( p->pAig, Abc_Lit2Var(pCur->pLits[0]) );
if ( Tas_VarIsAssigned(pObj) && Tas_LitIsTrue( pObj, pCur->pLits[0] ) )
{
piPrev = &pCur->iNext[1];
@@ -1082,8 +1082,8 @@ static inline int Tas_ManPropagateWatch( Tas_Man_t * p, int Level, int Lit )
for ( i = 2; i < (int)pCur->nLits; i++ )
{
// skip the case when the literal is false
-// if ( Gia_LitNot(pCur->pLits[i]) == p->pAssigns[Gia_Lit2Var(pCur->pLits[i])] )
- pObj = Gia_ManObj( p->pAig, Gia_Lit2Var(pCur->pLits[i]) );
+// if ( Abc_LitNot(pCur->pLits[i]) == p->pAssigns[Abc_Lit2Var(pCur->pLits[i])] )
+ pObj = Gia_ManObj( p->pAig, Abc_Lit2Var(pCur->pLits[i]) );
if ( Tas_VarIsAssigned(pObj) && !Tas_LitIsTrue( pObj, pCur->pLits[i] ) )
continue;
// the literal is either true or unassigned - watch it
@@ -1099,7 +1099,7 @@ static inline int Tas_ManPropagateWatch( Tas_Man_t * p, int Level, int Lit )
continue;
// clause is unit - enqueue new implication
- pObj = Gia_ManObj( p->pAig, Gia_Lit2Var(pCur->pLits[0]) );
+ pObj = Gia_ManObj( p->pAig, Abc_Lit2Var(pCur->pLits[0]) );
if ( !Tas_VarIsAssigned(pObj) )
{
/*
@@ -1107,7 +1107,7 @@ static inline int Tas_ManPropagateWatch( Tas_Man_t * p, int Level, int Lit )
int iLitLevel, iPlace;
for ( i = 1; i < (int)pCur->nLits; i++ )
{
- pObj = Gia_ManObj( p->pAig, Gia_Lit2Var(pCur->pLits[i]) );
+ pObj = Gia_ManObj( p->pAig, Abc_Lit2Var(pCur->pLits[i]) );
iLitLevel = Tas_VarDecLevel( p, pObj );
iPlace = pObj->Value;
printf( "Lit = %d. Level = %d. Place = %d.\n", pCur->pLits[i], iLitLevel, iPlace );
@@ -1300,7 +1300,7 @@ int Tas_ManSolve_rec( Tas_Man_t * p, int Level )
if ( Tas_QueIsEmpty(&p->pJust) )
return 0;
// quit using resource limits
- p->Pars.nJustThis = ABC_MAX( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
+ p->Pars.nJustThis = Abc_MaxInt( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
if ( Tas_ManCheckLimits( p ) )
return 0;
// remember the state before branching
@@ -1401,7 +1401,7 @@ int Tas_ManSolve( Tas_Man_t * p, Gia_Obj_t * pObj, Gia_Obj_t * pObj2 )
Vec_IntClear( p->vActiveVars );
// statistics
p->Pars.nBTTotal += p->Pars.nBTThis;
- p->Pars.nJustTotal = ABC_MAX( p->Pars.nJustTotal, p->Pars.nJustThis );
+ p->Pars.nJustTotal = Abc_MaxInt( p->Pars.nJustTotal, p->Pars.nJustThis );
if ( Tas_ManCheckLimits( p ) )
RetValue = -1;
return RetValue;
@@ -1460,7 +1460,7 @@ int Tas_ManSolveArray( Tas_Man_t * p, Vec_Ptr_t * vObjs )
Vec_IntClear( p->vActiveVars );
// statistics
p->Pars.nBTTotal += p->Pars.nBTThis;
- p->Pars.nJustTotal = ABC_MAX( p->Pars.nJustTotal, p->Pars.nJustThis );
+ p->Pars.nJustTotal = Abc_MaxInt( p->Pars.nJustTotal, p->Pars.nJustThis );
if ( Tas_ManCheckLimits( p ) )
RetValue = -1;
@@ -1644,19 +1644,19 @@ int Tas_StorePatternTry( Vec_Ptr_t * vInfo, Vec_Ptr_t * vPres, int iBit, int * p
int i;
for ( i = 0; i < nLits; i++ )
{
- pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
- pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
- if ( Gia_InfoHasBit( pPres, iBit ) &&
- Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
+ pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+ pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+ if ( Abc_InfoHasBit( pPres, iBit ) &&
+ Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
return 0;
}
for ( i = 0; i < nLits; i++ )
{
- pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
- pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
- Gia_InfoSetBit( pPres, iBit );
- if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
- Gia_InfoXorBit( pInfo, iBit );
+ pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+ pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+ Abc_InfoSetBit( pPres, iBit );
+ if ( Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
+ Abc_InfoXorBit( pInfo, iBit );
}
return 1;
}
diff --git a/src/aig/gia/giaCof.c b/src/aig/gia/giaCof.c
index 5a04d9d3..60dcf3af 100644
--- a/src/aig/gia/giaCof.c
+++ b/src/aig/gia/giaCof.c
@@ -457,7 +457,7 @@ int Cof_ManCountRemoved( Cof_Man_t * p, Cof_Obj_t * pRoot, int fConst1 )
pRoot->iNext = 0;
p->pLevels[LevelStart] = Cof_ObjHandle( p, pRoot );
// set the new literal
- pRoot->iLit = Gia_Var2Lit( 0, fConst1 );
+ pRoot->iLit = Abc_Var2Lit( 0, fConst1 );
// process nodes in the levelized order
for ( i = LevelStart; i < p->nLevels; i++ )
{
@@ -465,7 +465,7 @@ int Cof_ManCountRemoved( Cof_Man_t * p, Cof_Obj_t * pRoot, int fConst1 )
iHandle && (pTemp = Cof_ManObj(p, iHandle));
iHandle = pTemp->iNext )
{
- assert( pTemp->Id != Gia_Lit2Var(pTemp->iLit) );
+ assert( pTemp->Id != Abc_Lit2Var(pTemp->iLit) );
Cof_ObjForEachFanout( pTemp, pNext, k )
{
if ( Cof_ObjIsCo(pNext) )
@@ -477,11 +477,11 @@ int Cof_ManCountRemoved( Cof_Man_t * p, Cof_Obj_t * pRoot, int fConst1 )
assert( pFanin0 == pTemp || pFanin1 == pTemp );
pNextGia = Gia_ManObj( p->pGia, pNext->Id );
if ( Cof_ObjIsTravIdCurrent(p, pFanin0) )
- iLit0 = Gia_LitNotCond( pFanin0->iLit, Gia_ObjFaninC0(pNextGia) );
+ iLit0 = Abc_LitNotCond( pFanin0->iLit, Gia_ObjFaninC0(pNextGia) );
else
iLit0 = Gia_ObjFaninLit0( pNextGia, pNext->Id );
if ( Cof_ObjIsTravIdCurrent(p, pFanin1) )
- iLit1 = Gia_LitNotCond( pFanin1->iLit, Gia_ObjFaninC1(pNextGia) );
+ iLit1 = Abc_LitNotCond( pFanin1->iLit, Gia_ObjFaninC1(pNextGia) );
else
iLit1 = Gia_ObjFaninLit1( pNextGia, pNext->Id );
iNextNew = Gia_ManHashAndTry( p->pGia, iLit0, iLit1 );
@@ -578,12 +578,12 @@ void Cof_ManPrintFanio( Cof_Man_t * p )
nFanouts = Cof_ObjFanoutNum(pNode);
nFaninsAll += nFanins;
nFanoutsAll += nFanouts;
- nFaninsMax = ABC_MAX( nFaninsMax, nFanins );
- nFanoutsMax = ABC_MAX( nFanoutsMax, nFanouts );
+ nFaninsMax = Abc_MaxInt( nFaninsMax, nFanins );
+ nFanoutsMax = Abc_MaxInt( nFanoutsMax, nFanouts );
}
// allocate storage for fanin/fanout numbers
- nSizeMax = ABC_MAX( 10 * (Gia_Base10Log(nFaninsMax) + 1), 10 * (Gia_Base10Log(nFanoutsMax) + 1) );
+ nSizeMax = Abc_MaxInt( 10 * (Abc_Base10Log(nFaninsMax) + 1), 10 * (Abc_Base10Log(nFanoutsMax) + 1) );
vFanins = Vec_IntStart( nSizeMax );
vFanouts = Vec_IntStart( nSizeMax );
@@ -717,7 +717,7 @@ Gia_Man_t * Gia_ManDupCofInt( Gia_Man_t * p, int iVar )
return NULL;
}
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
Gia_ManFillValue( p );
Gia_ManConst0(p)->Value = 0;
@@ -728,7 +728,7 @@ Gia_Man_t * Gia_ManDupCofInt( Gia_Man_t * p, int iVar )
if ( pObj == pPivot )
{
iCofVar = pObj->Value;
- pObj->Value = Gia_Var2Lit( 0, 0 );
+ pObj->Value = Abc_Var2Lit( 0, 0 );
}
}
Gia_ManForEachAnd( p, pObj, i )
@@ -737,7 +737,7 @@ Gia_Man_t * Gia_ManDupCofInt( Gia_Man_t * p, int iVar )
if ( pObj == pPivot )
{
iCofVar = pObj->Value;
- pObj->Value = Gia_Var2Lit( 0, 0 );
+ pObj->Value = Abc_Var2Lit( 0, 0 );
}
}
Gia_ManForEachCo( p, pObj, i )
@@ -745,15 +745,15 @@ Gia_Man_t * Gia_ManDupCofInt( Gia_Man_t * p, int iVar )
// compute the positive cofactor
Gia_ManForEachCi( p, pObj, i )
{
- pObj->Value = Gia_Var2Lit( Gia_ObjId(pNew, Gia_ManCi(pNew, i)), 0 );
+ pObj->Value = Abc_Var2Lit( Gia_ObjId(pNew, Gia_ManCi(pNew, i)), 0 );
if ( pObj == pPivot )
- pObj->Value = Gia_Var2Lit( 0, 1 );
+ pObj->Value = Abc_Var2Lit( 0, 1 );
}
Gia_ManForEachAnd( p, pObj, i )
{
pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
if ( pObj == pPivot )
- pObj->Value = Gia_Var2Lit( 0, 1 );
+ pObj->Value = Abc_Var2Lit( 0, 1 );
}
// create MUXes
assert( iCofVar > 0 );
@@ -836,9 +836,9 @@ Vec_Int_t * Gia_ManTransfer( Gia_Man_t * pAig, Gia_Man_t * pCof, Gia_Man_t * pNe
Gia_ManForEachObjVec( vSigs, pAig, pObj, i )
{
assert( Gia_ObjIsCand(pObj) );
- pObjF = Gia_ManObj( pCof, Gia_Lit2Var(pObj->Value) );
+ pObjF = Gia_ManObj( pCof, Abc_Lit2Var(pObj->Value) );
if ( pObjF->Value && ~pObjF->Value )
- Vec_IntPushUnique( vSigsNew, Gia_Lit2Var(pObjF->Value) );
+ Vec_IntPushUnique( vSigsNew, Abc_Lit2Var(pObjF->Value) );
}
return vSigsNew;
}
diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c
index 258687fe..b3c04acb 100644
--- a/src/aig/gia/giaDup.c
+++ b/src/aig/gia/giaDup.c
@@ -55,14 +55,14 @@ void Gia_ManDupRemapEquiv( Gia_Man_t * pNew, Gia_Man_t * p )
Gia_ObjSetRepr( pNew, i, GIA_VOID );
// iterate over constant candidates
Gia_ManForEachConst( p, i )
- Gia_ObjSetRepr( pNew, Gia_Lit2Var(Gia_ManObj(p, i)->Value), 0 );
+ Gia_ObjSetRepr( pNew, Abc_Lit2Var(Gia_ManObj(p, i)->Value), 0 );
// iterate over class candidates
vClass = Vec_IntAlloc( 100 );
Gia_ManForEachClass( p, i )
{
Vec_IntClear( vClass );
Gia_ClassForEachObj( p, i, k )
- Vec_IntPushUnique( vClass, Gia_Lit2Var(Gia_ManObj(p, k)->Value) );
+ Vec_IntPushUnique( vClass, Abc_Lit2Var(Gia_ManObj(p, k)->Value) );
assert( Vec_IntSize( vClass ) > 1 );
Vec_IntSort( vClass, 0 );
iRepr = iPrev = Vec_IntEntry( vClass, 0 );
@@ -173,7 +173,7 @@ Gia_Man_t * Gia_ManDupOrderDfs( Gia_Man_t * p )
int i;
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCo( p, pObj, i )
Gia_ManDupOrderDfs_rec( pNew, p, pObj );
@@ -205,7 +205,7 @@ Gia_Man_t * Gia_ManDupOutputGroup( Gia_Man_t * p, int iOutStart, int iOutStop )
int i;
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
for ( i = iOutStart; i < iOutStop; i++ )
{
@@ -240,8 +240,8 @@ void Gia_ManDupOrderDfsChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t *
pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
if ( pNext )
{
- pNew->pNexts[Gia_Lit2Var(pObj->Value)] = Gia_Lit2Var( Gia_Lit2Var(pNext->Value) );
- assert( Gia_Lit2Var(pObj->Value) > Gia_Lit2Var(pNext->Value) );
+ pNew->pNexts[Abc_Lit2Var(pObj->Value)] = Abc_Lit2Var( Abc_Lit2Var(pNext->Value) );
+ assert( Abc_Lit2Var(pObj->Value) > Abc_Lit2Var(pNext->Value) );
}
}
@@ -264,7 +264,7 @@ Gia_Man_t * Gia_ManDupOrderDfsChoices( Gia_Man_t * p )
assert( p->pReprs && p->pNexts );
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pNexts = ABC_CALLOC( int, Gia_ManObjNum(p) );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
@@ -297,7 +297,7 @@ Gia_Man_t * Gia_ManDupOrderDfsReverse( Gia_Man_t * p )
int i;
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCoReverse( p, pObj, i )
Gia_ManDupOrderDfs_rec( pNew, p, pObj );
@@ -329,7 +329,7 @@ Gia_Man_t * Gia_ManDupOrderAiger( Gia_Man_t * p )
Gia_Obj_t * pObj;
int i;
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
pObj->Value = Gia_ManAppendCi(pNew);
@@ -361,7 +361,7 @@ Gia_Man_t * Gia_ManDupFlip( Gia_Man_t * p, int * pInitState )
Gia_Obj_t * pObj;
int i;
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachObj1( p, pObj, i )
{
@@ -371,13 +371,13 @@ Gia_Man_t * Gia_ManDupFlip( Gia_Man_t * p, int * pInitState )
{
pObj->Value = Gia_ManAppendCi( pNew );
if ( Gia_ObjCioId(pObj) >= Gia_ManPiNum(p) )
- pObj->Value = Gia_LitNotCond( pObj->Value, Gia_InfoHasBit((unsigned *)pInitState, Gia_ObjCioId(pObj) - Gia_ManPiNum(p)) );
+ pObj->Value = Abc_LitNotCond( pObj->Value, Abc_InfoHasBit((unsigned *)pInitState, Gia_ObjCioId(pObj) - Gia_ManPiNum(p)) );
}
else if ( Gia_ObjIsCo(pObj) )
{
pObj->Value = Gia_ObjFanin0Copy(pObj);
if ( Gia_ObjCioId(pObj) >= Gia_ManPoNum(p) )
- pObj->Value = Gia_LitNotCond( pObj->Value, Gia_InfoHasBit((unsigned *)pInitState, Gia_ObjCioId(pObj) - Gia_ManPoNum(p)) );
+ pObj->Value = Abc_LitNotCond( pObj->Value, Abc_InfoHasBit((unsigned *)pInitState, Gia_ObjCioId(pObj) - Gia_ManPoNum(p)) );
pObj->Value = Gia_ManAppendCo( pNew, pObj->Value );
}
}
@@ -403,7 +403,7 @@ Gia_Man_t * Gia_ManDup( Gia_Man_t * p )
Gia_Obj_t * pObj;
int i;
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachObj1( p, pObj, i )
{
@@ -437,7 +437,7 @@ Gia_Man_t * Gia_ManDupSelf( Gia_Man_t * p )
Gia_Obj_t * pObj;
int i, iCtrl;
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
Gia_ManFillValue( p );
Gia_ManConst0(p)->Value = 0;
@@ -477,7 +477,7 @@ Gia_Man_t * Gia_ManDupFlopClass( Gia_Man_t * p, int iClass )
int i, Counter1 = 0, Counter2 = 0;
assert( p->vFlopClasses != NULL );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManFillValue( p );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachPi( p, pObj, i )
@@ -522,7 +522,7 @@ Gia_Man_t * Gia_ManDupMarked( Gia_Man_t * p )
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
pNew->nConstrs = p->nConstrs;
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachObj1( p, pObj, i )
{
@@ -561,8 +561,8 @@ Gia_Man_t * Gia_ManDupMarked( Gia_Man_t * p )
// assert( ~pRepr->Value );
if ( !~pRepr->Value )
continue;
- if ( Gia_Lit2Var(pObj->Value) != Gia_Lit2Var(pRepr->Value) )
- Gia_ObjSetRepr( pNew, Gia_Lit2Var(pObj->Value), Gia_Lit2Var(pRepr->Value) );
+ if ( Abc_Lit2Var(pObj->Value) != Abc_Lit2Var(pRepr->Value) )
+ Gia_ObjSetRepr( pNew, Abc_Lit2Var(pObj->Value), Abc_Lit2Var(pRepr->Value) );
}
pNew->pNexts = Gia_ManDeriveNexts( pNew );
}
@@ -588,7 +588,7 @@ Gia_Man_t * Gia_ManDupTimes( Gia_Man_t * p, int nTimes )
int i, t, Entry;
assert( nTimes > 0 );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
vPis = Vec_IntAlloc( Gia_ManPiNum(p) * nTimes );
vPos = Vec_IntAlloc( Gia_ManPoNum(p) * nTimes );
@@ -604,17 +604,17 @@ Gia_Man_t * Gia_ManDupTimes( Gia_Man_t * p, int nTimes )
{
pObj->Value = Gia_ManAppendCi( pNew );
if ( Gia_ObjIsPi(p, pObj) )
- Vec_IntPush( vPis, Gia_Lit2Var(pObj->Value) );
+ Vec_IntPush( vPis, Abc_Lit2Var(pObj->Value) );
else
- Vec_IntPush( vRos, Gia_Lit2Var(pObj->Value) );
+ Vec_IntPush( vRos, Abc_Lit2Var(pObj->Value) );
}
else if ( Gia_ObjIsCo(pObj) )
{
pObj->Value = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
if ( Gia_ObjIsPo(p, pObj) )
- Vec_IntPush( vPos, Gia_Lit2Var(pObj->Value) );
+ Vec_IntPush( vPos, Abc_Lit2Var(pObj->Value) );
else
- Vec_IntPush( vRis, Gia_Lit2Var(pObj->Value) );
+ Vec_IntPush( vRis, Abc_Lit2Var(pObj->Value) );
}
}
}
@@ -667,7 +667,7 @@ int Gia_ManDupDfs2_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj )
{
Gia_Obj_t * pRepr = Gia_ManObj( p, p->pReprsOld[Gia_ObjId(p, pObj)] );
pRepr->Value = Gia_ManDupDfs2_rec( pNew, p, pRepr );
- return pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+ return pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
}
if ( Gia_ObjIsCi(pObj) )
return pObj->Value = Gia_ManAppendCi(pNew);
@@ -698,7 +698,7 @@ Gia_Man_t * Gia_ManDupDfs2( Gia_Man_t * p )
int i;
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCo( p, pObj, i )
Gia_ManDupDfs2_rec( pNew, p, pObj );
@@ -756,7 +756,7 @@ Gia_Man_t * Gia_ManDupDfs( Gia_Man_t * p )
Gia_Obj_t * pObj;
int i;
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManFillValue( p );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
@@ -789,7 +789,7 @@ Gia_Man_t * Gia_ManDupDfsSkip( Gia_Man_t * p )
int i;
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
pObj->Value = Gia_ManAppendCi(pNew);
@@ -819,7 +819,7 @@ Gia_Man_t * Gia_ManDupDfsCone( Gia_Man_t * p, Gia_Obj_t * pRoot )
assert( Gia_ObjIsCo(pRoot) );
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
pObj->Value = Gia_ManAppendCi(pNew);
@@ -847,14 +847,14 @@ Gia_Man_t * Gia_ManDupDfsLitArray( Gia_Man_t * p, Vec_Int_t * vLits )
int i, iLit, iLitRes;
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
pObj->Value = Gia_ManAppendCi(pNew);
Vec_IntForEachEntry( vLits, iLit, i )
{
- iLitRes = Gia_ManDupDfs2_rec( pNew, p, Gia_ManObj(p, Gia_Lit2Var(iLit)) );
- Gia_ManAppendCo( pNew, Gia_LitNotCond( iLitRes, Gia_LitIsCompl(iLit)) );
+ iLitRes = Gia_ManDupDfs2_rec( pNew, p, Gia_ManObj(p, Abc_Lit2Var(iLit)) );
+ Gia_ManAppendCo( pNew, Abc_LitNotCond( iLitRes, Abc_LitIsCompl(iLit)) );
}
Gia_ManSetRegNum( pNew, 0 );
return pNew;
@@ -877,7 +877,7 @@ Gia_Man_t * Gia_ManDupNormalized( Gia_Man_t * p )
Gia_Obj_t * pObj;
int i;
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
pObj->Value = Gia_ManAppendCi(pNew);
@@ -908,7 +908,7 @@ Gia_Man_t * Gia_ManDupTrimmed( Gia_Man_t * p, int fTrimCis, int fTrimCos )
int i;
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManSetRefs( p );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
@@ -943,7 +943,7 @@ Gia_Man_t * Gia_ManDupOntop( Gia_Man_t * p, Gia_Man_t * p2 )
assert( Gia_ManRegNum(p) == 0 );
assert( Gia_ManRegNum(p2) == 0 );
pNew = Gia_ManStart( Gia_ManObjNum(p)+Gia_ManObjNum(p2) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
// dup first AIG
Gia_ManConst0(p)->Value = 0;
@@ -1005,13 +1005,13 @@ Gia_Man_t * Gia_ManDupDfsCiMap( Gia_Man_t * p, int * pCi2Lit, Vec_Int_t * vLits
int i;
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
{
pObj->Value = Gia_ManAppendCi(pNew);
if ( ~pCi2Lit[i] )
- pObj->Value = Gia_LitNotCond( Gia_ManObj(p, Gia_Lit2Var(pCi2Lit[i]))->Value, Gia_LitIsCompl(pCi2Lit[i]) );
+ pObj->Value = Abc_LitNotCond( Gia_ManObj(p, Abc_Lit2Var(pCi2Lit[i]))->Value, Abc_LitIsCompl(pCi2Lit[i]) );
}
Gia_ManHashAlloc( pNew );
if ( vLits )
@@ -1019,8 +1019,8 @@ Gia_Man_t * Gia_ManDupDfsCiMap( Gia_Man_t * p, int * pCi2Lit, Vec_Int_t * vLits
int iLit, iLitRes;
Vec_IntForEachEntry( vLits, iLit, i )
{
- iLitRes = Gia_ManDupDfs2_rec( pNew, p, Gia_ManObj(p, Gia_Lit2Var(iLit)) );
- Gia_ManAppendCo( pNew, Gia_LitNotCond( iLitRes, Gia_LitIsCompl(iLit)) );
+ iLitRes = Gia_ManDupDfs2_rec( pNew, p, Gia_ManObj(p, Abc_Lit2Var(iLit)) );
+ Gia_ManAppendCo( pNew, Abc_LitNotCond( iLitRes, Abc_LitIsCompl(iLit)) );
}
}
else
@@ -1055,7 +1055,7 @@ Gia_Man_t * Gia_ManDupDfsClasses( Gia_Man_t * p )
assert( p->pReprsOld != NULL );
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
pObj->Value = Gia_ManAppendCi(pNew);
@@ -1112,7 +1112,7 @@ Gia_Man_t * Gia_ManDupTopAnd_iter( Gia_Man_t * p, int fVerbose )
{
if ( Gia_ObjIsCi(pObj) )
{
- Vec_IntPush( vLeaves, Gia_Var2Lit( Gia_ObjId(p, pObj), 0 ) );
+ Vec_IntPush( vLeaves, Abc_Var2Lit( Gia_ObjId(p, pObj), 0 ) );
continue;
}
assert( Gia_ObjIsAnd(pObj) );
@@ -1132,16 +1132,16 @@ Gia_Man_t * Gia_ManDupTopAnd_iter( Gia_Man_t * p, int fVerbose )
pVar2Val = ABC_FALLOC( char, Gia_ManObjNum(p) );
Vec_IntForEachEntry( vLeaves, iLit, i )
{
- iObjId = Gia_Lit2Var(iLit);
+ iObjId = Abc_Lit2Var(iLit);
pObj = Gia_ManObj(p, iObjId);
if ( Gia_ObjIsCi(pObj) )
{
- pCi2Lit[Gia_ObjCioId(pObj)] = !Gia_LitIsCompl(iLit);
+ pCi2Lit[Gia_ObjCioId(pObj)] = !Abc_LitIsCompl(iLit);
nCiLits++;
}
if ( pVar2Val[iObjId] != 0 && pVar2Val[iObjId] != 1 )
- pVar2Val[iObjId] = Gia_LitIsCompl(iLit);
- else if ( pVar2Val[iObjId] != Gia_LitIsCompl(iLit) )
+ pVar2Val[iObjId] = Abc_LitIsCompl(iLit);
+ else if ( pVar2Val[iObjId] != Abc_LitIsCompl(iLit) )
break;
}
if ( i < Vec_IntSize(vLeaves) )
@@ -1156,7 +1156,7 @@ Gia_Man_t * Gia_ManDupTopAnd_iter( Gia_Man_t * p, int fVerbose )
Vec_IntClear( vLeaves );
Gia_ManForEachObj( p, pObj, i )
if ( !Gia_ObjIsCi(pObj) && (pVar2Val[i] == 0 || pVar2Val[i] == 1) )
- Vec_IntPush( vLeaves, Gia_Var2Lit(i, pVar2Val[i]) );
+ Vec_IntPush( vLeaves, Abc_Var2Lit(i, pVar2Val[i]) );
if ( fVerbose )
printf( "Detected %6d AND leaves and %6d CI leaves.\n", Vec_IntSize(vLeaves), nCiLits );
// create the input map
@@ -1272,7 +1272,7 @@ Gia_Man_t * Gia_ManMiter( Gia_Man_t * p0, Gia_Man_t * p1, int fDualOut, int fSeq
}
// start the manager
pNew = Gia_ManStart( Gia_ManObjNum(p0) + Gia_ManObjNum(p1) );
- pNew->pName = Gia_UtilStrsav( "miter" );
+ pNew->pName = Abc_UtilStrsav( "miter" );
// map combinational inputs
Gia_ManFillValue( p0 );
Gia_ManFillValue( p1 );
@@ -1372,7 +1372,7 @@ Gia_Man_t * Gia_ManTransformMiter( Gia_Man_t * p )
int i, iLit;
assert( (Gia_ManPoNum(p) & 1) == 0 );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManHashAlloc( pNew );
Gia_ManForEachCi( p, pObj, i )
@@ -1444,7 +1444,7 @@ Gia_Man_t * Gia_ManChoiceMiter( Vec_Ptr_t * vGias )
}
// start the new manager
pNew = Gia_ManStart( Vec_PtrSize(vGias) * Gia_ManObjNum(pGia0) );
- pNew->pName = Gia_UtilStrsav( pGia0->pName );
+ pNew->pName = Abc_UtilStrsav( pGia0->pName );
// create new CIs and assign them to the old manager CIs
for ( k = 0; k < Gia_ManCiNum(pGia0); k++ )
{
@@ -1485,7 +1485,7 @@ Gia_Man_t * Gia_ManDupWithConstraints( Gia_Man_t * p, Vec_Int_t * vPoTypes )
Gia_Obj_t * pObj;
int i, nConstr = 0;
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
pObj->Value = Gia_ManAppendCi(pNew);
@@ -1546,7 +1546,7 @@ Gia_Man_t * Gia_ManDupAbsFlops( Gia_Man_t * p, Vec_Int_t * vFlopClasses )
Gia_ManFillValue( p );
// start the new manager
pNew = Gia_ManStart( 5000 );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
// create PIs
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachPi( p, pObj, i )
@@ -1647,7 +1647,7 @@ Gia_Man_t * Gia_ManDupAbsGates( Gia_Man_t * p, Vec_Int_t * vGateClasses )
// start the new manager
pNew = Gia_ManStart( 5000 );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
// create constant
Gia_ManFillValue( p );
Gia_ManConst0(p)->Value = 0;
@@ -1681,7 +1681,7 @@ Gia_Man_t * Gia_ManDupAbsGates( Gia_Man_t * p, Vec_Int_t * vGateClasses )
{
if ( !~pObj->Value )
continue;
- assert( !Gia_LitIsCompl(pObj->Value) );
+ assert( !Abc_LitIsCompl(pObj->Value) );
pCopy = Gia_ObjCopy( pTemp, pObj );
if ( !~pCopy->Value )
{
@@ -1689,7 +1689,7 @@ Gia_Man_t * Gia_ManDupAbsGates( Gia_Man_t * p, Vec_Int_t * vGateClasses )
pObj->Value = ~0;
continue;
}
- assert( !Gia_LitIsCompl(pCopy->Value) );
+ assert( !Abc_LitIsCompl(pCopy->Value) );
pObj->Value = pCopy->Value;
}
}
diff --git a/src/aig/gia/giaEmbed.c b/src/aig/gia/giaEmbed.c
index 5c7092a3..1daf52a1 100644
--- a/src/aig/gia/giaEmbed.c
+++ b/src/aig/gia/giaEmbed.c
@@ -20,7 +20,7 @@
#include <math.h>
#include "gia.h"
-#include "ioa.h"
+#include "src/aig/ioa/ioa.h"
ABC_NAMESPACE_IMPL_START
@@ -690,12 +690,12 @@ void Emb_ManPrintFanio( Emb_Man_t * p )
nFanouts = Emb_ObjFanoutNum(pNode);
nFaninsAll += nFanins;
nFanoutsAll += nFanouts;
- nFaninsMax = ABC_MAX( nFaninsMax, nFanins );
- nFanoutsMax = ABC_MAX( nFanoutsMax, nFanouts );
+ nFaninsMax = Abc_MaxInt( nFaninsMax, nFanins );
+ nFanoutsMax = Abc_MaxInt( nFanoutsMax, nFanouts );
}
// allocate storage for fanin/fanout numbers
- nSizeMax = ABC_MAX( 10 * (Gia_Base10Log(nFaninsMax) + 1), 10 * (Gia_Base10Log(nFanoutsMax) + 1) );
+ nSizeMax = Abc_MaxInt( 10 * (Abc_Base10Log(nFaninsMax) + 1), 10 * (Abc_Base10Log(nFanoutsMax) + 1) );
vFanins = Vec_IntStart( nSizeMax );
vFanouts = Vec_IntStart( nSizeMax );
@@ -1436,8 +1436,8 @@ void Emb_ManDerivePlacement( Emb_Man_t * p, int nSols )
pY0 = Emb_ManSol( p, 0 );
for ( k = 0; k < p->nObjs; k++ )
{
- Min0 = ABC_MIN( Min0, pY0[k] );
- Max0 = ABC_MAX( Max0, pY0[k] );
+ Min0 = Abc_MinInt( Min0, pY0[k] );
+ Max0 = Abc_MaxInt( Max0, pY0[k] );
}
Str0 = 1.0*GIA_PLACE_SIZE/(Max0 - Min0);
// update the coordinates
@@ -1450,8 +1450,8 @@ void Emb_ManDerivePlacement( Emb_Man_t * p, int nSols )
pY1 = Emb_ManSol( p, 1 );
for ( k = 0; k < p->nObjs; k++ )
{
- Min1 = ABC_MIN( Min1, pY1[k] );
- Max1 = ABC_MAX( Max1, pY1[k] );
+ Min1 = Abc_MinInt( Min1, pY1[k] );
+ Max1 = Abc_MaxInt( Max1, pY1[k] );
}
Str1 = 1.0*GIA_PLACE_SIZE/(Max1 - Min1);
// update the coordinates
@@ -1498,10 +1498,10 @@ double Emb_ManComputeHPWL( Emb_Man_t * p )
iMinY = iMaxY = p->pPlacement[2*pThis->Value+1];
Emb_ObjForEachFanout( pThis, pNext, k )
{
- iMinX = ABC_MIN( iMinX, p->pPlacement[2*pNext->Value+0] );
- iMaxX = ABC_MAX( iMaxX, p->pPlacement[2*pNext->Value+0] );
- iMinY = ABC_MIN( iMinY, p->pPlacement[2*pNext->Value+1] );
- iMaxY = ABC_MAX( iMaxY, p->pPlacement[2*pNext->Value+1] );
+ iMinX = Abc_MinInt( iMinX, p->pPlacement[2*pNext->Value+0] );
+ iMaxX = Abc_MaxInt( iMaxX, p->pPlacement[2*pNext->Value+0] );
+ iMinY = Abc_MinInt( iMinY, p->pPlacement[2*pNext->Value+1] );
+ iMaxY = Abc_MaxInt( iMaxY, p->pPlacement[2*pNext->Value+1] );
}
Result += (iMaxX - iMinX) + (iMaxY - iMinY);
}
@@ -1548,10 +1548,10 @@ void Emb_ManPlacementRefine( Emb_Man_t * p, int nIters, int fVerbose )
iMinY = iMaxY = p->pPlacement[2*pThis->Value+1];
Emb_ObjForEachFanout( pThis, pNext, k )
{
- iMinX = ABC_MIN( iMinX, p->pPlacement[2*pNext->Value+0] );
- iMaxX = ABC_MAX( iMaxX, p->pPlacement[2*pNext->Value+0] );
- iMinY = ABC_MIN( iMinY, p->pPlacement[2*pNext->Value+1] );
- iMaxY = ABC_MAX( iMaxY, p->pPlacement[2*pNext->Value+1] );
+ iMinX = Abc_MinInt( iMinX, p->pPlacement[2*pNext->Value+0] );
+ iMaxX = Abc_MaxInt( iMaxX, p->pPlacement[2*pNext->Value+0] );
+ iMinY = Abc_MinInt( iMinY, p->pPlacement[2*pNext->Value+1] );
+ iMaxY = Abc_MaxInt( iMaxY, p->pPlacement[2*pNext->Value+1] );
}
pEdgeX[pThis->Value] = 0.5 * (iMaxX + iMinX);
pEdgeY[pThis->Value] = 0.5 * (iMaxY + iMinY);
diff --git a/src/aig/gia/giaEnable.c b/src/aig/gia/giaEnable.c
index 37f0c94f..d23c0c3d 100644
--- a/src/aig/gia/giaEnable.c
+++ b/src/aig/gia/giaEnable.c
@@ -338,9 +338,9 @@ Vec_Int_t * Gia_ManTransferFrames( Gia_Man_t * pAig, Gia_Man_t * pFrames, int nF
assert( Gia_ObjIsCand(pObj) );
for ( f = 0; f < nFrames; f++ )
{
- pObjF = Gia_ManObj( pFrames, Gia_Lit2Var(Gia_ObjCopyF( pAig, f, pObj )) );
+ pObjF = Gia_ManObj( pFrames, Abc_Lit2Var(Gia_ObjCopyF( pAig, f, pObj )) );
if ( pObjF->Value && ~pObjF->Value )
- Vec_IntPushUnique( vSigsNew, Gia_Lit2Var(pObjF->Value) );
+ Vec_IntPushUnique( vSigsNew, Abc_Lit2Var(pObjF->Value) );
}
}
return vSigsNew;
@@ -365,7 +365,7 @@ Gia_Man_t * Gia_ManUnrollInit( Gia_Man_t * p, int nFrames )
ABC_FREE( p->pCopies );
p->pCopies = ABC_FALLOC( int, nFrames * Gia_ManObjNum(p) );
pNew = Gia_ManStart( nFrames * Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
Gia_ManForEachRo( p, pObj, i )
Gia_ObjSetCopyF( p, 0, pObj, 0 );
@@ -440,7 +440,7 @@ Gia_Man_t * Gia_ManRemoveEnables2( Gia_Man_t * p )
Gia_Obj_t * pThis, * pNode;
int i;
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
Gia_ManFillValue( p );
Gia_ManConst0(p)->Value = 0;
@@ -481,13 +481,13 @@ Gia_Man_t * Gia_ManRemoveEnables2( Gia_Man_t * p )
{
// printf( "FlopIn compl = %d. FlopOut is d0. Complement = %d.\n",
// Gia_ObjFaninC0(pFlopIn), Gia_IsComplement(pObj0) );
- pFlopIn->Value = Gia_LitNotCond(Gia_Regular(pObj1)->Value, !Gia_IsComplement(pObj1));
+ pFlopIn->Value = Abc_LitNotCond(Gia_Regular(pObj1)->Value, !Gia_IsComplement(pObj1));
}
else if ( Gia_Regular(pObj1) == pFlopOut )
{
// printf( "FlopIn compl = %d. FlopOut is d1. Complement = %d.\n",
// Gia_ObjFaninC0(pFlopIn), Gia_IsComplement(pObj1) );
- pFlopIn->Value = Gia_LitNotCond(Gia_Regular(pObj0)->Value, !Gia_IsComplement(pObj0));
+ pFlopIn->Value = Abc_LitNotCond(Gia_Regular(pObj0)->Value, !Gia_IsComplement(pObj0));
}
}
Gia_ManForEachCo( p, pThis, i )
@@ -610,7 +610,7 @@ Gia_Man_t * Gia_ManRemoveEnables( Gia_Man_t * p )
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachObj1( p, pObj, i )
{
@@ -627,7 +627,7 @@ Gia_Man_t * Gia_ManRemoveEnables( Gia_Man_t * p )
if ( pData == NULL )
pObj->Value = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
else
- pObj->Value = Gia_ManAppendCo( pNew, Gia_LitNotCond(Gia_Regular(pData)->Value, Gia_IsComplement(pData)) );
+ pObj->Value = Gia_ManAppendCo( pNew, Abc_LitNotCond(Gia_Regular(pData)->Value, Gia_IsComplement(pData)) );
}
Gia_ManSetRegNum( pNew, Gia_ManRegNum(p) );
Vec_PtrFree( vDatas );
diff --git a/src/aig/gia/giaEquiv.c b/src/aig/gia/giaEquiv.c
index c93da86e..43724871 100644
--- a/src/aig/gia/giaEquiv.c
+++ b/src/aig/gia/giaEquiv.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "gia.h"
-#include "cec.h"
+#include "src/proof/cec/cec.h"
ABC_NAMESPACE_IMPL_START
@@ -417,7 +417,7 @@ void Gia_ManEquivReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj,
if ( (pRepr = Gia_ManEquivRepr(p, pObj, fUseAll, fDualOut)) )
{
Gia_ManEquivReduce_rec( pNew, p, pRepr, fUseAll, fDualOut );
- pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+ pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
return;
}
if ( ~pObj->Value )
@@ -474,7 +474,7 @@ Gia_Man_t * Gia_ManEquivReduce( Gia_Man_t * p, int fUseAll, int fDualOut, int fV
if ( fDualOut )
Gia_ManEquivSetColors( p, fVerbose );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManFillValue( p );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
@@ -536,7 +536,7 @@ void Gia_ManEquivUpdatePointers( Gia_Man_t * p, Gia_Man_t * pNew )
{
if ( !~pObj->Value )
continue;
- pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(pObj->Value) );
+ pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(pObj->Value) );
if ( pObjNew->fMark0 )
pObj->Value = ~0;
}
@@ -568,10 +568,10 @@ void Gia_ManEquivDeriveReprs( Gia_Man_t * p, Gia_Man_t * pNew, Gia_Man_t * pFina
pObj = Gia_ManObj( p, i );
if ( !~pObj->Value )
continue;
- pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(pObj->Value) );
- if ( Gia_Lit2Var(pObjNew->Value) == 0 )
+ pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(pObj->Value) );
+ if ( Abc_Lit2Var(pObjNew->Value) == 0 )
continue;
- Gia_ObjSetRepr( pFinal, Gia_Lit2Var(pObjNew->Value), 0 );
+ Gia_ObjSetRepr( pFinal, Abc_Lit2Var(pObjNew->Value), 0 );
}
// iterate over class candidates
vClass = Vec_IntAlloc( 100 );
@@ -583,8 +583,8 @@ void Gia_ManEquivDeriveReprs( Gia_Man_t * p, Gia_Man_t * pNew, Gia_Man_t * pFina
pObj = Gia_ManObj( p, k );
if ( !~pObj->Value )
continue;
- pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(pObj->Value) );
- Vec_IntPushUnique( vClass, Gia_Lit2Var(pObjNew->Value) );
+ pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(pObj->Value) );
+ Vec_IntPushUnique( vClass, Abc_Lit2Var(pObjNew->Value) );
}
if ( Vec_IntSize( vClass ) < 2 )
continue;
@@ -624,14 +624,14 @@ Gia_Man_t * Gia_ManEquivRemapDfs( Gia_Man_t * p )
Gia_ObjSetRepr( pNew, i, GIA_VOID );
// iterate over constant candidates
Gia_ManForEachConst( p, i )
- Gia_ObjSetRepr( pNew, Gia_Lit2Var(Gia_ManObj(p, i)->Value), 0 );
+ Gia_ObjSetRepr( pNew, Abc_Lit2Var(Gia_ManObj(p, i)->Value), 0 );
// iterate over class candidates
vClass = Vec_IntAlloc( 100 );
Gia_ManForEachClass( p, i )
{
Vec_IntClear( vClass );
Gia_ClassForEachObj( p, i, k )
- Vec_IntPushUnique( vClass, Gia_Lit2Var(Gia_ManObj(p, k)->Value) );
+ Vec_IntPushUnique( vClass, Abc_Lit2Var(Gia_ManObj(p, k)->Value) );
assert( Vec_IntSize( vClass ) > 1 );
Vec_IntSort( vClass, 0 );
iRepr = iPrev = Vec_IntEntry( vClass, 0 );
@@ -758,7 +758,7 @@ static inline void Gia_ManSpecBuild( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t
// if ( fDualOut && !Gia_ObjDiffColors( p, Gia_ObjId(p, pObj), Gia_ObjId(p, pRepr) ) )
if ( fDualOut && !Gia_ObjDiffColors2( p, Gia_ObjId(p, pObj), Gia_ObjId(p, pRepr) ) )
return;
- iLitNew = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+ iLitNew = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
if ( pObj->Value != iLitNew && !Gia_ObjProved(p, Gia_ObjId(p,pObj)) )
{
if ( vTrace )
@@ -847,7 +847,7 @@ Gia_Man_t * Gia_ManSpecReduceTrace( Gia_Man_t * p, Vec_Int_t * vTrace )
Gia_ManSetPhase( p );
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
@@ -917,7 +917,7 @@ Gia_Man_t * Gia_ManSpecReduce( Gia_Man_t * p, int fDualOut, int fSynthesis, int
if ( fDualOut )
Gia_ManEquivSetColors( p, fVerbose );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
@@ -983,7 +983,7 @@ void Gia_ManSpecBuildInit( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, Ve
// if ( fDualOut && !Gia_ObjDiffColors( p, Gia_ObjId(p, pObj), Gia_ObjId(p, pRepr) ) )
if ( fDualOut && !Gia_ObjDiffColors2( p, Gia_ObjId(p, pObj), Gia_ObjId(p, pRepr) ) )
return;
- iLitNew = Gia_LitNotCond( Gia_ObjCopyF(p, f, pRepr), Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+ iLitNew = Abc_LitNotCond( Gia_ObjCopyF(p, f, pRepr), Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
if ( Gia_ObjCopyF(p, f, pObj) != iLitNew && !Gia_ObjProved(p, Gia_ObjId(p,pObj)) )
Vec_IntPush( vXorLits, Gia_ManHashXor(pNew, Gia_ObjCopyF(p, f, pObj), iLitNew) );
Gia_ObjSetCopyF( p, f, pObj, iLitNew );
@@ -1063,10 +1063,10 @@ Gia_Man_t * Gia_ManSpecReduceInit( Gia_Man_t * p, Abc_Cex_t * pInit, int nFrames
if ( fDualOut )
Gia_ManEquivSetColors( p, 0 );
pNew = Gia_ManStart( nFrames * Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
Gia_ManForEachRo( p, pObj, i )
- Gia_ObjSetCopyF( p, 0, pObj, Gia_InfoHasBit(pInit->pData, i) );
+ Gia_ObjSetCopyF( p, 0, pObj, Abc_InfoHasBit(pInit->pData, i) );
for ( f = 0; f < nFrames; f++ )
{
Gia_ObjSetCopyF( p, f, Gia_ManConst0(p), 0 );
@@ -1463,7 +1463,7 @@ void Gia_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
{
if ( Gia_ObjIsConst0(pRepr) )
{
- pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+ pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
return;
}
Gia_ManEquivToChoices_rec( pNew, p, pRepr );
@@ -1471,22 +1471,22 @@ void Gia_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
Gia_ManEquivToChoices_rec( pNew, p, Gia_ObjFanin0(pObj) );
Gia_ManEquivToChoices_rec( pNew, p, Gia_ObjFanin1(pObj) );
pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
- if ( Gia_LitRegular(pObj->Value) == Gia_LitRegular(pRepr->Value) )
+ if ( Abc_LitRegular(pObj->Value) == Abc_LitRegular(pRepr->Value) )
{
- assert( (int)pObj->Value == Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) ) );
+ assert( (int)pObj->Value == Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) ) );
return;
}
if ( pRepr->Value > pObj->Value ) // should never happen with high resource limit
return;
assert( pRepr->Value < pObj->Value );
- pReprNew = Gia_ManObj( pNew, Gia_Lit2Var(pRepr->Value) );
- pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(pObj->Value) );
+ pReprNew = Gia_ManObj( pNew, Abc_Lit2Var(pRepr->Value) );
+ pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(pObj->Value) );
if ( Gia_ObjReprObj( pNew, Gia_ObjId(pNew, pObjNew) ) )
{
// assert( Gia_ObjReprObj( pNew, Gia_ObjId(pNew, pObjNew) ) == pReprNew );
if ( Gia_ObjReprObj( pNew, Gia_ObjId(pNew, pObjNew) ) != pReprNew )
return;
- pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+ pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
return;
}
if ( !Gia_ObjCheckTfi( pNew, pReprNew, pObjNew ) )
@@ -1495,7 +1495,7 @@ void Gia_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
Gia_ObjSetRepr( pNew, Gia_ObjId(pNew, pObjNew), Gia_ObjId(pNew, pReprNew) );
Gia_ManAddNextEntry_rec( pNew, pReprNew, pObjNew );
}
- pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+ pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
return;
}
assert( Gia_ObjIsAnd(pObj) );
@@ -1573,7 +1573,7 @@ Gia_Man_t * Gia_ManEquivToChoices( Gia_Man_t * p, int nSnapshots )
assert( (Gia_ManCoNum(p) % nSnapshots) == 0 );
Gia_ManSetPhase( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pReprs = ABC_CALLOC( Gia_Rpr_t, Gia_ManObjNum(p) );
pNew->pNexts = ABC_CALLOC( int, Gia_ManObjNum(p) );
for ( i = 0; i < Gia_ManObjNum(p); i++ )
@@ -1654,9 +1654,9 @@ int Gia_ManCountChoices( Gia_Man_t * p )
ABC_NAMESPACE_IMPL_END
-#include "aig.h"
-#include "saig.h"
-#include "cec.h"
+#include "src/aig/aig/aig.h"
+#include "src/aig/saig/saig.h"
+#include "src/proof/cec/cec.h"
#include "giaAig.h"
ABC_NAMESPACE_IMPL_START
@@ -1826,7 +1826,7 @@ int Gia_ManFilterEquivsForSpeculation( Gia_Man_t * pGia, char * pName1, char * p
{
if ( pObj1->Value == ~0 )
continue;
- pObjM = Gia_ManObj( pMiter, Gia_Lit2Var(pObj1->Value) );
+ pObjM = Gia_ManObj( pMiter, Abc_Lit2Var(pObj1->Value) );
pObj = Gia_ManObj( pGia, Gia_ObjId(pMiter, pObjM) );
pObj->fMark0 = 1;
}
@@ -1835,7 +1835,7 @@ int Gia_ManFilterEquivsForSpeculation( Gia_Man_t * pGia, char * pName1, char * p
{
if ( pObj2->Value == ~0 )
continue;
- pObjM = Gia_ManObj( pMiter, Gia_Lit2Var(pObj2->Value) );
+ pObjM = Gia_ManObj( pMiter, Abc_Lit2Var(pObj2->Value) );
pObj = Gia_ManObj( pGia, Gia_ObjId(pMiter, pObjM) );
pObj->fMark1 = 1;
}
@@ -1965,7 +1965,7 @@ int Gia_ManFilterEquivsUsingParts( Gia_Man_t * pGia, char * pName1, char * pName
{
if ( pObj1->Value == ~0 )
continue;
- pObjM = Gia_ManObj( pMiter, Gia_Lit2Var(pObj1->Value) );
+ pObjM = Gia_ManObj( pMiter, Abc_Lit2Var(pObj1->Value) );
pObj = Gia_ManObj( pGia, Gia_ObjId(pMiter, pObjM) );
pObj->fMark0 = 1;
}
@@ -1974,7 +1974,7 @@ int Gia_ManFilterEquivsUsingParts( Gia_Man_t * pGia, char * pName1, char * pName
{
if ( pObj2->Value == ~0 )
continue;
- pObjM = Gia_ManObj( pMiter, Gia_Lit2Var(pObj2->Value) );
+ pObjM = Gia_ManObj( pMiter, Abc_Lit2Var(pObj2->Value) );
pObj = Gia_ManObj( pGia, Gia_ObjId(pMiter, pObjM) );
pObj->fMark1 = 1;
}
diff --git a/src/aig/gia/giaEra.c b/src/aig/gia/giaEra.c
index ec3e1b1b..672149bc 100644
--- a/src/aig/gia/giaEra.c
+++ b/src/aig/gia/giaEra.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "gia.h"
-#include "mem.h"
+#include "src/misc/mem/mem.h"
ABC_NAMESPACE_IMPL_START
@@ -45,7 +45,7 @@ struct Gia_ManEra_t_
{
Gia_Man_t * pAig; // user's AIG manager
int nWordsSim; // 2^(PInum)
- int nWordsDat; // Gia_BitWordNum
+ int nWordsDat; // Abc_BitWordNum
unsigned * pDataSim; // simulation data
Mem_Fixed_t * pMemory; // memory manager
Vec_Ptr_t * vStates; // reached states
@@ -83,12 +83,12 @@ Gia_ManEra_t * Gia_ManEraCreate( Gia_Man_t * pAig )
int i;
p = ABC_CALLOC( Gia_ManEra_t, 1 );
p->pAig = pAig;
- p->nWordsSim = Gia_TruthWordNum( Gia_ManPiNum(pAig) );
- p->nWordsDat = Gia_BitWordNum( Gia_ManRegNum(pAig) );
+ p->nWordsSim = Abc_TruthWordNum( Gia_ManPiNum(pAig) );
+ p->nWordsDat = Abc_BitWordNum( Gia_ManRegNum(pAig) );
p->pDataSim = ABC_ALLOC( unsigned, p->nWordsSim*Gia_ManObjNum(pAig) );
p->pMemory = Mem_FixedStart( sizeof(Gia_ObjEra_t) + sizeof(unsigned) * p->nWordsDat );
p->vStates = Vec_PtrAlloc( 100000 );
- p->nBins = Gia_PrimeCudd( 100000 );
+ p->nBins = Abc_PrimeCudd( 100000 );
p->pBins = ABC_CALLOC( unsigned, p->nBins );
Vec_PtrPush( p->vStates, NULL );
// assign primary input values
@@ -226,7 +226,7 @@ void Gia_ManEraHashResize( Gia_ManEra_t * p )
// replace the table
pBinsOld = p->pBins;
nBinsOld = p->nBins;
- p->nBins = Gia_PrimeCudd( 3 * p->nBins );
+ p->nBins = Abc_PrimeCudd( 3 * p->nBins );
p->pBins = ABC_CALLOC( unsigned, p->nBins );
// rehash the entries from the old table
Counter = 0;
@@ -266,7 +266,7 @@ void Gia_ManInsertState( Gia_ManEra_t * p, Gia_ObjEra_t * pState )
Gia_ManForEachRo( p->pAig, pObj, i )
{
pSimInfo = Gia_ManEraData( p, Gia_ObjId(p->pAig, pObj) );
- if ( Gia_InfoHasBit(pState->pData, i) )
+ if ( Abc_InfoHasBit(pState->pData, i) )
memset( pSimInfo, 0xff, sizeof(unsigned) * p->nWordsSim );
else
memset( pSimInfo, 0, sizeof(unsigned) * p->nWordsSim );
@@ -465,8 +465,8 @@ int Gia_ManAnalyzeResult( Gia_ManEra_t * p, Gia_ObjEra_t * pState, int fMiter )
Gia_ManForEachRi( p->pAig, pObj, i )
{
pSimInfo = Gia_ManEraData( p, Gia_ObjId(p->pAig, pObj) );
- if ( Gia_InfoHasBit(p->pStateNew->pData, i) != Gia_InfoHasBit(pSimInfo, k) )
- Gia_InfoXorBit( p->pStateNew->pData, i );
+ if ( Abc_InfoHasBit(p->pStateNew->pData, i) != Abc_InfoHasBit(pSimInfo, k) )
+ Abc_InfoXorBit( p->pStateNew->pData, i );
}
piPlace = Gia_ManEraHashFind( p, p->pStateNew );
if ( piPlace == NULL )
diff --git a/src/aig/gia/giaEra2.c b/src/aig/gia/giaEra2.c
index b3e516eb..265335e2 100644
--- a/src/aig/gia/giaEra2.c
+++ b/src/aig/gia/giaEra2.c
@@ -136,11 +136,11 @@ static inline Gia_ObjAre_t * Gia_ObjNextObj0( Gia_ManAre_t * p, Gia_ObjAre_t *
static inline Gia_ObjAre_t * Gia_ObjNextObj1( Gia_ManAre_t * p, Gia_ObjAre_t * q ) { return Gia_ManAreObj( p, q->F[1] ); }
static inline Gia_ObjAre_t * Gia_ObjNextObj2( Gia_ManAre_t * p, Gia_ObjAre_t * q ) { return Gia_ManAreObj( p, q->F[2] ); }
-static inline int Gia_StaHasValue0( Gia_StaAre_t * p, int iReg ) { return Gia_InfoHasBit( p->pData, iReg << 1 ); }
-static inline int Gia_StaHasValue1( Gia_StaAre_t * p, int iReg ) { return Gia_InfoHasBit( p->pData, (iReg << 1) + 1 ); }
+static inline int Gia_StaHasValue0( Gia_StaAre_t * p, int iReg ) { return Abc_InfoHasBit( p->pData, iReg << 1 ); }
+static inline int Gia_StaHasValue1( Gia_StaAre_t * p, int iReg ) { return Abc_InfoHasBit( p->pData, (iReg << 1) + 1 ); }
-static inline void Gia_StaSetValue0( Gia_StaAre_t * p, int iReg ) { Gia_InfoSetBit( p->pData, iReg << 1 ); }
-static inline void Gia_StaSetValue1( Gia_StaAre_t * p, int iReg ) { Gia_InfoSetBit( p->pData, (iReg << 1) + 1 ); }
+static inline void Gia_StaSetValue0( Gia_StaAre_t * p, int iReg ) { Abc_InfoSetBit( p->pData, iReg << 1 ); }
+static inline void Gia_StaSetValue1( Gia_StaAre_t * p, int iReg ) { Abc_InfoSetBit( p->pData, (iReg << 1) + 1 ); }
static inline Gia_StaAre_t * Gia_StaPrev( Gia_ManAre_t * p, Gia_StaAre_t * pS ) { return Gia_ManAreSta(p, pS->iPrev); }
static inline Gia_StaAre_t * Gia_StaNext( Gia_ManAre_t * p, Gia_StaAre_t * pS ) { return Gia_ManAreSta(p, pS->iNext); }
@@ -198,7 +198,7 @@ void Gia_ManCountMintermsInCube( Gia_StaAre_t * pCube, int nVars, unsigned * pSt
for ( i = 0; i < nVars; i++ )
if ( m & (1 << i) )
Mint |= (1 << Dashes[i]);
- Gia_InfoSetBit( pStore, Mint );
+ Abc_InfoSetBit( pStore, Mint );
}
}
@@ -220,7 +220,7 @@ int Gia_ManCountMinterms( Gia_ManAre_t * p )
int i, nMemSize, Counter = 0;
if ( Gia_ManRegNum(p->pAig) > 30 )
return -1;
- nMemSize = Gia_BitWordNum( 1 << Gia_ManRegNum(p->pAig) );
+ nMemSize = Abc_BitWordNum( 1 << Gia_ManRegNum(p->pAig) );
pMemory = ABC_CALLOC( unsigned, nMemSize );
Gia_ManAreForEachCubeStore( p, pCube, i )
if ( Gia_StaIsUsed(pCube) )
@@ -477,7 +477,7 @@ Gia_ManAre_t * Gia_ManAreCreate( Gia_Man_t * pAig )
assert( sizeof(Gia_ObjAre_t) == 16 );
p = ABC_CALLOC( Gia_ManAre_t, 1 );
p->pAig = pAig;
- p->nWords = Gia_BitWordNum( 2 * Gia_ManRegNum(pAig) );
+ p->nWords = Abc_BitWordNum( 2 * Gia_ManRegNum(pAig) );
p->nSize = sizeof(Gia_StaAre_t)/4 + p->nWords;
p->ppObjs = ABC_CALLOC( unsigned *, MAX_PAGE_NUM );
p->ppStas = ABC_CALLOC( unsigned *, MAX_PAGE_NUM );
@@ -1421,7 +1421,7 @@ static inline Gia_Obj_t * Gia_ManAreMostUsedPi( Gia_ManAre_t * p )
if ( pObj->Value <= 1 )
continue;
Gia_ManIncrementTravId( p->pNew );
- Gia_ManAreMostUsedPi_rec( p->pNew, Gia_ManObj(p->pNew, Gia_Lit2Var(pObj->Value)) );
+ Gia_ManAreMostUsedPi_rec( p->pNew, Gia_ManObj(p->pNew, Abc_Lit2Var(pObj->Value)) );
}
// check the CI counters
Gia_ManForEachCi( p->pNew, pObj, i )
@@ -1471,7 +1471,7 @@ static inline int Gia_ManCheckPOs( Gia_ManAre_t * p )
int i, CountCur, CountMax = 0;
Gia_ManForEachPo( p->pAig, pObj, i )
{
- pObjNew = Gia_ManObj( p->pNew, Gia_Lit2Var(pObj->Value) );
+ pObjNew = Gia_ManObj( p->pNew, Abc_Lit2Var(pObj->Value) );
if ( Gia_ObjIsConst0(pObjNew) )
CountCur = 0;
else
@@ -1479,7 +1479,7 @@ static inline int Gia_ManCheckPOs( Gia_ManAre_t * p )
Gia_ManIncrementTravId( p->pNew );
CountCur = Gia_ManCheckPOs_rec( p->pNew, pObjNew );
}
- CountMax = ABC_MAX( CountMax, CountCur );
+ CountMax = Abc_MaxInt( CountMax, CountCur );
}
return CountMax;
}
@@ -1501,10 +1501,10 @@ static inline int Gia_ManCheckPOstatus( Gia_ManAre_t * p )
int i;
Gia_ManForEachPo( p->pAig, pObj, i )
{
- pObjNew = Gia_ManObj( p->pNew, Gia_Lit2Var(pObj->Value) );
+ pObjNew = Gia_ManObj( p->pNew, Abc_Lit2Var(pObj->Value) );
if ( Gia_ObjIsConst0(pObjNew) )
{
- if ( Gia_LitIsCompl(pObj->Value) )
+ if ( Abc_LitIsCompl(pObj->Value) )
{
p->iOutFail = i;
return 1;
@@ -1638,7 +1638,7 @@ int Gia_ManAreDeriveNexts( Gia_ManAre_t * p, Gia_PtrAre_t Sta )
else if ( Gia_StaHasValue1( pSta, i ) )
pObj->Value = 1;
else // don't-care literal
- pObj->Value = Gia_Var2Lit( Gia_ObjId( p->pNew, Gia_ManCi(p->pNew, Gia_ObjCioId(pObj)) ), 0 );
+ pObj->Value = Abc_Var2Lit( Gia_ObjId( p->pNew, Gia_ManCi(p->pNew, Gia_ObjCioId(pObj)) ), 0 );
}
Gia_ManForEachAnd( p->pAig, pObj, i )
pObj->Value = Gia_ManHashAnd( p->pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
@@ -1770,8 +1770,8 @@ int Gia_ManArePerform( Gia_Man_t * pAig, int nStatesMax, int fMiter, int fVerbos
ABC_NAMESPACE_IMPL_END
#include "giaAig.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
ABC_NAMESPACE_IMPL_START
@@ -1848,22 +1848,22 @@ void Gia_ManAreDeriveCexSat( Gia_ManAre_t * p, Gia_StaAre_t * pCur, Gia_StaAre_t
for ( i = 0; i < Gia_ManRegNum(p->pAig); i++ )
{
if ( Gia_StaHasValue0(pCur, i) )
- Vec_IntPush( p->vAssumps, Gia_Var2Lit( Vec_IntEntry(p->vSatNumCis, Gia_ManPiNum(p->pAig)+i), 1 ) );
+ Vec_IntPush( p->vAssumps, Abc_Var2Lit( Vec_IntEntry(p->vSatNumCis, Gia_ManPiNum(p->pAig)+i), 1 ) );
else if ( Gia_StaHasValue1(pCur, i) )
- Vec_IntPush( p->vAssumps, Gia_Var2Lit( Vec_IntEntry(p->vSatNumCis, Gia_ManPiNum(p->pAig)+i), 0 ) );
+ Vec_IntPush( p->vAssumps, Abc_Var2Lit( Vec_IntEntry(p->vSatNumCis, Gia_ManPiNum(p->pAig)+i), 0 ) );
}
if ( pNext )
for ( i = 0; i < Gia_ManRegNum(p->pAig); i++ )
{
if ( Gia_StaHasValue0(pNext, i) )
- Vec_IntPush( p->vAssumps, Gia_Var2Lit( Vec_IntEntry(p->vSatNumCos, Gia_ManPoNum(p->pAig)+i), 1 ) );
+ Vec_IntPush( p->vAssumps, Abc_Var2Lit( Vec_IntEntry(p->vSatNumCos, Gia_ManPoNum(p->pAig)+i), 1 ) );
else if ( Gia_StaHasValue1(pNext, i) )
- Vec_IntPush( p->vAssumps, Gia_Var2Lit( Vec_IntEntry(p->vSatNumCos, Gia_ManPoNum(p->pAig)+i), 0 ) );
+ Vec_IntPush( p->vAssumps, Abc_Var2Lit( Vec_IntEntry(p->vSatNumCos, Gia_ManPoNum(p->pAig)+i), 0 ) );
}
if ( iOutFailed >= 0 )
{
assert( iOutFailed < Gia_ManPoNum(p->pAig) );
- Vec_IntPush( p->vAssumps, Gia_Var2Lit( Vec_IntEntry(p->vSatNumCos, iOutFailed), 0 ) );
+ Vec_IntPush( p->vAssumps, Abc_Var2Lit( Vec_IntEntry(p->vSatNumCos, iOutFailed), 0 ) );
}
// solve SAT
status = sat_solver_solve( (sat_solver *)p->pSat, (int *)Vec_IntArray(p->vAssumps), (int *)Vec_IntArray(p->vAssumps) + Vec_IntSize(p->vAssumps),
@@ -1935,7 +1935,7 @@ Abc_Cex_t * Gia_ManAreDeriveCex( Gia_ManAre_t * p, Gia_StaAre_t * pLast )
Vec_IntForEachEntry( p->vCofVars, Var, v )
{
assert( Var < Gia_ManPiNum(p->pAig) );
- Gia_InfoSetBit( pCex->pData, Gia_ManRegNum(p->pAig) + (Vec_PtrSize(vStates)-1-i) * Gia_ManPiNum(p->pAig) + Var );
+ Abc_InfoSetBit( pCex->pData, Gia_ManRegNum(p->pAig) + (Vec_PtrSize(vStates)-1-i) * Gia_ManPiNum(p->pAig) + Var );
}
}
// free temporary things
diff --git a/src/aig/gia/giaFanout.c b/src/aig/gia/giaFanout.c
index c3e39405..412594ad 100644
--- a/src/aig/gia/giaFanout.c
+++ b/src/aig/gia/giaFanout.c
@@ -120,7 +120,7 @@ void Gia_ObjAddFanout( Gia_Man_t * p, Gia_Obj_t * pObj, Gia_Obj_t * pFanout )
assert( Gia_ObjId(p, pFanout) > 0 );
if ( Gia_ObjId(p, pObj) >= p->nFansAlloc || Gia_ObjId(p, pFanout) >= p->nFansAlloc )
{
- int nFansAlloc = 2 * ABC_MAX( Gia_ObjId(p, pObj), Gia_ObjId(p, pFanout) );
+ int nFansAlloc = 2 * Abc_MaxInt( Gia_ObjId(p, pObj), Gia_ObjId(p, pFanout) );
p->pFanData = ABC_REALLOC( int, p->pFanData, 5 * nFansAlloc );
memset( p->pFanData + 5 * p->nFansAlloc, 0, sizeof(int) * 5 * (nFansAlloc - p->nFansAlloc) );
p->nFansAlloc = nFansAlloc;
diff --git a/src/aig/gia/giaForce.c b/src/aig/gia/giaForce.c
index b9135404..6927266b 100644
--- a/src/aig/gia/giaForce.c
+++ b/src/aig/gia/giaForce.c
@@ -609,7 +609,7 @@ int Frc_ManCrossCut_rec( Frc_Man_t * p, Frc_Obj_t * pObj )
Frc_Obj_t * pFanin;
int i;
p->nCutCur++;
- p->nCutMax = ABC_MAX( p->nCutMax, p->nCutCur );
+ p->nCutMax = Abc_MaxInt( p->nCutMax, p->nCutCur );
if ( !Frc_ObjIsCi(pObj) )
Frc_ObjForEachFanin( pObj, pFanin, i )
p->nCutCur -= Frc_ManCrossCut_rec( p, pFanin );
@@ -636,7 +636,7 @@ int Frc_ManCrossCut2_rec( Frc_Man_t * p, Frc_Obj_t * pObj )
Frc_Obj_t * pFanin;
int i;
p->nCutCur++;
- p->nCutMax = ABC_MAX( p->nCutMax, p->nCutCur );
+ p->nCutMax = Abc_MaxInt( p->nCutMax, p->nCutCur );
if ( !Frc_ObjIsCi(pObj) )
Frc_ObjForEachFaninReverse( pObj, pFanin, i )
p->nCutCur -= Frc_ManCrossCut2_rec( p, pFanin );
@@ -912,8 +912,8 @@ void Frc_ManPlacementRefine( Frc_Man_t * p, int nIters, int fVerbose )
iMinX = iMaxX = pThis->pPlace;
Frc_ObjForEachFanout( pThis, pNext, k )
{
- iMinX = ABC_MIN( iMinX, pNext->pPlace );
- iMaxX = ABC_MAX( iMaxX, pNext->pPlace );
+ iMinX = Abc_MinInt( iMinX, pNext->pPlace );
+ iMaxX = Abc_MaxInt( iMaxX, pNext->pPlace );
}
pThis->fEdgeCenter = 0.5 * (iMaxX + iMinX);
CostThis += (iMaxX - iMinX);
diff --git a/src/aig/gia/giaFrames.c b/src/aig/gia/giaFrames.c
index 480326bd..237e6c5c 100644
--- a/src/aig/gia/giaFrames.c
+++ b/src/aig/gia/giaFrames.c
@@ -90,7 +90,7 @@ void Gia_ManUnrollDup_rec( Gia_Man_t * pNew, Gia_Obj_t * pObj, int Id )
pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
}
else assert( 0 );
- Gia_ManObj(pNew, Gia_Lit2Var(pObj->Value))->Value = Id;
+ Gia_ManObj(pNew, Abc_Lit2Var(pObj->Value))->Value = Id;
}
/**Function*************************************************************
@@ -111,7 +111,7 @@ Gia_Man_t * Gia_ManUnrollDup( Gia_Man_t * p, Vec_Int_t * vLimit )
int i;
assert( Vec_IntSize(vLimit) == 0 );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
// save constant class
Gia_ManFillValue( p );
@@ -161,7 +161,7 @@ Vec_Ptr_t * Gia_ManUnrollAbs( Gia_Man_t * p, int nFrames )
int nObjBits, nObjMask;
int f, fMax, k, Entry, Prev, iStart, iStop, Size;
// get the bitmasks
- nObjBits = Gia_Base2Log( Gia_ManObjNum(p) );
+ nObjBits = Abc_Base2Log( Gia_ManObjNum(p) );
nObjMask = (1 << nObjBits) - 1;
assert( Gia_ManObjNum(p) <= nObjMask );
// derive the tents
@@ -349,12 +349,12 @@ static inline int Gia_ObjUnrRead( Gia_ManUnr_t * p, int Id, int Degree )
static inline int Gia_ObjUnrReadCopy0( Gia_ManUnr_t * p, Gia_Obj_t * pObj, int Id )
{
int Lit = Gia_ObjUnrRead(p, Gia_ObjFaninId0(pObj, Id), Vec_IntEntry(p->vDegDiff, 2*Id));
- return Gia_LitNotCond( Lit, Gia_ObjFaninC0(pObj) );
+ return Abc_LitNotCond( Lit, Gia_ObjFaninC0(pObj) );
}
static inline int Gia_ObjUnrReadCopy1( Gia_ManUnr_t * p, Gia_Obj_t * pObj, int Id )
{
int Lit = Gia_ObjUnrRead(p, Gia_ObjFaninId1(pObj, Id), Vec_IntEntry(p->vDegDiff, 2*Id+1));
- return Gia_LitNotCond( Lit, Gia_ObjFaninC1(pObj) );
+ return Abc_LitNotCond( Lit, Gia_ObjFaninC1(pObj) );
}
static inline int Gia_ObjUnrReadCi( Gia_ManUnr_t * p, int Id, int f, Gia_Man_t * pNew )
{
@@ -367,7 +367,7 @@ static inline int Gia_ObjUnrReadCi( Gia_ManUnr_t * p, int Id, int f, Gia_Man_t *
pObj = Gia_ManPi( pNew, Gia_ManPiNum(p->pAig) * f + Gia_ObjCioId(pObjReal) );
else
pObj = Gia_ManPi( pNew, Gia_ManRegNum(p->pAig) + Gia_ManPiNum(p->pAig) * f + Gia_ObjCioId(pObjReal) );
- return Gia_Var2Lit( Gia_ObjId(pNew, pObj), 0 );
+ return Abc_Var2Lit( Gia_ObjId(pNew, pObj), 0 );
}
if ( f == 0 ) // initialize!
{
@@ -378,9 +378,9 @@ static inline int Gia_ObjUnrReadCi( Gia_ManUnr_t * p, int Id, int f, Gia_Man_t *
pObj = Gia_ManPi( pNew, Gia_ManPiNum(p->pAig) * p->pPars->nFrames + Gia_ObjCioId(pObjReal)-Gia_ManPiNum(p->pAig) );
else
pObj = Gia_ManPi( pNew, Gia_ObjCioId(pObjReal)-Gia_ManPiNum(p->pAig) );
- return Gia_Var2Lit( Gia_ObjId(pNew, pObj), 0 );
+ return Abc_Var2Lit( Gia_ObjId(pNew, pObj), 0 );
}
- pObj = Gia_ManObj( p->pOrder, Gia_Lit2Var(Gia_ObjRoToRi(p->pAig, pObjReal)->Value) );
+ pObj = Gia_ManObj( p->pOrder, Abc_Lit2Var(Gia_ObjRoToRi(p->pAig, pObjReal)->Value) );
assert( Gia_ObjIsCo(pObj) );
return Gia_ObjUnrRead( p, Gia_ObjId(p->pOrder, pObj), 0 );
}
@@ -405,7 +405,7 @@ void * Gia_ManUnrollStart( Gia_Man_t * pAig, Gia_ParFra_t * pPars )
// start timeframes
assert( p->pNew == NULL );
p->pNew = Gia_ManStart( 10000 );
- p->pNew->pName = Gia_UtilStrsav( p->pAig->pName );
+ p->pNew->pName = Abc_UtilStrsav( p->pAig->pName );
Gia_ManHashAlloc( p->pNew );
// create combinational inputs
if ( !p->pPars->fSaveLastLit ) // only in the case when unrolling depth is known
@@ -541,7 +541,7 @@ Gia_Man_t * Gia_ManUnroll( Gia_ManUnr_t * p )
int fMax, f, i, Lit, Beg, End;
// start timeframes
pNew = Gia_ManStart( 10000 );
- pNew->pName = Gia_UtilStrsav( p->pAig->pName );
+ pNew->pName = Abc_UtilStrsav( p->pAig->pName );
Gia_ManHashAlloc( pNew );
// create combinational inputs
for ( f = 0; f < p->pPars->nFrames; f++ )
@@ -754,7 +754,7 @@ Gia_Man_t * Gia_ManFramesInit( Gia_Man_t * pAig, Gia_ParFra_t * pPars )
Gia_ManFraSupports( p );
pFrames = Gia_ManStart( Vec_VecSizeSize((Vec_Vec_t*)p->vIns)+
Vec_VecSizeSize((Vec_Vec_t*)p->vAnds)+Vec_VecSizeSize((Vec_Vec_t*)p->vOuts) );
- pFrames->pName = Gia_UtilStrsav( pAig->pName );
+ pFrames->pName = Abc_UtilStrsav( pAig->pName );
Gia_ManHashAlloc( pFrames );
Gia_ManConst0(pAig)->Value = 0;
for ( f = 0; f < pPars->nFrames; f++ )
@@ -864,7 +864,7 @@ Gia_Man_t * Gia_ManFrames( Gia_Man_t * pAig, Gia_ParFra_t * pPars )
if ( pPars->fInit )
return Gia_ManFramesInit( pAig, pPars );
pFrames = Gia_ManStart( pPars->nFrames * Gia_ManObjNum(pAig) );
- pFrames->pName = Gia_UtilStrsav( pAig->pName );
+ pFrames->pName = Abc_UtilStrsav( pAig->pName );
Gia_ManHashAlloc( pFrames );
Gia_ManConst0(pAig)->Value = 0;
for ( f = 0; f < pPars->nFrames; f++ )
diff --git a/src/aig/gia/giaFront.c b/src/aig/gia/giaFront.c
index 6eb20635..903a66e7 100644
--- a/src/aig/gia/giaFront.c
+++ b/src/aig/gia/giaFront.c
@@ -115,7 +115,7 @@ Gia_Man_t * Gia_ManFront( Gia_Man_t * p )
Gia_ManSetRefs( p );
// start the new manager
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->nFront = 1 + (int)((float)1.1 * nCrossCutMaxInit);
// start the frontier
pFront = ABC_CALLOC( char, pNew->nFront );
@@ -134,7 +134,7 @@ Gia_Man_t * Gia_ManFront( Gia_Man_t * p )
nCrossCutMax = nCrossCut;
// create new node
iLit = Gia_ManAppendCi( pNew );
- pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(iLit) );
+ pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(iLit) );
assert( Gia_ObjId(pNew, pObjNew) == Gia_ObjId(p, pObj) );
pObjNew->Value = iFront = Gia_ManFrontFindNext( pFront, pNew->nFront, iFront );
// handle CIs without fanout
@@ -147,7 +147,7 @@ Gia_Man_t * Gia_ManFront( Gia_Man_t * p )
assert( Gia_ObjValue(pObj) == 0 );
// create new node
iLit = Gia_ManAppendCo( pNew, 0 );
- pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(iLit) );
+ pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(iLit) );
assert( Gia_ObjId(pNew, pObjNew) == Gia_ObjId(p, pObj) );
// get the fanin
pFanin0New = Gia_ManObj( pNew, Gia_ObjFaninId0(pObj, i) );
diff --git a/src/aig/gia/giaGiarf.c b/src/aig/gia/giaGiarf.c
index 501f9bb3..2f18c16d 100644
--- a/src/aig/gia/giaGiarf.c
+++ b/src/aig/gia/giaGiarf.c
@@ -301,7 +301,7 @@ int Hcd_ManHashKey( unsigned * pSim, int nWords, int nTableSize )
void Hcd_ManClassesRehash( Hcd_Man_t * p, Vec_Int_t * vRefined )
{
int * pTable, nTableSize, Key, i, k;
- nTableSize = Gia_PrimeCudd( 100 + Vec_IntSize(vRefined) / 5 );
+ nTableSize = Abc_PrimeCudd( 100 + Vec_IntSize(vRefined) / 5 );
pTable = ABC_CALLOC( int, nTableSize );
Vec_IntForEachEntry( vRefined, i, k )
{
@@ -538,7 +538,7 @@ Gia_Man_t * Gia_GenerateReducedLevel( Gia_Man_t * p, int Level, Vec_Ptr_t ** pvR
vRoots = Vec_PtrAlloc( 100 );
// copy unmarked nodes
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
pObj->Value = Gia_ManAppendCi(pNew);
@@ -553,7 +553,7 @@ Gia_Man_t * Gia_GenerateReducedLevel( Gia_Man_t * p, int Level, Vec_Ptr_t ** pvR
{
// printf( "Substituting %d <--- %d\n", Gia_ObjId(p, pRepr), Gia_ObjId(p, pObj) );
assert( pRepr < pObj );
- pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
+ pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
continue;
}
pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
@@ -644,19 +644,19 @@ int Gia_GiarfStorePatternTry( Vec_Ptr_t * vInfo, Vec_Ptr_t * vPres, int iBit, in
int i;
for ( i = 0; i < nLits; i++ )
{
- pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
- pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
- if ( Gia_InfoHasBit( pPres, iBit ) &&
- Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
+ pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+ pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+ if ( Abc_InfoHasBit( pPres, iBit ) &&
+ Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
return 0;
}
for ( i = 0; i < nLits; i++ )
{
- pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
- pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
- Gia_InfoSetBit( pPres, iBit );
- if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
- Gia_InfoXorBit( pInfo, iBit );
+ pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+ pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+ Abc_InfoSetBit( pPres, iBit );
+ if ( Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
+ Abc_InfoXorBit( pInfo, iBit );
}
return 1;
}
@@ -699,10 +699,10 @@ void Gia_GiarfInsertPattern( Hcd_Man_t * p, Vec_Int_t * vCex, int k )
int Lit, i;
Vec_IntForEachEntry( vCex, Lit, i )
{
- pObj = Gia_ManCi( p->pGia, Gia_Lit2Var(Lit) );
+ pObj = Gia_ManCi( p->pGia, Abc_Lit2Var(Lit) );
pInfo = Hcd_ObjSimP( p, Gia_ObjId( p->pGia, pObj ) );
- if ( Gia_InfoHasBit( pInfo, k ) == Gia_LitIsCompl(Lit) )
- Gia_InfoXorBit( pInfo, k );
+ if ( Abc_InfoHasBit( pInfo, k ) == Abc_LitIsCompl(Lit) )
+ Abc_InfoXorBit( pInfo, k );
}
}
@@ -737,7 +737,7 @@ void Gia_GiarfPrintClasses( Gia_Man_t * pGia )
ABC_NAMESPACE_IMPL_END
-#include "cecInt.h"
+#include "src/proof/cec/cecInt.h"
ABC_NAMESPACE_IMPL_START
@@ -785,7 +785,7 @@ int Gia_ComputeEquivalencesLevel( Hcd_Man_t * p, Gia_Man_t * pGiaLev, Vec_Ptr_t
iRoot = Gia_ObjId( p->pGia, pRoot );
if ( !Gia_ObjIsConst( p->pGia, iRoot ) )
continue;
- iRootNew = Gia_LitNotCond( pRoot->Value, pRoot->fPhase );
+ iRootNew = Abc_LitNotCond( pRoot->Value, pRoot->fPhase );
assert( iRootNew != 1 );
if ( fUse2Solver )
{
@@ -880,8 +880,8 @@ int Gia_ComputeEquivalencesLevel( Hcd_Man_t * p, Gia_Man_t * pGiaLev, Vec_Ptr_t
pMemberPrev = (Gia_Obj_t *)Vec_PtrEntryLast( vMembers );
Vec_PtrForEachEntry( Gia_Obj_t *, vMembers, pMember, k )
{
- iMemberPrev = Gia_LitNotCond( pMemberPrev->Value, pMemberPrev->fPhase );
- iMember = Gia_LitNotCond( pMember->Value, !pMember->fPhase );
+ iMemberPrev = Abc_LitNotCond( pMemberPrev->Value, pMemberPrev->fPhase );
+ iMember = Abc_LitNotCond( pMember->Value, !pMember->fPhase );
assert( iMemberPrev != iMember );
if ( fUse2Solver )
{
diff --git a/src/aig/gia/giaGlitch.c b/src/aig/gia/giaGlitch.c
index a6e5315a..35d076e5 100644
--- a/src/aig/gia/giaGlitch.c
+++ b/src/aig/gia/giaGlitch.c
@@ -333,7 +333,7 @@ static inline int Gli_NodeComputeValue( Gli_Obj_t * pNode )
int i, Phase = 0;
for ( i = 0; i < (int)pNode->nFanins; i++ )
Phase |= (Gli_ObjFanin(pNode, i)->fPhase << i);
- return Gia_InfoHasBit( pNode->uTruth, Phase );
+ return Abc_InfoHasBit( pNode->uTruth, Phase );
}
/**Function*************************************************************
@@ -352,7 +352,7 @@ static inline int Gli_NodeComputeValue2( Gli_Obj_t * pNode )
int i, Phase = 0;
for ( i = 0; i < (int)pNode->nFanins; i++ )
Phase |= (Gli_ObjFanin(pNode, i)->fPhase2 << i);
- return Gia_InfoHasBit( pNode->uTruth, Phase );
+ return Abc_InfoHasBit( pNode->uTruth, Phase );
}
/**Function*************************************************************
@@ -593,7 +593,7 @@ unsigned Gli_ManSimulateSeqNode( Gli_Man_t * p, Gli_Obj_t * pNode )
for ( k = 0; k < nFanins; k++ )
if ( (pSimInfos[k] >> i) & 1 )
Phase |= (1 << k);
- if ( Gia_InfoHasBit( pNode->uTruth, Phase ) )
+ if ( Abc_InfoHasBit( pNode->uTruth, Phase ) )
Result |= (1 << i);
}
return Result;
@@ -755,7 +755,7 @@ void Gli_ManSwitchesAndGlitches( Gli_Man_t * p, int nPatterns, float PiTransProb
}
else
{
- int nIters = Gia_BitWordNum(nPatterns);
+ int nIters = Abc_BitWordNum(nPatterns);
Gli_ManSimulateSeqPref( p, 16 );
for ( i = 0; i < 32; i++ )
{
diff --git a/src/aig/gia/giaHash.c b/src/aig/gia/giaHash.c
index f346a310..41092cc7 100644
--- a/src/aig/gia/giaHash.c
+++ b/src/aig/gia/giaHash.c
@@ -46,10 +46,10 @@ static inline int Gia_ManHashOne( int iLit0, int iLit1, int TableSize )
{
unsigned Key = 0;
assert( iLit0 < iLit1 );
- Key ^= Gia_Lit2Var(iLit0) * 7937;
- Key ^= Gia_Lit2Var(iLit1) * 2971;
- Key ^= Gia_LitIsCompl(iLit0) * 911;
- Key ^= Gia_LitIsCompl(iLit1) * 353;
+ Key ^= Abc_Lit2Var(iLit0) * 7937;
+ Key ^= Abc_Lit2Var(iLit1) * 2971;
+ Key ^= Abc_LitIsCompl(iLit0) * 911;
+ Key ^= Abc_LitIsCompl(iLit1) * 353;
return (int)(Key % TableSize);
}
@@ -68,8 +68,8 @@ static inline int * Gia_ManHashFind( Gia_Man_t * p, int iLit0, int iLit1 )
{
Gia_Obj_t * pThis;
int * pPlace = p->pHTable + Gia_ManHashOne( iLit0, iLit1, p->nHTable );
- for ( pThis = (*pPlace)? Gia_ManObj(p, Gia_Lit2Var(*pPlace)) : NULL; pThis;
- pPlace = (int *)&pThis->Value, pThis = (*pPlace)? Gia_ManObj(p, Gia_Lit2Var(*pPlace)) : NULL )
+ for ( pThis = (*pPlace)? Gia_ManObj(p, Abc_Lit2Var(*pPlace)) : NULL; pThis;
+ pPlace = (int *)&pThis->Value, pThis = (*pPlace)? Gia_ManObj(p, Abc_Lit2Var(*pPlace)) : NULL )
if ( Gia_ObjFaninLit0p(p, pThis) == iLit0 && Gia_ObjFaninLit1p(p, pThis) == iLit1 )
break;
return pPlace;
@@ -109,7 +109,7 @@ int Gia_ManHashLookup( Gia_Man_t * p, Gia_Obj_t * p0, Gia_Obj_t * p1 )
void Gia_ManHashAlloc( Gia_Man_t * p )
{
assert( p->pHTable == NULL );
- p->nHTable = Gia_PrimeCudd( p->nObjsAlloc );
+ p->nHTable = Abc_PrimeCudd( p->nObjsAlloc );
p->pHTable = ABC_CALLOC( int, p->nHTable );
}
@@ -134,7 +134,7 @@ void Gia_ManHashStart( Gia_Man_t * p )
{
pPlace = Gia_ManHashFind( p, Gia_ObjFaninLit0(pObj, i), Gia_ObjFaninLit1(pObj, i) );
assert( *pPlace == 0 );
- *pPlace = Gia_Var2Lit( i, 0 );
+ *pPlace = Abc_Var2Lit( i, 0 );
}
}
@@ -175,20 +175,20 @@ void Gia_ManHashResize( Gia_Man_t * p )
// replace the table
pHTableOld = p->pHTable;
nHTableOld = p->nHTable;
- p->nHTable = Gia_PrimeCudd( 2 * Gia_ManAndNum(p) );
+ p->nHTable = Abc_PrimeCudd( 2 * Gia_ManAndNum(p) );
p->pHTable = ABC_CALLOC( int, p->nHTable );
// rehash the entries from the old table
Counter = 0;
for ( i = 0; i < nHTableOld; i++ )
- for ( pThis = (pHTableOld[i]? Gia_ManObj(p, Gia_Lit2Var(pHTableOld[i])) : NULL),
+ for ( pThis = (pHTableOld[i]? Gia_ManObj(p, Abc_Lit2Var(pHTableOld[i])) : NULL),
iNext = (pThis? pThis->Value : 0);
- pThis; pThis = (iNext? Gia_ManObj(p, Gia_Lit2Var(iNext)) : NULL),
+ pThis; pThis = (iNext? Gia_ManObj(p, Abc_Lit2Var(iNext)) : NULL),
iNext = (pThis? pThis->Value : 0) )
{
pThis->Value = 0;
pPlace = Gia_ManHashFind( p, Gia_ObjFaninLit0p(p, pThis), Gia_ObjFaninLit1p(p, pThis) );
assert( *pPlace == 0 ); // should not be there
- *pPlace = Gia_Var2Lit( Gia_ObjId(p, pThis), 0 );
+ *pPlace = Abc_Var2Lit( Gia_ObjId(p, pThis), 0 );
assert( *pPlace != 0 );
Counter++;
}
@@ -220,9 +220,9 @@ void Gia_ManHashProfile( Gia_Man_t * p )
for ( i = 0; i < Limit; i++ )
{
Counter = 0;
- for ( pEntry = (p->pHTable[i]? Gia_ManObj(p, Gia_Lit2Var(p->pHTable[i])) : NULL);
+ for ( pEntry = (p->pHTable[i]? Gia_ManObj(p, Abc_Lit2Var(p->pHTable[i])) : NULL);
pEntry;
- pEntry = (pEntry->Value? Gia_ManObj(p, Gia_Lit2Var(pEntry->Value)) : NULL) )
+ pEntry = (pEntry->Value? Gia_ManObj(p, Abc_Lit2Var(pEntry->Value)) : NULL) )
Counter++;
if ( Counter )
printf( "%d ", Counter );
@@ -480,7 +480,7 @@ int Gia_ManHashAnd( Gia_Man_t * p, int iLit0, int iLit1 )
return iLit1 ? iLit0 : 0;
if ( iLit0 == iLit1 )
return iLit1;
- if ( iLit0 == Gia_LitNot(iLit1) )
+ if ( iLit0 == Abc_LitNot(iLit1) )
return 0;
if ( (p->nObjs & 0xFF) == 0 && 2 * p->nHTable < Gia_ManAndNum(p) )
Gia_ManHashResize( p );
@@ -531,7 +531,7 @@ int Gia_ManHashAndTry( Gia_Man_t * p, int iLit0, int iLit1 )
return iLit1 ? iLit0 : 0;
if ( iLit0 == iLit1 )
return iLit1;
- if ( iLit0 == Gia_LitNot(iLit1) )
+ if ( iLit0 == Abc_LitNot(iLit1) )
return 0;
if ( iLit0 > iLit1 )
iLit0 ^= iLit1, iLit1 ^= iLit0, iLit0 ^= iLit1;
@@ -556,10 +556,10 @@ int Gia_ManHashAndTry( Gia_Man_t * p, int iLit0, int iLit1 )
***********************************************************************/
int Gia_ManHashXor( Gia_Man_t * p, int iLit0, int iLit1 )
{
- int fCompl = Gia_LitIsCompl(iLit0) ^ Gia_LitIsCompl(iLit1);
- int iTemp0 = Gia_ManHashAnd( p, Gia_LitRegular(iLit0), Gia_LitNot(Gia_LitRegular(iLit1)) );
- int iTemp1 = Gia_ManHashAnd( p, Gia_LitRegular(iLit1), Gia_LitNot(Gia_LitRegular(iLit0)) );
- return Gia_LitNotCond( Gia_ManHashAnd( p, Gia_LitNot(iTemp0), Gia_LitNot(iTemp1) ), !fCompl );
+ int fCompl = Abc_LitIsCompl(iLit0) ^ Abc_LitIsCompl(iLit1);
+ int iTemp0 = Gia_ManHashAnd( p, Abc_LitRegular(iLit0), Abc_LitNot(Abc_LitRegular(iLit1)) );
+ int iTemp1 = Gia_ManHashAnd( p, Abc_LitRegular(iLit1), Abc_LitNot(Abc_LitRegular(iLit0)) );
+ return Abc_LitNotCond( Gia_ManHashAnd( p, Abc_LitNot(iTemp0), Abc_LitNot(iTemp1) ), !fCompl );
}
/**Function*************************************************************
@@ -575,9 +575,9 @@ int Gia_ManHashXor( Gia_Man_t * p, int iLit0, int iLit1 )
***********************************************************************/
int Gia_ManHashMux( Gia_Man_t * p, int iCtrl, int iData1, int iData0 )
{
- int iTemp0 = Gia_ManHashAnd( p, Gia_LitNot(iCtrl), iData0 );
+ int iTemp0 = Gia_ManHashAnd( p, Abc_LitNot(iCtrl), iData0 );
int iTemp1 = Gia_ManHashAnd( p, iCtrl, iData1 );
- return Gia_LitNotCond( Gia_ManHashAnd( p, Gia_LitNot(iTemp0), Gia_LitNot(iTemp1) ), 1 );
+ return Abc_LitNotCond( Gia_ManHashAnd( p, Abc_LitNot(iTemp0), Abc_LitNot(iTemp1) ), 1 );
}
/**Function*************************************************************
@@ -597,7 +597,7 @@ Gia_Man_t * Gia_ManRehash( Gia_Man_t * p, int fAddStrash )
Gia_Obj_t * pObj;
int i;
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->fAddStrash = fAddStrash;
Gia_ManHashAlloc( pNew );
Gia_ManConst0(p)->Value = 0;
diff --git a/src/aig/gia/giaHcd.c b/src/aig/gia/giaHcd.c
index 454785b9..3f37e724 100644
--- a/src/aig/gia/giaHcd.c
+++ b/src/aig/gia/giaHcd.c
@@ -20,8 +20,8 @@
#include "gia.h"
#include "giaAig.h"
-#include "aig.h"
-#include "dar.h"
+#include "src/aig/aig/aig.h"
+#include "src/opt/dar/dar.h"
ABC_NAMESPACE_IMPL_START
@@ -332,7 +332,7 @@ Gia_Man_t * Hcd_ManChoiceMiter( Vec_Ptr_t * vGias )
}
// start the new manager
pNew = Gia_ManStart( Vec_PtrSize(vGias) * Gia_ManObjNum(pGia0) );
- pNew->pName = Gia_UtilStrsav( pGia0->pName );
+ pNew->pName = Abc_UtilStrsav( pGia0->pName );
// create new CIs and assign them to the old manager CIs
for ( k = 0; k < Gia_ManCiNum(pGia0); k++ )
{
@@ -457,7 +457,7 @@ void Hcd_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
{
if ( Gia_ObjIsConst0(pRepr) )
{
- pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+ pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
return;
}
Hcd_ManEquivToChoices_rec( pNew, p, pRepr );
@@ -465,20 +465,20 @@ void Hcd_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
Hcd_ManEquivToChoices_rec( pNew, p, Gia_ObjFanin0(pObj) );
Hcd_ManEquivToChoices_rec( pNew, p, Gia_ObjFanin1(pObj) );
pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
- if ( Gia_LitRegular(pObj->Value) == Gia_LitRegular(pRepr->Value) )
+ if ( Abc_LitRegular(pObj->Value) == Abc_LitRegular(pRepr->Value) )
{
- assert( (int)pObj->Value == Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) ) );
+ assert( (int)pObj->Value == Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) ) );
return;
}
if ( pRepr->Value > pObj->Value ) // should never happen with high resource limit
return;
assert( pRepr->Value < pObj->Value );
- pReprNew = Gia_ManObj( pNew, Gia_Lit2Var(pRepr->Value) );
- pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(pObj->Value) );
+ pReprNew = Gia_ManObj( pNew, Abc_Lit2Var(pRepr->Value) );
+ pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(pObj->Value) );
if ( Gia_ObjReprObj( pNew, Gia_ObjId(pNew, pObjNew) ) )
{
assert( Gia_ObjReprObj( pNew, Gia_ObjId(pNew, pObjNew) ) == pReprNew );
- pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+ pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
return;
}
if ( !Hcd_ObjCheckTfi( pNew, pReprNew, pObjNew ) )
@@ -487,7 +487,7 @@ void Hcd_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
Gia_ObjSetRepr( pNew, Gia_ObjId(pNew, pObjNew), Gia_ObjId(pNew, pReprNew) );
Hcd_ManAddNextEntry_rec( pNew, pReprNew, pObjNew );
}
- pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+ pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
return;
}
assert( Gia_ObjIsAnd(pObj) );
@@ -563,7 +563,7 @@ Gia_Man_t * Hcd_ManEquivToChoices( Gia_Man_t * p, int nSnapshots )
assert( (Gia_ManCoNum(p) % nSnapshots) == 0 );
Gia_ManSetPhase( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->pReprs = ABC_CALLOC( Gia_Rpr_t, Gia_ManObjNum(p) );
pNew->pNexts = ABC_CALLOC( int, Gia_ManObjNum(p) );
for ( i = 0; i < Gia_ManObjNum(p); i++ )
diff --git a/src/aig/gia/giaIf.c b/src/aig/gia/giaIf.c
index 787aa090..e03439d0 100644
--- a/src/aig/gia/giaIf.c
+++ b/src/aig/gia/giaIf.c
@@ -19,9 +19,9 @@
***********************************************************************/
#include "gia.h"
-#include "aig.h"
-#include "if.h"
-#include "dar.h"
+#include "src/aig/aig/aig.h"
+#include "src/map/if/if.h"
+#include "src/opt/dar/dar.h"
ABC_NAMESPACE_IMPL_START
@@ -306,11 +306,11 @@ void Gia_ManPrintMappingStats( Gia_Man_t * p )
{
nLuts++;
nFanins += Gia_ObjLutSize(p, i);
- nLutSize = ABC_MAX( nLutSize, Gia_ObjLutSize(p, i) );
+ nLutSize = Abc_MaxInt( nLutSize, Gia_ObjLutSize(p, i) );
Gia_LutForEachFanin( p, i, iFan, k )
- pLevels[i] = ABC_MAX( pLevels[i], pLevels[iFan] );
+ pLevels[i] = Abc_MaxInt( pLevels[i], pLevels[iFan] );
pLevels[i]++;
- LevelMax = ABC_MAX( LevelMax, pLevels[i] );
+ LevelMax = Abc_MaxInt( LevelMax, pLevels[i] );
}
ABC_FREE( pLevels );
Abc_Print( 1, "mapping (K=%d) : ", nLutSize );
@@ -355,7 +355,7 @@ int Gia_ManLutSizeMax( Gia_Man_t * p )
{
int i, nSizeMax = -1;
Gia_ManForEachLut( p, i )
- nSizeMax = ABC_MAX( nSizeMax, Gia_ObjLutSize(p, i) );
+ nSizeMax = Abc_MaxInt( nSizeMax, Gia_ObjLutSize(p, i) );
return nSizeMax;
}
diff --git a/src/aig/gia/giaMan.c b/src/aig/gia/giaMan.c
index 39b0059d..972958bb 100644
--- a/src/aig/gia/giaMan.c
+++ b/src/aig/gia/giaMan.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "gia.h"
-#include "tim.h"
+#include "src/misc/tim/tim.h"
ABC_NAMESPACE_IMPL_START
@@ -262,7 +262,8 @@ void Gia_ManPrintObjClasses( Gia_Man_t * p )
Vec_Int_t * vAbs = p->vObjClasses;
int i, k, Entry, iStart, iStop, nFrames;
int nObjBits, nObjMask, iObj, iFrame, nWords;
- unsigned * pInfo, * pCountAll, * pCountUni;
+ unsigned * pInfo;
+ int * pCountAll, * pCountUni;
if ( vAbs == NULL )
return;
nFrames = Vec_IntEntry( vAbs, 0 );
@@ -270,10 +271,10 @@ void Gia_ManPrintObjClasses( Gia_Man_t * p )
pCountAll = ABC_ALLOC( int, nFrames + 1 );
pCountUni = ABC_ALLOC( int, nFrames + 1 );
// start storage for seen objects
- nWords = Gia_BitWordNum( nFrames );
+ nWords = Abc_BitWordNum( nFrames );
vSeens = Vec_IntStart( Gia_ManObjNum(p) * nWords );
// get the bitmasks
- nObjBits = Gia_Base2Log( Gia_ManObjNum(p) );
+ nObjBits = Abc_Base2Log( Gia_ManObjNum(p) );
nObjMask = (1 << nObjBits) - 1;
assert( Gia_ManObjNum(p) <= nObjMask );
// print info about frames
@@ -289,16 +290,16 @@ void Gia_ManPrintObjClasses( Gia_Man_t * p )
iObj = (Entry & nObjMask);
iFrame = (Entry >> nObjBits);
pInfo = (unsigned *)Vec_IntEntryP( vSeens, nWords * iObj );
- if ( Gia_InfoHasBit(pInfo, iFrame) == 0 )
+ if ( Abc_InfoHasBit(pInfo, iFrame) == 0 )
{
- Gia_InfoSetBit( pInfo, iFrame );
+ Abc_InfoSetBit( pInfo, iFrame );
pCountUni[iFrame+1]++;
pCountUni[0]++;
}
pCountAll[iFrame+1]++;
pCountAll[0]++;
}
- assert( pCountAll[0] == (unsigned)(iStop - iStart) );
+ assert( pCountAll[0] == (iStop - iStart) );
// printf( "%5d%5d ", pCountAll[0], pCountUni[0] );
printf( "%3d :", i );
printf( "%6d", pCountAll[0] );
diff --git a/src/aig/gia/giaPat.c b/src/aig/gia/giaPat.c
index 643ae6b7..124f5e0b 100644
--- a/src/aig/gia/giaPat.c
+++ b/src/aig/gia/giaPat.c
@@ -100,8 +100,8 @@ void Gia_SatVerifyPattern( Gia_Man_t * p, Gia_Obj_t * pRoot, Vec_Int_t * vCex, V
Gia_SatCollectCone( p, Gia_ObjFanin0(pRoot), vVisit );
// set binary values to nodes in the counter-example
Vec_IntForEachEntry( vCex, Entry, i )
-// Sat_ObjSetXValue( Gia_ManObj(p, Gia_Lit2Var(Entry)), Gia_LitIsCompl(Entry)? GIA_ZER : GIA_ONE );
- Sat_ObjSetXValue( Gia_ManCi(p, Gia_Lit2Var(Entry)), Gia_LitIsCompl(Entry)? GIA_ZER : GIA_ONE );
+// Sat_ObjSetXValue( Gia_ManObj(p, Abc_Lit2Var(Entry)), Abc_LitIsCompl(Entry)? GIA_ZER : GIA_ONE );
+ Sat_ObjSetXValue( Gia_ManCi(p, Abc_Lit2Var(Entry)), Abc_LitIsCompl(Entry)? GIA_ZER : GIA_ONE );
// simulate
Gia_ManForEachObjVec( vVisit, p, pObj, i )
{
diff --git a/src/aig/gia/giaReparam.c b/src/aig/gia/giaReparam.c
index 5210f998..10294671 100644
--- a/src/aig/gia/giaReparam.c
+++ b/src/aig/gia/giaReparam.c
@@ -20,7 +20,7 @@
#include "gia.h"
#include "giaAig.h"
-#include "saig.h"
+#include "src/aig/saig/saig.h"
ABC_NAMESPACE_IMPL_START
@@ -52,7 +52,7 @@ Gia_Man_t * Gia_ManDupIn2Ff( Gia_Man_t * p )
int i;
vPiOuts = Vec_IntAlloc( Gia_ManPiNum(p) );
pNew = Gia_ManStart( Gia_ManObjNum(p) + 2 * Gia_ManPiNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManFillValue( p );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachPi( p, pObj, i )
@@ -112,7 +112,7 @@ Gia_Man_t * Gia_ManDupFf2In( Gia_Man_t * p, int nFlopsOld )
Gia_Obj_t * pObj;
int i;
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManFillValue( p );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachRo( p, pObj, i )
diff --git a/src/aig/gia/giaRetime.c b/src/aig/gia/giaRetime.c
index 58029b66..0b9a6bfb 100644
--- a/src/aig/gia/giaRetime.c
+++ b/src/aig/gia/giaRetime.c
@@ -125,7 +125,7 @@ Gia_Man_t * Gia_ManRetimeDupForward( Gia_Man_t * p, Vec_Ptr_t * vCut )
int i;
// create the new manager
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
// create the true PIs
Gia_ManFillValue( p );
@@ -135,7 +135,7 @@ Gia_Man_t * Gia_ManRetimeDupForward( Gia_Man_t * p, Vec_Ptr_t * vCut )
pObj->Value = Gia_ManAppendCi( pNew );
// create the registers
Vec_PtrForEachEntry( Gia_Obj_t *, vCut, pObj, i )
- pObj->Value = Gia_LitNotCond( Gia_ManAppendCi(pNew), pObj->fPhase );
+ pObj->Value = Abc_LitNotCond( Gia_ManAppendCi(pNew), pObj->fPhase );
// duplicate logic above the cut
Gia_ManForEachCo( p, pObj, i )
Gia_ManRetimeDup_rec( pNew, Gia_ObjFanin0(pObj) );
@@ -156,7 +156,7 @@ Gia_Man_t * Gia_ManRetimeDupForward( Gia_Man_t * p, Vec_Ptr_t * vCut )
Vec_PtrForEachEntry( Gia_Obj_t *, vCut, pObj, i )
{
Gia_ManRetimeDup_rec( pNew, pObj );
- Gia_ManAppendCo( pNew, Gia_LitNotCond( pObj->Value, pObj->fPhase ) );
+ Gia_ManAppendCo( pNew, Abc_LitNotCond( pObj->Value, pObj->fPhase ) );
}
Gia_ManHashStop( pNew );
Gia_ManSetRegNum( pNew, Vec_PtrSize(vCut) );
diff --git a/src/aig/gia/giaSat.c b/src/aig/gia/giaSat.c
index c2d70795..cb410dd7 100644
--- a/src/aig/gia/giaSat.c
+++ b/src/aig/gia/giaSat.c
@@ -265,7 +265,7 @@ int Gia_ManSatPartCount( Gia_Man_t * p, Gia_Obj_t * pObj, int * pnLeaves, int *
(*pnLeaves)++;
else
Level1 = Gia_ManSatPartCount(p, pFanin, pnLeaves, pnNodes) + Gia_ObjFaninC1(pObj);
- return ABC_MAX( Level0, Level1 );
+ return Abc_MaxInt( Level0, Level1 );
}
/**Function*************************************************************
diff --git a/src/aig/gia/giaScl.c b/src/aig/gia/giaScl.c
index a482d024..0ec67c93 100644
--- a/src/aig/gia/giaScl.c
+++ b/src/aig/gia/giaScl.c
@@ -199,7 +199,7 @@ Gia_Man_t * Gia_ManReduceEquiv( Gia_Man_t * p, int fVerbose )
else if ( ~pMaps[iLit] ) // in this case, ID(pObj) > ID(pRepr)
pCi2Lit[Gia_ManPiNum(p)+i] = pMaps[iLit], Counter++;
else
- pMaps[iLit] = Gia_Var2Lit( Gia_ObjId(p, pObjRo), 0 );
+ pMaps[iLit] = Abc_Var2Lit( Gia_ObjId(p, pObjRo), 0 );
}
/*
Gia_ManForEachCi( p, pObjRo, i )
diff --git a/src/aig/gia/giaShrink.c b/src/aig/gia/giaShrink.c
index fc9e80d6..07119daf 100644
--- a/src/aig/gia/giaShrink.c
+++ b/src/aig/gia/giaShrink.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "gia.h"
-#include "aig.h"
-#include "dar.h"
+#include "src/aig/aig/aig.h"
+#include "src/opt/dar/dar.h"
ABC_NAMESPACE_IMPL_START
@@ -75,7 +75,7 @@ Gia_Man_t * Gia_ManPerformMapShrink( Gia_Man_t * p, int fKeepLevel, int fVerbose
Gia_ManConst0(p)->Value = 0;
// start the new manager
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
Gia_ManCleanLevels( pNew, Gia_ManObjNum(p) );
Gia_ManForEachObj1( p, pObj, i )
@@ -114,7 +114,7 @@ Gia_Man_t * Gia_ManPerformMapShrink( Gia_Man_t * p, int fKeepLevel, int fVerbose
else
{
pObj->Value = Dar_LibEvalBuild( pNew, vLeaves, 0xffff & *pTruth, fKeepLevel, vLeavesBest );
- pObj->Value = Gia_LitNotCond( pObj->Value, Gia_ObjPhaseRealLit(pNew, pObj->Value) ^ pObj->fPhase );
+ pObj->Value = Abc_LitNotCond( pObj->Value, Gia_ObjPhaseRealLit(pNew, pObj->Value) ^ pObj->fPhase );
}
}
}
diff --git a/src/aig/gia/giaSim.c b/src/aig/gia/giaSim.c
index 4be740cd..817fc2e2 100644
--- a/src/aig/gia/giaSim.c
+++ b/src/aig/gia/giaSim.c
@@ -133,18 +133,18 @@ Vec_Int_t * Gia_ManSimDeriveResets( Gia_Man_t * pGia )
{
if ( Count < nImpLimit )
continue;
- pObj = Gia_ManObj( pGia, Gia_Lit2Var(Lit) );
- if ( Gia_LitIsCompl(Lit) ) // const 0
+ pObj = Gia_ManObj( pGia, Abc_Lit2Var(Lit) );
+ if ( Abc_LitIsCompl(Lit) ) // const 0
{
// Ssm_ObjSetLogic0( pObj );
- Vec_IntWriteEntry( vResult, Gia_Lit2Var(Lit), 0 );
+ Vec_IntWriteEntry( vResult, Abc_Lit2Var(Lit), 0 );
CounterPi0 += Gia_ObjIsPi(pGia, pObj);
Counter0++;
}
else
{
// Ssm_ObjSetLogic1( pObj );
- Vec_IntWriteEntry( vResult, Gia_Lit2Var(Lit), 1 );
+ Vec_IntWriteEntry( vResult, Abc_Lit2Var(Lit), 1 );
CounterPi1 += Gia_ObjIsPi(pGia, pObj);
Counter1++;
}
@@ -568,8 +568,8 @@ Abc_Cex_t * Gia_ManGenerateCounter( Gia_Man_t * pAig, int iFrame, int iOut, int
continue;
for ( w = nWords-1; w >= 0; w-- )
pData[w] = Gia_ManRandom( 0 );
- if ( Gia_InfoHasBit( pData, iPat ) )
- Gia_InfoSetBit( p->pData, Counter + iPioId );
+ if ( Abc_InfoHasBit( pData, iPat ) )
+ Abc_InfoSetBit( p->pData, Counter + iPioId );
}
ABC_FREE( pData );
return p;
diff --git a/src/aig/gia/giaSim2.c b/src/aig/gia/giaSim2.c
index 27945704..74a34d1b 100644
--- a/src/aig/gia/giaSim2.c
+++ b/src/aig/gia/giaSim2.c
@@ -471,7 +471,7 @@ void Gia_Sim2ProcessRefined( Gia_Sim2_t * p, Vec_Int_t * vRefined )
int * pTable, nTableSize, i, k, Key;
if ( Vec_IntSize(vRefined) == 0 )
return;
- nTableSize = Gia_PrimeCudd( 1000 + Vec_IntSize(vRefined) / 3 );
+ nTableSize = Abc_PrimeCudd( 1000 + Vec_IntSize(vRefined) / 3 );
pTable = ABC_CALLOC( int, nTableSize );
Vec_IntForEachEntry( vRefined, i, k )
{
@@ -617,8 +617,8 @@ Abc_Cex_t * Gia_Sim2GenerateCounter( Gia_Man_t * pAig, int iFrame, int iOut, int
{
for ( w = nWords-1; w >= 0; w-- )
pData[w] = Gia_ManRandom( 0 );
- if ( Gia_InfoHasBit( pData, iPat ) )
- Gia_InfoSetBit( p->pData, Counter + i );
+ if ( Abc_InfoHasBit( pData, iPat ) )
+ Abc_InfoSetBit( p->pData, Counter + i );
}
ABC_FREE( pData );
return p;
diff --git a/src/aig/gia/giaSpeedup.c b/src/aig/gia/giaSpeedup.c
index cce0b68d..d20fe1a4 100644
--- a/src/aig/gia/giaSpeedup.c
+++ b/src/aig/gia/giaSpeedup.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "gia.h"
-#include "if.h"
+#include "src/map/if/if.h"
ABC_NAMESPACE_IMPL_START
@@ -597,7 +597,7 @@ void Gia_ManSpeedupObj( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, Vec_I
for ( i = 0; i < nCofs; i++ )
{
Gia_ManForEachObjVec( vLeaves, p, pTemp, k )
- pTemp->Value = Gia_Var2Lit( Gia_ObjId(p, pTemp), 0 );
+ pTemp->Value = Abc_Var2Lit( Gia_ObjId(p, pTemp), 0 );
Gia_ManForEachObjVec( vTimes, p, pTemp, k )
pTemp->Value = ((i & (1<<k)) != 0);
Gia_ManForEachObjVec( vNodes, p, pTemp, k )
@@ -611,7 +611,7 @@ void Gia_ManSpeedupObj( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, Vec_I
pCofs[i] = Gia_ManHashMux( pNew, Gia_ObjToLit(p,pTemp), pCofs[i+nSkip], pCofs[i] );
// create choice node (pObj is repr and ppCofs[0] is new)
iObj = Gia_ObjId( p, pObj );
- iResult = Gia_Lit2Var( pCofs[0] );
+ iResult = Abc_Lit2Var( pCofs[0] );
if ( iResult <= iObj )
return;
Gia_ObjSetRepr( pNew, iResult, iObj );
diff --git a/src/aig/gia/giaSupMin.c b/src/aig/gia/giaSupMin.c
index 4abaab0f..90c30c71 100644
--- a/src/aig/gia/giaSupMin.c
+++ b/src/aig/gia/giaSupMin.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "gia.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/gia/giaSwitch.c b/src/aig/gia/giaSwitch.c
index bc2f0f67..848bd646 100644
--- a/src/aig/gia/giaSwitch.c
+++ b/src/aig/gia/giaSwitch.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "giaAig.h"
-#include "main.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
@@ -569,7 +569,7 @@ Vec_Int_t * Gia_ManSwiSimulate( Gia_Man_t * pAig, Gia_ParSwi_t * pPars )
{
printf( "Obj = %8d (%8d). F = %6d. ",
pAig->nObjs, Gia_ManCiNum(pAig) + Gia_ManAndNum(pAig), p->pAig->nFront,
- 4.0*Gia_BitWordNum(2 * p->pAig->nFront)/(1<<20) );
+ 4.0*Abc_BitWordNum(2 * p->pAig->nFront)/(1<<20) );
printf( "AIG = %7.2f Mb. F-mem = %7.2f Mb. Other = %7.2f Mb. ",
12.0*Gia_ManObjNum(p->pAig)/(1<<20),
4.0*p->nWords*p->pAig->nFront/(1<<20),
@@ -691,8 +691,8 @@ Vec_Int_t * Saig_ManComputeSwitchProbs( Aig_Man_t * pAig, int nFrames, int nPref
Aig_ManForEachObj( pAig, pObj, i )
{
// if ( Aig_ObjIsPo(pObj) )
-// printf( "%d=%f\n", i, Aig_Int2Float( Vec_IntEntry(vSwitching, Gia_Lit2Var(pObj->iData)) ) );
- Vec_IntWriteEntry( vResult, i, Vec_IntEntry(vSwitching, Gia_Lit2Var(pObj->iData)) );
+// printf( "%d=%f\n", i, Abc_Int2Float( Vec_IntEntry(vSwitching, Abc_Lit2Var(pObj->iData)) ) );
+ Vec_IntWriteEntry( vResult, i, Vec_IntEntry(vSwitching, Abc_Lit2Var(pObj->iData)) );
}
// delete intermediate results
Vec_IntFree( vSwitching );
diff --git a/src/aig/gia/giaTsim.c b/src/aig/gia/giaTsim.c
index e829ff5b..c4fb7f26 100644
--- a/src/aig/gia/giaTsim.c
+++ b/src/aig/gia/giaTsim.c
@@ -84,15 +84,15 @@ Gia_ManTer_t * Gia_ManTerCreate( Gia_Man_t * pAig )
p = ABC_CALLOC( Gia_ManTer_t, 1 );
p->pAig = Gia_ManFront( pAig );
p->nIters = 300;
- p->pDataSim = ABC_ALLOC( unsigned, Gia_BitWordNum(2*p->pAig->nFront) );
- p->pDataSimCis = ABC_ALLOC( unsigned, Gia_BitWordNum(2*Gia_ManCiNum(p->pAig)) );
- p->pDataSimCos = ABC_ALLOC( unsigned, Gia_BitWordNum(2*Gia_ManCoNum(p->pAig)) );
+ p->pDataSim = ABC_ALLOC( unsigned, Abc_BitWordNum(2*p->pAig->nFront) );
+ p->pDataSimCis = ABC_ALLOC( unsigned, Abc_BitWordNum(2*Gia_ManCiNum(p->pAig)) );
+ p->pDataSimCos = ABC_ALLOC( unsigned, Abc_BitWordNum(2*Gia_ManCoNum(p->pAig)) );
// allocate storage for terminary states
- p->nStateWords = Gia_BitWordNum( 2*Gia_ManRegNum(pAig) );
+ p->nStateWords = Abc_BitWordNum( 2*Gia_ManRegNum(pAig) );
p->vStates = Vec_PtrAlloc( 1000 );
p->pCount0 = ABC_CALLOC( int, Gia_ManRegNum(pAig) );
p->pCountX = ABC_CALLOC( int, Gia_ManRegNum(pAig) );
- p->nBins = Gia_PrimeCudd( 500 );
+ p->nBins = Abc_PrimeCudd( 500 );
p->pBins = ABC_CALLOC( unsigned *, p->nBins );
p->vRetired = Vec_IntAlloc( 100 );
p->pRetired = ABC_CALLOC( char, Gia_ManRegNum(pAig) );
@@ -511,7 +511,7 @@ void Gia_ManTerAnalyze2( Vec_Ptr_t * vStates, int nRegs )
unsigned * pTemp, * pStates = (unsigned *)Vec_PtrPop( vStates );
int i, w, nZeros, nConsts, nStateWords;
// detect constant zero registers
- nStateWords = Gia_BitWordNum( 2*nRegs );
+ nStateWords = Abc_BitWordNum( 2*nRegs );
memset( pStates, 0, sizeof(int) * nStateWords );
Vec_PtrForEachEntry( unsigned *, vStates, pTemp, i )
for ( w = 0; w < nStateWords; w++ )
@@ -579,7 +579,7 @@ Vec_Ptr_t * Gia_ManTerTranspose( Gia_ManTer_t * p )
unsigned * pState, * pFlop;
int i, k, nFlopWords;
vFlops = Vec_PtrAlloc( 100 );
- nFlopWords = Gia_BitWordNum( 2*Vec_PtrSize(p->vStates) );
+ nFlopWords = Abc_BitWordNum( 2*Vec_PtrSize(p->vStates) );
for ( i = 0; i < Gia_ManRegNum(p->pAig); i++ )
{
if ( p->pCount0[i] == Vec_PtrSize(p->vStates) )
@@ -634,7 +634,7 @@ int * Gia_ManTerCreateMap( Gia_ManTer_t * p, int fVerbose )
Gia_Obj_t * pObj;
Vec_Int_t * vMapKtoI;
int i, iRepr, nFlopWords, Counter0 = 0, CounterE = 0;
- nFlopWords = Gia_BitWordNum( 2*Vec_PtrSize(p->vStates) );
+ nFlopWords = Abc_BitWordNum( 2*Vec_PtrSize(p->vStates) );
p->vFlops = Gia_ManTerTranspose( p );
pCi2Lit = ABC_FALLOC( int, Gia_ManCiNum(p->pAig) );
vMapKtoI = Vec_IntAlloc( 100 );
@@ -648,7 +648,7 @@ int * Gia_ManTerCreateMap( Gia_ManTer_t * p, int fVerbose )
if ( iRepr < 0 )
continue;
pObj = Gia_ManCi( p->pAig, Gia_ManPiNum(p->pAig)+Vec_IntEntry(vMapKtoI, iRepr) );
- pCi2Lit[Gia_ManPiNum(p->pAig)+i] = Gia_Var2Lit( Gia_ObjId( p->pAig, pObj ), 0 );
+ pCi2Lit[Gia_ManPiNum(p->pAig)+i] = Abc_Var2Lit( Gia_ObjId( p->pAig, pObj ), 0 );
CounterE++;
}
Vec_IntFree( vMapKtoI );
@@ -684,8 +684,8 @@ Gia_ManTer_t * Gia_ManTerSimulate( Gia_Man_t * pAig, int fVerbose )
pAig->nObjs, Gia_ManCiNum(pAig) + Gia_ManAndNum(pAig), p->pAig->nFront );
printf( "AIG = %7.2f Mb. F-mem = %7.2f Mb. Other = %7.2f Mb. ",
12.0*Gia_ManObjNum(p->pAig)/(1<<20),
- 4.0*Gia_BitWordNum(2 * p->pAig->nFront)/(1<<20),
- 4.0*Gia_BitWordNum(2 * (Gia_ManCiNum(pAig) + Gia_ManCoNum(pAig)))/(1<<20) );
+ 4.0*Abc_BitWordNum(2 * p->pAig->nFront)/(1<<20),
+ 4.0*Abc_BitWordNum(2 * (Gia_ManCiNum(pAig) + Gia_ManCoNum(pAig)))/(1<<20) );
ABC_PRT( "Time", clock() - clk );
}
// perform simulation
diff --git a/src/aig/gia/giaUtil.c b/src/aig/gia/giaUtil.c
index f19f0602..e56f6ea9 100644
--- a/src/aig/gia/giaUtil.c
+++ b/src/aig/gia/giaUtil.c
@@ -80,42 +80,6 @@ void Gia_ManRandomInfo( Vec_Ptr_t * vInfo, int iInputStart, int iWordStart, int
pInfo[w] = Gia_ManRandom(0);
}
-/**Function********************************************************************
-
- Synopsis [Returns the next prime >= p.]
-
- Description [Copied from CUDD, for stand-aloneness.]
-
- SideEffects [None]
-
- SeeAlso []
-
-******************************************************************************/
-unsigned int Gia_PrimeCudd( unsigned int p )
-{
- int i,pn;
-
- p--;
- do {
- p++;
- if (p&1) {
- pn = 1;
- i = 3;
- while ((unsigned) (i * i) <= p) {
- if (p % i == 0) {
- pn = 0;
- break;
- }
- i += 2;
- }
- } else {
- pn = 0;
- }
- } while (!pn);
- return(p);
-
-} /* end of Cudd_Prime */
-
/**Function*************************************************************
@@ -483,7 +447,7 @@ int Gia_ManLevelNum( Gia_Man_t * p )
else if ( Gia_ObjIsCo(pObj) )
{
Gia_ObjSetCoLevel( p, pObj );
- p->nLevels = ABC_MAX( p->nLevels, Gia_ObjLevel(p, pObj) );
+ p->nLevels = Abc_MaxInt( p->nLevels, Gia_ObjLevel(p, pObj) );
}
else
Gia_ObjSetLevel( p, pObj, 0 );
@@ -1150,11 +1114,11 @@ int Gia_ManVerifyCex( Gia_Man_t * pAig, Abc_Cex_t * p, int fDualOut )
int RetValue, i, k, iBit = 0;
Gia_ManCleanMark0(pAig);
Gia_ManForEachRo( pAig, pObj, i )
- pObj->fMark0 = Gia_InfoHasBit(p->pData, iBit++);
+ pObj->fMark0 = Abc_InfoHasBit(p->pData, iBit++);
for ( i = 0; i <= p->iFrame; i++ )
{
Gia_ManForEachPi( pAig, pObj, k )
- pObj->fMark0 = Gia_InfoHasBit(p->pData, iBit++);
+ pObj->fMark0 = Abc_InfoHasBit(p->pData, iBit++);
Gia_ManForEachAnd( pAig, pObj, k )
pObj->fMark0 = (Gia_ObjFanin0(pObj)->fMark0 ^ Gia_ObjFaninC0(pObj)) &
(Gia_ObjFanin1(pObj)->fMark0 ^ Gia_ObjFaninC1(pObj));
@@ -1194,12 +1158,12 @@ int Gia_ManFindFailedPoCex( Gia_Man_t * pAig, Abc_Cex_t * p, int nOutputs )
assert( Gia_ManPiNum(pAig) == p->nPis );
Gia_ManCleanMark0(pAig);
// Gia_ManForEachRo( pAig, pObj, i )
-// pObj->fMark0 = Gia_InfoHasBit(p->pData, iBit++);
+// pObj->fMark0 = Abc_InfoHasBit(p->pData, iBit++);
iBit = p->nRegs;
for ( i = 0; i <= p->iFrame; i++ )
{
Gia_ManForEachPi( pAig, pObj, k )
- pObj->fMark0 = Gia_InfoHasBit(p->pData, iBit++);
+ pObj->fMark0 = Abc_InfoHasBit(p->pData, iBit++);
Gia_ManForEachAnd( pAig, pObj, k )
pObj->fMark0 = (Gia_ObjFanin0(pObj)->fMark0 ^ Gia_ObjFaninC0(pObj)) &
(Gia_ObjFanin1(pObj)->fMark0 ^ Gia_ObjFaninC1(pObj));
diff --git a/src/aig/hop/cudd2.c b/src/aig/hop/cudd2.c
index 3ad44e4c..57a85dc8 100644
--- a/src/aig/hop/cudd2.c
+++ b/src/aig/hop/cudd2.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "hop.h"
-#include "st.h"
+#include "misc/st/st.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/hop/cudd2.h b/src/aig/hop/cudd2.h
index 2382b22f..e38118f4 100644
--- a/src/aig/hop/cudd2.h
+++ b/src/aig/hop/cudd2.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __CUDD2_H__
-#define __CUDD2_H__
+#ifndef ABC__aig__hop__cudd2_h
+#define ABC__aig__hop__cudd2_h
// HA: Added for printing messages
diff --git a/src/aig/hop/hop.h b/src/aig/hop/hop.h
index a634f136..eff904fd 100644
--- a/src/aig/hop/hop.h
+++ b/src/aig/hop/hop.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __HOP_H__
-#define __HOP_H__
+#ifndef ABC__aig__hop__hop_h
+#define ABC__aig__hop__hop_h
////////////////////////////////////////////////////////////////////////
@@ -32,7 +32,7 @@
#include <assert.h>
#include <time.h>
-#include "vec.h"
+#include "src/misc/vec/vec.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
@@ -186,7 +186,7 @@ static inline Hop_Obj_t * Hop_ObjChild1( Hop_Obj_t * pObj ) { return pObj-
static inline Hop_Obj_t * Hop_ObjChild0Copy( Hop_Obj_t * pObj ) { assert( !Hop_IsComplement(pObj) ); return Hop_ObjFanin0(pObj)? Hop_NotCond((Hop_Obj_t *)Hop_ObjFanin0(pObj)->pData, Hop_ObjFaninC0(pObj)) : NULL; }
static inline Hop_Obj_t * Hop_ObjChild1Copy( Hop_Obj_t * pObj ) { assert( !Hop_IsComplement(pObj) ); return Hop_ObjFanin1(pObj)? Hop_NotCond((Hop_Obj_t *)Hop_ObjFanin1(pObj)->pData, Hop_ObjFaninC1(pObj)) : NULL; }
static inline int Hop_ObjLevel( Hop_Obj_t * pObj ) { return pObj->nRefs; }
-static inline int Hop_ObjLevelNew( Hop_Obj_t * pObj ) { return 1 + Hop_ObjIsExor(pObj) + ABC_MAX(Hop_ObjFanin0(pObj)->nRefs, Hop_ObjFanin1(pObj)->nRefs); }
+static inline int Hop_ObjLevelNew( Hop_Obj_t * pObj ) { return 1 + Hop_ObjIsExor(pObj) + Abc_MaxInt(Hop_ObjFanin0(pObj)->nRefs, Hop_ObjFanin1(pObj)->nRefs); }
static inline int Hop_ObjPhaseCompl( Hop_Obj_t * pObj ) { return Hop_IsComplement(pObj)? !Hop_Regular(pObj)->fPhase : pObj->fPhase; }
static inline void Hop_ObjClean( Hop_Obj_t * pObj ) { memset( pObj, 0, sizeof(Hop_Obj_t) ); }
static inline int Hop_ObjWhatFanin( Hop_Obj_t * pObj, Hop_Obj_t * pFanin )
diff --git a/src/aig/hop/hopDfs.c b/src/aig/hop/hopDfs.c
index be1e6c0b..f6f8c507 100644
--- a/src/aig/hop/hopDfs.c
+++ b/src/aig/hop/hopDfs.c
@@ -128,13 +128,13 @@ int Hop_ManCountLevels( Hop_Man_t * p )
{
Level0 = (int)(ABC_PTRUINT_T)Hop_ObjFanin0(pObj)->pData;
Level1 = (int)(ABC_PTRUINT_T)Hop_ObjFanin1(pObj)->pData;
- pObj->pData = (void *)(ABC_PTRUINT_T)(1 + Hop_ObjIsExor(pObj) + ABC_MAX(Level0, Level1));
+ pObj->pData = (void *)(ABC_PTRUINT_T)(1 + Hop_ObjIsExor(pObj) + Abc_MaxInt(Level0, Level1));
}
Vec_PtrFree( vNodes );
// get levels of the POs
LevelsMax = 0;
Hop_ManForEachPo( p, pObj, i )
- LevelsMax = ABC_MAX( LevelsMax, (int)(ABC_PTRUINT_T)Hop_ObjFanin0(pObj)->pData );
+ LevelsMax = Abc_MaxInt( LevelsMax, (int)(ABC_PTRUINT_T)Hop_ObjFanin0(pObj)->pData );
return LevelsMax;
}
diff --git a/src/aig/hop/hopTable.c b/src/aig/hop/hopTable.c
index 8148a125..7db93f62 100644
--- a/src/aig/hop/hopTable.c
+++ b/src/aig/hop/hopTable.c
@@ -52,7 +52,6 @@ static Hop_Obj_t ** Hop_TableFind( Hop_Man_t * p, Hop_Obj_t * pObj )
}
static void Hop_TableResize( Hop_Man_t * p );
-static unsigned int Cudd_PrimeAig( unsigned int p );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
@@ -174,7 +173,7 @@ clk = clock();
pTableOld = p->pTable;
nTableSizeOld = p->nTableSize;
// get the new table
- p->nTableSize = Cudd_PrimeAig( 2 * Hop_ManNodeNum(p) );
+ p->nTableSize = Abc_PrimeCudd( 2 * Hop_ManNodeNum(p) );
p->pTable = ABC_ALLOC( Hop_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Hop_Obj_t *) * p->nTableSize );
// rehash the entries from the old table
@@ -223,41 +222,6 @@ void Hop_TableProfile( Hop_Man_t * p )
}
}
-/**Function********************************************************************
-
- Synopsis [Returns the next prime &gt;= p.]
-
- Description [Copied from CUDD, for stand-aloneness.]
-
- SideEffects [None]
-
- SeeAlso []
-
-******************************************************************************/
-unsigned int Cudd_PrimeAig( unsigned int p)
-{
- int i,pn;
- p--;
- do {
- p++;
- if (p&1) {
- pn = 1;
- i = 3;
- while ((unsigned) (i * i) <= p) {
- if (p % i == 0) {
- pn = 0;
- break;
- }
- i += 2;
- }
- } else {
- pn = 0;
- }
- } while (!pn);
- return(p);
-
-} /* end of Cudd_Prime */
-
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/int/module.make b/src/aig/int/module.make
deleted file mode 100644
index 8e0e4319..00000000
--- a/src/aig/int/module.make
+++ /dev/null
@@ -1,11 +0,0 @@
-SRC += src/aig/int/intCheck.c \
- src/aig/int/intContain.c \
- src/aig/int/intCore.c \
- src/aig/int/intCtrex.c \
- src/aig/int/intDup.c \
- src/aig/int/intFrames.c \
- src/aig/int/intInter.c \
- src/aig/int/intM114.c \
- src/aig/int/intM114p.c \
- src/aig/int/intMan.c \
- src/aig/int/intUtil.c
diff --git a/src/aig/ioa/ioa.h b/src/aig/ioa/ioa.h
index 46dbda09..b86bc13a 100644
--- a/src/aig/ioa/ioa.h
+++ b/src/aig/ioa/ioa.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __IOA_H__
-#define __IOA_H__
+#ifndef ABC__aig__ioa__ioa_h
+#define ABC__aig__ioa__ioa_h
////////////////////////////////////////////////////////////////////////
@@ -32,9 +32,9 @@
#include <assert.h>
#include <time.h>
-#include "vec.h"
+#include "src/misc/vec/vec.h"
//#include "bar.h"
-#include "aig.h"
+#include "src/aig/aig/aig.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/aig/ioa/ioaReadAig.c b/src/aig/ioa/ioaReadAig.c
index 17c93e58..a1f09edf 100644
--- a/src/aig/ioa/ioaReadAig.c
+++ b/src/aig/ioa/ioaReadAig.c
@@ -392,7 +392,7 @@ Aig_Man_t * Ioa_ReadAigerFromMemory( char * pContents, int nFileSize, int fCheck
pCur++;
// read model name
ABC_FREE( pNew->pName );
- pNew->pName = Aig_UtilStrsav( pCur );
+ pNew->pName = Abc_UtilStrsav( pCur );
}
}
@@ -447,7 +447,7 @@ Aig_Man_t * Ioa_ReadAiger( char * pFileName, int fCheck )
if ( pNew )
{
pName = Ioa_FileNameGeneric( pFileName );
- pNew->pName = Aig_UtilStrsav( pName );
+ pNew->pName = Abc_UtilStrsav( pName );
// pNew->pSpec = Ioa_UtilStrsav( pFileName );
ABC_FREE( pName );
}
diff --git a/src/aig/ioa/ioaUtil.c b/src/aig/ioa/ioaUtil.c
index 06034956..a2748382 100644
--- a/src/aig/ioa/ioaUtil.c
+++ b/src/aig/ioa/ioaUtil.c
@@ -73,7 +73,7 @@ int Ioa_FileSize( char * pFileName )
char * Ioa_FileNameGeneric( char * FileName )
{
char * pDot, * pRes;
- pRes = Aig_UtilStrsav( FileName );
+ pRes = Abc_UtilStrsav( FileName );
if ( (pDot = strrchr( pRes, '.' )) )
*pDot = 0;
return pRes;
diff --git a/src/aig/ivy/attr.h b/src/aig/ivy/attr.h
index b65906cf..07586832 100644
--- a/src/aig/ivy/attr.h
+++ b/src/aig/ivy/attr.h
@@ -18,15 +18,15 @@
***********************************************************************/
-#ifndef __ATTR_H__
-#define __ATTR_H__
+#ifndef ABC__aig__ivy__attr_h
+#define ABC__aig__ivy__attr_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "extra.h"
+#include "misc/extra/extra.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/aig/ivy/ivy.h b/src/aig/ivy/ivy.h
index 870c0906..8d062134 100644
--- a/src/aig/ivy/ivy.h
+++ b/src/aig/ivy/ivy.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __IVY_H__
-#define __IVY_H__
+#ifndef ABC__aig__ivy__ivy_h
+#define ABC__aig__ivy__ivy_h
////////////////////////////////////////////////////////////////////////
@@ -27,8 +27,8 @@
////////////////////////////////////////////////////////////////////////
#include <stdio.h>
-#include "extra.h"
-#include "vec.h"
+#include "src/misc/extra/extra.h"
+#include "src/misc/vec/vec.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/aig/ivy/ivyFraig.c b/src/aig/ivy/ivyFraig.c
index 7cf97132..2bc6f0de 100644
--- a/src/aig/ivy/ivyFraig.c
+++ b/src/aig/ivy/ivyFraig.c
@@ -18,8 +18,10 @@
***********************************************************************/
-#include "satSolver.h"
-#include "extra.h"
+#include <math.h>
+
+#include "src/sat/bsat/satSolver.h"
+#include "src/misc/extra/extra.h"
#include "ivy.h"
ABC_NAMESPACE_IMPL_START
@@ -2649,7 +2651,7 @@ p->timeTrav += clock() - clk;
ABC_NAMESPACE_IMPL_END
-#include "cuddInt.h"
+#include "src/bdd/cudd/cuddInt.h"
ABC_NAMESPACE_IMPL_START
@@ -2807,7 +2809,7 @@ int Ivy_FraigNodesAreEquivBdd( Ivy_Obj_t * pObj1, Ivy_Obj_t * pObj2 )
ABC_NAMESPACE_IMPL_END
-#include "aig.h"
+#include "src/aig/aig/aig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/ivy/ivyRwr.c b/src/aig/ivy/ivyRwr.c
index 4e79e87f..39131210 100644
--- a/src/aig/ivy/ivyRwr.c
+++ b/src/aig/ivy/ivyRwr.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "ivy.h"
-#include "deco.h"
-#include "rwt.h"
+#include "src/bool/deco/deco.h"
+#include "src/opt/rwt/rwt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/ivy/ivySeq.c b/src/aig/ivy/ivySeq.c
index 7f9674ac..283bf9fe 100644
--- a/src/aig/ivy/ivySeq.c
+++ b/src/aig/ivy/ivySeq.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "ivy.h"
-#include "deco.h"
-#include "rwt.h"
+#include "src/bool/deco/deco.h"
+#include "src/opt/rwt/rwt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/ivy/ivyTable.c b/src/aig/ivy/ivyTable.c
index 0fe5c7ba..d2c1ab9a 100644
--- a/src/aig/ivy/ivyTable.c
+++ b/src/aig/ivy/ivyTable.c
@@ -212,7 +212,7 @@ clk = clock();
pTableOld = p->pTable;
nTableSizeOld = p->nTableSize;
// get the new table
- p->nTableSize = Cudd_PrimeAig( 5 * Ivy_ManHashObjNum(p) );
+ p->nTableSize = Abc_PrimeCudd( 5 * Ivy_ManHashObjNum(p) );
p->pTable = ABC_ALLOC( int, p->nTableSize );
memset( p->pTable, 0, sizeof(int) * p->nTableSize );
// rehash the entries from the old table
@@ -261,41 +261,6 @@ void Ivy_TableProfile( Ivy_Man_t * p )
}
}
-/**Function********************************************************************
-
- Synopsis [Returns the next prime &gt;= p.]
-
- Description [Copied from CUDD, for stand-aloneness.]
-
- SideEffects [None]
-
- SeeAlso []
-
-******************************************************************************/
-unsigned int Cudd_PrimeAig( unsigned int p)
-{
- int i,pn;
-
- p--;
- do {
- p++;
- if (p&1) {
- pn = 1;
- i = 3;
- while ((unsigned) (i * i) <= p) {
- if (p % i == 0) {
- pn = 0;
- break;
- }
- i += 2;
- }
- } else {
- pn = 0;
- }
- } while (!pn);
- return(p);
-
-} /* end of Cudd_Prime */
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
diff --git a/src/aig/kit/module.make b/src/aig/kit/module.make
deleted file mode 100644
index a592aeec..00000000
--- a/src/aig/kit/module.make
+++ /dev/null
@@ -1,11 +0,0 @@
-SRC += src/aig/kit/kitAig.c \
- src/aig/kit/kitBdd.c \
- src/aig/kit/kitCloud.c src/aig/kit/cloud.c \
- src/aig/kit/kitDsd.c \
- src/aig/kit/kitFactor.c \
- src/aig/kit/kitGraph.c \
- src/aig/kit/kitHop.c \
- src/aig/kit/kitIsop.c \
- src/aig/kit/kitPla.c \
- src/aig/kit/kitSop.c \
- src/aig/kit/kitTruth.c
diff --git a/src/aig/live/module.make b/src/aig/live/module.make
deleted file mode 100644
index 46a9ed3c..00000000
--- a/src/aig/live/module.make
+++ /dev/null
@@ -1,3 +0,0 @@
-SRC += src/aig/live/liveness.c \
- src/aig/live/liveness_sim.c \
- src/aig/live/ltl_parser.c
diff --git a/src/aig/llb/module.make b/src/aig/llb/module.make
deleted file mode 100644
index 1e8ea974..00000000
--- a/src/aig/llb/module.make
+++ /dev/null
@@ -1,23 +0,0 @@
-SRC += src/aig/llb/llb.c \
- src/aig/llb/llb1Cluster.c \
- src/aig/llb/llb1Constr.c \
- src/aig/llb/llb1Core.c \
- src/aig/llb/llb1Group.c \
- src/aig/llb/llb1Hint.c \
- src/aig/llb/llb1Man.c \
- src/aig/llb/llb1Matrix.c \
- src/aig/llb/llb1Pivot.c \
- src/aig/llb/llb1Reach.c \
- src/aig/llb/llb1Sched.c \
- src/aig/llb/llb2Bad.c \
- src/aig/llb/llb2Core.c \
- src/aig/llb/llb2Driver.c \
- src/aig/llb/llb2Dump.c \
- src/aig/llb/llb2Flow.c \
- src/aig/llb/llb2Image.c \
- src/aig/llb/llb3Image.c \
- src/aig/llb/llb3Nonlin.c \
- src/aig/llb/llb4Cex.c \
- src/aig/llb/llb4Image.c \
- src/aig/llb/llb4Nonlin.c \
- src/aig/llb/llb4Sweep.c
diff --git a/src/aig/mem/module.make b/src/aig/mem/module.make
deleted file mode 100644
index ae6fcbe4..00000000
--- a/src/aig/mem/module.make
+++ /dev/null
@@ -1 +0,0 @@
-SRC += src/aig/mem/mem.c
diff --git a/src/aig/mfx/mfx.h b/src/aig/mfx/mfx.h
deleted file mode 100644
index 9d2c6795..00000000
--- a/src/aig/mfx/mfx.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/**CFile****************************************************************
-
- FileName [mfx.h]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [The good old minimization with complete don't-cares.]
-
- Synopsis [External declarations.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: mfx.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __MFX_H__
-#define __MFX_H__
-
-
-////////////////////////////////////////////////////////////////////////
-/// INCLUDES ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// PARAMETERS ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// BASIC TYPES ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Mfx_Par_t_ Mfx_Par_t;
-struct Mfx_Par_t_
-{
- // general parameters
- int nWinTfoLevs; // the maximum fanout levels
- int nFanoutsMax; // the maximum number of fanouts
- int nDepthMax; // the maximum number of logic levels
- int nDivMax; // the maximum number of divisors
- int nWinSizeMax; // the maximum size of the window
- int nGrowthLevel; // the maximum allowed growth in level
- int nBTLimit; // the maximum number of conflicts in one SAT run
- int fResub; // performs resubstitution
- int fArea; // performs optimization for area
- int fMoreEffort; // performs high-affort minimization
- int fSwapEdge; // performs edge swapping
- int fDelay; // performs optimization for delay
- int fPower; // performs power-aware optimization
- int fVerbose; // enable basic stats
- int fVeryVerbose; // enable detailed stats
-};
-
-////////////////////////////////////////////////////////////////////////
-/// MACRO DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== mfxCore.c ==========================================================*/
-extern void Mfx_ParsDefault( Mfx_Par_t * pPars );
-extern int Mfx_Perform( Nwk_Man_t * pNtk, Mfx_Par_t * pPars, If_Lib_t * pLutLib );
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/mfx/mfxCore.c b/src/aig/mfx/mfxCore.c
deleted file mode 100644
index 77f35580..00000000
--- a/src/aig/mfx/mfxCore.c
+++ /dev/null
@@ -1,393 +0,0 @@
-/**CFile****************************************************************
-
- FileName [mfxCore.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [The good old minimization with complete don't-cares.]
-
- Synopsis [Core procedures of this package.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: mfxCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-#include "bar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Mfx_ParsDefault( Mfx_Par_t * pPars )
-{
- pPars->nWinTfoLevs = 2;
- pPars->nFanoutsMax = 10;
- pPars->nDepthMax = 20;
- pPars->nDivMax = 250;
- pPars->nWinSizeMax = 300;
- pPars->nGrowthLevel = 0;
- pPars->nBTLimit = 5000;
- pPars->fResub = 1;
- pPars->fArea = 0;
- pPars->fMoreEffort = 0;
- pPars->fSwapEdge = 0;
- pPars->fPower = 0;
- pPars->fVerbose = 0;
- pPars->fVeryVerbose = 0;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_Resub( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
- int clk;
- p->nNodesTried++;
- // prepare data structure for this node
- Mfx_ManClean( p );
- // compute window roots, window support, and window nodes
-clk = clock();
- p->vRoots = Mfx_ComputeRoots( pNode, p->pPars->nWinTfoLevs, p->pPars->nFanoutsMax );
- p->vSupp = Nwk_ManSupportNodes( p->pNtk, (Nwk_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
- p->vNodes = Nwk_ManDfsNodes( p->pNtk, (Nwk_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
-p->timeWin += clock() - clk;
- if ( p->pPars->nWinSizeMax && Vec_PtrSize(p->vNodes) > p->pPars->nWinSizeMax )
- return 1;
- // compute the divisors of the window
-clk = clock();
- p->vDivs = Mfx_ComputeDivisors( p, pNode, Nwk_ObjRequired(pNode) - If_LutLibSlowestPinDelay(pNode->pMan->pLutLib) );
-// p->vDivs = Mfx_ComputeDivisors( p, pNode, ABC_INFINITY );
- p->nTotalDivs += Vec_PtrSize(p->vDivs);
-p->timeDiv += clock() - clk;
- // construct AIG for the window
-clk = clock();
- p->pAigWin = Mfx_ConstructAig( p, pNode );
-p->timeAig += clock() - clk;
- // translate it into CNF
-clk = clock();
- p->pCnf = Cnf_DeriveSimple( p->pAigWin, 1 + Vec_PtrSize(p->vDivs) );
-p->timeCnf += clock() - clk;
- // create the SAT problem
-clk = clock();
- p->pSat = Mfx_CreateSolverResub( p, NULL, 0, 0 );
- if ( p->pSat == NULL )
- {
- p->nNodesBad++;
- return 1;
- }
- // solve the SAT problem
- if ( p->pPars->fPower )
- Mfx_EdgePower( p, pNode );
- else if ( p->pPars->fSwapEdge )
- Mfx_EdgeSwapEval( p, pNode );
- else
- {
- Mfx_ResubNode( p, pNode );
- if ( p->pPars->fMoreEffort )
- Mfx_ResubNode2( p, pNode );
- }
-p->timeSat += clock() - clk;
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_Node( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
- Hop_Obj_t * pObj;
- int RetValue;
- float dProb;
- int nGain, clk;
- p->nNodesTried++;
- // prepare data structure for this node
- Mfx_ManClean( p );
- // compute window roots, window support, and window nodes
-clk = clock();
- p->vRoots = Mfx_ComputeRoots( pNode, p->pPars->nWinTfoLevs, p->pPars->nFanoutsMax );
- p->vSupp = Nwk_ManSupportNodes( p->pNtk, (Nwk_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
- p->vNodes = Nwk_ManDfsNodes( p->pNtk, (Nwk_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
-p->timeWin += clock() - clk;
- // count the number of patterns
-// p->dTotalRatios += Mfx_ConstraintRatio( p, pNode );
- // construct AIG for the window
-clk = clock();
- p->pAigWin = Mfx_ConstructAig( p, pNode );
-p->timeAig += clock() - clk;
- // translate it into CNF
-clk = clock();
- p->pCnf = Cnf_DeriveSimple( p->pAigWin, Nwk_ObjFaninNum(pNode) );
-p->timeCnf += clock() - clk;
- // create the SAT problem
-clk = clock();
- p->pSat = (sat_solver *)Cnf_DataWriteIntoSolver( p->pCnf, 1, 0 );
- if ( p->pSat == NULL )
- return 0;
- // solve the SAT problem
- RetValue = Mfx_SolveSat( p, pNode );
- p->nTotConfLevel += p->pSat->stats.conflicts;
-p->timeSat += clock() - clk;
- if ( RetValue == 0 )
- {
- p->nTimeOutsLevel++;
- p->nTimeOuts++;
- return 0;
- }
- // minimize the local function of the node using bi-decomposition
- assert( p->nFanins == Nwk_ObjFaninNum(pNode) );
- dProb = p->pPars->fPower? ((float *)p->vProbs->pArray)[pNode->Id] : -1.0;
- pObj = Nwk_NodeIfNodeResyn( p->pManDec, pNode->pMan->pManHop, pNode->pFunc, p->nFanins, p->vTruth, p->uCare, dProb );
- nGain = Hop_DagSize(pNode->pFunc) - Hop_DagSize(pObj);
- if ( nGain >= 0 )
- {
- p->nNodesDec++;
- p->nNodesGained += nGain;
- p->nNodesGainedLevel += nGain;
- pNode->pFunc = pObj;
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Marks nodes for power-optimization.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Int_t * Nwk_ManPowerEstimate( Nwk_Man_t * pNtk, int fProbOne )
-{
- extern Vec_Int_t * Saig_ManComputeSwitchProbs( Aig_Man_t * p, int nFrames, int nPref, int fProbOne );
- Vec_Int_t * vProbs;
- Vec_Int_t * vSwitching;
- float * pProbability;
- float * pSwitching;
- Aig_Man_t * pAig;
- Aig_Obj_t * pObjAig;
- Nwk_Obj_t * pObjAbc;
- int i;
- // start the resulting array
- vProbs = Vec_IntStart( Nwk_ManObjNumMax(pNtk) );
- pProbability = (float *)vProbs->pArray;
- // map network into an AIG
- pAig = Nwk_ManStrash( pNtk );
- vSwitching = Saig_ManComputeSwitchProbs( pAig, 48, 16, fProbOne );
- pSwitching = (float *)vSwitching->pArray;
- Nwk_ManForEachObj( pNtk, pObjAbc, i )
- {
- if ( (pObjAig = Aig_Regular((Aig_Obj_t *)pObjAbc->pCopy)) )
- pProbability[pObjAbc->Id] = pSwitching[pObjAig->Id];
- }
- Vec_IntFree( vSwitching );
- Aig_ManStop( pAig );
- return vProbs;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_Perform( Nwk_Man_t * pNtk, Mfx_Par_t * pPars, If_Lib_t * pLutLib )
-{
- Bdc_Par_t Pars = {0}, * pDecPars = &Pars;
- Bar_Progress_t * pProgress;
- Mfx_Man_t * p;
- Nwk_Obj_t * pObj;
- Vec_Vec_t * vLevels;
- Vec_Ptr_t * vNodes;
- int i, k, nNodes, nFaninMax, clk = clock(), clk2;
- int nTotalNodesBeg = Nwk_ManNodeNum(pNtk);
- int nTotalEdgesBeg = Nwk_ManGetTotalFanins(pNtk);
-
- // prepare the network for processing
- Nwk_ManRemoveDupFanins( pNtk, 0 );
- assert( Nwk_ManCheck( pNtk ) );
-
- // check limits on the number of fanins
- nFaninMax = Nwk_ManGetFaninMax(pNtk);
- if ( pPars->fResub )
- {
- if ( nFaninMax > 8 )
- {
- printf( "Nodes with more than %d fanins will node be processed.\n", 8 );
- nFaninMax = 8;
- }
- }
- else
- {
- if ( nFaninMax > MFX_FANIN_MAX )
- {
- printf( "Nodes with more than %d fanins will node be processed.\n", MFX_FANIN_MAX );
- nFaninMax = MFX_FANIN_MAX;
- }
- }
- if ( pLutLib && pLutLib->LutMax < nFaninMax )
- {
- printf( "The selected LUT library with max LUT size (%d) cannot be used to compute timing for network with %d-input nodes. Using unit-delay model.\n", pLutLib->LutMax, nFaninMax );
- pLutLib = NULL;
- }
- pNtk->pLutLib = pLutLib;
-
- // compute levels
- Nwk_ManLevel( pNtk );
- assert( Nwk_ManVerifyLevel( pNtk ) );
- // compute delay trace with white-boxes
- Nwk_ManDelayTraceLut( pNtk );
- assert( Nwk_ManVerifyTiming( pNtk ) );
-
- // start the manager
- p = Mfx_ManAlloc( pPars );
- p->pNtk = pNtk;
- p->nFaninMax = nFaninMax;
- if ( !pPars->fResub )
- {
- pDecPars->nVarsMax = (nFaninMax < 3) ? 3 : nFaninMax;
- pDecPars->fVerbose = pPars->fVerbose;
- p->vTruth = Vec_IntAlloc( 0 );
- p->pManDec = Bdc_ManAlloc( pDecPars );
- }
-
- // precomputer power-aware metrics
- if ( pPars->fPower )
- {
- extern Vec_Int_t * Nwk_ManPowerEstimate( Nwk_Man_t * pNtk, int fProbOne );
- if ( pPars->fResub )
- p->vProbs = Nwk_ManPowerEstimate( pNtk, 0 );
- else
- p->vProbs = Nwk_ManPowerEstimate( pNtk, 1 );
- printf( "Total switching before = %7.2f.\n", Nwl_ManComputeTotalSwitching(pNtk) );
- }
-
- // compute don't-cares for each node
- nNodes = 0;
- p->nTotalNodesBeg = nTotalNodesBeg;
- p->nTotalEdgesBeg = nTotalEdgesBeg;
- if ( pPars->fResub )
- {
- pProgress = Bar_ProgressStart( stdout, Nwk_ManObjNumMax(pNtk) );
- Nwk_ManForEachNode( pNtk, pObj, i )
- {
- if ( p->pPars->nDepthMax && pObj->Level > p->pPars->nDepthMax )
- continue;
- if ( Nwk_ObjFaninNum(pObj) < 2 || Nwk_ObjFaninNum(pObj) > nFaninMax )
- continue;
- if ( !p->pPars->fVeryVerbose )
- Bar_ProgressUpdate( pProgress, i, NULL );
- Mfx_Resub( p, pObj );
- }
- Bar_ProgressStop( pProgress );
- }
- else
- {
- pProgress = Bar_ProgressStart( stdout, Nwk_ManNodeNum(pNtk) );
- vLevels = Nwk_ManLevelize( pNtk );
-
- Vec_VecForEachLevelStart( vLevels, vNodes, k, 1 )
- {
- if ( !p->pPars->fVeryVerbose )
- Bar_ProgressUpdate( pProgress, nNodes, NULL );
- p->nNodesGainedLevel = 0;
- p->nTotConfLevel = 0;
- p->nTimeOutsLevel = 0;
- clk2 = clock();
- Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pObj, i )
- {
- if ( p->pPars->nDepthMax && pObj->Level > p->pPars->nDepthMax )
- break;
- if ( Nwk_ObjFaninNum(pObj) < 2 || Nwk_ObjFaninNum(pObj) > nFaninMax )
- continue;
- Mfx_Node( p, pObj );
- }
- nNodes += Vec_PtrSize(vNodes);
- if ( pPars->fVerbose )
- {
- printf( "Lev = %2d. Node = %5d. Ave gain = %5.2f. Ave conf = %5.2f. T/o = %6.2f %% ",
- k, Vec_PtrSize(vNodes),
- 1.0*p->nNodesGainedLevel/Vec_PtrSize(vNodes),
- 1.0*p->nTotConfLevel/Vec_PtrSize(vNodes),
- 100.0*p->nTimeOutsLevel/Vec_PtrSize(vNodes) );
- ABC_PRT( "Time", clock() - clk2 );
- }
- }
-
- Bar_ProgressStop( pProgress );
- Vec_VecFree( vLevels );
- }
- p->nTotalNodesEnd = Nwk_ManNodeNum(pNtk);
- p->nTotalEdgesEnd = Nwk_ManGetTotalFanins(pNtk);
-
- assert( Nwk_ManVerifyLevel( pNtk ) );
- assert( Nwk_ManVerifyTiming( pNtk ) );
-
- if ( pPars->fPower )
- printf( "Total switching after = %7.2f.\n", Nwl_ManComputeTotalSwitching(pNtk) );
-
- // free the manager
- p->timeTotal = clock() - clk;
- Mfx_ManStop( p );
-
- // update network into the topological order
-// if ( pPars->fResub )
-// Nwk_ManTopological( pNtk );
- return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxDiv.c b/src/aig/mfx/mfxDiv.c
deleted file mode 100644
index 35872da2..00000000
--- a/src/aig/mfx/mfxDiv.c
+++ /dev/null
@@ -1,308 +0,0 @@
-/**CFile****************************************************************
-
- FileName [mfxDiv.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [The good old minimization with complete don't-cares.]
-
- Synopsis [Procedures to compute candidate divisors.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: mfxDiv.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Marks and collects the TFI cone of the node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_MfxWinMarkTfi_rec( Nwk_Obj_t * pObj, Vec_Ptr_t * vCone )
-{
- Nwk_Obj_t * pFanin;
- int i;
- if ( Nwk_ObjIsTravIdCurrent(pObj) )
- return;
- Nwk_ObjSetTravIdCurrent( pObj );
- if ( Nwk_ObjIsCi(pObj) )
- {
- Vec_PtrPush( vCone, pObj );
- return;
- }
- assert( Nwk_ObjIsNode(pObj) );
- // visit the fanins of the node
- Nwk_ObjForEachFanin( pObj, pFanin, i )
- Abc_MfxWinMarkTfi_rec( pFanin, vCone );
- Vec_PtrPush( vCone, pObj );
-}
-
-/**Function*************************************************************
-
- Synopsis [Marks and collects the TFI cone of the node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Abc_MfxWinMarkTfi( Nwk_Obj_t * pNode )
-{
- Vec_Ptr_t * vCone;
- vCone = Vec_PtrAlloc( 100 );
- Abc_MfxWinMarkTfi_rec( pNode, vCone );
- return vCone;
-}
-
-/**Function*************************************************************
-
- Synopsis [Marks the TFO of the collected nodes up to the given level.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_MfxWinSweepLeafTfo_rec( Nwk_Obj_t * pObj, float tArrivalMax )
-{
- Nwk_Obj_t * pFanout;
- int i;
- if ( Nwk_ObjIsCo(pObj) || Nwk_ObjArrival(pObj) > tArrivalMax )
- return;
- if ( Nwk_ObjIsTravIdCurrent(pObj) )
- return;
- Nwk_ObjSetTravIdCurrent( pObj );
- Nwk_ObjForEachFanout( pObj, pFanout, i )
- Abc_MfxWinSweepLeafTfo_rec( pFanout, tArrivalMax );
-}
-
-/**Function*************************************************************
-
- Synopsis [Dereferences the node's MFFC.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_MfxNodeDeref_rec( Nwk_Obj_t * pNode )
-{
- Nwk_Obj_t * pFanin;
- int i, Counter = 1;
- if ( Nwk_ObjIsCi(pNode) )
- return 0;
- Nwk_ObjSetTravIdCurrent( pNode );
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- {
- assert( pFanin->nFanouts > 0 );
- if ( --pFanin->nFanouts == 0 )
- Counter += Abc_MfxNodeDeref_rec( pFanin );
- }
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [References the node's MFFC.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_MfxNodeRef_rec( Nwk_Obj_t * pNode )
-{
- Nwk_Obj_t * pFanin;
- int i, Counter = 1;
- if ( Nwk_ObjIsCi(pNode) )
- return 0;
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- {
- if ( pFanin->nFanouts++ == 0 )
- Counter += Abc_MfxNodeRef_rec( pFanin );
- }
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Labels MFFC of the node with the current trav ID.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_MfxWinVisitMffc( Nwk_Obj_t * pNode )
-{
- int Count1, Count2;
- assert( Nwk_ObjIsNode(pNode) );
- // dereference the node (mark with the current trav ID)
- Count1 = Abc_MfxNodeDeref_rec( pNode );
- // reference it back
- Count2 = Abc_MfxNodeRef_rec( pNode );
- assert( Count1 == Count2 );
- return Count1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes divisors and add them to nodes in the window.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Mfx_ComputeDivisors( Mfx_Man_t * p, Nwk_Obj_t * pNode, float tArrivalMax )
-{
- Vec_Ptr_t * vCone, * vDivs;
- Nwk_Obj_t * pObj, * pFanout, * pFanin;
- int k, f, m;
- int nDivsPlus = 0, nTrueSupp;
- assert( p->vDivs == NULL );
-
- // mark the TFI with the current trav ID
- Nwk_ManIncrementTravId( pNode->pMan );
- vCone = Abc_MfxWinMarkTfi( pNode );
-
- // count the number of PIs
- nTrueSupp = 0;
- Vec_PtrForEachEntry( Nwk_Obj_t *, vCone, pObj, k )
- nTrueSupp += Nwk_ObjIsCi(pObj);
-// printf( "%d(%d) ", Vec_PtrSize(p->vSupp), m );
-
- // mark with the current trav ID those nodes that should not be divisors:
- // (1) the node and its TFO
- // (2) the MFFC of the node
- // (3) the node's fanins (these are treated as a special case)
- Nwk_ManIncrementTravId( pNode->pMan );
- Abc_MfxWinSweepLeafTfo_rec( pNode, tArrivalMax );
- Abc_MfxWinVisitMffc( pNode );
- Nwk_ObjForEachFanin( pNode, pObj, k )
- Nwk_ObjSetTravIdCurrent( pObj );
-
- // at this point the nodes are marked with two trav IDs:
- // nodes to be collected as divisors are marked with previous trav ID
- // nodes to be avoided as divisors are marked with current trav ID
-
- // start collecting the divisors
- vDivs = Vec_PtrAlloc( p->pPars->nDivMax );
- Vec_PtrForEachEntry( Nwk_Obj_t *, vCone, pObj, k )
- {
- if ( !Nwk_ObjIsTravIdPrevious(pObj) )
- continue;
- if ( Nwk_ObjArrival(pObj) > tArrivalMax )
- continue;
- Vec_PtrPush( vDivs, pObj );
- if ( Vec_PtrSize(vDivs) >= p->pPars->nDivMax )
- break;
- }
- Vec_PtrFree( vCone );
-
- // explore the fanouts of already collected divisors
- if ( Vec_PtrSize(vDivs) < p->pPars->nDivMax )
- Vec_PtrForEachEntry( Nwk_Obj_t *, vDivs, pObj, k )
- {
- // consider fanouts of this node
- Nwk_ObjForEachFanout( pObj, pFanout, f )
- {
- // stop if there are too many fanouts
- if ( f > 20 )
- break;
- // skip nodes that are already added
- if ( Nwk_ObjIsTravIdPrevious(pFanout) )
- continue;
- // skip nodes in the TFO or in the MFFC of node
- if ( Nwk_ObjIsTravIdCurrent(pFanout) )
- continue;
- // skip COs
- if ( !Nwk_ObjIsNode(pFanout) )
- continue;
- // skip nodes with large level
- if ( Nwk_ObjArrival(pFanout) > tArrivalMax )
- continue;
- // skip nodes whose fanins are not divisors
- Nwk_ObjForEachFanin( pFanout, pFanin, m )
- if ( !Nwk_ObjIsTravIdPrevious(pFanin) )
- break;
- if ( m < Nwk_ObjFaninNum(pFanout) )
- continue;
- // make sure this divisor in not among the nodes
-// Vec_PtrForEachEntry( Aig_Obj_t *, p->vNodes, pFanin, m )
-// assert( pFanout != pFanin );
- // add the node to the divisors
- Vec_PtrPush( vDivs, pFanout );
-// Vec_PtrPush( p->vNodes, pFanout );
- Vec_PtrPushUnique( p->vNodes, pFanout );
- Nwk_ObjSetTravIdPrevious( pFanout );
- nDivsPlus++;
- if ( Vec_PtrSize(vDivs) >= p->pPars->nDivMax )
- break;
- }
- if ( Vec_PtrSize(vDivs) >= p->pPars->nDivMax )
- break;
- }
-
- // sort the divisors by level in the increasing order
- Vec_PtrSort( vDivs, (int (*)(void))Nwk_NodeCompareLevelsIncrease );
-
- // add the fanins of the node
- Nwk_ObjForEachFanin( pNode, pFanin, k )
- Vec_PtrPush( vDivs, pFanin );
-
-/*
- printf( "Node level = %d. ", Nwk_ObjLevel(p->pNode) );
- Vec_PtrForEachEntryStart( vDivs, pObj, k, Vec_PtrSize(vDivs)-p->nDivsPlus )
- printf( "%d ", Nwk_ObjLevel(pObj) );
- printf( "\n" );
-*/
-//printf( "%d ", p->nDivsPlus );
-// printf( "(%d+%d)(%d+%d+%d) ", Vec_PtrSize(p->vSupp), Vec_PtrSize(p->vNodes),
-// nTrueSupp, Vec_PtrSize(vDivs)-nTrueSupp-nDivsPlus, nDivsPlus );
- return vDivs;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxInt.h b/src/aig/mfx/mfxInt.h
deleted file mode 100644
index 320e7a8e..00000000
--- a/src/aig/mfx/mfxInt.h
+++ /dev/null
@@ -1,168 +0,0 @@
-/**CFile****************************************************************
-
- FileName [mfxInt.h]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [The good old minimization with complete don't-cares.]
-
- Synopsis [Internal declarations.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: mfxInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __MFX_INT_H__
-#define __MFX_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-/// INCLUDES ///
-////////////////////////////////////////////////////////////////////////
-
-#include "nwk.h"
-#include "mfx.h"
-#include "aig.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "satStore.h"
-#include "bdc.h"
-
-////////////////////////////////////////////////////////////////////////
-/// PARAMETERS ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-#define MFX_FANIN_MAX 12
-
-typedef struct Mfx_Man_t_ Mfx_Man_t;
-struct Mfx_Man_t_
-{
- // input data
- Mfx_Par_t * pPars;
- Nwk_Man_t * pNtk;
- Aig_Man_t * pCare;
- Vec_Ptr_t * vSuppsInv;
- int nFaninMax;
- // intermeditate data for the node
- Vec_Ptr_t * vRoots; // the roots of the window
- Vec_Ptr_t * vSupp; // the support of the window
- Vec_Ptr_t * vNodes; // the internal nodes of the window
- Vec_Ptr_t * vDivs; // the divisors of the node
- Vec_Int_t * vDivLits; // the SAT literals of divisor nodes
- Vec_Int_t * vProjVarsCnf; // the projection variables
- Vec_Int_t * vProjVarsSat; // the projection variables
- // intermediate simulation data
- Vec_Ptr_t * vDivCexes; // the counter-example for dividors
- int nDivWords; // the number of words
- int nCexes; // the numbe rof current counter-examples
- int nSatCalls;
- int nSatCexes;
- // used for bidecomposition
- Vec_Int_t * vTruth;
- Bdc_Man_t * pManDec;
- int nNodesDec;
- int nNodesGained;
- int nNodesGainedLevel;
- // solving data
- Aig_Man_t * pAigWin; // window AIG with constraints
- Cnf_Dat_t * pCnf; // the CNF for the window
- sat_solver * pSat; // the SAT solver used
- Int_Man_t * pMan; // interpolation manager;
- Vec_Int_t * vMem; // memory for intermediate SOPs
- Vec_Vec_t * vLevels; // levelized structure for updating
- Vec_Ptr_t * vFanins; // the new set of fanins
- int nTotConfLim; // total conflict limit
- int nTotConfLevel; // total conflicts on this level
- // switching activity
- Vec_Int_t * vProbs;
- // the result of solving
- int nFanins; // the number of fanins
- int nWords; // the number of words
- int nCares; // the number of care minterms
- unsigned uCare[(MFX_FANIN_MAX<=5)?1:1<<(MFX_FANIN_MAX-5)]; // the computed care-set
- // performance statistics
- int nNodesTried;
- int nNodesResub;
- int nMintsCare;
- int nMintsTotal;
- int nNodesBad;
- int nTotalDivs;
- int nTimeOuts;
- int nTimeOutsLevel;
- int nDcMints;
- double dTotalRatios;
- // node/edge stats
- int nTotalNodesBeg;
- int nTotalNodesEnd;
- int nTotalEdgesBeg;
- int nTotalEdgesEnd;
- // statistics
- int timeWin;
- int timeDiv;
- int timeAig;
- int timeCnf;
- int timeSat;
- int timeInt;
- int timeTotal;
-};
-
-////////////////////////////////////////////////////////////////////////
-/// BASIC TYPES ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// MACRO DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== mfxDiv.c ==========================================================*/
-extern Vec_Ptr_t * Mfx_ComputeDivisors( Mfx_Man_t * p, Nwk_Obj_t * pNode, float tArrivalMax );
-/*=== mfxInter.c ==========================================================*/
-extern sat_solver * Mfx_CreateSolverResub( Mfx_Man_t * p, int * pCands, int nCands, int fInvert );
-extern Hop_Obj_t * Mfx_Interplate( Mfx_Man_t * p, int * pCands, int nCands );
-extern int Mfx_InterplateEval( Mfx_Man_t * p, int * pCands, int nCands );
-/*=== mfxMan.c ==========================================================*/
-extern Mfx_Man_t * Mfx_ManAlloc( Mfx_Par_t * pPars );
-extern void Mfx_ManStop( Mfx_Man_t * p );
-extern void Mfx_ManClean( Mfx_Man_t * p );
-/*=== mfxResub.c ==========================================================*/
-extern void Mfx_PrintResubStats( Mfx_Man_t * p );
-extern int Mfx_EdgePower( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-extern int Mfx_EdgeSwapEval( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-extern int Mfx_ResubNode( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-extern int Mfx_ResubNode2( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-/*=== mfxSat.c ==========================================================*/
-extern int Mfx_SolveSat( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-/*=== mfxStrash.c ==========================================================*/
-extern Aig_Man_t * Mfx_ConstructAig( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-extern double Mfx_ConstraintRatio( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-/*=== mfxWin.c ==========================================================*/
-extern Vec_Ptr_t * Mfx_ComputeRoots( Nwk_Obj_t * pNode, int nWinTfoMax, int nFanoutLimit );
-
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/mfx/mfxInter.c b/src/aig/mfx/mfxInter.c
deleted file mode 100644
index db2e5e7e..00000000
--- a/src/aig/mfx/mfxInter.c
+++ /dev/null
@@ -1,368 +0,0 @@
-/**CFile****************************************************************
-
- FileName [mfxInter.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [The good old minimization with complete don't-cares.]
-
- Synopsis [Procedures for computing resub function by interpolation.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: mfxInter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Adds constraints for the two-input AND-gate.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_SatAddXor( sat_solver * pSat, int iVarA, int iVarB, int iVarC )
-{
- lit Lits[3];
-
- Lits[0] = toLitCond( iVarA, 1 );
- Lits[1] = toLitCond( iVarB, 1 );
- Lits[2] = toLitCond( iVarC, 1 );
- if ( !sat_solver_addclause( pSat, Lits, Lits + 3 ) )
- return 0;
-
- Lits[0] = toLitCond( iVarA, 1 );
- Lits[1] = toLitCond( iVarB, 0 );
- Lits[2] = toLitCond( iVarC, 0 );
- if ( !sat_solver_addclause( pSat, Lits, Lits + 3 ) )
- return 0;
-
- Lits[0] = toLitCond( iVarA, 0 );
- Lits[1] = toLitCond( iVarB, 1 );
- Lits[2] = toLitCond( iVarC, 0 );
- if ( !sat_solver_addclause( pSat, Lits, Lits + 3 ) )
- return 0;
-
- Lits[0] = toLitCond( iVarA, 0 );
- Lits[1] = toLitCond( iVarB, 0 );
- Lits[2] = toLitCond( iVarC, 1 );
- if ( !sat_solver_addclause( pSat, Lits, Lits + 3 ) )
- return 0;
-
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Creates miter for checking resubsitution.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-sat_solver * Mfx_CreateSolverResub( Mfx_Man_t * p, int * pCands, int nCands, int fInvert )
-{
- sat_solver * pSat;
- Aig_Obj_t * pObjPo;
- int Lits[2], status, iVar, i, c;
-
- // get the literal for the output of F
- pObjPo = Aig_ManPo( p->pAigWin, Aig_ManPoNum(p->pAigWin) - Vec_PtrSize(p->vDivs) - 1 );
- Lits[0] = toLitCond( p->pCnf->pVarNums[pObjPo->Id], fInvert );
-
- // collect the outputs of the divisors
- Vec_IntClear( p->vProjVarsCnf );
- Vec_PtrForEachEntryStart( Aig_Obj_t *, p->pAigWin->vPos, pObjPo, i, Aig_ManPoNum(p->pAigWin) - Vec_PtrSize(p->vDivs) )
- {
- assert( p->pCnf->pVarNums[pObjPo->Id] >= 0 );
- Vec_IntPush( p->vProjVarsCnf, p->pCnf->pVarNums[pObjPo->Id] );
- }
- assert( Vec_IntSize(p->vProjVarsCnf) == Vec_PtrSize(p->vDivs) );
-
- // start the solver
- pSat = sat_solver_new();
- sat_solver_setnvars( pSat, 2 * p->pCnf->nVars + Vec_PtrSize(p->vDivs) );
- if ( pCands )
- sat_solver_store_alloc( pSat );
-
- // load the first copy of the clauses
- for ( i = 0; i < p->pCnf->nClauses; i++ )
- {
- if ( !sat_solver_addclause( pSat, p->pCnf->pClauses[i], p->pCnf->pClauses[i+1] ) )
- {
- sat_solver_delete( pSat );
- return NULL;
- }
- }
- // add the clause for the first output of F
- if ( !sat_solver_addclause( pSat, Lits, Lits+1 ) )
- {
- sat_solver_delete( pSat );
- return NULL;
- }
-
- // bookmark the clauses of A
- if ( pCands )
- sat_solver_store_mark_clauses_a( pSat );
-
- // transform the literals
- for ( i = 0; i < p->pCnf->nLiterals; i++ )
- p->pCnf->pClauses[0][i] += 2 * p->pCnf->nVars;
- // load the second copy of the clauses
- for ( i = 0; i < p->pCnf->nClauses; i++ )
- {
- if ( !sat_solver_addclause( pSat, p->pCnf->pClauses[i], p->pCnf->pClauses[i+1] ) )
- {
- sat_solver_delete( pSat );
- return NULL;
- }
- }
- // transform the literals
- for ( i = 0; i < p->pCnf->nLiterals; i++ )
- p->pCnf->pClauses[0][i] -= 2 * p->pCnf->nVars;
- // add the clause for the second output of F
- Lits[0] = 2 * p->pCnf->nVars + lit_neg( Lits[0] );
- if ( !sat_solver_addclause( pSat, Lits, Lits+1 ) )
- {
- sat_solver_delete( pSat );
- return NULL;
- }
-
- if ( pCands )
- {
- // add relevant clauses for EXOR gates
- for ( c = 0; c < nCands; c++ )
- {
- // get the variable number of this divisor
- i = lit_var( pCands[c] ) - 2 * p->pCnf->nVars;
- // get the corresponding SAT variable
- iVar = Vec_IntEntry( p->vProjVarsCnf, i );
- // add the corresponding EXOR gate
- if ( !Mfx_SatAddXor( pSat, iVar, iVar + p->pCnf->nVars, 2 * p->pCnf->nVars + i ) )
- {
- sat_solver_delete( pSat );
- return NULL;
- }
- // add the corresponding clause
- if ( !sat_solver_addclause( pSat, pCands + c, pCands + c + 1 ) )
- {
- sat_solver_delete( pSat );
- return NULL;
- }
- }
- // bookmark the roots
- sat_solver_store_mark_roots( pSat );
- }
- else
- {
- // add the clauses for the EXOR gates - and remember their outputs
- Vec_IntClear( p->vProjVarsSat );
- Vec_IntForEachEntry( p->vProjVarsCnf, iVar, i )
- {
- if ( !Mfx_SatAddXor( pSat, iVar, iVar + p->pCnf->nVars, 2 * p->pCnf->nVars + i ) )
- {
- sat_solver_delete( pSat );
- return NULL;
- }
- Vec_IntPush( p->vProjVarsSat, 2 * p->pCnf->nVars + i );
- }
- assert( Vec_IntSize(p->vProjVarsCnf) == Vec_IntSize(p->vProjVarsSat) );
- // simplify the solver
- status = sat_solver_simplify(pSat);
- if ( status == 0 )
- {
-// printf( "Mfx_CreateSolverResub(): SAT solver construction has failed. Skipping node.\n" );
- sat_solver_delete( pSat );
- return NULL;
- }
- }
- return pSat;
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs interpolation.]
-
- Description [Derives the new function of the node.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-unsigned * Mfx_InterplateTruth( Mfx_Man_t * p, int * pCands, int nCands, int fInvert )
-{
- sat_solver * pSat;
- Sto_Man_t * pCnf = NULL;
- unsigned * puTruth;
- int nFanins, status;
- int c, i, * pGloVars;
-
- // derive the SAT solver for interpolation
- pSat = Mfx_CreateSolverResub( p, pCands, nCands, fInvert );
-
- // solve the problem
- status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)p->pPars->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
- if ( status != l_False )
- {
- p->nTimeOuts++;
- return NULL;
- }
- // get the learned clauses
- pCnf = (Sto_Man_t *)sat_solver_store_release( pSat );
- sat_solver_delete( pSat );
-
- // set the global variables
- pGloVars = Int_ManSetGlobalVars( p->pMan, nCands );
- for ( c = 0; c < nCands; c++ )
- {
- // get the variable number of this divisor
- i = lit_var( pCands[c] ) - 2 * p->pCnf->nVars;
- // get the corresponding SAT variable
- pGloVars[c] = Vec_IntEntry( p->vProjVarsCnf, i );
- }
-
- // derive the interpolant
- nFanins = Int_ManInterpolate( p->pMan, pCnf, 0, &puTruth );
- Sto_ManFree( pCnf );
- assert( nFanins == nCands );
- return puTruth;
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs interpolation.]
-
- Description [Derives the new function of the node.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_InterplateEval( Mfx_Man_t * p, int * pCands, int nCands )
-{
- unsigned * pTruth, uTruth0[2], uTruth1[2];
- int nCounter;
- pTruth = Mfx_InterplateTruth( p, pCands, nCands, 0 );
- if ( nCands == 6 )
- {
- uTruth1[0] = pTruth[0];
- uTruth1[1] = pTruth[1];
- }
- else
- {
- uTruth1[0] = pTruth[0];
- uTruth1[1] = pTruth[0];
- }
- pTruth = Mfx_InterplateTruth( p, pCands, nCands, 1 );
- if ( nCands == 6 )
- {
- uTruth0[0] = ~pTruth[0];
- uTruth0[1] = ~pTruth[1];
- }
- else
- {
- uTruth0[0] = ~pTruth[0];
- uTruth0[1] = ~pTruth[0];
- }
- nCounter = Extra_WordCountOnes( uTruth0[0] ^ uTruth1[0] );
- nCounter += Extra_WordCountOnes( uTruth0[1] ^ uTruth1[1] );
-// printf( "%d ", nCounter );
- return nCounter;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Performs interpolation.]
-
- Description [Derives the new function of the node.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Hop_Obj_t * Mfx_Interplate( Mfx_Man_t * p, int * pCands, int nCands )
-{
- extern Hop_Obj_t * Kit_GraphToHop( Hop_Man_t * pMan, Kit_Graph_t * pGraph );
-
- sat_solver * pSat;
- Sto_Man_t * pCnf = NULL;
- unsigned * puTruth;
- Kit_Graph_t * pGraph;
- Hop_Obj_t * pFunc;
- int nFanins, status;
- int c, i, * pGloVars;
-
-// p->nDcMints += Mfx_InterplateEval( p, pCands, nCands );
-
- // derive the SAT solver for interpolation
- pSat = Mfx_CreateSolverResub( p, pCands, nCands, 0 );
-
- // solve the problem
- status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)p->pPars->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
- if ( status != l_False )
- {
- p->nTimeOuts++;
- return NULL;
- }
- // get the learned clauses
- pCnf = (Sto_Man_t *)sat_solver_store_release( pSat );
- sat_solver_delete( pSat );
-
- // set the global variables
- pGloVars = Int_ManSetGlobalVars( p->pMan, nCands );
- for ( c = 0; c < nCands; c++ )
- {
- // get the variable number of this divisor
- i = lit_var( pCands[c] ) - 2 * p->pCnf->nVars;
- // get the corresponding SAT variable
- pGloVars[c] = Vec_IntEntry( p->vProjVarsCnf, i );
- }
-
- // derive the interpolant
- nFanins = Int_ManInterpolate( p->pMan, pCnf, 0, &puTruth );
- Sto_ManFree( pCnf );
- assert( nFanins == nCands );
-
- // transform interpolant into AIG
- pGraph = Kit_TruthToGraph( puTruth, nFanins, p->vMem );
- pFunc = Kit_GraphToHop( p->pNtk->pManHop, pGraph );
- Kit_GraphFree( pGraph );
- return pFunc;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxMan.c b/src/aig/mfx/mfxMan.c
deleted file mode 100644
index ff8b02fd..00000000
--- a/src/aig/mfx/mfxMan.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/**CFile****************************************************************
-
- FileName [mfxMan.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [The good old minimization with complete don't-cares.]
-
- Synopsis [Procedures working with the manager.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: mfxMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Mfx_Man_t * Mfx_ManAlloc( Mfx_Par_t * pPars )
-{
- Mfx_Man_t * p;
- // start the manager
- p = ABC_ALLOC( Mfx_Man_t, 1 );
- memset( p, 0, sizeof(Mfx_Man_t) );
- p->pPars = pPars;
- p->vProjVarsCnf = Vec_IntAlloc( 100 );
- p->vProjVarsSat = Vec_IntAlloc( 100 );
- p->vDivLits = Vec_IntAlloc( 100 );
- p->nDivWords = Aig_BitWordNum(p->pPars->nDivMax + MFX_FANIN_MAX);
- p->vDivCexes = Vec_PtrAllocSimInfo( p->pPars->nDivMax+MFX_FANIN_MAX+1, p->nDivWords );
- p->pMan = Int_ManAlloc();
- p->vMem = Vec_IntAlloc( 0 );
- p->vLevels = Vec_VecStart( 32 );
- p->vFanins = Vec_PtrAlloc( 32 );
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Mfx_ManClean( Mfx_Man_t * p )
-{
- if ( p->pAigWin )
- Aig_ManStop( p->pAigWin );
- if ( p->pCnf )
- Cnf_DataFree( p->pCnf );
- if ( p->pSat )
- sat_solver_delete( p->pSat );
- if ( p->vRoots )
- Vec_PtrFree( p->vRoots );
- if ( p->vSupp )
- Vec_PtrFree( p->vSupp );
- if ( p->vNodes )
- Vec_PtrFree( p->vNodes );
- if ( p->vDivs )
- Vec_PtrFree( p->vDivs );
- p->pAigWin = NULL;
- p->pCnf = NULL;
- p->pSat = NULL;
- p->vRoots = NULL;
- p->vSupp = NULL;
- p->vNodes = NULL;
- p->vDivs = NULL;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Mfx_ManPrint( Mfx_Man_t * p )
-{
- if ( p->pPars->fResub )
- {
- printf( "Reduction in nodes = %5d. (%.2f %%) ",
- p->nTotalNodesBeg-p->nTotalNodesEnd,
- 100.0*(p->nTotalNodesBeg-p->nTotalNodesEnd)/p->nTotalNodesBeg );
- printf( "Reduction in edges = %5d. (%.2f %%) ",
- p->nTotalEdgesBeg-p->nTotalEdgesEnd,
- 100.0*(p->nTotalEdgesBeg-p->nTotalEdgesEnd)/p->nTotalEdgesBeg );
- printf( "\n" );
- printf( "Nodes = %d. Try = %d. Resub = %d. Div = %d. SAT calls = %d. Timeouts = %d.\n",
- Nwk_ManNodeNum(p->pNtk), p->nNodesTried, p->nNodesResub, p->nTotalDivs, p->nSatCalls, p->nTimeOuts );
- if ( p->pPars->fSwapEdge )
- printf( "Swappable edges = %d. Total edges = %d. Ratio = %5.2f.\n",
- p->nNodesResub, Nwk_ManGetTotalFanins(p->pNtk), 1.00 * p->nNodesResub / Nwk_ManGetTotalFanins(p->pNtk) );
-// else
-// Mfx_PrintResubStats( p );
-// printf( "Average ratio of DCs in the resubed nodes = %.2f.\n", 1.0*p->nDcMints/(64 * p->nNodesResub) );
- }
- else
- {
- printf( "Nodes = %d. Try = %d. Total mints = %d. Local DC mints = %d. Ratio = %5.2f.\n",
- Nwk_ManNodeNum(p->pNtk), p->nNodesTried, p->nMintsTotal, p->nMintsTotal-p->nMintsCare,
- 1.0 * (p->nMintsTotal-p->nMintsCare) / p->nMintsTotal );
-// printf( "Average ratio of sequential DCs in the global space = %5.2f.\n",
-// 1.0-(p->dTotalRatios/p->nNodesTried) );
- printf( "Nodes resyn = %d. Ratio = %5.2f. Total AIG node gain = %d. Timeouts = %d.\n",
- p->nNodesDec, 1.0 * p->nNodesDec / p->nNodesTried, p->nNodesGained, p->nTimeOuts );
- }
-/*
- ABC_PRTP( "Win", p->timeWin , p->timeTotal );
- ABC_PRTP( "Div", p->timeDiv , p->timeTotal );
- ABC_PRTP( "Aig", p->timeAig , p->timeTotal );
- ABC_PRTP( "Cnf", p->timeCnf , p->timeTotal );
- ABC_PRTP( "Sat", p->timeSat-p->timeInt , p->timeTotal );
- ABC_PRTP( "Int", p->timeInt , p->timeTotal );
- ABC_PRTP( "ALL", p->timeTotal , p->timeTotal );
-*/
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Mfx_ManStop( Mfx_Man_t * p )
-{
- if ( p->pPars->fVerbose )
- Mfx_ManPrint( p );
- if ( p->vTruth )
- Vec_IntFree( p->vTruth );
- if ( p->pManDec )
- Bdc_ManFree( p->pManDec );
- if ( p->pCare )
- Aig_ManStop( p->pCare );
- if ( p->vSuppsInv )
- Vec_VecFree( (Vec_Vec_t *)p->vSuppsInv );
- if ( p->vProbs )
- Vec_IntFree( p->vProbs );
- Mfx_ManClean( p );
- Int_ManFree( p->pMan );
- Vec_IntFree( p->vMem );
- Vec_VecFree( p->vLevels );
- Vec_PtrFree( p->vFanins );
- Vec_IntFree( p->vProjVarsCnf );
- Vec_IntFree( p->vProjVarsSat );
- Vec_IntFree( p->vDivLits );
- Vec_PtrFree( p->vDivCexes );
- ABC_FREE( p );
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxResub.c b/src/aig/mfx/mfxResub.c
deleted file mode 100644
index 5a4786d6..00000000
--- a/src/aig/mfx/mfxResub.c
+++ /dev/null
@@ -1,566 +0,0 @@
-/**CFile****************************************************************
-
- FileName [mfxResub.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [The good old minimization with complete don't-cares.]
-
- Synopsis [Procedures to perform resubstitution.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: mfxResub.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Updates the network after resubstitution.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Mfx_UpdateNetwork( Mfx_Man_t * p, Nwk_Obj_t * pObj, Vec_Ptr_t * vFanins, Hop_Obj_t * pFunc )
-{
- Nwk_Obj_t * pObjNew, * pFanin;
- int k;
- // create the new node
- pObjNew = Nwk_ManCreateNode( pObj->pMan, Vec_PtrSize(vFanins), Nwk_ObjFanoutNum(pObj) );
- pObjNew->pFunc = pFunc;
- Vec_PtrForEachEntry( Nwk_Obj_t *, vFanins, pFanin, k )
- Nwk_ObjAddFanin( pObjNew, pFanin );
- // replace the old node by the new node
- Nwk_ManUpdate( pObj, pObjNew, p->vLevels );
-}
-
-/**Function*************************************************************
-
- Synopsis [Prints resub candidate stats.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Mfx_PrintResubStats( Mfx_Man_t * p )
-{
- Nwk_Obj_t * pFanin, * pNode;
- int i, k, nAreaCrits = 0, nAreaExpanse = 0;
- int nFaninMax = Nwk_ManGetFaninMax(p->pNtk);
- Nwk_ManForEachNode( p->pNtk, pNode, i )
- Nwk_ObjForEachFanin( pNode, pFanin, k )
- {
- if ( !Nwk_ObjIsCi(pFanin) && Nwk_ObjFanoutNum(pFanin) == 1 )
- {
- nAreaCrits++;
- nAreaExpanse += (int)(Nwk_ObjFaninNum(pNode) < nFaninMax);
- }
- }
- printf( "Total area-critical fanins = %d. Belonging to expandable nodes = %d.\n",
- nAreaCrits, nAreaExpanse );
-}
-
-/**Function*************************************************************
-
- Synopsis [Tries resubstitution.]
-
- Description [Returns 1 if it is feasible, or 0 if c-ex is found.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_TryResubOnce( Mfx_Man_t * p, int * pCands, int nCands )
-{
- unsigned * pData;
- int RetValue, iVar, i;
- p->nSatCalls++;
- RetValue = sat_solver_solve( p->pSat, pCands, pCands + nCands, (ABC_INT64_T)p->pPars->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-// assert( RetValue == l_False || RetValue == l_True );
- if ( RetValue == l_False )
- return 1;
- if ( RetValue != l_True )
- {
- p->nTimeOuts++;
- return -1;
- }
- p->nSatCexes++;
- // store the counter-example
- Vec_IntForEachEntry( p->vProjVarsSat, iVar, i )
- {
- pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
- if ( !sat_solver_var_value( p->pSat, iVar ) ) // remove 0s!!!
- {
- assert( Aig_InfoHasBit(pData, p->nCexes) );
- Aig_InfoXorBit( pData, p->nCexes );
- }
- }
- p->nCexes++;
- return 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs resubstitution for the node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_SolveSatResub( Mfx_Man_t * p, Nwk_Obj_t * pNode, int iFanin, int fOnlyRemove, int fSkipUpdate )
-{
- int fVeryVerbose = p->pPars->fVeryVerbose && Vec_PtrSize(p->vDivs) < 80;
- unsigned * pData;
- int pCands[MFX_FANIN_MAX];
- int RetValue, iVar, i, nCands, nWords, w, clk;
- Nwk_Obj_t * pFanin;
- Hop_Obj_t * pFunc;
- assert( iFanin >= 0 );
-
- // clean simulation info
- Vec_PtrFillSimInfo( p->vDivCexes, 0, p->nDivWords );
- p->nCexes = 0;
- if ( fVeryVerbose )
- {
- printf( "\n" );
- printf( "Node %5d : Level = %2d. Divs = %3d. Fanin = %d (out of %d). MFFC = %d\n",
- pNode->Id, pNode->Level, Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode),
- iFanin, Nwk_ObjFaninNum(pNode),
- Nwk_ObjFanoutNum(Nwk_ObjFanin(pNode, iFanin)) == 1 ? Nwk_ObjMffcLabel(Nwk_ObjFanin(pNode, iFanin)) : 0 );
- }
-
- // try fanins without the critical fanin
- nCands = 0;
- Vec_PtrClear( p->vFanins );
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- {
- if ( i == iFanin )
- continue;
- Vec_PtrPush( p->vFanins, pFanin );
- iVar = Vec_PtrSize(p->vDivs) - Nwk_ObjFaninNum(pNode) + i;
- pCands[nCands++] = toLitCond( Vec_IntEntry( p->vProjVarsSat, iVar ), 1 );
- }
- RetValue = Mfx_TryResubOnce( p, pCands, nCands );
- if ( RetValue == -1 )
- return 0;
- if ( RetValue == 1 )
- {
- if ( fVeryVerbose )
- printf( "Node %d: Fanin %d can be removed.\n", pNode->Id, iFanin );
- p->nNodesResub++;
- p->nNodesGainedLevel++;
- if ( fSkipUpdate )
- return 1;
-clk = clock();
- // derive the function
- pFunc = Mfx_Interplate( p, pCands, nCands );
- if ( pFunc == NULL )
- return 0;
- // update the network
- Mfx_UpdateNetwork( p, pNode, p->vFanins, pFunc );
-p->timeInt += clock() - clk;
- return 1;
- }
-
- if ( fOnlyRemove )
- return 0;
-
- if ( fVeryVerbose )
- {
- for ( i = 0; i < 8; i++ )
- printf( " " );
- for ( i = 0; i < Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode); i++ )
- printf( "%d", i % 10 );
- for ( i = 0; i < Nwk_ObjFaninNum(pNode); i++ )
- if ( i == iFanin )
- printf( "*" );
- else
- printf( "%c", 'a' + i );
- printf( "\n" );
- }
- iVar = -1;
- while ( 1 )
- {
- float * pProbab = (float *)(p->vProbs? p->vProbs->pArray : NULL);
- assert( (pProbab != NULL) == p->pPars->fPower );
- if ( fVeryVerbose )
- {
- printf( "%3d: %2d ", p->nCexes, iVar );
- for ( i = 0; i < Vec_PtrSize(p->vDivs); i++ )
- {
- pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
- printf( "%d", Aig_InfoHasBit(pData, p->nCexes-1) );
- }
- printf( "\n" );
- }
-
- // find the next divisor to try
- nWords = Aig_BitWordNum(p->nCexes);
- assert( nWords <= p->nDivWords );
- for ( iVar = 0; iVar < Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode); iVar++ )
- {
- if ( p->pPars->fPower )
- {
- Nwk_Obj_t * pDiv = (Nwk_Obj_t *)Vec_PtrEntry(p->vDivs, iVar);
- // only accept the divisor if it is "cool"
- if ( pProbab[Nwk_ObjId(pDiv)] >= 0.2 )
- continue;
- }
- pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, iVar );
- for ( w = 0; w < nWords; w++ )
- if ( pData[w] != ~0 )
- break;
- if ( w == nWords )
- break;
- }
- if ( iVar == Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode) )
- return 0;
-
- pCands[nCands] = toLitCond( Vec_IntEntry(p->vProjVarsSat, iVar), 1 );
- RetValue = Mfx_TryResubOnce( p, pCands, nCands+1 );
- if ( RetValue == -1 )
- return 0;
- if ( RetValue == 1 )
- {
- if ( fVeryVerbose )
- printf( "Node %d: Fanin %d can be replaced by divisor %d.\n", pNode->Id, iFanin, iVar );
- p->nNodesResub++;
- p->nNodesGainedLevel++;
- if ( fSkipUpdate )
- return 1;
-clk = clock();
- // derive the function
- pFunc = Mfx_Interplate( p, pCands, nCands+1 );
- if ( pFunc == NULL )
- return 0;
- // update the network
- Vec_PtrPush( p->vFanins, Vec_PtrEntry(p->vDivs, iVar) );
- Mfx_UpdateNetwork( p, pNode, p->vFanins, pFunc );
-p->timeInt += clock() - clk;
- return 1;
- }
- if ( p->nCexes >= p->pPars->nDivMax )
- break;
- }
- return 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs resubstitution for the node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_SolveSatResub2( Mfx_Man_t * p, Nwk_Obj_t * pNode, int iFanin, int iFanin2 )
-{
- int fVeryVerbose = p->pPars->fVeryVerbose && Vec_PtrSize(p->vDivs) < 80;
- unsigned * pData, * pData2;
- int pCands[MFX_FANIN_MAX];
- int RetValue, iVar, iVar2, i, w, nCands, clk, nWords, fBreak;
- Nwk_Obj_t * pFanin;
- Hop_Obj_t * pFunc;
- assert( iFanin >= 0 );
- assert( iFanin2 >= 0 || iFanin2 == -1 );
-
- // clean simulation info
- Vec_PtrFillSimInfo( p->vDivCexes, 0, p->nDivWords );
- p->nCexes = 0;
- if ( fVeryVerbose )
- {
- printf( "\n" );
- printf( "Node %5d : Level = %2d. Divs = %3d. Fanins = %d/%d (out of %d). MFFC = %d\n",
- pNode->Id, pNode->Level, Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode),
- iFanin, iFanin2, Nwk_ObjFaninNum(pNode),
- Nwk_ObjFanoutNum(Nwk_ObjFanin(pNode, iFanin)) == 1 ? Nwk_ObjMffcLabel(Nwk_ObjFanin(pNode, iFanin)) : 0 );
- }
-
- // try fanins without the critical fanin
- nCands = 0;
- Vec_PtrClear( p->vFanins );
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- {
- if ( i == iFanin || i == iFanin2 )
- continue;
- Vec_PtrPush( p->vFanins, pFanin );
- iVar = Vec_PtrSize(p->vDivs) - Nwk_ObjFaninNum(pNode) + i;
- pCands[nCands++] = toLitCond( Vec_IntEntry( p->vProjVarsSat, iVar ), 1 );
- }
- RetValue = Mfx_TryResubOnce( p, pCands, nCands );
- if ( RetValue == -1 )
- return 0;
- if ( RetValue == 1 )
- {
- if ( fVeryVerbose )
- printf( "Node %d: Fanins %d/%d can be removed.\n", pNode->Id, iFanin, iFanin2 );
- p->nNodesResub++;
- p->nNodesGainedLevel++;
-clk = clock();
- // derive the function
- pFunc = Mfx_Interplate( p, pCands, nCands );
- if ( pFunc == NULL )
- return 0;
- // update the network
- Mfx_UpdateNetwork( p, pNode, p->vFanins, pFunc );
-p->timeInt += clock() - clk;
- return 1;
- }
-
- if ( fVeryVerbose )
- {
- for ( i = 0; i < 11; i++ )
- printf( " " );
- for ( i = 0; i < Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode); i++ )
- printf( "%d", i % 10 );
- for ( i = 0; i < Nwk_ObjFaninNum(pNode); i++ )
- if ( i == iFanin || i == iFanin2 )
- printf( "*" );
- else
- printf( "%c", 'a' + i );
- printf( "\n" );
- }
- iVar = iVar2 = -1;
- while ( 1 )
- {
- if ( fVeryVerbose )
- {
- printf( "%3d: %2d %2d ", p->nCexes, iVar, iVar2 );
- for ( i = 0; i < Vec_PtrSize(p->vDivs); i++ )
- {
- pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
- printf( "%d", Aig_InfoHasBit(pData, p->nCexes-1) );
- }
- printf( "\n" );
- }
-
- // find the next divisor to try
- nWords = Aig_BitWordNum(p->nCexes);
- assert( nWords <= p->nDivWords );
- fBreak = 0;
- for ( iVar = 1; iVar < Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode); iVar++ )
- {
- pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, iVar );
- for ( iVar2 = 0; iVar2 < iVar; iVar2++ )
- {
- pData2 = (unsigned *)Vec_PtrEntry( p->vDivCexes, iVar2 );
- for ( w = 0; w < nWords; w++ )
- if ( (pData[w] | pData2[w]) != ~0 )
- break;
- if ( w == nWords )
- {
- fBreak = 1;
- break;
- }
- }
- if ( fBreak )
- break;
- }
- if ( iVar == Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode) )
- return 0;
-
- pCands[nCands] = toLitCond( Vec_IntEntry(p->vProjVarsSat, iVar2), 1 );
- pCands[nCands+1] = toLitCond( Vec_IntEntry(p->vProjVarsSat, iVar), 1 );
- RetValue = Mfx_TryResubOnce( p, pCands, nCands+2 );
- if ( RetValue == -1 )
- return 0;
- if ( RetValue == 1 )
- {
- if ( fVeryVerbose )
- printf( "Node %d: Fanins %d/%d can be replaced by divisors %d/%d.\n", pNode->Id, iFanin, iFanin2, iVar, iVar2 );
- p->nNodesResub++;
- p->nNodesGainedLevel++;
-clk = clock();
- // derive the function
- pFunc = Mfx_Interplate( p, pCands, nCands+2 );
- if ( pFunc == NULL )
- return 0;
- // update the network
- Vec_PtrPush( p->vFanins, Vec_PtrEntry(p->vDivs, iVar2) );
- Vec_PtrPush( p->vFanins, Vec_PtrEntry(p->vDivs, iVar) );
- assert( Vec_PtrSize(p->vFanins) == nCands + 2 );
- Mfx_UpdateNetwork( p, pNode, p->vFanins, pFunc );
-p->timeInt += clock() - clk;
- return 1;
- }
- if ( p->nCexes >= p->pPars->nDivMax )
- break;
- }
- return 0;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Evaluates the possibility of replacing given edge by another edge.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_EdgeSwapEval( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
- Nwk_Obj_t * pFanin;
- int i;
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- Mfx_SolveSatResub( p, pNode, i, 0, 1 );
- return 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Evaluates the possibility of replacing given edge by another edge.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_EdgePower( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
- Nwk_Obj_t * pFanin;
- float * pProbab = (float *)p->vProbs->pArray;
- int i;
- // try replacing area critical fanins
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- if ( pProbab[pFanin->Id] >= 0.4 )
- {
- if ( Mfx_SolveSatResub( p, pNode, i, 0, 0 ) )
- return 1;
- }
- return 0;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Performs resubstitution for the node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_ResubNode( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
- Nwk_Obj_t * pFanin;
- int i;
- // try replacing area critical fanins
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- if ( !Nwk_ObjIsCi(pFanin) && Nwk_ObjFanoutNum(pFanin) == 1 )
- {
- if ( Mfx_SolveSatResub( p, pNode, i, 0, 0 ) )
- return 1;
- }
- // try removing redundant edges
- if ( !p->pPars->fArea )
- {
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- if ( Nwk_ObjIsCi(pFanin) || Nwk_ObjFanoutNum(pFanin) != 1 )
- {
- if ( Mfx_SolveSatResub( p, pNode, i, 1, 0 ) )
- return 1;
- }
- }
- if ( Nwk_ObjFaninNum(pNode) == p->nFaninMax )
- return 0;
-
- return 0; /// !!!!! temporary workaround
-
- // try replacing area critical fanins while adding two new fanins
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- if ( !Nwk_ObjIsCi(pFanin) && Nwk_ObjFanoutNum(pFanin) == 1 )
- {
- if ( Mfx_SolveSatResub2( p, pNode, i, -1 ) )
- return 1;
- }
- return 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs resubstitution for the node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_ResubNode2( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
- Nwk_Obj_t * pFanin, * pFanin2;
- int i, k;
-/*
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- if ( !Nwk_ObjIsCi(pFanin) && Nwk_ObjFanoutNum(pFanin) == 1 )
- {
- if ( Mfx_SolveSatResub( p, pNode, i, 0, 0 ) )
- return 1;
- }
-*/
- if ( Nwk_ObjFaninNum(pNode) < 2 )
- return 0;
- // try replacing one area critical fanin and one other fanin while adding two new fanins
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- {
- if ( !Nwk_ObjIsCi(pFanin) && Nwk_ObjFanoutNum(pFanin) == 1 )
- {
- // consider second fanin to remove at the same time
- Nwk_ObjForEachFanin( pNode, pFanin2, k )
- {
- if ( i != k && Mfx_SolveSatResub2( p, pNode, i, k ) )
- return 1;
- }
- }
- }
- return 0;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxSat.c b/src/aig/mfx/mfxSat.c
deleted file mode 100644
index 974563ab..00000000
--- a/src/aig/mfx/mfxSat.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/**CFile****************************************************************
-
- FileName [mfxSat.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [The good old minimization with complete don't-cares.]
-
- Synopsis [Procedures to compute don't-cares using SAT.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: mfxSat.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Enumerates through the SAT assignments.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_SolveSat_iter( Mfx_Man_t * p )
-{
- int Lits[MFX_FANIN_MAX];
- int RetValue, nBTLimit, iVar, b, Mint;
- if ( p->nTotConfLim && p->nTotConfLim <= p->pSat->stats.conflicts )
- return -1;
- nBTLimit = p->nTotConfLim? p->nTotConfLim - p->pSat->stats.conflicts : 0;
- RetValue = sat_solver_solve( p->pSat, NULL, NULL, (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
- assert( RetValue == l_Undef || RetValue == l_True || RetValue == l_False );
- if ( RetValue == l_Undef )
- return -1;
- if ( RetValue == l_False )
- return 0;
- p->nCares++;
- // add SAT assignment to the solver
- Mint = 0;
- Vec_IntForEachEntry( p->vProjVarsSat, iVar, b )
- {
- Lits[b] = toLit( iVar );
- if ( sat_solver_var_value( p->pSat, iVar ) )
- {
- Mint |= (1 << b);
- Lits[b] = lit_neg( Lits[b] );
- }
- }
- assert( !Aig_InfoHasBit(p->uCare, Mint) );
- Aig_InfoSetBit( p->uCare, Mint );
- // add the blocking clause
- RetValue = sat_solver_addclause( p->pSat, Lits, Lits + Vec_IntSize(p->vProjVarsSat) );
- if ( RetValue == 0 )
- return 0;
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Enumerates through the SAT assignments.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Mfx_SolveSat( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
- Aig_Obj_t * pObjPo;
- int RetValue, i;
- // collect projection variables
- Vec_IntClear( p->vProjVarsSat );
- Vec_PtrForEachEntryStart( Aig_Obj_t *, p->pAigWin->vPos, pObjPo, i, Aig_ManPoNum(p->pAigWin) - Nwk_ObjFaninNum(pNode) )
- {
- assert( p->pCnf->pVarNums[pObjPo->Id] >= 0 );
- Vec_IntPush( p->vProjVarsSat, p->pCnf->pVarNums[pObjPo->Id] );
- }
-
- // prepare the truth table of care set
- p->nFanins = Vec_IntSize( p->vProjVarsSat );
- p->nWords = Aig_TruthWordNum( p->nFanins );
- memset( p->uCare, 0, sizeof(unsigned) * p->nWords );
-
- // iterate through the SAT assignments
- p->nCares = 0;
- p->nTotConfLim = p->pPars->nBTLimit;
- while ( (RetValue = Mfx_SolveSat_iter(p)) == 1 );
- if ( RetValue == -1 )
- return 0;
-
- // write statistics
- p->nMintsCare += p->nCares;
- p->nMintsTotal += (1<<p->nFanins);
-
- if ( p->pPars->fVeryVerbose )
- {
- printf( "Node %4d : Care = %2d. Total = %2d. ", pNode->Id, p->nCares, (1<<p->nFanins) );
-// Kit_TruthPrintBinary( stdout, p->uCare, (1<<p->nFanins) );
- printf( "\n" );
- }
-
- // map the care
- if ( p->nFanins > 4 )
- return 1;
- if ( p->nFanins == 4 )
- p->uCare[0] = p->uCare[0] | (p->uCare[0] << 16);
- if ( p->nFanins == 3 )
- p->uCare[0] = p->uCare[0] | (p->uCare[0] << 8) | (p->uCare[0] << 16) | (p->uCare[0] << 24);
- if ( p->nFanins == 2 )
- p->uCare[0] = p->uCare[0] | (p->uCare[0] << 4) | (p->uCare[0] << 8) | (p->uCare[0] << 12) |
- (p->uCare[0] << 16) | (p->uCare[0] << 20) | (p->uCare[0] << 24) | (p->uCare[0] << 28);
- assert( p->nFanins != 1 );
- return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxStrash.c b/src/aig/mfx/mfxStrash.c
deleted file mode 100644
index f750523d..00000000
--- a/src/aig/mfx/mfxStrash.c
+++ /dev/null
@@ -1,344 +0,0 @@
-/**CFile****************************************************************
-
- FileName [mfxStrash.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [The good old minimization with complete don't-cares.]
-
- Synopsis [Structural hashing of the window with ODCs.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: mfxStrash.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Construct BDDs and mark AIG nodes.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Nwk_ConvertHopToAig_rec( Hop_Obj_t * pObj, Aig_Man_t * pMan )
-{
- assert( !Hop_IsComplement(pObj) );
- if ( !Hop_ObjIsNode(pObj) || Hop_ObjIsMarkA(pObj) )
- return;
- Nwk_ConvertHopToAig_rec( Hop_ObjFanin0(pObj), pMan );
- Nwk_ConvertHopToAig_rec( Hop_ObjFanin1(pObj), pMan );
- pObj->pData = Aig_And( pMan, (Aig_Obj_t *)Hop_ObjChild0Copy(pObj), (Aig_Obj_t *)Hop_ObjChild1Copy(pObj) );
- assert( !Hop_ObjIsMarkA(pObj) ); // loop detection
- Hop_ObjSetMarkA( pObj );
-}
-
-/**Function*************************************************************
-
- Synopsis [Converts the network from AIG to BDD representation.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Nwk_ConvertHopToAig( Nwk_Obj_t * pObjOld, Aig_Man_t * pMan )
-{
- Hop_Man_t * pHopMan;
- Hop_Obj_t * pRoot;
- Nwk_Obj_t * pFanin;
- int i;
- // get the local AIG
- pHopMan = pObjOld->pMan->pManHop;
- pRoot = pObjOld->pFunc;
- // check the case of a constant
- if ( Hop_ObjIsConst1( Hop_Regular(pRoot) ) )
- {
- pObjOld->pCopy = (Nwk_Obj_t *)Aig_NotCond( Aig_ManConst1(pMan), Hop_IsComplement(pRoot) );
- pObjOld->pNext = pObjOld->pCopy;
- return;
- }
-
- // assign the fanin nodes
- Nwk_ObjForEachFanin( pObjOld, pFanin, i )
- Hop_ManPi(pHopMan, i)->pData = pFanin->pCopy;
- // construct the AIG
- Nwk_ConvertHopToAig_rec( Hop_Regular(pRoot), pMan );
- pObjOld->pCopy = (Nwk_Obj_t *)Aig_NotCond( (Aig_Obj_t *)Hop_Regular(pRoot)->pData, Hop_IsComplement(pRoot) );
- Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
-
- // assign the fanin nodes
- Nwk_ObjForEachFanin( pObjOld, pFanin, i )
- Hop_ManPi(pHopMan, i)->pData = pFanin->pNext;
- // construct the AIG
- Nwk_ConvertHopToAig_rec( Hop_Regular(pRoot), pMan );
- pObjOld->pNext = (Nwk_Obj_t *)Aig_NotCond( (Aig_Obj_t *)Hop_Regular(pRoot)->pData, Hop_IsComplement(pRoot) );
- Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes the care set of the node under ODCs.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Obj_t * Mfx_ConstructAig_rec( Mfx_Man_t * p, Nwk_Obj_t * pNode, Aig_Man_t * pMan )
-{
- Aig_Obj_t * pRoot, * pExor;
- Nwk_Obj_t * pObj;
- int i;
- // assign AIG nodes to the leaves
- Vec_PtrForEachEntry( Nwk_Obj_t *, p->vSupp, pObj, i )
- pObj->pCopy = pObj->pNext = (Nwk_Obj_t *)Aig_ObjCreatePi( pMan );
- // strash intermediate nodes
- Nwk_ManIncrementTravId( pNode->pMan );
- Vec_PtrForEachEntry( Nwk_Obj_t *, p->vNodes, pObj, i )
- {
- Nwk_ConvertHopToAig( pObj, pMan );
- if ( pObj == pNode )
- pObj->pNext = Aig_Not((Aig_Obj_t *)pObj->pNext);
- }
- // create the observability condition
- pRoot = Aig_ManConst0(pMan);
- Vec_PtrForEachEntry( Nwk_Obj_t *, p->vRoots, pObj, i )
- {
- pExor = Aig_Exor( pMan, (Aig_Obj_t *)pObj->pCopy, (Aig_Obj_t *)pObj->pNext );
- pRoot = Aig_Or( pMan, pRoot, pExor );
- }
- return pRoot;
-}
-
-/**Function*************************************************************
-
- Synopsis [Adds relevant constraints.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Obj_t * Mfx_ConstructCare_rec( Aig_Man_t * pCare, Aig_Obj_t * pObj, Aig_Man_t * pMan )
-{
- Aig_Obj_t * pObj0, * pObj1;
- if ( Aig_ObjIsTravIdCurrent( pCare, pObj ) )
- return (Aig_Obj_t *)pObj->pData;
- Aig_ObjSetTravIdCurrent( pCare, pObj );
- if ( Aig_ObjIsPi(pObj) )
- return (Aig_Obj_t *)(pObj->pData = NULL);
- pObj0 = Mfx_ConstructCare_rec( pCare, Aig_ObjFanin0(pObj), pMan );
- if ( pObj0 == NULL )
- return (Aig_Obj_t *)(pObj->pData = NULL);
- pObj1 = Mfx_ConstructCare_rec( pCare, Aig_ObjFanin1(pObj), pMan );
- if ( pObj1 == NULL )
- return (Aig_Obj_t *)(pObj->pData = NULL);
- pObj0 = Aig_NotCond( pObj0, Aig_ObjFaninC0(pObj) );
- pObj1 = Aig_NotCond( pObj1, Aig_ObjFaninC1(pObj) );
- return (Aig_Obj_t *)(pObj->pData = Aig_And( pMan, pObj0, pObj1 ));
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Nwk_ManVerifyManager( Nwk_Man_t * pNtk )
-{
- Nwk_Obj_t * pObj;
- int i;
- Nwk_ManForEachObj( pNtk, pObj, i )
- {
- assert( pObj->pMan == pNtk );
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Creates AIG for the window with constraints.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Man_t * Mfx_ConstructAig( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
- Aig_Man_t * pMan;
- Nwk_Obj_t * pFanin;
- Aig_Obj_t * pObjAig, * pPi, * pPo;
- Vec_Int_t * vOuts;
- int i, k, iOut;
-// Nwk_ManVerifyManager( p->pNtk );
- // start the new manager
- pMan = Aig_ManStart( 1000 );
- // construct the root node's AIG cone
- pObjAig = Mfx_ConstructAig_rec( p, pNode, pMan );
-// assert( Aig_ManConst1(pMan) == pObjAig );
- Aig_ObjCreatePo( pMan, pObjAig );
- if ( p->pCare )
- {
- // mark the care set
- Aig_ManIncrementTravId( p->pCare );
- Vec_PtrForEachEntry( Nwk_Obj_t *, p->vSupp, pFanin, i )
- {
- pPi = Aig_ManPi( p->pCare, pFanin->PioId );
- Aig_ObjSetTravIdCurrent( p->pCare, pPi );
- pPi->pData = pFanin->pCopy;
- }
- // construct the constraints
- Vec_PtrForEachEntry( Nwk_Obj_t *, p->vSupp, pFanin, i )
- {
- vOuts = (Vec_Int_t *)Vec_PtrEntry( p->vSuppsInv, pFanin->PioId );
- Vec_IntForEachEntry( vOuts, iOut, k )
- {
- pPo = Aig_ManPo( p->pCare, iOut );
- if ( Aig_ObjIsTravIdCurrent( p->pCare, pPo ) )
- continue;
- Aig_ObjSetTravIdCurrent( p->pCare, pPo );
- if ( Aig_ObjFanin0(pPo) == Aig_ManConst1(p->pCare) )
- continue;
- pObjAig = Mfx_ConstructCare_rec( p->pCare, Aig_ObjFanin0(pPo), pMan );
- if ( pObjAig == NULL )
- continue;
- pObjAig = Aig_NotCond( pObjAig, Aig_ObjFaninC0(pPo) );
- Aig_ObjCreatePo( pMan, pObjAig );
- }
- }
-/*
- Aig_ManForEachPo( p->pCare, pPo, i )
- {
-// assert( Aig_ObjFanin0(pPo) != Aig_ManConst1(p->pCare) );
- if ( Aig_ObjFanin0(pPo) == Aig_ManConst1(p->pCare) )
- continue;
- pObjAig = Mfx_ConstructCare_rec( p->pCare, Aig_ObjFanin0(pPo), pMan );
- if ( pObjAig == NULL )
- continue;
- pObjAig = Aig_NotCond( pObjAig, Aig_ObjFaninC0(pPo) );
- Aig_ObjCreatePo( pMan, pObjAig );
- }
-*/
- }
- if ( p->pPars->fResub )
- {
- // construct the node
- pObjAig = (Aig_Obj_t *)pNode->pCopy;
- Aig_ObjCreatePo( pMan, pObjAig );
- // construct the divisors
- Vec_PtrForEachEntry( Nwk_Obj_t *, p->vDivs, pFanin, i )
- {
- pObjAig = (Aig_Obj_t *)pFanin->pCopy;
- Aig_ObjCreatePo( pMan, pObjAig );
- }
- }
- else
- {
- // construct the fanins
- Nwk_ObjForEachFanin( pNode, pFanin, i )
- {
- pObjAig = (Aig_Obj_t *)pFanin->pCopy;
- Aig_ObjCreatePo( pMan, pObjAig );
- }
- }
- Aig_ManCleanup( pMan );
- return pMan;
-}
-
-/**Function*************************************************************
-
- Synopsis [Creates AIG for the window with constraints.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Man_t * Nwk_AigForConstraints( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
- Nwk_Obj_t * pFanin;
- Aig_Man_t * pMan;
- Aig_Obj_t * pPi, * pPo, * pObjAig, * pObjRoot;
- Vec_Int_t * vOuts;
- int i, k, iOut;
- if ( p->pCare == NULL )
- return NULL;
- pMan = Aig_ManStart( 1000 );
- // mark the care set
- Aig_ManIncrementTravId( p->pCare );
- Vec_PtrForEachEntry( Nwk_Obj_t *, p->vSupp, pFanin, i )
- {
- pPi = Aig_ManPi( p->pCare, pFanin->PioId );
- Aig_ObjSetTravIdCurrent( p->pCare, pPi );
- pPi->pData = Aig_ObjCreatePi(pMan);
- }
- // construct the constraints
- pObjRoot = Aig_ManConst1(pMan);
- Vec_PtrForEachEntry( Nwk_Obj_t *, p->vSupp, pFanin, i )
- {
- vOuts = (Vec_Int_t *)Vec_PtrEntry( p->vSuppsInv, pFanin->PioId );
- Vec_IntForEachEntry( vOuts, iOut, k )
- {
- pPo = Aig_ManPo( p->pCare, iOut );
- if ( Aig_ObjIsTravIdCurrent( p->pCare, pPo ) )
- continue;
- Aig_ObjSetTravIdCurrent( p->pCare, pPo );
- if ( Aig_ObjFanin0(pPo) == Aig_ManConst1(p->pCare) )
- continue;
- pObjAig = Mfx_ConstructCare_rec( p->pCare, Aig_ObjFanin0(pPo), pMan );
- if ( pObjAig == NULL )
- continue;
- pObjAig = Aig_NotCond( pObjAig, Aig_ObjFaninC0(pPo) );
- pObjRoot = Aig_And( pMan, pObjRoot, pObjAig );
- }
- }
- Aig_ObjCreatePo( pMan, pObjRoot );
- Aig_ManCleanup( pMan );
- return pMan;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxWin.c b/src/aig/mfx/mfxWin.c
deleted file mode 100644
index 7cb3c53d..00000000
--- a/src/aig/mfx/mfxWin.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/**CFile****************************************************************
-
- FileName [mfxWin.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [The good old minimization with complete don't-cares.]
-
- Synopsis [Procedures to compute windows stretching to the PIs.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: mfxWin.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Returns 1 if the node should be a root.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static inline int Mfx_ComputeRootsCheck( Nwk_Obj_t * pNode, int nLevelMax, int nFanoutLimit )
-{
- Nwk_Obj_t * pFanout;
- int i;
- // the node is the root if one of the following is true:
- // (1) the node has more than fanouts than the limit
- if ( Nwk_ObjFanoutNum(pNode) > nFanoutLimit )
- return 1;
- // (2) the node has CO fanouts
- // (3) the node has fanouts above the cutoff level
- Nwk_ObjForEachFanout( pNode, pFanout, i )
- if ( Nwk_ObjIsCo(pFanout) || pFanout->Level > nLevelMax )
- return 1;
- return 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Recursively collects the root candidates.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Mfx_ComputeRoots_rec( Nwk_Obj_t * pNode, int nLevelMax, int nFanoutLimit, Vec_Ptr_t * vRoots )
-{
- Nwk_Obj_t * pFanout;
- int i;
- assert( Nwk_ObjIsNode(pNode) );
- if ( Nwk_ObjIsTravIdCurrent(pNode) )
- return;
- Nwk_ObjSetTravIdCurrent( pNode );
- // check if the node should be the root
- if ( Mfx_ComputeRootsCheck( pNode, nLevelMax, nFanoutLimit ) )
- Vec_PtrPush( vRoots, pNode );
- else // if not, explore its fanouts
- Nwk_ObjForEachFanout( pNode, pFanout, i )
- Mfx_ComputeRoots_rec( pFanout, nLevelMax, nFanoutLimit, vRoots );
-}
-
-/**Function*************************************************************
-
- Synopsis [Recursively collects the root candidates.]
-
- Description [Returns 1 if the only root is this node.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Mfx_ComputeRoots( Nwk_Obj_t * pNode, int nWinTfoMax, int nFanoutLimit )
-{
- Vec_Ptr_t * vRoots;
- vRoots = Vec_PtrAlloc( 10 );
- Nwk_ManIncrementTravId( pNode->pMan );
- Mfx_ComputeRoots_rec( pNode, pNode->Level + nWinTfoMax, nFanoutLimit, vRoots );
- assert( Vec_PtrSize(vRoots) > 0 );
-// if ( Vec_PtrSize(vRoots) == 1 && Vec_PtrEntry(vRoots, 0) == pNode )
-// return 0;
- return vRoots;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfx_.c b/src/aig/mfx/mfx_.c
deleted file mode 100644
index 2682fa42..00000000
--- a/src/aig/mfx/mfx_.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/**CFile****************************************************************
-
- FileName [mfs_.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [The good old minimization with complete don't-cares.]
-
- Synopsis []
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: mfs_.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfsInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/module.make b/src/aig/mfx/module.make
deleted file mode 100644
index 22b9b72a..00000000
--- a/src/aig/mfx/module.make
+++ /dev/null
@@ -1,8 +0,0 @@
-SRC += src/aig/mfx/mfxCore.c \
- src/aig/mfx/mfxDiv.c \
- src/aig/mfx/mfxInter.c \
- src/aig/mfx/mfxMan.c \
- src/aig/mfx/mfxResub.c \
- src/aig/mfx/mfxSat.c \
- src/aig/mfx/mfxStrash.c \
- src/aig/mfx/mfxWin.c
diff --git a/src/aig/ntl/module.make b/src/aig/ntl/module.make
deleted file mode 100644
index 2af0f4e0..00000000
--- a/src/aig/ntl/module.make
+++ /dev/null
@@ -1,17 +0,0 @@
-SRC += src/aig/ntl/ntlCheck.c \
- src/aig/ntl/ntlCore.c \
- src/aig/ntl/ntlEc.c \
- src/aig/ntl/ntlExtract.c \
- src/aig/ntl/ntlFraig.c \
- src/aig/ntl/ntlInsert.c \
- src/aig/ntl/ntlMan.c \
- src/aig/ntl/ntlMap.c \
- src/aig/ntl/ntlNames.c \
- src/aig/ntl/ntlObj.c \
- src/aig/ntl/ntlReadBlif.c \
- src/aig/ntl/ntlSweep.c \
- src/aig/ntl/ntlTable.c \
- src/aig/ntl/ntlTime.c \
- src/aig/ntl/ntlUtil.c \
- src/aig/ntl/ntlWriteBlif.c
-
diff --git a/src/aig/ntl/ntl.h b/src/aig/ntl/ntl.h
deleted file mode 100644
index c0d701e0..00000000
--- a/src/aig/ntl/ntl.h
+++ /dev/null
@@ -1,426 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntl.h]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [External declarations.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntl.h,v 1.3 2008/10/24 14:18:44 mjarvin Exp $]
-
-***********************************************************************/
-
-#ifndef __NTL_H__
-#define __NTL_H__
-
-
-////////////////////////////////////////////////////////////////////////
-/// INCLUDES ///
-////////////////////////////////////////////////////////////////////////
-
-#include "aig.h"
-#include "tim.h"
-#include "nwk.h"
-
-////////////////////////////////////////////////////////////////////////
-/// PARAMETERS ///
-////////////////////////////////////////////////////////////////////////
-
-ABC_NAMESPACE_HEADER_START
-
-////////////////////////////////////////////////////////////////////////
-/// BASIC TYPES ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Ntl_Mod_t_ Ntl_Mod_t;
-typedef struct Ntl_Reg_t_ Ntl_Reg_t;
-typedef struct Ntl_Obj_t_ Ntl_Obj_t;
-typedef struct Ntl_Net_t_ Ntl_Net_t;
-typedef struct Ntl_Lut_t_ Ntl_Lut_t;
-
-// object types
-typedef enum {
- NTL_OBJ_NONE, // 0: non-existent object
- NTL_OBJ_PI, // 1: primary input
- NTL_OBJ_PO, // 2: primary output
- NTL_OBJ_LATCH, // 3: latch
- NTL_OBJ_NODE, // 4: logic node
- NTL_OBJ_LUT1, // 5: inverter/buffer
- NTL_OBJ_BOX, // 6: white box or black box
- NTL_OBJ_VOID // 7: unused object
-} Ntl_Type_t;
-
-struct Ntl_Man_t_
-{
- // models of this design
- char * pName; // the name of this design
- char * pSpec; // the name of input file
- Vec_Ptr_t * vModels; // the array of all models used to represent boxes
- int BoxTypes[32]; // the array of box types among the models
- // memory managers
- Aig_MmFlex_t * pMemObjs; // memory for objects
- Aig_MmFlex_t * pMemSops; // memory for SOPs
- // extracted representation
- Vec_Ptr_t * vCis; // the primary inputs of the extracted part
- Vec_Ptr_t * vCos; // the primary outputs of the extracted part
- Vec_Ptr_t * vVisNodes; // the nodes of the abstracted part
- Vec_Int_t * vBox1Cios; // the first COs of the boxes
- Vec_Int_t * vRegClasses; // the classes of registers in the AIG
- Vec_Int_t * vRstClasses; // the classes of reset registers in the AIG
- Aig_Man_t * pAig; // the extracted AIG
- Tim_Man_t * pManTime; // the timing manager
- int iLastCi; // the last true CI
- void * pNal; // additional data
- void (*pNalF)(void *); // additional data
- void (*pNalD)(void *,void *); // additional data
- void (*pNalW)(void *,void *); // additional data
- void (*pNalR)(void *); // additional data
- // hashing names into models
- Ntl_Mod_t ** pModTable; // the hash table of names into models
- int nModTableSize; // the allocated table size
- int nModEntries; // the number of entries in the hash table
-};
-
-struct Ntl_Mod_t_
-{
- // model description
- Ntl_Man_t * pMan; // the model manager
- char * pName; // the model name
- Vec_Ptr_t * vObjs; // the array of all objects
- Vec_Ptr_t * vPis; // the array of PI objects
- Vec_Ptr_t * vPos; // the array of PO objects
- Vec_Ptr_t * vNets; // the array of nets
- int nObjs[NTL_OBJ_VOID]; // counter of objects of each type
- // box attributes
- unsigned int attrWhite :1; // box has known logic
- unsigned int attrBox :1; // box is to remain unmapped
- unsigned int attrComb :1; // box is combinational
- unsigned int attrKeep :1; // box cannot be removed by structural sweep
- unsigned int attrNoMerge :1; // box outputs cannot be merged
- // hashing names into nets
- Ntl_Net_t ** pTable; // the hash table of names into nets
- int nTableSize; // the allocated table size
- int nEntries; // the number of entries in the hash table
- // clocks of the model
- Vec_Ptr_t * vClocks; // the clock signals
- Vec_Vec_t * vClockFlops; // the flops of each clock
- // resets of the model
- Vec_Ptr_t * vResets; // the reset signals
- Vec_Vec_t * vResetFlops; // the ASYNC flops of each reset
- // delay information
- Vec_Int_t * vDelays;
- Vec_Int_t * vTimeInputs;
- Vec_Int_t * vTimeOutputs;
- float * pDelayTable;
- // other data members
- Ntl_Mod_t * pNext;
- void * pCopy;
- int nUsed, nRems;
-};
-
-struct Ntl_Reg_t_
-{
- unsigned int regInit : 2; // register initial value
- unsigned int regType : 3; // register type
- unsigned int regClass : 28; // register class
-};
-
-struct Ntl_Obj_t_
-{
-// Ntl_Mod_t * pModel; // the model
- void * pCopy; // the copy of this object
- unsigned Type : 3; // object type
- unsigned fMark : 1; // temporary mark
- unsigned Id : 28; // object ID
- int nFanins; // the number of fanins
- int nFanouts; // the number of fanouts
- int Reset; // reset of the flop
- union { // functionality
- Ntl_Mod_t * pImplem; // model (for boxes)
- char * pSop; // SOP (for logic nodes)
- Ntl_Reg_t LatchId; // init state + register class (for latches)
- };
- union { // clock / other data
- Ntl_Net_t * pClock; // clock (for registers)
- void * pTemp; // other data
- int iTemp; // other data
- };
- Ntl_Net_t * pFanio[0]; // fanins/fanouts
-};
-
-struct Ntl_Net_t_
-{
- Ntl_Net_t * pNext; // next net in the hash table
- void * pCopy; // the copy of this object
- union {
- void * pCopy2; // the copy of this object
- float dTemp; // other data
- int iTemp; // other data
- };
- Ntl_Obj_t * pDriver; // driver of the net
- unsigned NetId : 27; // unique ID of the net
- unsigned nVisits : 2; // the number of times the net is visted
- unsigned fMark : 1; // temporary mark
- unsigned fMark2 : 1; // temporary mark
- unsigned fFixed : 1; // the fixed net
- char pName[0]; // the name of this net
-};
-
-struct Ntl_Lut_t_
-{
- int Id; // the ID of the root AIG node
- int nFanins; // the number of fanins
- int * pFanins; // the array of fanins
- unsigned * pTruth; // the truth table
-};
-
-////////////////////////////////////////////////////////////////////////
-/// MACRO DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-
-////////////////////////////////////////////////////////////////////////
-/// INLINED FUNCTIONS ///
-////////////////////////////////////////////////////////////////////////
-
-static inline Ntl_Mod_t * Ntl_ManRootModel( Ntl_Man_t * p ) { return (Ntl_Mod_t *)Vec_PtrEntry( p->vModels, 0 ); }
-
-static inline int Ntl_ModelPiNum( Ntl_Mod_t * p ) { return p->nObjs[NTL_OBJ_PI]; }
-static inline int Ntl_ModelPoNum( Ntl_Mod_t * p ) { return p->nObjs[NTL_OBJ_PO]; }
-static inline int Ntl_ModelNodeNum( Ntl_Mod_t * p ) { return p->nObjs[NTL_OBJ_NODE]; }
-static inline int Ntl_ModelLut1Num( Ntl_Mod_t * p ) { return p->nObjs[NTL_OBJ_LUT1]; }
-static inline int Ntl_ModelLatchNum( Ntl_Mod_t * p ) { return p->nObjs[NTL_OBJ_LATCH]; }
-static inline int Ntl_ModelBoxNum( Ntl_Mod_t * p ) { return p->nObjs[NTL_OBJ_BOX]; }
-
-static inline Ntl_Obj_t * Ntl_ModelPi( Ntl_Mod_t * p, int i ) { return (Ntl_Obj_t *)Vec_PtrEntry(p->vPis, i); }
-static inline Ntl_Obj_t * Ntl_ModelPo( Ntl_Mod_t * p, int i ) { return (Ntl_Obj_t *)Vec_PtrEntry(p->vPos, i); }
-static inline Ntl_Obj_t * Ntl_ModelObj( Ntl_Mod_t * p, int i ) { return (Ntl_Obj_t *)Vec_PtrEntry(p->vObjs, i); }
-static inline Ntl_Net_t * Ntl_ModelNet( Ntl_Mod_t * p, int i ) { return (Ntl_Net_t *)Vec_PtrEntry(p->vNets, i); }
-
-static inline char * Ntl_ModelPiName( Ntl_Mod_t * p, int i ) { return Ntl_ModelPi(p, i)->pFanio[0]->pName; }
-static inline char * Ntl_ModelPoName( Ntl_Mod_t * p, int i ) { return Ntl_ModelPo(p, i)->pFanio[0]->pName; }
-
-static inline int Ntl_ObjFaninNum( Ntl_Obj_t * p ) { return p->nFanins; }
-static inline int Ntl_ObjFanoutNum( Ntl_Obj_t * p ) { return p->nFanouts; }
-
-static inline int Ntl_ObjIsPi( Ntl_Obj_t * p ) { return p->Type == NTL_OBJ_PI; }
-static inline int Ntl_ObjIsPo( Ntl_Obj_t * p ) { return p->Type == NTL_OBJ_PO; }
-static inline int Ntl_ObjIsNode( Ntl_Obj_t * p ) { return p->Type == NTL_OBJ_NODE; }
-static inline int Ntl_ObjIsLatch( Ntl_Obj_t * p ) { return p->Type == NTL_OBJ_LATCH; }
-static inline int Ntl_ObjIsBox( Ntl_Obj_t * p ) { return p->Type == NTL_OBJ_BOX; }
-static inline int Ntl_ObjIsLutBox( Ntl_Obj_t * p ) { return Ntl_ObjIsBox(p) && strncmp("LUT", p->pImplem->pName, 3) == 0; }
-
-static inline Ntl_Net_t * Ntl_ObjFanin0( Ntl_Obj_t * p ) { return p->pFanio[0]; }
-static inline Ntl_Net_t * Ntl_ObjFanout0( Ntl_Obj_t * p ) { return p->pFanio[p->nFanins]; }
-
-static inline Ntl_Net_t * Ntl_ObjFanin( Ntl_Obj_t * p, int i ) { return p->pFanio[i]; }
-static inline Ntl_Net_t * Ntl_ObjFanout( Ntl_Obj_t * p, int i ) { return p->pFanio[p->nFanins+i]; }
-
-static inline void Ntl_ObjSetFanin( Ntl_Obj_t * p, Ntl_Net_t * pNet, int i ) { p->pFanio[i] = pNet; }
-static inline void Ntl_ObjSetFanout( Ntl_Obj_t * p, Ntl_Net_t * pNet, int i ) { p->pFanio[p->nFanins+i] = pNet; pNet->pDriver = p; }
-
-static inline int Ntl_ObjIsInit1( Ntl_Obj_t * p ) { assert( Ntl_ObjIsLatch(p) ); return p->LatchId.regInit == 1; }
-static inline void Ntl_ObjSetInit0( Ntl_Obj_t * p ) { assert( Ntl_ObjIsLatch(p) ); p->LatchId.regInit = 0; }
-
-static inline int Ntl_BoxIsWhite( Ntl_Obj_t * p ) { assert( Ntl_ObjIsBox(p) ); return p->pImplem->attrWhite; }
-static inline int Ntl_BoxIsBlack( Ntl_Obj_t * p ) { assert( Ntl_ObjIsBox(p) ); return !p->pImplem->attrWhite; }
-static inline int Ntl_BoxIsComb( Ntl_Obj_t * p ) { assert( Ntl_ObjIsBox(p) ); return p->pImplem->attrComb; }
-static inline int Ntl_BoxIsSeq( Ntl_Obj_t * p ) { assert( Ntl_ObjIsBox(p) ); return !p->pImplem->attrComb; }
-static inline int Ntl_BoxIsNoMerge( Ntl_Obj_t * p ) { assert( Ntl_ObjIsBox(p) ); return !p->pImplem->attrNoMerge; }
-
-static inline int Ntl_ObjIsMapLeaf( Ntl_Obj_t * p ) { return Ntl_ObjIsPi(p) || (Ntl_ObjIsBox(p) && Ntl_BoxIsSeq(p)); }
-static inline int Ntl_ObjIsMapRoot( Ntl_Obj_t * p ) { return Ntl_ObjIsPo(p) || (Ntl_ObjIsBox(p) && Ntl_BoxIsSeq(p)); }
-
-static inline int Ntl_ObjIsCombLeaf( Ntl_Obj_t * p ) { return Ntl_ObjIsPi(p) || (Ntl_ObjIsBox(p) && (Ntl_BoxIsSeq(p) || Ntl_BoxIsBlack(p))); }
-static inline int Ntl_ObjIsCombRoot( Ntl_Obj_t * p ) { return Ntl_ObjIsPo(p) || (Ntl_ObjIsBox(p) && (Ntl_BoxIsSeq(p) || Ntl_BoxIsBlack(p))); }
-
-static inline int Ntl_ObjIsSeqLeaf( Ntl_Obj_t * p ) { return Ntl_ObjIsPi(p) || (Ntl_ObjIsBox(p) && Ntl_BoxIsBlack(p)); }
-static inline int Ntl_ObjIsSeqRoot( Ntl_Obj_t * p ) { return Ntl_ObjIsPo(p) || (Ntl_ObjIsBox(p) && Ntl_BoxIsBlack(p)); }
-
-////////////////////////////////////////////////////////////////////////
-/// ITERATORS ///
-////////////////////////////////////////////////////////////////////////
-
-#define Ntl_ManForEachModel( p, pMod, i ) \
- for ( i = 0; (i < Vec_PtrSize(p->vModels)) && (((pMod) = (Ntl_Mod_t*)Vec_PtrEntry(p->vModels, i)), 1); i++ )
-#define Ntl_ManForEachCiNet( p, pNet, i ) \
- Vec_PtrForEachEntry( Ntl_Net_t *, p->vCis, pNet, i )
-#define Ntl_ManForEachCoNet( p, pNet, i ) \
- Vec_PtrForEachEntry( Ntl_Net_t *, p->vCos, pNet, i )
-
-#define Ntl_ModelForEachPi( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vPis)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vPis, i)), 1); i++ )
-#define Ntl_ModelForEachPo( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vPos)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vPos, i)), 1); i++ )
-#define Ntl_ModelForEachNet( pNwk, pNet, i ) \
- Vec_PtrForEachEntry( Ntl_Net_t *, pNwk->vNets, pNet, i ) \
- if ( pNet == NULL ) {} else
-#define Ntl_ModelForEachObj( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
- if ( pObj == NULL ) {} else
-#define Ntl_ModelForEachLatch( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
- if ( (pObj) == NULL || !Ntl_ObjIsLatch((Ntl_Obj_t*)pObj) ) {} else
-#define Ntl_ModelForEachNode( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
- if ( (pObj) == NULL || !Ntl_ObjIsNode(pObj) ) {} else
-#define Ntl_ModelForEachBox( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
- if ( (pObj) == NULL || !Ntl_ObjIsBox(pObj) ) {} else
-
-#define Ntl_ObjForEachFanin( pObj, pFanin, i ) \
- for ( i = 0; (i < (pObj)->nFanins) && (((pFanin) = (pObj)->pFanio[i]), 1); i++ )
-#define Ntl_ObjForEachFanout( pObj, pFanout, i ) \
- for ( i = 0; (i < (pObj)->nFanouts) && (((pFanout) = (pObj)->pFanio[(pObj)->nFanins+i]), 1); i++ )
-
-#define Ntl_ModelForEachMapLeaf( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
- if ( (pObj) == NULL || !Ntl_ObjIsMapLeaf(pObj) ) {} else
-#define Ntl_ModelForEachMapRoot( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
- if ( (pObj) == NULL || !Ntl_ObjIsMapRoot(pObj) ) {} else
-#define Ntl_ModelForEachCombLeaf( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
- if ( (pObj) == NULL || !Ntl_ObjIsCombLeaf(pObj) ) {} else
-#define Ntl_ModelForEachCombRoot( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
- if ( (pObj) == NULL || !Ntl_ObjIsCombRoot(pObj) ) {} else
-#define Ntl_ModelForEachSeqLeaf( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
- if ( (pObj) == NULL || !Ntl_ObjIsSeqLeaf(pObj) ) {} else
-#define Ntl_ModelForEachSeqRoot( pNwk, pObj, i ) \
- for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
- if ( (pObj) == NULL || !Ntl_ObjIsSeqRoot(pObj) ) {} else
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== ntlCore.c ==========================================================*/
-extern ABC_DLL int Ntl_ManInsertTest( Ntl_Man_t * p, Aig_Man_t * pAig );
-extern ABC_DLL int Ntl_ManInsertTestIf( Ntl_Man_t * p, Aig_Man_t * pAig );
-/*=== ntlEc.c ==========================================================*/
-extern ABC_DLL void Ntl_ManPrepareCecMans( Ntl_Man_t * pMan1, Ntl_Man_t * pMan2, Aig_Man_t ** ppAig1, Aig_Man_t ** ppAig2 );
-extern ABC_DLL void Ntl_ManPrepareCec( char * pFileName1, char * pFileName2, Aig_Man_t ** ppAig1, Aig_Man_t ** ppAig2 );
-extern ABC_DLL Aig_Man_t * Ntl_ManPrepareSec( char * pFileName1, char * pFileName2 );
-/*=== ntlExtract.c ==========================================================*/
-extern ABC_DLL Aig_Man_t * Ntl_ManExtract( Ntl_Man_t * p );
-extern ABC_DLL Aig_Man_t * Ntl_ManCollapse( Ntl_Man_t * p, int fSeq );
-extern ABC_DLL Aig_Man_t * Ntl_ManCollapseComb( Ntl_Man_t * p );
-extern ABC_DLL Aig_Man_t * Ntl_ManCollapseSeq( Ntl_Man_t * p, int nMinDomSize, int fVerbose );
-extern ABC_DLL Nwk_Man_t * Ntl_ManExtractNwk( Ntl_Man_t * p, Aig_Man_t * pAig, Tim_Man_t * pManTime );
-/*=== ntlInsert.c ==========================================================*/
-extern ABC_DLL Ntl_Man_t * Ntl_ManInsertMapping( Ntl_Man_t * p, Vec_Ptr_t * vMapping, Aig_Man_t * pAig );
-extern ABC_DLL Ntl_Man_t * Ntl_ManInsertAig( Ntl_Man_t * p, Aig_Man_t * pAig );
-extern ABC_DLL Ntl_Man_t * Ntl_ManInsertNtk( Ntl_Man_t * p, Nwk_Man_t * pNtk );
-/*=== ntlCheck.c ==========================================================*/
-extern ABC_DLL int Ntl_ManCheck( Ntl_Man_t * pMan );
-extern ABC_DLL int Ntl_ModelCheck( Ntl_Mod_t * pModel, int fMain );
-extern ABC_DLL void Ntl_ModelFixNonDrivenNets( Ntl_Mod_t * pModel );
-extern ABC_DLL void Ntl_ModelTransformLatches( Ntl_Mod_t * pModel );
-/*=== ntlMan.c ============================================================*/
-extern ABC_DLL Ntl_Man_t * Ntl_ManAlloc();
-extern ABC_DLL void Ntl_ManCleanup( Ntl_Man_t * p );
-extern ABC_DLL Ntl_Man_t * Ntl_ManStartFrom( Ntl_Man_t * p );
-extern ABC_DLL Ntl_Man_t * Ntl_ManDup( Ntl_Man_t * p );
-extern ABC_DLL Ntl_Man_t * Ntl_ManDupCollapseLuts( Ntl_Man_t * p );
-extern ABC_DLL void Ntl_ManFree( Ntl_Man_t * p );
-extern ABC_DLL void Ntl_ManPrintStats( Ntl_Man_t * p );
-extern ABC_DLL Tim_Man_t * Ntl_ManReadTimeMan( Ntl_Man_t * p );
-extern ABC_DLL void Ntl_ManPrintTypes( Ntl_Man_t * p );
-extern ABC_DLL int Ntl_ManCompareClockClasses( Vec_Ptr_t ** pp1, Vec_Ptr_t ** pp2 );
-extern ABC_DLL void Ntl_ManPrintClocks( Ntl_Man_t * p );
-extern ABC_DLL void Ntl_ManPrintResets( Ntl_Man_t * p );
-extern ABC_DLL Ntl_Mod_t * Ntl_ModelAlloc( Ntl_Man_t * pMan, char * pName );
-extern ABC_DLL Ntl_Mod_t * Ntl_ModelStartFrom( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld );
-extern ABC_DLL Ntl_Mod_t * Ntl_ModelDup( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld );
-extern ABC_DLL Ntl_Mod_t * Ntl_ModelDupCollapseLuts( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld );
-extern ABC_DLL void Ntl_ModelFree( Ntl_Mod_t * p );
-extern ABC_DLL Ntl_Mod_t * Ntl_ManCreateLatchModel( Ntl_Man_t * pMan, int Init );
-extern ABC_DLL int Ntl_ModelCountLut0( Ntl_Mod_t * p );
-extern ABC_DLL int Ntl_ModelCountLut1( Ntl_Mod_t * p );
-extern ABC_DLL int Ntl_ModelCountBuf( Ntl_Mod_t * p );
-extern ABC_DLL int Ntl_ModelCountInv( Ntl_Mod_t * p );
-/*=== ntlMap.c ============================================================*/
-extern ABC_DLL Vec_Ptr_t * Ntl_MappingAlloc( int nLuts, int nVars );
-extern ABC_DLL Vec_Ptr_t * Ntl_MappingFromAig( Aig_Man_t * p );
-extern ABC_DLL Vec_Ptr_t * Ntl_MappingFpga( Aig_Man_t * p );
-extern ABC_DLL Vec_Ptr_t * Ntl_MappingIf( Ntl_Man_t * pMan, Aig_Man_t * p );
-/*=== ntlObj.c ============================================================*/
-extern ABC_DLL Ntl_Obj_t * Ntl_ModelCreatePi( Ntl_Mod_t * pModel );
-extern ABC_DLL Ntl_Obj_t * Ntl_ModelCreatePo( Ntl_Mod_t * pModel, Ntl_Net_t * pNet );
-extern ABC_DLL Ntl_Obj_t * Ntl_ModelCreateLatch( Ntl_Mod_t * pModel );
-extern ABC_DLL Ntl_Obj_t * Ntl_ModelCreateNode( Ntl_Mod_t * pModel, int nFanins );
-extern ABC_DLL Ntl_Obj_t * Ntl_ModelCreateBox( Ntl_Mod_t * pModel, int nFanins, int nFanouts );
-extern ABC_DLL Ntl_Obj_t * Ntl_ModelDupObj( Ntl_Mod_t * pModel, Ntl_Obj_t * pOld );
-extern ABC_DLL Ntl_Obj_t * Ntl_ModelCreatePiWithName( Ntl_Mod_t * pModel, char * pName );
-extern ABC_DLL char * Ntl_ManStoreName( Ntl_Man_t * p, char * pName );
-extern ABC_DLL char * Ntl_ManStoreSop( Aig_MmFlex_t * pMan, const char * pSop );
-extern ABC_DLL char * Ntl_ManStoreFileName( Ntl_Man_t * p, char * pFileName );
-extern ABC_DLL int Ntl_ManObjWhichFanout( Ntl_Obj_t * pNode, Ntl_Net_t * pFanout );
-/*=== ntlSweep.c ==========================================================*/
-extern ABC_DLL int Ntl_ManSweep( Ntl_Man_t * p, int fVerbose );
-/*=== ntlTable.c ==========================================================*/
-extern ABC_DLL Ntl_Net_t * Ntl_ModelFindNet( Ntl_Mod_t * p, const char * pName );
-extern ABC_DLL char * Ntl_ModelCreateNetName( Ntl_Mod_t * p, const char * pName, int Num );
-extern ABC_DLL Ntl_Net_t * Ntl_ModelFindOrCreateNet( Ntl_Mod_t * p, const char * pName );
-extern ABC_DLL Ntl_Net_t * Ntl_ModelDontFindCreateNet( Ntl_Mod_t * p, const char * pName );
-extern ABC_DLL void Ntl_ModelSetPioNumbers( Ntl_Mod_t * p );
-extern ABC_DLL int Ntl_ModelFindPioNumber( Ntl_Mod_t * p, int fPiOnly, int fPoOnly, const char * pName, int * pNumber );
-extern ABC_DLL int Ntl_ModelSetNetDriver( Ntl_Obj_t * pObj, Ntl_Net_t * pNet );
-extern ABC_DLL int Ntl_ModelClearNetDriver( Ntl_Obj_t * pObj, Ntl_Net_t * pNet );
-extern ABC_DLL void Ntl_ModelDeleteNet( Ntl_Mod_t * p, Ntl_Net_t * pNet );
-extern ABC_DLL void Ntl_ModelInsertNet( Ntl_Mod_t * p, Ntl_Net_t * pNet );
-extern ABC_DLL int Ntl_ModelCountNets( Ntl_Mod_t * p );
-extern ABC_DLL int Ntl_ManAddModel( Ntl_Man_t * p, Ntl_Mod_t * pModel );
-extern ABC_DLL Ntl_Mod_t * Ntl_ManFindModel( Ntl_Man_t * p, const char * pName );
-/*=== ntlTime.c ==========================================================*/
-extern ABC_DLL Tim_Man_t * Ntl_ManCreateTiming( Ntl_Man_t * p );
-/*=== ntlReadBlif.c ==========================================================*/
-extern ABC_DLL Ntl_Man_t * Ntl_ManReadBlif( char * pFileName, int fCheck );
-/*=== ntlWriteBlif.c ==========================================================*/
-extern ABC_DLL void Ntl_ManWriteBlif( Ntl_Man_t * p, char * pFileName );
-extern ABC_DLL void Ntl_WriteBlifLogic( Nwk_Man_t * pNtk, Ntl_Man_t * p, char * pFileName );
-/*=== ntlUtil.c ==========================================================*/
-extern ABC_DLL int Ntl_FileIsType( char * pFileName, char * pS1, char * pS2, char * pS3 );
-extern ABC_DLL int Ntl_ModelGetFaninMax( Ntl_Mod_t * pRoot );
-extern ABC_DLL Ntl_Net_t * Ntl_ModelFindSimpleNet( Ntl_Net_t * pNetCo );
-extern ABC_DLL int Ntl_ManCountSimpleCoDrivers( Ntl_Man_t * p );
-extern ABC_DLL Vec_Ptr_t * Ntl_ManCollectCiNames( Ntl_Man_t * p );
-extern ABC_DLL Vec_Ptr_t * Ntl_ManCollectCoNames( Ntl_Man_t * p );
-extern ABC_DLL void Ntl_ManMarkCiCoNets( Ntl_Man_t * p );
-extern ABC_DLL void Ntl_ManUnmarkCiCoNets( Ntl_Man_t * p );
-extern ABC_DLL void Ntl_ManSetZeroInitValues( Ntl_Man_t * p );
-extern ABC_DLL void Ntl_ManTransformInitValues( Ntl_Man_t * p );
-extern ABC_DLL Vec_Vec_t * Ntl_ManTransformRegClasses( Ntl_Man_t * pMan, int nSizeMax, int fVerbose );
-extern ABC_DLL void Ntl_ManFilterRegisterClasses( Aig_Man_t * pAig, Vec_Int_t * vRegClasses, int fVerbose );
-extern ABC_DLL int Ntl_ManLatchNum( Ntl_Man_t * p );
-extern ABC_DLL int Ntl_ManIsComb( Ntl_Man_t * p );
-extern ABC_DLL int Ntl_ModelCombLeafNum( Ntl_Mod_t * p );
-extern ABC_DLL int Ntl_ModelCombRootNum( Ntl_Mod_t * p );
-extern ABC_DLL int Ntl_ModelSeqLeafNum( Ntl_Mod_t * p );
-extern ABC_DLL int Ntl_ModelSeqRootNum( Ntl_Mod_t * p );
-extern ABC_DLL int Ntl_ModelCheckNetsAreNotMarked( Ntl_Mod_t * pModel );
-extern ABC_DLL void Ntl_ModelClearNets( Ntl_Mod_t * pModel );
-extern ABC_DLL void Ntl_ManRemoveUselessNets( Ntl_Man_t * p );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/ntl/ntlCheck.c b/src/aig/ntl/ntlCheck.c
deleted file mode 100644
index 7aecf878..00000000
--- a/src/aig/ntl/ntlCheck.c
+++ /dev/null
@@ -1,379 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlCheck.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Checks consistency of the netlist.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlCheck.c,v 1.1 2008/10/10 14:09:29 mjarvin Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "aig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelCheckCombPoPaths_rec( Ntl_Mod_t * pModel, Ntl_Net_t * pNet )
-{
- Ntl_Net_t * pFanin;
- int i;
- // skip visited nets
- if ( pNet->nVisits == 2 )
- return 1;
- pNet->nVisits = 2;
- // process PIs
- if ( Ntl_ObjIsPi(pNet->pDriver) )
- return 0;
- // process registers
- if ( Ntl_ObjIsLatch(pNet->pDriver) )
- return 1;
- assert( Ntl_ObjIsNode(pNet->pDriver) );
- // call recursively
- Ntl_ObjForEachFanin( pNet->pDriver, pFanin, i )
- if ( !Ntl_ModelCheckCombPoPaths_rec( pModel, pFanin ) )
- return 0;
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Checks the existence of combinational paths from POs to PIs.]
-
- Description [Returns 0 if the path is found.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelCheckCombPoPaths( Ntl_Mod_t * pModel )
-{
- Ntl_Obj_t * pObj;
- int i;
- Ntl_ModelClearNets( pModel );
- Ntl_ModelForEachPo( pModel, pObj, i )
- if ( !Ntl_ModelCheckCombPoPaths_rec( pModel, Ntl_ObjFanin0(pObj) ) )
- return 0;
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Checks one model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelCheck( Ntl_Mod_t * pModel, int fMain )
-{
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet;
- int i, k, fStatus = 1;
-
- // check root level model
- if ( fMain )
- {
- if ( Ntl_ModelLatchNum(pModel) > 0 )
- {
- printf( "Root level model %s has %d registers.\n", pModel->pName, Ntl_ModelLatchNum(pModel) );
- fStatus = 0;
- }
- goto checkobjs;
- }
-
- // check delay information
- if ( pModel->attrBox && pModel->attrComb )
- {
- if ( pModel->vDelays == NULL )
- {
- printf( "Warning: Comb model %s does not have delay info. Default 1.0 delays are assumed.\n", pModel->pName );
- pModel->vDelays = Vec_IntAlloc( 3 );
- Vec_IntPush( pModel->vDelays, -1 );
- Vec_IntPush( pModel->vDelays, -1 );
- Vec_IntPush( pModel->vDelays, Aig_Float2Int(1.0) );
- }
- if ( pModel->vTimeInputs != NULL )
- {
- printf( "Combinational model %s has input arrival/required time information.\n", pModel->pName );
- fStatus = 0;
- }
- if ( pModel->vTimeOutputs != NULL )
- {
- printf( "Combinational model %s has output arrival/required time information.\n", pModel->pName );
- fStatus = 0;
- }
- }
- if ( pModel->attrBox && !pModel->attrComb )
- {
- if ( pModel->vDelays != NULL )
- {
- printf( "Sequential model %s has delay info.\n", pModel->pName );
- fStatus = 0;
- }
- if ( pModel->vTimeInputs == NULL )
- {
- printf( "Warning: Seq model %s does not have input arrival/required time info. Default 0.0 is assumed.\n", pModel->pName );
- pModel->vTimeInputs = Vec_IntAlloc( 2 );
- Vec_IntPush( pModel->vTimeInputs, -1 );
- Vec_IntPush( pModel->vTimeInputs, Aig_Float2Int(0.0) );
- }
- if ( pModel->vTimeOutputs == NULL )
- {
-// printf( "Warning: Seq model %s does not have output arrival/required time info. Default 0.0 is assumed.\n", pModel->pName );
- pModel->vTimeOutputs = Vec_IntAlloc( 2 );
- Vec_IntPush( pModel->vTimeOutputs, -1 );
- Vec_IntPush( pModel->vTimeOutputs, Aig_Float2Int(0.0) );
- }
- }
-
- // check box attributes
- if ( pModel->attrBox )
- {
- if ( !pModel->attrWhite )
- {
- if ( Ntl_ModelNodeNum(pModel) + Ntl_ModelLut1Num(pModel) > 0 )
- {
- printf( "Model %s is a blackbox, yet it has %d nodes.\n", pModel->pName, Ntl_ModelNodeNum(pModel) + Ntl_ModelLut1Num(pModel) );
- fStatus = 0;
- }
- if ( Ntl_ModelLatchNum(pModel) > 0 )
- {
- printf( "Model %s is a blackbox, yet it has %d registers.\n", pModel->pName, Ntl_ModelLatchNum(pModel) );
- fStatus = 0;
- }
- return fStatus;
- }
- // this is a white box
- if ( pModel->attrComb && Ntl_ModelNodeNum(pModel) + Ntl_ModelLut1Num(pModel) == 0 )
- {
- printf( "Model %s is a comb white box, yet it has no nodes.\n", pModel->pName );
- fStatus = 0;
- }
- if ( pModel->attrComb && Ntl_ModelLatchNum(pModel) > 0 )
- {
- printf( "Model %s is a comb white box, yet it has registers.\n", pModel->pName );
- fStatus = 0;
- }
- if ( !pModel->attrComb && Ntl_ModelLatchNum(pModel) == 0 )
- {
- printf( "Model %s is a seq white box, yet it has no registers.\n", pModel->pName );
- fStatus = 0;
- }
- if ( !pModel->attrComb && !Ntl_ModelCheckCombPoPaths(pModel) )
- {
- printf( "Model %s is a seq white box with comb paths from PIs to POs.\n", pModel->pName );
- fStatus = 0;
- }
- }
-
-checkobjs:
- // check nets
- Ntl_ModelForEachNet( pModel, pNet, i )
- {
- if ( pNet->pName == NULL )
- {
- printf( "Net in bin %d does not have a name\n", i );
- fStatus = 0;
- }
-/*
- if ( pNet->pDriver == NULL )
- {
- printf( "Net %s does not have a driver\n", pNet->pName );
- fStatus = 0;
- }
-*/
- }
-
- // check objects
- Ntl_ModelForEachObj( pModel, pObj, i )
- {
- Ntl_ObjForEachFanin( pObj, pNet, k )
- if ( pNet == NULL )
- {
- printf( "Object %d does not have fanin net %d\n", i, k );
- fStatus = 0;
- }
- Ntl_ObjForEachFanout( pObj, pNet, k )
- if ( pNet == NULL )
- {
- printf( "Object %d does not have fanout net %d\n", i, k );
- fStatus = 0;
- }
- }
- return fStatus;
-}
-
-/**Function*************************************************************
-
- Synopsis [Checks the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManCheck( Ntl_Man_t * pMan )
-{
- Ntl_Mod_t * pMod1;
- int i, fStatus = 1;
- // check that the models have unique names
- Ntl_ManForEachModel( pMan, pMod1, i )
- {
- if ( pMod1->pName == NULL )
- {
- printf( "Model %d does not have a name\n", i );
- fStatus = 0;
- }
- }
- // check that the models (except the first one) do not have boxes
- Ntl_ManForEachModel( pMan, pMod1, i )
- {
- if ( i == 0 )
- continue;
- if ( Ntl_ModelBoxNum(pMod1) > 0 )
- {
- printf( "Non-root model %d (%s) has %d boxes.\n", i, pMod1->pName, Ntl_ModelBoxNum(pMod1) );
- fStatus = 0;
- }
- }
- // check models
- Ntl_ManForEachModel( pMan, pMod1, i )
- {
- if ( !Ntl_ModelCheck( pMod1, i==0 ) )
- fStatus = 0;
- }
- return fStatus;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Fixed problems with non-driven nets in the model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ModelFixNonDrivenNets( Ntl_Mod_t * pModel )
-{
- Vec_Ptr_t * vNets;
- Ntl_Net_t * pNet;
- Ntl_Obj_t * pNode;
- int i;
-
- if ( !pModel->attrWhite )
- return;
-
- // check for non-driven nets
- vNets = Vec_PtrAlloc( 100 );
- Ntl_ModelForEachNet( pModel, pNet, i )
- {
- if ( pNet->pDriver != NULL )
- continue;
- // add the constant 0 driver
- pNode = Ntl_ModelCreateNode( pModel, 0 );
- pNode->pSop = Ntl_ManStoreSop( pModel->pMan->pMemSops, " 0\n" );
- Ntl_ModelSetNetDriver( pNode, pNet );
- // add the net to those for which the warning will be printed
- Vec_PtrPush( vNets, pNet );
- }
-
-#if 0 // sjang
- // print the warning
- if ( Vec_PtrSize(vNets) > 0 )
- {
- printf( "Warning: Constant-0 drivers added to %d non-driven nets in network \"%s\": ", Vec_PtrSize(vNets), pModel->pName );
- Vec_PtrForEachEntry( Ntl_Net_t *, vNets, pNet, i )
- {
- printf( "%s%s", (i? ", ": ""), pNet->pName );
- if ( i == 3 )
- {
- if ( Vec_PtrSize(vNets) > 3 )
- printf( " ..." );
- break;
- }
- }
- printf( "\n" );
- }
-#endif
- Vec_PtrFree( vNets );
-}
-
-/**Function*************************************************************
-
- Synopsis [Fixed problems with non-driven nets in the model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ModelTransformLatches( Ntl_Mod_t * pModel )
-{
- Ntl_Mod_t * pMod[3] = { NULL };
- Ntl_Obj_t * pLatch;
- int i, Init;
- if ( Ntl_ModelLatchNum(pModel) == 0 )
- return;
- Ntl_ModelForEachLatch( pModel, pLatch, i )
- {
- Init = pLatch->LatchId.regInit;
- if ( pMod[Init] == NULL )
- pMod[Init] = Ntl_ManCreateLatchModel( pModel->pMan, Init );
- pLatch->pImplem = pMod[Init];
- pLatch->Type = NTL_OBJ_BOX;
- }
- printf( "In the main model \"%s\", %d latches are transformed into white seq boxes.\n", pModel->pName, Ntl_ModelLatchNum(pModel) );
- pModel->nObjs[NTL_OBJ_BOX] += Ntl_ModelLatchNum(pModel);
- pModel->nObjs[NTL_OBJ_LATCH] = 0;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlCore.c b/src/aig/ntl/ntlCore.c
deleted file mode 100644
index c09bac0f..00000000
--- a/src/aig/ntl/ntlCore.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlCore.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [DFS traversal.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "dch.h"
-#include "dar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Extracts AIG from the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManPerformChoicing( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fConstruct, int nConfMax, int nLevelMax, int fVerbose )
-{
-// extern Aig_Man_t * Dar_ManBalance( Aig_Man_t * pAig, int fUpdateLevel );
-// extern Aig_Man_t * Dar_ManCompress( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fPower, int fVerbose );
-// extern Aig_Man_t * Dar_ManChoice( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fConstruct, int nConfMax, int nLevelMax, int fVerbose );
- Aig_Man_t * pTemp;
-
- // perform synthesis
-//printf( "Pre-synthesis AIG: " );
-//Aig_ManPrintStats( pAig );
-// pTemp = Dar_ManBalance( pAig, 1 );
-// pTemp = Dar_ManCompress( pAig, 1, 1, 0, 0 );
- pTemp = Dar_ManChoice( pAig, fBalance, fUpdateLevel, fConstruct, nConfMax, nLevelMax, fVerbose );
-//printf( "Post-synthesis AIG: " );
-//Aig_ManPrintStats( pTemp );
-
- return pTemp;
-}
-
-/**Function*************************************************************
-
- Synopsis [Extracts AIG from the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManPerformChoicingNew( Aig_Man_t * pAig, Dch_Pars_t * pPars )
-{
-// extern Aig_Man_t * Dar_ManChoiceNew( Aig_Man_t * pAig, Dch_Pars_t * pPars );
- Aig_Man_t * pTemp;
-/*
- Aig_Obj_t * pObj;
- int i;
- Aig_ManForEachPi( pAig, pObj, i )
- printf( "%d ", pObj->Level );
- printf( "\n" );
-*/
- pTemp = Dar_ManChoiceNew( pAig, pPars );
-/*
- Aig_ManForEachPi( pTemp, pObj, i )
- printf( "%d ", pObj->Level );
- printf( "\n" );
-*/
- return pTemp;
-}
-
-/**Function*************************************************************
-
- Synopsis [Testing procedure for insertion of mapping into the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManInsertTest( Ntl_Man_t * p, Aig_Man_t * pAig )
-{
- Ntl_Man_t * pNew;
- Vec_Ptr_t * vMapping;
- int RetValue;
- vMapping = Ntl_MappingFromAig( pAig );
- pNew = Ntl_ManInsertMapping( p, vMapping, pAig );
- RetValue = (pNew != NULL);
- Ntl_ManFree( pNew );
- Vec_PtrFree( vMapping );
- return RetValue;
-}
-
-/**Function*************************************************************
-
- Synopsis [Testing procedure for insertion of mapping into the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManInsertTestIf( Ntl_Man_t * p, Aig_Man_t * pAig )
-{
- Ntl_Man_t * pNew;
- Vec_Ptr_t * vMapping;
- int RetValue;
- vMapping = Ntl_MappingIf( p, pAig );
- pNew = Ntl_ManInsertMapping( p, vMapping, pAig );
- RetValue = (pNew != NULL);
- Ntl_ManFree( pNew );
- Vec_PtrFree( vMapping );
- return RetValue;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlEc.c b/src/aig/ntl/ntlEc.c
deleted file mode 100644
index 331cd906..00000000
--- a/src/aig/ntl/ntlEc.c
+++ /dev/null
@@ -1,370 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlEc.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Equivalence checking procedures.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlEc.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "saig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Adds PIs to both models, so that they have the same PIs.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManCreateMissingInputs( Ntl_Mod_t * p1, Ntl_Mod_t * p2, int fSeq )
-{
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet, * pNext;
- int i, k;
- if ( fSeq )
- {
- Ntl_ModelForEachSeqLeaf( p1, pObj, i )
- {
- Ntl_ObjForEachFanout( pObj, pNext, k )
- {
- pNet = Ntl_ModelFindNet( p2, pNext->pName );
- if ( pNet == NULL )
- Ntl_ModelCreatePiWithName( p2, pNext->pName );
- }
- }
- Ntl_ModelForEachSeqLeaf( p2, pObj, i )
- {
- Ntl_ObjForEachFanout( pObj, pNext, k )
- {
- pNet = Ntl_ModelFindNet( p1, pNext->pName );
- if ( pNet == NULL )
- Ntl_ModelCreatePiWithName( p1, pNext->pName );
- }
- }
- }
- else
- {
- Ntl_ModelForEachCombLeaf( p1, pObj, i )
- {
- Ntl_ObjForEachFanout( pObj, pNext, k )
- {
- pNet = Ntl_ModelFindNet( p2, pNext->pName );
- if ( pNet == NULL )
- Ntl_ModelCreatePiWithName( p2, pNext->pName );
- }
- }
- Ntl_ModelForEachCombLeaf( p2, pObj, i )
- {
- Ntl_ObjForEachFanout( pObj, pNext, k )
- {
- pNet = Ntl_ModelFindNet( p1, pNext->pName );
- if ( pNet == NULL )
- Ntl_ModelCreatePiWithName( p1, pNext->pName );
- }
- }
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Creates arrays of combinational inputs in the same order.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManDeriveCommonCis( Ntl_Man_t * pMan1, Ntl_Man_t * pMan2, int fSeq )
-{
- Ntl_Mod_t * p1 = Ntl_ManRootModel(pMan1);
- Ntl_Mod_t * p2 = Ntl_ManRootModel(pMan2);
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet, * pNext;
- int i, k;
- // order the CIs
- Vec_PtrClear( pMan1->vCis );
- Vec_PtrClear( pMan2->vCis );
- if ( fSeq )
- {
- assert( Ntl_ModelSeqLeafNum(p1) == Ntl_ModelSeqLeafNum(p2) );
- Ntl_ModelForEachSeqLeaf( p1, pObj, i )
- {
- Ntl_ObjForEachFanout( pObj, pNext, k )
- {
- pNet = Ntl_ModelFindNet( p2, pNext->pName );
- if ( pNet == NULL )
- {
- printf( "Ntl_ManDeriveCommonCis(): Internal error!\n" );
- return;
- }
- Vec_PtrPush( pMan1->vCis, pNext );
- Vec_PtrPush( pMan2->vCis, pNet );
- }
- }
- }
- else
- {
- assert( Ntl_ModelCombLeafNum(p1) == Ntl_ModelCombLeafNum(p2) );
- Ntl_ModelForEachCombLeaf( p1, pObj, i )
- {
- Ntl_ObjForEachFanout( pObj, pNext, k )
- {
- pNet = Ntl_ModelFindNet( p2, pNext->pName );
- if ( pNet == NULL )
- {
- printf( "Ntl_ManDeriveCommonCis(): Internal error!\n" );
- return;
- }
- Vec_PtrPush( pMan1->vCis, pNext );
- Vec_PtrPush( pMan2->vCis, pNet );
- }
- }
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Creates arrays of combinational outputs in the same order.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManDeriveCommonCos( Ntl_Man_t * pMan1, Ntl_Man_t * pMan2, int fSeq )
-{
- Ntl_Mod_t * p1 = Ntl_ManRootModel(pMan1);
- Ntl_Mod_t * p2 = Ntl_ManRootModel(pMan2);
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet, * pNext;
- int i, k;
- // order the COs
- Vec_PtrClear( pMan1->vCos );
- Vec_PtrClear( pMan2->vCos );
- if ( fSeq )
- {
- Ntl_ModelForEachSeqRoot( p1, pObj, i )
- {
- Ntl_ObjForEachFanin( pObj, pNext, k )
- {
- pNet = Ntl_ModelFindNet( p2, pNext->pName );
- if ( pNet == NULL )
- {
- printf( "Ntl_ManDeriveCommonCos(): Cannot find output %s in the second design. Skipping it!\n",
- pNext->pName );
- continue;
- }
- Vec_PtrPush( pMan1->vCos, pNext );
- Vec_PtrPush( pMan2->vCos, pNet );
- }
- }
- }
- else
- {
- Ntl_ModelForEachCombRoot( p1, pObj, i )
- {
- Ntl_ObjForEachFanin( pObj, pNext, k )
- {
- pNet = Ntl_ModelFindNet( p2, pNext->pName );
- if ( pNet == NULL )
- {
- printf( "Ntl_ManDeriveCommonCos(): Cannot find output %s in the second design. Skipping it!\n",
- pNext->pName );
- continue;
- }
- Vec_PtrPush( pMan1->vCos, pNext );
- Vec_PtrPush( pMan2->vCos, pNet );
- }
- }
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Prepares AIGs for combinational equivalence checking.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManPrepareCecMans( Ntl_Man_t * pMan1, Ntl_Man_t * pMan2, Aig_Man_t ** ppAig1, Aig_Man_t ** ppAig2 )
-{
- Ntl_Mod_t * pModel1, * pModel2;
- *ppAig1 = NULL;
- *ppAig2 = NULL;
- // make sure they are compatible
- pModel1 = Ntl_ManRootModel( pMan1 );
- pModel2 = Ntl_ManRootModel( pMan2 );
- if ( Ntl_ModelCombLeafNum(pModel1) != Ntl_ModelCombLeafNum(pModel2) )
- {
- printf( "Warning: The number of inputs in the designs is different (%d and %d).\n",
- Ntl_ModelCombLeafNum(pModel1), Ntl_ModelCombLeafNum(pModel2) );
- }
- if ( Ntl_ModelCombRootNum(pModel1) != Ntl_ModelCombRootNum(pModel2) )
- {
- printf( "Warning: The number of outputs in the designs is different (%d and %d).\n",
- Ntl_ModelCombRootNum(pModel1), Ntl_ModelCombRootNum(pModel2) );
- }
- // normalize inputs/outputs
- Ntl_ManCreateMissingInputs( pModel1, pModel2, 0 );
- if ( Ntl_ModelCombLeafNum(pModel1) != Ntl_ModelCombLeafNum(pModel2) )
- {
- printf( "Ntl_ManPrepareCec(): Cannot verify designs with too many different CIs.\n" );
- return;
- }
- Ntl_ManDeriveCommonCis( pMan1, pMan2, 0 );
- Ntl_ManDeriveCommonCos( pMan1, pMan2, 0 );
- if ( Vec_PtrSize(pMan1->vCos) == 0 )
- {
- printf( "Ntl_ManPrepareCec(): There is no identically-named primary outputs to compare.\n" );
- return;
- }
- // derive AIGs
- *ppAig1 = Ntl_ManCollapse( pMan1, 0 );
- *ppAig2 = Ntl_ManCollapse( pMan2, 0 );
-}
-
-/**Function*************************************************************
-
- Synopsis [Prepares AIGs for combinational equivalence checking.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManPrepareCec( char * pFileName1, char * pFileName2, Aig_Man_t ** ppAig1, Aig_Man_t ** ppAig2 )
-{
- Ntl_Man_t * pMan1, * pMan2;
- // read the netlists
- pMan1 = Ntl_ManReadBlif( pFileName1, 1 );
- pMan2 = Ntl_ManReadBlif( pFileName2, 1 );
- if ( !pMan1 || !pMan2 )
- {
- if ( pMan1 ) Ntl_ManFree( pMan1 );
- if ( pMan2 ) Ntl_ManFree( pMan2 );
- printf( "Ntl_ManPrepareCec(): Reading designs from file has failed.\n" );
- return;
- }
- Ntl_ManPrepareCecMans( pMan1, pMan2, ppAig1, ppAig2 );
- // cleanup
- Ntl_ManFree( pMan1 );
- Ntl_ManFree( pMan2 );
-}
-
-/**Function*************************************************************
-
- Synopsis [Prepares AIGs for sequential equivalence checking.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManPrepareSec( char * pFileName1, char * pFileName2 )
-{
-// extern Aig_Man_t * Saig_ManCreateMiter( Aig_Man_t * p1, Aig_Man_t * p2, int Oper );
-
- Aig_Man_t * pAig1, * pAig2, * pAig;
- Ntl_Man_t * pMan1, * pMan2;
- Ntl_Mod_t * pModel1, * pModel2;
- // read the netlists
- pMan1 = Ntl_ManReadBlif( pFileName1, 1 );
- pMan2 = Ntl_ManReadBlif( pFileName2, 1 );
- if ( !pMan1 || !pMan2 )
- {
- if ( pMan1 ) Ntl_ManFree( pMan1 );
- if ( pMan2 ) Ntl_ManFree( pMan2 );
- printf( "Ntl_ManPrepareSec(): Reading designs from file has failed.\n" );
- return NULL;
- }
- // make sure they are compatible
- if ( Ntl_ManLatchNum(pMan1) == 0 || Ntl_ManLatchNum(pMan2) == 0 )
- {
- if ( pMan1 ) Ntl_ManFree( pMan1 );
- if ( pMan2 ) Ntl_ManFree( pMan2 );
- printf( "Ntl_ManPrepareSec(): The designs have no latches. Use combinational command \"*cec\".\n" );
- return NULL;
- }
- pModel1 = Ntl_ManRootModel( pMan1 );
- pModel2 = Ntl_ManRootModel( pMan2 );
- if ( Ntl_ModelSeqLeafNum(pModel1) != Ntl_ModelSeqLeafNum(pModel2) )
- {
- printf( "Warning: The number of inputs in the designs is different (%d and %d).\n",
- Ntl_ModelPiNum(pModel1), Ntl_ModelPiNum(pModel2) );
- }
- if ( Ntl_ModelSeqRootNum(pModel1) != Ntl_ModelSeqRootNum(pModel2) )
- {
- printf( "Warning: The number of outputs in the designs is different (%d and %d).\n",
- Ntl_ModelPoNum(pModel1), Ntl_ModelPoNum(pModel2) );
- }
- // normalize inputs/outputs
- Ntl_ManCreateMissingInputs( pModel1, pModel2, 1 );
- Ntl_ManDeriveCommonCis( pMan1, pMan2, 1 );
- Ntl_ManDeriveCommonCos( pMan1, pMan2, 1 );
- if ( Vec_PtrSize(pMan1->vCos) == 0 )
- {
- printf( "Ntl_ManPrepareSec(): There is no identically-named primary outputs to compare.\n" );
- if ( pMan1 ) Ntl_ManFree( pMan1 );
- if ( pMan2 ) Ntl_ManFree( pMan2 );
- return NULL;
- }
- // derive AIGs
- pAig1 = Ntl_ManCollapse( pMan1, 1 );
- pAig2 = Ntl_ManCollapse( pMan2, 1 );
- pAig = Saig_ManCreateMiter( pAig1, pAig2, 0 );
- Aig_ManCleanup( pAig );
- Aig_ManStop( pAig1 );
- Aig_ManStop( pAig2 );
- // cleanup
- Ntl_ManFree( pMan1 );
- Ntl_ManFree( pMan2 );
- return pAig;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlExtract.c b/src/aig/ntl/ntlExtract.c
deleted file mode 100644
index a6268b2c..00000000
--- a/src/aig/ntl/ntlExtract.c
+++ /dev/null
@@ -1,877 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlExtract.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Netlist SOP to AIG conversion.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlExtract.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "dec.h"
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Strashes one logic node using its SOP.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Obj_t * Ntl_ConvertSopToAigInternal( Aig_Man_t * pMan, Ntl_Obj_t * pNode, char * pSop )
-{
- Ntl_Net_t * pNet;
- Aig_Obj_t * pAnd, * pSum;
- int i, Value, nFanins;
- char * pCube;
- // get the number of variables
- nFanins = Kit_PlaGetVarNum(pSop);
- // go through the cubes of the node's SOP
- pSum = Aig_ManConst0(pMan);
- Kit_PlaForEachCube( pSop, nFanins, pCube )
- {
- // create the AND of literals
- pAnd = Aig_ManConst1(pMan);
- Kit_PlaCubeForEachVar( pCube, Value, i )
- {
- pNet = Ntl_ObjFanin( pNode, i );
- if ( Value == '1' )
- pAnd = Aig_And( pMan, pAnd, (Aig_Obj_t *)pNet->pCopy );
- else if ( Value == '0' )
- pAnd = Aig_And( pMan, pAnd, Aig_Not((Aig_Obj_t *)pNet->pCopy) );
- }
- // add to the sum of cubes
- pSum = Aig_Or( pMan, pSum, pAnd );
- }
- // decide whether to complement the result
- if ( Kit_PlaIsComplement(pSop) )
- pSum = Aig_Not(pSum);
- return pSum;
-}
-
-/**Function*************************************************************
-
- Synopsis [Transforms the decomposition graph into the AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Obj_t * Ntl_GraphToNetworkAig( Aig_Man_t * pMan, Dec_Graph_t * pGraph )
-{
- Dec_Node_t * pNode = NULL; // Suppress "might be used uninitialized"
- Aig_Obj_t * pAnd0, * pAnd1;
- int i;
- // check for constant function
- if ( Dec_GraphIsConst(pGraph) )
- return Aig_NotCond( Aig_ManConst1(pMan), Dec_GraphIsComplement(pGraph) );
- // check for a literal
- if ( Dec_GraphIsVar(pGraph) )
- return Aig_NotCond( (Aig_Obj_t *)Dec_GraphVar(pGraph)->pFunc, Dec_GraphIsComplement(pGraph) );
- // build the AIG nodes corresponding to the AND gates of the graph
- Dec_GraphForEachNode( pGraph, pNode, i )
- {
- pAnd0 = Aig_NotCond( (Aig_Obj_t *)Dec_GraphNode(pGraph, pNode->eEdge0.Node)->pFunc, pNode->eEdge0.fCompl );
- pAnd1 = Aig_NotCond( (Aig_Obj_t *)Dec_GraphNode(pGraph, pNode->eEdge1.Node)->pFunc, pNode->eEdge1.fCompl );
- pNode->pFunc = Aig_And( pMan, pAnd0, pAnd1 );
- }
- // complement the result if necessary
- return Aig_NotCond( (Aig_Obj_t *)pNode->pFunc, Dec_GraphIsComplement(pGraph) );
-}
-
-/**Function*************************************************************
-
- Synopsis [Converts the network from AIG to BDD representation.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Obj_t * Ntl_ManBuildNodeAig( Ntl_Man_t * p, Ntl_Obj_t * pNode )
-{
- int fUseFactor = 1;
- // consider the constant node
- if ( Kit_PlaGetVarNum(pNode->pSop) == 0 )
- return Aig_NotCond( Aig_ManConst1(p->pAig), Kit_PlaIsConst0(pNode->pSop) );
- // decide when to use factoring
- if ( fUseFactor && Kit_PlaGetVarNum(pNode->pSop) > 2 && Kit_PlaGetCubeNum(pNode->pSop) > 1 )
- {
- Dec_Graph_t * pFForm;
- Dec_Node_t * pFFNode;
- Aig_Obj_t * pFunc;
- int i;
- // perform factoring
- pFForm = Dec_Factor( pNode->pSop );
- // collect the fanins
- Dec_GraphForEachLeaf( pFForm, pFFNode, i )
- pFFNode->pFunc = Ntl_ObjFanin(pNode, i)->pCopy;
- // perform strashing
- pFunc = Ntl_GraphToNetworkAig( p->pAig, pFForm );
- Dec_GraphFree( pFForm );
- return pFunc;
- }
- return Ntl_ConvertSopToAigInternal( p->pAig, pNode, pNode->pSop );
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the nodes in a topological order.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManExtract_rec( Ntl_Man_t * p, Ntl_Net_t * pNet )
-{
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNetFanin;
- int i;
- // skip visited
- if ( pNet->nVisits == 2 )
- return 1;
- // if the node is on the path, this is a combinational loop
- if ( pNet->nVisits == 1 )
- return 0;
- // mark the node as the one on the path
- pNet->nVisits = 1;
- // derive the box
- pObj = pNet->pDriver;
- assert( Ntl_ObjIsNode(pObj) || Ntl_ObjIsBox(pObj) );
- // visit the input nets of the box
- Ntl_ObjForEachFanin( pObj, pNetFanin, i )
- if ( !Ntl_ManExtract_rec( p, pNetFanin ) )
- return 0;
- // add box inputs/outputs to COs/CIs
- if ( Ntl_ObjIsBox(pObj) )
- {
- int LevelCur, LevelMax = -TIM_ETERNITY;
- assert( Ntl_BoxIsComb(pObj) );
- assert( Ntl_ModelLatchNum(pObj->pImplem) == 0 );
- assert( pObj->pImplem->vDelays != NULL );
- Vec_IntPush( p->vBox1Cios, Aig_ManPoNum(p->pAig) );
- Ntl_ObjForEachFanin( pObj, pNetFanin, i )
- {
- LevelCur = Aig_ObjLevel( Aig_Regular((Aig_Obj_t *)pNetFanin->pCopy) );
- LevelMax = ABC_MAX( LevelMax, LevelCur );
- Vec_PtrPush( p->vCos, pNetFanin );
- Aig_ObjCreatePo( p->pAig, (Aig_Obj_t *)pNetFanin->pCopy );
- }
- Ntl_ObjForEachFanout( pObj, pNetFanin, i )
- {
- Vec_PtrPush( p->vCis, pNetFanin );
- pNetFanin->pCopy = Aig_ObjCreatePi( p->pAig );
- Aig_ObjSetLevel( (Aig_Obj_t *)pNetFanin->pCopy, LevelMax + 1 );
- }
- }
- Vec_PtrPush( p->vVisNodes, pObj );
- if ( Ntl_ObjIsNode(pObj) )
- pNet->pCopy = Ntl_ManBuildNodeAig( p, pObj );
- pNet->nVisits = 2;
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs DFS.]
-
- Description [Checks for combinational loops. Collects PI/PO nets.
- Collects nodes in the topological order.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManExtract( Ntl_Man_t * p )
-{
- Aig_Man_t * pAig;
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet;
- int i, k, nUselessObjects;
- Ntl_ManCleanup( p );
- Vec_PtrClear( p->vCis );
- Vec_PtrClear( p->vCos );
- Vec_PtrClear( p->vVisNodes );
- Vec_IntClear( p->vBox1Cios );
- // start the AIG manager
- assert( p->pAig == NULL );
- p->pAig = Aig_ManStart( 10000 );
- p->pAig->pName = Aig_UtilStrsav( p->pName );
- p->pAig->pSpec = Aig_UtilStrsav( p->pSpec );
- // get the root model
- pRoot = Ntl_ManRootModel( p );
- assert( Ntl_ModelLatchNum(pRoot) == 0 );
- // clear net visited flags
- Ntl_ModelClearNets( pRoot );
- // collect mapping leafs
- Ntl_ModelForEachMapLeaf( pRoot, pObj, i )
- {
- assert( !Ntl_ObjIsBox(pObj) || Ntl_BoxIsBlack(pObj) || Ntl_ModelLatchNum(pObj->pImplem) > 0 );
- Ntl_ObjForEachFanout( pObj, pNet, k )
- {
- Vec_PtrPush( p->vCis, pNet );
- pNet->pCopy = Aig_ObjCreatePi( p->pAig );
- if ( pNet->nVisits )
- {
- printf( "Ntl_ManExtract(): Seq leaf is duplicated or defined as a primary input.\n" );
- return 0;
- }
- pNet->nVisits = 2;
- }
- }
- p->iLastCi = Aig_ManPiNum(p->pAig);
- // collect mapping roots
- Ntl_ModelForEachMapRoot( pRoot, pObj, i )
- {
- Ntl_ObjForEachFanin( pObj, pNet, k )
- {
- if ( !Ntl_ManExtract_rec( p, pNet ) )
- {
- printf( "Ntl_ManExtract(): Error: Combinational loop is detected.\n" );
- return 0;
- }
- Vec_PtrPush( p->vCos, pNet );
- Aig_ObjCreatePo( p->pAig, (Aig_Obj_t *)pNet->pCopy );
- }
- }
- // visit dangling boxes
- Ntl_ModelForEachBox( pRoot, pObj, i )
- {
- pNet = Ntl_ObjFanout0(pObj);
- if ( !Ntl_ManExtract_rec( p, pNet ) )
- {
- printf( "Ntl_ManExtract(): Error: Combinational loop is detected.\n" );
- return 0;
- }
- }
- // report the number of dangling objects
- nUselessObjects = Ntl_ModelNodeNum(pRoot) + Ntl_ModelLut1Num(pRoot) + Ntl_ModelBoxNum(pRoot) - Vec_PtrSize(p->vVisNodes);
-// if ( nUselessObjects )
-// printf( "The number of dangling objects = %d.\n", nUselessObjects );
- // cleanup the AIG
- Aig_ManCleanup( p->pAig );
- // extract the timing manager
- assert( p->pManTime == NULL );
- p->pManTime = Ntl_ManCreateTiming( p );
- // discretize timing info
- p->pAig->pManTime = Tim_ManDup( p->pManTime, 1 );
- pAig = p->pAig; p->pAig = NULL;
- return pAig;
-}
-
-
-
-
-/**Function*************************************************************
-
- Synopsis [Collects the nodes in a topological order.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManCollapseBoxComb_rec( Ntl_Man_t * p, Ntl_Obj_t * pBox )
-{
- extern int Ntl_ManCollapse_rec( Ntl_Man_t * p, Ntl_Net_t * pNet );
- Ntl_Mod_t * pModel = pBox->pImplem;
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet, * pNetBox;
- int i;
- assert( Ntl_ObjFaninNum(pBox) == Ntl_ModelPiNum(pModel) );
- assert( Ntl_ObjFanoutNum(pBox) == Ntl_ModelPoNum(pModel) );
- // clear net visited flags
- Ntl_ModelClearNets( pModel );
- // transfer from the box to the PIs of the model
- Ntl_ModelForEachPi( pModel, pObj, i )
- {
- pNet = Ntl_ObjFanout0(pObj);
- pNetBox = Ntl_ObjFanin( pBox, i );
- pNet->pCopy = pNetBox->pCopy;
- pNet->nVisits = 2;
- }
- // compute AIG for the internal nodes
- Ntl_ModelForEachPo( pModel, pObj, i )
- {
- pNet = Ntl_ObjFanin0(pObj);
- if ( !Ntl_ManCollapse_rec( p, pNet ) )
- return 0;
- pNetBox = Ntl_ObjFanout( pBox, i );
- pNetBox->pCopy = pNet->pCopy;
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the nodes in a topological order.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManCollapseBoxSeq1_rec( Ntl_Man_t * p, Ntl_Obj_t * pBox )
-{
- extern int Ntl_ManCollapse_rec( Ntl_Man_t * p, Ntl_Net_t * pNet );
- Ntl_Mod_t * pModel = pBox->pImplem;
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet, * pNetBox;
- int i;
- assert( Ntl_ModelLatchNum(pModel) > 0 );
- assert( Ntl_ObjFaninNum(pBox) == Ntl_ModelPiNum(pModel) );
- assert( Ntl_ObjFanoutNum(pBox) == Ntl_ModelPoNum(pModel) );
- // clear net visited flags
- Ntl_ModelClearNets( pModel );
- // initialize the registers
- Ntl_ModelForEachLatch( pModel, pObj, i )
- {
- pNet = Ntl_ObjFanout0(pObj);
- pNet->pCopy = Aig_ObjCreatePi( p->pAig );
- if ( Ntl_ObjIsInit1( pObj ) )
- pNet->pCopy = Aig_Not((Aig_Obj_t *)pNet->pCopy);
- pNet->nVisits = 2;
- // remember the class of this register
- Vec_IntPush( p->vRegClasses, p->pNal ? pBox->iTemp : pObj->LatchId.regClass );
- Vec_IntPush( p->vRstClasses, p->pNal ? pBox->Reset : -1 );
- }
- // compute AIG for the internal nodes
- Ntl_ModelForEachPo( pModel, pObj, i )
- {
- pNet = Ntl_ObjFanin0(pObj);
- if ( !Ntl_ManCollapse_rec( p, pNet ) )
- return 0;
- pNetBox = Ntl_ObjFanout( pBox, i );
- pNetBox->pCopy = pNet->pCopy;
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the nodes in a topological order.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManCollapseBoxSeq2_rec( Ntl_Man_t * p, Ntl_Obj_t * pBox, int iFirstPi )
-{
- extern int Ntl_ManCollapse_rec( Ntl_Man_t * p, Ntl_Net_t * pNet );
- Ntl_Mod_t * pModel = pBox->pImplem;
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet, * pNetBox;
- int i;
- assert( Ntl_ModelLatchNum(pModel) > 0 );
- assert( Ntl_ObjFaninNum(pBox) == Ntl_ModelPiNum(pModel) );
- assert( Ntl_ObjFanoutNum(pBox) == Ntl_ModelPoNum(pModel) );
- // clear net visited flags
- Ntl_ModelClearNets( pModel );
- // transfer from the box to the PIs of the model
- Ntl_ModelForEachPi( pModel, pObj, i )
- {
- pNet = Ntl_ObjFanout0(pObj);
- pNetBox = Ntl_ObjFanin( pBox, i );
- pNet->pCopy = pNetBox->pCopy;
- pNet->nVisits = 2;
- }
- // initialize the registers
- Ntl_ModelForEachLatch( pModel, pObj, i )
- {
- pNet = Ntl_ObjFanout0(pObj);
- pNet->pCopy = Aig_ManPi( p->pAig, iFirstPi++ );
- if ( Ntl_ObjIsInit1( pObj ) )
- pNet->pCopy = Aig_Not((Aig_Obj_t *)pNet->pCopy);
- pNet->nVisits = 2;
- }
- // compute AIGs for the registers
- Ntl_ModelForEachLatch( pModel, pObj, i )
- {
- pNet = Ntl_ObjFanin0(pObj);
- if ( !Ntl_ManCollapse_rec( p, pNet ) )
- return 0;
- if ( Ntl_ObjIsInit1( pObj ) )
- Aig_ObjCreatePo( p->pAig, Aig_Not((Aig_Obj_t *)pNet->pCopy) );
- else
- Aig_ObjCreatePo( p->pAig, (Aig_Obj_t *)pNet->pCopy );
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the nodes in a topological order.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManCollapse_rec( Ntl_Man_t * p, Ntl_Net_t * pNet )
-{
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNetFanin;
- int i;
- // skip visited
- if ( pNet->nVisits == 2 )
- return 1;
- // if the node is on the path, this is a combinational loop
- if ( pNet->nVisits == 1 )
- return 0;
- // mark the node as the one on the path
- pNet->nVisits = 1;
- // derive the box
- pObj = pNet->pDriver;
- assert( Ntl_ObjIsNode(pObj) || Ntl_ObjIsBox(pObj) );
- // visit the input nets of the box
- Ntl_ObjForEachFanin( pObj, pNetFanin, i )
- if ( !Ntl_ManCollapse_rec( p, pNetFanin ) )
- return 0;
- // add box inputs/outputs to COs/CIs
- if ( Ntl_ObjIsBox(pObj) )
- {
- assert( Ntl_BoxIsWhite(pObj) && Ntl_BoxIsComb(pObj) );
- if ( !Ntl_ManCollapseBoxComb_rec( p, pObj ) )
- return 0;
- }
- if ( Ntl_ObjIsNode(pObj) )
- pNet->pCopy = Ntl_ManBuildNodeAig( p, pObj );
- pNet->nVisits = 2;
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs DFS.]
-
- Description [Checks for combinational loops. Collects PI/PO nets.
- Collects nodes in the topological order.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManCollapse( Ntl_Man_t * p, int fSeq )
-{
- Aig_Man_t * pAig;
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pBox;
- Ntl_Net_t * pNet;
- int i, k, nTruePis, nTruePos, iBox = 0;
- assert( Vec_PtrSize(p->vCis) != 0 );
- assert( Vec_PtrSize(p->vCos) != 0 );
- Vec_IntClear( p->vBox1Cios );
- Vec_IntClear( p->vRegClasses );
- Vec_IntClear( p->vRstClasses );
- // clear net visited flags
- pRoot = Ntl_ManRootModel(p);
- assert( Ntl_ModelLatchNum(pRoot) == 0 );
- Ntl_ModelClearNets( pRoot );
- // create the manager
- p->pAig = Aig_ManStart( 10000 );
- p->pAig->pName = Aig_UtilStrsav( p->pName );
- p->pAig->pSpec = Aig_UtilStrsav( p->pSpec );
- // set the inputs
- Ntl_ManForEachCiNet( p, pNet, i )
- {
- pNet->pCopy = Aig_ObjCreatePi( p->pAig );
- if ( pNet->nVisits )
- {
- printf( "Ntl_ManCollapse(): Primary input appears twice in the list.\n" );
- return 0;
- }
- pNet->nVisits = 2;
- }
- nTruePis = Aig_ManPiNum(p->pAig);
- // create inputs of seq boxes
- if ( fSeq ) {
- Ntl_ModelForEachBox( pRoot, pBox, i )
- {
- if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
- continue;
- Vec_IntPush( p->vBox1Cios, Aig_ManPiNum(p->pAig) );
- Ntl_ManCollapseBoxSeq1_rec( p, pBox );
- Ntl_ObjForEachFanout( pBox, pNet, k )
- pNet->nVisits = 2;
- }
- }
- // derive the outputs
- Ntl_ManForEachCoNet( p, pNet, i )
- {
- if ( !Ntl_ManCollapse_rec( p, pNet ) )
- {
- printf( "Ntl_ManCollapse(): Error: Combinational loop is detected.\n" );
- return 0;
- }
- Aig_ObjCreatePo( p->pAig, (Aig_Obj_t *)pNet->pCopy );
- }
- nTruePos = Aig_ManPoNum(p->pAig);
- // create outputs of seq boxes
- if ( fSeq ) {
- Ntl_ModelForEachBox( pRoot, pBox, i )
- {
- if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
- continue;
- Ntl_ObjForEachFanin( pBox, pNet, k )
- if ( !Ntl_ManCollapse_rec( p, pNet ) )
- {
- printf( "Ntl_ManCollapse(): Error: Combinational loop is detected.\n" );
- return 0;
- }
- Ntl_ManCollapseBoxSeq2_rec( p, pBox, Vec_IntEntry(p->vBox1Cios, iBox++) );
- }
- }
- // make sure registers are added correctly
- if ( Aig_ManPiNum(p->pAig) - nTruePis != Aig_ManPoNum(p->pAig) - nTruePos )
- {
- printf( "Ntl_ManCollapse(): Error: Registers are created incorrectly.\n" );
- return 0;
- }
- // cleanup the AIG
- Aig_ManSetRegNum( p->pAig, Aig_ManPiNum(p->pAig) - nTruePis );
- Aig_ManCleanup( p->pAig );
- pAig = p->pAig; p->pAig = NULL;
- return pAig;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Collapses the netlist combinationally.]
-
- Description [Checks for combinational loops. Collects PI/PO nets.
- Collects nodes in the topological order.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManCollapseComb( Ntl_Man_t * p )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet;
- int i, k;
- Vec_PtrClear( p->vCis );
- Vec_PtrClear( p->vCos );
- // prepare the model
- pRoot = Ntl_ManRootModel(p);
- // collect the leaves for this traversal
- Ntl_ModelForEachCombLeaf( pRoot, pObj, i )
- Ntl_ObjForEachFanout( pObj, pNet, k )
- Vec_PtrPush( p->vCis, pNet );
- // collect the roots for this traversal
- Ntl_ModelForEachCombRoot( pRoot, pObj, i )
- Ntl_ObjForEachFanin( pObj, pNet, k )
- Vec_PtrPush( p->vCos, pNet );
- // perform the traversal
- return Ntl_ManCollapse( p, 0 );
-}
-
-/**Function*************************************************************
-
- Synopsis [Collapses the netlist combinationally.]
-
- Description [Checks for combinational loops. Collects PI/PO nets.
- Collects nodes in the topological order.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManCollapseSeq( Ntl_Man_t * p, int nMinDomSize, int fVerbose )
-{
- Aig_Man_t * pAig;
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet;
- int i, k;
- Vec_PtrClear( p->vCis );
- Vec_PtrClear( p->vCos );
- // prepare the model
- pRoot = Ntl_ManRootModel(p);
- // collect the leaves for this traversal
- Ntl_ModelForEachSeqLeaf( pRoot, pObj, i )
- Ntl_ObjForEachFanout( pObj, pNet, k )
- Vec_PtrPush( p->vCis, pNet );
- // collect the roots for this traversal
- Ntl_ModelForEachSeqRoot( pRoot, pObj, i )
- Ntl_ObjForEachFanin( pObj, pNet, k )
- Vec_PtrPush( p->vCos, pNet );
- // perform the traversal
- pAig = Ntl_ManCollapse( p, 1 );
- // check if there are register classes
- pAig->vClockDoms = Ntl_ManTransformRegClasses( p, nMinDomSize, fVerbose );
- if ( pAig->vClockDoms )
- {
- if ( Vec_VecSize(pAig->vClockDoms) == 0 )
- {
- printf( "Register classes are below the limit (%d). Seq synthesis is not performed.\n", nMinDomSize );
- Aig_ManStop( pAig );
- pAig = NULL;
- }
- else if ( fVerbose )
- printf( "Performing seq synthesis for %d register classes.\n", Vec_VecSize(pAig->vClockDoms) );
- if ( fVerbose )
- printf( "\n" );
- }
- return pAig;
-}
-
-
-
-/**Function*************************************************************
-
- Synopsis [Increments reference counter of the net.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static inline void Ntl_NetIncrementRefs( Ntl_Net_t * pNet )
-{
- int nRefs = (int)(long)pNet->pCopy;
- pNet->pCopy = (void *)(long)(nRefs + 1);
-}
-
-/**Function*************************************************************
-
- Synopsis [Extracts logic newtork out of the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Nwk_Obj_t * Ntl_ManExtractNwk_rec( Ntl_Man_t * p, Ntl_Net_t * pNet, Nwk_Man_t * pNtk, Vec_Int_t * vCover, Vec_Int_t * vMemory )
-{
- extern Hop_Obj_t * Kit_CoverToHop( Hop_Man_t * pMan, Vec_Int_t * vCover, int nVars, Vec_Int_t * vMemory );
- Ntl_Net_t * pFaninNet;
- Nwk_Obj_t * pNode;
- int i;
- if ( pNet->fMark )
- return (Nwk_Obj_t *)pNet->pCopy2;
- pNet->fMark = 1;
- pNode = Nwk_ManCreateNode( pNtk, Ntl_ObjFaninNum(pNet->pDriver), (int)(long)pNet->pCopy );
- Ntl_ObjForEachFanin( pNet->pDriver, pFaninNet, i )
- {
- Ntl_ManExtractNwk_rec( p, pFaninNet, pNtk, vCover, vMemory );
- Nwk_ObjAddFanin( pNode, (Nwk_Obj_t *)pFaninNet->pCopy2 );
- }
- if ( Ntl_ObjFaninNum(pNet->pDriver) == 0 || Kit_PlaGetVarNum(pNet->pDriver->pSop) == 0 )
- pNode->pFunc = Hop_NotCond( Hop_ManConst1(pNtk->pManHop), Kit_PlaIsConst0(pNet->pDriver->pSop) );
- else
- {
- Kit_PlaToIsop( pNet->pDriver->pSop, vCover );
- pNode->pFunc = Kit_CoverToHop( pNtk->pManHop, vCover, Ntl_ObjFaninNum(pNet->pDriver), vMemory );
- if ( Kit_PlaIsComplement(pNet->pDriver->pSop) )
- pNode->pFunc = Hop_Not(pNode->pFunc);
- }
- return (Nwk_Obj_t *)(pNet->pCopy2 = pNode);
-}
-
-/**Function*************************************************************
-
- Synopsis [Extracts logic network out of the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Nwk_Man_t * Ntl_ManExtractNwk( Ntl_Man_t * p, Aig_Man_t * pAig, Tim_Man_t * pManTime )
-{
- Nwk_Man_t * pNtk;
- Nwk_Obj_t * pNode;
- Ntl_Mod_t * pRoot;
- Ntl_Net_t * pNet, * pNetSimple;
- Ntl_Obj_t * pObj;
- Aig_Obj_t * pAnd;
- Vec_Int_t * vCover, * vMemory;
- int i, k;
- pRoot = Ntl_ManRootModel( p );
- if ( Ntl_ModelGetFaninMax(pRoot) > 6 )
- {
- printf( "The network contains logic nodes with more than 6 inputs.\n" );
- return NULL;
- }
- vCover = Vec_IntAlloc( 100 );
- vMemory = Vec_IntAlloc( 1 << 16 );
- // count the number of fanouts of each net
- Ntl_ModelClearNets( pRoot );
- Ntl_ModelForEachObj( pRoot, pObj, i )
- Ntl_ObjForEachFanin( pObj, pNet, k )
- Ntl_NetIncrementRefs( pNet );
- // remember netlist objects int the AIG nodes
- if ( pManTime != NULL ) // logic netlist
- {
- assert( Ntl_ModelPiNum(pRoot) == Aig_ManPiNum(pAig) );
- assert( Ntl_ModelPoNum(pRoot) == Aig_ManPoNum(pAig) );
- Aig_ManForEachPi( pAig, pAnd, i )
- pAnd->pData = Ntl_ObjFanout0( Ntl_ModelPi(pRoot, i) );
- Aig_ManForEachPo( pAig, pAnd, i )
- pAnd->pData = Ntl_ObjFanin0(Ntl_ModelPo(pRoot, i) );
- }
- else // real netlist
- {
- assert( p->vCis && p->vCos );
- Aig_ManForEachPi( pAig, pAnd, i )
- pAnd->pData = Vec_PtrEntry( p->vCis, i );
- Aig_ManForEachPo( pAig, pAnd, i )
- pAnd->pData = Vec_PtrEntry( p->vCos, i );
- }
- // construct the network
- pNtk = Nwk_ManAlloc();
- pNtk->pName = Aig_UtilStrsav( pAig->pName );
- pNtk->pSpec = Aig_UtilStrsav( pAig->pSpec );
- Aig_ManForEachObj( pAig, pAnd, i )
- {
- if ( Aig_ObjIsPi(pAnd) )
- {
- pNet = (Ntl_Net_t *)pAnd->pData;
- pNet->fMark = 1;
- pNet->pCopy2 = Nwk_ManCreateCi( pNtk, (int)(long)pNet->pCopy );
- }
- else if ( Aig_ObjIsPo(pAnd) )
- {
- pNet = (Ntl_Net_t *)pAnd->pData;
- pNode = Nwk_ManCreateCo( pNtk );
- if ( (pNetSimple = Ntl_ModelFindSimpleNet( pNet )) )
- {
- pNetSimple->pCopy2 = Ntl_ManExtractNwk_rec( p, pNetSimple, pNtk, vCover, vMemory );
- Nwk_ObjAddFanin( pNode, (Nwk_Obj_t *)pNetSimple->pCopy2 );
- pNode->fInvert = Kit_PlaIsInv( pNet->pDriver->pSop );
- }
- else
- {
- pNet->pCopy2 = Ntl_ManExtractNwk_rec( p, pNet, pNtk, vCover, vMemory );
- Nwk_ObjAddFanin( pNode, (Nwk_Obj_t *)pNet->pCopy2 );
- pNode->fInvert = (Nwk_ObjFanin0(pNode)->pFunc == Hop_ManConst0(pNtk->pManHop)); // fixed on June 7, 2009
- }
- }
- }
- Ntl_ModelClearNets( pRoot );
- Vec_IntFree( vCover );
- Vec_IntFree( vMemory );
- // create timing manager from the current design
- if ( pManTime )
- pNtk->pManTime = Tim_ManDup( pManTime, 0 );
- else
- pNtk->pManTime = Tim_ManDup( p->pManTime, 0 );
- Nwk_ManRemoveDupFanins( pNtk, 0 );
- assert( Nwk_ManCheck( pNtk ) );
- return pNtk;
-}
-
-/**Function*************************************************************
-
- Synopsis [Extracts logic newtork out of the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Nwk_Man_t * Ntl_ManReadNwk( char * pFileName, Aig_Man_t * pAig, Tim_Man_t * pManTime )
-{
- Nwk_Man_t * pNtk;
- Ntl_Man_t * pNtl;
- Ntl_Mod_t * pRoot;
- pNtl = Ntl_ManReadBlif( pFileName, 1 );
- if ( pNtl == NULL )
- {
- printf( "Ntl_ManReadNwk(): Reading BLIF has failed.\n" );
- return NULL;
- }
- pRoot = Ntl_ManRootModel( pNtl );
- if ( Ntl_ModelLatchNum(pRoot) != 0 )
- {
- printf( "Ntl_ManReadNwk(): The input network has %d registers.\n", Ntl_ModelLatchNum(pRoot) );
- return NULL;
- }
- if ( Ntl_ModelBoxNum(pRoot) != 0 )
- {
- printf( "Ntl_ManReadNwk(): The input network has %d boxes.\n", Ntl_ModelBoxNum(pRoot) );
- return NULL;
- }
- if ( Ntl_ModelPiNum(pRoot) != Aig_ManPiNum(pAig) )
- {
- printf( "Ntl_ManReadNwk(): The number of primary inputs does not match (%d and %d).\n",
- Ntl_ModelPiNum(pRoot), Aig_ManPiNum(pAig) );
- return NULL;
- }
- if ( Ntl_ModelPoNum(pRoot) != Aig_ManPoNum(pAig) )
- {
- printf( "Ntl_ManReadNwk(): The number of primary outputs does not match (%d and %d).\n",
- Ntl_ModelPoNum(pRoot), Aig_ManPoNum(pAig) );
- return NULL;
- }
- pNtk = Ntl_ManExtractNwk( pNtl, pAig, pManTime );
- Ntl_ManFree( pNtl );
- return pNtk;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlFraig.c b/src/aig/ntl/ntlFraig.c
deleted file mode 100644
index 9470df3e..00000000
--- a/src/aig/ntl/ntlFraig.c
+++ /dev/null
@@ -1,1004 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlFraig.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Performing fraiging with white-boxes.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlFraig.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "fra.h"
-#include "ssw.h"
-#include "dch.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Remaps representatives of the equivalence classes.]
-
- Description [For each equivalence class, if the current representative
- of the class cannot be used because its corresponding net has no-merge
- attribute, find the topologically-shallowest node, which can be used
- as a representative.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManUpdateNoMergeReprs( Aig_Man_t * pAig, Aig_Obj_t ** pReprs )
-{
- Aig_Obj_t ** pReprsNew = NULL;
- Aig_Obj_t * pObj, * pRepres, * pRepresNew;
- Ntl_Net_t * pNet, * pNetObj;
- int i;
-
- // allocate room for the new representative
- pReprsNew = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
- memset( pReprsNew, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pAig) );
- Aig_ManForEachObj( pAig, pObj, i )
- {
- // get the old representative node
- pRepres = pReprs[pObj->Id];
- if ( pRepres == NULL )
- continue;
- // if this representative node is already remapped, skip it
- pRepresNew = pReprsNew[ pRepres->Id ];
- if ( pRepresNew != NULL )
- continue;
- // get the net of the representative node
- pNet = (Ntl_Net_t *)pRepres->pData;
- assert( pRepres->pData != NULL );
- if ( Ntl_ObjIsBox(pNet->pDriver) && pNet->pDriver->pImplem->attrNoMerge )
- {
- // the net belongs to the no-merge box
- pNetObj = (Ntl_Net_t *)pObj->pData;
- if ( Ntl_ObjIsBox(pNetObj->pDriver) && pNetObj->pDriver->pImplem->attrNoMerge )
- continue;
- // the object's net does not belong to the no-merge box
- // pObj can be used instead of pRepres
- pReprsNew[ pRepres->Id ] = pObj;
- }
- else
- {
- // otherwise, it is fine to use pRepres
- pReprsNew[ pRepres->Id ] = pRepres;
- }
- }
- // update the representatives
- Aig_ManForEachObj( pAig, pObj, i )
- {
- // get the representative node
- pRepres = pReprs[ pObj->Id ];
- if ( pRepres == NULL )
- continue;
- // if the representative has no mapping, undo the mapping of the node
- pRepresNew = pReprsNew[ pRepres->Id ];
- if ( pRepresNew == NULL || pRepresNew == pObj )
- {
- pReprs[ pObj->Id ] = NULL;
- continue;
- }
- // remap the representative
-// assert( pObj->Id > pRepresNew->Id );
-// pReprs[ pObj->Id ] = pRepresNew;
- if ( pObj->Id > pRepresNew->Id )
- pReprs[ pObj->Id ] = pRepresNew;
- else
- pReprs[ pObj->Id ] = NULL;
- }
- ABC_FREE( pReprsNew );
-}
-
-/**Function*************************************************************
-
- Synopsis [Transfers equivalence class info from pAigCol to pAig.]
-
- Description [pAig points to the nodes of netlist (pNew) derived using it.
- pNew points to the nodes of the collapsed AIG (pAigCol) derived using it.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Obj_t ** Ntl_ManFraigDeriveClasses( Aig_Man_t * pAig, Ntl_Man_t * pNew, Aig_Man_t * pAigCol )
-{
- Ntl_Net_t * pNet;
- Aig_Obj_t ** pReprs = NULL, ** pMapBack = NULL;
- Aig_Obj_t * pObj, * pObjCol, * pObjColRepr, * pCorresp;
- int i;
-
- // remember pointers to the nets of pNew
- Aig_ManForEachObj( pAig, pObj, i )
- pObj->pNext = (Aig_Obj_t *)pObj->pData;
-
- // map the AIG managers
- Aig_ManForEachObj( pAig, pObj, i )
- {
- if ( Aig_ObjIsConst1(pObj) )
- pObj->pData = Aig_ManConst1(pAigCol);
- else if ( !Aig_ObjIsPo(pObj) )
- {
- pNet = (Ntl_Net_t *)pObj->pData;
- pObjCol = Aig_Regular((Aig_Obj_t *)pNet->pCopy);
- pObj->pData = pObjCol;
- }
- }
-
- // create mapping from the collapsed manager into the original manager
- // (each node in the collapsed manager may have more than one equivalent node
- // in the original manager; this procedure finds the first node in the original
- // manager that is equivalent to the given node in the collapsed manager)
- pMapBack = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAigCol) );
- memset( pMapBack, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pAigCol) );
- Aig_ManForEachObj( pAig, pObj, i )
- {
- if ( Aig_ObjIsPo(pObj) )
- continue;
- pObjCol = (Aig_Obj_t *)pObj->pData;
- if ( pObjCol == NULL )
- continue;
- if ( pMapBack[pObjCol->Id] == NULL )
- pMapBack[pObjCol->Id] = pObj;
- }
-
- // create the equivalence classes for the original manager
- pReprs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
- memset( pReprs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pAig) );
- Aig_ManForEachObj( pAig, pObj, i )
- {
- if ( Aig_ObjIsPo(pObj) )
- continue;
- // get the collapsed node
- pObjCol = (Aig_Obj_t *)pObj->pData;
- if ( pObjCol == NULL )
- continue;
- // get the representative of the collapsed node
- pObjColRepr = pAigCol->pReprs[pObjCol->Id];
- if ( pObjColRepr == NULL )
- pObjColRepr = pObjCol;
- // get the corresponding original node
- pCorresp = pMapBack[pObjColRepr->Id];
- if ( pCorresp == NULL || pCorresp == pObj )
- continue;
- // set the representative
- if ( pCorresp->Id < pObj->Id )
- pReprs[pObj->Id] = pCorresp;
- else
- pReprs[pCorresp->Id] = pObj;
- }
- ABC_FREE( pMapBack );
-
- // recall pointers to the nets of pNew
- Aig_ManForEachObj( pAig, pObj, i )
- pObj->pData = pObj->pNext, pObj->pNext = NULL;
-
- // remap no-merge representatives to point to
- // the shallowest nodes in the class without no-merge
- Ntl_ManUpdateNoMergeReprs( pAig, pReprs );
- return pReprs;
-}
-
-/**Function*************************************************************
-
- Synopsis [Uses equivalences in the AIG to reduce the design.]
-
- Description [The AIG (pAig) was extracted from the netlist and still
- points to it (pObj->pData is the pointer to the nets in the netlist).
- Equivalences have been computed for the collapsed AIG and transfered
- to this AIG (pAig). This procedure reduces the corresponding nets.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManReduce( Ntl_Man_t * p, Aig_Man_t * pAig )
-{
- Aig_Obj_t * pObj, * pObjRepr;
- Ntl_Net_t * pNet, * pNetRepr, * pNetNew;
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pNode, * pNodeOld;
- int i, fCompl, Counter = 0;
- char * pNameNew;
-// int Lenght;
- assert( pAig->pReprs );
- pRoot = Ntl_ManRootModel( p );
- Aig_ManForEachObj( pAig, pObj, i )
- {
- pObjRepr = Aig_ObjRepr( pAig, pObj );
- if ( pObjRepr == NULL )
- continue;
- assert( pObj != pObjRepr );
- pNet = (Ntl_Net_t *)pObj->pData;
- pNetRepr = (Ntl_Net_t *)pObjRepr->pData;
- // consider special cases, when the net should not be reduced
- if ( Ntl_ObjIsBox(pNet->pDriver) )
- {
- // do not reduce the net if it is driven by a multi-output box
- if ( Ntl_ObjFanoutNum(pNet->pDriver) > 1 )
- continue;
- // do not reduce the net if it has no-merge attribute
- if ( pNet->pDriver->pImplem->attrNoMerge )
- continue;
- // do not reduce the net if the replacement net has no-merge attribute
- if ( pNetRepr != NULL && Ntl_ObjIsBox(pNetRepr->pDriver) &&
- pNetRepr->pDriver->pImplem->attrNoMerge )
- continue;
- }
- if ( pNetRepr == NULL )
- {
- // this is the constant node
- assert( Aig_ObjIsConst1(pObjRepr) );
- pNode = Ntl_ModelCreateNode( pRoot, 0 );
- pNode->pSop = Ntl_ManStoreSop( p->pMemSops, " 1\n" );
- if ( (pNetRepr = Ntl_ModelFindNet( pRoot, "Const1" )) )
- {
- printf( "Ntl_ManReduce(): Internal error: Intermediate net name is not unique.\n" );
- return;
- }
- pNetRepr = Ntl_ModelFindOrCreateNet( pRoot, "Const1" );
- if ( !Ntl_ModelSetNetDriver( pNode, pNetRepr ) )
- {
- printf( "Ntl_ManReduce(): Internal error: Net has more than one fanin.\n" );
- return;
- }
- pObjRepr->pData = pNetRepr;
- pNetRepr->pCopy = Aig_ManConst1(pAig);
- }
- // get the complemented attributes of the nets
- fCompl = Aig_IsComplement((Aig_Obj_t *)pNet->pCopy) ^ Aig_Regular((Aig_Obj_t *)pNet->pCopy)->fPhase ^
- Aig_IsComplement((Aig_Obj_t *)pNetRepr->pCopy) ^ Aig_Regular((Aig_Obj_t *)pNetRepr->pCopy)->fPhase;
- // create interter/buffer driven by the representative net
- pNode = Ntl_ModelCreateNode( pRoot, 1 );
- pNode->pSop = fCompl? Ntl_ManStoreSop( p->pMemSops, "0 1\n" ) : Ntl_ManStoreSop( p->pMemSops, "1 1\n" );
- Ntl_ObjSetFanin( pNode, pNetRepr, 0 );
- // make the new node drive the equivalent net (pNet)
- pNodeOld = pNet->pDriver;
- if ( !Ntl_ModelClearNetDriver( pNet->pDriver, pNet ) )
- printf( "Ntl_ManReduce(): Internal error! Net already has no driver.\n" );
- if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
- printf( "Ntl_ManReduce(): Internal error! Net already has a driver.\n" );
-/*
- // remove this net from the hash table (but do not remove from the array)
- Ntl_ModelDeleteNet( pRoot, pNet );
- // create new net with the same name
- pNetNew = Ntl_ModelFindOrCreateNet( pRoot, pNet->pName );
- // clean the name
- pNet->pName[0] = 0;
-*/
- // create new net with a new name
- pNameNew = Ntl_ModelCreateNetName( pRoot, "noname", (int)(ABC_PTRINT_T)pNet );
- pNetNew = Ntl_ModelFindOrCreateNet( pRoot, pNameNew );
-
- // make the old node drive the new net without fanouts
- if ( !Ntl_ModelSetNetDriver( pNodeOld, pNetNew ) )
- printf( "Ntl_ManReduce(): Internal error! Net already has a driver.\n" );
-
- Counter++;
- }
-// printf( "Nets without names = %d.\n", Counter );
-}
-
-/**Function*************************************************************
-
- Synopsis [Resets complemented attributes of the collapsed AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManResetComplemented( Ntl_Man_t * p, Aig_Man_t * pAigCol )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- Aig_Obj_t * pObjCol;
- int i;
- pRoot = Ntl_ManRootModel(p);
- Ntl_ModelForEachLatch( pRoot, pObj, i )
- {
- if ( Ntl_ObjIsInit1( pObj ) )
- {
- pObjCol = (Aig_Obj_t *)Ntl_ObjFanout0(pObj)->pCopy;
- assert( pObjCol->fPhase == 0 );
- pObjCol->fPhase = 1;
- }
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Finalizes the transformation.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManFinalize( Ntl_Man_t * pNew, Aig_Man_t * pAig, Aig_Man_t * pAigCol, int fVerbose )
-{
- int fUseExtraSweep = 1;
- Ntl_Man_t * pSwept;
- Aig_Man_t * pTemp;
- assert( pAig->pReprs == NULL );
- assert( pAigCol->pReprs != NULL );
-
- // transfer equivalence classes to the original AIG
- pAig->pReprs = Ntl_ManFraigDeriveClasses( pAig, pNew, pAigCol );
- pAig->nReprsAlloc = Aig_ManObjNumMax(pAig);
-if ( fVerbose )
- printf( "Equivalences: Collapsed = %5d. Extracted = %5d.\n", Aig_ManCountReprs(pAigCol), Aig_ManCountReprs(pAig) );
-/*
-{
- Aig_Obj_t * pObj;
- int i;
- Aig_ManForEachObj( pAig, pObj, i )
- if ( pAig->pReprs[i] != NULL )
- printf( "%s%d->%s%d ",
- (Aig_ObjIsPi(pObj)? "pi": ""),
- pObj->Id,
- (Aig_ObjIsPi(pAig->pReprs[i])? "pi": ""),
- pAig->pReprs[i]->Id );
- printf( "\n" );
-}
-*/
- // implement equivalence classes and remove dangling nodes
- Ntl_ManReduce( pNew, pAig );
- Ntl_ManSweep( pNew, fVerbose );
-
- // perform one more sweep
- if ( fUseExtraSweep )
- {
- pTemp = Ntl_ManExtract( pNew );
- pSwept = Ntl_ManInsertAig( pNew, pTemp );
- Aig_ManStop( pTemp );
- Ntl_ManSweep( pSwept, fVerbose );
- return pSwept;
- }
- return Ntl_ManDup(pNew);
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns AIG with WB after fraiging.]
-
- Description [Consumes the input NTL to save memory.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManFraig( Ntl_Man_t * p, int nPartSize, int nConfLimit, int nLevelMax, int fUseCSat, int fVerbose )
-{
- Ntl_Man_t * pNew, * pAux;
- Aig_Man_t * pAig, * pAigCol, * pTemp;
-
- if ( Ntl_ModelNodeNum(Ntl_ManRootModel(p)) == 0 )
- return p;
-
- // collapse the AIG
- pAig = Ntl_ManExtract( p );
- pNew = Ntl_ManInsertAig( p, pAig );
- Ntl_ManFree( p );
- pAigCol = Ntl_ManCollapseComb( pNew );
- if ( pAigCol == NULL )
- {
- Aig_ManStop( pAig );
- return pNew;
- }
-
- // perform fraiging for the given design
- if ( fUseCSat )
- {
-// extern Aig_Man_t * Cec_FraigCombinational( Aig_Man_t * pAig, int nConfs, int fVerbose );
-// pTemp = Cec_FraigCombinational( pAigCol, nConfLimit, fVerbose );
-// Aig_ManStop( pTemp );
- extern void Dch_ComputeEquivalences( Aig_Man_t * pAig, Dch_Pars_t * pPars );
- Dch_Pars_t Pars, * pPars = &Pars;
- Dch_ManSetDefaultParams( pPars );
- pPars->nBTLimit = nConfLimit;
- pPars->fVerbose = fVerbose;
- Dch_ComputeEquivalences( pAigCol, pPars );
- }
- else
- {
- nPartSize = nPartSize? nPartSize : Aig_ManPoNum(pAigCol);
- pTemp = Aig_ManFraigPartitioned( pAigCol, nPartSize, nConfLimit, nLevelMax, fVerbose );
- Aig_ManStop( pTemp );
- }
-
- // finalize the transformation
- pNew = Ntl_ManFinalize( pAux = pNew, pAig, pAigCol, fVerbose );
- Ntl_ManFree( pAux );
- Aig_ManStop( pAig );
- Aig_ManStop( pAigCol );
- return pNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of resets.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManAigCountResets( Ntl_Man_t * pNtl )
-{
-/*
- Ntl_Mod_t * pModel = Ntl_ManRootModel(pNtl);
- Ntl_Obj_t * pBox;
- int i, Counter = -1;
- Ntl_ModelForEachObj( pModel, pBox, i )
- Counter = ABC_MAX( Counter, pBox->Reset );
- return Counter + 1;
-*/
- return -1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Transforms sequential AIG to allow for async reset.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManAigToRst( Ntl_Man_t * pNtl, Aig_Man_t * p )
-{
- Ntl_Mod_t * pModel = Ntl_ManRootModel(pNtl);
- Aig_Man_t * pNew;
- Aig_Obj_t * pObj;
- int i, iRegNum, iRstNum, Counter = 0;
- int nResets = Ntl_ManAigCountResets( pNtl );
- assert( pNtl->pNal != NULL );
- assert( Aig_ManRegNum(p) > 0 );
- assert( Vec_IntSize(pNtl->vRstClasses) == Aig_ManRegNum(p) );
-//printf( "Number of resets before synthesis = %d.\n", nResets );
- // create the PIs
- Aig_ManCleanData( p );
- Aig_ManSetPioNumbers( p );
- // create the new manager
- pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
- // create special PIs
- for ( i = 0; i < nResets; i++ )
- Aig_ObjCreatePi( pNew );
- // duplicate internal nodes
- Aig_ManForEachPi( p, pObj, i )
- pObj->pData = Aig_ObjCreatePi( pNew );
- Aig_ManForEachObj( p, pObj, i )
- {
- if ( Aig_ObjIsNode(pObj) )
- pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
- else if ( Aig_ObjIsPo(pObj) )
- pObj->pData = Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
- else if ( Aig_ObjIsPi(pObj) )
- {
-// pObj->pData = Aig_ObjCreatePi( pNew );
- iRegNum = Aig_ObjPioNum(pObj) - (Aig_ManPiNum(p) - Aig_ManRegNum(p));
- if ( iRegNum < 0 )
- continue;
- iRstNum = Vec_IntEntry(pNtl->vRstClasses, iRegNum);
- if ( iRstNum < 0 )
- continue;
- assert( iRstNum < nResets );
- pObj->pData = Aig_And( pNew, (Aig_Obj_t *)pObj->pData, Aig_ManPi(pNew, iRstNum) ); // could be NOT(pi)
- Counter++;
- }
- else if ( Aig_ObjIsConst1(pObj) )
- pObj->pData = Aig_ManConst1(pNew);
- else
- assert( 0 );
- }
- assert( Aig_ManNodeNum(p) + Counter == Aig_ManNodeNum(pNew) );
- if ( (Counter = Aig_ManCleanup( pNew )) )
- printf( "Aig_ManDupOrdered(): Cleanup after AIG duplication removed %d nodes.\n", Counter );
- Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
- return pNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Remaps equivalence classes from the new nodes to the old ones.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManRemapClassesLcorr( Ntl_Man_t * pNtl, Aig_Man_t * p, Aig_Man_t * pNew )
-{
- Ntl_Mod_t * pModel = Ntl_ManRootModel(pNtl);
- Aig_Obj_t * pObj, * pObjRepr, * pObjNew, * pObjNewRepr;
- int i, nResets = Ntl_ManAigCountResets( pNtl );
- int nTruePis = Aig_ManPiNum(p) - Aig_ManRegNum(p);
- assert( pNew->pReprs != NULL );
- assert( nResets == Aig_ManPiNum(pNew) - Aig_ManPiNum(p) );
- Aig_ManReprStart( p, Aig_ManObjNumMax(p) );
- Aig_ManForEachLoSeq( pNew, pObjNew, i )
- {
- pObj = Aig_ManPi( p, i - nResets );
- pObjNewRepr = pNew->pReprs[pObjNew->Id];
- if ( pObjNewRepr == NULL )
- continue;
- if ( pObjNewRepr == Aig_ManConst1(pNew) )
- {
- Aig_ObjCreateRepr( p, Aig_ManConst1(p), pObj );
- continue;
- }
- assert( Aig_ObjIsPi(pObjNewRepr) );
- // find the corresponding representative node
- pObjRepr = Aig_ManPi( p, Aig_ObjPioNum(pObjNewRepr) - nResets );
- // if they belong to different domains, quit
- if ( Vec_IntEntry( pNtl->vRstClasses, Aig_ObjPioNum(pObj) - nTruePis ) !=
- Vec_IntEntry( pNtl->vRstClasses, Aig_ObjPioNum(pObjRepr) - nTruePis ) )
- continue;
- Aig_ObjCreateRepr( p, pObjRepr, pObj );
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Remaps equivalence classes from the new nodes to the old ones.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManRemapClassesScorr( Ntl_Man_t * pNtl, Aig_Man_t * p, Aig_Man_t * pNew )
-{
- Aig_Obj_t * pObj, * pObjRepr, * pObjNew, * pObjNewRepr;
- int i;
- // map things back
- Aig_ManForEachObj( p, pObj, i )
- {
- pObjNew = (Aig_Obj_t *)pObj->pData;
- assert( pObjNew != NULL && !Aig_IsComplement(pObjNew) );
- pObjNew->pData = pObj;
- }
- // remap the classes
- Aig_ManForEachObj( pNew, pObjNew, i )
- {
- pObjNewRepr = pNew->pReprs[pObjNew->Id];
- if ( pObjNewRepr == NULL )
- continue;
- pObj = (Aig_Obj_t *)pObjNew->pData;
- pObjRepr = (Aig_Obj_t *)pObjNewRepr->pData;
- assert( Aig_ObjId(pObjRepr) < Aig_ObjId(pObj) );
- Aig_ObjCreateRepr( p, pObjRepr, pObj );
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Performs sequential cleanup.]
-
- Description [Consumes the input NTL to save memory.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManScl( Ntl_Man_t * p, int fLatchConst, int fLatchEqual, int fVerbose )
-{
- Ntl_Man_t * pNew, * pAux;
- Aig_Man_t * pAig, * pAigCol, * pTemp;
-
- // collapse the AIG
- pAig = Ntl_ManExtract( p );
-//Ntl_ManPrintStats( p );
-//Aig_ManPrintStats( pAig );
- pNew = Ntl_ManInsertAig( p, pAig );
- Ntl_ManFree( p );
- pAigCol = Ntl_ManCollapseSeq( pNew, 0, fVerbose );
- if ( pAigCol == NULL )
- {
- Aig_ManStop( pAig );
- return pNew;
- }
-//Ntl_ManPrintStats( pNew );
-//Aig_ManPrintStats( pAigCol );
-
- // perform SCL
- if ( pNew->pNal )
- {
- Aig_Man_t * pAigRst;
- pAigRst = Ntl_ManAigToRst( pNew, pAigCol );
- pTemp = Aig_ManScl( pAigRst, fLatchConst, fLatchEqual, 0, -1, -1, fVerbose, 0 );
- Aig_ManStop( pTemp );
- Ntl_ManRemapClassesLcorr( pNew, pAigCol, pAigRst );
- Aig_ManStop( pAigRst );
- }
- else
- {
- pTemp = Aig_ManScl( pAigCol, fLatchConst, fLatchEqual, 0, -1, -1, fVerbose, 0 );
- Aig_ManStop( pTemp );
- }
-
- // finalize the transformation
- pNew = Ntl_ManFinalize( pAux = pNew, pAig, pAigCol, fVerbose );
- Ntl_ManFree( pAux );
- Aig_ManStop( pAig );
- Aig_ManStop( pAigCol );
- return pNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns AIG with WB after fraiging.]
-
- Description [Consumes the input NTL to save memory.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManLcorr( Ntl_Man_t * p, int nConfMax, int fScorrGia, int fUseCSat, int fVerbose )
-{
- Ntl_Man_t * pNew, * pAux;
- Aig_Man_t * pAig, * pAigCol, * pTemp;
- Ssw_Pars_t Pars, * pPars = &Pars;
- Ssw_ManSetDefaultParamsLcorr( pPars );
- pPars->nBTLimit = nConfMax;
- pPars->fVerbose = fVerbose;
-
- // collapse the AIG
- pAig = Ntl_ManExtract( p );
- pNew = Ntl_ManInsertAig( p, pAig );
- Ntl_ManFree( p );
- pAigCol = Ntl_ManCollapseSeq( pNew, pPars->nMinDomSize, pPars->fVerbose );
- if ( pAigCol == NULL )
- {
- Aig_ManStop( pAig );
- return pNew;
- }
-
- // perform LCORR
- pPars->fScorrGia = fScorrGia;
- pPars->fUseCSat = fUseCSat;
- if ( pNew->pNal )
- {
- Aig_Man_t * pAigRst;
- pAigRst = Ntl_ManAigToRst( pNew, pAigCol );
- pTemp = Ssw_LatchCorrespondence( pAigRst, pPars );
- Aig_ManStop( pTemp );
- Ntl_ManRemapClassesLcorr( pNew, pAigCol, pAigRst );
- Aig_ManStop( pAigRst );
- }
- else
- {
- pTemp = Ssw_LatchCorrespondence( pAigCol, pPars );
- Aig_ManStop( pTemp );
- }
-
- // finalize the transformation
- pNew = Ntl_ManFinalize( pAux = pNew, pAig, pAigCol, fVerbose );
- Ntl_ManFree( pAux );
- Aig_ManStop( pAig );
- Aig_ManStop( pAigCol );
- return pNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns AIG with WB after fraiging.]
-
- Description [Consumes the input NTL to save memory.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManSsw( Ntl_Man_t * p, Fra_Ssw_t * pPars )
-{
- Ntl_Man_t * pNew, * pAux;
- Aig_Man_t * pAig, * pAigCol, * pTemp;
- assert( 0 ); // not updated for nal
-
- // collapse the AIG
- pAig = Ntl_ManExtract( p );
- pNew = Ntl_ManInsertAig( p, pAig );
- Ntl_ManFree( p );
- pAigCol = Ntl_ManCollapseSeq( pNew, pPars->nMinDomSize, pPars->fVerbose );
- if ( pAigCol == NULL )
- {
- Aig_ManStop( pAig );
- return pNew;
- }
-
- // perform SCL for the given design
- pTemp = Fra_FraigInduction( pAigCol, pPars );
- Aig_ManStop( pTemp );
-
- // finalize the transformation
- pNew = Ntl_ManFinalize( pAux = pNew, pAig, pAigCol, pPars->fVerbose );
- Ntl_ManFree( pAux );
- Aig_ManStop( pAig );
- Aig_ManStop( pAigCol );
- return pNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns AIG with WB after fraiging.]
-
- Description [Consumes the input NTL to save memory.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManScorr( Ntl_Man_t * p, Ssw_Pars_t * pPars )
-{
- Ntl_Man_t * pNew, * pAux;
- Aig_Man_t * pAig, * pAigCol, * pTemp;
-
- // collapse the AIG
- pAig = Ntl_ManExtract( p );
- pNew = Ntl_ManInsertAig( p, pAig );
- Ntl_ManFree( p );
- pAigCol = Ntl_ManCollapseSeq( pNew, pPars->nMinDomSize, pPars->fVerbose );
- if ( pAigCol == NULL )
- {
- Aig_ManStop( pAig );
- return pNew;
- }
-
- // perform SCL
- if ( pNew->pNal )
- {
- Aig_Man_t * pAigRst;
- pAigRst = Ntl_ManAigToRst( pNew, pAigCol );
- pTemp = Ssw_SignalCorrespondence( pAigRst, pPars );
- Aig_ManStop( pTemp );
- Ntl_ManRemapClassesLcorr( pNew, pAigCol, pAigRst );
- Aig_ManStop( pAigRst );
- }
- else
- {
- pPars->fVerbose = 1;
-
- pTemp = Ssw_SignalCorrespondence( pAigCol, pPars );
- Aig_ManStop( pTemp );
- }
-
- // finalize the transformation
- pNew = Ntl_ManFinalize( pAux = pNew, pAig, pAigCol, pPars->fVerbose );
- Ntl_ManFree( pAux );
- Aig_ManStop( pAig );
- Aig_ManStop( pAigCol );
- return pNew;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Transfers the copy field into the second copy field.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManTransferCopy( Ntl_Man_t * p )
-{
- Ntl_Net_t * pNet;
- Ntl_Mod_t * pRoot;
- int i;
- pRoot = Ntl_ManRootModel( p );
- Ntl_ModelForEachNet( pRoot, pNet, i )
- {
- pNet->pCopy2 = pNet->pCopy;
- pNet->pCopy = NULL;
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Reattaches one white-box.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManAttachWhiteBox( Ntl_Man_t * p, Aig_Man_t * pAigCol, Aig_Man_t * pAigRed, Ntl_Man_t * pNew, Ntl_Obj_t * pBox )
-{
-}
-
-/**Function*************************************************************
-
- Synopsis [Reattaches white-boxes after reducing the netlist.]
-
- Description [The following parameters are given:
- Original netlist (p) whose nets point to the nodes of collapsed AIG.
- Collapsed AIG (pAigCol) whose objects point to those of reduced AIG.
- Reduced AIG (pAigRed) whose objects point to the nets of the new netlist.
- The new netlist is changed by this procedure to have those white-boxes
- from the original AIG (p) those outputs are preserved after reduction.
- Note that if outputs are preserved, the inputs are also preserved.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManAttachWhiteBoxes( Ntl_Man_t * p, Aig_Man_t * pAigCol, Aig_Man_t * pAigRed, Ntl_Man_t * pNew, int fVerbose )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pBox;
- Ntl_Net_t * pNet;
- int i, k, Counter = 0;
- // go through the white-boxes and check if they are preserved
- pRoot = Ntl_ManRootModel( p );
- Ntl_ModelForEachBox( pRoot, pBox, i )
- {
- Ntl_ObjForEachFanout( pBox, pNet, k )
- {
- // skip dangling outputs of the box
- if ( pNet->pCopy == NULL )
- continue;
- // skip the outputs that are not preserved after merging equivalence
- if ( Aig_Regular((Aig_Obj_t *)pNet->pCopy2)->pData == NULL )
- continue;
- break;
- }
- if ( k == Ntl_ObjFanoutNum(pBox) )
- continue;
- // the box is preserved
- Ntl_ManAttachWhiteBox( p, pAigCol, pAigRed, pNew, pBox );
- Counter++;
- }
- if ( fVerbose )
- printf( "Attached %d boxed (out of %d).\n", Counter, Ntl_ModelBoxNum(pRoot) );
-}
-
-/**Function*************************************************************
-
- Synopsis [Flip complemented edges.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManFlipEdges( Ntl_Man_t * p, Aig_Man_t * pAigCol )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- Aig_Obj_t * pObjCol, * pFanin;
- int i, iLatch;
- pRoot = Ntl_ManRootModel(p);
- iLatch = 0;
- Ntl_ModelForEachLatch( pRoot, pObj, i )
- {
- if ( Ntl_ObjIsInit1( pObj ) )
- {
- pObjCol = Aig_ManPi( pAigCol, Ntl_ModelPiNum(pRoot) + iLatch );
- assert( pObjCol->fMarkA == 0 );
- pObjCol->fMarkA = 1;
- }
- iLatch++;
- }
- // flip pointers to the complemented edges
- Aig_ManForEachObj( pAigCol, pObjCol, i )
- {
- pFanin = Aig_ObjFanin0(pObjCol);
- if ( pFanin && pFanin->fMarkA )
- pObjCol->pFanin0 = Aig_Not(pObjCol->pFanin0);
- pFanin = Aig_ObjFanin1(pObjCol);
- if ( pFanin && pFanin->fMarkA )
- pObjCol->pFanin1 = Aig_Not(pObjCol->pFanin1);
- }
- // flip complemented latch derivers and undo the marks
- iLatch = 0;
- Ntl_ModelForEachLatch( pRoot, pObj, i )
- {
- if ( Ntl_ObjIsInit1( pObj ) )
- {
- // flip the latch input
- pObjCol = Aig_ManPo( pAigCol, Ntl_ModelPoNum(pRoot) + iLatch );
- pObjCol->pFanin0 = Aig_Not(pObjCol->pFanin0);
- // unmark the latch output
- pObjCol = Aig_ManPi( pAigCol, Ntl_ModelPiNum(pRoot) + iLatch );
- assert( pObjCol->fMarkA == 1 );
- pObjCol->fMarkA = 0;
- }
- iLatch++;
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns AIG with WB after sequential SAT sweeping.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManSsw2( Ntl_Man_t * p, Fra_Ssw_t * pPars )
-{
- Ntl_Man_t * pNew;
- Aig_Man_t * pAigRed, * pAigCol;
- // collapse the AIG
- pAigCol = Ntl_ManCollapseSeq( p, pPars->nMinDomSize, pPars->fVerbose );
- // transform the collapsed AIG
- pAigRed = Fra_FraigInduction( pAigCol, pPars );
- Aig_ManStop( pAigRed );
- pAigRed = Aig_ManDupReprBasic( pAigCol );
- // insert the result back
- Ntl_ManFlipEdges( p, pAigRed );
- Ntl_ManTransferCopy( p );
- pNew = Ntl_ManInsertAig( p, pAigRed );
- // attach the white-boxes
- Ntl_ManAttachWhiteBoxes( p, pAigCol, pAigRed, pNew, pPars->fVerbose );
- Ntl_ManSweep( pNew, pPars->fVerbose );
- // cleanup
- Aig_ManStop( pAigRed );
- Aig_ManStop( pAigCol );
- return pNew;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlInsert.c b/src/aig/ntl/ntlInsert.c
deleted file mode 100644
index 8b0e3493..00000000
--- a/src/aig/ntl/ntlInsert.c
+++ /dev/null
@@ -1,614 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlInsert.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Procedures to insert mapping into a design.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlInsert.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Inserts the given mapping into the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManInsertMapping( Ntl_Man_t * p, Vec_Ptr_t * vMapping, Aig_Man_t * pAig )
-{
- char Buffer[1000];
- Vec_Ptr_t * vCopies;
- Vec_Int_t * vCover;
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pNode;
- Ntl_Net_t * pNet, * pNetCo;
- Ntl_Lut_t * pLut;
- int i, k, nDigits;
- assert( Vec_PtrSize(p->vCis) == Aig_ManPiNum(pAig) );
- assert( Vec_PtrSize(p->vCos) == Aig_ManPoNum(pAig) );
- p = Ntl_ManStartFrom( p );
- pRoot = Ntl_ManRootModel( p );
- assert( Ntl_ModelNodeNum(pRoot) == 0 );
- // map the AIG back onto the design
- Ntl_ManForEachCiNet( p, pNet, i )
- pNet->pCopy = Aig_ManPi( pAig, i );
- // start mapping of AIG nodes into their copies
- vCopies = Vec_PtrStart( Aig_ManObjNumMax(pAig) );
- Ntl_ManForEachCiNet( p, pNet, i )
- Vec_PtrWriteEntry( vCopies, ((Aig_Obj_t *)pNet->pCopy)->Id, pNet );
- // create a new node for each LUT
- vCover = Vec_IntAlloc( 1 << 16 );
- nDigits = Aig_Base10Log( Vec_PtrSize(vMapping) );
- Vec_PtrForEachEntry( Ntl_Lut_t *, vMapping, pLut, i )
- {
- pNode = Ntl_ModelCreateNode( pRoot, pLut->nFanins );
- pNode->pSop = Kit_PlaFromTruth( p->pMemSops, pLut->pTruth, pLut->nFanins, vCover );
- if ( !Kit_TruthIsConst0(pLut->pTruth, pLut->nFanins) && !Kit_TruthIsConst1(pLut->pTruth, pLut->nFanins) )
- {
- for ( k = 0; k < pLut->nFanins; k++ )
- {
- pNet = (Ntl_Net_t *)Vec_PtrEntry( vCopies, pLut->pFanins[k] );
- if ( pNet == NULL )
- {
- printf( "Ntl_ManInsert(): Internal error: Net not found.\n" );
- return 0;
- }
- Ntl_ObjSetFanin( pNode, pNet, k );
- }
- }
- else
- pNode->nFanins = 0;
- sprintf( Buffer, "lut%0*d", nDigits, i );
- if ( (pNet = Ntl_ModelFindNet( pRoot, Buffer )) )
- {
- printf( "Ntl_ManInsert(): Internal error: Intermediate net name is not unique.\n" );
- return 0;
- }
- pNet = Ntl_ModelFindOrCreateNet( pRoot, Buffer );
- if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
- {
- printf( "Ntl_ManInsert(): Internal error: Net has more than one fanin.\n" );
- return 0;
- }
- Vec_PtrWriteEntry( vCopies, pLut->Id, pNet );
- }
- Vec_IntFree( vCover );
- // mark CIs and outputs of the registers
- Ntl_ManForEachCiNet( p, pNetCo, i )
- pNetCo->fMark = 1;
- // update the CO pointers
- Ntl_ManForEachCoNet( p, pNetCo, i )
- {
- if ( pNetCo->fMark )
- continue;
- pNetCo->fMark = 1;
- pNet = (Ntl_Net_t *)Vec_PtrEntry( vCopies, Aig_Regular((Aig_Obj_t *)pNetCo->pCopy)->Id );
- pNode = Ntl_ModelCreateNode( pRoot, 1 );
- pNode->pSop = Aig_IsComplement((Aig_Obj_t *)pNetCo->pCopy)? Ntl_ManStoreSop( p->pMemSops, "0 1\n" ) : Ntl_ManStoreSop( p->pMemSops, "1 1\n" );
- Ntl_ObjSetFanin( pNode, pNet, 0 );
- // update the CO driver net
- assert( pNetCo->pDriver == NULL );
- if ( !Ntl_ModelSetNetDriver( pNode, pNetCo ) )
- {
- printf( "Ntl_ManInsert(): Internal error: PO net has more than one fanin.\n" );
- return 0;
- }
- }
- Vec_PtrFree( vCopies );
- // clean CI/CO marks
- Ntl_ManUnmarkCiCoNets( p );
- if ( !Ntl_ManCheck( p ) )
- printf( "Ntl_ManInsertNtk: The check has failed for design %s.\n", p->pName );
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Inserts the given mapping into the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManInsertAig( Ntl_Man_t * p, Aig_Man_t * pAig )
-{
- char Buffer[1000];
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pNode;
- Ntl_Net_t * pNet, * pNetCo;
- Aig_Obj_t * pObj, * pFanin;
- int i, nDigits, Counter;
- assert( Vec_PtrSize(p->vCis) == Aig_ManPiNum(pAig) );
- assert( Vec_PtrSize(p->vCos) == Aig_ManPoNum(pAig) );
- p = Ntl_ManStartFrom( p );
- pRoot = Ntl_ManRootModel( p );
- assert( Ntl_ModelNodeNum(pRoot) == 0 );
- // set the correspondence between the PI/PO nodes
- Aig_ManCleanData( pAig );
- Ntl_ManForEachCiNet( p, pNet, i )
- Aig_ManPi( pAig, i )->pData = pNet;
- // create constant node if needed
- if ( Aig_ManConst1(pAig)->nRefs > 0 )
- {
- pNode = Ntl_ModelCreateNode( pRoot, 0 );
- pNode->pSop = Ntl_ManStoreSop( p->pMemSops, " 1\n" );
- if ( (pNet = Ntl_ModelFindNet( pRoot, "Const1" )) )
- {
- printf( "Ntl_ManInsertAig(): Internal error: Intermediate net name is not unique.\n" );
- return 0;
- }
- pNet = Ntl_ModelFindOrCreateNet( pRoot, "Const1" );
- if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
- {
- printf( "Ntl_ManInsertAig(): Internal error: Net has more than one fanin.\n" );
- return 0;
- }
- Aig_ManConst1(pAig)->pData = pNet;
- }
- // create a new node for each LUT
- Counter = 0;
- nDigits = Aig_Base10Log( Aig_ManNodeNum(pAig) );
- Aig_ManForEachObj( pAig, pObj, i )
- {
- if ( !Aig_ObjIsNode(pObj) )
- continue;
- if ( Aig_ObjFanin0(pObj)->pData == NULL || Aig_ObjFanin1(pObj)->pData == NULL )
- {
- printf( "Ntl_ManInsertAig(): Internal error: Net not found.\n" );
- return 0;
- }
- pNode = Ntl_ModelCreateNode( pRoot, 2 );
- Ntl_ObjSetFanin( pNode, (Ntl_Net_t *)Aig_ObjFanin0(pObj)->pData, 0 );
- Ntl_ObjSetFanin( pNode, (Ntl_Net_t *)Aig_ObjFanin1(pObj)->pData, 1 );
- if ( Aig_ObjFaninC0(pObj) && Aig_ObjFaninC1(pObj) )
- pNode->pSop = Ntl_ManStoreSop( p->pMemSops, "00 1\n" );
- else if ( Aig_ObjFaninC0(pObj) && !Aig_ObjFaninC1(pObj) )
- pNode->pSop = Ntl_ManStoreSop( p->pMemSops, "01 1\n" );
- else if ( !Aig_ObjFaninC0(pObj) && Aig_ObjFaninC1(pObj) )
- pNode->pSop = Ntl_ManStoreSop( p->pMemSops, "10 1\n" );
- else // if ( Aig_ObjFaninC0(pObj) && Aig_ObjFaninC1(pObj) )
- pNode->pSop = Ntl_ManStoreSop( p->pMemSops, "11 1\n" );
- sprintf( Buffer, "and%0*d", nDigits, Counter++ );
- if ( (pNet = Ntl_ModelFindNet( pRoot, Buffer )) )
- {
- printf( "Ntl_ManInsertAig(): Internal error: Intermediate net name is not unique.\n" );
- return 0;
- }
- pNet = Ntl_ModelFindOrCreateNet( pRoot, Buffer );
- if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
- {
- printf( "Ntl_ManInsertAig(): Internal error: Net has more than one fanin.\n" );
- return 0;
- }
- pObj->pData = pNet;
- }
- // mark CIs and outputs of the registers
- Ntl_ManForEachCiNet( p, pNetCo, i )
- pNetCo->fMark = 1;
- // update the CO pointers
- Ntl_ManForEachCoNet( p, pNetCo, i )
- {
- if ( pNetCo->fMark )
- continue;
- pNetCo->fMark = 1;
- // get the corresponding PO and its driver
- pObj = Aig_ManPo( pAig, i );
- pFanin = Aig_ObjFanin0( pObj );
- // get the net driving the driver
- pNet = (Ntl_Net_t *)pFanin->pData;
- pNode = Ntl_ModelCreateNode( pRoot, 1 );
- pNode->pSop = Aig_ObjFaninC0(pObj)? Ntl_ManStoreSop( p->pMemSops, "0 1\n" ) : Ntl_ManStoreSop( p->pMemSops, "1 1\n" );
- Ntl_ObjSetFanin( pNode, pNet, 0 );
- // update the CO driver net
- assert( pNetCo->pDriver == NULL );
- if ( !Ntl_ModelSetNetDriver( pNode, pNetCo ) )
- {
- printf( "Ntl_ManInsertAig(): Internal error: PO net has more than one fanin.\n" );
- return 0;
- }
- }
- // clean CI/CO marks
- Ntl_ManUnmarkCiCoNets( p );
- if ( !Ntl_ManCheck( p ) )
- printf( "Ntl_ManInsertAig: The check has failed for design %s.\n", p->pName );
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Find drivers of the given net.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManFindDriver( Ntl_Man_t * p, char * pName )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pNode;
- Ntl_Net_t * pNet, * pNetThis;
- int i, k;
- pRoot = Ntl_ManRootModel( p );
- pNetThis = Ntl_ModelFindNet( pRoot, pName );
- printf( "\n*** Net %d \"%s\":\n", pNetThis->NetId, pName );
- // mark from the nodes
- Ntl_ModelForEachPo( pRoot, pNode, i )
- if ( pNetThis == Ntl_ObjFanin0(pNode) )
- printf( "driven by PO %d\n", i );
- Ntl_ModelForEachNode( pRoot, pNode, i )
- Ntl_ObjForEachFanin( pNode, pNet, k )
- if ( pNetThis == pNet )
- printf( "driven by node %d with %d fanins and %d fanouts\n (%s)\n",
- pNode->Id, Ntl_ObjFaninNum(pNode), Ntl_ObjFanoutNum(pNode), Ntl_ObjFanout(pNode,0)->pName );
- Ntl_ModelForEachBox( pRoot, pNode, i )
- Ntl_ObjForEachFanin( pNode, pNet, k )
- if ( pNetThis == pNet )
- printf( "driven by box %d with %d fanins and %d fanouts\n (%s)\n",
- pNode->Id, Ntl_ObjFaninNum(pNode), Ntl_ObjFanoutNum(pNode), Ntl_ObjFanout(pNode,0)->pName );
-}
-
-/**Function*************************************************************
-
- Synopsis [Inserts the given mapping into the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManInsertNtk2( Ntl_Man_t * p, Nwk_Man_t * pNtk )
-{
- int fWriteConstants = 1;
- char Buffer[1000];
- Vec_Ptr_t * vObjs;
- Vec_Int_t * vTruth;
- Vec_Int_t * vCover;
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pNode;
- Ntl_Net_t * pNet, * pNetCo;
- Nwk_Obj_t * pObj, * pFanin;
- int i, k, nDigits;
- unsigned * pTruth;
- assert( Vec_PtrSize(p->vCis) == Nwk_ManCiNum(pNtk) );
- assert( Vec_PtrSize(p->vCos) == Nwk_ManCoNum(pNtk) );
- p = Ntl_ManStartFrom( p );
- pRoot = Ntl_ManRootModel( p );
- assert( Ntl_ModelNodeNum(pRoot) == 0 );
- // set the correspondence between the PI/PO nodes
- Ntl_ManForEachCiNet( p, pNet, i )
- Nwk_ManCi( pNtk, i )->pCopy = pNet;
- // create a new node for each LUT
- vTruth = Vec_IntAlloc( 1 << 16 );
- vCover = Vec_IntAlloc( 1 << 16 );
- nDigits = Aig_Base10Log( Nwk_ManNodeNum(pNtk) );
- // go through the nodes in the topological order
- vObjs = Nwk_ManDfs( pNtk );
- Vec_PtrForEachEntry( Nwk_Obj_t *, vObjs, pObj, i )
- {
- if ( !Nwk_ObjIsNode(pObj) )
- continue;
-/*
- if ( fWriteConstants && Nwk_ObjFaninNum(pObj) == 0 )
- {
- pObj->pCopy = NULL;
- continue;
- }
-*/
- // skip constant drivers if they only drive COs
- if ( fWriteConstants && Nwk_ObjFaninNum(pObj) == 0 )
- {
- Nwk_Obj_t * pFanout;
- int i;
- Nwk_ObjForEachFanout( pObj, pFanout, i )
- if ( Nwk_ObjIsNode(pFanout) )
- break;
- if ( i == Nwk_ObjFanoutNum(pObj) )
- {
- pObj->pCopy = NULL;
- continue;
- }
- }
-
- pNode = Ntl_ModelCreateNode( pRoot, Nwk_ObjFaninNum(pObj) );
- pTruth = Hop_ManConvertAigToTruth( pNtk->pManHop, Hop_Regular(pObj->pFunc), Nwk_ObjFaninNum(pObj), vTruth, 0 );
- if ( Hop_IsComplement(pObj->pFunc) )
- Kit_TruthNot( pTruth, pTruth, Nwk_ObjFaninNum(pObj) );
- if ( !Kit_TruthIsConst0(pTruth, Nwk_ObjFaninNum(pObj)) && !Kit_TruthIsConst1(pTruth, Nwk_ObjFaninNum(pObj)) )
- {
- Nwk_ObjForEachFanin( pObj, pFanin, k )
- {
- pNet = (Ntl_Net_t *)pFanin->pCopy;
- if ( pNet == NULL )
- {
- printf( "Ntl_ManInsertNtk(): Internal error: Net not found.\n" );
- return 0;
- }
- Ntl_ObjSetFanin( pNode, pNet, k );
- }
- }
- else if ( Kit_TruthIsConst0(pTruth, Nwk_ObjFaninNum(pObj)) )
- {
- pObj->pFunc = Hop_ManConst0(pNtk->pManHop);
- pNode->nFanins = 0;
- }
- else if ( Kit_TruthIsConst1(pTruth, Nwk_ObjFaninNum(pObj)) )
- {
- pObj->pFunc = Hop_ManConst1(pNtk->pManHop);
- pNode->nFanins = 0;
- }
- pNode->pSop = Kit_PlaFromTruth( p->pMemSops, pTruth, Nwk_ObjFaninNum(pObj), vCover );
- sprintf( Buffer, "lut%0*d", nDigits, i );
- if ( (pNet = Ntl_ModelFindNet( pRoot, Buffer )) )
- {
- printf( "Ntl_ManInsertNtk(): Internal error: Intermediate net name is not unique.\n" );
- return 0;
- }
- pNet = Ntl_ModelFindOrCreateNet( pRoot, Buffer );
- if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
- {
- printf( "Ntl_ManInsertNtk(): Internal error: Net has more than one fanin.\n" );
- return 0;
- }
- pObj->pCopy = pNet;
- }
- Vec_PtrFree( vObjs );
- Vec_IntFree( vCover );
- Vec_IntFree( vTruth );
- // mark the nets driving special boxes
- if ( p->pNalR )
- p->pNalR( p );
- // mark CIs and outputs of the registers
- Ntl_ManForEachCiNet( p, pNetCo, i )
- pNetCo->fMark = 1;
- // update the CO pointers
- Ntl_ManForEachCoNet( p, pNetCo, i )
- {
- if ( pNetCo->fMark )
- continue;
- pNetCo->fMark = 1;
- // get the corresponding PO and its driver
- pObj = Nwk_ManCo( pNtk, i );
- pFanin = Nwk_ObjFanin0( pObj );
- // get the net driving this PO
- pNet = (Ntl_Net_t *)pFanin->pCopy;
- if ( pNet == NULL ) // constant net
- {
- assert( fWriteConstants );
- pNode = Ntl_ModelCreateNode( pRoot, 0 );
- pNode->pSop = pObj->fInvert? Ntl_ManStoreSop( p->pMemSops, " 0\n" ) : Ntl_ManStoreSop( p->pMemSops, " 1\n" );
- }
- else
- if ( Nwk_ObjFanoutNum(pFanin) == 1 && Ntl_ObjIsNode(pNet->pDriver) && !pNet->fMark2 )
- {
- pNode = pNet->pDriver;
- if ( !Ntl_ModelClearNetDriver( pNode, pNet ) )
- {
- printf( "Ntl_ManInsertNtk(): Internal error! Net already has no driver.\n" );
- return NULL;
- }
- // remove this net
- Ntl_ModelDeleteNet( pRoot, pNet );
- Vec_PtrWriteEntry( pRoot->vNets, pNet->NetId, NULL );
- // update node's function
- if ( pObj->fInvert )
- Kit_PlaComplement( pNode->pSop );
- }
- else
- {
-/*
- if ( fWriteConstants && Ntl_ObjFaninNum(pNet->pDriver) == 0 )
- {
- pNode = Ntl_ModelCreateNode( pRoot, 0 );
- pNode->pSop = pObj->fInvert? Ntl_ManStoreSop( p->pMemSops, " 0\n" ) : Ntl_ManStoreSop( p->pMemSops, " 1\n" );
- }
- else
-*/
- {
-// assert( Ntl_ObjFaninNum(pNet->pDriver) != 0 );
- pNode = Ntl_ModelCreateNode( pRoot, 1 );
- pNode->pSop = pObj->fInvert? Ntl_ManStoreSop( p->pMemSops, "0 1\n" ) : Ntl_ManStoreSop( p->pMemSops, "1 1\n" );
- Ntl_ObjSetFanin( pNode, pNet, 0 );
- }
- }
- // update the CO driver net
- assert( pNetCo->pDriver == NULL );
- if ( !Ntl_ModelSetNetDriver( pNode, pNetCo ) )
- {
- printf( "Ntl_ManInsertNtk(): Internal error: PO net has more than one fanin.\n" );
- return NULL;
- }
- }
- // clean CI/CO marks
- Ntl_ManUnmarkCiCoNets( p );
- if ( !Ntl_ManCheck( p ) )
- {
- printf( "Ntl_ManInsertNtk: The check has failed for design %s.\n", p->pName );
- return NULL;
- }
- return p;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Inserts the given mapping into the netlist.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManInsertNtk( Ntl_Man_t * p, Nwk_Man_t * pNtk )
-{
- char Buffer[1000];
- Vec_Ptr_t * vObjs;
- Vec_Int_t * vTruth;
- Vec_Int_t * vCover;
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pNode;
- Ntl_Net_t * pNet, * pNetCo;
- Nwk_Obj_t * pObj, * pFanin;
- int i, k, nDigits;
- unsigned * pTruth;
- assert( Vec_PtrSize(p->vCis) == Nwk_ManCiNum(pNtk) );
- assert( Vec_PtrSize(p->vCos) == Nwk_ManCoNum(pNtk) );
- p = Ntl_ManStartFrom( p );
- pRoot = Ntl_ManRootModel( p );
- assert( Ntl_ModelNodeNum(pRoot) == 0 );
- // set the correspondence between the PI/PO nodes
- Ntl_ManForEachCiNet( p, pNet, i )
- Nwk_ManCi( pNtk, i )->pCopy = pNet;
- // create a new node for each LUT
- vTruth = Vec_IntAlloc( 1 << 16 );
- vCover = Vec_IntAlloc( 1 << 16 );
- nDigits = Aig_Base10Log( Nwk_ManNodeNum(pNtk) );
- // go through the nodes in the topological order
- vObjs = Nwk_ManDfs( pNtk );
- Vec_PtrForEachEntry( Nwk_Obj_t *, vObjs, pObj, i )
- {
- if ( !Nwk_ObjIsNode(pObj) )
- continue;
- pNode = Ntl_ModelCreateNode( pRoot, Nwk_ObjFaninNum(pObj) );
- pTruth = Hop_ManConvertAigToTruth( pNtk->pManHop, Hop_Regular(pObj->pFunc), Nwk_ObjFaninNum(pObj), vTruth, 0 );
- if ( Hop_IsComplement(pObj->pFunc) )
- Kit_TruthNot( pTruth, pTruth, Nwk_ObjFaninNum(pObj) );
- if ( !Kit_TruthIsConst0(pTruth, Nwk_ObjFaninNum(pObj)) && !Kit_TruthIsConst1(pTruth, Nwk_ObjFaninNum(pObj)) )
- {
- Nwk_ObjForEachFanin( pObj, pFanin, k )
- {
- pNet = (Ntl_Net_t *)pFanin->pCopy;
- if ( pNet == NULL )
- {
- printf( "Ntl_ManInsertNtk(): Internal error: Net not found.\n" );
- return 0;
- }
- Ntl_ObjSetFanin( pNode, pNet, k );
- }
- }
- else if ( Kit_TruthIsConst0(pTruth, Nwk_ObjFaninNum(pObj)) )
- {
- pObj->pFunc = Hop_ManConst0(pNtk->pManHop);
- pNode->nFanins = 0;
- }
- else if ( Kit_TruthIsConst1(pTruth, Nwk_ObjFaninNum(pObj)) )
- {
- pObj->pFunc = Hop_ManConst1(pNtk->pManHop);
- pNode->nFanins = 0;
- }
- pNode->pSop = Kit_PlaFromTruth( p->pMemSops, pTruth, Nwk_ObjFaninNum(pObj), vCover );
- sprintf( Buffer, "lut%0*d", nDigits, i );
- if ( (pNet = Ntl_ModelFindNet( pRoot, Buffer )) )
- {
- printf( "Ntl_ManInsertNtk(): Internal error: Intermediate net name is not unique.\n" );
- return 0;
- }
- pNet = Ntl_ModelFindOrCreateNet( pRoot, Buffer );
- if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
- {
- printf( "Ntl_ManInsertNtk(): Internal error: Net has more than one fanin.\n" );
- return 0;
- }
- pObj->pCopy = pNet;
- }
- Vec_PtrFree( vObjs );
- Vec_IntFree( vCover );
- Vec_IntFree( vTruth );
- // mark CIs and outputs of the registers
- Ntl_ManForEachCiNet( p, pNetCo, i )
- pNetCo->fMark = 1;
- // update the CO pointers
- Ntl_ManForEachCoNet( p, pNetCo, i )
- {
- if ( pNetCo->fMark )
- continue;
- pNetCo->fMark = 1;
- // get the corresponding PO and its driver
- pObj = Nwk_ManCo( pNtk, i );
- pFanin = Nwk_ObjFanin0( pObj );
- // get the net driving this PO
- pNet = (Ntl_Net_t *)pFanin->pCopy;
- if ( Nwk_ObjFanoutNum(pFanin) == 1 && Ntl_ObjIsNode(pNet->pDriver) )
- {
- pNode = pNet->pDriver;
- if ( !Ntl_ModelClearNetDriver( pNode, pNet ) )
- {
- printf( "Ntl_ManInsertNtk(): Internal error! Net already has no driver.\n" );
- return NULL;
- }
- // remove this net
- Ntl_ModelDeleteNet( pRoot, pNet );
- Vec_PtrWriteEntry( pRoot->vNets, pNet->NetId, NULL );
- // update node's function
- if ( pObj->fInvert )
- Kit_PlaComplement( pNode->pSop );
- }
- else
- {
- pNode = Ntl_ModelCreateNode( pRoot, 1 );
- pNode->pSop = pObj->fInvert? Ntl_ManStoreSop( p->pMemSops, "0 1\n" ) : Ntl_ManStoreSop( p->pMemSops, "1 1\n" );
- Ntl_ObjSetFanin( pNode, pNet, 0 );
- }
- // update the CO driver net
- assert( pNetCo->pDriver == NULL );
- if ( !Ntl_ModelSetNetDriver( pNode, pNetCo ) )
- {
- printf( "Ntl_ManInsertNtk(): Internal error: PO net has more than one fanin.\n" );
- return NULL;
- }
- }
- // clean CI/CO marks
- Ntl_ManUnmarkCiCoNets( p );
- if ( !Ntl_ManCheck( p ) )
- {
- printf( "Ntl_ManInsertNtk: The check has failed for design %s.\n", p->pName );
- return NULL;
- }
- return p;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlMan.c b/src/aig/ntl/ntlMan.c
deleted file mode 100644
index 45fb7226..00000000
--- a/src/aig/ntl/ntlMan.c
+++ /dev/null
@@ -1,1068 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlMan.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Netlist manager.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Allocates the netlist manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManAlloc()
-{
- Ntl_Man_t * p;
- // start the manager
- p = ABC_ALLOC( Ntl_Man_t, 1 );
- memset( p, 0, sizeof(Ntl_Man_t) );
- p->vModels = Vec_PtrAlloc( 1000 );
- p->vCis = Vec_PtrAlloc( 1000 );
- p->vCos = Vec_PtrAlloc( 1000 );
- p->vVisNodes = Vec_PtrAlloc( 1000 );
- p->vBox1Cios = Vec_IntAlloc( 1000 );
- p->vRegClasses = Vec_IntAlloc( 1000 );
- p->vRstClasses = Vec_IntAlloc( 1000 );
- // start the manager
- p->pMemObjs = Aig_MmFlexStart();
- p->pMemSops = Aig_MmFlexStart();
- // allocate model table
- p->nModTableSize = Aig_PrimeCudd( 100 );
- p->pModTable = ABC_ALLOC( Ntl_Mod_t *, p->nModTableSize );
- memset( p->pModTable, 0, sizeof(Ntl_Mod_t *) * p->nModTableSize );
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Cleanups extended representation.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManCleanup( Ntl_Man_t * p )
-{
- if ( p->pAig )
- {
- Aig_ManStop( p->pAig );
- p->pAig = NULL;
- }
- if ( p->pManTime )
- {
- Tim_ManStop( p->pManTime );
- p->pManTime = NULL;
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Duplicates the design without the nodes of the root model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManStartFrom( Ntl_Man_t * pOld )
-{
- Ntl_Man_t * pNew;
- Ntl_Mod_t * pModel;
- Ntl_Obj_t * pBox;
- Ntl_Net_t * pNet;
- int i, k;
- pNew = Ntl_ManAlloc();
- pNew->pName = Ntl_ManStoreFileName( pNew, pOld->pName );
- pNew->pSpec = Ntl_ManStoreName( pNew, pOld->pName );
- Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
- {
- if ( i == 0 )
- {
- Ntl_ManMarkCiCoNets( pOld );
- pModel->pCopy = Ntl_ModelStartFrom( pNew, pModel );
- Ntl_ManUnmarkCiCoNets( pOld );
- }
- else
- pModel->pCopy = Ntl_ModelDup( pNew, pModel );
- }
- Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
- Ntl_ModelForEachBox( pModel, pBox, k )
- {
- ((Ntl_Obj_t *)pBox->pCopy)->pImplem = (Ntl_Mod_t *)pBox->pImplem->pCopy;
- ((Ntl_Obj_t *)pBox->pCopy)->iTemp = pBox->iTemp;
-// ((Ntl_Obj_t *)pBox->pCopy)->Reset = pBox->Reset;
- }
- Ntl_ManForEachCiNet( pOld, pNet, i )
- Vec_PtrPush( pNew->vCis, pNet->pCopy );
- Ntl_ManForEachCoNet( pOld, pNet, i )
- Vec_PtrPush( pNew->vCos, pNet->pCopy );
- if ( pOld->pManTime )
- pNew->pManTime = Tim_ManDup( pOld->pManTime, 0 );
- if ( pOld->pNal )
- pOld->pNalD( pOld, pNew );
- return pNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Duplicates the design.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManDup( Ntl_Man_t * pOld )
-{
- Ntl_Man_t * pNew;
- Ntl_Mod_t * pModel;
- Ntl_Obj_t * pBox;
- Ntl_Net_t * pNet;
- int i, k;
- pNew = Ntl_ManAlloc();
- pNew->pName = Ntl_ManStoreFileName( pNew, pOld->pName );
- pNew->pSpec = Ntl_ManStoreName( pNew, pOld->pName );
- Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
- pModel->pCopy = Ntl_ModelDup( pNew, pModel );
- Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
- Ntl_ModelForEachBox( pModel, pBox, k )
- ((Ntl_Obj_t *)pBox->pCopy)->pImplem = (Ntl_Mod_t *)pBox->pImplem->pCopy;
- Ntl_ManForEachCiNet( pOld, pNet, i )
- Vec_PtrPush( pNew->vCis, pNet->pCopy );
- Ntl_ManForEachCoNet( pOld, pNet, i )
- Vec_PtrPush( pNew->vCos, pNet->pCopy );
- if ( pOld->pManTime )
- pNew->pManTime = Tim_ManDup( pOld->pManTime, 0 );
- if ( !Ntl_ManCheck( pNew ) )
- printf( "Ntl_ManDup: The check has failed for design %s.\n", pNew->pName );
- return pNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Duplicates the design.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManDupCollapseLuts( Ntl_Man_t * pOld )
-{
- Ntl_Man_t * pNew;
- Ntl_Mod_t * pModel;
- Ntl_Obj_t * pBox;
-// Ntl_Net_t * pNet;
- int i, k;
- pNew = Ntl_ManAlloc();
- pNew->pName = Ntl_ManStoreFileName( pNew, pOld->pName );
- pNew->pSpec = Ntl_ManStoreName( pNew, pOld->pName );
- Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
- pModel->pCopy = Ntl_ModelDupCollapseLuts( pNew, pModel );
- Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
- Ntl_ModelForEachBox( pModel, pBox, k )
- if ( pBox->pCopy )
- ((Ntl_Obj_t *)pBox->pCopy)->pImplem = (Ntl_Mod_t *)pBox->pImplem->pCopy;
-// Ntl_ManForEachCiNet( pOld, pNet, i )
-// Vec_PtrPush( pNew->vCis, pNet->pCopy );
-// Ntl_ManForEachCoNet( pOld, pNet, i )
-// Vec_PtrPush( pNew->vCos, pNet->pCopy );
-// if ( pOld->pManTime )
-// pNew->pManTime = Tim_ManDup( pOld->pManTime, 0 );
- if ( !Ntl_ManCheck( pNew ) )
- printf( "Ntl_ManDup: The check has failed for design %s.\n", pNew->pName );
- return pNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Deallocates the netlist manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManFree( Ntl_Man_t * p )
-{
- if ( p->vModels )
- {
- Ntl_Mod_t * pModel;
- int i;
- Ntl_ManForEachModel( p, pModel, i )
- Ntl_ModelFree( pModel );
- Vec_PtrFree( p->vModels );
- }
- if ( p->vCis ) Vec_PtrFree( p->vCis );
- if ( p->vCos ) Vec_PtrFree( p->vCos );
- if ( p->vVisNodes ) Vec_PtrFree( p->vVisNodes );
- if ( p->vRegClasses) Vec_IntFree( p->vRegClasses );
- if ( p->vRstClasses) Vec_IntFree( p->vRstClasses );
- if ( p->vBox1Cios ) Vec_IntFree( p->vBox1Cios );
- if ( p->pMemObjs ) Aig_MmFlexStop( p->pMemObjs, 0 );
- if ( p->pMemSops ) Aig_MmFlexStop( p->pMemSops, 0 );
- if ( p->pAig ) Aig_ManStop( p->pAig );
- if ( p->pManTime ) Tim_ManStop( p->pManTime );
- if ( p->pNal ) p->pNalF( p->pNal );
- ABC_FREE( p->pModTable );
- ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManPrintStats( Ntl_Man_t * p )
-{
- Ntl_Mod_t * pRoot;
- pRoot = Ntl_ManRootModel( p );
- printf( "%-15s : ", p->pName );
- printf( "pi = %5d ", Ntl_ModelPiNum(pRoot) );
- printf( "po = %5d ", Ntl_ModelPoNum(pRoot) );
- printf( "lat = %5d ", Ntl_ModelLatchNum(pRoot) );
- printf( "node = %5d ", Ntl_ModelNodeNum(pRoot) );
- printf( "\n " );
- printf( "inv/buf = %5d ", Ntl_ModelLut1Num(pRoot) );
- printf( "box = %4d ", Ntl_ModelBoxNum(pRoot) );
- printf( "mod = %3d ", Vec_PtrSize(p->vModels) );
- printf( "net = %d", Ntl_ModelCountNets(pRoot) );
- printf( "\n" );
- fflush( stdout );
- assert( Ntl_ModelLut1Num(pRoot) == Ntl_ModelCountLut1(pRoot) );
- Ntl_ManPrintTypes( p );
- fflush( stdout );
-}
-
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Nwk_ManPrintStatsShort( Ntl_Man_t * p, Aig_Man_t * pAig, Nwk_Man_t * pNtk )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- int i, Counter = 0;
- pRoot = Ntl_ManRootModel( p );
- Ntl_ModelForEachBox( pRoot, pObj, i )
- if ( strcmp(pObj->pImplem->pName, "dff") == 0 )
- Counter++;
- if ( Counter == 0 )
- {
- Ntl_ModelForEachBox( pRoot, pObj, i )
- Counter += (pObj->pImplem->attrWhite && !pObj->pImplem->attrComb);
- }
- printf( "%-15s : ", p->pName );
- printf( "pi =%5d ", Ntl_ModelPiNum(pRoot) );
- printf( "po =%5d ", Ntl_ModelPoNum(pRoot) );
- printf( "ff =%5d ", Counter );
- printf( "box =%6d ", Ntl_ModelBoxNum(pRoot) );
- if ( pAig != NULL )
- {
- Counter = Aig_ManChoiceNum( pAig );
- if ( Counter )
- printf( "cho =%7d ", Counter );
- else
- printf( "aig =%7d ", Aig_ManNodeNum(pAig) );
- }
- if ( pNtk == NULL )
- printf( "No mapping.\n" );
- else
- {
- printf( "lut =%5d ", Nwk_ManNodeNum(pNtk) );
- printf( "lev =%3d ", Nwk_ManLevel(pNtk) );
-// printf( "del =%5.2f ", Nwk_ManDelayTraceLut(pNtk) );
- printf( "\n" );
- }
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManStatsRegs( Ntl_Man_t * p )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- int i, Counter = 0;
- pRoot = Ntl_ManRootModel( p );
- Ntl_ModelForEachBox( pRoot, pObj, i )
- if ( strcmp(pObj->pImplem->pName, "m_dff") == 0 )
- Counter++;
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManStatsLuts( Ntl_Man_t * p )
-{
- return Ntl_ModelLut1Num( Ntl_ManRootModel(p) ) + Ntl_ModelNodeNum( Ntl_ManRootModel(p) );
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Nwk_ManStatsLuts( Nwk_Man_t * pNtk )
-{
- return pNtk ? Nwk_ManNodeNum(pNtk) : -1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Nwk_ManStatsLevs( Nwk_Man_t * pNtk )
-{
- return pNtk ? Nwk_ManLevel(pNtk) : -1;
-}
-
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Nwk_ManPrintStatsUpdate( Ntl_Man_t * p, Aig_Man_t * pAig, Nwk_Man_t * pNtk,
- int nRegInit, int nLutInit, int nLevInit, int Time )
-{
- printf( "FF =%7d (%5.1f%%) ", Ntl_ManStatsRegs(p), nRegInit ? (100.0*(nRegInit-Ntl_ManStatsRegs(p))/nRegInit) : 0.0 );
- if ( pNtk == NULL )
- printf( "Mapping is not available. " );
- else
- {
- printf( "Lut =%7d (%5.1f%%) ", Ntl_ManStatsLuts(p), nLutInit ? (100.0*(nLutInit-Ntl_ManStatsLuts(p))/nLutInit) : 0.0 );
- printf( "Lev =%4d (%5.1f%%) ", Nwk_ManStatsLevs(pNtk), nLevInit ? (100.0*(nLevInit-Nwk_ManStatsLevs(pNtk))/nLevInit) : 0.0 );
- }
- ABC_PRT( "Time", clock() - Time );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Deallocates the netlist manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Tim_Man_t * Ntl_ManReadTimeMan( Ntl_Man_t * p )
-{
- return p->pManTime;
-}
-
-/**Function*************************************************************
-
- Synopsis [Saves the model type.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManSaveBoxType( Ntl_Obj_t * pObj )
-{
- Ntl_Mod_t * pModel = pObj->pImplem;
- int Number = 0;
- assert( Ntl_ObjIsBox(pObj) );
- Number |= (pModel->attrWhite << 0);
- Number |= (pModel->attrBox << 1);
- Number |= (pModel->attrComb << 2);
- Number |= (pModel->attrKeep << 3);
- Number |= (pModel->attrNoMerge << 4);
- pModel->pMan->BoxTypes[Number]++;
-}
-
-/**Function*************************************************************
-
- Synopsis [Saves the model type.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManPrintTypes( Ntl_Man_t * p )
-{
- Vec_Ptr_t * vFlops;
- Ntl_Net_t * pNet;
- Ntl_Mod_t * pModel;
- Ntl_Obj_t * pObj;
- int i;
- pModel = Ntl_ManRootModel( p );
- if ( Ntl_ModelBoxNum(pModel) == 0 )
- return;
- printf( "BOX STATISTICS:\n" );
- Ntl_ModelForEachBox( pModel, pObj, i )
- Ntl_ManSaveBoxType( pObj );
- for ( i = 0; i < 32; i++ )
- {
- if ( !p->BoxTypes[i] )
- continue;
- printf( "Type %2d Num = %7d :", i, p->BoxTypes[i] );
- printf( " %s", ((i & 1) > 0)? "white ": "black " );
- printf( " %s", ((i & 2) > 0)? "box ": "logic " );
- printf( " %s", ((i & 4) > 0)? "comb ": "seq " );
- printf( " %s", ((i & 8) > 0)? "keep ": "sweep " );
- printf( " %s", ((i & 16) > 0)? "no_merge": "merge " );
- printf( "\n" );
- }
- printf( "MODEL STATISTICS:\n" );
- Ntl_ManForEachModel( p, pModel, i )
- if ( i ) printf( "Model %2d : Name = %10s Used = %6d.\n", i, pModel->pName, pModel->nUsed );
- for ( i = 0; i < 32; i++ )
- p->BoxTypes[i] = 0;
- pModel = Ntl_ManRootModel( p );
- if ( pModel->vClockFlops )
- {
- printf( "CLOCK STATISTICS:\n" );
- Vec_VecForEachLevel( pModel->vClockFlops, vFlops, i )
- {
- pNet = (Ntl_Net_t *)Vec_PtrEntry( pModel->vClocks, i );
- printf( "Clock %2d : Name = %30s Flops = %6d.\n", i+1, pNet->pName, Vec_PtrSize(vFlops) );
- }
- }
- printf( "\n" );
-}
-
-/**Function*************************************************************
-
- Synopsis [Procedure used for sorting the nodes in decreasing order of levels.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManCompareClockClasses( Vec_Ptr_t ** pp1, Vec_Ptr_t ** pp2 )
-{
- int Diff = Vec_PtrSize(*pp1) - Vec_PtrSize(*pp2);
- if ( Diff > 0 )
- return -1;
- if ( Diff < 0 )
- return 1;
- return 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Saves the model type.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManPrintClocks( Ntl_Man_t * p )
-{
- Vec_Ptr_t * vFlops;
- Ntl_Net_t * pNet;
- Ntl_Mod_t * pModel;
- int i;
- pModel = Ntl_ManRootModel( p );
- if ( Ntl_ModelBoxNum(pModel) == 0 )
- return;
- if ( pModel->vClockFlops )
- {
- printf( "CLOCK STATISTICS:\n" );
- Vec_VecForEachLevel( pModel->vClockFlops, vFlops, i )
- {
- pNet = (Ntl_Net_t *)Vec_PtrEntry( pModel->vClocks, i );
- printf( "Clock %2d : Name = %30s Flops = %6d.\n", i+1, pNet->pName, Vec_PtrSize(vFlops) );
- if ( i == 10 )
- {
- printf( "Skipping... (the total is %d)\n", Vec_VecSize(pModel->vClockFlops) );
- break;
- }
- }
- }
-// printf( "\n" );
-}
-
-/**Function*************************************************************
-
- Synopsis [Saves the model type.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManPrintResets( Ntl_Man_t * p )
-{
- Vec_Ptr_t * vFlops;
- Ntl_Net_t * pNet;
- Ntl_Mod_t * pModel;
- int i;
- pModel = Ntl_ManRootModel( p );
- if ( Ntl_ModelBoxNum(pModel) == 0 )
- return;
- if ( pModel->vResetFlops )
- {
- printf( "RESET STATISTICS:\n" );
- Vec_VecForEachLevel( pModel->vResetFlops, vFlops, i )
- {
- pNet = (Ntl_Net_t *)Vec_PtrEntry( pModel->vResets, i );
- printf( "Reset %2d : Name = %30s Flops = %6d.\n", i+1, pNet->pName, Vec_PtrSize(vFlops) );
- if ( i == 10 )
- {
- printf( "Skipping... (the total is %d)\n", Vec_VecSize(pModel->vResetFlops) );
- break;
- }
- }
- }
-// printf( "\n" );
-}
-
-/**Function*************************************************************
-
- Synopsis [Allocates the model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ModelAlloc( Ntl_Man_t * pMan, char * pName )
-{
- Ntl_Mod_t * p;
- // start the manager
- p = ABC_ALLOC( Ntl_Mod_t, 1 );
- memset( p, 0, sizeof(Ntl_Mod_t) );
- p->attrBox = 1;
- p->attrComb = 1;
- p->attrWhite = 1;
- p->attrKeep = 0;
- p->attrNoMerge = 0;
- p->pMan = pMan;
- p->pName = Ntl_ManStoreName( p->pMan, pName );
- p->vObjs = Vec_PtrAlloc( 100 );
- p->vPis = Vec_PtrAlloc( 10 );
- p->vPos = Vec_PtrAlloc( 10 );
- p->vNets = Vec_PtrAlloc( 100 );
- // start the table
- p->nTableSize = Aig_PrimeCudd( 100 );
- p->pTable = ABC_ALLOC( Ntl_Net_t *, p->nTableSize );
- memset( p->pTable, 0, sizeof(Ntl_Net_t *) * p->nTableSize );
- // add model to the table
- if ( !Ntl_ManAddModel( pMan, p ) )
- {
- Ntl_ModelFree( p );
- return NULL;
- }
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Duplicates the model without nodes but with CI/CO nets.]
-
- Description [The CI/CO nets of the old model should be marked before
- calling this procedure.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ModelStartFrom( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld )
-{
- Ntl_Mod_t * pModelNew;
- Ntl_Net_t * pNet;
- Ntl_Obj_t * pObj;
- int i, k;
- pModelNew = Ntl_ModelAlloc( pManNew, pModelOld->pName );
- pModelNew->attrWhite = pModelOld->attrWhite;
- pModelNew->attrBox = pModelOld->attrBox;
- pModelNew->attrComb = pModelOld->attrComb;
- pModelNew->attrKeep = pModelOld->attrKeep;
- pModelNew->attrNoMerge = pModelOld->attrNoMerge;
- Ntl_ModelForEachObj( pModelOld, pObj, i )
- {
- if ( Ntl_ObjIsNode(pObj) )
- pObj->pCopy = NULL;
- else
- pObj->pCopy = Ntl_ModelDupObj( pModelNew, pObj );
- }
- Ntl_ModelForEachNet( pModelOld, pNet, i )
- {
- if ( pNet->pDriver == NULL )
- pNet->pCopy = Ntl_ModelFindOrCreateNet( pModelNew, pNet->pName );
- else if ( pNet->fMark )
- {
- pNet->pCopy = Ntl_ModelFindOrCreateNet( pModelNew, pNet->pName );
- ((Ntl_Net_t *)pNet->pCopy)->pDriver = (Ntl_Obj_t *)pNet->pDriver->pCopy;
- }
- else
- pNet->pCopy = NULL;
- if ( pNet->pCopy )
- ((Ntl_Net_t *)pNet->pCopy)->fFixed = pNet->fFixed;
- }
- Ntl_ModelForEachObj( pModelOld, pObj, i )
- {
- if ( Ntl_ObjIsNode(pObj) )
- continue;
- Ntl_ObjForEachFanin( pObj, pNet, k )
- if ( pNet->pCopy != NULL )
- Ntl_ObjSetFanin( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
- Ntl_ObjForEachFanout( pObj, pNet, k )
- if ( pNet->pCopy != NULL )
- Ntl_ObjSetFanout( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
- if ( Ntl_ObjIsLatch(pObj) )
- {
- ((Ntl_Obj_t *)pObj->pCopy)->LatchId = pObj->LatchId;
- ((Ntl_Obj_t *)pObj->pCopy)->pClock = (Ntl_Net_t *)pObj->pClock->pCopy;
- }
- }
- pModelNew->vDelays = pModelOld->vDelays? Vec_IntDup( pModelOld->vDelays ) : NULL;
- pModelNew->vTimeInputs = pModelOld->vTimeInputs? Vec_IntDup( pModelOld->vTimeInputs ) : NULL;
- pModelNew->vTimeOutputs = pModelOld->vTimeOutputs? Vec_IntDup( pModelOld->vTimeOutputs ) : NULL;
- return pModelNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Duplicates the model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ModelDup( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld )
-{
- Ntl_Mod_t * pModelNew;
- Ntl_Net_t * pNet;
- Ntl_Obj_t * pObj;
- int i, k;
- pModelNew = Ntl_ModelAlloc( pManNew, pModelOld->pName );
- pModelNew->attrWhite = pModelOld->attrWhite;
- pModelNew->attrBox = pModelOld->attrBox;
- pModelNew->attrComb = pModelOld->attrComb;
- pModelNew->attrKeep = pModelOld->attrKeep;
- pModelNew->attrNoMerge = pModelOld->attrNoMerge;
- Ntl_ModelForEachObj( pModelOld, pObj, i )
- pObj->pCopy = Ntl_ModelDupObj( pModelNew, pObj );
- Ntl_ModelForEachNet( pModelOld, pNet, i )
- {
- pNet->pCopy = Ntl_ModelFindOrCreateNet( pModelNew, pNet->pName );
- ((Ntl_Net_t *)pNet->pCopy)->fFixed = pNet->fFixed;
- if ( pNet->pDriver == NULL )
- {
- assert( !pModelOld->attrWhite );
- continue;
- }
- ((Ntl_Net_t *)pNet->pCopy)->pDriver = (Ntl_Obj_t *)pNet->pDriver->pCopy;
- assert( pNet->pDriver->pCopy != NULL );
- }
- Ntl_ModelForEachObj( pModelOld, pObj, i )
- {
- Ntl_ObjForEachFanin( pObj, pNet, k )
- Ntl_ObjSetFanin( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
- Ntl_ObjForEachFanout( pObj, pNet, k )
- Ntl_ObjSetFanout( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
- if ( Ntl_ObjIsLatch(pObj) )
- {
- ((Ntl_Obj_t *)pObj->pCopy)->LatchId = pObj->LatchId;
- ((Ntl_Obj_t *)pObj->pCopy)->pClock = pObj->pClock? (Ntl_Net_t *)pObj->pClock->pCopy : NULL;
- }
- if ( Ntl_ObjIsNode(pObj) )
- ((Ntl_Obj_t *)pObj->pCopy)->pSop = Ntl_ManStoreSop( pManNew->pMemSops, pObj->pSop );
- }
- pModelNew->vDelays = pModelOld->vDelays? Vec_IntDup( pModelOld->vDelays ) : NULL;
- pModelNew->vTimeInputs = pModelOld->vTimeInputs? Vec_IntDup( pModelOld->vTimeInputs ) : NULL;
- pModelNew->vTimeOutputs = pModelOld->vTimeOutputs? Vec_IntDup( pModelOld->vTimeOutputs ) : NULL;
- return pModelNew;
-}
-
-
-// *r x\large\club_u2.blif.bz2; *ps; *clplut; *ps
-// *r x\large\amazon_core.blif.bz2; *ps; *clplut; *ps
-
-
-/**Function*************************************************************
-
- Synopsis [Duplicates the model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ModelDupCollapseLuts( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld )
-{
- Ntl_Mod_t * pModelNew, * pModelBox;
- Ntl_Net_t * pNet;
- Ntl_Obj_t * pObj, * pObjBox;
- char * pNameBuf = ABC_ALLOC( char, 10000 );
- int i, k, m, Counter = 0;
- pModelNew = Ntl_ModelAlloc( pManNew, pModelOld->pName );
- pModelNew->attrWhite = pModelOld->attrWhite;
- pModelNew->attrBox = pModelOld->attrBox;
- pModelNew->attrComb = pModelOld->attrComb;
- pModelNew->attrKeep = pModelOld->attrKeep;
- pModelNew->attrNoMerge = pModelOld->attrNoMerge;
- Ntl_ModelForEachObj( pModelOld, pObj, i )
- if ( Ntl_ObjIsLutBox(pObj) ) // skip collapsible LUT boxes
- pObj->pCopy = NULL;
- else
- pObj->pCopy = Ntl_ModelDupObj( pModelNew, pObj );
- Ntl_ModelForEachNet( pModelOld, pNet, i )
- {
- pNet->pCopy = Ntl_ModelFindOrCreateNet( pModelNew, pNet->pName );
- ((Ntl_Net_t *)pNet->pCopy)->fFixed = pNet->fFixed;
- if ( pNet->pDriver == NULL )
- {
- assert( !pModelOld->attrWhite );
- continue;
- }
- if ( Ntl_ObjIsLutBox(pNet->pDriver) )
- continue;
- ((Ntl_Net_t *)pNet->pCopy)->pDriver = (Ntl_Obj_t *)pNet->pDriver->pCopy;
- assert( pNet->pDriver->pCopy != NULL );
- }
- Ntl_ModelForEachObj( pModelOld, pObj, i )
- {
- if ( Ntl_ObjIsLutBox(pObj) ) // collapse LUT boxes
- {
- pModelBox = pObj->pImplem;
- assert( pModelBox->attrComb );
- assert( Ntl_ObjFaninNum(pObj) == Ntl_ModelPiNum(pModelBox) );
- assert( Ntl_ObjFanoutNum(pObj) == Ntl_ModelPoNum(pModelBox) );
- Ntl_ModelClearNets( pModelBox );
- // attach PI/PO nets
- Ntl_ModelForEachPi( pModelBox, pObjBox, k )
- Ntl_ObjFanout0(pObjBox)->pCopy = Ntl_ObjFanin(pObj, k)->pCopy;
- Ntl_ModelForEachPo( pModelBox, pObjBox, k )
- Ntl_ObjFanin0(pObjBox)->pCopy = Ntl_ObjFanout(pObj, k)->pCopy;
- // duplicate internal nodes
- Ntl_ModelForEachNode( pModelBox, pObjBox, k )
- pObjBox->pCopy = Ntl_ModelDupObj( pModelNew, pObjBox );
- // duplicate and connect nets
- Ntl_ModelForEachNet( pModelBox, pNet, k )
- {
- if ( pNet->pCopy != NULL )
- continue;
- sprintf( pNameBuf, "box%d_%s", i, pNet->pName );
- pNet->pCopy = Ntl_ModelFindOrCreateNet( pModelNew, pNameBuf ); // change name!!!
- ((Ntl_Net_t *)pNet->pCopy)->pDriver = (Ntl_Obj_t *)pNet->pDriver->pCopy;
- }
- // connect nodes
- Ntl_ModelForEachNode( pModelBox, pObjBox, k )
- {
- Ntl_ObjForEachFanin( pObjBox, pNet, m )
- Ntl_ObjSetFanin( (Ntl_Obj_t *)pObjBox->pCopy, (Ntl_Net_t *)pNet->pCopy, m );
- Ntl_ObjForEachFanout( pObjBox, pNet, m )
- Ntl_ObjSetFanout( (Ntl_Obj_t *)pObjBox->pCopy, (Ntl_Net_t *)pNet->pCopy, m );
- ((Ntl_Obj_t *)pObjBox->pCopy)->pSop = Ntl_ManStoreSop( pManNew->pMemSops, pObjBox->pSop );
- }
- // connect the PO nets
- Ntl_ModelForEachPo( pModelBox, pObjBox, k )
- ((Ntl_Net_t *)Ntl_ObjFanin0(pObjBox)->pCopy)->pDriver = (Ntl_Obj_t *)Ntl_ObjFanin0(pObjBox)->pDriver->pCopy;
- assert( pObj->pCopy == NULL );
- Counter++;
- }
- else
- {
- Ntl_ObjForEachFanin( pObj, pNet, k )
- Ntl_ObjSetFanin( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
- Ntl_ObjForEachFanout( pObj, pNet, k )
- Ntl_ObjSetFanout( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
- if ( Ntl_ObjIsLatch(pObj) )
- {
- ((Ntl_Obj_t *)pObj->pCopy)->LatchId = pObj->LatchId;
- ((Ntl_Obj_t *)pObj->pCopy)->pClock = pObj->pClock? (Ntl_Net_t *)pObj->pClock->pCopy : NULL;
- }
- if ( Ntl_ObjIsNode(pObj) )
- ((Ntl_Obj_t *)pObj->pCopy)->pSop = Ntl_ManStoreSop( pManNew->pMemSops, pObj->pSop );
- }
- }
- pModelNew->vDelays = pModelOld->vDelays? Vec_IntDup( pModelOld->vDelays ) : NULL;
- pModelNew->vTimeInputs = pModelOld->vTimeInputs? Vec_IntDup( pModelOld->vTimeInputs ) : NULL;
- pModelNew->vTimeOutputs = pModelOld->vTimeOutputs? Vec_IntDup( pModelOld->vTimeOutputs ) : NULL;
- ABC_FREE( pNameBuf );
- if ( Counter )
- printf( "Collapsed %d LUT boxes.\n", Counter );
- return pModelNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Deallocates the model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ModelFree( Ntl_Mod_t * p )
-{
- assert( Ntl_ModelCheckNetsAreNotMarked(p) );
- if ( p->vTimeOutputs ) Vec_IntFree( p->vTimeOutputs );
- if ( p->vTimeInputs ) Vec_IntFree( p->vTimeInputs );
- if ( p->vDelays ) Vec_IntFree( p->vDelays );
- if ( p->vClocks ) Vec_PtrFree( p->vClocks );
- if ( p->vClockFlops ) Vec_VecFree( p->vClockFlops );
- if ( p->vResets ) Vec_PtrFree( p->vResets );
- if ( p->vResetFlops ) Vec_VecFree( p->vResetFlops );
- Vec_PtrFree( p->vNets );
- Vec_PtrFree( p->vObjs );
- Vec_PtrFree( p->vPis );
- Vec_PtrFree( p->vPos );
- ABC_FREE( p->pTable );
- ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
- Synopsis [Create model equal to the latch with the given init value.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ManCreateLatchModel( Ntl_Man_t * pMan, int Init )
-{
- char Name[100];
- Ntl_Mod_t * pModel;
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNetLi, * pNetLo;
- // create model
- sprintf( Name, "%s%d", "latch", Init );
- pModel = Ntl_ModelAlloc( pMan, Name );
- pModel->attrWhite = 1;
- pModel->attrBox = 1;
- pModel->attrComb = 0;
- pModel->attrKeep = 0;
- pModel->attrNoMerge = 0;
- // create primary input
- pObj = Ntl_ModelCreatePi( pModel );
- pNetLi = Ntl_ModelFindOrCreateNet( pModel, "li" );
- Ntl_ModelSetNetDriver( pObj, pNetLi );
- // create latch
- pObj = Ntl_ModelCreateLatch( pModel );
- pObj->LatchId.regInit = Init;
- pObj->pFanio[0] = pNetLi;
- // create primary output
- pNetLo = Ntl_ModelFindOrCreateNet( pModel, "lo" );
- Ntl_ModelSetNetDriver( pObj, pNetLo );
- pObj = Ntl_ModelCreatePo( pModel, pNetLo );
- // set timing information
- pModel->vTimeInputs = Vec_IntAlloc( 2 );
- Vec_IntPush( pModel->vTimeInputs, -1 );
- Vec_IntPush( pModel->vTimeInputs, Aig_Float2Int(0.0) );
- pModel->vTimeOutputs = Vec_IntAlloc( 2 );
- Vec_IntPush( pModel->vTimeOutputs, -1 );
- Vec_IntPush( pModel->vTimeOutputs, Aig_Float2Int(0.0) );
- return pModel;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Count constant nodes.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelCountLut0( Ntl_Mod_t * p )
-{
- Ntl_Obj_t * pNode;
- int i, Counter = 0;
- Ntl_ModelForEachNode( p, pNode, i )
- if ( Ntl_ObjFaninNum(pNode) == 0 )
- Counter++;
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Count single-output nodes.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelCountLut1( Ntl_Mod_t * p )
-{
- Ntl_Obj_t * pNode;
- int i, Counter = 0;
- Ntl_ModelForEachNode( p, pNode, i )
- if ( Ntl_ObjFaninNum(pNode) == 1 )
- Counter++;
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Count buffers]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelCountBuf( Ntl_Mod_t * p )
-{
- Ntl_Obj_t * pNode;
- int i, Counter = 0;
- Ntl_ModelForEachNode( p, pNode, i )
- if ( Ntl_ObjFaninNum(pNode) == 1 && pNode->pSop[0] == '1' )
- Counter++;
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Count inverters.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelCountInv( Ntl_Mod_t * p )
-{
- Ntl_Obj_t * pNode;
- int i, Counter = 0;
- Ntl_ModelForEachNode( p, pNode, i )
- if ( Ntl_ObjFaninNum(pNode) == 1 && pNode->pSop[0] == '0' )
- Counter++;
- return Counter;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlMap.c b/src/aig/ntl/ntlMap.c
deleted file mode 100644
index 0ce8549d..00000000
--- a/src/aig/ntl/ntlMap.c
+++ /dev/null
@@ -1,346 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlMap.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Derives mapped network from AIG.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlMap.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "kit.h"
-#include "if.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Allocates mapping for the given AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_MappingAlloc( int nLuts, int nVars )
-{
- char * pMemory;
- Ntl_Lut_t ** pArray;
- int nEntrySize, i;
- nEntrySize = sizeof(Ntl_Lut_t) + sizeof(int) * nVars + sizeof(unsigned) * Aig_TruthWordNum(nVars);
- pArray = (Ntl_Lut_t **)ABC_ALLOC( char, (sizeof(Ntl_Lut_t *) + nEntrySize) * nLuts );
- pMemory = (char *)(pArray + nLuts);
- memset( pMemory, 0, nEntrySize * nLuts );
- for ( i = 0; i < nLuts; i++ )
- {
- pArray[i] = (Ntl_Lut_t *)pMemory;
- pArray[i]->pFanins = (int *)(pMemory + sizeof(Ntl_Lut_t));
- pArray[i]->pTruth = (unsigned *)(pMemory + sizeof(Ntl_Lut_t) + sizeof(int) * nVars);
- pMemory += nEntrySize;
- }
- return Vec_PtrAllocArray( (void **)pArray, nLuts );
-}
-
-/**Function*************************************************************
-
- Synopsis [Derives trivial mapping from the AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_MappingFromAig( Aig_Man_t * p )
-{
- Vec_Ptr_t * vMapping;
- Ntl_Lut_t * pLut;
- Aig_Obj_t * pObj;
- int i, k = 0, nBytes = 4;
- vMapping = Ntl_MappingAlloc( Aig_ManAndNum(p) + (int)(Aig_ManConst1(p)->nRefs > 0), 2 );
- if ( Aig_ManConst1(p)->nRefs > 0 )
- {
- pLut = (Ntl_Lut_t *)Vec_PtrEntry( vMapping, k++ );
- pLut->Id = 0;
- pLut->nFanins = 0;
- memset( pLut->pTruth, 0xFF, nBytes );
- }
- Aig_ManForEachNode( p, pObj, i )
- {
- pLut = (Ntl_Lut_t *)Vec_PtrEntry( vMapping, k++ );
- pLut->Id = pObj->Id;
- pLut->nFanins = 2;
- pLut->pFanins[0] = Aig_ObjFaninId0(pObj);
- pLut->pFanins[1] = Aig_ObjFaninId1(pObj);
- if ( Aig_ObjFaninC0(pObj) && Aig_ObjFaninC1(pObj) )
- memset( pLut->pTruth, 0x11, nBytes );
- else if ( !Aig_ObjFaninC0(pObj) && Aig_ObjFaninC1(pObj) )
- memset( pLut->pTruth, 0x22, nBytes );
- else if ( Aig_ObjFaninC0(pObj) && !Aig_ObjFaninC1(pObj) )
- memset( pLut->pTruth, 0x44, nBytes );
- else if ( !Aig_ObjFaninC0(pObj) && !Aig_ObjFaninC1(pObj) )
- memset( pLut->pTruth, 0x88, nBytes );
- }
- assert( k == Vec_PtrSize(vMapping) );
- return vMapping;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Load the network into FPGA manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManSetIfParsDefault( If_Par_t * pPars )
-{
-// extern void * Abc_FrameReadLibLut();
- // set defaults
- memset( pPars, 0, sizeof(If_Par_t) );
- // user-controlable paramters
-// pPars->nLutSize = -1;
- pPars->nLutSize = 6;
- pPars->nCutsMax = 8;
- pPars->nFlowIters = 1;
- pPars->nAreaIters = 2;
- pPars->DelayTarget = -1;
- pPars->Epsilon = (float)0.005;
- pPars->fPreprocess = 1;
- pPars->fArea = 0;
- pPars->fFancy = 0;
- pPars->fExpRed = 0;
- pPars->fLatchPaths = 0;
- pPars->fEdge = 1;
- pPars->fCutMin = 0;
- pPars->fSeqMap = 0;
- pPars->fVerbose = 1;
- // internal parameters
- pPars->fTruth = 1;
- pPars->nLatches = 0;
- pPars->fLiftLeaves = 0;
-// pPars->pLutLib = Abc_FrameReadLibLut();
- pPars->pLutLib = NULL;
- pPars->pTimesArr = NULL;
- pPars->pTimesArr = NULL;
- pPars->pFuncCost = NULL;
-/*
- if ( pPars->nLutSize == -1 )
- {
- if ( pPars->pLutLib == NULL )
- {
- printf( "The LUT library is not given.\n" );
- return;
- }
- // get LUT size from the library
- pPars->nLutSize = pPars->pLutLib->LutMax;
- }
-*/
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Load the network into FPGA manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-If_Man_t * Ntl_ManToIf( Aig_Man_t * p, If_Par_t * pPars )
-{
- If_Man_t * pIfMan;
- Aig_Obj_t * pNode;//, * pFanin, * pPrev;
- int i;
- // start the mapping manager and set its parameters
- pIfMan = If_ManStart( pPars );
- // print warning about excessive memory usage
- if ( 1.0 * Aig_ManObjNum(p) * pIfMan->nObjBytes / (1<<30) > 1.0 )
- printf( "Warning: The mapper will allocate %.1f Gb for to represent the subject graph with %d AIG nodes.\n",
- 1.0 * Aig_ManObjNum(p) * pIfMan->nObjBytes / (1<<30), Aig_ManObjNum(p) );
- // load the AIG into the mapper
- Aig_ManForEachObj( p, pNode, i )
- {
- if ( Aig_ObjIsAnd(pNode) )
- pNode->pData = (Aig_Obj_t *)If_ManCreateAnd( pIfMan,
- If_NotCond( (If_Obj_t *)Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ),
- If_NotCond( (If_Obj_t *)Aig_ObjFanin1(pNode)->pData, Aig_ObjFaninC1(pNode) ) );
- else if ( Aig_ObjIsPi(pNode) )
- {
- pNode->pData = If_ManCreateCi( pIfMan );
- ((If_Obj_t *)pNode->pData)->Level = pNode->Level;
- if ( pIfMan->nLevelMax < (int)pNode->Level )
- pIfMan->nLevelMax = (int)pNode->Level;
- }
- else if ( Aig_ObjIsPo(pNode) )
- pNode->pData = If_ManCreateCo( pIfMan, If_NotCond( (If_Obj_t *)Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ) );
- else if ( Aig_ObjIsConst1(pNode) )
- Aig_ManConst1(p)->pData = If_ManConst1( pIfMan );
- else // add the node to the mapper
- assert( 0 );
- // set up the choice node
-// if ( Aig_AigNodeIsChoice( pNode ) )
-// {
-// pIfMan->nChoices++;
-// for ( pPrev = pNode, pFanin = pNode->pData; pFanin; pPrev = pFanin, pFanin = pFanin->pData )
-// If_ObjSetChoice( (If_Obj_t *)pPrev->pData, (If_Obj_t *)pFanin->pData );
-// If_ManCreateChoice( pIfMan, (If_Obj_t *)pNode->pData );
-// }
- {
- If_Obj_t * pIfObj = (If_Obj_t *)pNode->pData;
- assert( !If_IsComplement(pIfObj) );
- assert( pIfObj->Id == pNode->Id );
- }
- }
- return pIfMan;
-}
-
-/**Function*************************************************************
-
- Synopsis [Creates the mapped network.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_ManFromIf( Aig_Man_t * p, If_Man_t * pMan )
-{
- Vec_Ptr_t * vIfMap;
- If_Obj_t * pNode, * pLeaf;
- If_Cut_t * pCutBest;
- Vec_Ptr_t * vMapping;
- Vec_Int_t * vIfToAig;
- Aig_Obj_t * pObj;
- Ntl_Lut_t * pLut;
- int * ppLeaves;
- int i, k, nLuts, nLeaves, nWords, nVarsMax;
- // create mapping of If nodes into AIG nodes
- vIfToAig = Vec_IntStart( Aig_ManObjNumMax(p) );
- Vec_IntFill( vIfToAig, Aig_ManObjNumMax(p), -1 );
- Aig_ManForEachObj( p, pObj, i )
- {
- if ( Aig_ObjIsPo(pObj) )
- continue;
- if ( Aig_ObjIsConst1(pObj) && pObj->pData == NULL )
- continue;
- if ( Aig_ObjIsPi(pObj) && pObj->pData == NULL )
- continue;
- pNode = (If_Obj_t *)pObj->pData;
- assert( pNode != NULL );
- Vec_IntWriteEntry( vIfToAig, pNode->Id, pObj->Id );
- }
- // create the mapping
- vIfMap = If_ManCollectMappingDirect( pMan );
- nVarsMax = pMan->pPars->nLutSize;
- nWords = Aig_TruthWordNum( nVarsMax );
- vMapping = Ntl_MappingAlloc( Vec_PtrSize(vIfMap) + (int)(Aig_ManConst1(p)->nRefs > 0), nVarsMax );
- nLuts = 0;
- if ( Aig_ManConst1(p)->nRefs > 0 )
- {
- pLut = (Ntl_Lut_t *)Vec_PtrEntry( vMapping, nLuts++ );
- pLut->Id = 0;
- pLut->nFanins = 0;
- memset( pLut->pTruth, 0xFF, 4 * nWords );
- }
- Vec_PtrForEachEntry( If_Obj_t *, vIfMap, pNode, i )
- {
- // get the best cut
- pCutBest = If_ObjCutBest(pNode);
- nLeaves = If_CutLeaveNum( pCutBest );
- ppLeaves = If_CutLeaves( pCutBest );
- // fill the LUT
- pLut = (Ntl_Lut_t *)Vec_PtrEntry( vMapping, nLuts++ );
- pLut->Id = Vec_IntEntry( vIfToAig, pNode->Id );
- pLut->nFanins = nLeaves;
- If_CutForEachLeaf( pMan, pCutBest, pLeaf, k )
- pLut->pFanins[k] = Vec_IntEntry( vIfToAig, pLeaf->Id );
- // compute the truth table
- memcpy( pLut->pTruth, If_CutTruth(pCutBest), 4 * nWords );
- }
- assert( nLuts == Vec_PtrSize(vMapping) );
- Vec_IntFree( vIfToAig );
- Vec_PtrFree( vIfMap );
- return vMapping;
-}
-
-/**Function*************************************************************
-
- Synopsis [Interface with the FPGA mapping package.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_MappingIf( Ntl_Man_t * pMan, Aig_Man_t * p )
-{
- Vec_Ptr_t * vMapping;
- If_Par_t Pars, * pPars = &Pars;
- If_Man_t * pIfMan;
- // perform FPGA mapping
- Ntl_ManSetIfParsDefault( pPars );
- // set the arrival times
- pPars->pTimesArr = ABC_ALLOC( float, Aig_ManPiNum(p) );
- memset( pPars->pTimesArr, 0, sizeof(float) * Aig_ManPiNum(p) );
- // translate into the mapper
- pIfMan = Ntl_ManToIf( p, pPars );
- if ( pIfMan == NULL )
- return NULL;
- pIfMan->pManTim = Tim_ManDup( pMan->pManTime, 0 );
- if ( !If_ManPerformMapping( pIfMan ) )
- {
- If_ManStop( pIfMan );
- return NULL;
- }
- // transform the result of mapping into the new network
- vMapping = Ntl_ManFromIf( p, pIfMan );
- If_ManStop( pIfMan );
- if ( vMapping == NULL )
- return NULL;
- return vMapping;
-}
-
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlNames.c b/src/aig/ntl/ntlNames.c
deleted file mode 100644
index fa91711d..00000000
--- a/src/aig/ntl/ntlNames.c
+++ /dev/null
@@ -1,471 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlNames.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Data-structure for storing hiNamrchical object names.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlNames.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-// name object
-typedef struct Ntl_ObjNam_t_ Ntl_ObjNam_t;
-struct Ntl_ObjNam_t_
-{
- int iPrev; // prefix of this name
- int iNext; // the next name in the hash table
- char pName[0]; // name characters
-};
-
-// name manager
-typedef struct Ntl_ManNam_t_ Ntl_ManNam_t;
-struct Ntl_ManNam_t_
-{
- // info storage for names
- char * pStore; // storage for name objects
- int nStore; // the size of allocated storage
- int iHandle; // the current free handle
- int nHandles; // the number of handles
- int nRefs; // reference counter for the manager
- // hash table for names
- int nBins;
- unsigned * pBins;
- // temporaries
- Vec_Str_t * vName; // storage for returned name
-};
-
-static inline Ntl_ObjNam_t * Ntl_ManNamObj( Ntl_ManNam_t * p, int h ) { assert( !(h & 3) ); return (Ntl_ObjNam_t *)(p->pStore + h); }
-static inline int Ntl_ManNamObjHandle( Ntl_ManNam_t * p, Ntl_ObjNam_t * pObj ) { return ((char *)pObj) - p->pStore; }
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Creates manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_ManNam_t * Ntl_ManNamStart()
-{
- Ntl_ManNam_t * p;
- p = ABC_CALLOC( Ntl_ManNam_t, 1 );
- p->nStore = (1 << 20);
- p->pStore = ABC_ALLOC( char, p->nStore );
- p->iHandle = 4;
- p->nBins = Aig_PrimeCudd( 500000 );
- p->pBins = ABC_CALLOC( unsigned, p->nBins );
- p->vName = Vec_StrAlloc( 1000 );
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Deletes manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManNamStop( Ntl_ManNam_t * p )
-{
- Vec_StrFree( p->vName );
- ABC_FREE( p->pStore );
- ABC_FREE( p->pBins );
- ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
- Synopsis [Deletes manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManNamReportMemUsage( Ntl_ManNam_t * p )
-{
- return sizeof(Ntl_ManNam_t) + p->nStore + sizeof(int) * p->nBins + sizeof(int) * Vec_StrSize(p->vName);
-}
-
-/**Function*************************************************************
-
- Synopsis [References the manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManNamRef( Ntl_ManNam_t * p )
-{
- p->nRefs++;
-}
-
-/**Function*************************************************************
-
- Synopsis [Dereferences the manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManNamDeref( Ntl_ManNam_t * p )
-{
- if ( --p->nRefs == 0 )
- Ntl_ManNamStop( p );
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns object with the given handle.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-
-
-/**Function*************************************************************
-
- Synopsis [Computes hash value of the node using its simulation info.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManNamStrHash( char * pStr, int Length, int nTableSize )
-{
- static int s_FPrimes[128] = {
- 1009, 1049, 1093, 1151, 1201, 1249, 1297, 1361, 1427, 1459,
- 1499, 1559, 1607, 1657, 1709, 1759, 1823, 1877, 1933, 1997,
- 2039, 2089, 2141, 2213, 2269, 2311, 2371, 2411, 2467, 2543,
- 2609, 2663, 2699, 2741, 2797, 2851, 2909, 2969, 3037, 3089,
- 3169, 3221, 3299, 3331, 3389, 3461, 3517, 3557, 3613, 3671,
- 3719, 3779, 3847, 3907, 3943, 4013, 4073, 4129, 4201, 4243,
- 4289, 4363, 4441, 4493, 4549, 4621, 4663, 4729, 4793, 4871,
- 4933, 4973, 5021, 5087, 5153, 5227, 5281, 5351, 5417, 5471,
- 5519, 5573, 5651, 5693, 5749, 5821, 5861, 5923, 6011, 6073,
- 6131, 6199, 6257, 6301, 6353, 6397, 6481, 6563, 6619, 6689,
- 6737, 6803, 6863, 6917, 6977, 7027, 7109, 7187, 7237, 7309,
- 7393, 7477, 7523, 7561, 7607, 7681, 7727, 7817, 7877, 7933,
- 8011, 8039, 8059, 8081, 8093, 8111, 8123, 8147
- };
- unsigned uHash;
- int i;
- uHash = 0;
- for ( i = 0; i < Length; i++ )
- if ( i & 1 )
- uHash *= pStr[i] * s_FPrimes[i & 0x7F];
- else
- uHash ^= pStr[i] * s_FPrimes[i & 0x7F];
- return uHash % nTableSize;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Compares two strings to be equal.]
-
- Description [Returns 1 if the strings match.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManNamStrCompare_rec( Ntl_ManNam_t * p, char * pStr, int Length, Ntl_ObjNam_t * pThis )
-{
- Ntl_ObjNam_t * pNext = (pThis->iPrev)? Ntl_ManNamObj(p, pThis->iPrev) : NULL;
- int LengthNew = strlen(pThis->pName);
- if ( !strncmp( pThis->pName, pStr + Length - LengthNew, LengthNew ) )
- return 0;
- if ( pNext == NULL )
- return 1;
- return Ntl_ManNamStrCompare_rec( p, pStr, Length - LengthNew, pNext );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Returns the place of this state in the table or NULL if it exists.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static inline unsigned * Ntl_ManNamStrHashFind( Ntl_ManNam_t * p, char * pStr, int Length, int * pHandle )
-{
- Ntl_ObjNam_t * pThis;
- unsigned * pPlace = p->pBins + Ntl_ManNamStrHash( pStr, Length, p->nBins );
- for ( pThis = (*pPlace)? Ntl_ManNamObj(p, *pPlace) : NULL; pThis;
- pPlace = (unsigned *)&pThis->iNext, pThis = (*pPlace)? Ntl_ManNamObj(p, *pPlace) : NULL )
- if ( !Ntl_ManNamStrCompare_rec( p, pStr, Length, pThis ) )
- {
- *pHandle = Ntl_ManNamObjHandle( p, pThis );
- return NULL;
- }
- *pHandle = -1;
- return pPlace;
-}
-
-/**Function*************************************************************
-
- Synopsis [Resizes the hash table.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManNamStrHashResize( Ntl_ManNam_t * p )
-{
- Ntl_ObjNam_t * pThis;
- unsigned * pBinsOld, * piPlace;
- int nBinsOld, iNext, iHandle, Counter, i;
- assert( p->pBins != NULL );
- // replace the table
- pBinsOld = p->pBins;
- nBinsOld = p->nBins;
- p->nBins = Aig_PrimeCudd( 3 * p->nBins );
- p->pBins = ABC_CALLOC( unsigned, p->nBins );
- // rehash the entries from the old table
- Counter = 0;
- for ( i = 0; i < nBinsOld; i++ )
- for ( pThis = (pBinsOld[i]? Ntl_ManNamObj(p, pBinsOld[i]) : NULL),
- iNext = (pThis? pThis->iNext : 0);
- pThis; pThis = (iNext? Ntl_ManNamObj(p, iNext) : NULL),
- iNext = (pThis? pThis->iNext : 0) )
- {
- pThis->iNext = 0;
- piPlace = Ntl_ManNamStrHashFind( p, pThis->pName, strlen(pThis->pName), &iHandle );
- assert( *piPlace == 0 ); // should not be there
- *piPlace = Ntl_ManNamObjHandle( p, pThis );
- Counter++;
- }
- assert( Counter == p->nHandles );
- ABC_FREE( pBinsOld );
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns the handle of a new object to represent the name.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManNamStrGrow_rec( Ntl_ManNam_t * p, char * pStr, int Length, unsigned * piPlace )
-{
- Ntl_ObjNam_t * pThis;
- char * pStrNew;
- int Separ, LengthNew;
- int iHandle;
- assert( Length > 0 );
- // find the separator symbol
- for ( Separ = Length - 2; Separ >= 0 && pStr[Separ] != '/'; Separ-- );
- pStrNew = (Separ == -1) ? pStr : pStr + Separ + 1;
- LengthNew = Length - (pStrNew - pStr);
- // realloc memory if needed
- if ( p->iHandle + (int)sizeof(Ntl_ObjNam_t) + LengthNew+5 > p->nStore )
- {
- int OffSet;
- if ( (char *)piPlace > p->pStore && (char *)piPlace < p->pStore + p->nStore )
- OffSet = (char *)piPlace - p->pStore;
- else
- OffSet = -1;
- p->nStore *= 2;
- p->pStore = ABC_REALLOC( char, p->pStore, p->nStore );
- if ( OffSet >= 0 )
- piPlace = (unsigned *)(p->pStore + OffSet);
- }
- // new entry is created
- p->nHandles++;
- *piPlace = p->iHandle;
- pThis = Ntl_ManNamObj( p, p->iHandle );
- p->iHandle += sizeof(Ntl_ObjNam_t) + 4 * Aig_BitWordNum( 8*(LengthNew+1) );
- pThis->iNext = 0;
- pThis->iPrev = 0;
- strncpy( pThis->pName, pStrNew, LengthNew );
- pThis->pName[LengthNew] = 0;
- // expand hash table if needed
-// if ( p->nHandles > 2 * p->nBins )
-// Ntl_ManNamStrHashResize( p );
- // create previous object if needed
- if ( Separ >= 0 )
- {
- assert( pStr[Separ] == '/' );
- Separ++;
- piPlace = Ntl_ManNamStrHashFind( p, pStr, Separ, &iHandle );
- if ( piPlace != NULL )
- iHandle = Ntl_ManNamStrGrow_rec( p, pStr, Separ, piPlace );
- pThis->iPrev = iHandle;
- }
- return Ntl_ManNamObjHandle( p, pThis );
-}
-
-/**Function*************************************************************
-
- Synopsis [Finds or adds the given name to storage.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManNamStrFind( Ntl_ManNam_t * p, char * pStr )
-{
- int iHandle;
- Ntl_ManNamStrHashFind( p, pStr, strlen(pStr), &iHandle );
- return iHandle;
-}
-
-/**Function*************************************************************
-
- Synopsis [Finds or adds the given name to storage.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-unsigned Ntl_ManNamStrFindOrAdd( Ntl_ManNam_t * p, char * pStr )
-{
- unsigned * piPlace;
- int iHandle, Length = strlen(pStr);
- assert( Length > 0 );
- piPlace = Ntl_ManNamStrHashFind( p, pStr, Length, &iHandle );
- if ( piPlace == NULL )
- return iHandle;
- assert( *piPlace == 0 );
- return Ntl_ManNamStrGrow_rec( p, pStr, Length, piPlace );
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns name from handle.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-char * Ntl_ManNamStr( Ntl_ManNam_t * p, int h )
-{
- Ntl_ObjNam_t * pObj;
- int k;
- assert( h && h < p->iHandle );
- Vec_StrClear( p->vName );
- for ( pObj = Ntl_ManNamObj( p, h ); pObj; pObj = pObj->iPrev ? Ntl_ManNamObj(p, pObj->iPrev) : NULL )
- for ( k = strlen(pObj->pName) - 1; k >= 0; k-- )
- Vec_StrPush( p->vName, pObj->pName[k] );
- Vec_StrReverseOrder( p->vName );
- Vec_StrPush( p->vName, 0 );
- return Vec_StrArray( p->vName );
-}
-
-/**Function*************************************************************
-
- Synopsis [Testing procedure for the manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManNamTest( Ntl_Man_t * pNtl )
-{
- Ntl_ManNam_t * p;
- Ntl_Mod_t * pRoot;
- Ntl_Net_t * pNet;
- int Memory;
- int i, iHandle;
- int clk = clock();
-
- p = Ntl_ManNamStart();
-printf( "a" );
- Memory = 0;
- pRoot = Ntl_ManRootModel( pNtl );
- Ntl_ModelForEachNet( pRoot, pNet, i )
- {
- Memory += strlen(pNet->pName) + 1;
- iHandle = Ntl_ManNamStrFindOrAdd( p, pNet->pName );
-
-// printf( "Before = %s\n", pNet->pName );
-// printf( "After = %s\n", Ntl_ManNamStr(p, iHandle) );
- }
- printf( "Net =%7d. Handle =%8d. ", Vec_PtrSize(pRoot->vNets), p->nHandles );
- printf( "Mem old = %7.2f Mb. Mem new = %7.2f Mb.\n",
- 1.0 * Memory / (1 << 20), 1.0 * Ntl_ManNamReportMemUsage(p) / (1 << 20) );
- ABC_PRT( "Time", clock() - clk );
-printf( "b" );
-
- Ntl_ManNamStop( p );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlObj.c b/src/aig/ntl/ntlObj.c
deleted file mode 100644
index 209974aa..00000000
--- a/src/aig/ntl/ntlObj.c
+++ /dev/null
@@ -1,319 +0,0 @@
-/**CFile****************************************************************
-
- FileName [.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis []
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: .c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Creates the primary input.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreatePi( Ntl_Mod_t * pModel )
-{
- Ntl_Obj_t * p;
- p = (Ntl_Obj_t *)Aig_MmFlexEntryFetch( pModel->pMan->pMemObjs, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) );
- memset( p, 0, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) );
- p->Id = Vec_PtrSize( pModel->vObjs );
- Vec_PtrPush( pModel->vObjs, p );
- Vec_PtrPush( pModel->vPis, p );
-// p->pModel = pModel;
- p->Type = NTL_OBJ_PI;
- p->nFanins = 0;
- p->nFanouts = 1;
- pModel->nObjs[NTL_OBJ_PI]++;
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Creates the primary output.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreatePo( Ntl_Mod_t * pModel, Ntl_Net_t * pNet )
-{
- Ntl_Obj_t * p;
- p = (Ntl_Obj_t *)Aig_MmFlexEntryFetch( pModel->pMan->pMemObjs, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) );
- memset( p, 0, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) );
- p->Id = Vec_PtrSize( pModel->vObjs );
- Vec_PtrPush( pModel->vObjs, p );
- Vec_PtrPush( pModel->vPos, p );
-// p->pModel = pModel;
- p->Type = NTL_OBJ_PO;
- p->nFanins = 1;
- p->nFanouts = 0;
- p->pFanio[0] = pNet;
- pModel->nObjs[NTL_OBJ_PO]++;
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Creates the primary output.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreateLatch( Ntl_Mod_t * pModel )
-{
- Ntl_Obj_t * p;
- p = (Ntl_Obj_t *)Aig_MmFlexEntryFetch( pModel->pMan->pMemObjs, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * 3 );
- memset( p, 0, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * 3 );
- p->Id = Vec_PtrSize( pModel->vObjs );
- Vec_PtrPush( pModel->vObjs, p );
-// p->pModel = pModel;
- p->Type = NTL_OBJ_LATCH;
- p->nFanins = 1;
- p->nFanouts = 1;
- pModel->nObjs[NTL_OBJ_LATCH]++;
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Creates the node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreateNode( Ntl_Mod_t * pModel, int nFanins )
-{
- Ntl_Obj_t * p;
- p = (Ntl_Obj_t *)Aig_MmFlexEntryFetch( pModel->pMan->pMemObjs, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * (nFanins + 1) );
- memset( p, 0, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * (nFanins + 1) );
- p->Id = Vec_PtrSize( pModel->vObjs );
- Vec_PtrPush( pModel->vObjs, p );
-// p->pModel = pModel;
- p->Type = NTL_OBJ_NODE;
- p->nFanins = nFanins;
- p->nFanouts = 1;
- if ( nFanins == 1 )
- pModel->nObjs[NTL_OBJ_LUT1]++;
- else
- pModel->nObjs[NTL_OBJ_NODE]++;
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Create the latch.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreateBox( Ntl_Mod_t * pModel, int nFanins, int nFanouts )
-{
- Ntl_Obj_t * p;
- p = (Ntl_Obj_t *)Aig_MmFlexEntryFetch( pModel->pMan->pMemObjs, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * (nFanins + nFanouts) );
- memset( p, 0, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * (nFanins + nFanouts) );
- p->Id = Vec_PtrSize( pModel->vObjs );
- Vec_PtrPush( pModel->vObjs, p );
-// p->pModel = pModel;
- p->Type = NTL_OBJ_BOX;
- p->nFanins = nFanins;
- p->nFanouts = nFanouts;
- p->Reset = -1;
- pModel->nObjs[NTL_OBJ_BOX]++;
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Create the latch.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelDupObj( Ntl_Mod_t * pModel, Ntl_Obj_t * pOld )
-{
- Ntl_Obj_t * pNew = NULL; // Supprses "might be used uninitialized"
- if ( Ntl_ObjIsPi( pOld ) )
- pNew = Ntl_ModelCreatePi( pModel );
- else if ( Ntl_ObjIsPo( pOld ) )
- pNew = Ntl_ModelCreatePo( pModel, NULL );
- else if ( Ntl_ObjIsLatch( pOld ) )
- pNew = Ntl_ModelCreateLatch( pModel );
- else if ( Ntl_ObjIsNode( pOld ) )
- pNew = Ntl_ModelCreateNode( pModel, Ntl_ObjFaninNum(pOld) );
- else if ( Ntl_ObjIsBox( pOld ) )
- pNew = Ntl_ModelCreateBox( pModel, Ntl_ObjFaninNum(pOld), Ntl_ObjFanoutNum(pOld) );
- return pNew;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Creates the primary input with the given name.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreatePiWithName( Ntl_Mod_t * pModel, char * pName )
-{
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet;
- pNet = Ntl_ModelFindOrCreateNet( pModel, pName );
- if ( pNet->pDriver )
- return NULL;
- pObj = Ntl_ModelCreatePi( pModel );
- Ntl_ModelSetNetDriver( pObj, pNet );
- return pObj;
-}
-
-/**Function*************************************************************
-
- Synopsis [Allocates memory and copies the name into it.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-char * Ntl_ManStoreName( Ntl_Man_t * p, char * pName )
-{
- char * pStore;
- pStore = Aig_MmFlexEntryFetch( p->pMemObjs, strlen(pName) + 1 );
- strcpy( pStore, pName );
- return pStore;
-}
-
-/**Function*************************************************************
-
- Synopsis [Allocates memory and copies the SOP into it.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-char * Ntl_ManStoreSop( Aig_MmFlex_t * pMan, const char * pSop )
-{
- char * pStore;
- pStore = Aig_MmFlexEntryFetch( pMan, strlen(pSop) + 1 );
- strcpy( pStore, pSop );
- return pStore;
-}
-
-/**Function*************************************************************
-
- Synopsis [Allocates memory and copies the root of file name there.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-char * Ntl_ManStoreFileName( Ntl_Man_t * p, char * pFileName )
-{
- char * pBeg, * pEnd, * pStore, * pCur;
- // find the first dot
- for ( pEnd = pFileName; *pEnd; pEnd++ )
- if ( *pEnd == '.' )
- break;
- // find the first char
- for ( pBeg = pEnd - 1; pBeg >= pFileName; pBeg-- )
- if ( !((*pBeg >= 'a' && *pBeg <= 'z') || (*pBeg >= 'A' && *pBeg <= 'Z') || (*pBeg >= '0' && *pBeg <= '9') || *pBeg == '_') )
- break;
- pBeg++;
- // fill up storage
- pStore = Aig_MmFlexEntryFetch( p->pMemSops, pEnd - pBeg + 1 );
- for ( pCur = pStore; pBeg < pEnd; pBeg++, pCur++ )
- *pCur = *pBeg;
- *pCur = 0;
- return pStore;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Returns the index of the fanin in the fanin list of the fanout.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManObjWhichFanout( Ntl_Obj_t * pNode, Ntl_Net_t * pFanout )
-{
- Ntl_Net_t * pObj;
- int i;
- Ntl_ObjForEachFanout( pNode, pObj, i )
- if ( pObj == pFanout )
- return i;
- return -1;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlReadBlif.c b/src/aig/ntl/ntlReadBlif.c
deleted file mode 100644
index 88962efa..00000000
--- a/src/aig/ntl/ntlReadBlif.c
+++ /dev/null
@@ -1,1446 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlReadBlif.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Command processing package.]
-
- Synopsis [Procedures to read BLIF file.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - January 8, 2007.]
-
- Revision [$Id: ntlReadBlif.c,v 1.1 2008/10/10 14:09:30 mjarvin Exp $]
-
-***********************************************************************/
-
-// The code in this file is developed in collaboration with Mark Jarvin of Toronto.
-
-#include "ntl.h"
-#include "bzlib.h"
-#include "zlib.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Ntl_ReadMod_t_ Ntl_ReadMod_t; // parsing model
-typedef struct Ntl_ReadMan_t_ Ntl_ReadMan_t; // parsing manager
-
-struct Ntl_ReadMod_t_
-{
- // file lines
- char * pFirst; // .model line
- char * pAttrib; // .attrib line
- Vec_Ptr_t * vInputs; // .inputs lines
- Vec_Ptr_t * vOutputs; // .outputs lines
- Vec_Ptr_t * vLatches; // .latch lines
- Vec_Ptr_t * vNames; // .names lines
- Vec_Ptr_t * vSubckts; // .subckt lines
- Vec_Ptr_t * vDelays; // .delay lines
- Vec_Ptr_t * vTimeInputs; // .input_arrival/required lines
- Vec_Ptr_t * vTimeOutputs; // .output_required/arrival lines
- int fBlackBox; // indicates blackbox model
- int fNoMerge; // indicates no-merge model
- char fInArr;
- char fInReq;
- char fOutArr;
- char fOutReq;
- // the resulting network
- Ntl_Mod_t * pNtk;
- // the parent manager
- Ntl_ReadMan_t * pMan;
-};
-
-struct Ntl_ReadMan_t_
-{
- // general info about file
- char * pFileName; // the name of the file
- char * pBuffer; // the contents of the file
- Vec_Ptr_t * vLines; // the line beginnings
- // the results of reading
- Ntl_Man_t * pDesign; // the design under construction
- // intermediate storage for models
- Vec_Ptr_t * vModels; // vector of models
- Ntl_ReadMod_t * pLatest; // the current model
- // current processing info
- Vec_Ptr_t * vTokens; // the current tokens
- Vec_Ptr_t * vTokens2; // the current tokens
- Vec_Str_t * vFunc; // the local function
- // error reporting
- char sError[512]; // the error string generated during parsing
- // statistics
- int nTablesRead; // the number of processed tables
- int nTablesLeft; // the number of dangling tables
-};
-
-// static functions
-static Ntl_ReadMan_t * Ntl_ReadAlloc();
-static void Ntl_ReadFree( Ntl_ReadMan_t * p );
-static Ntl_ReadMod_t * Ntl_ReadModAlloc();
-static void Ntl_ReadModFree( Ntl_ReadMod_t * p );
-static char * Ntl_ReadLoadFile( char * pFileName );
-static char * Ntl_ReadLoadFileBz2( char * pFileName );
-static char * Ntl_ReadLoadFileGz( char * pFileName );
-static void Ntl_ReadReadPreparse( Ntl_ReadMan_t * p );
-static int Ntl_ReadReadInterfaces( Ntl_ReadMan_t * p );
-static Ntl_Man_t * Ntl_ReadParse( Ntl_ReadMan_t * p );
-static int Ntl_ReadParseLineModel( Ntl_ReadMod_t * p, char * pLine );
-static int Ntl_ReadParseLineAttrib( Ntl_ReadMod_t * p, char * pLine );
-static int Ntl_ReadParseLineInputs( Ntl_ReadMod_t * p, char * pLine );
-static int Ntl_ReadParseLineOutputs( Ntl_ReadMod_t * p, char * pLine );
-static int Ntl_ReadParseLineLatch( Ntl_ReadMod_t * p, char * pLine );
-static int Ntl_ReadParseLineSubckt( Ntl_ReadMod_t * p, char * pLine );
-static int Ntl_ReadParseLineDelay( Ntl_ReadMod_t * p, char * pLine );
-static int Ntl_ReadParseLineTimes( Ntl_ReadMod_t * p, char * pLine, int fOutput );
-static int Ntl_ReadParseLineNamesBlif( Ntl_ReadMod_t * p, char * pLine );
-
-static int Ntl_ReadCharIsSpace( char s ) { return s == ' ' || s == '\t' || s == '\r' || s == '\n'; }
-static int Ntl_ReadCharIsSopSymb( char s ) { return s == '0' || s == '1' || s == '-' || s == '\r' || s == '\n'; }
-
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Reads the network from the BLIF file.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManReadBlif( char * pFileName, int fCheck )
-{
- FILE * pFile;
- Ntl_ReadMan_t * p;
- Ntl_Man_t * pDesign;
- if ( !Ntl_FileIsType(pFileName, ".blif", ".blif.gz", ".blif.bz2") )
- {
- printf( "Wrong file format\n" );
- return NULL;
- }
- // check that the file is available
- pFile = fopen( pFileName, "rb" );
- if ( pFile == NULL )
- {
- printf( "Ntl_ManReadBlif(): The file is unavailable (absent or open).\n" );
- return 0;
- }
- fclose( pFile );
-
- // start the file reader
- p = Ntl_ReadAlloc();
- p->pFileName = pFileName;
- if ( !strncmp(pFileName+strlen(pFileName)-4,".bz2",4) )
- p->pBuffer = Ntl_ReadLoadFileBz2( pFileName );
- else if ( !strncmp(pFileName+strlen(pFileName)-3,".gz",3) )
- p->pBuffer = Ntl_ReadLoadFileGz( pFileName );
- else
- p->pBuffer = Ntl_ReadLoadFile( pFileName );
- if ( p->pBuffer == NULL )
- {
- Ntl_ReadFree( p );
- return NULL;
- }
- // set the design name
- p->pDesign = Ntl_ManAlloc();
- p->pDesign->pName = Ntl_ManStoreFileName( p->pDesign, pFileName );
- p->pDesign->pSpec = Ntl_ManStoreName( p->pDesign, pFileName );
- // prepare the file for parsing
- Ntl_ReadReadPreparse( p );
- // parse interfaces of each network
- if ( !Ntl_ReadReadInterfaces( p ) )
- {
- if ( p->sError[0] )
- fprintf( stdout, "%s\n", p->sError );
- Ntl_ReadFree( p );
- return NULL;
- }
- // construct the network
- pDesign = Ntl_ReadParse( p );
- if ( p->sError[0] )
- fprintf( stdout, "%s\n", p->sError );
- if ( pDesign == NULL )
- {
- Ntl_ReadFree( p );
- return NULL;
- }
- p->pDesign = NULL;
- Ntl_ReadFree( p );
-// pDesign should be linked to all models of the design
-
- // make sure that everything is okay with the network structure
- if ( fCheck )
- {
- if ( !Ntl_ManCheck( pDesign ) )
- {
- printf( "Ntl_ReadBlif: The check has failed for design %s.\n", pDesign->pName );
- Ntl_ManFree( pDesign );
- return NULL;
- }
-
- }
- // transform the design by removing the CO drivers
-// if ( (nNodes = Ntl_ManReconnectCoDrivers(pDesign)) )
-// printf( "The design was transformed by removing %d buf/inv CO drivers.\n", nNodes );
-//Ntl_ManWriteBlif( pDesign, "_temp_.blif" );
-/*
- {
- Aig_Man_t * p = Ntl_ManCollapseSeq( pDesign );
- Aig_ManStop( p );
- }
-*/
- return pDesign;
-}
-
-/**Function*************************************************************
-
- Synopsis [Allocates the BLIF parsing structure.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static Ntl_ReadMan_t * Ntl_ReadAlloc()
-{
- Ntl_ReadMan_t * p;
- p = ABC_ALLOC( Ntl_ReadMan_t, 1 );
- memset( p, 0, sizeof(Ntl_ReadMan_t) );
- p->vLines = Vec_PtrAlloc( 512 );
- p->vModels = Vec_PtrAlloc( 512 );
- p->vTokens = Vec_PtrAlloc( 512 );
- p->vTokens2 = Vec_PtrAlloc( 512 );
- p->vFunc = Vec_StrAlloc( 512 );
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Frees the BLIF parsing structure.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static void Ntl_ReadFree( Ntl_ReadMan_t * p )
-{
- Ntl_ReadMod_t * pMod;
- int i;
- if ( p->pDesign )
- Ntl_ManFree( p->pDesign );
- if ( p->pBuffer )
- ABC_FREE( p->pBuffer );
- if ( p->vLines )
- Vec_PtrFree( p->vLines );
- if ( p->vModels )
- {
- Vec_PtrForEachEntry( Ntl_ReadMod_t *, p->vModels, pMod, i )
- Ntl_ReadModFree( pMod );
- Vec_PtrFree( p->vModels );
- }
- Vec_PtrFree( p->vTokens );
- Vec_PtrFree( p->vTokens2 );
- Vec_StrFree( p->vFunc );
- ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
- Synopsis [Allocates the BLIF parsing structure for one model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static Ntl_ReadMod_t * Ntl_ReadModAlloc()
-{
- Ntl_ReadMod_t * p;
- p = ABC_ALLOC( Ntl_ReadMod_t, 1 );
- memset( p, 0, sizeof(Ntl_ReadMod_t) );
- p->vInputs = Vec_PtrAlloc( 8 );
- p->vOutputs = Vec_PtrAlloc( 8 );
- p->vLatches = Vec_PtrAlloc( 8 );
- p->vNames = Vec_PtrAlloc( 8 );
- p->vSubckts = Vec_PtrAlloc( 8 );
- p->vDelays = Vec_PtrAlloc( 8 );
- p->vTimeInputs = Vec_PtrAlloc( 8 );
- p->vTimeOutputs = Vec_PtrAlloc( 8 );
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Deallocates the BLIF parsing structure for one model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static void Ntl_ReadModFree( Ntl_ReadMod_t * p )
-{
- Vec_PtrFree( p->vInputs );
- Vec_PtrFree( p->vOutputs );
- Vec_PtrFree( p->vLatches );
- Vec_PtrFree( p->vNames );
- Vec_PtrFree( p->vSubckts );
- Vec_PtrFree( p->vDelays );
- Vec_PtrFree( p->vTimeInputs );
- Vec_PtrFree( p->vTimeOutputs );
- ABC_FREE( p );
-}
-
-
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of given chars.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadCountChars( char * pLine, char Char )
-{
- char * pCur;
- int Counter = 0;
- for ( pCur = pLine; *pCur; pCur++ )
- if ( *pCur == Char )
- Counter++;
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the already split tokens.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static void Ntl_ReadCollectTokens( Vec_Ptr_t * vTokens, char * pInput, char * pOutput )
-{
- char * pCur;
- Vec_PtrClear( vTokens );
- for ( pCur = pInput; pCur < pOutput; pCur++ )
- {
- if ( *pCur == 0 )
- continue;
- Vec_PtrPush( vTokens, pCur );
- while ( *++pCur );
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Splits the line into tokens.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static void Ntl_ReadSplitIntoTokens( Vec_Ptr_t * vTokens, char * pLine, char Stop )
-{
- char * pCur;
- // clear spaces
- for ( pCur = pLine; *pCur != Stop; pCur++ )
- if ( Ntl_ReadCharIsSpace(*pCur) )
- *pCur = 0;
- // collect tokens
- Ntl_ReadCollectTokens( vTokens, pLine, pCur );
-}
-
-/**Function*************************************************************
-
- Synopsis [Splits the line into tokens.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static void Ntl_ReadSplitIntoTokensAndClear( Vec_Ptr_t * vTokens, char * pLine, char Stop, char Char )
-{
- char * pCur;
- // clear spaces
- for ( pCur = pLine; *pCur != Stop; pCur++ )
- if ( Ntl_ReadCharIsSpace(*pCur) || *pCur == Char )
- *pCur = 0;
- // collect tokens
- Ntl_ReadCollectTokens( vTokens, pLine, pCur );
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns the 1-based number of the line in which the token occurs.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadGetLine( Ntl_ReadMan_t * p, char * pToken )
-{
- char * pLine;
- int i;
- Vec_PtrForEachEntry( char *, p->vLines, pLine, i )
- if ( pToken < pLine )
- return i;
- return -1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Reads the file into a character buffer.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static char * Ntl_ReadLoadFile( char * pFileName )
-{
- FILE * pFile;
- int nFileSize;
- char * pContents;
- pFile = fopen( pFileName, "rb" );
- if ( pFile == NULL )
- {
- fclose( pFile );
- printf( "Ntl_ReadLoadFile(): The file is unavailable (absent or open).\n" );
- return NULL;
- }
- fseek( pFile, 0, SEEK_END );
- nFileSize = ftell( pFile );
- if ( nFileSize == 0 )
- {
- fclose( pFile );
- printf( "Ntl_ReadLoadFile(): The file is empty.\n" );
- return NULL;
- }
- pContents = ABC_ALLOC( char, nFileSize + 10 );
- rewind( pFile );
- fread( pContents, nFileSize, 1, pFile );
- fclose( pFile );
- // finish off the file with the spare .end line
- // some benchmarks suddenly break off without this line
- strcpy( pContents + nFileSize, "\n.end\n" );
- return pContents;
-}
-
-/**Function*************************************************************
-
- Synopsis [Reads the file into a character buffer.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-typedef struct buflist {
- char buf[1<<20];
- int nBuf;
- struct buflist * next;
-} buflist;
-
-static char * Ntl_ReadLoadFileBz2( char * pFileName )
-{
- FILE * pFile;
- int nFileSize = 0;
- char * pContents;
- BZFILE * b;
- int bzError;
- struct buflist * pNext;
- buflist * bufHead = NULL, * buf = NULL;
-
- pFile = fopen( pFileName, "rb" );
- if ( pFile == NULL )
- {
- printf( "Ntl_ReadLoadFileBz2(): The file is unavailable (absent or open).\n" );
- return NULL;
- }
- b = BZ2_bzReadOpen(&bzError,pFile,0,0,NULL,0);
- if (bzError != BZ_OK) {
- printf( "Ntl_ReadLoadFileBz2(): BZ2_bzReadOpen() failed with error %d.\n",bzError );
- return NULL;
- }
- do {
- if (!bufHead)
- buf = bufHead = ABC_ALLOC( buflist, 1 );
- else
- buf = buf->next = ABC_ALLOC( buflist, 1 );
- nFileSize += buf->nBuf = BZ2_bzRead(&bzError,b,buf->buf,1<<20);
- buf->next = NULL;
- } while (bzError == BZ_OK);
- if (bzError == BZ_STREAM_END) {
- // we're okay
- char * p;
- int nBytes = 0;
- BZ2_bzReadClose(&bzError,b);
- p = pContents = ABC_ALLOC( char, nFileSize + 10 );
- buf = bufHead;
- do {
- memcpy(p+nBytes,buf->buf,buf->nBuf);
- nBytes += buf->nBuf;
-// } while((buf = buf->next));
- pNext = buf->next;
- ABC_FREE( buf );
- } while((buf = pNext));
- } else if (bzError == BZ_DATA_ERROR_MAGIC) {
- // not a BZIP2 file
- BZ2_bzReadClose(&bzError,b);
- fseek( pFile, 0, SEEK_END );
- nFileSize = ftell( pFile );
- if ( nFileSize == 0 )
- {
- printf( "Ntl_ReadLoadFileBz2(): The file is empty.\n" );
- return NULL;
- }
- pContents = ABC_ALLOC( char, nFileSize + 10 );
- rewind( pFile );
- fread( pContents, nFileSize, 1, pFile );
- } else {
- // Some other error.
- printf( "Ntl_ReadLoadFileBz2(): Unable to read the compressed BLIF.\n" );
- return NULL;
- }
- fclose( pFile );
- // finish off the file with the spare .end line
- // some benchmarks suddenly break off without this line
- strcpy( pContents + nFileSize, "\n.end\n" );
- return pContents;
-}
-
-/**Function*************************************************************
-
- Synopsis [Reads the file into a character buffer.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static char * Ntl_ReadLoadFileGz( char * pFileName )
-{
- const int READ_BLOCK_SIZE = 100000;
- FILE * pFile;
- char * pContents;
- int amtRead, readBlock, nFileSize = READ_BLOCK_SIZE;
- pFile = (FILE *)gzopen( pFileName, "rb" ); // if pFileName doesn't end in ".gz" then this acts as a passthrough to fopen
- pContents = ABC_ALLOC( char, nFileSize );
- readBlock = 0;
- while ((amtRead = gzread(pFile, pContents + readBlock * READ_BLOCK_SIZE, READ_BLOCK_SIZE)) == READ_BLOCK_SIZE) {
- //printf("%d: read %d bytes\n", readBlock, amtRead);
- nFileSize += READ_BLOCK_SIZE;
- pContents = ABC_REALLOC(char, pContents, nFileSize);
- ++readBlock;
- }
- //printf("%d: read %d bytes\n", readBlock, amtRead);
- assert( amtRead != -1 ); // indicates a zlib error
- nFileSize -= (READ_BLOCK_SIZE - amtRead);
- gzclose(pFile);
- return pContents;
-}
-
-/**Function*************************************************************
-
- Synopsis [Prepares the parsing.]
-
- Description [Performs several preliminary operations:
- - Cuts the file buffer into separate lines.
- - Removes comments and line extenders.
- - Sorts lines by directives.
- - Estimates the number of objects.
- - Allocates room for the objects.
- - Allocates room for the hash table.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static void Ntl_ReadReadPreparse( Ntl_ReadMan_t * p )
-{
- char * pCur, * pPrev;
- int i, fComment = 0;
- // parse the buffer into lines and remove comments
- Vec_PtrPush( p->vLines, p->pBuffer );
- for ( pCur = p->pBuffer; *pCur; pCur++ )
- {
- if ( *pCur == '\n' )
- {
- *pCur = 0;
-// if ( *(pCur-1) == '\r' )
-// *(pCur-1) = 0;
- fComment = 0;
- Vec_PtrPush( p->vLines, pCur + 1 );
- }
- else if ( *pCur == '#' )
- fComment = 1;
- // remove comments
- if ( fComment )
- *pCur = 0;
- }
-
- // unfold the line extensions and sort lines by directive
- Vec_PtrForEachEntry( char *, p->vLines, pCur, i )
- {
- if ( *pCur == 0 )
- continue;
- // find previous non-space character
- for ( pPrev = pCur - 2; pPrev >= p->pBuffer; pPrev-- )
- if ( !Ntl_ReadCharIsSpace(*pPrev) )
- break;
- // if it is the line extender, overwrite it with spaces
- if ( pPrev >= p->pBuffer && *pPrev == '\\' )
- {
- for ( ; *pPrev; pPrev++ )
- *pPrev = ' ';
- *pPrev = ' ';
- continue;
- }
- // skip spaces at the beginning of the line
- while ( Ntl_ReadCharIsSpace(*pCur++) );
- // parse directives
- if ( *(pCur-1) != '.' )
- continue;
- if ( !strncmp(pCur, "names", 5) )
- Vec_PtrPush( p->pLatest->vNames, pCur );
- else if ( !strncmp(pCur, "latch", 5) )
- Vec_PtrPush( p->pLatest->vLatches, pCur );
- else if ( !strncmp(pCur, "inputs", 6) )
- Vec_PtrPush( p->pLatest->vInputs, pCur );
- else if ( !strncmp(pCur, "outputs", 7) )
- Vec_PtrPush( p->pLatest->vOutputs, pCur );
- else if ( !strncmp(pCur, "subckt", 6) )
- Vec_PtrPush( p->pLatest->vSubckts, pCur );
- else if ( !strncmp(pCur, "delay", 5) )
- Vec_PtrPush( p->pLatest->vDelays, pCur );
- else if ( !strncmp(pCur, "input_arrival", 13) ||
- !strncmp(pCur, "input_required", 14) )
- {
- if ( !strncmp(pCur, "input_arrival", 13) )
- p->pLatest->fInArr = 1;
- if ( !strncmp(pCur, "input_required", 14) )
- p->pLatest->fInReq = 1;
- Vec_PtrPush( p->pLatest->vTimeInputs, pCur );
- }
- else if ( !strncmp(pCur, "output_required", 15) ||
- !strncmp(pCur, "output_arrival", 14) )
- {
- if ( !strncmp(pCur, "output_required", 15) )
- p->pLatest->fOutReq = 1;
- if ( !strncmp(pCur, "output_arrival", 14) )
- p->pLatest->fOutArr = 1;
- Vec_PtrPush( p->pLatest->vTimeOutputs, pCur );
- }
- else if ( !strncmp(pCur, "blackbox", 8) )
- p->pLatest->fBlackBox = 1;
- else if ( !strncmp(pCur, "model", 5) )
- {
- p->pLatest = Ntl_ReadModAlloc();
- p->pLatest->pFirst = pCur;
- p->pLatest->pMan = p;
- }
- else if ( !strncmp(pCur, "attrib", 6) )
- {
- if ( p->pLatest->pAttrib != NULL )
- fprintf( stdout, "Line %d: Skipping second .attrib line for this model.\n", Ntl_ReadGetLine(p, pCur) );
- else
- p->pLatest->pAttrib = pCur;
- }
- else if ( !strncmp(pCur, "end", 3) )
- {
- if ( p->pLatest )
- Vec_PtrPush( p->vModels, p->pLatest );
- p->pLatest = NULL;
- }
- else if ( !strncmp(pCur, "exdc", 4) )
- {
- fprintf( stdout, "Line %d: Skipping EXDC network.\n", Ntl_ReadGetLine(p, pCur) );
- break;
- }
- else if ( !strncmp(pCur, "no_merge", 8) )
- {
- p->pLatest->fNoMerge = 1;
- }
- else
- {
- pCur--;
- if ( pCur[strlen(pCur)-1] == '\r' )
- pCur[strlen(pCur)-1] = 0;
- fprintf( stdout, "Line %d: Skipping line \"%s\".\n", Ntl_ReadGetLine(p, pCur), pCur );
- }
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Parses interfaces of the models.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadReadInterfaces( Ntl_ReadMan_t * p )
-{
- Ntl_ReadMod_t * pMod;
- char * pLine;
- int i, k;
- // iterate through the models
- Vec_PtrForEachEntry( Ntl_ReadMod_t *, p->vModels, pMod, i )
- {
- // parse the model
- if ( !Ntl_ReadParseLineModel( pMod, pMod->pFirst ) )
- return 0;
- // parse the model attributes
- if ( pMod->pAttrib && !Ntl_ReadParseLineAttrib( pMod, pMod->pAttrib ) )
- return 0;
- // parse no-merge
- if ( pMod->fNoMerge )
- pMod->pNtk->attrNoMerge = 1;
- // parse the inputs
- Vec_PtrForEachEntry( char *, pMod->vInputs, pLine, k )
- if ( !Ntl_ReadParseLineInputs( pMod, pLine ) )
- return 0;
- // parse the outputs
- Vec_PtrForEachEntry( char *, pMod->vOutputs, pLine, k )
- if ( !Ntl_ReadParseLineOutputs( pMod, pLine ) )
- return 0;
- // parse the delay info
- Ntl_ModelSetPioNumbers( pMod->pNtk );
- Vec_PtrForEachEntry( char *, pMod->vDelays, pLine, k )
- if ( !Ntl_ReadParseLineDelay( pMod, pLine ) )
- return 0;
- Vec_PtrForEachEntry( char *, pMod->vTimeInputs, pLine, k )
- if ( !Ntl_ReadParseLineTimes( pMod, pLine, 0 ) )
- return 0;
- Vec_PtrForEachEntry( char *, pMod->vTimeOutputs, pLine, k )
- if ( !Ntl_ReadParseLineTimes( pMod, pLine, 1 ) )
- return 0;
- // report timing line stats
- if ( pMod->fInArr && pMod->fInReq )
- printf( "Model %s has both .input_arrival and .input_required.\n", pMod->pNtk->pName );
- if ( pMod->fOutArr && pMod->fOutReq )
- printf( "Model %s has both .output_arrival and .output_required.\n", pMod->pNtk->pName );
- if ( !pMod->vDelays && !pMod->fInArr && !pMod->fInReq )
- printf( "Model %s has neither .input_arrival nor .input_required.\n", pMod->pNtk->pName );
- if ( !pMod->vDelays && !pMod->fOutArr && !pMod->fOutReq )
- printf( "Model %s has neither .output_arrival nor .output_required.\n", pMod->pNtk->pName );
- }
- return 1;
-}
-
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static Ntl_Man_t * Ntl_ReadParse( Ntl_ReadMan_t * p )
-{
- Ntl_Man_t * pDesign;
- Ntl_ReadMod_t * pMod;
- char * pLine;
- int i, k;
- // iterate through the models
- Vec_PtrForEachEntry( Ntl_ReadMod_t *, p->vModels, pMod, i )
- {
- // parse the latches
- Vec_PtrForEachEntry( char *, pMod->vLatches, pLine, k )
- if ( !Ntl_ReadParseLineLatch( pMod, pLine ) )
- return NULL;
- // parse the nodes
- Vec_PtrForEachEntry( char *, pMod->vNames, pLine, k )
- if ( !Ntl_ReadParseLineNamesBlif( pMod, pLine ) )
- return NULL;
- // parse the subcircuits
- Vec_PtrForEachEntry( char *, pMod->vSubckts, pLine, k )
- if ( !Ntl_ReadParseLineSubckt( pMod, pLine ) )
- return NULL;
- // finalize the network
- Ntl_ModelFixNonDrivenNets( pMod->pNtk );
- }
- if ( i == 0 )
- return NULL;
- // update the design name
- pMod = (Ntl_ReadMod_t *)Vec_PtrEntry( p->vModels, 0 );
- if ( Ntl_ModelLatchNum(pMod->pNtk) > 0 )
- Ntl_ModelTransformLatches( pMod->pNtk );
- p->pDesign->pName = Ntl_ManStoreName( p->pDesign, pMod->pNtk->pName );
- // return the network
- pDesign = p->pDesign;
- p->pDesign = NULL;
- return pDesign;
-}
-
-/**Function*************************************************************
-
- Synopsis [Parses the model line.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadParseLineModel( Ntl_ReadMod_t * p, char * pLine )
-{
- Vec_Ptr_t * vTokens = p->pMan->vTokens;
- char * pToken;
- Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
- pToken = (char *)Vec_PtrEntry( vTokens, 0 );
- assert( !strcmp(pToken, "model") );
- if ( Vec_PtrSize(vTokens) != 2 )
- {
- sprintf( p->pMan->sError, "Line %d: The number of entries (%d) in .model line is different from two.", Ntl_ReadGetLine(p->pMan, pToken), Vec_PtrSize(vTokens) );
- return 0;
- }
- p->pNtk = Ntl_ModelAlloc( p->pMan->pDesign, (char *)Vec_PtrEntry(vTokens, 1) );
- if ( p->pNtk == NULL )
- {
- sprintf( p->pMan->sError, "Line %d: Model %s already exists.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
- return 0;
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Parses the model line.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadParseLineAttrib( Ntl_ReadMod_t * p, char * pLine )
-{
- Vec_Ptr_t * vTokens = p->pMan->vTokens;
- char * pToken;
- int i;
- Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
- pToken = (char *)Vec_PtrEntry( vTokens, 0 );
- assert( !strncmp(pToken, "attrib", 6) );
- Vec_PtrForEachEntryStart( char *, vTokens, pToken, i, 1 )
- {
- pToken = (char *)Vec_PtrEntry( vTokens, i );
- if ( strcmp( pToken, "white" ) == 0 )
- p->pNtk->attrWhite = 1;
- else if ( strcmp( pToken, "black" ) == 0 )
- p->pNtk->attrWhite = 0;
- else if ( strcmp( pToken, "box" ) == 0 )
- p->pNtk->attrBox = 1;
- else if ( strcmp( pToken, "logic" ) == 0 )
- p->pNtk->attrBox = 0;
- else if ( strcmp( pToken, "comb" ) == 0 )
- p->pNtk->attrComb = 1;
- else if ( strcmp( pToken, "seq" ) == 0 )
- p->pNtk->attrComb = 0;
- else if ( strcmp( pToken, "keep" ) == 0 )
- p->pNtk->attrKeep = 1;
- else if ( strcmp( pToken, "sweep" ) == 0 )
- p->pNtk->attrKeep = 0;
- else
- {
- sprintf( p->pMan->sError, "Line %d: Unknown attribute (%s) in the .attrib line of model %s.", Ntl_ReadGetLine(p->pMan, pToken), pToken, p->pNtk->pName );
- return 0;
- }
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Parses the inputs line.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadParseLineInputs( Ntl_ReadMod_t * p, char * pLine )
-{
- Ntl_Net_t * pNet;
- Ntl_Obj_t * pObj;
- Vec_Ptr_t * vTokens = p->pMan->vTokens;
- char * pToken;
- int i;
- Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
- pToken = (char *)Vec_PtrEntry(vTokens, 0);
- assert( !strcmp(pToken, "inputs") );
- Vec_PtrForEachEntryStart( char *, vTokens, pToken, i, 1 )
- {
- pObj = Ntl_ModelCreatePi( p->pNtk );
- pNet = Ntl_ModelFindOrCreateNet( p->pNtk, pToken );
- if ( !Ntl_ModelSetNetDriver( pObj, pNet ) )
- {
- sprintf( p->pMan->sError, "Line %d: Net %s already has a driver.", Ntl_ReadGetLine(p->pMan, pToken), pNet->pName );
- return 0;
- }
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Parses the outputs line.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadParseLineOutputs( Ntl_ReadMod_t * p, char * pLine )
-{
- Ntl_Net_t * pNet;
- Ntl_Obj_t * pObj;
- Vec_Ptr_t * vTokens = p->pMan->vTokens;
- char * pToken;
- int i;
- Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
- pToken = (char *)Vec_PtrEntry(vTokens, 0);
- assert( !strcmp(pToken, "outputs") );
- Vec_PtrForEachEntryStart( char *, vTokens, pToken, i, 1 )
- {
- pNet = Ntl_ModelFindOrCreateNet( p->pNtk, pToken );
- pObj = Ntl_ModelCreatePo( p->pNtk, pNet );
- pNet->pCopy = pObj;
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Parses the latches line.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadParseLineLatch( Ntl_ReadMod_t * p, char * pLine )
-{
- Vec_Ptr_t * vTokens = p->pMan->vTokens;
- Ntl_Net_t * pNetLi, * pNetLo;
- Ntl_Obj_t * pObj;
- char * pToken, * pNameLi, * pNameLo;
- Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
- pToken = (char *)Vec_PtrEntry(vTokens,0);
- assert( !strcmp(pToken, "latch") );
- if ( Vec_PtrSize(vTokens) < 3 )
- {
- sprintf( p->pMan->sError, "Line %d: Latch does not have input name and output name.", Ntl_ReadGetLine(p->pMan, pToken) );
- return 0;
- }
- // create latch
- pNameLi = (char *)Vec_PtrEntry( vTokens, 1 );
- pNameLo = (char *)Vec_PtrEntry( vTokens, 2 );
- pNetLi = Ntl_ModelFindOrCreateNet( p->pNtk, pNameLi );
- pNetLo = Ntl_ModelFindOrCreateNet( p->pNtk, pNameLo );
- pObj = Ntl_ModelCreateLatch( p->pNtk );
- pObj->pFanio[0] = pNetLi;
- if ( !Ntl_ModelSetNetDriver( pObj, pNetLo ) )
- {
- sprintf( p->pMan->sError, "Line %d: Net %s already has a driver.", Ntl_ReadGetLine(p->pMan, pToken), pNetLo->pName );
- return 0;
- }
- // get initial value
- if ( Vec_PtrSize(vTokens) > 3 )
- pObj->LatchId.regInit = atoi( (char *)Vec_PtrEntry(vTokens,Vec_PtrSize(vTokens)-1) );
- else
- pObj->LatchId.regInit = 2;
- if ( pObj->LatchId.regInit < 0 || pObj->LatchId.regInit > 2 )
- {
- sprintf( p->pMan->sError, "Line %d: Initial state of the latch is incorrect \"%s\".", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens,3) );
- return 0;
- }
- // get the register class
-// if ( Vec_PtrSize(vTokens) == 6 )
- if ( Vec_PtrSize(vTokens) == 5 || Vec_PtrSize(vTokens) == 6 )
- {
- pToken = (char *)Vec_PtrEntry(vTokens,3);
- if ( strcmp( pToken, "fe" ) == 0 )
- pObj->LatchId.regType = 1;
- else if ( strcmp( pToken, "re" ) == 0 )
- pObj->LatchId.regType = 2;
- else if ( strcmp( pToken, "ah" ) == 0 )
- pObj->LatchId.regType = 3;
- else if ( strcmp( pToken, "al" ) == 0 )
- pObj->LatchId.regType = 4;
- else if ( strcmp( pToken, "as" ) == 0 )
- pObj->LatchId.regType = 5;
- else if ( pToken[0] >= '0' && pToken[0] <= '9' )
- pObj->LatchId.regClass = atoi(pToken);
- else
- {
- sprintf( p->pMan->sError, "Line %d: Type/class of the latch is incorrect \"%s\".", Ntl_ReadGetLine(p->pMan, pToken), pToken );
- return 0;
- }
- }
- if ( pObj->LatchId.regClass < 0 || pObj->LatchId.regClass > (1<<24) )
- {
- sprintf( p->pMan->sError, "Line %d: Class of the latch is incorrect \"%s\".", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens,3) );
- return 0;
- }
- // get the clock
-// if ( Vec_PtrSize(vTokens) == 5 || Vec_PtrSize(vTokens) == 6 )
- if ( Vec_PtrSize(vTokens) == 6 )
- {
- pToken = (char *)Vec_PtrEntry(vTokens,Vec_PtrSize(vTokens)-2);
- pNetLi = Ntl_ModelFindOrCreateNet( p->pNtk, pToken );
- pObj->pClock = pNetLi;
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Parses the subckt line.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadParseLineSubckt( Ntl_ReadMod_t * p, char * pLine )
-{
- Vec_Ptr_t * vTokens = p->pMan->vTokens;
- Ntl_Mod_t * pModel;
- Ntl_Obj_t * pBox, * pTerm;
- Ntl_Net_t * pNet;
- char * pToken, * pName, ** ppNames;
- int nEquals, i, k;
-
- // split the line into tokens
- nEquals = Ntl_ReadCountChars( pLine, '=' );
- Ntl_ReadSplitIntoTokensAndClear( vTokens, pLine, '\0', '=' );
- pToken = (char *)Vec_PtrEntry(vTokens,0);
- assert( !strcmp(pToken, "subckt") );
-
- // get the model for this box
- pName = (char *)Vec_PtrEntry(vTokens,1);
- pModel = Ntl_ManFindModel( p->pMan->pDesign, pName );
- if ( pModel == NULL )
- {
- sprintf( p->pMan->sError, "Line %d: Cannot find the model for subcircuit %s.", Ntl_ReadGetLine(p->pMan, pToken), pName );
- return 0;
- }
-/*
- // temporary fix for splitting the .subckt line
- if ( nEquals < Ntl_ModelPiNum(pModel) + Ntl_ModelPoNum(pModel) )
- {
- Vec_Ptr_t * vTokens2 = Vec_PtrAlloc( 10 );
- // get one additional token
- pToken = Vec_PtrEntry( vTokens, Vec_PtrSize(vTokens) - 1 );
- for ( ; *pToken; pToken++ );
- for ( ; *pToken == 0; pToken++ );
- Ntl_ReadSplitIntoTokensAndClear( vTokens2, pToken, '\0', '=' );
-// assert( Vec_PtrSize( vTokens2 ) == 2 );
- Vec_PtrForEachEntry( char *, vTokens2, pToken, i )
- Vec_PtrPush( vTokens, pToken );
- nEquals += Vec_PtrSize(vTokens2)/2;
- Vec_PtrFree( vTokens2 );
- }
-*/
- // check if the number of tokens is correct
- if ( nEquals != Ntl_ModelPiNum(pModel) + Ntl_ModelPoNum(pModel) )
- {
- sprintf( p->pMan->sError, "Line %d: The number of ports (%d) in .subckt %s differs from the sum of PIs and POs of the model (%d).",
- Ntl_ReadGetLine(p->pMan, pToken), nEquals, pName, Ntl_ModelPiNum(pModel) + Ntl_ModelPoNum(pModel) );
- return 0;
- }
-
- // get the names
- ppNames = (char **)Vec_PtrArray(vTokens) + 2;
-
- // create the box with these terminals
- pBox = Ntl_ModelCreateBox( p->pNtk, Ntl_ModelPiNum(pModel), Ntl_ModelPoNum(pModel) );
- pBox->pImplem = pModel;
- Ntl_ModelForEachPi( pModel, pTerm, i )
- {
- // find this terminal among the formal inputs of the subcircuit
- pName = Ntl_ObjFanout0(pTerm)->pName;
- for ( k = 0; k < nEquals; k++ )
- if ( !strcmp( ppNames[2*k], pName ) )
- break;
- if ( k == nEquals )
- {
- sprintf( p->pMan->sError, "Line %d: Cannot find PI \"%s\" of the model \"%s\" as a formal input of the subcircuit.",
- Ntl_ReadGetLine(p->pMan, pToken), pName, pModel->pName );
- return 0;
- }
- // create the BI with the actual name
- pNet = Ntl_ModelFindOrCreateNet( p->pNtk, ppNames[2*k+1] );
- Ntl_ObjSetFanin( pBox, pNet, i );
- }
- Ntl_ModelForEachPo( pModel, pTerm, i )
- {
- // find this terminal among the formal outputs of the subcircuit
- pName = Ntl_ObjFanin0(pTerm)->pName;
- for ( k = 0; k < nEquals; k++ )
- if ( !strcmp( ppNames[2*k], pName ) )
- break;
- if ( k == nEquals )
- {
- sprintf( p->pMan->sError, "Line %d: Cannot find PO \"%s\" of the model \"%s\" as a formal output of the subcircuit.",
- Ntl_ReadGetLine(p->pMan, pToken), pName, pModel->pName );
- return 0;
- }
- // create the BI with the actual name
- pNet = Ntl_ModelFindOrCreateNet( p->pNtk, ppNames[2*k+1] );
- Ntl_ObjSetFanout( pBox, pNet, i );
- }
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Parses the subckt line.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadParseLineDelay( Ntl_ReadMod_t * p, char * pLine )
-{
- Vec_Ptr_t * vTokens = p->pMan->vTokens;
- int RetValue1, RetValue2, Number1, Number2, Temp;
- char * pToken, * pTokenNum;
- float Delay;
- assert( sizeof(float) == sizeof(int) );
- Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
- pToken = (char *)Vec_PtrEntry(vTokens,0);
- assert( !strcmp(pToken, "delay") );
- if ( Vec_PtrSize(vTokens) < 2 && Vec_PtrSize(vTokens) > 4 )
- {
- sprintf( p->pMan->sError, "Line %d: Delay line does not have a valid number of parameters (1, 2, or 3).", Ntl_ReadGetLine(p->pMan, pToken) );
- return 0;
- }
- // find the delay number
- pTokenNum = (char *)Vec_PtrEntryLast(vTokens);
- Delay = atof( pTokenNum );
- if ( Delay == 0.0 && pTokenNum[0] != '0' )
- {
- sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntryLast(vTokens) );
- return 0;
- }
- // find the PI/PO numbers
- RetValue1 = 0; Number1 = -1;
- if ( Vec_PtrSize(vTokens) > 2 )
- {
- RetValue1 = Ntl_ModelFindPioNumber( p->pNtk, 0, 0, (char *)Vec_PtrEntry(vTokens, 1), &Number1 );
- if ( RetValue1 == 0 )
- {
- sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
- return 0;
- }
- }
- RetValue2 = 0; Number2 = -1;
- if ( Vec_PtrSize(vTokens) > 3 )
- {
- RetValue2 = Ntl_ModelFindPioNumber( p->pNtk, 0, 0, (char *)Vec_PtrEntry(vTokens, 2), &Number2 );
- if ( RetValue2 == 0 )
- {
- sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 2) );
- return 0;
- }
- }
- if ( RetValue1 == RetValue2 && RetValue1 )
- {
- sprintf( p->pMan->sError, "Line %d: Both signals \"%s\" and \"%s\" listed appear to be PIs or POs.",
- Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1), (char*)Vec_PtrEntry(vTokens, 2) );
- return 0;
- }
- if ( RetValue2 < RetValue1 )
- {
- Temp = RetValue2; RetValue2 = RetValue1; RetValue1 = Temp;
- Temp = Number2; Number2 = Number1; Number1 = Temp;
- }
- assert( RetValue1 == 0 || RetValue1 == -1 );
- assert( RetValue2 == 0 || RetValue2 == 1 );
- // store the values
- if ( p->pNtk->vDelays == NULL )
- p->pNtk->vDelays = Vec_IntAlloc( 100 );
- Vec_IntPush( p->pNtk->vDelays, Number1 );
- Vec_IntPush( p->pNtk->vDelays, Number2 );
- Vec_IntPush( p->pNtk->vDelays, Aig_Float2Int(Delay) );
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Parses the subckt line.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadParseLineTimes( Ntl_ReadMod_t * p, char * pLine, int fOutput )
-{
- Vec_Ptr_t * vTokens = p->pMan->vTokens;
- int RetValue, Number = -1;
- char * pToken, * pTokenNum;
- float Delay;
- assert( sizeof(float) == sizeof(int) );
- Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
- pToken = (char *)Vec_PtrEntry(vTokens,0);
- if ( fOutput )
- assert( !strncmp(pToken, "output_", 7) );
- else
- assert( !strncmp(pToken, "input_", 6) );
- if ( Vec_PtrSize(vTokens) != 2 && Vec_PtrSize(vTokens) != 3 )
- {
- sprintf( p->pMan->sError, "Line %d: Delay line does not have a valid number of parameters (2 or 3).", Ntl_ReadGetLine(p->pMan, pToken) );
- return 0;
- }
- // find the delay number
- pTokenNum = (char *)Vec_PtrEntryLast(vTokens);
- if ( !strcmp( pTokenNum, "-inf" ) )
- Delay = -TIM_ETERNITY;
- else if ( !strcmp( pTokenNum, "inf" ) )
- Delay = TIM_ETERNITY;
- else
- Delay = atof( pTokenNum );
- if ( Delay == 0.0 && pTokenNum[0] != '0' )
- {
- sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntryLast(vTokens) );
- return 0;
- }
- // find the PI/PO numbers
- if ( fOutput )
- {
- if ( Vec_PtrSize(vTokens) == 3 )
- {
- RetValue = Ntl_ModelFindPioNumber( p->pNtk, 0, 1, (char *)Vec_PtrEntry(vTokens, 1), &Number );
- if ( RetValue == 0 )
- {
- sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among POs.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
- return 0;
- }
- }
- // store the values
- if ( p->pNtk->vTimeOutputs == NULL )
- p->pNtk->vTimeOutputs = Vec_IntAlloc( 100 );
- Vec_IntPush( p->pNtk->vTimeOutputs, Number );
- Vec_IntPush( p->pNtk->vTimeOutputs, Aig_Float2Int(Delay) );
- }
- else
- {
- if ( Vec_PtrSize(vTokens) == 3 )
- {
- RetValue = Ntl_ModelFindPioNumber( p->pNtk, 1, 0, (char *)Vec_PtrEntry(vTokens, 1), &Number );
- if ( RetValue == 0 )
- {
- sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
- return 0;
- }
- }
- // store the values
- if ( p->pNtk->vTimeInputs == NULL )
- p->pNtk->vTimeInputs = Vec_IntAlloc( 100 );
- Vec_IntPush( p->pNtk->vTimeInputs, Number );
- Vec_IntPush( p->pNtk->vTimeInputs, Aig_Float2Int(Delay) );
- }
- return 1;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Constructs the SOP cover from the file parsing info.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static char * Ntl_ReadParseTableBlif( Ntl_ReadMod_t * p, char * pTable, int nFanins )
-{
- Vec_Ptr_t * vTokens = p->pMan->vTokens;
- Vec_Str_t * vFunc = p->pMan->vFunc;
- char * pProduct, * pOutput;
- int i, Polarity = -1;
-
-
- p->pMan->nTablesRead++;
- // get the tokens
- Ntl_ReadSplitIntoTokens( vTokens, pTable, '.' );
- if ( Vec_PtrSize(vTokens) == 0 )
- return Ntl_ManStoreSop( p->pMan->pDesign->pMemSops, " 0\n" );
- if ( Vec_PtrSize(vTokens) == 1 )
- {
- pOutput = (char *)Vec_PtrEntry( vTokens, 0 );
- if ( *pOutput == '\"' )
- return Ntl_ManStoreSop( p->pMan->pDesign->pMemSops, pOutput );
- if ( ((pOutput[0] - '0') & 0x8E) || pOutput[1] )
- {
- sprintf( p->pMan->sError, "Line %d: Constant table has wrong output value \"%s\".", Ntl_ReadGetLine(p->pMan, pOutput), pOutput );
- return NULL;
- }
- return Ntl_ManStoreSop( p->pMan->pDesign->pMemSops, (pOutput[0] == '0') ? " 0\n" : " 1\n" );
- }
- pProduct = (char *)Vec_PtrEntry( vTokens, 0 );
- if ( Vec_PtrSize(vTokens) % 2 == 1 )
- {
- sprintf( p->pMan->sError, "Line %d: Table has odd number of tokens (%d).", Ntl_ReadGetLine(p->pMan, pProduct), Vec_PtrSize(vTokens) );
- return NULL;
- }
- // parse the table
- Vec_StrClear( vFunc );
- for ( i = 0; i < Vec_PtrSize(vTokens)/2; i++ )
- {
- pProduct = (char *)Vec_PtrEntry( vTokens, 2*i + 0 );
- pOutput = (char *)Vec_PtrEntry( vTokens, 2*i + 1 );
- if ( strlen(pProduct) != (unsigned)nFanins )
- {
- sprintf( p->pMan->sError, "Line %d: Cube \"%s\" has size different from the fanin count (%d).", Ntl_ReadGetLine(p->pMan, pProduct), pProduct, nFanins );
- return NULL;
- }
- if ( ((pOutput[0] - '0') & 0x8E) || pOutput[1] )
- {
- sprintf( p->pMan->sError, "Line %d: Output value \"%s\" is incorrect.", Ntl_ReadGetLine(p->pMan, pProduct), pOutput );
- return NULL;
- }
- if ( Polarity == -1 )
- Polarity = pOutput[0] - '0';
- else if ( Polarity != pOutput[0] - '0' )
- {
- sprintf( p->pMan->sError, "Line %d: Output value \"%s\" differs from the value in the first line of the table (%d).", Ntl_ReadGetLine(p->pMan, pProduct), pOutput, Polarity );
- return NULL;
- }
- // parse one product
- Vec_StrPrintStr( vFunc, pProduct );
- Vec_StrPush( vFunc, ' ' );
- Vec_StrPush( vFunc, pOutput[0] );
- Vec_StrPush( vFunc, '\n' );
- }
- Vec_StrPush( vFunc, '\0' );
- return Vec_StrArray( vFunc );
-}
-
-/**Function*************************************************************
-
- Synopsis [Parses the nodes line.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static int Ntl_ReadParseLineNamesBlif( Ntl_ReadMod_t * p, char * pLine )
-{
- Vec_Ptr_t * vTokens = p->pMan->vTokens;
- Ntl_Obj_t * pNode;
- Ntl_Net_t * pNetOut, * pNetIn;
- char * pNameOut, * pNameIn;
- int i;
- Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
- // parse the mapped node
-// if ( !strcmp(Vec_PtrEntry(vTokens,0), "gate") )
-// return Ntl_ReadParseLineGateBlif( p, vTokens );
- // parse the regular name line
- assert( !strcmp((char *)Vec_PtrEntry(vTokens,0), "names") );
- pNameOut = (char *)Vec_PtrEntryLast( vTokens );
- pNetOut = Ntl_ModelFindOrCreateNet( p->pNtk, pNameOut );
- // create fanins
- pNode = Ntl_ModelCreateNode( p->pNtk, Vec_PtrSize(vTokens) - 2 );
- for ( i = 0; i < Vec_PtrSize(vTokens) - 2; i++ )
- {
- pNameIn = (char *)Vec_PtrEntry(vTokens, i+1);
- pNetIn = Ntl_ModelFindOrCreateNet( p->pNtk, pNameIn );
- Ntl_ObjSetFanin( pNode, pNetIn, i );
- }
- if ( !Ntl_ModelSetNetDriver( pNode, pNetOut ) )
- {
- sprintf( p->pMan->sError, "Line %d: Signal \"%s\" is defined more than once.", Ntl_ReadGetLine(p->pMan, pNameOut), pNameOut );
- return 0;
- }
- // parse the table of this node
- pNode->pSop = Ntl_ReadParseTableBlif( p, pNameOut + strlen(pNameOut), pNode->nFanins );
- if ( pNode->pSop == NULL )
- return 0;
- pNode->pSop = Ntl_ManStoreSop( p->pNtk->pMan->pMemSops, pNode->pSop );
- return 1;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlSweep.c b/src/aig/ntl/ntlSweep.c
deleted file mode 100644
index 29e40f30..00000000
--- a/src/aig/ntl/ntlSweep.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlSweep.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Performs structural sweep of the netlist.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlSweep.c,v 1.1 2008/10/10 14:09:30 mjarvin Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Detects logic that does not fanout into POs.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManSweepMark_rec( Ntl_Man_t * p, Ntl_Obj_t * pObj )
-{
- Ntl_Net_t * pNet;
- int i;
- if ( pObj->fMark )
- return;
- pObj->fMark = 1;
- Ntl_ObjForEachFanin( pObj, pNet, i )
- Ntl_ManSweepMark_rec( p, pNet->pDriver );
-}
-
-/**Function*************************************************************
-
- Synopsis [Detects logic that does not fanout into POs.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManSweepMark( Ntl_Man_t * p )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- int i;
- // get the root model
- pRoot = Ntl_ManRootModel( p );
- // clear net visited flags
- Ntl_ModelForEachObj( pRoot, pObj, i )
- assert( pObj->fMark == 0 );
- // label the primary inputs
- Ntl_ModelForEachPi( pRoot, pObj, i )
- pObj->fMark = 1;
- // start from the primary outputs
- Ntl_ModelForEachPo( pRoot, pObj, i )
- Ntl_ManSweepMark_rec( p, pObj );
- // start from the persistant boxes
- Ntl_ModelForEachBox( pRoot, pObj, i )
- if ( pObj->pImplem->attrKeep )
- Ntl_ManSweepMark_rec( p, pObj );
-}
-
-/**Function*************************************************************
-
- Synopsis [Removes logic that does not fanout into POs.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManSweep( Ntl_Man_t * p, int fVerbose )
-{
- int nObjsOld[NTL_OBJ_VOID];
- Ntl_Mod_t * pRoot, * pMod;
- Ntl_Net_t * pNet;
- Ntl_Obj_t * pObj;
- int i, k, nNetsOld;
- int ModelCounter = 0, Counter = 0;
-
- // remember the number of objects
- pRoot = Ntl_ManRootModel( p );
- for ( i = 0; i < NTL_OBJ_VOID; i++ )
- nObjsOld[i] = pRoot->nObjs[i];
- nNetsOld = Ntl_ModelCountNets(pRoot);
-
- // mark the nets that do not fanout into POs
- Ntl_ManSweepMark( p );
-
- // count how many boxes of each type are swept away
- if ( fVerbose )
- {
- Ntl_ManForEachModel( p, pMod, i )
- pMod->nUsed = pMod->nRems = 0;
- Ntl_ModelForEachObj( pRoot, pObj, i )
- if ( Ntl_ObjIsBox(pObj) && pObj->pImplem )
- {
- pObj->pImplem->nUsed++;
- if ( !pObj->fMark )
- {
- if ( pObj->pImplem->nRems++ == 0 )
- ModelCounter++;
- }
- }
- }
-
- // remove the useless objects and their nets
- Ntl_ModelForEachObj( pRoot, pObj, i )
- {
- if ( pObj->fMark )
- {
- pObj->fMark = 0;
- continue;
- }
- // remove the fanout nets
- Ntl_ObjForEachFanout( pObj, pNet, k )
- if ( pNet != NULL && pNet->pName[0] != 0 )
- {
- Ntl_ModelDeleteNet( pRoot, pNet );
- Vec_PtrWriteEntry( pRoot->vNets, pNet->NetId, NULL );
- }
- // remove the object
- if ( Ntl_ObjIsNode(pObj) && Ntl_ObjFaninNum(pObj) == 1 )
- pRoot->nObjs[NTL_OBJ_LUT1]--;
- else
- pRoot->nObjs[pObj->Type]--;
- Vec_PtrWriteEntry( pRoot->vObjs, pObj->Id, NULL );
- pObj->Type = NTL_OBJ_NONE;
- Counter++;
- }
-
-
-
- // print detailed statistics of sweeping
- if ( fVerbose && Counter > 0)
- {
- int numLutBox = 0;
-
- printf( "Swept away:" );
- printf( " Node = %d (%4.1f %%)",
- nObjsOld[NTL_OBJ_NODE] - pRoot->nObjs[NTL_OBJ_NODE],
- !nObjsOld[NTL_OBJ_NODE]? 0.0: 100.0 * (nObjsOld[NTL_OBJ_NODE] - pRoot->nObjs[NTL_OBJ_NODE]) / nObjsOld[NTL_OBJ_NODE] );
- printf( " Buf/Inv = %d (%4.1f %%)",
- nObjsOld[NTL_OBJ_LUT1] - pRoot->nObjs[NTL_OBJ_LUT1],
- !nObjsOld[NTL_OBJ_LUT1]? 0.0: 100.0 * (nObjsOld[NTL_OBJ_LUT1] - pRoot->nObjs[NTL_OBJ_LUT1]) / nObjsOld[NTL_OBJ_LUT1] );
- printf( " Lat = %d (%4.1f %%)",
- nObjsOld[NTL_OBJ_LATCH] - pRoot->nObjs[NTL_OBJ_LATCH],
- !nObjsOld[NTL_OBJ_LATCH]? 0.0: 100.0 * (nObjsOld[NTL_OBJ_LATCH] - pRoot->nObjs[NTL_OBJ_LATCH]) / nObjsOld[NTL_OBJ_LATCH] );
- printf( " Box = %d (%4.1f %%)",
- nObjsOld[NTL_OBJ_BOX] - pRoot->nObjs[NTL_OBJ_BOX],
- !nObjsOld[NTL_OBJ_BOX]? 0.0: 100.0 * (nObjsOld[NTL_OBJ_BOX] - pRoot->nObjs[NTL_OBJ_BOX]) / nObjsOld[NTL_OBJ_BOX] );
- printf( "\n" );
- if ( ModelCounter )
- {
- printf( "Sweep removed %d boxed of %d types (out of %d types):\n",
- nObjsOld[NTL_OBJ_BOX] - pRoot->nObjs[NTL_OBJ_BOX], ModelCounter, Vec_PtrSize(p->vModels)-1 );
- Ntl_ManForEachModel( p, pMod, i )
- {
- if ( i && (pMod->nRems + pMod->nUsed-pMod->nRems) > 0)
- {
-
- if (strncmp(pMod->pName, "LUT", 3) != 0)
- {
- //printf( "( M%d: %s, S=%d, L=%d ) ", i, pMod->pName, pMod->nRems, pMod->nUsed-pMod->nRems );
- //printf( "Model %3d : %-40s Swept = %5d. Left = %5d.\n", i, pMod->pName, pMod->nRems, pMod->nUsed-pMod->nRems );
- } else
- {
- numLutBox++;
- }
- }
- }
-// printf("\nLUTboxType =%d\n", numLutBox);
- }
- }
- if ( !Ntl_ManCheck( p ) )
- printf( "Ntl_ManSweep: The check has failed for design %s.\n", p->pName );
- return Counter;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlTable.c b/src/aig/ntl/ntlTable.c
deleted file mode 100644
index 23207081..00000000
--- a/src/aig/ntl/ntlTable.c
+++ /dev/null
@@ -1,554 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlTable.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Name table manipulation.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlTable.c,v 1.3 2008/10/24 14:18:44 mjarvin Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-// hashing for strings
-static unsigned Ntl_HashString( const char * pName, int TableSize )
-{
- static int s_Primes[10] = {
- 1291, 1699, 2357, 4177, 5147,
- 5647, 6343, 7103, 7873, 8147
- };
- unsigned i, Key = 0;
- for ( i = 0; pName[i] != '\0'; i++ )
- Key ^= s_Primes[i%10]*pName[i]*pName[i];
- return Key % TableSize;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Allocates memory for the net.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Net_t * Ntl_ModelCreateNet( Ntl_Mod_t * p, const char * pName )
-{
- Ntl_Net_t * pNet;
- int nSize = sizeof(Ntl_Net_t) + strlen(pName) + 1;
- nSize = (nSize / sizeof(char*) + ((nSize % sizeof(char*)) > 0)) * sizeof(char*); // added by Saurabh on Sep 3, 2009
- pNet = (Ntl_Net_t *)Aig_MmFlexEntryFetch( p->pMan->pMemObjs, nSize );
- memset( pNet, 0, sizeof(Ntl_Net_t) );
- strcpy( pNet->pName, pName );
- pNet->NetId = Vec_PtrSize( p->vNets );
- Vec_PtrPush( p->vNets, pNet );
- return pNet;
-}
-
-/**Function*************************************************************
-
- Synopsis [Allocates memory for the net.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-char * Ntl_ModelCreateNetName( Ntl_Mod_t * p, const char * pName, int Num )
-{
- char * pResult;
- char Buffer[1000];
- assert( strlen(pName) < 900 );
- do {
- sprintf( Buffer, "%s%d", pName, Num++ );
- } while ( Ntl_ModelFindNet( p, Buffer ) != NULL );
- pResult = (char *)Aig_MmFlexEntryFetch( p->pMan->pMemObjs, strlen(Buffer) + 1 );
- strcpy( pResult, Buffer );
- return pResult;
-}
-
-/**Function*************************************************************
-
- Synopsis [Resizes the table.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ModelTableResize( Ntl_Mod_t * p )
-{
- Ntl_Net_t ** pTableNew, ** ppSpot, * pEntry, * pEntry2;
- int nTableSizeNew, Counter, e, clk;
-clk = clock();
- // get the new table size
- nTableSizeNew = Aig_PrimeCudd( 3 * p->nTableSize );
- // allocate a new array
- pTableNew = ABC_ALLOC( Ntl_Net_t *, nTableSizeNew );
- memset( pTableNew, 0, sizeof(Ntl_Net_t *) * nTableSizeNew );
- // rehash entries
- Counter = 0;
- for ( e = 0; e < p->nTableSize; e++ )
- for ( pEntry = p->pTable[e], pEntry2 = pEntry? pEntry->pNext : NULL;
- pEntry; pEntry = pEntry2, pEntry2 = pEntry? pEntry->pNext : NULL )
- {
- ppSpot = pTableNew + Ntl_HashString( pEntry->pName, nTableSizeNew );
- pEntry->pNext = *ppSpot;
- *ppSpot = pEntry;
- Counter++;
- }
- assert( Counter == p->nEntries );
-// printf( "Increasing the structural table size from %6d to %6d. ", p->nTableSize, nTableSizeNew );
-// ABC_PRT( "Time", clock() - clk );
- // replace the table and the parameters
- ABC_FREE( p->pTable );
- p->pTable = pTableNew;
- p->nTableSize = nTableSizeNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Finds net.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Net_t * Ntl_ModelFindNet( Ntl_Mod_t * p, const char * pName )
-{
- Ntl_Net_t * pEnt;
- unsigned Key = Ntl_HashString( pName, p->nTableSize );
- for ( pEnt = p->pTable[Key]; pEnt; pEnt = pEnt->pNext )
- if ( !strcmp( pEnt->pName, pName ) )
- return pEnt;
- return NULL;
-}
-
-/**Function*************************************************************
-
- Synopsis [Deletes net from the hash table.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ModelDeleteNet( Ntl_Mod_t * p, Ntl_Net_t * pNet )
-{
- Ntl_Net_t * pEnt, * pPrev;
- unsigned Key = Ntl_HashString( pNet->pName, p->nTableSize );
- for ( pPrev = NULL, pEnt = p->pTable[Key]; pEnt; pPrev = pEnt, pEnt = pEnt->pNext )
- if ( pEnt == pNet )
- break;
- if ( pEnt == NULL )
- {
- printf( "Ntl_ModelDeleteNet(): Net to be deleted is not found in the hash table.\n" );
- return;
- }
- if ( pPrev == NULL )
- p->pTable[Key] = pEnt->pNext;
- else
- pPrev->pNext = pEnt->pNext;
- p->nEntries--;
-}
-
-/**Function*************************************************************
-
- Synopsis [Inserts net into the hash table.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ModelInsertNet( Ntl_Mod_t * p, Ntl_Net_t * pNet )
-{
- unsigned Key = Ntl_HashString( pNet->pName, p->nTableSize );
- assert( Ntl_ModelFindNet( p, pNet->pName ) == NULL );
- pNet->pNext = p->pTable[Key];
- p->pTable[Key] = pNet;
-}
-
-/**Function*************************************************************
-
- Synopsis [Finds or creates the net.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Net_t * Ntl_ModelFindOrCreateNet( Ntl_Mod_t * p, const char * pName )
-{
- Ntl_Net_t * pEnt;
- unsigned Key = Ntl_HashString( pName, p->nTableSize );
- for ( pEnt = p->pTable[Key]; pEnt; pEnt = pEnt->pNext )
- if ( !strcmp( pEnt->pName, pName ) )
- return pEnt;
- pEnt = Ntl_ModelCreateNet( p, pName );
- pEnt->pNext = p->pTable[Key];
- p->pTable[Key] = pEnt;
- if ( ++p->nEntries > 2 * p->nTableSize )
- Ntl_ModelTableResize( p );
- return pEnt;
-}
-
-/**Function*************************************************************
-
- Synopsis [Creates new net.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Net_t * Ntl_ModelDontFindCreateNet( Ntl_Mod_t * p, const char * pName )
-{
- Ntl_Net_t * pEnt;
- unsigned Key = Ntl_HashString( pName, p->nTableSize );
- pEnt = Ntl_ModelCreateNet( p, pName );
- pEnt->pNext = p->pTable[Key];
- p->pTable[Key] = pEnt;
- if ( ++p->nEntries > 2 * p->nTableSize )
- Ntl_ModelTableResize( p );
- return pEnt;
-}
-
-/**Function*************************************************************
-
- Synopsis [Assigns numbers to PIs and POs.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ModelSetPioNumbers( Ntl_Mod_t * p )
-{
- Ntl_Obj_t * pObj;
- int i;
- Ntl_ModelForEachPi( p, pObj, i )
- pObj->iTemp = i;
- Ntl_ModelForEachPo( p, pObj, i )
- pObj->iTemp = i;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns -1, 0, +1 (when it is PI, not found, or PO).]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelFindPioNumber_old( Ntl_Mod_t * p, int fPiOnly, int fPoOnly, const char * pName, int * pNumber )
-{
- Ntl_Net_t * pNet;
- Ntl_Obj_t * pObj;
- int i;
- *pNumber = -1;
- pNet = Ntl_ModelFindNet( p, pName );
- if ( pNet == NULL )
- return 0;
- if ( fPiOnly )
- {
- Ntl_ModelForEachPi( p, pObj, i )
- {
- if ( Ntl_ObjFanout0(pObj) == pNet )
- {
- *pNumber = i;
- return -1;
- }
- }
- return 0;
- }
- if ( fPoOnly )
- {
- Ntl_ModelForEachPo( p, pObj, i )
- {
- if ( Ntl_ObjFanin0(pObj) == pNet )
- {
- *pNumber = i;
- return 1;
- }
- }
- return 0;
- }
- Ntl_ModelForEachPo( p, pObj, i )
- {
- if ( Ntl_ObjFanin0(pObj) == pNet )
- {
- *pNumber = i;
- return 1;
- }
- }
- Ntl_ModelForEachPi( p, pObj, i )
- {
- if ( Ntl_ObjFanout0(pObj) == pNet )
- {
- *pNumber = i;
- return -1;
- }
- }
- return 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns -1, 0, +1 (when it is PI, not found, or PO).]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelFindPioNumber( Ntl_Mod_t * p, int fPiOnly, int fPoOnly, const char * pName, int * pNumber )
-{
- Ntl_Net_t * pNet;
- Ntl_Obj_t * pTerm;
- *pNumber = -1;
- pNet = Ntl_ModelFindNet( p, pName );
- if ( pNet == NULL )
- return 0;
- if ( fPiOnly )
- {
- pTerm = pNet->pDriver;
- if ( pTerm && Ntl_ObjIsPi(pTerm) )
- {
- *pNumber = pTerm->iTemp;
- return -1;
- }
- return 0;
- }
- if ( fPoOnly )
- {
- pTerm = (Ntl_Obj_t *)pNet->pCopy;
- if ( pTerm && Ntl_ObjIsPo(pTerm) )
- {
- *pNumber = pTerm->iTemp;
- return 1;
- }
- return 0;
- }
- pTerm = (Ntl_Obj_t *)pNet->pCopy;
- if ( pTerm && Ntl_ObjIsPo(pTerm) )
- {
- *pNumber = pTerm->iTemp;
- return 1;
- }
- pTerm = pNet->pDriver;
- if ( pTerm && Ntl_ObjIsPi(pTerm) )
- {
- *pNumber = pTerm->iTemp;
- return -1;
- }
- return 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Sets the driver of the net.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelSetNetDriver( Ntl_Obj_t * pObj, Ntl_Net_t * pNet )
-{
- if ( pObj->pFanio[pObj->nFanins] != NULL )
- return 0;
- if ( pNet->pDriver != NULL )
- return 0;
- pObj->pFanio[pObj->nFanins] = pNet;
- pNet->pDriver = pObj;
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Clears the driver of the net.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelClearNetDriver( Ntl_Obj_t * pObj, Ntl_Net_t * pNet )
-{
- if ( pObj->pFanio[pObj->nFanins] == NULL )
- return 0;
- if ( pNet->pDriver == NULL )
- return 0;
- pObj->pFanio[pObj->nFanins] = NULL;
- pNet->pDriver = NULL;
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of nets.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelCountNets( Ntl_Mod_t * p )
-{
- Ntl_Net_t * pNet;
- int i, Counter = 0;
- Ntl_ModelForEachNet( p, pNet, i )
- Counter++;
- return Counter;
-}
-
-
-
-
-/**Function*************************************************************
-
- Synopsis [Resizes the table.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManModelTableResize( Ntl_Man_t * p )
-{
- Ntl_Mod_t ** pModTableNew, ** ppSpot, * pEntry, * pEntry2;
- int nModTableSizeNew, Counter, e, clk;
-clk = clock();
- // get the new table size
- nModTableSizeNew = Aig_PrimeCudd( 3 * p->nModTableSize );
- // allocate a new array
- pModTableNew = ABC_ALLOC( Ntl_Mod_t *, nModTableSizeNew );
- memset( pModTableNew, 0, sizeof(Ntl_Mod_t *) * nModTableSizeNew );
- // rehash entries
- Counter = 0;
- for ( e = 0; e < p->nModTableSize; e++ )
- for ( pEntry = p->pModTable[e], pEntry2 = pEntry? pEntry->pNext : NULL;
- pEntry; pEntry = pEntry2, pEntry2 = pEntry? pEntry->pNext : NULL )
- {
- ppSpot = pModTableNew + Ntl_HashString( pEntry->pName, nModTableSizeNew );
- pEntry->pNext = *ppSpot;
- *ppSpot = pEntry;
- Counter++;
- }
- assert( Counter == p->nModEntries );
-// printf( "Increasing the structural table size from %6d to %6d. ", p->nTableSize, nTableSizeNew );
-// ABC_PRT( "Time", clock() - clk );
- // replace the table and the parameters
- ABC_FREE( p->pModTable );
- p->pModTable = pModTableNew;
- p->nModTableSize = nModTableSizeNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Finds or creates the net.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManAddModel( Ntl_Man_t * p, Ntl_Mod_t * pModel )
-{
- Ntl_Mod_t * pEnt;
- unsigned Key = Ntl_HashString( pModel->pName, p->nModTableSize );
- for ( pEnt = p->pModTable[Key]; pEnt; pEnt = pEnt->pNext )
- if ( !strcmp( pEnt->pName, pModel->pName ) )
- return 0;
- pModel->pNext = p->pModTable[Key];
- p->pModTable[Key] = pModel;
- if ( ++p->nModEntries > 2 * p->nModTableSize )
- Ntl_ManModelTableResize( p );
- Vec_PtrPush( p->vModels, pModel );
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Finds or creates the net.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ManFindModel( Ntl_Man_t * p, const char * pName )
-{
- Ntl_Mod_t * pEnt;
- unsigned Key = Ntl_HashString( pName, p->nModTableSize );
- for ( pEnt = p->pModTable[Key]; pEnt; pEnt = pEnt->pNext )
- if ( !strcmp( pEnt->pName, pName ) )
- return pEnt;
- return NULL;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlTime.c b/src/aig/ntl/ntlTime.c
deleted file mode 100644
index 7a531482..00000000
--- a/src/aig/ntl/ntlTime.c
+++ /dev/null
@@ -1,245 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlTime.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Creates timing manager.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlTime.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-float * Ntl_ManCreateDelayTable( Vec_Int_t * vDelays, int nIns, int nOuts )
-{
- float * pDelayTable, Delay;
- int iIn, iOut, i, k;
- assert( Vec_IntSize(vDelays) % 3 == 0 );
- pDelayTable = ABC_ALLOC( float, nIns * nOuts );
- memset( pDelayTable, 0, sizeof(float) * nIns * nOuts );
- Vec_IntForEachEntry( vDelays, iIn, i )
- {
- iOut = Vec_IntEntry(vDelays, ++i);
- Delay = Aig_Int2Float( Vec_IntEntry(vDelays, ++i) );
- if ( iIn == -1 && iOut == -1 )
- for ( k = 0; k < nIns * nOuts; k++ )
- pDelayTable[k] = Delay;
- else if ( iIn == -1 )
- for ( k = 0; k < nIns; k++ )
- pDelayTable[iOut * nIns + k] = Delay;
- else if ( iOut == -1 )
- for ( k = 0; k < nOuts; k++ )
- pDelayTable[k * nIns + iIn] = Delay;
- else
- pDelayTable[iOut * nIns + iIn] = Delay;
- }
- return pDelayTable;
-}
-
-/**Function*************************************************************
-
- Synopsis [Records the arrival times for the map leaves.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManUnpackLeafTiming( Ntl_Man_t * p, Tim_Man_t * pMan )
-{
- Vec_Int_t * vTimes;
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet;
- float dTime;
- int i, k, v, Entry, Counter;
- // clean the place
- pRoot = Ntl_ManRootModel( p );
- Ntl_ModelForEachMapLeaf( pRoot, pObj, i )
- Ntl_ObjForEachFanout( pObj, pNet, k )
- pNet->dTemp = 0;
- // store the PI timing
- vTimes = pRoot->vTimeInputs;
- if ( vTimes ) {
- Vec_IntForEachEntry( vTimes, Entry, i )
- {
- dTime = Aig_Int2Float( Vec_IntEntry(vTimes,++i) );
- if ( Entry == -1 )
- {
- Ntl_ModelForEachPi( pRoot, pObj, v )
- Ntl_ObjFanout0(pObj)->dTemp = dTime;
- }
- else
- {
- pObj = Ntl_ModelPi( pRoot, Entry );
- Ntl_ObjFanout0(pObj)->dTemp = dTime;
- }
- }
- }
- // store box timing
- Ntl_ModelForEachMapLeaf( pRoot, pObj, k )
- {
- if ( !(Ntl_ObjIsBox(pObj) && Ntl_BoxIsSeq(pObj)) )
- continue;
- vTimes = pObj->pImplem->vTimeOutputs;
- if ( vTimes == NULL )
- continue;
- Vec_IntForEachEntry( vTimes, Entry, i )
- {
- dTime = Aig_Int2Float( Vec_IntEntry(vTimes,++i) );
- if ( Entry == -1 )
- {
- Ntl_ObjForEachFanout( pObj, pNet, v )
- pNet->dTemp = dTime;
- }
- else
- {
- pNet = Ntl_ObjFanout( pObj, Entry );
- pNet->dTemp = dTime;
- }
- }
- }
- // load them into the timing manager
- Counter = 0;
- Ntl_ModelForEachMapLeaf( pRoot, pObj, i )
- Ntl_ObjForEachFanout( pObj, pNet, k )
- {
- if ( pNet->dTemp == TIM_ETERNITY )
- pNet->dTemp = -TIM_ETERNITY;
- Tim_ManInitCiArrival( pMan, Counter++, pNet->dTemp );
- }
- assert( Counter == p->iLastCi );
-}
-
-/**Function*************************************************************
-
- Synopsis [Records the required times for the map leaves.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManUnpackRootTiming( Ntl_Man_t * p, Tim_Man_t * pMan )
-{
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Tim_Man_t * Ntl_ManCreateTiming( Ntl_Man_t * p )
-{
- Tim_Man_t * pMan;
- Vec_Ptr_t * vDelayTables;
- Ntl_Mod_t * pRoot, * pModel;
- Ntl_Obj_t * pObj;
- int i, curPi, iBox;//, Entry;
- assert( p->pAig != NULL );
- pRoot = Ntl_ManRootModel( p );
- // start the timing manager
- pMan = Tim_ManStart( Aig_ManPiNum(p->pAig), Aig_ManPoNum(p->pAig) );
- // unpack the timing data
- Ntl_ManUnpackLeafTiming( p, pMan );
-// Ntl_ManUnpackRootTiming( p, pMan );
-/*
- if ( pRoot->vTimeInputs )
- {
- Vec_IntForEachEntry( pRoot->vTimeInputs, Entry, i )
- {
- if ( Entry == -1 )
- Tim_ManSetCiArrivalAll( pMan, Aig_Int2Float(Vec_IntEntry(pRoot->vTimeInputs,++i)) );
- else
- Tim_ManInitCiArrival( pMan, Entry, Aig_Int2Float(Vec_IntEntry(pRoot->vTimeInputs,++i)) );
- }
- }
- // unpack the data in the required times
- if ( pRoot->vTimeOutputs )
- {
- Vec_IntForEachEntry( pRoot->vTimeOutputs, Entry, i )
- {
- if ( Entry == -1 )
- Tim_ManSetCoRequiredAll( pMan, Aig_Int2Float(Vec_IntEntry(pRoot->vTimeOutputs,++i)) );
- else
- Tim_ManInitCoRequired( pMan, Entry, Aig_Int2Float(Vec_IntEntry(pRoot->vTimeOutputs,++i)) );
- }
- }
-*/
- // derive timing tables for the whilte comb boxes
- vDelayTables = Vec_PtrAlloc( Vec_PtrSize(p->vModels) );
- Ntl_ManForEachModel( p, pModel, i )
- {
- if ( pModel->vDelays )
- pModel->pDelayTable = Ntl_ManCreateDelayTable( pModel->vDelays, Ntl_ModelPiNum(pModel), Ntl_ModelPoNum(pModel) );
- Vec_PtrPush( vDelayTables, pModel->pDelayTable );
- }
- Tim_ManSetDelayTables( pMan, vDelayTables );
- // set up the boxes
- iBox = 0;
- curPi = p->iLastCi;
- Vec_PtrForEachEntry( Ntl_Obj_t *, p->vVisNodes, pObj, i )
- {
- if ( !Ntl_ObjIsBox(pObj) )
- continue;
- Tim_ManCreateBoxFirst( pMan, Vec_IntEntry(p->vBox1Cios, iBox), Ntl_ObjFaninNum(pObj), curPi, Ntl_ObjFanoutNum(pObj), pObj->pImplem->pDelayTable );
- curPi += Ntl_ObjFanoutNum(pObj);
- iBox++;
- }
- // forget refs to the delay tables in the network
- Ntl_ManForEachModel( p, pModel, i )
- pModel->pDelayTable = NULL;
-// Tim_ManPrint( pMan );
- return pMan;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlUtil.c b/src/aig/ntl/ntlUtil.c
deleted file mode 100644
index c3c6fd49..00000000
--- a/src/aig/ntl/ntlUtil.c
+++ /dev/null
@@ -1,737 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlUtil.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis [Various utilities.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlUtil.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Returns one if the file has a given extension.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_FileIsType( char * pFileName, char * pS1, char * pS2, char * pS3 )
-{
- int lenS, lenF = strlen(pFileName);
- lenS = pS1 ? strlen(pS1) : 0;
- if ( lenS && lenF > lenS && !strncmp( pFileName+lenF-lenS, pS1, lenS ) )
- return 1;
- lenS = pS2 ? strlen(pS2) : 0;
- if ( lenS && lenF > lenS && !strncmp( pFileName+lenF-lenS, pS2, lenS ) )
- return 1;
- lenS = pS3 ? strlen(pS3) : 0;
- if ( lenS && lenF > lenS && !strncmp( pFileName+lenF-lenS, pS3, lenS ) )
- return 1;
- return 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Reads the maximum number of fanins.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelGetFaninMax( Ntl_Mod_t * pRoot )
-{
- Ntl_Obj_t * pNode;
- int i, nFaninsMax = 0;
- Ntl_ModelForEachNode( pRoot, pNode, i )
- {
- if ( nFaninsMax < Ntl_ObjFaninNum(pNode) )
- nFaninsMax = Ntl_ObjFaninNum(pNode);
- }
- return nFaninsMax;
-}
-
-/**Function*************************************************************
-
- Synopsis [If the net is driven by an inv/buf, returns its fanin.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Ntl_Net_t * Ntl_ModelFindSimpleNet( Ntl_Net_t * pNetCo )
-{
- // skip the case when the net is not driven by a node
- if ( !Ntl_ObjIsNode(pNetCo->pDriver) )
- return NULL;
- // skip the case when the node is not an inv/buf
- if ( Ntl_ObjFaninNum(pNetCo->pDriver) != 1 )
- return NULL;
- return Ntl_ObjFanin0(pNetCo->pDriver);
-}
-
-/**Function*************************************************************
-
- Synopsis [Connects COs to the internal nodes other than inv/bufs.]
-
- Description [Should be called immediately after reading from file.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManCountSimpleCoDriversOne( Ntl_Net_t * pNetCo )
-{
- Ntl_Net_t * pNetFanin;
- // skip the case when the net is not driven by a node
- if ( !Ntl_ObjIsNode(pNetCo->pDriver) )
- return 0;
- // skip the case when the node is not an inv/buf
- if ( Ntl_ObjFaninNum(pNetCo->pDriver) != 1 )
- return 0;
- // skip the case when the second-generation driver is not a node
- pNetFanin = Ntl_ObjFanin0(pNetCo->pDriver);
- if ( !Ntl_ObjIsNode(pNetFanin->pDriver) )
- return 0;
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts COs that are connected to the internal nodes through invs/bufs.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManCountSimpleCoDrivers( Ntl_Man_t * p )
-{
- Ntl_Net_t * pNetCo;
- Ntl_Obj_t * pObj;
- Ntl_Mod_t * pRoot;
- int i, k, Counter;
- Counter = 0;
- pRoot = Ntl_ManRootModel( p );
- Ntl_ModelForEachPo( pRoot, pObj, i )
- Counter += Ntl_ManCountSimpleCoDriversOne( Ntl_ObjFanin0(pObj) );
- Ntl_ModelForEachLatch( pRoot, pObj, i )
- Counter += Ntl_ManCountSimpleCoDriversOne( Ntl_ObjFanin0(pObj) );
- Ntl_ModelForEachBox( pRoot, pObj, i )
- Ntl_ObjForEachFanin( pObj, pNetCo, k )
- Counter += Ntl_ManCountSimpleCoDriversOne( pNetCo );
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Derives the array of CI names.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_ManCollectCiNames( Ntl_Man_t * p )
-{
- Vec_Ptr_t * vNames;
- Ntl_Net_t * pNet;
- int i;
- vNames = Vec_PtrAlloc( 1000 );
- Ntl_ManForEachCiNet( p, pNet, i )
- Vec_PtrPush( vNames, pNet->pName );
- return vNames;
-}
-
-/**Function*************************************************************
-
- Synopsis [Derives the array of CI names.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_ManCollectCoNames( Ntl_Man_t * p )
-{
- Vec_Ptr_t * vNames;
- Ntl_Net_t * pNet;
- int i;
- vNames = Vec_PtrAlloc( 1000 );
- Ntl_ManForEachCoNet( p, pNet, i )
- Vec_PtrPush( vNames, pNet->pName );
- return vNames;
-}
-
-/**Function*************************************************************
-
- Synopsis [Marks the CI/CO nets.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManMarkCiCoNets( Ntl_Man_t * p )
-{
- Ntl_Net_t * pNet;
- int i;
- Ntl_ManForEachCiNet( p, pNet, i )
- pNet->fMark = 1;
- Ntl_ManForEachCoNet( p, pNet, i )
- pNet->fMark = 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Unmarks the CI/CO nets.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManUnmarkCiCoNets( Ntl_Man_t * p )
-{
- Ntl_Net_t * pNet;
- int i;
- Ntl_ManForEachCiNet( p, pNet, i )
- pNet->fMark = 0;
- Ntl_ManForEachCoNet( p, pNet, i )
- pNet->fMark = 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Convert initial values of registers to be zero.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManSetZeroInitValues( Ntl_Man_t * p )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- int i;
- pRoot = Ntl_ManRootModel(p);
- Ntl_ModelForEachLatch( pRoot, pObj, i )
- pObj->LatchId.regInit = 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Transforms the netlist to have latches with const-0 init-values.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManAddInverters( Ntl_Mod_t * pRoot, Ntl_Obj_t * pObj )
-{
- char * pStore;
-// Ntl_Mod_t * pRoot = pObj->pModel;
- Ntl_Man_t * pMan = pRoot->pMan;
- Ntl_Net_t * pNetLo, * pNetLi, * pNetLoInv, * pNetLiInv;
- Ntl_Obj_t * pNode;
- int nLength, RetValue;
- assert( Ntl_ObjIsInit1( pObj ) );
- // get the nets
- pNetLi = Ntl_ObjFanin0(pObj);
- pNetLo = Ntl_ObjFanout0(pObj);
- // get storage for net names
- nLength = strlen(pNetLi->pName) + strlen(pNetLo->pName) + 10;
- pStore = Aig_MmFlexEntryFetch( pMan->pMemSops, nLength );
- // create input interter
- pNode = Ntl_ModelCreateNode( pRoot, 1 );
- pNode->pSop = Ntl_ManStoreSop( pMan->pMemSops, "0 1\n" );
- Ntl_ObjSetFanin( pNode, pNetLi, 0 );
- // create input net
- strcpy( pStore, pNetLi->pName );
- strcat( pStore, "_inv" );
- if ( Ntl_ModelFindNet( pRoot, pStore ) )
- {
- printf( "Ntl_ManTransformInitValues(): Internal error! Cannot create net with LI-name + _inv\n" );
- return;
- }
- pNetLiInv = Ntl_ModelFindOrCreateNet( pRoot, pStore );
- RetValue = Ntl_ModelSetNetDriver( pNode, pNetLiInv );
- assert( RetValue );
- // connect latch to the input net
- Ntl_ObjSetFanin( pObj, pNetLiInv, 0 );
- // disconnect latch from the output net
- RetValue = Ntl_ModelClearNetDriver( pObj, pNetLo );
- assert( RetValue );
- // create the output net
- strcpy( pStore, pNetLo->pName );
- strcat( pStore, "_inv" );
- if ( Ntl_ModelFindNet( pRoot, pStore ) )
- {
- printf( "Ntl_ManTransformInitValues(): Internal error! Cannot create net with LO-name + _inv\n" );
- return;
- }
- pNetLoInv = Ntl_ModelFindOrCreateNet( pRoot, pStore );
- RetValue = Ntl_ModelSetNetDriver( pObj, pNetLoInv );
- assert( RetValue );
- // create output interter
- pNode = Ntl_ModelCreateNode( pRoot, 1 );
- pNode->pSop = Ntl_ManStoreSop( pMan->pMemSops, "0 1\n" );
- Ntl_ObjSetFanin( pNode, pNetLoInv, 0 );
- // redirect the old output net
- RetValue = Ntl_ModelSetNetDriver( pNode, pNetLo );
- assert( RetValue );
-}
-
-/**Function*************************************************************
-
- Synopsis [Transforms the netlist to have latches with const-0 init-values.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManTransformInitValues( Ntl_Man_t * p )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- int i;
- pRoot = Ntl_ManRootModel(p);
- Ntl_ModelForEachLatch( pRoot, pObj, i )
- {
- if ( Ntl_ObjIsInit1( pObj ) )
- Ntl_ManAddInverters( pRoot, pObj );
- pObj->LatchId.regInit = 0;
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Transforms register classes.]
-
- Description [Returns the vector of vectors containing the numbers
- of registers belonging to the same class. Skips classes containing
- less than the given number of registers.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Vec_t * Ntl_ManTransformRegClasses( Ntl_Man_t * pMan, int nSizeMax, int fVerbose )
-{
- Vec_Ptr_t * vParts;
- Vec_Int_t * vPart;
- int * pClassNums, nClasses;
- int Class, ClassMax, i, k;
- if ( Vec_IntSize(pMan->vRegClasses) == 0 )
- {
- printf( "Ntl_ManReportRegClasses(): Register classes are not defined.\n" );
-// return (Vec_Vec_t *)Vec_PtrAlloc(0);
- return NULL;
- }
- // find the largest class
- ClassMax = -1;
- Vec_IntForEachEntry( pMan->vRegClasses, Class, k )
- {
- if ( Class < 0 )
- {
- printf( "Ntl_ManReportRegClasses(): Register class (%d) is negative.\n", Class );
- return NULL;
- }
- if ( ClassMax < Class )
- ClassMax = Class;
- }
- if ( ClassMax > 1000000 )
- {
- printf( "Ntl_ManReportRegClasses(): The largest number of a register class (%d) is too large (> 1000000).\n", ClassMax );
- return NULL;
- }
- // count the number of classes
- pClassNums = ABC_CALLOC( int, ClassMax + 1 );
- Vec_IntForEachEntry( pMan->vRegClasses, Class, k )
- pClassNums[Class]++;
- // count the number of classes
- nClasses = 0;
- for ( i = 0; i <= ClassMax; i++ )
- nClasses += (int)(pClassNums[i] > 0);
- // report the classes
- if ( fVerbose && nClasses > 1 )
- {
- printf( "The number of register clases = %d.\n", nClasses );
- for ( i = 0; i <= ClassMax; i++ )
- if ( pClassNums[i] )
- printf( "(%d, %d) ", i, pClassNums[i] );
- printf( "\n" );
- }
- // skip if there is only one class
- if ( nClasses == 1 )
- {
- vParts = NULL;
- if ( Vec_IntSize(pMan->vRegClasses) >= nSizeMax )
- {
- vParts = Vec_PtrAlloc( 100 );
- vPart = Vec_IntStartNatural( Vec_IntSize(pMan->vRegClasses) );
- Vec_PtrPush( vParts, vPart );
- }
- printf( "There is only one class with %d registers.\n", Vec_IntSize(pMan->vRegClasses) );
- ABC_FREE( pClassNums );
- return (Vec_Vec_t *)vParts;
- }
- // create classes
- vParts = Vec_PtrAlloc( 100 );
- for ( i = 0; i <= ClassMax; i++ )
- {
- if ( pClassNums[i] == 0 || pClassNums[i] < nSizeMax )
- continue;
- vPart = Vec_IntAlloc( pClassNums[i] );
- Vec_IntForEachEntry( pMan->vRegClasses, Class, k )
- if ( Class == i )
- Vec_IntPush( vPart, k );
- assert( Vec_IntSize(vPart) == pClassNums[i] );
- Vec_PtrPush( vParts, vPart );
- }
- ABC_FREE( pClassNums );
- Vec_VecSort( (Vec_Vec_t *)vParts, 1 );
- // report the selected classes
- if ( fVerbose )
- {
- printf( "The number of selected register clases = %d.\n", Vec_PtrSize(vParts) );
- Vec_PtrForEachEntry( Vec_Int_t *, vParts, vPart, i )
- printf( "(%d, %d) ", i, Vec_IntSize(vPart) );
- printf( "\n" );
- }
- return (Vec_Vec_t *)vParts;
-}
-
-/**Function*************************************************************
-
- Synopsis [Filter register clases using clock-domain information.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManFilterRegisterClasses( Aig_Man_t * pAig, Vec_Int_t * vRegClasses, int fVerbose )
-{
- Aig_Obj_t * pObj, * pRepr;
- int i, k, nOmitted, nTotal;
- if ( pAig->pReprs == NULL )
- return;
- assert( pAig->nRegs > 0 );
- Aig_ManForEachPi( pAig, pObj, i )
- pObj->PioNum = -1;
- k = 0;
- Aig_ManForEachLoSeq( pAig, pObj, i )
- pObj->PioNum = k++;
- // consider equivalences
- nOmitted = nTotal = 0;
- Aig_ManForEachObj( pAig, pObj, i )
- {
- pRepr = pAig->pReprs[pObj->Id];
- if ( pRepr == NULL )
- continue;
- nTotal++;
- assert( Aig_ObjIsPi(pObj) );
- assert( Aig_ObjIsPi(pRepr) || Aig_ObjIsConst1(pRepr) );
- if ( Aig_ObjIsConst1(pRepr) )
- continue;
- assert( pObj->PioNum >= 0 && pRepr->PioNum >= 0 );
- // remove equivalence if they belong to different classes
- if ( Vec_IntEntry( vRegClasses, pObj->PioNum ) ==
- Vec_IntEntry( vRegClasses, pRepr->PioNum ) )
- continue;
- pAig->pReprs[pObj->Id] = NULL;
- nOmitted++;
- }
- Aig_ManForEachPi( pAig, pObj, i )
- pObj->PioNum = -1;
- if ( fVerbose )
- printf( "Omitted %d (out of %d) equivs due to register class mismatch.\n",
- nOmitted, nTotal );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of CIs in the model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManLatchNum( Ntl_Man_t * p )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pObj;
- int i, Counter = 0;
- pRoot = Ntl_ManRootModel(p);
- Ntl_ModelForEachBox( pRoot, pObj, i )
- Counter += Ntl_ModelLatchNum( pObj->pImplem );
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns 1 if the design is combinational.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ManIsComb( Ntl_Man_t * p )
-{
- return Ntl_ManLatchNum(p) == 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of CIs in the model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelCombLeafNum( Ntl_Mod_t * p )
-{
- Ntl_Obj_t * pObj;
- int i, Counter = 0;
- Ntl_ModelForEachCombLeaf( p, pObj, i )
- Counter += Ntl_ObjFanoutNum( pObj );
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of COs in the model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelCombRootNum( Ntl_Mod_t * p )
-{
- Ntl_Obj_t * pObj;
- int i, Counter = 0;
- Ntl_ModelForEachCombRoot( p, pObj, i )
- Counter += Ntl_ObjFaninNum( pObj );
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of CIs in the model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelSeqLeafNum( Ntl_Mod_t * p )
-{
- Ntl_Obj_t * pObj;
- int i, Counter = 0;
- Ntl_ModelForEachSeqLeaf( p, pObj, i )
- Counter += Ntl_ObjFanoutNum( pObj );
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of COs in the model.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelSeqRootNum( Ntl_Mod_t * p )
-{
- Ntl_Obj_t * pObj;
- int i, Counter = 0;
- Ntl_ModelForEachSeqRoot( p, pObj, i )
- Counter += Ntl_ObjFaninNum( pObj );
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Unmarks the CI/CO nets.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Ntl_ModelCheckNetsAreNotMarked( Ntl_Mod_t * pModel )
-{
- Ntl_Net_t * pNet;
- int i;
- Ntl_ModelForEachNet( pModel, pNet, i )
- assert( pNet->fMark == 0 );
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Unmarks the CI/CO nets.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ModelClearNets( Ntl_Mod_t * pModel )
-{
- Ntl_Net_t * pNet;
- int i;
- Ntl_ModelForEachNet( pModel, pNet, i )
- {
- pNet->nVisits = pNet->fMark = 0;
- pNet->pCopy = pNet->pCopy2 = NULL;
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Removes nets without fanins and fanouts.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManRemoveUselessNets( Ntl_Man_t * p )
-{
- Ntl_Mod_t * pRoot;
- Ntl_Obj_t * pNode;
- Ntl_Net_t * pNet;
- int i, k, Counter;
- pRoot = Ntl_ManRootModel( p );
- Ntl_ModelForEachNet( pRoot, pNet, i )
- pNet->fMark = 0;
- Ntl_ModelForEachPi( pRoot, pNode, i )
- {
- pNet = Ntl_ObjFanout0(pNode);
- pNet->fMark = 1;
- }
- Ntl_ModelForEachPo( pRoot, pNode, i )
- {
- pNet = Ntl_ObjFanin0(pNode);
- pNet->fMark = 1;
- }
- Ntl_ModelForEachNode( pRoot, pNode, i )
- {
- Ntl_ObjForEachFanin( pNode, pNet, k )
- pNet->fMark = 1;
- Ntl_ObjForEachFanout( pNode, pNet, k )
- pNet->fMark = 1;
- }
- Ntl_ModelForEachBox( pRoot, pNode, i )
- {
- Ntl_ObjForEachFanin( pNode, pNet, k )
- pNet->fMark = 1;
- Ntl_ObjForEachFanout( pNode, pNet, k )
- pNet->fMark = 1;
- }
- Counter = 0;
- Ntl_ModelForEachNet( pRoot, pNet, i )
- {
- if ( pNet->fMark )
- {
- pNet->fMark = 0;
- continue;
- }
- if ( pNet->fFixed )
- continue;
- Ntl_ModelDeleteNet( pRoot, pNet );
- Vec_PtrWriteEntry( pRoot->vNets, pNet->NetId, NULL );
- Counter++;
- }
- if ( Counter )
- printf( "Deleted %d nets without fanins/fanouts.\n", Counter );
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlWriteBlif.c b/src/aig/ntl/ntlWriteBlif.c
deleted file mode 100644
index f9b2781f..00000000
--- a/src/aig/ntl/ntlWriteBlif.c
+++ /dev/null
@@ -1,697 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntlWriteBlif.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Command processing package.]
-
- Synopsis [Procedures to write BLIF files.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntlWriteBlif.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-// The code in this file is developed in collaboration with Mark Jarvin of Toronto.
-
-#include "ntl.h"
-#include "ioa.h"
-
-#include <stdarg.h>
-#include "bzlib.h"
-#include "zlib.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-#ifdef _WIN32
-#define vsnprintf _vsnprintf
-#endif
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Writes one model into the BLIF file.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManWriteBlifModel( FILE * pFile, Ntl_Mod_t * pModel, int fMain )
-{
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet;
- float Delay;
- int i, k;
- fprintf( pFile, ".model %s\n", pModel->pName );
- if ( pModel->attrWhite || pModel->attrBox || pModel->attrComb || pModel->attrKeep )
- {
- fprintf( pFile, ".attrib" );
- fprintf( pFile, " %s", pModel->attrWhite? "white": "black" );
- fprintf( pFile, " %s", pModel->attrBox? "box" : "logic" );
- fprintf( pFile, " %s", pModel->attrComb? "comb" : "seq" );
-// fprintf( pFile, " %s", pModel->attrKeep? "keep" : "sweep" );
- fprintf( pFile, "\n" );
- }
- if ( pModel->attrNoMerge )
- fprintf( pFile, ".no_merge\n" );
- fprintf( pFile, ".inputs" );
- Ntl_ModelForEachPi( pModel, pObj, i )
- fprintf( pFile, " %s", Ntl_ObjFanout0(pObj)->pName );
- fprintf( pFile, "\n" );
- fprintf( pFile, ".outputs" );
- Ntl_ModelForEachPo( pModel, pObj, i )
- fprintf( pFile, " %s", Ntl_ObjFanin0(pObj)->pName );
- fprintf( pFile, "\n" );
- // write delays
- if ( pModel->vDelays )
- {
- for ( i = 0; i < Vec_IntSize(pModel->vDelays); i += 3 )
- {
- fprintf( pFile, ".delay" );
- if ( Vec_IntEntry(pModel->vDelays,i) != -1 )
- fprintf( pFile, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vDelays,i)))->pName );
- if ( Vec_IntEntry(pModel->vDelays,i+1) != -1 )
- fprintf( pFile, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vDelays,i+1)))->pName );
- fprintf( pFile, " %.3f", Aig_Int2Float(Vec_IntEntry(pModel->vDelays,i+2)) );
- fprintf( pFile, "\n" );
- }
- }
- if ( pModel->vTimeInputs )
- {
- for ( i = 0; i < Vec_IntSize(pModel->vTimeInputs); i += 2 )
- {
- if ( fMain )
- fprintf( pFile, ".input_arrival" );
- else
- fprintf( pFile, ".input_required" );
- if ( Vec_IntEntry(pModel->vTimeInputs,i) != -1 )
- fprintf( pFile, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vTimeInputs,i)))->pName );
- Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeInputs,i+1));
- if ( Delay == -TIM_ETERNITY )
- fprintf( pFile, " -inf" );
- else if ( Delay == TIM_ETERNITY )
- fprintf( pFile, " inf" );
- else
- fprintf( pFile, " %.3f", Delay );
- fprintf( pFile, "\n" );
- }
- }
- if ( pModel->vTimeOutputs )
- {
- for ( i = 0; i < Vec_IntSize(pModel->vTimeOutputs); i += 2 )
- {
- if ( fMain )
- fprintf( pFile, ".output_required" );
- else
- fprintf( pFile, ".output_arrival" );
- if ( Vec_IntEntry(pModel->vTimeOutputs,i) != -1 )
- fprintf( pFile, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vTimeOutputs,i)))->pName );
- Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeOutputs,i+1));
- if ( Delay == -TIM_ETERNITY )
- fprintf( pFile, " -inf" );
- else if ( Delay == TIM_ETERNITY )
- fprintf( pFile, " inf" );
- else
- fprintf( pFile, " %.3f", Delay );
- fprintf( pFile, "\n" );
- }
- }
- // write objects
- Ntl_ModelForEachObj( pModel, pObj, i )
- {
- if ( Ntl_ObjIsNode(pObj) )
- {
- fprintf( pFile, ".names" );
- Ntl_ObjForEachFanin( pObj, pNet, k )
- fprintf( pFile, " %s", pNet->pName );
- fprintf( pFile, " %s\n", Ntl_ObjFanout0(pObj)->pName );
- fprintf( pFile, "%s", pObj->pSop );
- if ( *pObj->pSop == '\"' )
- fprintf( pFile, "\n" );
- }
- else if ( Ntl_ObjIsLatch(pObj) )
- {
- fprintf( pFile, ".latch" );
- fprintf( pFile, " %s", Ntl_ObjFanin0(pObj)->pName );
- fprintf( pFile, " %s", Ntl_ObjFanout0(pObj)->pName );
- assert( pObj->LatchId.regType == 0 || pObj->LatchId.regClass == 0 );
- if ( pObj->LatchId.regType )
- {
- if ( pObj->LatchId.regType == 1 )
- fprintf( pFile, " fe" );
- else if ( pObj->LatchId.regType == 2 )
- fprintf( pFile, " re" );
- else if ( pObj->LatchId.regType == 3 )
- fprintf( pFile, " ah" );
- else if ( pObj->LatchId.regType == 4 )
- fprintf( pFile, " al" );
- else if ( pObj->LatchId.regType == 5 )
- fprintf( pFile, " as" );
- else
- assert( 0 );
- }
- else if ( pObj->LatchId.regClass )
- fprintf( pFile, " %d", pObj->LatchId.regClass );
- if ( pObj->pClock )
- fprintf( pFile, " %s", pObj->pClock->pName );
- fprintf( pFile, " %d", pObj->LatchId.regInit );
- fprintf( pFile, "\n" );
- }
- else if ( Ntl_ObjIsBox(pObj) )
- {
- fprintf( pFile, ".subckt %s", pObj->pImplem->pName );
- Ntl_ObjForEachFanin( pObj, pNet, k )
- fprintf( pFile, " %s=%s", Ntl_ModelPiName(pObj->pImplem, k), pNet->pName );
- Ntl_ObjForEachFanout( pObj, pNet, k )
- fprintf( pFile, " %s=%s", Ntl_ModelPoName(pObj->pImplem, k), pNet->pName );
- fprintf( pFile, "\n" );
- }
- }
- fprintf( pFile, ".end\n\n" );
-}
-
-/**Function*************************************************************
-
- Synopsis [Writes the netlist into the BLIF file.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManWriteBlif_old( Ntl_Man_t * p, char * pFileName )
-{
- FILE * pFile;
- Ntl_Mod_t * pModel;
- int i;
- // start the output stream
- pFile = fopen( pFileName, "w" );
- if ( pFile == NULL )
- {
- fprintf( stdout, "Ntl_ManWriteBlif(): Cannot open the output file \"%s\".\n", pFileName );
- return;
- }
- fprintf( pFile, "# Benchmark \"%s\" written by ABC-8 on %s\n", p->pName, Aig_TimeStamp() );
- // write the models
- Ntl_ManForEachModel( p, pModel, i )
- Ntl_ManWriteBlifModel( pFile, pModel, i==0 );
- // close the file
- fclose( pFile );
-}
-
-/**Function*************************************************************
-
- Synopsis [Writes the logic network into the BLIF file.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManWriteBlifLogic( Nwk_Man_t * pNtk, Ntl_Man_t * p, char * pFileName )
-{
- Ntl_Man_t * pNew;
- pNew = Ntl_ManInsertNtk( p, pNtk );
- Ntl_ManWriteBlif( pNew, pFileName );
- Ntl_ManFree( pNew );
-}
-
-
-
-/**Function*************************************************************
-
- Synopsis [Procedure to write data into BZ2 file.]
-
- Description [Based on the vsnprintf() man page.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-typedef struct bz2file {
- FILE * f;
- BZFILE * b;
- char * buf;
- int nBytes;
- int nBytesMax;
-} bz2file;
-
-int fprintfBz2(bz2file * b, char * fmt, ...) {
- if (b->b) {
- char * newBuf;
- int bzError;
- va_list ap;
- while (1) {
- va_start(ap,fmt);
- b->nBytes = vsnprintf(b->buf,b->nBytesMax,fmt,ap);
- va_end(ap);
- if (b->nBytes > -1 && b->nBytes < b->nBytesMax)
- break;
- if (b->nBytes > -1)
- b->nBytesMax = b->nBytes + 1;
- else
- b->nBytesMax *= 2;
- if ((newBuf = ABC_REALLOC( char,b->buf,b->nBytesMax )) == NULL)
- return -1;
- else
- b->buf = newBuf;
- }
- BZ2_bzWrite( &bzError, b->b, b->buf, b->nBytes );
- if (bzError == BZ_IO_ERROR) {
- fprintf( stdout, "Ntl_ManWriteBlif(): I/O error writing to compressed stream.\n" );
- return -1;
- }
- return b->nBytes;
- } else {
- int n;
- va_list ap;
- va_start(ap,fmt);
- n = vfprintf( b->f, fmt, ap);
- va_end(ap);
- return n;
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Writes one model into the BLIF file.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManWriteBlifModelGz( gzFile pFile, Ntl_Mod_t * pModel, int fMain )
-{
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet;
- float Delay;
- int i, k;
- gzprintf( pFile, ".model %s\n", pModel->pName );
- if ( pModel->attrWhite || pModel->attrBox || pModel->attrComb || pModel->attrKeep )
- {
- gzprintf( pFile, ".attrib" );
- gzprintf( pFile, " %s", pModel->attrWhite? "white": "black" );
- gzprintf( pFile, " %s", pModel->attrBox? "box" : "logic" );
- gzprintf( pFile, " %s", pModel->attrComb? "comb" : "seq" );
-// gzprintf( pFile, " %s", pModel->attrKeep? "keep" : "sweep" );
- gzprintf( pFile, "\n" );
- }
- if ( pModel->attrNoMerge )
- gzprintf( pFile, ".no_merge\n" );
- gzprintf( pFile, ".inputs" );
- Ntl_ModelForEachPi( pModel, pObj, i )
- gzprintf( pFile, " %s", Ntl_ObjFanout0(pObj)->pName );
- gzprintf( pFile, "\n" );
- gzprintf( pFile, ".outputs" );
- Ntl_ModelForEachPo( pModel, pObj, i )
- gzprintf( pFile, " %s", Ntl_ObjFanin0(pObj)->pName );
- gzprintf( pFile, "\n" );
- // write delays
- if ( pModel->vDelays )
- {
- for ( i = 0; i < Vec_IntSize(pModel->vDelays); i += 3 )
- {
- gzprintf( pFile, ".delay" );
- if ( Vec_IntEntry(pModel->vDelays,i) != -1 )
- gzprintf( pFile, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vDelays,i)))->pName );
- if ( Vec_IntEntry(pModel->vDelays,i+1) != -1 )
- gzprintf( pFile, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vDelays,i+1)))->pName );
- gzprintf( pFile, " %.3f", Aig_Int2Float(Vec_IntEntry(pModel->vDelays,i+2)) );
- gzprintf( pFile, "\n" );
- }
- }
- if ( pModel->vTimeInputs )
- {
- for ( i = 0; i < Vec_IntSize(pModel->vTimeInputs); i += 2 )
- {
- if ( fMain )
- gzprintf( pFile, ".input_arrival" );
- else
- gzprintf( pFile, ".input_required" );
- if ( Vec_IntEntry(pModel->vTimeInputs,i) != -1 )
- gzprintf( pFile, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vTimeInputs,i)))->pName );
- Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeInputs,i+1));
- if ( Delay == -TIM_ETERNITY )
- gzprintf( pFile, " -inf" );
- else if ( Delay == TIM_ETERNITY )
- gzprintf( pFile, " inf" );
- else
- gzprintf( pFile, " %.3f", Delay );
- gzprintf( pFile, "\n" );
- }
- }
- if ( pModel->vTimeOutputs )
- {
- for ( i = 0; i < Vec_IntSize(pModel->vTimeOutputs); i += 2 )
- {
- if ( fMain )
- gzprintf( pFile, ".output_required" );
- else
- gzprintf( pFile, ".output_arrival" );
- if ( Vec_IntEntry(pModel->vTimeOutputs,i) != -1 )
- gzprintf( pFile, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vTimeOutputs,i)))->pName );
- Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeOutputs,i+1));
- if ( Delay == -TIM_ETERNITY )
- gzprintf( pFile, " -inf" );
- else if ( Delay == TIM_ETERNITY )
- gzprintf( pFile, " inf" );
- else
- gzprintf( pFile, " %.3f", Delay );
- gzprintf( pFile, "\n" );
- }
- }
- // write objects
- Ntl_ModelForEachObj( pModel, pObj, i )
- {
- if ( Ntl_ObjIsNode(pObj) )
- {
- gzprintf( pFile, ".names" );
- Ntl_ObjForEachFanin( pObj, pNet, k )
- gzprintf( pFile, " %s", pNet->pName );
- gzprintf( pFile, " %s\n", Ntl_ObjFanout0(pObj)->pName );
- gzprintf( pFile, "%s", pObj->pSop );
- if ( *pObj->pSop == '\"' )
- gzprintf( pFile, "\n" );
- }
- else if ( Ntl_ObjIsLatch(pObj) )
- {
- gzprintf( pFile, ".latch" );
- gzprintf( pFile, " %s", Ntl_ObjFanin0(pObj)->pName );
- gzprintf( pFile, " %s", Ntl_ObjFanout0(pObj)->pName );
- assert( pObj->LatchId.regType == 0 || pObj->LatchId.regClass == 0 );
- if ( pObj->LatchId.regType )
- {
- if ( pObj->LatchId.regType == 1 )
- gzprintf( pFile, " fe" );
- else if ( pObj->LatchId.regType == 2 )
- gzprintf( pFile, " re" );
- else if ( pObj->LatchId.regType == 3 )
- gzprintf( pFile, " ah" );
- else if ( pObj->LatchId.regType == 4 )
- gzprintf( pFile, " al" );
- else if ( pObj->LatchId.regType == 5 )
- gzprintf( pFile, " as" );
- else
- assert( 0 );
- }
- else if ( pObj->LatchId.regClass )
- gzprintf( pFile, " %d", pObj->LatchId.regClass );
- if ( pObj->pClock )
- gzprintf( pFile, " %s", pObj->pClock->pName );
- gzprintf( pFile, " %d", pObj->LatchId.regInit );
- gzprintf( pFile, "\n" );
- }
- else if ( Ntl_ObjIsBox(pObj) )
- {
- gzprintf( pFile, ".subckt %s", pObj->pImplem->pName );
- Ntl_ObjForEachFanin( pObj, pNet, k )
- gzprintf( pFile, " %s=%s", Ntl_ModelPiName(pObj->pImplem, k), pNet->pName );
- Ntl_ObjForEachFanout( pObj, pNet, k )
- gzprintf( pFile, " %s=%s", Ntl_ModelPoName(pObj->pImplem, k), pNet->pName );
- gzprintf( pFile, "\n" );
- }
- }
- gzprintf( pFile, ".end\n\n" );
-}
-
-/**Function*************************************************************
-
- Synopsis [Writes the logic network into the BLIF file.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManWriteBlifGz( Ntl_Man_t * p, char * pFileName )
-{
- Ntl_Mod_t * pModel;
- int i;
- gzFile pFile;
-
- // start the output stream
- pFile = gzopen( pFileName, "wb" ); // if pFileName doesn't end in ".gz" then this acts as a passthrough to fopen
- if ( pFile == NULL )
- {
- fprintf( stdout, "Ntl_ManWriteBlif(): Cannot open the output file \"%s\".\n", pFileName );
- return;
- }
-
- gzprintf( pFile, "# Benchmark \"%s\" written by ABC-8 on %s\n", p->pName, Aig_TimeStamp() );
- // write the models
- Ntl_ManForEachModel( p, pModel, i )
- Ntl_ManWriteBlifModelGz( pFile, pModel, i==0 );
- // close the file
- gzclose( pFile );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Writes one model into the BLIF file.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManWriteBlifModelBz2( bz2file * b, Ntl_Mod_t * pModel, int fMain )
-{
- Ntl_Obj_t * pObj;
- Ntl_Net_t * pNet;
- float Delay;
- int i, k;
- fprintfBz2( b, ".model %s\n", pModel->pName );
- if ( pModel->attrWhite || pModel->attrBox || pModel->attrComb || pModel->attrKeep )
- {
- fprintfBz2( b, ".attrib" );
- fprintfBz2( b, " %s", pModel->attrWhite? "white": "black" );
- fprintfBz2( b, " %s", pModel->attrBox? "box" : "logic" );
- fprintfBz2( b, " %s", pModel->attrComb? "comb" : "seq" );
-// fprintfBz2( b, " %s", pModel->attrKeep? "keep" : "sweep" );
- fprintfBz2( b, "\n" );
- }
- if ( pModel->attrNoMerge )
- fprintfBz2( b, ".no_merge\n" );
- fprintfBz2( b, ".inputs" );
- Ntl_ModelForEachPi( pModel, pObj, i )
- fprintfBz2( b, " %s", Ntl_ObjFanout0(pObj)->pName );
- fprintfBz2( b, "\n" );
- fprintfBz2( b, ".outputs" );
- Ntl_ModelForEachPo( pModel, pObj, i )
- fprintfBz2( b, " %s", Ntl_ObjFanin0(pObj)->pName );
- fprintfBz2( b, "\n" );
- // write delays
- if ( pModel->vDelays )
- {
- for ( i = 0; i < Vec_IntSize(pModel->vDelays); i += 3 )
- {
- fprintfBz2( b, ".delay" );
- if ( Vec_IntEntry(pModel->vDelays,i) != -1 )
- fprintfBz2( b, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vDelays,i)))->pName );
- if ( Vec_IntEntry(pModel->vDelays,i+1) != -1 )
- fprintfBz2( b, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vDelays,i+1)))->pName );
- fprintfBz2( b, " %.3f", Aig_Int2Float(Vec_IntEntry(pModel->vDelays,i+2)) );
- fprintfBz2( b, "\n" );
- }
- }
- if ( pModel->vTimeInputs )
- {
- for ( i = 0; i < Vec_IntSize(pModel->vTimeInputs); i += 2 )
- {
- if ( fMain )
- fprintfBz2( b, ".input_arrival" );
- else
- fprintfBz2( b, ".input_required" );
- if ( Vec_IntEntry(pModel->vTimeInputs,i) != -1 )
- fprintfBz2( b, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vTimeInputs,i)))->pName );
- Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeInputs,i+1));
- if ( Delay == -TIM_ETERNITY )
- fprintfBz2( b, " -inf" );
- else if ( Delay == TIM_ETERNITY )
- fprintfBz2( b, " inf" );
- else
- fprintfBz2( b, " %.3f", Delay );
- fprintfBz2( b, "\n" );
- }
- }
- if ( pModel->vTimeOutputs )
- {
- for ( i = 0; i < Vec_IntSize(pModel->vTimeOutputs); i += 2 )
- {
- if ( fMain )
- fprintfBz2( b, ".output_required" );
- else
- fprintfBz2( b, ".output_arrival" );
- if ( Vec_IntEntry(pModel->vTimeOutputs,i) != -1 )
- fprintfBz2( b, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vTimeOutputs,i)))->pName );
- Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeOutputs,i+1));
- if ( Delay == -TIM_ETERNITY )
- fprintfBz2( b, " -inf" );
- else if ( Delay == TIM_ETERNITY )
- fprintfBz2( b, " inf" );
- else
- fprintfBz2( b, " %.3f", Delay );
- fprintfBz2( b, "\n" );
- }
- }
- // write objects
- Ntl_ModelForEachObj( pModel, pObj, i )
- {
- if ( Ntl_ObjIsNode(pObj) )
- {
- fprintfBz2( b, ".names" );
- Ntl_ObjForEachFanin( pObj, pNet, k )
- fprintfBz2( b, " %s", pNet->pName );
- fprintfBz2( b, " %s\n", Ntl_ObjFanout0(pObj)->pName );
- fprintfBz2( b, "%s", pObj->pSop );
- if ( *pObj->pSop == '\"' )
- fprintfBz2( b, "\n" );
- }
- else if ( Ntl_ObjIsLatch(pObj) )
- {
- fprintfBz2( b, ".latch" );
- fprintfBz2( b, " %s", Ntl_ObjFanin0(pObj)->pName );
- fprintfBz2( b, " %s", Ntl_ObjFanout0(pObj)->pName );
- assert( pObj->LatchId.regType == 0 || pObj->LatchId.regClass == 0 );
- if ( pObj->LatchId.regType )
- {
- if ( pObj->LatchId.regType == 1 )
- fprintfBz2( b, " fe" );
- else if ( pObj->LatchId.regType == 2 )
- fprintfBz2( b, " re" );
- else if ( pObj->LatchId.regType == 3 )
- fprintfBz2( b, " ah" );
- else if ( pObj->LatchId.regType == 4 )
- fprintfBz2( b, " al" );
- else if ( pObj->LatchId.regType == 5 )
- fprintfBz2( b, " as" );
- else
- assert( 0 );
- }
- else if ( pObj->LatchId.regClass )
- fprintfBz2( b, " %d", pObj->LatchId.regClass );
- if ( pObj->pClock )
- fprintfBz2( b, " %s", pObj->pClock->pName );
- fprintfBz2( b, " %d", pObj->LatchId.regInit );
- fprintfBz2( b, "\n" );
- }
- else if ( Ntl_ObjIsBox(pObj) )
- {
- fprintfBz2( b, ".subckt %s", pObj->pImplem->pName );
- Ntl_ObjForEachFanin( pObj, pNet, k )
- fprintfBz2( b, " %s=%s", Ntl_ModelPiName(pObj->pImplem, k), pNet->pName );
- Ntl_ObjForEachFanout( pObj, pNet, k )
- fprintfBz2( b, " %s=%s", Ntl_ModelPoName(pObj->pImplem, k), pNet->pName );
- fprintfBz2( b, "\n" );
- }
- }
- fprintfBz2( b, ".end\n\n" );
-}
-
-/**Function*************************************************************
-
- Synopsis [Writes the logic network into the BLIF file.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Ntl_ManWriteBlif( Ntl_Man_t * p, char * pFileName )
-{
- Ntl_Mod_t * pModel;
- int i, bzError;
- bz2file b;
- if ( p->pNal && !Ntl_FileIsType(pFileName, ".blif", ".blif.gz", ".blif.bz2") )
- {
- p->pNalW( p, pFileName );
- return;
- }
- // write the GZ file
- if (!strncmp(pFileName+strlen(pFileName)-3,".gz",3))
- {
- Ntl_ManWriteBlifGz( p, pFileName );
- return;
- }
-
- memset(&b,0,sizeof(b));
- b.nBytesMax = (1<<12);
- b.buf = ABC_ALLOC( char,b.nBytesMax );
-
- // start the output stream
- b.f = fopen( pFileName, "wb" );
- if ( b.f == NULL )
- {
- fprintf( stdout, "Ntl_ManWriteBlif(): Cannot open the output file \"%s\".\n", pFileName );
- ABC_FREE(b.buf);
- return;
- }
- if (!strncmp(pFileName+strlen(pFileName)-4,".bz2",4)) {
- b.b = BZ2_bzWriteOpen( &bzError, b.f, 9, 0, 0 );
- if ( bzError != BZ_OK ) {
- BZ2_bzWriteClose( &bzError, b.b, 0, NULL, NULL );
- fprintf( stdout, "Ntl_ManWriteBlif(): Cannot start compressed stream.\n" );
- fclose( b.f );
- ABC_FREE(b.buf);
- return;
- }
- }
-
- fprintfBz2( &b, "# Benchmark \"%s\" written by ABC-8 on %s\n", p->pName, Aig_TimeStamp() );
- // write the models
- Ntl_ManForEachModel( p, pModel, i )
- Ntl_ManWriteBlifModelBz2( &b, pModel, i==0 );
- // close the file
- if (b.b) {
- BZ2_bzWriteClose( &bzError, b.b, 0, NULL, NULL );
- if (bzError == BZ_IO_ERROR) {
- fprintf( stdout, "Ntl_ManWriteBlif(): I/O error closing compressed stream.\n" );
- fclose( b.f );
- ABC_FREE(b.buf);
- return;
- }
- }
- fclose( b.f );
- ABC_FREE(b.buf);
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntl_.c b/src/aig/ntl/ntl_.c
deleted file mode 100644
index 9b0b1d0a..00000000
--- a/src/aig/ntl/ntl_.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/**CFile****************************************************************
-
- FileName [ntl_.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Netlist representation.]
-
- Synopsis []
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: ntl_.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/module.make b/src/aig/nwk/module.make
deleted file mode 100644
index f4b19e1a..00000000
--- a/src/aig/nwk/module.make
+++ /dev/null
@@ -1,14 +0,0 @@
-SRC += src/aig/nwk/nwkAig.c \
- src/aig/nwk/nwkCheck.c \
- src/aig/nwk/nwkBidec.c \
- src/aig/nwk/nwkDfs.c \
- src/aig/nwk/nwkFanio.c \
- src/aig/nwk/nwkFlow.c \
- src/aig/nwk/nwkMan.c \
- src/aig/nwk/nwkMap.c \
- src/aig/nwk/nwkMerge.c \
- src/aig/nwk/nwkObj.c \
- src/aig/nwk/nwkSpeedup.c \
- src/aig/nwk/nwkStrash.c \
- src/aig/nwk/nwkTiming.c \
- src/aig/nwk/nwkUtil.c
diff --git a/src/aig/rwt/module.make b/src/aig/rwt/module.make
deleted file mode 100644
index 439d576f..00000000
--- a/src/aig/rwt/module.make
+++ /dev/null
@@ -1,3 +0,0 @@
-SRC += src/aig/rwt/rwtDec.c \
- src/aig/rwt/rwtMan.c \
- src/aig/rwt/rwtUtil.c
diff --git a/src/aig/saig/saig.h b/src/aig/saig/saig.h
index 64bb3b02..b22821ab 100644
--- a/src/aig/saig/saig.h
+++ b/src/aig/saig/saig.h
@@ -18,16 +18,16 @@
***********************************************************************/
-#ifndef __SAIG_H__
-#define __SAIG_H__
+#ifndef ABC__aig__saig__saig_h
+#define ABC__aig__saig__saig_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "aig.h"
-#include "giaAbs.h"
+#include "src/aig/aig/aig.h"
+#include "src/aig/gia/giaAbs.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/aig/saig/saigAbs.c b/src/aig/saig/saigAbs.c
index 01b1e6a6..ffb17db8 100644
--- a/src/aig/saig/saigAbs.c
+++ b/src/aig/saig/saigAbs.c
@@ -105,8 +105,8 @@ Abc_Cex_t * Saig_ManCexRemap( Aig_Man_t * p, Aig_Man_t * pAbs, Abc_Cex_t * pCexA
{
if ( i == Saig_ManPiNum(p) )
break;
- if ( Aig_InfoHasBit( pCexAbs->pData, pCexAbs->nRegs + pCexAbs->nPis * f + i ) )
- Aig_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * f + i );
+ if ( Abc_InfoHasBit( pCexAbs->pData, pCexAbs->nRegs + pCexAbs->nPis * f + i ) )
+ Abc_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * f + i );
}
}
// verify the counter example
diff --git a/src/aig/saig/saigAbsCba.c b/src/aig/saig/saigAbsCba.c
index f3e55c72..e8b68a6f 100644
--- a/src/aig/saig/saigAbsCba.c
+++ b/src/aig/saig/saigAbsCba.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "saig.h"
-#include "giaAig.h"
-#include "ioa.h"
+#include "src/aig/gia/giaAig.h"
+#include "src/aig/ioa/ioa.h"
ABC_NAMESPACE_IMPL_START
@@ -89,7 +89,7 @@ Vec_Int_t * Saig_ManCbaFilterFlops( Aig_Man_t * pAig, Abc_Cex_t * pAbsCex, Vec_I
// override the flop values according to the cex
iBit = pAbsCex->nRegs + f * pAbsCex->nPis + Saig_ManPiNum(pAig);
Vec_IntForEachEntry( vMapEntries, Entry, k )
- Saig_ManLo(pAig, Entry)->fMarkB = Aig_InfoHasBit(pAbsCex->pData, iBit + k);
+ Saig_ManLo(pAig, Entry)->fMarkB = Abc_InfoHasBit(pAbsCex->pData, iBit + k);
// simulate
Aig_ManForEachNode( pAig, pObj, k )
pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) &
@@ -102,7 +102,7 @@ Vec_Int_t * Saig_ManCbaFilterFlops( Aig_Man_t * pAig, Abc_Cex_t * pAbsCex, Vec_I
// compare
iBit = pAbsCex->nRegs + (f + 1) * pAbsCex->nPis + Saig_ManPiNum(pAig);
Vec_IntForEachEntry( vMapEntries, Entry, k )
- if ( Saig_ManLi(pAig, Entry)->fMarkB != (unsigned)Aig_InfoHasBit(pAbsCex->pData, iBit + k) )
+ if ( Saig_ManLi(pAig, Entry)->fMarkB != (unsigned)Abc_InfoHasBit(pAbsCex->pData, iBit + k) )
Vec_IntAddToEntry( vFlopCosts, k, 1 );
}
// Vec_IntForEachEntry( vFlopCosts, Entry, i )
@@ -153,7 +153,7 @@ Aig_Man_t * Saig_ManDupWithCubes( Aig_Man_t * pAig, Vec_Vec_t * vReg2Value )
assert( pAig->nConstrs == 0 );
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) + Vec_VecSizeSize(vReg2Value) );
- pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+ pAigNew->pName = Abc_UtilStrsav( pAig->pName );
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
// create variables for PIs
@@ -168,8 +168,8 @@ Aig_Man_t * Saig_ManDupWithCubes( Aig_Man_t * pAig, Vec_Vec_t * vReg2Value )
pMiter = Aig_ManConst1( pAigNew );
Vec_IntForEachEntry( vLevel, Lit, k )
{
- pObj = Saig_ManLi( pAig, Aig_Lit2Var(Lit) );
- pMiter = Aig_And( pAigNew, pMiter, Aig_NotCond(Aig_ObjChild0Copy(pObj), Aig_LitIsCompl(Lit)) );
+ pObj = Saig_ManLi( pAig, Abc_Lit2Var(Lit) );
+ pMiter = Aig_And( pAigNew, pMiter, Aig_NotCond(Aig_ObjChild0Copy(pObj), Abc_LitIsCompl(Lit)) );
}
Aig_ObjCreatePo( pAigNew, pMiter );
}
@@ -227,20 +227,20 @@ Abc_Cex_t * Saig_ManCbaReason2Cex( Saig_ManCba_t * p, Vec_Int_t * vReasons )
Abc_Cex_t * pCare;
int i, Entry, iInput, iFrame;
pCare = Abc_CexDup( p->pCex, p->pCex->nRegs );
- memset( pCare->pData, 0, sizeof(unsigned) * Aig_BitWordNum(pCare->nBits) );
+ memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
Vec_IntForEachEntry( vReasons, Entry, i )
{
assert( Entry >= 0 && Entry < Aig_ManPiNum(p->pFrames) );
iInput = Vec_IntEntry( p->vMapPiF2A, 2*Entry );
iFrame = Vec_IntEntry( p->vMapPiF2A, 2*Entry+1 );
- Aig_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
+ Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
}
/*
for ( iFrame = 0; iFrame <= pCare->iFrame; iFrame++ )
{
int Count = 0;
for ( i = 0; i < pCare->nPis; i++ )
- Count += Aig_InfoHasBit(pCare->pData, pCare->nRegs + pCare->nPis * iFrame + i);
+ Count += Abc_InfoHasBit(pCare->pData, pCare->nRegs + pCare->nPis * iFrame + i);
printf( "%d ", Count );
}
printf( "\n" );
@@ -322,7 +322,7 @@ Vec_Int_t * Saig_ManCbaFindReason( Saig_ManCba_t * p )
{
int iInput = Vec_IntEntry( p->vMapPiF2A, 2*i );
int iFrame = Vec_IntEntry( p->vMapPiF2A, 2*i+1 );
- pObj->fPhase = Aig_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
+ pObj->fPhase = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
Vec_IntWriteEntry( vPrios, Aig_ObjId(pObj), i );
}
@@ -434,11 +434,11 @@ Aig_Man_t * Saig_ManCbaUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nI
// derive unrolled timeframes
pFrames = Aig_ManStart( 10000 );
- pFrames->pName = Aig_UtilStrsav( pAig->pName );
- pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pFrames->pName = Abc_UtilStrsav( pAig->pName );
+ pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
// initialize the flops
Saig_ManForEachLo( pAig, pObj, i )
- pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Aig_InfoHasBit(pCex->pData, i) );
+ pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Abc_InfoHasBit(pCex->pData, i) );
// iterate through the frames
for ( f = 0; f <= pCex->iFrame; f++ )
{
@@ -457,7 +457,7 @@ Aig_Man_t * Saig_ManCbaUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nI
if ( Aig_ObjPioNum(pObj) < nInputs )
{
int iBit = pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj);
- pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Aig_InfoHasBit(pCex->pData, iBit) );
+ pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Abc_InfoHasBit(pCex->pData, iBit) );
}
else
{
@@ -558,12 +558,12 @@ void Saig_ManCbaShrink( Saig_ManCba_t * p )
{
Vec_IntForEachEntryDouble( vLevel, ObjId, Lit, k )
{
- pObjFrame = Aig_ManObj( p->pFrames, Aig_Lit2Var(Lit) );
+ pObjFrame = Aig_ManObj( p->pFrames, Abc_Lit2Var(Lit) );
if ( pObjFrame == NULL || (!Aig_ObjIsConst1(pObjFrame) && !Aig_ObjIsTravIdCurrent(p->pFrames, pObjFrame)) )
continue;
pObjLi = Aig_ManObj( p->pAig, ObjId );
assert( Saig_ObjIsLi(p->pAig, pObjLi) );
- Vec_VecPushInt( p->vReg2Value, f, Aig_Var2Lit( Aig_ObjPioNum(pObjLi) - Saig_ManPoNum(p->pAig), Aig_LitIsCompl(Lit) ^ !pObjFrame->fPhase ) );
+ Vec_VecPushInt( p->vReg2Value, f, Abc_Var2Lit( Aig_ObjPioNum(pObjLi) - Saig_ManPoNum(p->pAig), Abc_LitIsCompl(Lit) ^ !pObjFrame->fPhase ) );
}
}
// print statistics
diff --git a/src/aig/saig/saigAbsPba.c b/src/aig/saig/saigAbsPba.c
index a42515f3..3c9de875 100644
--- a/src/aig/saig/saigAbsPba.c
+++ b/src/aig/saig/saigAbsPba.c
@@ -19,9 +19,9 @@
***********************************************************************/
#include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "giaAig.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/aig/gia/giaAig.h"
ABC_NAMESPACE_IMPL_START
@@ -99,8 +99,8 @@ Aig_Man_t * Saig_ManUnrollForPba( Aig_Man_t * pAig, int nStart, int nFrames, Vec
}
// derive unrolled timeframes
pFrames = Aig_ManStart( 10000 );
- pFrames->pName = Aig_UtilStrsav( pAig->pName );
- pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pFrames->pName = Abc_UtilStrsav( pAig->pName );
+ pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
// create activation variables
Saig_ManForEachLo( pAig, pObj, i )
Aig_ObjCreatePi( pFrames );
@@ -186,19 +186,19 @@ Abc_Cex_t * Saig_ManPbaDeriveCex( Aig_Man_t * pAig, sat_solver * pSat, Cnf_Dat_t
{
int iSatVar = pCnf->pVarNums[ Aig_ObjId(Aig_ManPi(pCnf->pMan, Entry)) ];
if ( sat_solver_var_value( pSat, iSatVar ) )
- Aig_InfoSetBit( pCex->pData, Aig_ManRegNum(pAig) + i );
+ Abc_InfoSetBit( pCex->pData, Aig_ManRegNum(pAig) + i );
}
}
// check what frame has failed
Aig_ManCleanMarkB(pAig);
Aig_ManConst1(pAig)->fMarkB = 1;
Saig_ManForEachLo( pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit(pCex->pData, iBit++);
+ pObj->fMarkB = Abc_InfoHasBit(pCex->pData, iBit++);
for ( f = 0; f < nFrames; f++ )
{
// compute new state
Saig_ManForEachPi( pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit(pCex->pData, iBit++);
+ pObj->fMarkB = Abc_InfoHasBit(pCex->pData, iBit++);
Aig_ManForEachNode( pAig, pObj, i )
pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) &
(Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj));
diff --git a/src/aig/saig/saigAbsStart.c b/src/aig/saig/saigAbsStart.c
index 71ef98d5..a5ec7dac 100644
--- a/src/aig/saig/saigAbsStart.c
+++ b/src/aig/saig/saigAbsStart.c
@@ -19,10 +19,10 @@
***********************************************************************/
#include "saig.h"
-#include "ssw.h"
-#include "fra.h"
-#include "bbr.h"
-#include "pdr.h"
+#include "src/proof/ssw/ssw.h"
+#include "src/proof/fra/fra.h"
+#include "src/proof/bbr/bbr.h"
+#include "src/proof/pdr/pdr.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/saig/saigAbsVfa.c b/src/aig/saig/saigAbsVfa.c
index 4226ba51..c3243b0e 100644
--- a/src/aig/saig/saigAbsVfa.c
+++ b/src/aig/saig/saigAbsVfa.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/saig/saigBmc.c b/src/aig/saig/saigBmc.c
index 011a746e..814c445f 100644
--- a/src/aig/saig/saigBmc.c
+++ b/src/aig/saig/saigBmc.c
@@ -19,9 +19,9 @@
***********************************************************************/
#include "saig.h"
-#include "fra.h"
-#include "cnf.h"
-#include "satStore.h"
+#include "src/proof/fra/fra.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satStore.h"
ABC_NAMESPACE_IMPL_START
@@ -167,7 +167,7 @@ Aig_Man_t * Saig_ManFramesBmcLimit( Aig_Man_t * pAig, int nFrames, int nSizeMax
ABC_NAMESPACE_IMPL_END
-#include "utilMem.h"
+#include "src/misc/util/utilMem.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/saig/saigBmc2.c b/src/aig/saig/saigBmc2.c
index 169b9404..2586a457 100644
--- a/src/aig/saig/saigBmc2.c
+++ b/src/aig/saig/saigBmc2.c
@@ -19,9 +19,9 @@
***********************************************************************/
#include "saig.h"
-#include "cnf.h"
-#include "satStore.h"
-#include "ssw.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satStore.h"
+#include "src/proof/ssw/ssw.h"
ABC_NAMESPACE_IMPL_START
@@ -180,8 +180,8 @@ Vec_Ptr_t * Abs_ManTernarySimulate( Aig_Man_t * p, int nFramesMax, int fVerbose
assert( Aig_ManRegNum(p) > 0 );
// the maximum number of frames will be determined to use at most 200Mb of RAM
nFramesLimit = 1 + (200000000 * 4)/Aig_ManObjNum(p);
- nFramesLimit = ABC_MIN( nFramesLimit, nFramesMax );
- nFrameWords = Aig_BitWordNum( 2 * Aig_ManObjNum(p) );
+ nFramesLimit = Abc_MinInt( nFramesLimit, nFramesMax );
+ nFrameWords = Abc_BitWordNum( 2 * Aig_ManObjNum(p) );
// allocate simulation info
vSimInfo = Vec_PtrAlloc( nFramesLimit );
for ( f = 0; f < nFramesLimit; f++ )
@@ -652,7 +652,7 @@ Abc_Cex_t * Saig_BmcGenerateCounterExample( Saig_Bmc_t * p )
if ( iVarNum == 0 )
continue;
if ( sat_solver_var_value( p->pSat, iVarNum ) )
- Aig_InfoSetBit( pCex->pData, pCex->nRegs + Saig_ManPiNum(p->pAig) * f + i );
+ Abc_InfoSetBit( pCex->pData, pCex->nRegs + Saig_ManPiNum(p->pAig) * f + i );
}
}
// verify the counter example
diff --git a/src/aig/saig/saigBmc3.c b/src/aig/saig/saigBmc3.c
index 2035ac72..27393f32 100644
--- a/src/aig/saig/saigBmc3.c
+++ b/src/aig/saig/saigBmc3.c
@@ -19,9 +19,9 @@
***********************************************************************/
#include "saig.h"
-#include "fra.h"
-#include "cnf.h"
-#include "satStore.h"
+#include "src/proof/fra/fra.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satStore.h"
ABC_NAMESPACE_IMPL_START
@@ -130,7 +130,7 @@ unsigned * Saig_ManBmcTerSimOne( Aig_Man_t * p, unsigned * pPrev )
Aig_Obj_t * pObj, * pObjLi;
unsigned * pInfo;
int i, Val0, Val1;
- pInfo = ABC_CALLOC( unsigned, Aig_BitWordNum(2 * Aig_ManObjNumMax(p)) );
+ pInfo = ABC_CALLOC( unsigned, Abc_BitWordNum(2 * Aig_ManObjNumMax(p)) );
Saig_ManBmcSimInfoSet( pInfo, Aig_ManConst1(p), SAIG_TER_ONE );
Saig_ManForEachPi( p, pObj, i )
Saig_ManBmcSimInfoSet( pInfo, pObj, SAIG_TER_UND );
@@ -1105,7 +1105,7 @@ int Saig_ManBmcScalable( Aig_Man_t * pAig, Saig_ParBmc_t * pPars )
Gia_ManBmc_t * p;
Aig_Obj_t * pObj;
int RetValue = -1, fFirst = 1, nJumpFrame = 0, fUnfinished = 0;
- int nOutDigits = Aig_Base10Log( Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig) );
+ int nOutDigits = Abc_Base10Log( Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig) );
int i, f, Lit, status, clk, clk2, clkOther = 0, clkTotal = clock();
int nTimeToStop = time(NULL) + pPars->nTimeOut;
if ( pPars->fVerbose && Aig_ManConstrNum(pAig) > 0 )
diff --git a/src/aig/saig/saigCexMin.c b/src/aig/saig/saigCexMin.c
index 824f9eb3..f1826f50 100644
--- a/src/aig/saig/saigCexMin.c
+++ b/src/aig/saig/saigCexMin.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "saig.h"
-#include "ioa.h"
+#include "src/aig/ioa/ioa.h"
ABC_NAMESPACE_IMPL_START
@@ -151,18 +151,18 @@ void Saig_ManCexMinDerivePhasePriority_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj )
Saig_ManCexMinDerivePhasePriority_rec( pAig, Aig_ObjFanin1(pObj) );
assert( Aig_ObjFanin0(pObj)->iData >= 0 );
assert( Aig_ObjFanin1(pObj)->iData >= 0 );
- fPhase0 = Aig_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
- fPhase1 = Aig_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
- iPrio0 = Aig_Lit2Var( Aig_ObjFanin0(pObj)->iData );
- iPrio1 = Aig_Lit2Var( Aig_ObjFanin1(pObj)->iData );
+ fPhase0 = Abc_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
+ fPhase1 = Abc_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
+ iPrio0 = Abc_Lit2Var( Aig_ObjFanin0(pObj)->iData );
+ iPrio1 = Abc_Lit2Var( Aig_ObjFanin1(pObj)->iData );
if ( fPhase0 && fPhase1 ) // both are one
- pObj->iData = Aig_Var2Lit( Abc_MinInt(iPrio0, iPrio1), 1 );
+ pObj->iData = Abc_Var2Lit( Abc_MinInt(iPrio0, iPrio1), 1 );
else if ( !fPhase0 && fPhase1 )
- pObj->iData = Aig_Var2Lit( iPrio0, 0 );
+ pObj->iData = Abc_Var2Lit( iPrio0, 0 );
else if ( fPhase0 && !fPhase1 )
- pObj->iData = Aig_Var2Lit( iPrio1, 0 );
+ pObj->iData = Abc_Var2Lit( iPrio1, 0 );
else // both are zero
- pObj->iData = Aig_Var2Lit( Abc_MaxInt(iPrio0, iPrio1), 0 );
+ pObj->iData = Abc_Var2Lit( Abc_MaxInt(iPrio0, iPrio1), 0 );
}
}
@@ -183,7 +183,7 @@ void Saig_ManCexMinVerifyPhase( Aig_Man_t * pAig, Abc_Cex_t * pCex, int f )
int i;
Aig_ManConst1(pAig)->fPhase = 1;
Saig_ManForEachPi( pAig, pObj, i )
- pObj->fPhase = Aig_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + i);
+ pObj->fPhase = Abc_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + i);
if ( f == 0 )
{
Saig_ManForEachLo( pAig, pObj, i )
@@ -266,7 +266,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority_( Aig_Man_t * pAig, Abc_Cex_t * p
// set the constant node to higher priority than the flops
vFramePPs = Vec_VecStart( pCex->iFrame+1 );
nPrioOffset = (pCex->iFrame + 1) * pCex->nPis;
- Aig_ManConst1(pAig)->iData = Aig_Var2Lit( nPrioOffset + pCex->nRegs, 1 );
+ Aig_ManConst1(pAig)->iData = Abc_Var2Lit( nPrioOffset + pCex->nRegs, 1 );
vRoots = Vec_IntAlloc( 1000 );
//printf( "Const1 = %d Offset = %d\n", Aig_ManConst1(pAig)->iData, nPrioOffset );
for ( f = 0; f <= pCex->iFrame; f++ )
@@ -280,9 +280,9 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority_( Aig_Man_t * pAig, Abc_Cex_t * p
{
assert( Aig_ObjIsPi(pObj) );
if ( Saig_ObjIsPi(pAig, pObj) )
- Vec_IntPush( vFramePPsOne, Aig_Var2Lit( (f+1) * pCex->nPis - nPiCount++, Aig_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj)) ) );
+ Vec_IntPush( vFramePPsOne, Abc_Var2Lit( (f+1) * pCex->nPis - nPiCount++, Abc_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj)) ) );
else if ( f == 0 )
- Vec_IntPush( vFramePPsOne, Aig_Var2Lit( nPrioOffset + Saig_ObjRegId(pAig, pObj), 0 ) );
+ Vec_IntPush( vFramePPsOne, Abc_Var2Lit( nPrioOffset + Saig_ObjRegId(pAig, pObj), 0 ) );
else
{
Aig_Obj_t * pObj0 = Saig_ObjLoToLi(pAig, pObj);
@@ -298,7 +298,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority_( Aig_Man_t * pAig, Abc_Cex_t * p
Vec_IntFree( vRoots );
// check the output
pObj = Aig_ManPo( pAig, pCex->iPo );
- assert( Aig_LitIsCompl(pObj->iData) );
+ assert( Abc_LitIsCompl(pObj->iData) );
return vFramePPs;
}
@@ -327,7 +327,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority( Aig_Man_t * pAig, Abc_Cex_t * pC
// set the constant node to higher priority than the flops
vFramePPs = Vec_VecStart( pCex->iFrame+1 );
nPrioOffset = pCex->nRegs;
- Aig_ManConst1(pAig)->iData = Aig_Var2Lit( nPrioOffset + (pCex->iFrame + 1) * pCex->nPis, 1 );
+ Aig_ManConst1(pAig)->iData = Abc_Var2Lit( nPrioOffset + (pCex->iFrame + 1) * pCex->nPis, 1 );
vRoots = Vec_IntAlloc( 1000 );
//printf( "Const1 = %d Offset = %d\n", Aig_ManConst1(pAig)->iData, nPrioOffset );
for ( f = 0; f <= pCex->iFrame; f++ )
@@ -341,9 +341,9 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority( Aig_Man_t * pAig, Abc_Cex_t * pC
{
assert( Aig_ObjIsPi(pObj) );
if ( Saig_ObjIsPi(pAig, pObj) )
- Vec_IntPush( vFramePPsOne, Aig_Var2Lit( nPrioOffset + (f+1) * pCex->nPis - 1 - nPiCount++, Aig_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj)) ) );
+ Vec_IntPush( vFramePPsOne, Abc_Var2Lit( nPrioOffset + (f+1) * pCex->nPis - 1 - nPiCount++, Abc_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj)) ) );
else if ( f == 0 )
- Vec_IntPush( vFramePPsOne, Aig_Var2Lit( Saig_ObjRegId(pAig, pObj), 0 ) );
+ Vec_IntPush( vFramePPsOne, Abc_Var2Lit( Saig_ObjRegId(pAig, pObj), 0 ) );
else
{
Aig_Obj_t * pObj0 = Saig_ObjLoToLi(pAig, pObj);
@@ -359,7 +359,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority( Aig_Man_t * pAig, Abc_Cex_t * pC
Vec_IntFree( vRoots );
// check the output
pObj = Aig_ManPo( pAig, pCex->iPo );
- assert( Aig_LitIsCompl(pObj->iData) );
+ assert( Abc_LitIsCompl(pObj->iData) );
return vFramePPs;
}
@@ -383,9 +383,9 @@ void Saig_ManCexMinCollectReason_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t
if ( Aig_ObjIsPi(pObj) )
{
if ( fPiReason && Saig_ObjIsPi(p, pObj) )
- Vec_IntPush( vReason, Aig_Var2Lit( Aig_ObjPioNum(pObj), !Aig_LitIsCompl(pObj->iData) ) );
+ Vec_IntPush( vReason, Abc_Var2Lit( Aig_ObjPioNum(pObj), !Abc_LitIsCompl(pObj->iData) ) );
else if ( !fPiReason && Saig_ObjIsLo(p, pObj) )
- Vec_IntPush( vReason, Aig_Var2Lit( Saig_ObjRegId(p, pObj), !Aig_LitIsCompl(pObj->iData) ) );
+ Vec_IntPush( vReason, Abc_Var2Lit( Saig_ObjRegId(p, pObj), !Abc_LitIsCompl(pObj->iData) ) );
return;
}
if ( Aig_ObjIsPo(pObj) )
@@ -396,18 +396,18 @@ void Saig_ManCexMinCollectReason_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t
if ( Aig_ObjIsConst1(pObj) )
return;
assert( Aig_ObjIsNode(pObj) );
- if ( Aig_LitIsCompl(pObj->iData) ) // value 1
+ if ( Abc_LitIsCompl(pObj->iData) ) // value 1
{
- int fPhase0 = Aig_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
- int fPhase1 = Aig_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
+ int fPhase0 = Abc_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
+ int fPhase1 = Abc_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
assert( fPhase0 && fPhase1 );
Saig_ManCexMinCollectReason_rec( p, Aig_ObjFanin0(pObj), vReason, fPiReason );
Saig_ManCexMinCollectReason_rec( p, Aig_ObjFanin1(pObj), vReason, fPiReason );
}
else
{
- int fPhase0 = Aig_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
- int fPhase1 = Aig_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
+ int fPhase0 = Abc_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
+ int fPhase1 = Abc_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
assert( !fPhase0 || !fPhase1 );
if ( !fPhase0 && fPhase1 )
Saig_ManCexMinCollectReason_rec( p, Aig_ObjFanin0(pObj), vReason, fPiReason );
@@ -415,8 +415,8 @@ void Saig_ManCexMinCollectReason_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t
Saig_ManCexMinCollectReason_rec( p, Aig_ObjFanin1(pObj), vReason, fPiReason );
else
{
- int iPrio0 = Aig_Lit2Var( Aig_ObjFanin0(pObj)->iData );
- int iPrio1 = Aig_Lit2Var( Aig_ObjFanin1(pObj)->iData );
+ int iPrio0 = Abc_Lit2Var( Aig_ObjFanin0(pObj)->iData );
+ int iPrio1 = Abc_Lit2Var( Aig_ObjFanin1(pObj)->iData );
if ( iPrio0 >= iPrio1 )
Saig_ManCexMinCollectReason_rec( p, Aig_ObjFanin0(pObj), vReason, fPiReason );
else
@@ -514,7 +514,7 @@ Aig_Man_t * Saig_ManCexMinDupWithCubes( Aig_Man_t * pAig, Vec_Vec_t * vReg2Value
assert( pAig->nConstrs == 0 );
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) + Vec_VecSizeSize(vReg2Value) + Vec_VecSize(vReg2Value) );
- pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+ pAigNew->pName = Abc_UtilStrsav( pAig->pName );
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
// create variables for PIs
@@ -532,8 +532,8 @@ Aig_Man_t * Saig_ManCexMinDupWithCubes( Aig_Man_t * pAig, Vec_Vec_t * vReg2Value
Vec_IntForEachEntry( vLevel, Lit, k )
{
assert( Lit >= 0 && Lit < 2 * Aig_ManRegNum(pAig) );
- pObj = Saig_ManLi( pAig, Aig_Lit2Var(Lit) );
- pMiter = Aig_And( pAigNew, pMiter, Aig_NotCond(Aig_ObjChild0Copy(pObj), Aig_LitIsCompl(Lit)) );
+ pObj = Saig_ManLi( pAig, Abc_Lit2Var(Lit) );
+ pMiter = Aig_And( pAigNew, pMiter, Aig_NotCond(Aig_ObjChild0Copy(pObj), Abc_LitIsCompl(Lit)) );
}
Aig_ObjCreatePo( pAigNew, pMiter );
}
diff --git a/src/aig/saig/saigConstr.c b/src/aig/saig/saigConstr.c
index d58074e3..91bdf46f 100644
--- a/src/aig/saig/saigConstr.c
+++ b/src/aig/saig/saigConstr.c
@@ -19,10 +19,10 @@
***********************************************************************/
#include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "kit.h"
-#include "ioa.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/bool/kit/kit.h"
+#include "src/aig/ioa/ioa.h"
ABC_NAMESPACE_IMPL_START
@@ -64,7 +64,7 @@ Aig_Man_t * Saig_ManDupUnfoldConstrs( Aig_Man_t * pAig )
}
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
- pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+ pAigNew->pName = Abc_UtilStrsav( pAig->pName );
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
// create variables for PIs
@@ -113,7 +113,7 @@ Aig_Man_t * Saig_ManDupFoldConstrs( Aig_Man_t * pAig, Vec_Int_t * vConstrs )
assert( Saig_ManRegNum(pAig) > 0 );
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
- pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+ pAigNew->pName = Abc_UtilStrsav( pAig->pName );
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
// create variables for PIs
diff --git a/src/aig/saig/saigConstr2.c b/src/aig/saig/saigConstr2.c
index 7f2eab6a..e60d1b82 100644
--- a/src/aig/saig/saigConstr2.c
+++ b/src/aig/saig/saigConstr2.c
@@ -19,10 +19,10 @@
***********************************************************************/
#include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "kit.h"
-#include "bar.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/bool/kit/kit.h"
+#include "src/misc/bar/bar.h"
ABC_NAMESPACE_IMPL_START
@@ -244,8 +244,8 @@ Aig_Man_t * Saig_ManCreateIndMiter( Aig_Man_t * pAig, Vec_Vec_t * vCands )
// start the fraig package
pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFrames );
- pFrames->pName = Aig_UtilStrsav( pAig->pName );
- pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pFrames->pName = Abc_UtilStrsav( pAig->pName );
+ pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
// map constant nodes
for ( f = 0; f < nFrames; f++ )
Aig_ObjSetFrames( pObjMap, nFrames, Aig_ManConst1(pAig), f, Aig_ManConst1(pFrames) );
@@ -437,8 +437,8 @@ Aig_Man_t * Saig_ManUnrollCOI( Aig_Man_t * pAig, int nFrames )
pObjMap = ABC_CALLOC( Aig_Obj_t *, nFrames * Aig_ManObjNumMax(pAig) );
// start the fraig package
pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFrames );
- pFrames->pName = Aig_UtilStrsav( pAig->pName );
- pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pFrames->pName = Abc_UtilStrsav( pAig->pName );
+ pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
// map constant nodes
for ( f = 0; f < nFrames; f++ )
Aig_ObjSetFrames( pObjMap, nFrames, Aig_ManConst1(pAig), f, Aig_ManConst1(pFrames) );
@@ -504,8 +504,8 @@ void Saig_CollectSatValues( sat_solver * pSat, Cnf_Dat_t * pCnf, Vec_Ptr_t * vIn
continue;
assert( pCnf->pVarNums[i] > 0 );
pInfo = (unsigned *)Vec_PtrEntry( vInfo, i );
- if ( Aig_InfoHasBit(pInfo, *piPat) != sat_solver_var_value(pSat, pCnf->pVarNums[i]) )
- Aig_InfoXorBit(pInfo, *piPat);
+ if ( Abc_InfoHasBit(pInfo, *piPat) != sat_solver_var_value(pSat, pCnf->pVarNums[i]) )
+ Abc_InfoXorBit(pInfo, *piPat);
}
}
@@ -949,8 +949,8 @@ Aig_Man_t * Saig_ManDupFoldConstrsFunc( Aig_Man_t * pAig, int fCompl, int fVerbo
assert( Aig_ManConstrNum(pAig) < Saig_ManPoNum(pAig) );
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
- pAigNew->pName = Aig_UtilStrsav( pAig->pName );
- pAigNew->pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pAigNew->pName = Abc_UtilStrsav( pAig->pName );
+ pAigNew->pSpec = Abc_UtilStrsav( pAig->pSpec );
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
// create variables for PIs
diff --git a/src/aig/saig/saigDup.c b/src/aig/saig/saigDup.c
index ca06398c..fa915f52 100644
--- a/src/aig/saig/saigDup.c
+++ b/src/aig/saig/saigDup.c
@@ -54,7 +54,7 @@ Aig_Man_t * Saig_ManDupOrpos( Aig_Man_t * pAig )
}
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
- pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+ pAigNew->pName = Abc_UtilStrsav( pAig->pName );
pAigNew->nConstrs = pAig->nConstrs;
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
@@ -100,7 +100,7 @@ Aig_Man_t * Saig_ManCreateEquivMiter( Aig_Man_t * pAig, Vec_Int_t * vPairs )
}
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
- pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+ pAigNew->pName = Abc_UtilStrsav( pAig->pName );
pAigNew->nConstrs = pAig->nConstrs;
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
@@ -150,7 +150,7 @@ Aig_Man_t * Saig_ManTrimPis( Aig_Man_t * p )
fAllPisHaveNoRefs = 0;
// start the new manager
pNew = Aig_ManStart( Aig_ManObjNum(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
pNew->nConstrs = p->nConstrs;
// start mapping of the CI numbers
pNew->vCiNumsOrig = Vec_IntAlloc( Aig_ManPiNum(p) );
@@ -210,7 +210,7 @@ Aig_Man_t * Saig_ManDupAbstraction( Aig_Man_t * p, Vec_Int_t * vFlops )
Aig_ManCleanData( p );
// start the new manager
pNew = Aig_ManStart( 5000 );
- pNew->pName = Aig_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
// map the constant node
Aig_ManConst1(p)->pData = Aig_ManConst1( pNew );
// label included flops
@@ -283,11 +283,11 @@ int Saig_ManVerifyCex( Aig_Man_t * pAig, Abc_Cex_t * p )
Aig_ManCleanMarkB(pAig);
Aig_ManConst1(pAig)->fMarkB = 1;
Saig_ManForEachLo( pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+ pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
for ( i = 0; i <= p->iFrame; i++ )
{
Saig_ManForEachPi( pAig, pObj, k )
- pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+ pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
Aig_ManForEachNode( pAig, pObj, k )
pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) &
(Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj));
@@ -328,15 +328,15 @@ Abc_Cex_t * Saig_ManExtendCex( Aig_Man_t * pAig, Abc_Cex_t * p )
Aig_ManCleanMarkB(pAig);
Aig_ManConst1(pAig)->fMarkB = 1;
Saig_ManForEachLo( pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+ pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
for ( i = 0; i <= p->iFrame; i++ )
{
Saig_ManForEachPi( pAig, pObj, k )
- pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+ pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
///////// write PI+LO values ////////////
Aig_ManForEachPi( pAig, pObj, k )
if ( pObj->fMarkB )
- Aig_InfoSetBit(pNew->pData, Aig_ManPiNum(pAig)*i + k);
+ Abc_InfoSetBit(pNew->pData, Aig_ManPiNum(pAig)*i + k);
/////////////////////////////////////////
Aig_ManForEachNode( pAig, pObj, k )
pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) &
@@ -374,11 +374,11 @@ int Saig_ManFindFailedPoCex( Aig_Man_t * pAig, Abc_Cex_t * p )
Aig_ManCleanMarkB(pAig);
Aig_ManConst1(pAig)->fMarkB = 1;
Saig_ManForEachLo( pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+ pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
for ( i = 0; i <= p->iFrame; i++ )
{
Saig_ManForEachPi( pAig, pObj, k )
- pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+ pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
Aig_ManForEachNode( pAig, pObj, k )
pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) &
(Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj));
@@ -421,7 +421,7 @@ Aig_Man_t * Saig_ManDupWithPhase( Aig_Man_t * pAig, Vec_Int_t * vInit )
assert( Aig_ManRegNum(pAig) <= Vec_IntSize(vInit) );
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
- pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+ pAigNew->pName = Abc_UtilStrsav( pAig->pName );
pAigNew->nConstrs = pAig->nConstrs;
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
diff --git a/src/aig/saig/saigGlaCba.c b/src/aig/saig/saigGlaCba.c
index d5a94acb..d6af6e47 100644
--- a/src/aig/saig/saigGlaCba.c
+++ b/src/aig/saig/saigGlaCba.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "saig.h"
-#include "satSolver.h"
-#include "cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/cnf/cnf.h"
ABC_NAMESPACE_IMPL_START
@@ -250,7 +250,7 @@ Aig_Man_t * Aig_Gla1DeriveAbs( Aig_Gla1Man_t * p )
assert( Saig_ManPoNum(p->pAig) == 1 );
// start the new manager
pNew = Aig_ManStart( 5000 );
- pNew->pName = Aig_UtilStrsav( p->pAig->pName );
+ pNew->pName = Abc_UtilStrsav( p->pAig->pName );
// create constant
Aig_ManCleanData( p->pAig );
Aig_ManConst1(p->pAig)->pData = Aig_ManConst1(pNew);
@@ -596,7 +596,7 @@ Abc_Cex_t * Aig_Gla1DeriveCex( Aig_Gla1Man_t * p, int iFrame )
continue;
assert( iSatId > 0 );
if ( sat_solver_var_value(p->pSat, iSatId) )
- Aig_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + i );
+ Abc_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + i );
}
}
Aig_ManForEachObjVec( p->vPPis, p->pAig, pObj, i )
@@ -610,7 +610,7 @@ Abc_Cex_t * Aig_Gla1DeriveCex( Aig_Gla1Man_t * p, int iFrame )
continue;
assert( iSatId > 0 );
if ( sat_solver_var_value(p->pSat, iSatId) )
- Aig_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + Vec_IntSize(p->vPis) + i );
+ Abc_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + Vec_IntSize(p->vPis) + i );
}
}
return pCex;
diff --git a/src/aig/saig/saigGlaPba.c b/src/aig/saig/saigGlaPba.c
index cdbc05c7..c22cf415 100644
--- a/src/aig/saig/saigGlaPba.c
+++ b/src/aig/saig/saigGlaPba.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "saig.h"
-#include "satSolver.h"
-#include "satStore.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/bsat/satStore.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/saig/saigGlaPba2.c b/src/aig/saig/saigGlaPba2.c
index 1daea5d9..8bc2b982 100644
--- a/src/aig/saig/saigGlaPba2.c
+++ b/src/aig/saig/saigGlaPba2.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "saig.h"
-#include "satSolver2.h"
+#include "src/sat/bsat/satSolver2.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/saig/saigHaig.c b/src/aig/saig/saigHaig.c
index 3ea0a2c6..ee058a3c 100644
--- a/src/aig/saig/saigHaig.c
+++ b/src/aig/saig/saigHaig.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "saig.h"
-#include "satSolver.h"
-#include "cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/cnf/cnf.h"
ABC_NAMESPACE_IMPL_START
@@ -101,8 +101,8 @@ Aig_Man_t * Aig_ManHaigFrames( Aig_Man_t * pHaig, int nFrames )
assert( nFrames == 1 || Saig_ManRegNum(pHaig) > 0 );
// start AIG manager for timeframes
pFrames = Aig_ManStart( Aig_ManNodeNum(pHaig) * nFrames );
- pFrames->pName = Aig_UtilStrsav( pHaig->pName );
- pFrames->pSpec = Aig_UtilStrsav( pHaig->pSpec );
+ pFrames->pName = Abc_UtilStrsav( pHaig->pName );
+ pFrames->pSpec = Abc_UtilStrsav( pHaig->pSpec );
// map the constant node
Aig_ManConst1(pHaig)->pData = Aig_ManConst1( pFrames );
// create variables for register outputs
diff --git a/src/aig/saig/saigInd.c b/src/aig/saig/saigInd.c
index 190d8d25..c9043ba2 100644
--- a/src/aig/saig/saigInd.c
+++ b/src/aig/saig/saigInd.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
ABC_NAMESPACE_IMPL_START
@@ -324,7 +324,7 @@ nextrun:
Vec_IntForEachEntryStart( vTopVarIds, VarNum, i, 1 )
{
if ( VarNum >= 0 && sat_solver_var_value( pSat, VarNum ) )
- Aig_InfoSetBit( pCex->pData, iBit );
+ Abc_InfoSetBit( pCex->pData, iBit );
iBit++;
}
assert( iBit == pCex->nBits );
diff --git a/src/aig/saig/saigIoa.c b/src/aig/saig/saigIoa.c
index c84c37f3..bdd187d9 100644
--- a/src/aig/saig/saigIoa.c
+++ b/src/aig/saig/saigIoa.c
@@ -47,15 +47,15 @@ char * Saig_ObjName( Aig_Man_t * p, Aig_Obj_t * pObj )
{
static char Buffer[16];
if ( Aig_ObjIsNode(pObj) || Aig_ObjIsConst1(pObj) )
- sprintf( Buffer, "n%0*d", Aig_Base10Log(Aig_ManObjNumMax(p)), Aig_ObjId(pObj) );
+ sprintf( Buffer, "n%0*d", Abc_Base10Log(Aig_ManObjNumMax(p)), Aig_ObjId(pObj) );
else if ( Saig_ObjIsPi(p, pObj) )
- sprintf( Buffer, "pi%0*d", Aig_Base10Log(Saig_ManPiNum(p)), Aig_ObjPioNum(pObj) );
+ sprintf( Buffer, "pi%0*d", Abc_Base10Log(Saig_ManPiNum(p)), Aig_ObjPioNum(pObj) );
else if ( Saig_ObjIsPo(p, pObj) )
- sprintf( Buffer, "po%0*d", Aig_Base10Log(Saig_ManPoNum(p)), Aig_ObjPioNum(pObj) );
+ sprintf( Buffer, "po%0*d", Abc_Base10Log(Saig_ManPoNum(p)), Aig_ObjPioNum(pObj) );
else if ( Saig_ObjIsLo(p, pObj) )
- sprintf( Buffer, "lo%0*d", Aig_Base10Log(Saig_ManRegNum(p)), Aig_ObjPioNum(pObj) - Saig_ManPiNum(p) );
+ sprintf( Buffer, "lo%0*d", Abc_Base10Log(Saig_ManRegNum(p)), Aig_ObjPioNum(pObj) - Saig_ManPiNum(p) );
else if ( Saig_ObjIsLi(p, pObj) )
- sprintf( Buffer, "li%0*d", Aig_Base10Log(Saig_ManRegNum(p)), Aig_ObjPioNum(pObj) - Saig_ManPoNum(p) );
+ sprintf( Buffer, "li%0*d", Abc_Base10Log(Saig_ManRegNum(p)), Aig_ObjPioNum(pObj) - Saig_ManPoNum(p) );
else
assert( 0 );
return Buffer;
@@ -268,8 +268,8 @@ Aig_Man_t * Saig_ManReadBlif( char * pFileName )
{ printf( "Saig_ManReadBlif(): Error 2.\n" ); return NULL; }
// start the package
p = Aig_ManStart( 10000 );
- p->pName = Aig_UtilStrsav( pToken );
- p->pSpec = Aig_UtilStrsav( pFileName );
+ p->pName = Abc_UtilStrsav( pToken );
+ p->pSpec = Abc_UtilStrsav( pFileName );
// count PIs
pToken = Saig_ManReadToken( pFile );
if ( pToken == NULL || strcmp( pToken, ".inputs" ) )
diff --git a/src/aig/saig/saigMiter.c b/src/aig/saig/saigMiter.c
index c50eaac5..20dbeec7 100644
--- a/src/aig/saig/saigMiter.c
+++ b/src/aig/saig/saigMiter.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "saig.h"
-#include "fra.h"
+#include "src/proof/fra/fra.h"
ABC_NAMESPACE_IMPL_START
@@ -106,7 +106,7 @@ Aig_Man_t * Saig_ManCreateMiter( Aig_Man_t * p0, Aig_Man_t * p1, int Oper )
assert( Saig_ManPiNum(p0) == Saig_ManPiNum(p1) );
assert( Saig_ManPoNum(p0) == Saig_ManPoNum(p1) );
pNew = Aig_ManStart( Aig_ManObjNumMax(p0) + Aig_ManObjNumMax(p1) );
- pNew->pName = Aig_UtilStrsav( "miter" );
+ pNew->pName = Abc_UtilStrsav( "miter" );
Aig_ManCleanData( p0 );
Aig_ManCleanData( p1 );
// map constant nodes
@@ -168,7 +168,7 @@ Aig_Man_t * Saig_ManCreateMiterComb( Aig_Man_t * p0, Aig_Man_t * p1, int Oper )
assert( Aig_ManPiNum(p0) == Aig_ManPiNum(p1) );
assert( Aig_ManPoNum(p0) == Aig_ManPoNum(p1) );
pNew = Aig_ManStart( Aig_ManObjNumMax(p0) + Aig_ManObjNumMax(p1) );
- pNew->pName = Aig_UtilStrsav( "miter" );
+ pNew->pName = Abc_UtilStrsav( "miter" );
// map constant nodes
Aig_ManConst1(p0)->pData = Aig_ManConst1(pNew);
Aig_ManConst1(p1)->pData = Aig_ManConst1(pNew);
@@ -246,8 +246,8 @@ Aig_Man_t * Saig_ManDualRail( Aig_Man_t * p, int fMiter )
Aig_ManCleanNext( p );
// create the new manager
pNew = Aig_ManStart( 4*Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManConst1(p)->pData = Aig_ManConst0(pNew);
Aig_ManConst1(p)->pNext = Aig_ManConst1(pNew);
@@ -331,8 +331,8 @@ Aig_Man_t * Saig_ManUnrollTwo( Aig_Man_t * pBot, Aig_Man_t * pTop, int nFrames )
assert( Saig_ManRegNum(pBot) == Saig_ManRegNum(pTop) );
assert( Saig_ManRegNum(pBot) > 0 || Saig_ManRegNum(pTop) > 0 );
// start timeframes
- p = Aig_ManStart( nFrames * ABC_MAX(Aig_ManObjNumMax(pBot), Aig_ManObjNumMax(pTop)) );
- p->pName = Aig_UtilStrsav( "frames" );
+ p = Aig_ManStart( nFrames * Abc_MaxInt(Aig_ManObjNumMax(pBot), Aig_ManObjNumMax(pTop)) );
+ p->pName = Abc_UtilStrsav( "frames" );
// create variables for register outputs
pAig = pBot;
Saig_ManForEachLo( pAig, pObj, i )
@@ -392,7 +392,7 @@ Aig_Man_t * Aig_ManDupNodesAll( Aig_Man_t * p, Vec_Ptr_t * vSet )
Aig_Obj_t * pObj;
int i;
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p, pObj, i )
pObj->pData = Aig_ObjCreatePi( pNew );
@@ -430,7 +430,7 @@ Aig_Man_t * Aig_ManDupNodesHalf( Aig_Man_t * p, Vec_Ptr_t * vSet, int iPart )
int i;
Aig_ManCleanData( p );
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Saig_ManForEachPi( p, pObj, i )
pObj->pData = Aig_ObjCreatePi( pNew );
@@ -534,13 +534,13 @@ int Saig_ManDemiterSimple( Aig_Man_t * p, Aig_Man_t ** ppAig0, Aig_Man_t ** ppAi
{
*ppAig0 = Aig_ManDupNodesHalf( p, vSet0, 0 );
ABC_FREE( (*ppAig0)->pName );
- (*ppAig0)->pName = Aig_UtilStrsav( "part0" );
+ (*ppAig0)->pName = Abc_UtilStrsav( "part0" );
}
if ( ppAig1 )
{
*ppAig1 = Aig_ManDupNodesHalf( p, vSet1, 1 );
ABC_FREE( (*ppAig1)->pName );
- (*ppAig1)->pName = Aig_UtilStrsav( "part1" );
+ (*ppAig1)->pName = Abc_UtilStrsav( "part1" );
}
Vec_PtrFree( vSet0 );
Vec_PtrFree( vSet1 );
@@ -682,11 +682,11 @@ int Saig_ManDemiterSimpleDiff( Aig_Man_t * p, Aig_Man_t ** ppAig0, Aig_Man_t **
// create new AIG
*ppAig0 = Aig_ManDupNodesHalf( p, vSet0, 0 );
ABC_FREE( (*ppAig0)->pName );
- (*ppAig0)->pName = Aig_UtilStrsav( "part0" );
+ (*ppAig0)->pName = Abc_UtilStrsav( "part0" );
// create new AIGs
*ppAig1 = Aig_ManDupNodesHalf( p, vSet1, 1 );
ABC_FREE( (*ppAig1)->pName );
- (*ppAig1)->pName = Aig_UtilStrsav( "part1" );
+ (*ppAig1)->pName = Abc_UtilStrsav( "part1" );
// cleanup
Vec_PtrFree( vSet0 );
Vec_PtrFree( vSet1 );
@@ -812,13 +812,13 @@ int Saig_ManDemiterSimpleDiff_old( Aig_Man_t * p, Aig_Man_t ** ppAig0, Aig_Man_t
{
*ppAig0 = Aig_ManDupNodesAll( p, vSet0 );
ABC_FREE( (*ppAig0)->pName );
- (*ppAig0)->pName = Aig_UtilStrsav( "part0" );
+ (*ppAig0)->pName = Abc_UtilStrsav( "part0" );
}
if ( ppAig1 )
{
*ppAig1 = Aig_ManDupNodesAll( p, vSet1 );
ABC_FREE( (*ppAig1)->pName );
- (*ppAig1)->pName = Aig_UtilStrsav( "part1" );
+ (*ppAig1)->pName = Abc_UtilStrsav( "part1" );
}
Vec_PtrFree( vSet0 );
Vec_PtrFree( vSet1 );
@@ -984,14 +984,14 @@ int Saig_ManDemiter( Aig_Man_t * p, Aig_Man_t ** ppAig0, Aig_Man_t ** ppAig1 )
assert( 0 );
*ppAig0 = Aig_ManDupNodesHalf( p, vSet0, 0 ); // not ready
ABC_FREE( (*ppAig0)->pName );
- (*ppAig0)->pName = Aig_UtilStrsav( "part0" );
+ (*ppAig0)->pName = Abc_UtilStrsav( "part0" );
}
if ( ppAig1 )
{
assert( 0 );
*ppAig1 = Aig_ManDupNodesHalf( p, vSet1, 1 ); // not ready
ABC_FREE( (*ppAig1)->pName );
- (*ppAig1)->pName = Aig_UtilStrsav( "part1" );
+ (*ppAig1)->pName = Abc_UtilStrsav( "part1" );
}
Vec_PtrFree( vSet0 );
Vec_PtrFree( vSet1 );
diff --git a/src/aig/saig/saigOutDec.c b/src/aig/saig/saigOutDec.c
index d8cc591e..e72ea132 100644
--- a/src/aig/saig/saigOutDec.c
+++ b/src/aig/saig/saigOutDec.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
ABC_NAMESPACE_IMPL_START
@@ -160,7 +160,7 @@ Aig_Man_t * Saig_ManDecPropertyOutput( Aig_Man_t * pAig, int nLits, int fVerbose
// start the new manager
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
- pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+ pAigNew->pName = Abc_UtilStrsav( pAig->pName );
pAigNew->nConstrs = pAig->nConstrs;
// map the constant node
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
@@ -180,7 +180,7 @@ Aig_Man_t * Saig_ManDecPropertyOutput( Aig_Man_t * pAig, int nLits, int fVerbose
pMiter = Aig_ManConst1( pAigNew );
Vec_IntForEachEntry( vCube, Lit, i )
{
- pObj = Aig_NotCond( Aig_ObjCopy(Aig_ManObj(pAig, Aig_Lit2Var(Lit))), Aig_LitIsCompl(Lit) );
+ pObj = Aig_NotCond( Aig_ObjCopy(Aig_ManObj(pAig, Abc_Lit2Var(Lit))), Abc_LitIsCompl(Lit) );
pMiter = Aig_And( pAigNew, pMiter, pObj );
}
Aig_ObjCreatePo( pAigNew, pMiter );
diff --git a/src/aig/saig/saigPhase.c b/src/aig/saig/saigPhase.c
index bd7176fa..4107c5a2 100644
--- a/src/aig/saig/saigPhase.c
+++ b/src/aig/saig/saigPhase.c
@@ -145,10 +145,10 @@ Saig_Tsim_t * Saig_TsiStart( Aig_Man_t * pAig )
p = (Saig_Tsim_t *)ABC_ALLOC( char, sizeof(Saig_Tsim_t) );
memset( p, 0, sizeof(Saig_Tsim_t) );
p->pAig = pAig;
- p->nWords = Aig_BitWordNum( 2*Aig_ManRegNum(pAig) );
+ p->nWords = Abc_BitWordNum( 2*Aig_ManRegNum(pAig) );
p->vStates = Vec_PtrAlloc( 1000 );
p->pMem = Aig_MmFixedStart( sizeof(unsigned) * p->nWords + sizeof(unsigned *), 10000 );
- p->nBins = Aig_PrimeCudd(TSIM_MAX_ROUNDS/2);
+ p->nBins = Abc_PrimeCudd(TSIM_MAX_ROUNDS/2);
p->pBins = ABC_ALLOC( unsigned *, p->nBins );
memset( p->pBins, 0, sizeof(unsigned *) * p->nBins );
return p;
@@ -233,7 +233,7 @@ int Saig_TsiCountNonXValuedRegisters( Saig_Tsim_t * p, int nPref )
{
Vec_PtrForEachEntryStart( unsigned *, p->vStates, pState, k, nPref )
{
- Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+ Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
assert( Value != 0 );
if ( Value == SAIG_XVSX )
break;
@@ -266,7 +266,7 @@ Vec_Int_t * Saig_TsiComputeTransient( Saig_Tsim_t * p, int nPref )
{
Vec_PtrForEachEntry( unsigned *, p->vStates, pState, k )
{
- ValueThis = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+ ValueThis = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
//printf( "%s", (ValueThis == 1)? "0" : ((ValueThis == 2)? "1" : "x") );
assert( ValueThis != 0 );
if ( ValuePrev != ValueThis )
@@ -320,7 +320,7 @@ void Saig_TsiPrintTraces( Saig_Tsim_t * p, int nWords, int nPrefix, int nLoop )
/*
Vec_PtrForEachEntry( unsigned *, p->vStates, pState, k )
{
- Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+ Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
if ( Value == SAIG_XVSX )
break;
}
@@ -335,7 +335,7 @@ void Saig_TsiPrintTraces( Saig_Tsim_t * p, int nWords, int nPrefix, int nLoop )
printf( "%5d : ", Counter++ );
Vec_PtrForEachEntryStop( unsigned *, p->vStates, pState, k, Vec_PtrSize(p->vStates)-1 )
{
- Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+ Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
if ( Value == SAIG_XVS0 )
printf( "0" );
else if ( Value == SAIG_XVS1 )
@@ -458,7 +458,7 @@ void Saig_TsiStatePrint( Saig_Tsim_t * p, unsigned * pState )
int i, Value, nZeros = 0, nOnes = 0, nDcs = 0;
for ( i = 0; i < Aig_ManRegNum(p->pAig); i++ )
{
- Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+ Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
if ( Value == SAIG_XVS0 )
printf( "0" ), nZeros++;
else if ( Value == SAIG_XVS1 )
@@ -488,7 +488,7 @@ int Saig_TsiStateCount( Saig_Tsim_t * p, unsigned * pState )
int i, Value, nCounter = 0;
Aig_ManForEachLiLoSeq( p->pAig, pObjLi, pObjLo, i )
{
- Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+ Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
nCounter += (Value == SAIG_XVS0 || Value == SAIG_XVS1);
}
return nCounter;
@@ -559,9 +559,9 @@ Saig_Tsim_t * Saig_ManReachableTernary( Aig_Man_t * p, Vec_Int_t * vInits, int f
{
Value = Saig_ObjGetXsim(pObjLo);
if ( Value & 1 )
- Aig_InfoSetBit( pState, 2 * i );
+ Abc_InfoSetBit( pState, 2 * i );
if ( Value & 2 )
- Aig_InfoSetBit( pState, 2 * i + 1 );
+ Abc_InfoSetBit( pState, 2 * i + 1 );
}
// printf( "%d ", Saig_TsiStateCount(pTsi, pState) );
// Saig_TsiStatePrint( pTsi, pState );
@@ -679,7 +679,7 @@ int Saig_ManFindRegisters( Saig_Tsim_t * pTsi, int nFrames, int fIgnore, int fVe
pState = (unsigned *)Vec_PtrEntry( pTsi->vStates, k );
else
pState = (unsigned *)Vec_PtrEntry( pTsi->vStates, k - pTsi->nCycle );
- Value = (Aig_InfoHasBit( pState, 2 * Reg + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * Reg );
+ Value = (Abc_InfoHasBit( pState, 2 * Reg + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * Reg );
assert( Value == SAIG_XVS0 || Value == SAIG_XVS1 );
if ( k < nFrames || (fIgnore && k == nFrames) )
Values[k % nFrames] = Value;
@@ -761,8 +761,8 @@ Aig_Man_t * Saig_ManPerformAbstraction( Saig_Tsim_t * pTsi, int nFrames, int fVe
// start the fraig package
pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFrames );
- pFrames->pName = Aig_UtilStrsav( pAig->pName );
- pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pFrames->pName = Abc_UtilStrsav( pAig->pName );
+ pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
// map constant nodes
for ( f = 0; f < nFrames; f++ )
Saig_ObjSetFrames( pObjMap, nFrames, Aig_ManConst1(pAig), f, Aig_ManConst1(pFrames) );
@@ -782,7 +782,7 @@ Aig_Man_t * Saig_ManPerformAbstraction( Saig_Tsim_t * pTsi, int nFrames, int fVe
{
pObj = Saig_ManLo( pAig, Reg );
pState = (unsigned *)Vec_PtrEntry( pTsi->vStates, f );
- Value = (Aig_InfoHasBit( pState, 2 * Reg + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * Reg );
+ Value = (Abc_InfoHasBit( pState, 2 * Reg + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * Reg );
assert( Value == SAIG_XVS0 || Value == SAIG_XVS1 );
pObjNew = (Value == SAIG_XVS1)? Aig_ManConst1(pFrames) : Aig_ManConst0(pFrames);
Saig_ObjSetFrames( pObjMap, nFrames, pObj, f, pObjNew );
@@ -922,7 +922,7 @@ Aig_Man_t * Saig_ManPhaseAbstract( Aig_Man_t * p, Vec_Int_t * vInits, int nFrame
// derive information
pTsi->nPrefix = Saig_TsiComputePrefix( pTsi, (unsigned *)Vec_PtrEntryLast(pTsi->vStates), pTsi->nWords );
pTsi->nCycle = Vec_PtrSize(pTsi->vStates) - 1 - pTsi->nPrefix;
- pTsi->nNonXRegs = Saig_TsiCountNonXValuedRegisters(pTsi, ABC_MIN(pTsi->nPrefix,nPref));
+ pTsi->nNonXRegs = Saig_TsiCountNonXValuedRegisters(pTsi, Abc_MinInt(pTsi->nPrefix,nPref));
// print statistics
if ( fVerbose )
{
@@ -1066,8 +1066,8 @@ Abc_Cex_t * Saig_PhaseTranslateCex( Aig_Man_t * p, Abc_Cex_t * pCex )
pNew->iPo = pCex->iPo % Saig_ManPoNum(p);
// copy the bit data
for ( i = pCex->nRegs, k = pNew->nRegs; k < pNew->nBits; k++, i++ )
- if ( Aig_InfoHasBit( pCex->pData, i ) )
- Aig_InfoSetBit( pNew->pData, k );
+ if ( Abc_InfoHasBit( pCex->pData, i ) )
+ Abc_InfoSetBit( pNew->pData, k );
assert( i <= pCex->nBits );
return pNew;
}
diff --git a/src/aig/saig/saigRefSat.c b/src/aig/saig/saigRefSat.c
index b2ea80a6..1f862c1a 100644
--- a/src/aig/saig/saigRefSat.c
+++ b/src/aig/saig/saigRefSat.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
ABC_NAMESPACE_IMPL_START
@@ -95,13 +95,13 @@ Abc_Cex_t * Saig_RefManReason2Cex( Saig_RefMan_t * p, Vec_Int_t * vReasons )
Abc_Cex_t * pCare;
int i, Entry, iInput, iFrame;
pCare = Abc_CexDup( p->pCex, p->pCex->nRegs );
- memset( pCare->pData, 0, sizeof(unsigned) * Aig_BitWordNum(pCare->nBits) );
+ memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
Vec_IntForEachEntry( vReasons, Entry, i )
{
assert( Entry >= 0 && Entry < Aig_ManPiNum(p->pFrames) );
iInput = Vec_IntEntry( p->vMapPiF2A, 2*Entry );
iFrame = Vec_IntEntry( p->vMapPiF2A, 2*Entry+1 );
- Aig_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
+ Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
}
return pCare;
}
@@ -181,7 +181,7 @@ Vec_Int_t * Saig_RefManFindReason( Saig_RefMan_t * p )
{
int iInput = Vec_IntEntry( p->vMapPiF2A, 2*i );
int iFrame = Vec_IntEntry( p->vMapPiF2A, 2*i+1 );
- pObj->fPhase = Aig_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
+ pObj->fPhase = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
// assign priority
if ( Vec_IntEntry(vPi2Prio, iInput) == ~0 )
Vec_IntWriteEntry( vPi2Prio, iInput, CountPrios++ );
@@ -295,11 +295,11 @@ Aig_Man_t * Saig_ManUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nInpu
// derive unrolled timeframes
pFrames = Aig_ManStart( 10000 );
- pFrames->pName = Aig_UtilStrsav( pAig->pName );
- pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pFrames->pName = Abc_UtilStrsav( pAig->pName );
+ pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
// initialize the flops
Saig_ManForEachLo( pAig, pObj, i )
- pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Aig_InfoHasBit(pCex->pData, i) );
+ pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Abc_InfoHasBit(pCex->pData, i) );
// iterate through the frames
for ( f = 0; f <= pCex->iFrame; f++ )
{
@@ -318,7 +318,7 @@ Aig_Man_t * Saig_ManUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nInpu
if ( Aig_ObjPioNum(pObj) < nInputs )
{
int iBit = pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj);
- pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Aig_InfoHasBit(pCex->pData, iBit) );
+ pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Abc_InfoHasBit(pCex->pData, iBit) );
}
else
{
@@ -409,9 +409,9 @@ int Saig_RefManSetPhases( Saig_RefMan_t * p, Abc_Cex_t * pCare, int fValue1 )
{
iInput = Vec_IntEntry( p->vMapPiF2A, 2*i );
iFrame = Vec_IntEntry( p->vMapPiF2A, 2*i+1 );
- pObj->fPhase = Aig_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
+ pObj->fPhase = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
// update value if it is a don't-care
- if ( pCare && !Aig_InfoHasBit( pCare->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ) )
+ if ( pCare && !Abc_InfoHasBit( pCare->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ) )
pObj->fPhase = fValue1;
}
Aig_ManForEachNode( p->pFrames, pObj, i )
@@ -448,7 +448,7 @@ Vec_Vec_t * Saig_RefManOrderLiterals( Saig_RefMan_t * p, Vec_Int_t * vVar2PiId,
assert( iPiNum >= 0 && iPiNum < Aig_ManPiNum(p->pFrames) );
iInput = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum );
iFrame = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum+1 );
-// Aig_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
+// Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
if ( Vec_IntEntry( vVar2New, iInput ) == ~0 )
Vec_IntWriteEntry( vVar2New, iInput, Vec_VecSize(vLits) );
Vec_VecPushInt( vLits, Vec_IntEntry( vVar2New, iInput ), Entry );
@@ -475,14 +475,14 @@ Abc_Cex_t * Saig_RefManCreateCex( Saig_RefMan_t * p, Vec_Int_t * vVar2PiId, Vec_
int i, Entry, iInput, iFrame;
// create counter-example
pCare = Abc_CexDup( p->pCex, p->pCex->nRegs );
- memset( pCare->pData, 0, sizeof(unsigned) * Aig_BitWordNum(pCare->nBits) );
+ memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
Vec_IntForEachEntry( vAssumps, Entry, i )
{
int iPiNum = Vec_IntEntry( vVar2PiId, lit_var(Entry) );
assert( iPiNum >= 0 && iPiNum < Aig_ManPiNum(p->pFrames) );
iInput = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum );
iFrame = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum+1 );
- Aig_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
+ Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
}
return pCare;
}
@@ -540,7 +540,7 @@ Abc_Cex_t * Saig_RefManRunSat( Saig_RefMan_t * p, int fNewOrder )
printf( "The problem is trivially UNSAT. The CEX is real.\n" );
// create counter-example
pCare = Abc_CexDup( p->pCex, p->pCex->nRegs );
- memset( pCare->pData, 0, sizeof(unsigned) * Aig_BitWordNum(pCare->nBits) );
+ memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
return pCare;
}
// the problem is SAT - it is expected
@@ -552,7 +552,7 @@ Abc_Cex_t * Saig_RefManRunSat( Saig_RefMan_t * p, int fNewOrder )
{
int iInput = Vec_IntEntry( p->vMapPiF2A, 2*i );
int iFrame = Vec_IntEntry( p->vMapPiF2A, 2*i+1 );
-// RetValue = Aig_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
+// RetValue = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
// Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !RetValue ) );
Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], 1 ) );
Vec_IntWriteEntry( vVar2PiId, pCnf->pVarNums[Aig_ObjId(pObj)], i );
@@ -740,7 +740,7 @@ Vec_Int_t * Saig_RefManRefineWithSat( Saig_RefMan_t * p, Vec_Int_t * vAigPis )
int iFrame = Vec_IntEntry( p->vMapPiF2A, 2*i+1 );
if ( Vec_IntEntry(vVisited, iInput) == 0 )
continue;
- RetValue = Aig_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
+ RetValue = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !RetValue ) );
// Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], 1 ) );
Vec_IntWriteEntry( vVar2PiId, pCnf->pVarNums[Aig_ObjId(pObj)], i );
diff --git a/src/aig/saig/saigRetMin.c b/src/aig/saig/saigRetMin.c
index cce7dcc6..3f06177c 100644
--- a/src/aig/saig/saigRetMin.c
+++ b/src/aig/saig/saigRetMin.c
@@ -20,10 +20,10 @@
#include "saig.h"
-#include "nwk.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "satStore.h"
+#include "src/opt/nwk/nwk.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/bsat/satStore.h"
ABC_NAMESPACE_IMPL_START
@@ -287,8 +287,8 @@ Aig_Man_t * Saig_ManRetimeDupForward( Aig_Man_t * p, Vec_Ptr_t * vCut )
// assert( Vec_PtrSize(vCut) == Saig_ManRetimeCountCut(p, vCut) );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nRegs = Vec_PtrSize(vCut);
pNew->nTruePis = p->nTruePis;
pNew->nTruePos = p->nTruePos;
@@ -346,8 +346,8 @@ Aig_Man_t * Saig_ManRetimeDupBackward( Aig_Man_t * p, Vec_Ptr_t * vCut, Vec_Int_
// assert( Vec_PtrSize(vCut) == Saig_ManRetimeCountCut(p, vCut) );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nRegs = Vec_PtrSize(vCut);
pNew->nTruePis = p->nTruePis;
pNew->nTruePos = p->nTruePos;
diff --git a/src/aig/saig/saigSimExt.c b/src/aig/saig/saigSimExt.c
index ac0fa697..021481b9 100644
--- a/src/aig/saig/saigSimExt.c
+++ b/src/aig/saig/saigSimExt.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "saig.h"
-#include "ssw.h"
+#include "src/proof/ssw/ssw.h"
ABC_NAMESPACE_IMPL_START
@@ -111,12 +111,12 @@ int Saig_ManSimDataInit( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo,
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
int i, f, Entry, iBit = 0;
Saig_ManForEachLo( p, pObj, i )
- Saig_ManSimInfoSet( vSimInfo, pObj, 0, Aig_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
+ Saig_ManSimInfoSet( vSimInfo, pObj, 0, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
for ( f = 0; f <= pCex->iFrame; f++ )
{
Saig_ManSimInfoSet( vSimInfo, Aig_ManConst1(p), f, SAIG_ONE );
Saig_ManForEachPi( p, pObj, i )
- Saig_ManSimInfoSet( vSimInfo, pObj, f, Aig_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
+ Saig_ManSimInfoSet( vSimInfo, pObj, f, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
if ( vRes )
Vec_IntForEachEntry( vRes, Entry, i )
Saig_ManSimInfoSet( vSimInfo, Aig_ManPi(p, Entry), f, SAIG_UND );
@@ -251,7 +251,7 @@ Vec_Int_t * Saig_ManExtendCounterExample0( Aig_Man_t * p, int iFirstFlopPi, Abc_
Vec_Int_t * vRes, * vResInv, * vUndo, * vVis, * vVis2;
int i, f, Value;
// assert( Aig_ManRegNum(p) > 0 );
- assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+ assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
// start simulation data
Value = Saig_ManSimDataInit( p, pCex, vSimInfo, NULL );
assert( Value == SAIG_ONE );
@@ -301,7 +301,7 @@ Vec_Int_t * Saig_ManExtendCounterExample1( Aig_Man_t * p, int iFirstFlopPi, Abc_
Vec_Int_t * vRes, * vResInv, * vUndo, * vVis, * vVis2;
int i, f, Value;
// assert( Aig_ManRegNum(p) > 0 );
- assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+ assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
// start simulation data
Value = Saig_ManSimDataInit( p, pCex, vSimInfo, NULL );
assert( Value == SAIG_ONE );
@@ -351,7 +351,7 @@ Vec_Int_t * Saig_ManExtendCounterExample2( Aig_Man_t * p, int iFirstFlopPi, Abc_
Vec_Int_t * vRes, * vResInv, * vUndo, * vVis, * vVis2;
int i, f, Value;
// assert( Aig_ManRegNum(p) > 0 );
- assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+ assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
// start simulation data
Value = Saig_ManSimDataInit( p, pCex, vSimInfo, NULL );
assert( Value == SAIG_ONE );
@@ -419,7 +419,7 @@ Vec_Int_t * Saig_ManExtendCounterExample3( Aig_Man_t * p, int iFirstFlopPi, Abc_
Vec_Int_t * vRes, * vResInv, * vUndo, * vVis, * vVis2;
int i, f, Value;
// assert( Aig_ManRegNum(p) > 0 );
- assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+ assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
// start simulation data
Value = Saig_ManSimDataInit( p, pCex, vSimInfo, NULL );
assert( Value == SAIG_ONE );
@@ -529,8 +529,8 @@ Vec_Int_t * Saig_ManExtendCounterExampleTest( Aig_Man_t * p, int iFirstFlopPi, A
return NULL;
}
Aig_ManFanoutStart( p );
- vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Aig_BitWordNum(2*(pCex->iFrame+1)) );
- Vec_PtrCleanSimInfo( vSimInfo, 0, Aig_BitWordNum(2*(pCex->iFrame+1)) );
+ vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Abc_BitWordNum(2*(pCex->iFrame+1)) );
+ Vec_PtrCleanSimInfo( vSimInfo, 0, Abc_BitWordNum(2*(pCex->iFrame+1)) );
clk = clock();
if ( fTryFour )
diff --git a/src/aig/saig/saigSimExt2.c b/src/aig/saig/saigSimExt2.c
index 3d9cc88a..858c2b3b 100644
--- a/src/aig/saig/saigSimExt2.c
+++ b/src/aig/saig/saigSimExt2.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "saig.h"
-#include "ssw.h"
+#include "src/proof/ssw/ssw.h"
ABC_NAMESPACE_IMPL_START
@@ -139,12 +139,12 @@ int Saig_ManSimDataInit2( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
int i, f, iBit = 0;
Saig_ManForEachLo( p, pObj, i )
- Saig_ManSimInfo2Set( vSimInfo, pObj, 0, Aig_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE_NEW:SAIG_ZER_NEW );
+ Saig_ManSimInfo2Set( vSimInfo, pObj, 0, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE_NEW:SAIG_ZER_NEW );
for ( f = 0; f <= pCex->iFrame; f++ )
{
Saig_ManSimInfo2Set( vSimInfo, Aig_ManConst1(p), f, SAIG_ONE_NEW );
Saig_ManForEachPi( p, pObj, i )
- Saig_ManSimInfo2Set( vSimInfo, pObj, f, Aig_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE_NEW:SAIG_ZER_NEW );
+ Saig_ManSimInfo2Set( vSimInfo, pObj, f, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE_NEW:SAIG_ZER_NEW );
Aig_ManForEachNode( p, pObj, i )
Saig_ManExtendOneEval2( vSimInfo, pObj, f );
Aig_ManForEachPo( p, pObj, i )
@@ -284,7 +284,7 @@ Vec_Int_t * Saig_ManProcessCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCe
Vec_Int_t * vRes, * vResInv;
int i, f, Value;
// assert( Aig_ManRegNum(p) > 0 );
- assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+ assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
// start simulation data
Value = Saig_ManSimDataInit2( p, pCex, vSimInfo );
assert( Value == SAIG_ONE_NEW );
@@ -345,8 +345,8 @@ Vec_Int_t * Saig_ManExtendCounterExampleTest2( Aig_Man_t * p, int iFirstFlopPi,
return NULL;
}
Aig_ManFanoutStart( p );
- vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Aig_BitWordNum(2*(pCex->iFrame+1)) );
- Vec_PtrCleanSimInfo( vSimInfo, 0, Aig_BitWordNum(2*(pCex->iFrame+1)) );
+ vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Abc_BitWordNum(2*(pCex->iFrame+1)) );
+ Vec_PtrCleanSimInfo( vSimInfo, 0, Abc_BitWordNum(2*(pCex->iFrame+1)) );
clk = clock();
vRes = Saig_ManProcessCex( p, iFirstFlopPi, pCex, vSimInfo, fVerbose );
@@ -382,7 +382,7 @@ Abc_Cex_t * Saig_ManDeriveCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCex
Vec_Int_t * vRes, * vResInv;
int i, f, Value;
// assert( Aig_ManRegNum(p) > 0 );
- assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+ assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
// start simulation data
Value = Saig_ManSimDataInit2( p, pCex, vSimInfo );
assert( Value == SAIG_ONE_NEW );
@@ -400,7 +400,7 @@ Abc_Cex_t * Saig_ManDeriveCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCex
// create CEX
pCare = Abc_CexDup( pCex, pCex->nRegs );
- memset( pCare->pData, 0, sizeof(unsigned) * Aig_BitWordNum(pCare->nBits) );
+ memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
// select the result
vRes = Vec_IntAlloc( 1000 );
@@ -414,7 +414,7 @@ Abc_Cex_t * Saig_ManDeriveCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCex
if ( Saig_ManSimInfo2IsOld( Value ) )
{
fFound = 1;
- Aig_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * f + i );
+ Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * f + i );
}
}
if ( fFound )
@@ -454,8 +454,8 @@ Abc_Cex_t * Saig_ManFindCexCareBitsSense( Aig_Man_t * p, Abc_Cex_t * pCex, int i
return NULL;
}
Aig_ManFanoutStart( p );
- vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Aig_BitWordNum(2*(pCex->iFrame+1)) );
- Vec_PtrCleanSimInfo( vSimInfo, 0, Aig_BitWordNum(2*(pCex->iFrame+1)) );
+ vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Abc_BitWordNum(2*(pCex->iFrame+1)) );
+ Vec_PtrCleanSimInfo( vSimInfo, 0, Abc_BitWordNum(2*(pCex->iFrame+1)) );
clk = clock();
pCare = Saig_ManDeriveCex( p, iFirstFlopPi, pCex, vSimInfo, fVerbose );
diff --git a/src/aig/saig/saigSimFast.c b/src/aig/saig/saigSimFast.c
index 1840eaa7..b8eed19e 100644
--- a/src/aig/saig/saigSimFast.c
+++ b/src/aig/saig/saigSimFast.c
@@ -20,7 +20,7 @@
#include "saig.h"
-#include "main.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/saig/saigSimMv.c b/src/aig/saig/saigSimMv.c
index 7076d07b..6579c37b 100644
--- a/src/aig/saig/saigSimMv.c
+++ b/src/aig/saig/saigSimMv.c
@@ -184,7 +184,7 @@ static inline int Saig_MvCreateObj( Saig_MvMan_t * p, int iFan0, int iFan1 )
pNode->iFan1 = iFan1;
pNode->iNext = 0;
if ( iFan0 || iFan1 )
- p->pLevels[p->nObjs] = 1 + ABC_MAX( Saig_MvLev(p, iFan0), Saig_MvLev(p, iFan1) );
+ p->pLevels[p->nObjs] = 1 + Abc_MaxInt( Saig_MvLev(p, iFan0), Saig_MvLev(p, iFan1) );
else
p->pLevels[p->nObjs] = 0, p->nPis++;
return p->nObjs++;
@@ -216,7 +216,7 @@ Saig_MvMan_t * Saig_MvManStart( Aig_Man_t * pAig, int nFramesSatur )
p->nFlops = Aig_ManRegNum(pAig);
// compacted AIG
p->pAigOld = Saig_ManCreateReducedAig( pAig, &p->vFlops );
- p->nTStatesSize = Aig_PrimeCudd( p->nStatesMax );
+ p->nTStatesSize = Abc_PrimeCudd( p->nStatesMax );
p->pTStates = ABC_CALLOC( unsigned, p->nTStatesSize );
p->pMemStates = Aig_MmFixedStart( sizeof(int) * (p->nFlops+1), p->nStatesMax );
p->vStates = Vec_PtrAlloc( p->nStatesMax );
@@ -231,7 +231,7 @@ Saig_MvMan_t * Saig_MvManStart( Aig_Man_t * pAig, int nFramesSatur )
// internal AIG
p->nObjsAlloc = 1000000;
p->pAigNew = ABC_ALLOC( Saig_MvAnd_t, p->nObjsAlloc );
- p->nTNodesSize = Aig_PrimeCudd( p->nObjsAlloc / 3 );
+ p->nTNodesSize = Abc_PrimeCudd( p->nObjsAlloc / 3 );
p->pTNodes = ABC_CALLOC( int, p->nTNodesSize );
p->pLevels = ABC_ALLOC( unsigned char, p->nObjsAlloc );
Saig_MvCreateObj( p, 0, 0 );
diff --git a/src/aig/saig/saigSimSeq.c b/src/aig/saig/saigSimSeq.c
index cc5a9e05..538afef0 100644
--- a/src/aig/saig/saigSimSeq.c
+++ b/src/aig/saig/saigSimSeq.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "saig.h"
-#include "ssw.h"
+#include "src/proof/ssw/ssw.h"
ABC_NAMESPACE_IMPL_START
@@ -433,8 +433,8 @@ Abc_Cex_t * Raig_ManGenerateCounter( Aig_Man_t * pAig, int iFrame, int iOut, int
continue;
for ( w = 0; w < nWords; w++ )
pData[w] = Aig_ManRandom( 0 );
- if ( Aig_InfoHasBit( pData, iPat ) )
- Aig_InfoSetBit( p->pData, Counter + iPioId );
+ if ( Abc_InfoHasBit( pData, iPat ) )
+ Abc_InfoSetBit( p->pData, Counter + iPioId );
}
ABC_FREE( pData );
return p;
diff --git a/src/aig/saig/saigStrSim.c b/src/aig/saig/saigStrSim.c
index 1d69630f..cdf177d0 100644
--- a/src/aig/saig/saigStrSim.c
+++ b/src/aig/saig/saigStrSim.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "saig.h"
-#include "ssw.h"
+#include "src/proof/ssw/ssw.h"
ABC_NAMESPACE_IMPL_START
@@ -398,7 +398,7 @@ int Saig_StrSimDetectUnique( Aig_Man_t * p0, Aig_Man_t * p1 )
int i, nTableSize, Counter;
// allocate the hash table hashing simulation info into nodes
- nTableSize = Aig_PrimeCudd( Aig_ManObjNum(p0)/2 );
+ nTableSize = Abc_PrimeCudd( Aig_ManObjNum(p0)/2 );
ppTable = ABC_CALLOC( Aig_Obj_t *, nTableSize );
ppNexts = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p0) );
ppCands = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p0) );
diff --git a/src/aig/saig/saigSwitch.c b/src/aig/saig/saigSwitch.c
index bbad9be4..01411c05 100644
--- a/src/aig/saig/saigSwitch.c
+++ b/src/aig/saig/saigSwitch.c
@@ -20,7 +20,7 @@
#include "saig.h"
-#include "main.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/saig/saigSynch.c b/src/aig/saig/saigSynch.c
index 00f7517e..08a10b66 100644
--- a/src/aig/saig/saigSynch.c
+++ b/src/aig/saig/saigSynch.c
@@ -471,7 +471,7 @@ Aig_Man_t * Saig_ManDupInitZero( Aig_Man_t * p )
Aig_Obj_t * pObj;
int i;
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Saig_ManForEachPi( p, pObj, i )
pObj->pData = Aig_ObjCreatePi( pNew );
@@ -619,7 +619,7 @@ Aig_Man_t * Saig_Synchronize( Aig_Man_t * pAig1, Aig_Man_t * pAig2, int nWords,
return NULL;
}
clk = clock();
- vSimInfo = Vec_PtrAllocSimInfo( ABC_MAX( Aig_ManObjNumMax(pAig1), Aig_ManObjNumMax(pAig2) ), 1 );
+ vSimInfo = Vec_PtrAllocSimInfo( Abc_MaxInt( Aig_ManObjNumMax(pAig1), Aig_ManObjNumMax(pAig2) ), 1 );
// process Design 1
RetValue = Saig_SynchSequenceRun( pAig1, vSimInfo, vSeq1, 1 );
diff --git a/src/aig/saig/saigTempor.c b/src/aig/saig/saigTempor.c
index fc57c1f5..1a6f1919 100644
--- a/src/aig/saig/saigTempor.c
+++ b/src/aig/saig/saigTempor.c
@@ -50,7 +50,7 @@ Aig_Man_t * Saig_ManTemporFrames( Aig_Man_t * pAig, int nFrames )
// start the frames package
Aig_ManCleanData( pAig );
pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFrames );
- pFrames->pName = Aig_UtilStrsav( pAig->pName );
+ pFrames->pName = Abc_UtilStrsav( pAig->pName );
// initiliaze the flops
Saig_ManForEachLo( pAig, pObj, i )
pObj->pData = Aig_ManConst0(pFrames);
@@ -103,7 +103,7 @@ Aig_Man_t * Saig_ManTemporDecompose( Aig_Man_t * pAig, int nFrames )
// start the new manager
Aig_ManCleanData( pAig );
pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
- pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+ pAigNew->pName = Abc_UtilStrsav( pAig->pName );
// map the constant node and primary inputs
Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
Saig_ManForEachPi( pAig, pObj, i )
diff --git a/src/aig/saig/saigTrans.c b/src/aig/saig/saigTrans.c
index 09639e27..11e775e5 100644
--- a/src/aig/saig/saigTrans.c
+++ b/src/aig/saig/saigTrans.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "saig.h"
-#include "fra.h"
+#include "src/proof/fra/fra.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/saig/saigWnd.c b/src/aig/saig/saigWnd.c
index c11798ea..6753370f 100644
--- a/src/aig/saig/saigWnd.c
+++ b/src/aig/saig/saigWnd.c
@@ -232,7 +232,7 @@ Aig_Man_t * Saig_ManWindowExtractNodes( Aig_Man_t * p, Vec_Ptr_t * vNodes )
Aig_ManCleanData( p );
// create the new manager
pNew = Aig_ManStart( Vec_PtrSize(vNodes) );
- pNew->pName = Aig_UtilStrsav( "wnd" );
+ pNew->pName = Abc_UtilStrsav( "wnd" );
pNew->pSpec = NULL;
// map constant nodes
pObj = Aig_ManConst1( p );
@@ -375,8 +375,8 @@ Aig_Man_t * Saig_ManWindowInsertNodes( Aig_Man_t * p, Vec_Ptr_t * vNodes, Aig_Ma
Aig_ManCleanData( p );
Aig_ManCleanData( pWnd );
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// map constant nodes
pObj = Aig_ManConst1( p );
pObj->pData = Aig_ManConst1( pNew );
@@ -745,7 +745,7 @@ Aig_Man_t * Saig_ManWindowExtractMiter( Aig_Man_t * p0, Aig_Man_t * p1 )
vNodes1 = Saig_ManCollectedDiffNodes( p1, p0 );
// create the new manager
pNew = Aig_ManStart( Vec_PtrSize(vNodes0) + Vec_PtrSize(vNodes1) );
- pNew->pName = Aig_UtilStrsav( "wnd" );
+ pNew->pName = Abc_UtilStrsav( "wnd" );
pNew->pSpec = NULL;
// map constant nodes
pObj0 = Aig_ManConst1( p0 );
diff --git a/src/aig/ssw/module.make b/src/aig/ssw/module.make
deleted file mode 100644
index b6b813b1..00000000
--- a/src/aig/ssw/module.make
+++ /dev/null
@@ -1,20 +0,0 @@
-SRC += src/aig/ssw/sswAig.c \
- src/aig/ssw/sswBmc.c \
- src/aig/ssw/sswClass.c \
- src/aig/ssw/sswCnf.c \
- src/aig/ssw/sswConstr.c \
- src/aig/ssw/sswCore.c \
- src/aig/ssw/sswDyn.c \
- src/aig/ssw/sswFilter.c \
- src/aig/ssw/sswIslands.c \
- src/aig/ssw/sswLcorr.c \
- src/aig/ssw/sswMan.c \
- src/aig/ssw/sswPart.c \
- src/aig/ssw/sswPairs.c \
- src/aig/ssw/sswRarity.c \
- src/aig/ssw/sswSat.c \
- src/aig/ssw/sswSemi.c \
- src/aig/ssw/sswSim.c \
- src/aig/ssw/sswSimSat.c \
- src/aig/ssw/sswSweep.c \
- src/aig/ssw/sswUnique.c
diff --git a/src/aig/tim/module.make b/src/aig/tim/module.make
deleted file mode 100644
index 81079346..00000000
--- a/src/aig/tim/module.make
+++ /dev/null
@@ -1 +0,0 @@
-SRC += src/aig/tim/tim.c
diff --git a/src/base/abc/abc.h b/src/base/abc/abc.h
index 587d50d8..a0b65e63 100644
--- a/src/base/abc/abc.h
+++ b/src/base/abc/abc.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __ABC_H__
-#define __ABC_H__
+#ifndef ABC__base__abc__abc_h
+#define ABC__base__abc__abc_h
////////////////////////////////////////////////////////////////////////
@@ -32,13 +32,14 @@
#include <assert.h>
#include <time.h>
-#include "vec.h"
-#include "hop.h"
-#include "st.h"
-#include "stmm.h"
-#include "nm.h"
-#include "mem.h"
-#include "utilCex.h"
+#include "src/misc/vec/vec.h"
+#include "src/aig/hop/hop.h"
+#include "src/misc/st/st.h"
+#include "src/misc/st/stmm.h"
+#include "src/misc/nm/nm.h"
+#include "src/misc/mem/mem.h"
+#include "src/misc/util/utilCex.h"
+#include "src/misc/extra/extra.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
@@ -239,15 +240,6 @@ struct Abc_Lib_t_
////////////////////////////////////////////////////////////////////////
// transforming floats into ints and back
-//static inline int Abc_Float2Int( float Val ) { return *((int *)&Val); }
-//static inline float Abc_Int2Float( int Num ) { return *((float *)&Num); }
-static inline int Abc_Float2Int( float Val ) { union { int x; float y; } v; v.y = Val; return v.x; }
-static inline float Abc_Int2Float( int Num ) { union { int x; float y; } v; v.x = Num; return v.y; }
-static inline int Abc_BitWordNum( int nBits ) { return (nBits>>5) + ((nBits&31) > 0); }
-static inline int Abc_TruthWordNum( int nVars ) { return nVars <= 5 ? 1 : (1 << (nVars - 5)); }
-static inline int Abc_InfoHasBit( unsigned * p, int i ) { return (p[(i)>>5] & (1<<((i) & 31))) > 0; }
-static inline void Abc_InfoSetBit( unsigned * p, int i ) { p[(i)>>5] |= (1<<((i) & 31)); }
-static inline void Abc_InfoXorBit( unsigned * p, int i ) { p[(i)>>5] ^= (1<<((i) & 31)); }
static inline unsigned Abc_InfoRandomWord() { return ((((unsigned)rand()) << 24) ^ (((unsigned)rand()) << 12) ^ ((unsigned)rand())); } // #define RAND_MAX 0x7fff
static inline void Abc_InfoRandom( unsigned * p, int nWords ) { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i] = Abc_InfoRandomWord(); }
static inline void Abc_InfoClear( unsigned * p, int nWords ) { memset( p, 0, sizeof(unsigned) * nWords ); }
diff --git a/src/base/abc/abcAig.c b/src/base/abc/abcAig.c
index c6611a1a..d594846b 100644
--- a/src/base/abc/abcAig.c
+++ b/src/base/abc/abcAig.c
@@ -19,7 +19,6 @@
***********************************************************************/
#include "abc.h"
-#include "extra.h"
ABC_NAMESPACE_IMPL_START
@@ -133,7 +132,7 @@ Abc_Aig_t * Abc_AigAlloc( Abc_Ntk_t * pNtkAig )
pMan = ABC_ALLOC( Abc_Aig_t, 1 );
memset( pMan, 0, sizeof(Abc_Aig_t) );
// allocate the table
- pMan->nBins = Cudd_Prime( 10000 );
+ pMan->nBins = Abc_PrimeCudd( 10000 );
pMan->pBins = ABC_ALLOC( Abc_Obj_t *, pMan->nBins );
memset( pMan->pBins, 0, sizeof(Abc_Obj_t *) * pMan->nBins );
pMan->vNodes = Vec_PtrAlloc( 100 );
@@ -250,7 +249,7 @@ int Abc_AigCheck( Abc_Aig_t * pMan )
printf( "Abc_AigCheck: The AIG has non-standard nodes.\n" );
return 0;
}
- if ( pObj->Level != 1 + ABC_MAX( Abc_ObjFanin0(pObj)->Level, Abc_ObjFanin1(pObj)->Level ) )
+ if ( pObj->Level != 1 + (unsigned)Abc_MaxInt( Abc_ObjFanin0(pObj)->Level, Abc_ObjFanin1(pObj)->Level ) )
printf( "Abc_AigCheck: Node \"%s\" has level that does not agree with the fanin levels.\n", Abc_ObjName(pObj) );
pAnd = Abc_AigAndLookup( pMan, Abc_ObjChild0(pObj), Abc_ObjChild1(pObj) );
if ( pAnd != pObj )
@@ -330,7 +329,7 @@ Abc_Obj_t * Abc_AigAndCreate( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t * p1 )
Abc_ObjAddFanin( pAnd, p0 );
Abc_ObjAddFanin( pAnd, p1 );
// set the level of the new node
- pAnd->Level = 1 + ABC_MAX( Abc_ObjRegular(p0)->Level, Abc_ObjRegular(p1)->Level );
+ pAnd->Level = 1 + Abc_MaxInt( Abc_ObjRegular(p0)->Level, Abc_ObjRegular(p1)->Level );
pAnd->fExor = Abc_NodeIsExorType(pAnd);
pAnd->fPhase = (Abc_ObjIsComplement(p0) ^ Abc_ObjRegular(p0)->fPhase) & (Abc_ObjIsComplement(p1) ^ Abc_ObjRegular(p1)->fPhase);
// add the node to the corresponding linked list in the table
@@ -374,7 +373,7 @@ Abc_Obj_t * Abc_AigAndCreateFrom( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t *
Abc_ObjAddFanin( pAnd, p0 );
Abc_ObjAddFanin( pAnd, p1 );
// set the level of the new node
- pAnd->Level = 1 + ABC_MAX( Abc_ObjRegular(p0)->Level, Abc_ObjRegular(p1)->Level );
+ pAnd->Level = 1 + Abc_MaxInt( Abc_ObjRegular(p0)->Level, Abc_ObjRegular(p1)->Level );
pAnd->fExor = Abc_NodeIsExorType(pAnd);
// add the node to the corresponding linked list in the table
Key = Abc_HashKey2( p0, p1, pMan->nBins );
@@ -595,7 +594,7 @@ void Abc_AigResize( Abc_Aig_t * pMan )
clk = clock();
// get the new table size
- nBinsNew = Cudd_Prime( 3 * pMan->nBins );
+ nBinsNew = Abc_PrimeCudd( 3 * pMan->nBins );
// allocate a new array
pBinsNew = ABC_ALLOC( Abc_Obj_t *, nBinsNew );
memset( pBinsNew, 0, sizeof(Abc_Obj_t *) * nBinsNew );
@@ -1076,7 +1075,7 @@ void Abc_AigUpdateLevel_int( Abc_Aig_t * pMan )
if ( Abc_ObjIsCo(pFanout) )
continue;
// get the new level of this fanout
- LevelNew = 1 + ABC_MAX( Abc_ObjFanin0(pFanout)->Level, Abc_ObjFanin1(pFanout)->Level );
+ LevelNew = 1 + Abc_MaxInt( Abc_ObjFanin0(pFanout)->Level, Abc_ObjFanin1(pFanout)->Level );
assert( LevelNew > i );
if ( (int)pFanout->Level == LevelNew ) // no change
continue;
diff --git a/src/base/abc/abcBlifMv.c b/src/base/abc/abcBlifMv.c
index cffdc8da..47a4c15e 100644
--- a/src/base/abc/abcBlifMv.c
+++ b/src/base/abc/abcBlifMv.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "abc.h"
-#include "extra.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
@@ -401,7 +401,7 @@ Abc_Ntk_t * Abc_NtkStrashBlifMv( Abc_Ntk_t * pNtk )
if ( nValuesMax < nValues )
nValuesMax = nValues;
}
- nBits = Extra_Base2Log( nValuesMax );
+ nBits = Abc_Base2Log( nValuesMax );
pBits = ABC_ALLOC( Abc_Obj_t *, nBits );
// clean the node copy fields
@@ -474,7 +474,7 @@ Abc_Ntk_t * Abc_NtkStrashBlifMv( Abc_Ntk_t * pNtk )
nValues = Abc_ObjMvVarNum(pNet);
pValues = ABC_ALLOC( Abc_Obj_t *, nValues );
// create PIs for the encoding bits
- nBits = Extra_Base2Log( nValues );
+ nBits = Abc_Base2Log( nValues );
for ( k = 0; k < nBits; k++ )
{
pBits[k] = Abc_NtkCreatePi( pNtkNew );
@@ -506,7 +506,7 @@ Abc_Ntk_t * Abc_NtkStrashBlifMv( Abc_Ntk_t * pNtk )
nValues = Abc_ObjMvVarNum(pNet);
pValues = ABC_ALLOC( Abc_Obj_t *, nValues );
// create PIs for the encoding bits
- nBits = Extra_Base2Log( nValues );
+ nBits = Abc_Base2Log( nValues );
for ( k = 0; k < nBits; k++ )
{
pBits[k] = Abc_NtkCreateBo( pNtkNew );
@@ -602,7 +602,7 @@ Abc_Ntk_t * Abc_NtkStrashBlifMv( Abc_Ntk_t * pNtk )
// Abc_NodeSetTravIdCurrent( pNet );
nValues = Abc_ObjMvVarNum(pNet);
pValues = (Abc_Obj_t **)pNet->pCopy;
- nBits = Extra_Base2Log( nValues );
+ nBits = Abc_Base2Log( nValues );
for ( k = 0; k < nBits; k++ )
{
pBit = Abc_ObjNot( Abc_AigConst1(pNtkNew) );
@@ -628,7 +628,7 @@ Abc_Ntk_t * Abc_NtkStrashBlifMv( Abc_Ntk_t * pNtk )
// Abc_NodeSetTravIdCurrent( pNet );
nValues = Abc_ObjMvVarNum(pNet);
pValues = (Abc_Obj_t **)pNet->pCopy;
- nBits = Extra_Base2Log( nValues );
+ nBits = Abc_Base2Log( nValues );
for ( k = 0; k < nBits; k++ )
{
pBit = Abc_ObjNot( Abc_AigConst1(pNtkNew) );
@@ -805,7 +805,7 @@ Abc_Ntk_t * Abc_NtkSkeletonBlifMv( Abc_Ntk_t * pNtk )
{
pNet = Abc_ObjFanout0(pObj);
nValues = Abc_ObjMvVarNum(pNet);
- nBits = Extra_Base2Log( nValues );
+ nBits = Abc_Base2Log( nValues );
for ( k = 0; k < nBits; k++ )
{
pNodeNew = Abc_NtkCreateNode( pNtkNew );
@@ -856,7 +856,7 @@ Abc_Ntk_t * Abc_NtkSkeletonBlifMv( Abc_Ntk_t * pNtk )
continue;
Abc_NodeSetTravIdCurrent( pNet );
nValues = Abc_ObjMvVarNum(pNet);
- nBits = Extra_Base2Log( nValues );
+ nBits = Abc_Base2Log( nValues );
pNodeNew = Abc_NtkCreateNode( pNtkNew );
pNodeNew->pData = Abc_SopDecoderLog( (Mem_Flex_t *)pNtkNew->pManFunc, nValues );
for ( k = 0; k < nBits; k++ )
diff --git a/src/base/abc/abcCheck.c b/src/base/abc/abcCheck.c
index aa264314..a80c4372 100644
--- a/src/base/abc/abcCheck.c
+++ b/src/base/abc/abcCheck.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "abc.h"
-#include "main.h"
-//#include "seq.h"
+#include "src/base/main/main.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abc/abcDfs.c b/src/base/abc/abcDfs.c
index cc001ab6..6d67785b 100644
--- a/src/base/abc/abcDfs.c
+++ b/src/base/abc/abcDfs.c
@@ -1312,14 +1312,14 @@ int Abc_NodeSetChoiceLevel_rec( Abc_Obj_t * pNode, int fMaximum )
// compute levels of the children nodes
Level1 = Abc_NodeSetChoiceLevel_rec( Abc_ObjFanin0(pNode), fMaximum );
Level2 = Abc_NodeSetChoiceLevel_rec( Abc_ObjFanin1(pNode), fMaximum );
- Level = 1 + ABC_MAX( Level1, Level2 );
+ Level = 1 + Abc_MaxInt( Level1, Level2 );
if ( pNode->pData )
{
LevelE = Abc_NodeSetChoiceLevel_rec( (Abc_Obj_t *)pNode->pData, fMaximum );
if ( fMaximum )
- Level = ABC_MAX( Level, LevelE );
+ Level = Abc_MaxInt( Level, LevelE );
else
- Level = ABC_MIN( Level, LevelE );
+ Level = Abc_MinInt( Level, LevelE );
// set the level of all equivalent nodes to be the same minimum
for ( pTemp = (Abc_Obj_t *)pNode->pData; pTemp; pTemp = (Abc_Obj_t *)pTemp->pData )
pTemp->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)Level;
@@ -1363,7 +1363,7 @@ int Abc_AigSetChoiceLevels( Abc_Ntk_t * pNtk )
Abc_NtkForEachCo( pNtk, pObj, i )
{
LevelCur = Abc_NodeSetChoiceLevel_rec( Abc_ObjFanin0(pObj), 1 );
- LevelMax = ABC_MAX( LevelMax, LevelCur );
+ LevelMax = Abc_MaxInt( LevelMax, LevelCur );
}
return LevelMax;
}
diff --git a/src/base/abc/abcFunc.c b/src/base/abc/abcFunc.c
index 7ff7db17..86604f39 100644
--- a/src/base/abc/abcFunc.c
+++ b/src/base/abc/abcFunc.c
@@ -19,8 +19,9 @@
***********************************************************************/
#include "abc.h"
-#include "main.h"
-#include "mio.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abc/abcHie.c b/src/base/abc/abcHie.c
index a3ec3c5f..73b08fcc 100644
--- a/src/base/abc/abcHie.c
+++ b/src/base/abc/abcHie.c
@@ -19,7 +19,6 @@
***********************************************************************/
#include "abc.h"
-#include "extra.h"
ABC_NAMESPACE_IMPL_START
@@ -194,8 +193,8 @@ Abc_Ntk_t * Abc_NtkFlattenLogicHierarchy2( Abc_Ntk_t * pNtk )
// start the network
pNtkNew = Abc_NtkAlloc( pNtk->ntkType, pNtk->ntkFunc, 1 );
// duplicate the name and the spec
- pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
- pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec);
+ pNtkNew->pName = Abc_UtilStrsav(pNtk->pName);
+ pNtkNew->pSpec = Abc_UtilStrsav(pNtk->pSpec);
// clean the node copy fields
Abc_NtkCleanCopy( pNtk );
diff --git a/src/base/abc/abcHieCec.c b/src/base/abc/abcHieCec.c
index ace7583b..ab29c3ca 100644
--- a/src/base/abc/abcHieCec.c
+++ b/src/base/abc/abcHieCec.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "abc.h"
-#include "ioAbc.h"
-#include "gia.h"
+#include "src/base/io/ioAbc.h"
+#include "src/aig/gia/gia.h"
ABC_NAMESPACE_IMPL_START
@@ -154,16 +154,16 @@ int Abc_NtkDeriveFlatGiaSop( Gia_Man_t * pGia, int * gFanins, char * pSop )
if ( Value == '1' )
gAnd = Gia_ManHashAnd( pGia, gAnd, gFanins[i] );
else if ( Value == '0' )
- gAnd = Gia_ManHashAnd( pGia, gAnd, Gia_LitNot(gFanins[i]) );
+ gAnd = Gia_ManHashAnd( pGia, gAnd, Abc_LitNot(gFanins[i]) );
}
// add to the sum of cubes
- gSum = Gia_ManHashAnd( pGia, Gia_LitNot(gSum), Gia_LitNot(gAnd) );
- gSum = Gia_LitNot( gSum );
+ gSum = Gia_ManHashAnd( pGia, Abc_LitNot(gSum), Abc_LitNot(gAnd) );
+ gSum = Abc_LitNot( gSum );
}
}
// decide whether to complement the result
if ( Abc_SopIsComplement(pSop) )
- gSum = Gia_LitNot(gSum);
+ gSum = Abc_LitNot(gSum);
return gSum;
}
@@ -199,7 +199,7 @@ void Abc_NtkDeriveFlatGia_rec( Gia_Man_t * pGia, Abc_Ntk_t * pNtk )
assert( pSop[2] == '1' );
assert( pSop[0] == '0' || pSop[0] == '1' );
assert( Abc_ObjFanin0(pObj)->iTemp >= 0 );
- Abc_ObjFanout0(pObj)->iTemp = Gia_LitNotCond( Abc_ObjFanin0(pObj)->iTemp, pSop[0]=='0' );
+ Abc_ObjFanout0(pObj)->iTemp = Abc_LitNotCond( Abc_ObjFanin0(pObj)->iTemp, pSop[0]=='0' );
continue;
}
if ( nLength == 5 ) // and2
@@ -210,8 +210,8 @@ void Abc_NtkDeriveFlatGia_rec( Gia_Man_t * pGia, Abc_Ntk_t * pNtk )
assert( Abc_ObjFanin0(pObj)->iTemp >= 0 );
assert( Abc_ObjFanin1(pObj)->iTemp >= 0 );
Abc_ObjFanout0(pObj)->iTemp = Gia_ManHashAnd( pGia,
- Gia_LitNotCond( Abc_ObjFanin0(pObj)->iTemp, pSop[0]=='0' ),
- Gia_LitNotCond( Abc_ObjFanin1(pObj)->iTemp, pSop[1]=='0' )
+ Abc_LitNotCond( Abc_ObjFanin0(pObj)->iTemp, pSop[0]=='0' ),
+ Abc_LitNotCond( Abc_ObjFanin1(pObj)->iTemp, pSop[1]=='0' )
);
continue;
}
@@ -267,7 +267,7 @@ Gia_Man_t * Abc_NtkDeriveFlatGia( Abc_Ntk_t * pNtk )
Abc_NtkFillTemp( pNtk );
// start the network
pGia = Gia_ManStart( (1<<16) );
- pGia->pName = Gia_UtilStrsav( Abc_NtkName(pNtk) );
+ pGia->pName = Abc_UtilStrsav( Abc_NtkName(pNtk) );
Gia_ManHashAlloc( pGia );
// create PIs
Abc_NtkForEachPi( pNtk, pTerm, i )
@@ -343,7 +343,7 @@ Gia_Man_t * Abc_NtkDeriveFlatGia2Derive( Abc_Ntk_t * pNtk, Vec_Ptr_t * vOrder )
// start the network
pGia = Gia_ManStart( (1<<15) );
- pGia->pName = Gia_UtilStrsav( Abc_NtkName(pNtk) );
+ pGia->pName = Abc_UtilStrsav( Abc_NtkName(pNtk) );
Gia_ManHashAlloc( pGia );
// create PIs
Abc_NtkForEachPi( pNtk, pTerm, i )
@@ -458,7 +458,7 @@ Gia_Man_t * Abc_NtkDeriveFlatGia2( Abc_Ntk_t * pNtk, Vec_Ptr_t * vModels )
Vec_PtrFree( vOrder );
}
- pGia = pModel->pData; pModel->pData = NULL;
+ pGia = (Gia_Man_t *)pModel->pData; pModel->pData = NULL;
Vec_PtrForEachEntry( Abc_Ntk_t *, vModels, pModel, i )
Gia_ManStopP( (Gia_Man_t **)&pModel->pData );
diff --git a/src/base/abc/abcHieNew.c b/src/base/abc/abcHieNew.c
index 509b8b96..fa544a93 100644
--- a/src/base/abc/abcHieNew.c
+++ b/src/base/abc/abcHieNew.c
@@ -24,8 +24,9 @@
#include <assert.h>
#include <time.h>
-#include "vec.h"
-#include "utilNam.h"
+#include "src/misc/vec/vec.h"
+#include "src/misc/util/utilNam.h"
+#include "src/misc/extra/extra.h"
ABC_NAMESPACE_IMPL_START
@@ -958,7 +959,6 @@ static inline void Au_NtkParseCBlifNum( Vec_Int_t * vFanins, char * pToken, Vec_
***********************************************************************/
Au_Ntk_t * Au_NtkParseCBlif( char * pFileName )
{
- extern char * Extra_FileRead( FILE * pFile );
FILE * pFile;
Au_Man_t * pMan;
Au_Ntk_t * pRoot;
@@ -1109,7 +1109,7 @@ Au_Ntk_t * Au_NtkParseCBlif( char * pFileName )
#include "abc.h"
-#include "gia.h"
+#include "src/aig/gia/gia.h"
extern Vec_Ptr_t * Abc_NtkDfsBoxes( Abc_Ntk_t * pNtk );
extern int Abc_NtkDeriveFlatGiaSop( Gia_Man_t * pGia, int * gFanins, char * pSop );
@@ -1161,15 +1161,15 @@ void Au_NtkDeriveFlatGia_rec( Gia_Man_t * pGia, Au_Ntk_t * p )
{
int Lit0, Lit1, Lit2;
assert( pObj->Func >= 1 && pObj->Func <= 3 );
- Lit0 = Gia_LitNotCond( Au_ObjCopy(Au_ObjFanin0(pObj)), Au_ObjFaninC0(pObj) );
- Lit1 = Gia_LitNotCond( Au_ObjCopy(Au_ObjFanin1(pObj)), Au_ObjFaninC1(pObj) );
+ Lit0 = Abc_LitNotCond( Au_ObjCopy(Au_ObjFanin0(pObj)), Au_ObjFaninC0(pObj) );
+ Lit1 = Abc_LitNotCond( Au_ObjCopy(Au_ObjFanin1(pObj)), Au_ObjFaninC1(pObj) );
if ( pObj->Func == 1 )
Lit = Gia_ManHashAnd( pGia, Lit0, Lit1 );
else if ( pObj->Func == 2 )
Lit = Gia_ManHashXor( pGia, Lit0, Lit1 );
else if ( pObj->Func == 3 )
{
- Lit2 = Gia_LitNotCond( Au_ObjCopy(Au_ObjFanin2(pObj)), Au_ObjFaninC2(pObj) );
+ Lit2 = Abc_LitNotCond( Au_ObjCopy(Au_ObjFanin2(pObj)), Au_ObjFaninC2(pObj) );
Lit = Gia_ManHashMux( pGia, Lit0, Lit1, Lit2 );
}
else assert( 0 );
@@ -1199,7 +1199,7 @@ void Au_NtkDeriveFlatGia_rec( Gia_Man_t * pGia, Au_Ntk_t * p )
}
Au_NtkForEachPo( p, pTerm, i )
{
- Lit = Gia_LitNotCond( Au_ObjCopy(Au_ObjFanin0(pTerm)), Au_ObjFaninC0(pTerm) );
+ Lit = Abc_LitNotCond( Au_ObjCopy(Au_ObjFanin0(pTerm)), Au_ObjFaninC0(pTerm) );
Au_ObjSetCopy( pTerm, Lit );
}
Au_NtkForEachPo( p, pTerm, i )
@@ -1227,7 +1227,7 @@ Gia_Man_t * Au_NtkDeriveFlatGia( Au_Ntk_t * p )
Au_NtkCleanCopy( p );
// start the network
pGia = Gia_ManStart( (1<<16) );
- pGia->pName = Gia_UtilStrsav( Au_NtkName(p) );
+ pGia->pName = Abc_UtilStrsav( Au_NtkName(p) );
Gia_ManHashAlloc( pGia );
Gia_ManFlipVerbose( pGia );
// create PIs
diff --git a/src/base/abc/abcInt.h b/src/base/abc/abcInt.h
index 326ff5a2..0bcddcfb 100644
--- a/src/base/abc/abcInt.h
+++ b/src/base/abc/abcInt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __ABC_INT_H__
-#define __ABC_INT_H__
+#ifndef ABC__base__abc__abcInt_h
+#define ABC__base__abc__abcInt_h
ABC_NAMESPACE_HEADER_START
diff --git a/src/base/abc/abcLatch.c b/src/base/abc/abcLatch.c
index b5fa1f64..865fb8b9 100644
--- a/src/base/abc/abcLatch.c
+++ b/src/base/abc/abcLatch.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "abc.h"
-#include "extra.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
@@ -150,7 +150,7 @@ void Abc_NtkLatchPipe( Abc_Ntk_t * pNtk, int nLatches )
if ( nLatches < 1 )
return;
nTotal = nLatches * Abc_NtkPiNum(pNtk);
- nDigits = Extra_Base10Log( nTotal );
+ nDigits = Abc_Base10Log( nTotal );
vNodes = Vec_PtrAlloc( 100 );
Abc_NtkForEachPi( pNtk, pObj, i )
{
@@ -486,7 +486,7 @@ Abc_Ntk_t * Abc_NtkConvertOnehot( Abc_Ntk_t * pNtk )
ABC_NAMESPACE_IMPL_END
-#include "giaAig.h"
+#include "src/aig/gia/giaAig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abc/abcLib.c b/src/base/abc/abcLib.c
index a9bb5691..b80ebd97 100644
--- a/src/base/abc/abcLib.c
+++ b/src/base/abc/abcLib.c
@@ -19,7 +19,6 @@
***********************************************************************/
#include "abc.h"
-#include "extra.h"
ABC_NAMESPACE_IMPL_START
@@ -48,7 +47,7 @@ Abc_Lib_t * Abc_LibCreate( char * pName )
Abc_Lib_t * p;
p = ABC_ALLOC( Abc_Lib_t, 1 );
memset( p, 0, sizeof(Abc_Lib_t) );
- p->pName = Extra_UtilStrsav( pName );
+ p->pName = Abc_UtilStrsav( pName );
p->tModules = st_init_table( strcmp, st_strhash );
p->vTops = Vec_PtrAlloc( 100 );
p->vModules = Vec_PtrAlloc( 100 );
diff --git a/src/base/abc/abcMinBase.c b/src/base/abc/abcMinBase.c
index a8dc9249..2efe404f 100644
--- a/src/base/abc/abcMinBase.c
+++ b/src/base/abc/abcMinBase.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "abc.h"
-#include "extra.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abc/abcNames.c b/src/base/abc/abcNames.c
index 74e4e493..ab33c91a 100644
--- a/src/base/abc/abcNames.c
+++ b/src/base/abc/abcNames.c
@@ -19,7 +19,6 @@
***********************************************************************/
#include "abc.h"
-#include "extra.h"
ABC_NAMESPACE_IMPL_START
@@ -204,7 +203,7 @@ Vec_Ptr_t * Abc_NodeGetFaninNames( Abc_Obj_t * pNode )
int i;
vNodes = Vec_PtrAlloc( 100 );
Abc_ObjForEachFanin( pNode, pFanin, i )
- Vec_PtrPush( vNodes, Extra_UtilStrsav(Abc_ObjName(pFanin)) );
+ Vec_PtrPush( vNodes, Abc_UtilStrsav(Abc_ObjName(pFanin)) );
return vNodes;
}
@@ -380,7 +379,7 @@ void Abc_NtkAddDummyPiNames( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj;
int nDigits, i;
- nDigits = Extra_Base10Log( Abc_NtkPiNum(pNtk) );
+ nDigits = Abc_Base10Log( Abc_NtkPiNum(pNtk) );
Abc_NtkForEachPi( pNtk, pObj, i )
Abc_ObjAssignName( pObj, Abc_ObjNameDummy("pi", i, nDigits), NULL );
}
@@ -400,7 +399,7 @@ void Abc_NtkAddDummyPoNames( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj;
int nDigits, i;
- nDigits = Extra_Base10Log( Abc_NtkPoNum(pNtk) );
+ nDigits = Abc_Base10Log( Abc_NtkPoNum(pNtk) );
Abc_NtkForEachPo( pNtk, pObj, i )
Abc_ObjAssignName( pObj, Abc_ObjNameDummy("po", i, nDigits), NULL );
}
@@ -432,7 +431,7 @@ void Abc_NtkAddDummyBoxNames( Abc_Ntk_t * pNtk )
CountCur++;
else
break;
- CountMax = ABC_MAX( CountMax, CountCur );
+ CountMax = Abc_MaxInt( CountMax, CountCur );
}
Abc_NtkForEachPo( pNtk, pObj, i )
{
@@ -443,7 +442,7 @@ void Abc_NtkAddDummyBoxNames( Abc_Ntk_t * pNtk )
CountCur++;
else
break;
- CountMax = ABC_MAX( CountMax, CountCur );
+ CountMax = Abc_MaxInt( CountMax, CountCur );
}
//printf( "CountMax = %d\n", CountMax );
assert( CountMax < 100-2 );
@@ -455,7 +454,7 @@ void Abc_NtkAddDummyBoxNames( Abc_Ntk_t * pNtk )
PrefLo[i+1] = 0;
// create latch names
assert( !Abc_NtkIsNetlist(pNtk) );
- nDigits = Extra_Base10Log( Abc_NtkLatchNum(pNtk) );
+ nDigits = Abc_Base10Log( Abc_NtkLatchNum(pNtk) );
Abc_NtkForEachLatch( pNtk, pObj, i )
{
Abc_ObjAssignName( pObj, Abc_ObjNameDummy("l", i, nDigits), NULL );
@@ -463,14 +462,14 @@ void Abc_NtkAddDummyBoxNames( Abc_Ntk_t * pNtk )
Abc_ObjAssignName( Abc_ObjFanout0(pObj), Abc_ObjNameDummy(PrefLo, i, nDigits), NULL );
}
/*
- nDigits = Extra_Base10Log( Abc_NtkBlackboxNum(pNtk) );
+ nDigits = Abc_Base10Log( Abc_NtkBlackboxNum(pNtk) );
Abc_NtkForEachBlackbox( pNtk, pObj, i )
{
pName = Abc_ObjAssignName( pObj, Abc_ObjNameDummy("B", i, nDigits), NULL );
- nDigitsF = Extra_Base10Log( Abc_ObjFaninNum(pObj) );
+ nDigitsF = Abc_Base10Log( Abc_ObjFaninNum(pObj) );
Abc_ObjForEachFanin( pObj, pTerm, k )
Abc_ObjAssignName( Abc_ObjFanin0(pObj), pName, Abc_ObjNameDummy("i", k, nDigitsF) );
- nDigitsF = Extra_Base10Log( Abc_ObjFanoutNum(pObj) );
+ nDigitsF = Abc_Base10Log( Abc_ObjFanoutNum(pObj) );
Abc_ObjForEachFanout( pObj, pTerm, k )
Abc_ObjAssignName( Abc_ObjFanin0(pObj), pName, Abc_ObjNameDummy("o", k, nDigitsF) );
}
diff --git a/src/base/abc/abcNetlist.c b/src/base/abc/abcNetlist.c
index f2e02bc0..f8ff8f0c 100644
--- a/src/base/abc/abcNetlist.c
+++ b/src/base/abc/abcNetlist.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "abc.h"
-#include "main.h"
+#include "src/base/main/main.h"
//#include "seq.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abc/abcNtk.c b/src/base/abc/abcNtk.c
index 6a20bf91..1f76de81 100644
--- a/src/base/abc/abcNtk.c
+++ b/src/base/abc/abcNtk.c
@@ -20,9 +20,10 @@
#include "abc.h"
#include "abcInt.h"
-#include "main.h"
-#include "mio.h"
-#include "gia.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
+#include "src/aig/gia/gia.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abc/abcObj.c b/src/base/abc/abcObj.c
index 36fd6397..7741d963 100644
--- a/src/base/abc/abcObj.c
+++ b/src/base/abc/abcObj.c
@@ -20,8 +20,9 @@
#include "abc.h"
#include "abcInt.h"
-#include "main.h"
-#include "mio.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abc/abcShow.c b/src/base/abc/abcShow.c
index 4295726e..4b8fae49 100644
--- a/src/base/abc/abcShow.c
+++ b/src/base/abc/abcShow.c
@@ -26,8 +26,9 @@
#include "abc.h"
-#include "main.h"
-#include "ioAbc.h"
+#include "src/base/main/main.h"
+#include "src/base/io/ioAbc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abc/abcSop.c b/src/base/abc/abcSop.c
index 297b0737..f8421b93 100644
--- a/src/base/abc/abcSop.c
+++ b/src/base/abc/abcSop.c
@@ -19,7 +19,6 @@
***********************************************************************/
#include "abc.h"
-#include "extra.h"
ABC_NAMESPACE_IMPL_START
@@ -885,7 +884,7 @@ char * Abc_SopFromTruthBin( char * pTruth )
// get the number of variables
nTruthSize = strlen(pTruth);
- nVars = Extra_Base2Log( nTruthSize );
+ nVars = Abc_Base2Log( nTruthSize );
if ( nTruthSize != (1 << (nVars)) )
{
printf( "String %s does not look like a truth table of a %d-variable function.\n", pTruth, nVars );
@@ -954,7 +953,7 @@ char * Abc_SopFromTruthHex( char * pTruth )
// get the number of variables
nTruthSize = strlen(pTruth);
- nVars = (nTruthSize < 2) ? 2 : Extra_Base2Log(nTruthSize) + 2;
+ nVars = (nTruthSize < 2) ? 2 : Abc_Base2Log(nTruthSize) + 2;
if ( nTruthSize != (1 << (nVars-2)) )
{
printf( "String %s does not look like a truth table of a %d-variable function.\n", pTruth, nVars );
@@ -1051,7 +1050,7 @@ char * Abc_SopEncoderLog( Mem_Flex_t * pMan, int iBit, int nValues )
{
char * pResult;
Vec_Str_t * vSop;
- int v, Counter, fFirst = 1, nBits = Extra_Base2Log(nValues);
+ int v, Counter, fFirst = 1, nBits = Abc_Base2Log(nValues);
assert( iBit < nBits );
// count the number of literals
Counter = 0;
@@ -1131,7 +1130,7 @@ char * Abc_SopDecoderLog( Mem_Flex_t * pMan, int nValues )
{
char * pResult;
Vec_Str_t * vSop;
- int i, b, nBits = Extra_Base2Log(nValues);
+ int i, b, nBits = Abc_Base2Log(nValues);
assert( nValues > 1 && nValues <= (1<<nBits) );
vSop = Vec_StrAlloc( 100 );
for ( i = 0; i < nValues; i++ )
diff --git a/src/base/abc/abcUtil.c b/src/base/abc/abcUtil.c
index 0cf25ae3..59a7bc86 100644
--- a/src/base/abc/abcUtil.c
+++ b/src/base/abc/abcUtil.c
@@ -19,10 +19,10 @@
***********************************************************************/
#include "abc.h"
-#include "main.h"
-#include "mio.h"
-#include "dec.h"
-//#include "seq.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
+#include "src/bool/dec/dec.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c
index 267d4e0b..5fc9bfad 100644
--- a/src/base/abci/abc.c
+++ b/src/base/abci/abc.c
@@ -18,44 +18,37 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "mainInt.h"
-#include "fraig.h"
-#include "fxu.h"
-#include "cut.h"
-#include "fpga.h"
-#include "if.h"
-#include "sim.h"
-#include "res.h"
-#include "lpk.h"
-#include "giaAig.h"
-#include "dar.h"
-#include "mfs.h"
-#include "mfx.h"
-#include "fra.h"
-#include "saig.h"
-#include "nwkMerge.h"
-#include "int.h"
-#include "dch.h"
-#include "ssw.h"
-#include "cgt.h"
-#include "kit.h"
-#include "amap.h"
-#include "retInt.h"
-#include "cnf.h"
-#include "cec.h"
-#include "pdr.h"
-
-#include "tim.h"
-#include "llb.h"
-#include "ntlnwk.h"
-#include "mfx.h"
-#include "bbr.h"
-#include "cov.h"
-
-#include "cmd.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/base/main/mainInt.h"
+#include "src/proof/fraig/fraig.h"
+#include "src/opt/fxu/fxu.h"
+#include "src/opt/cut/cut.h"
+#include "src/map/fpga/fpga.h"
+#include "src/map/if/if.h"
+#include "src/opt/sim/sim.h"
+#include "src/opt/res/res.h"
+#include "src/opt/lpk/lpk.h"
+#include "src/aig/gia/giaAig.h"
+#include "src/opt/dar/dar.h"
+#include "src/opt/mfs/mfs.h"
+#include "src/proof/fra/fra.h"
+#include "src/aig/saig/saig.h"
+#include "src/proof/int/int.h"
+#include "src/proof/dch/dch.h"
+#include "src/proof/ssw/ssw.h"
+#include "src/opt/cgt/cgt.h"
+#include "src/bool/kit/kit.h"
+#include "src/map/amap/amap.h"
+#include "src/opt/ret/retInt.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/proof/cec/cec.h"
+#include "src/proof/pdr/pdr.h"
+#include "src/misc/tim/tim.h"
+#include "src/proof/llb/llb.h"
+#include "src/proof/bbr/bbr.h"
+#include "src/map/cov/cov.h"
+#include "src/base/cmd/cmd.h"
#ifdef _WIN32
//#include <io.h>
@@ -112,7 +105,7 @@ static int Abc_CommandMfs ( Abc_Frame_t * pAbc, int argc, cha
static int Abc_CommandTrace ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandSpeedup ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandPowerdown ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandMerge ( Abc_Frame_t * pAbc, int argc, char ** argv );
+//static int Abc_CommandMerge ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandRewrite ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandRefactor ( Abc_Frame_t * pAbc, int argc, char ** argv );
@@ -287,44 +280,6 @@ static int Abc_CommandCexMin ( Abc_Frame_t * pAbc, int argc, cha
static int Abc_CommandTraceStart ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandTraceCheck ( Abc_Frame_t * pAbc, int argc, char ** argv );
-
-static int Abc_CommandAbc8Read ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8ReadLogic ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Write ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8WriteLogic ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8ReadLut ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8PrintLut ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Check ( Abc_Frame_t * pAbc, int argc, char ** argv );
-
-static int Abc_CommandAbc8Ps ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Pfan ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8If ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8DChoice ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Dch ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Dc2 ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Bidec ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Strash ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Mfs ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Lutpack ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Lutmin ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Balance ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Speedup ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Merge ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Insert ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8ClpLut ( Abc_Frame_t * pAbc, int argc, char ** argv );
-
-static int Abc_CommandAbc8Fraig ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Scl ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Lcorr ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Ssw ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Scorr ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Sweep ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8Zero ( Abc_Frame_t * pAbc, int argc, char ** argv );
-
-static int Abc_CommandAbc8Cec ( Abc_Frame_t * pAbc, int argc, char ** argv );
-static int Abc_CommandAbc8DSec ( Abc_Frame_t * pAbc, int argc, char ** argv );
-
-
static int Abc_CommandAbc9Get ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9Put ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbc9Read ( Abc_Frame_t * pAbc, int argc, char ** argv );
@@ -466,24 +421,6 @@ void Abc_FrameReplaceCexVec( Abc_Frame_t * pAbc, Vec_Ptr_t ** pvCexVec )
***********************************************************************/
void Abc_FrameClearDesign()
{
- Abc_Frame_t * pAbc;
-
- pAbc = Abc_FrameGetGlobalFrame();
- if ( pAbc->pAbc8Ntl )
- {
- Ntl_ManFree( pAbc->pAbc8Ntl );
- pAbc->pAbc8Ntl = NULL;
- }
- if ( pAbc->pAbc8Aig )
- {
- Aig_ManStop( pAbc->pAbc8Aig );
- pAbc->pAbc8Aig = NULL;
- }
- if ( pAbc->pAbc8Nwk )
- {
- Nwk_ManFree( pAbc->pAbc8Nwk );
- pAbc->pAbc8Nwk = NULL;
- }
}
/**Function*************************************************************
@@ -536,18 +473,6 @@ void Abc_CommandUpdate9( Abc_Frame_t * pAbc, Gia_Man_t * pNew )
***********************************************************************/
void Abc_Init( Abc_Frame_t * pAbc )
{
-/*
- char * pBuff = ABC_ALLOC( char, (1<<29) );
- int i, clk = clock();
- for ( i = 0; i < (1<<29); i++ )
- pBuff[i] = i % 53;
- if ( pBuff == NULL )
- printf( "Not allocated. " );
- else
- printf( "Allocated %d bytes. ", (1<<29) );
- Abc_PrintTime( 1, "Time", clock() - clk );
-*/
-
Cmd_CommandAdd( pAbc, "Printing", "print_stats", Abc_CommandPrintStats, 0 );
Cmd_CommandAdd( pAbc, "Printing", "print_exdc", Abc_CommandPrintExdc, 0 );
Cmd_CommandAdd( pAbc, "Printing", "print_io", Abc_CommandPrintIo, 0 );
@@ -591,7 +516,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "Synthesis", "trace", Abc_CommandTrace, 0 );
Cmd_CommandAdd( pAbc, "Synthesis", "speedup", Abc_CommandSpeedup, 1 );
Cmd_CommandAdd( pAbc, "Synthesis", "powerdown", Abc_CommandPowerdown, 1 );
- Cmd_CommandAdd( pAbc, "Synthesis", "merge", Abc_CommandMerge, 1 );
+// Cmd_CommandAdd( pAbc, "Synthesis", "merge", Abc_CommandMerge, 1 );
Cmd_CommandAdd( pAbc, "Synthesis", "rewrite", Abc_CommandRewrite, 1 );
Cmd_CommandAdd( pAbc, "Synthesis", "refactor", Abc_CommandRefactor, 1 );
@@ -762,42 +687,6 @@ void Abc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "Verification", "reconcile", Abc_CommandReconcile, 1 );
Cmd_CommandAdd( pAbc, "Verification", "cexmin", Abc_CommandCexMin, 0 );
-
- Cmd_CommandAdd( pAbc, "ABC8", "*r", Abc_CommandAbc8Read, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*rlogic", Abc_CommandAbc8ReadLogic, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*w", Abc_CommandAbc8Write, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*wlogic", Abc_CommandAbc8WriteLogic, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*rlut", Abc_CommandAbc8ReadLut, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*plut", Abc_CommandAbc8PrintLut, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*check", Abc_CommandAbc8Check, 0 );
-
- Cmd_CommandAdd( pAbc, "ABC8", "*ps", Abc_CommandAbc8Ps, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*pfan", Abc_CommandAbc8Pfan, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*if", Abc_CommandAbc8If, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*dchoice", Abc_CommandAbc8DChoice, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*dch", Abc_CommandAbc8Dch, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*dc2", Abc_CommandAbc8Dc2, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*bidec", Abc_CommandAbc8Bidec, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*st", Abc_CommandAbc8Strash, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*mfs", Abc_CommandAbc8Mfs, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*lp", Abc_CommandAbc8Lutpack, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*b", Abc_CommandAbc8Balance, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*speedup", Abc_CommandAbc8Speedup, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*merge", Abc_CommandAbc8Merge, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*insert", Abc_CommandAbc8Insert, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*clplut", Abc_CommandAbc8ClpLut, 0 );
-
- Cmd_CommandAdd( pAbc, "ABC8", "*fraig", Abc_CommandAbc8Fraig, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*scl", Abc_CommandAbc8Scl, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*lcorr", Abc_CommandAbc8Lcorr, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*ssw", Abc_CommandAbc8Ssw, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*scorr", Abc_CommandAbc8Scorr, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*sw", Abc_CommandAbc8Sweep, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*zero", Abc_CommandAbc8Zero, 0 );
-
- Cmd_CommandAdd( pAbc, "ABC8", "*cec", Abc_CommandAbc8Cec, 0 );
- Cmd_CommandAdd( pAbc, "ABC8", "*dsec", Abc_CommandAbc8DSec, 0 );
-
Cmd_CommandAdd( pAbc, "ABC9", "&get", Abc_CommandAbc9Get, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&put", Abc_CommandAbc9Put, 0 );
Cmd_CommandAdd( pAbc, "ABC9", "&r", Abc_CommandAbc9Read, 0 );
@@ -956,11 +845,6 @@ void Abc_End( Abc_Frame_t * pAbc )
// extern void Au_TabManPrint();
// Au_TabManPrint();
}
- {
- extern void If_LutLibFree( If_Lib_t * pLutLib );
- if ( Abc_FrameGetGlobalFrame()->pAbc8Lib )
- If_LutLibFree( (If_Lib_t *)Abc_FrameGetGlobalFrame()->pAbc8Lib );
- }
// Dar_LibDumpPriorities();
{
@@ -4570,6 +4454,7 @@ usage:
return 1;
}
+#if 0
/**Function*************************************************************
Synopsis []
@@ -4702,7 +4587,7 @@ usage:
Abc_Print( -2, "\t-h : print the command usage\n");
return 1;
}
-
+#endif
/**Function*************************************************************
Synopsis []
@@ -21305,3075 +21190,6 @@ usage:
}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Read( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- FILE * pFile;
- char * pFileName;
- int c;
- int fMapped;
- int fTest;
-
- // set defaults
- fMapped = 0;
- fTest = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "mth" ) ) != EOF )
- {
- switch ( c )
- {
- case 'm':
- fMapped ^= 1;
- break;
- case 't':
- fTest ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
-
- // get the input file name
- pFileName = argv[globalUtilOptind];
- if ( (pFile = fopen( pFileName, "r" )) == NULL )
- {
- Abc_Print( -1, "Cannot open input file \"%s\". ", pFileName );
- if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL )) )
- Abc_Print( 1, "Did you mean \"%s\"?", pFileName );
- Abc_Print( 1, "\n" );
- return 1;
- }
- fclose( pFile );
- if ( fTest )
- {
- Ntl_Man_t * pTemp = Ntl_ManReadBlif( pFileName, 1 );
- if ( pTemp )
- {
-// Ntl_ManWriteBlif( pTemp, "test_boxes.blif" );
- Ntl_ManPrintStats( pTemp );
- Ntl_ManFree( pTemp );
- }
- return 0;
- }
-
- Abc_FrameClearDesign();
- pAbc->pAbc8Ntl = Ntl_ManReadBlif( pFileName, 1 );
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Read(): Reading BLIF has failed.\n" );
- return 1;
- }
- pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl );
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Read(): AIG extraction has failed.\n" );
- return 1;
- }
- if ( fMapped )
- {
- pAbc->pAbc8Nwk = Ntl_ManExtractNwk( pAbc->pAbc8Ntl, pAbc->pAbc8Aig, NULL );
- if ( pAbc->pAbc8Nwk == NULL )
- Abc_Print( -1, "Abc_CommandAbc8Read(): Warning! Mapped network is not extracted.\n" );
- }
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *r [-mth]\n" );
- Abc_Print( -2, "\t reads the design with whiteboxes\n" );
- Abc_Print( -2, "\t-m : toggle extracting mapped network [default = %s]\n", fMapped? "yes": "no" );
- Abc_Print( -2, "\t-t : toggle reading in the test mode [default = %s]\n", fTest? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8ReadLogic( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- FILE * pFile;
- char * pFileName;
- Nwk_Man_t * pNtkNew;
- int c;
-
- // set defaults
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF )
- {
- switch ( c )
- {
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
-
- // get the input file name
- pFileName = argv[globalUtilOptind];
- if ( (pFile = fopen( pFileName, "r" )) == NULL )
- {
- Abc_Print( -1, "Cannot open input file \"%s\". ", pFileName );
- if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL )) )
- Abc_Print( 1, "Did you mean \"%s\"?", pFileName );
- Abc_Print( 1, "\n" );
- return 1;
- }
- fclose( pFile );
-
- if ( pAbc->pAbc8Ntl == NULL || pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8ReadLogic(): There is no design or its AIG.\n" );
- return 1;
- }
-
- // read the new logic
- pNtkNew = Ntl_ManReadNwk( pFileName, pAbc->pAbc8Aig, Ntl_ManReadTimeMan(pAbc->pAbc8Ntl) );
- if ( pNtkNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8ReadLogic(): Procedure has failed.\n" );
- return 1;
- }
- if ( pAbc->pAbc8Nwk != NULL )
- Nwk_ManFree( pAbc->pAbc8Nwk );
- pAbc->pAbc8Nwk = pNtkNew;
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *rlogic [-h]\n" );
- Abc_Print( -2, "\t reads the logic part of the design without whiteboxes\n" );
- Abc_Print( -2, "\t and sets the new logic as the current mapped network\n" );
- Abc_Print( -2, "\t (the logic part should be comb and with the same PIs/POs)\n" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Write( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- char * pFileName;
- Aig_Man_t * pTemp;
- Ntl_Man_t * pTemp2;
- int fAig;
- int fBlif;
- int fCollapsed;
- int c;
-
- // set defaults
- fAig = 0;
- fBlif = 1;
- fCollapsed = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "abch" ) ) != EOF )
- {
- switch ( c )
- {
- case 'a':
- fAig ^= 1;
- break;
- case 'b':
- fBlif ^= 1;
- break;
- case 'c':
- fCollapsed ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Write(): There is no design to write.\n" );
- return 1;
- }
- // create the design to write
- pFileName = argv[globalUtilOptind];
- if ( fAig )
- {
- if ( fCollapsed )
- {
- pTemp = Ntl_ManCollapseSeq( pAbc->pAbc8Ntl, 0, 0 );
- if ( fBlif )
- Saig_ManDumpBlif( pTemp, pFileName );
- else
- Ioa_WriteAiger( pTemp, pFileName, 0, 0 );
- Aig_ManStop( pTemp );
- }
- else
- {
- if ( pAbc->pAbc8Aig != NULL )
- {
- if ( fBlif )
- {
- pTemp2 = Ntl_ManInsertAig( pAbc->pAbc8Ntl, pAbc->pAbc8Aig );
- if ( pTemp2 == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Write(): Inserting AIG has failed.\n" );
- return 1;
- }
- Ntl_ManWriteBlif( pTemp2, pFileName );
- Ntl_ManFree( pTemp2 );
- }
- else
- Ioa_WriteAiger( pAbc->pAbc8Aig, pFileName, 0, 0 );
- }
- else
- {
- Abc_Print( -1, "There is no AIG to write.\n" );
- return 1;
- }
- }
- }
- else
- {
- if ( pAbc->pAbc8Nwk != NULL )
- {
- pTemp2 = Ntl_ManInsertNtk( pAbc->pAbc8Ntl, pAbc->pAbc8Nwk );
- if ( pTemp2 == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Write(): Inserting mapped network has failed.\n" );
- return 1;
- }
- Ntl_ManWriteBlif( pTemp2, pFileName );
- Ntl_ManFree( pTemp2 );
- }
- else
- {
- Abc_Print( -1, "Writing the unmapped netlist.\n" );
- pTemp2 = pAbc->pAbc8Ntl;
- Ntl_ManWriteBlif( pTemp2, pFileName );
- }
- }
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *w [-abch]\n" );
- Abc_Print( -2, "\t write the design with whiteboxes\n" );
- Abc_Print( -2, "\t-a : toggle writing design or internal AIG [default = %s]\n", fAig? "AIG": "design" );
- Abc_Print( -2, "\t-b : toggle writing AIG as BLIF or AIGER [default = %s]\n", fBlif? "BLIF": "AIGER" );
- Abc_Print( -2, "\t-c : toggle writing collapsed sequential AIG [default = %s]\n", fCollapsed? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8WriteLogic( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Vec_Ptr_t * vCiNames = NULL, * vCoNames = NULL;
- char * pFileName;
- int fAig;
- int c;
-
- // set defaults
- fAig = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "ah" ) ) != EOF )
- {
- switch ( c )
- {
- case 'a':
- fAig ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Write(): There is no design to write.\n" );
- return 1;
- }
- // create the design to write
- pFileName = argv[globalUtilOptind];
-// vCiNames = Ntl_ManCollectCiNames( pAbc->pAbc8Ntl );
-// vCoNames = Ntl_ManCollectCoNames( pAbc->pAbc8Ntl );
- // the problem is duplicated CO names...
- if ( fAig )
- {
- if ( pAbc->pAbc8Aig != NULL )
- Aig_ManDumpBlif( pAbc->pAbc8Aig, pFileName, vCiNames, vCoNames );
- else
- {
- Abc_Print( -1, "There is no AIG to write.\n" );
- return 1;
- }
- }
- else
- {
- if ( pAbc->pAbc8Nwk != NULL )
- Nwk_ManDumpBlif( pAbc->pAbc8Nwk, pFileName, vCiNames, vCoNames );
- else
- {
- Abc_Print( -1, "There is no mapped network to write.\n" );
- return 1;
- }
- }
- if ( vCiNames ) Vec_PtrFree( vCiNames );
- if ( vCoNames ) Vec_PtrFree( vCoNames );
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *wlogic [-ah]\n" );
- Abc_Print( -2, "\t write the logic part of the design without whiteboxes\n" );
- Abc_Print( -2, "\t-a : toggle writing mapped network or AIG [default = %s]\n", fAig? "AIG": "network" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Command procedure to read LUT libraries.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8ReadLut( Abc_Frame_t * pAbc, int argc, char **argv )
-{
- FILE * pFile;
- char * FileName;
- If_Lib_t * pLib;
- int c;
- extern If_Lib_t * If_LutLibRead( char * FileName );
- extern void If_LutLibFree( If_Lib_t * pLutLib );
-
- // set the defaults
- Extra_UtilGetoptReset();
- while ( (c = Extra_UtilGetopt(argc, argv, "h")) != EOF )
- {
- switch (c)
- {
- case 'h':
- goto usage;
- break;
- default:
- goto usage;
- }
- }
-
-
- if ( argc != globalUtilOptind + 1 )
- {
- goto usage;
- }
-
- // get the input file name
- FileName = argv[globalUtilOptind];
- if ( (pFile = fopen( FileName, "r" )) == NULL )
- {
- Abc_Print( -1, "Cannot open input file \"%s\". ", FileName );
- if ( (FileName = Extra_FileGetSimilarName( FileName, ".lut", NULL, NULL, NULL, NULL )) )
- Abc_Print( 1, "Did you mean \"%s\"?", FileName );
- Abc_Print( 1, "\n" );
- return 1;
- }
- fclose( pFile );
-
- // set the new network
- pLib = If_LutLibRead( FileName );
- if ( pLib == NULL )
- {
- Abc_Print( -1, "Reading LUT library has failed.\n" );
- goto usage;
- }
- // replace the current library
- if ( pAbc->pAbc8Lib != NULL )
- If_LutLibFree( pAbc->pAbc8Lib );
- pAbc->pAbc8Lib = pLib;
- return 0;
-
-usage:
- Abc_Print( -2, "\nusage: *rlut [-h]\n");
- Abc_Print( -2, "\t read the LUT library from the file\n" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- Abc_Print( -2, "\t \n");
- Abc_Print( -2, "\t File format for a LUT library:\n");
- Abc_Print( -2, "\t (the default library is shown)\n");
- Abc_Print( -2, "\t \n");
- Abc_Print( -2, "\t # The area/delay of k-variable LUTs:\n");
- Abc_Print( -2, "\t # k area delay\n");
- Abc_Print( -2, "\t 1 1 1\n");
- Abc_Print( -2, "\t 2 2 2\n");
- Abc_Print( -2, "\t 3 4 3\n");
- Abc_Print( -2, "\t 4 8 4\n");
- Abc_Print( -2, "\t 5 16 5\n");
- Abc_Print( -2, "\t 6 32 6\n");
- return 1; /* error exit */
-}
-
-/**Function*************************************************************
-
- Synopsis [Command procedure to read LUT libraries.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8PrintLut( Abc_Frame_t * pAbc, int argc, char **argv )
-{
- int c;
- extern void If_LutLibPrint( If_Lib_t * pLutLib );
-
- // set the defaults
- Extra_UtilGetoptReset();
- while ( (c = Extra_UtilGetopt(argc, argv, "h")) != EOF )
- {
- switch (c)
- {
- case 'h':
- goto usage;
- break;
- default:
- goto usage;
- }
- }
-
- if ( argc != globalUtilOptind )
- {
- goto usage;
- }
-
- // set the new network
- if ( pAbc->pAbc8Lib == NULL )
- Abc_Print( -1, "Abc_CommandAbc8PrintLut(): LUT library is not specified.\n" );
- else
- If_LutLibPrint( (If_Lib_t *)pAbc->pAbc8Lib );
- return 0;
-
-usage:
- Abc_Print( -2, "\nusage: *plut [-h]\n");
- Abc_Print( -2, "\t print the current LUT library\n" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1; /* error exit */
-}
-
-/**Function*************************************************************
-
- Synopsis [Command procedure to read LUT libraries.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Check( Abc_Frame_t * pAbc, int argc, char **argv )
-{
- int c;
-
- // set the defaults
- Extra_UtilGetoptReset();
- while ( (c = Extra_UtilGetopt(argc, argv, "h")) != EOF )
- {
- switch (c)
- {
- case 'h':
- goto usage;
- break;
- default:
- goto usage;
- }
- }
-
- if ( argc != globalUtilOptind )
- {
- goto usage;
- }
-
- // set the new network
- if ( pAbc->pAbc8Nwk == NULL )
- Abc_Print( -1, "Abc_CommandAbc8Check(): There is no mapped network.\n" );
- else
- Nwk_ManCheck( pAbc->pAbc8Nwk );
- return 0;
-
-usage:
- Abc_Print( -2, "\nusage: *check [-h]\n");
- Abc_Print( -2, "\t checks if the current mapped network has duplicated fanins\n" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1; /* error exit */
-}
-
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Ps( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- int c;
- int fSaveBest;
- int fDumpResult;
- int fPower;
- int fShort;
- extern If_Lib_t * If_SetSimpleLutLib( int nLutSize );
-
- // set defaults
- fSaveBest = 0;
- fDumpResult = 0;
- fPower = 0;
- fShort = 1;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "bdpsh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'b':
- fSaveBest ^= 1;
- break;
- case 'd':
- fDumpResult ^= 1;
- break;
- case 'p':
- fPower ^= 1;
- break;
- case 's':
- fShort ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Ps(): There is no design to show.\n" );
- return 1;
- }
-
- if ( fShort )
- {
- Nwk_ManPrintStatsShort( pAbc->pAbc8Ntl, pAbc->pAbc8Aig, pAbc->pAbc8Nwk );
- return 0;
- }
- // get the input file name
- if ( pAbc->pAbc8Ntl )
- {
- Abc_Print( -1, "NETLIST: " );
- Ntl_ManPrintStats( pAbc->pAbc8Ntl );
- }
- if ( pAbc->pAbc8Aig )
- {
- Abc_Print( -1, "AIG: " );
- Aig_ManPrintStats( pAbc->pAbc8Aig );
- }
- if ( pAbc->pAbc8Nwk )
- {
- if ( pAbc->pAbc8Lib == NULL )
- {
- Abc_Print( -1, "LUT library is not given. Using default LUT library.\n" );
- pAbc->pAbc8Lib = If_SetSimpleLutLib( 6 );
- }
- Abc_Print( -1, "MAPPED: " );
- Nwk_ManPrintStats( pAbc->pAbc8Nwk, pAbc->pAbc8Lib, fSaveBest, fDumpResult, fPower, pAbc->pAbc8Ntl );
- }
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *ps [-bdpsh]\n" );
- Abc_Print( -2, "\t prints design statistics\n" );
- Abc_Print( -2, "\t-b : toggles saving the best logic network in \"best.blif\" [default = %s]\n", fSaveBest? "yes": "no" );
- Abc_Print( -2, "\t-d : toggles dumping network into file \"<input_file_name>_dump.blif\" [default = %s]\n", fDumpResult? "yes": "no" );
- Abc_Print( -2, "\t-p : toggles printing power dissipation due to switching [default = %s]\n", fPower? "yes": "no" );
- Abc_Print( -2, "\t-s : toggles short printing mode [default = %s]\n", fShort? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Pfan( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- int c;
-
- // set defaults
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF )
- {
- switch ( c )
- {
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Nwk == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Pfan(): There is no mapped network for print fanin/fanout.\n" );
- return 1;
- }
- Nwk_ManPrintFanioNew( pAbc->pAbc8Nwk );
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *pfan [-h]\n" );
- Abc_Print( -2, "\t prints fanin/fanout stats of the mapped network\n" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8If( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- char Buffer[200];
- char LutSize[200];
- If_Par_t Pars, * pPars = &Pars;
- Nwk_Man_t * pNtkNew;
- int c;
-
- if ( pAbc->pAbc8Lib == NULL )
- {
-// Abc_Print( -1, "LUT library is not given. Using default LUT library.\n" );
- pAbc->pAbc8Lib = If_SetSimpleLutLib( 6 );
- }
-
- // set defaults
- Nwk_ManSetIfParsDefault( pPars );
- pPars->pLutLib = pAbc->pAbc8Lib;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "KCFADEqaflepmrsdbvh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'K':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-K\" should be followed by a positive integer.\n" );
- goto usage;
- }
- pPars->nLutSize = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nLutSize < 0 )
- goto usage;
- // if the LUT size is specified, disable library
- pPars->pLutLib = NULL;
- break;
- case 'C':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-C\" should be followed by a positive integer.\n" );
- goto usage;
- }
- pPars->nCutsMax = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nCutsMax < 0 )
- goto usage;
- break;
- case 'F':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-F\" should be followed by a positive integer.\n" );
- goto usage;
- }
- pPars->nFlowIters = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nFlowIters < 0 )
- goto usage;
- break;
- case 'A':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-A\" should be followed by a positive integer.\n" );
- goto usage;
- }
- pPars->nAreaIters = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nAreaIters < 0 )
- goto usage;
- break;
- case 'D':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-D\" should be followed by a floating point number.\n" );
- goto usage;
- }
- pPars->DelayTarget = (float)atof(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->DelayTarget <= 0.0 )
- goto usage;
- break;
- case 'E':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-E\" should be followed by a floating point number.\n" );
- goto usage;
- }
- pPars->Epsilon = (float)atof(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->Epsilon < 0.0 || pPars->Epsilon > 1.0 )
- goto usage;
- break;
- case 'q':
- pPars->fPreprocess ^= 1;
- break;
- case 'a':
- pPars->fArea ^= 1;
- break;
- case 'r':
- pPars->fExpRed ^= 1;
- break;
- case 'f':
- pPars->fFancy ^= 1;
- break;
- case 'l':
- pPars->fLatchPaths ^= 1;
- break;
- case 'e':
- pPars->fEdge ^= 1;
- break;
- case 'p':
- pPars->fPower ^= 1;
- break;
- case 'm':
- pPars->fCutMin ^= 1;
- break;
- case 's':
- pPars->fSeqMap ^= 1;
- break;
- case 'd':
- pPars->fBidec ^= 1;
- break;
- case 'b':
- pPars->fUseBat ^= 1;
- break;
- case 'v':
- pPars->fVerbose ^= 1;
- break;
- case 'h':
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8If(): There is no AIG to map.\n" );
- return 1;
- }
-
- if ( pPars->nLutSize < 3 || pPars->nLutSize > IF_MAX_LUTSIZE )
- {
- Abc_Print( -1, "Incorrect LUT size (%d).\n", pPars->nLutSize );
- return 1;
- }
-
- if ( pPars->nCutsMax < 1 || pPars->nCutsMax >= (1<<12) )
- {
- Abc_Print( -1, "Incorrect number of cuts.\n" );
- return 1;
- }
-
- // enable truth table computation if choices are selected
- if ( (c = Aig_ManChoiceNum( pAbc->pAbc8Aig )) )
- {
-// Abc_Print( 0, "Performing LUT mapping with %d choices.\n", c );
- pPars->fExpRed = 0;
- }
-
- if ( pPars->fUseBat )
- {
- if ( pPars->nLutSize < 4 || pPars->nLutSize > 6 )
- {
- Abc_Print( -1, "This feature only works for {4,5,6}-LUTs.\n" );
- return 1;
- }
- pPars->fCutMin = 1;
- }
-
- // enable truth table computation if cut minimization is selected
- if ( pPars->fCutMin )
- {
- pPars->fTruth = 1;
- pPars->fExpRed = 0;
- }
-
- // complain if truth tables are requested but the cut size is too large
- if ( pPars->fTruth && pPars->nLutSize > IF_MAX_FUNC_LUTSIZE )
- {
- Abc_Print( -1, "Truth tables cannot be computed for LUT larger than %d inputs.\n", IF_MAX_FUNC_LUTSIZE );
- return 1;
- }
-
- pNtkNew = Nwk_MappingIf( pAbc->pAbc8Aig, Ntl_ManReadTimeMan(pAbc->pAbc8Ntl), pPars );
- if ( pNtkNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8If(): Mapping of the AIG has failed.\n" );
- return 1;
- }
- if ( pAbc->pAbc8Nwk != NULL )
- Nwk_ManFree( pAbc->pAbc8Nwk );
- pAbc->pAbc8Nwk = pNtkNew;
- return 0;
-
-usage:
- if ( pPars->DelayTarget == -1 )
- sprintf( Buffer, "best possible" );
- else
- sprintf( Buffer, "%.2f", pPars->DelayTarget );
- if ( pPars->nLutSize == -1 )
- sprintf( LutSize, "library" );
- else
- sprintf( LutSize, "%d", pPars->nLutSize );
- Abc_Print( -2, "usage: *if [-KCFA num] [-DE float] [-qarlepmdbvh]\n" );
- Abc_Print( -2, "\t performs FPGA technology mapping of the network\n" );
- Abc_Print( -2, "\t-K num : the number of LUT inputs (2 < num < %d) [default = %s]\n", IF_MAX_LUTSIZE+1, LutSize );
- Abc_Print( -2, "\t-C num : the max number of priority cuts (0 < num < 2^12) [default = %d]\n", pPars->nCutsMax );
- Abc_Print( -2, "\t-F num : the number of area flow recovery iterations (num >= 0) [default = %d]\n", pPars->nFlowIters );
- Abc_Print( -2, "\t-A num : the number of exact area recovery iterations (num >= 0) [default = %d]\n", pPars->nAreaIters );
- Abc_Print( -2, "\t-D float : sets the delay constraint for the mapping [default = %s]\n", Buffer );
- Abc_Print( -2, "\t-E float : sets epsilon used for tie-breaking [default = %f]\n", pPars->Epsilon );
- Abc_Print( -2, "\t-q : toggles preprocessing using several starting points [default = %s]\n", pPars->fPreprocess? "yes": "no" );
- Abc_Print( -2, "\t-a : toggles area-oriented mapping [default = %s]\n", pPars->fArea? "yes": "no" );
-// Abc_Print( -2, "\t-f : toggles one fancy feature [default = %s]\n", pPars->fFancy? "yes": "no" );
- Abc_Print( -2, "\t-r : enables expansion/reduction of the best cuts [default = %s]\n", pPars->fExpRed? "yes": "no" );
- Abc_Print( -2, "\t-l : optimizes latch paths for delay, other paths for area [default = %s]\n", pPars->fLatchPaths? "yes": "no" );
- Abc_Print( -2, "\t-e : uses edge-based cut selection heuristics [default = %s]\n", pPars->fEdge? "yes": "no" );
- Abc_Print( -2, "\t-p : uses power-aware cut selection heuristics [default = %s]\n", pPars->fPower? "yes": "no" );
- Abc_Print( -2, "\t-m : enables cut minimization by removing vacuous variables [default = %s]\n", pPars->fCutMin? "yes": "no" );
-// Abc_Print( -2, "\t-s : toggles sequential mapping [default = %s]\n", pPars->fSeqMap? "yes": "no" );
- Abc_Print( -2, "\t-d : toggles deriving local AIGs using bi-decomposition [default = %s]\n", pPars->fBidec? "yes": "no" );
- Abc_Print( -2, "\t-b : toggles the use of one special feature [default = %s]\n", pPars->fUseBat? "yes": "no" );
- Abc_Print( -2, "\t-v : toggles verbose output [default = %s]\n", pPars->fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : prints the command usage\n");
- return 1;
-}
-
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8DChoice( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Aig_Man_t * pAigNew;
- int fBalance, fVerbose, fUpdateLevel, fConstruct, c;
- int nConfMax, nLevelMax;
- extern Aig_Man_t * Ntl_ManPerformChoicing( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fConstruct, int nConfMax, int nLevelMax, int fVerbose );
-
- // set defaults
- fBalance = 1;
- fUpdateLevel = 1;
- fConstruct = 0;
- nConfMax = 1000;
- nLevelMax = 0;
- fVerbose = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "CLblcvh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'C':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" );
- goto usage;
- }
- nConfMax = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( nConfMax < 0 )
- goto usage;
- break;
- case 'L':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" );
- goto usage;
- }
- nLevelMax = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( nLevelMax < 0 )
- goto usage;
- break;
- case 'b':
- fBalance ^= 1;
- break;
- case 'l':
- fUpdateLevel ^= 1;
- break;
- case 'c':
- fConstruct ^= 1;
- break;
- case 'v':
- fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8DChoice(): There is no AIG to synthesize.\n" );
- return 1;
- }
-
- // get the input file name
- pAigNew = Ntl_ManPerformChoicing( pAbc->pAbc8Aig, fBalance, fUpdateLevel, fConstruct, nConfMax, nLevelMax, fVerbose );
- if ( pAigNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8DChoice(): Tranformation has failed.\n" );
- return 1;
- }
- Aig_ManStop( pAbc->pAbc8Aig );
- pAbc->pAbc8Aig = pAigNew;
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *dchoice [-C num] [-L num] [-blcvh]\n" );
- Abc_Print( -2, "\t performs AIG-based synthesis and derives choices\n" );
- Abc_Print( -2, "\t-C num : the max number of conflicts at a node [default = %d]\n", nConfMax );
- Abc_Print( -2, "\t-L num : the max level of nodes to consider (0 = not used) [default = %d]\n", nLevelMax );
- Abc_Print( -2, "\t-b : toggle internal balancing [default = %s]\n", fBalance? "yes": "no" );
- Abc_Print( -2, "\t-l : toggle updating level [default = %s]\n", fUpdateLevel? "yes": "no" );
- Abc_Print( -2, "\t-c : toggle constructive computation of choices [default = %s]\n", fConstruct? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Dch( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Dch_Pars_t Pars, * pPars = &Pars;
- Aig_Man_t * pAigNew;
- int c;
- extern Aig_Man_t * Ntl_ManPerformChoicingNew( Aig_Man_t * pAig, Dch_Pars_t * pPars );
-
- // set defaults
- Dch_ManSetDefaultParams( pPars );
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "WCSsptfvh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'W':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-W\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nWords = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nWords < 0 )
- goto usage;
- break;
- case 'C':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nBTLimit = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nBTLimit < 0 )
- goto usage;
- break;
- case 'S':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-S\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nSatVarMax = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nSatVarMax < 0 )
- goto usage;
- break;
- case 's':
- pPars->fSynthesis ^= 1;
- break;
- case 'p':
- pPars->fPower ^= 1;
- break;
- case 't':
- pPars->fSimulateTfo ^= 1;
- break;
- case 'f':
- pPars->fLightSynth ^= 1;
- break;
- case 'v':
- pPars->fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Dch(): There is no AIG to synthesize.\n" );
- return 1;
- }
-
- // get the input file name
- pAigNew = Ntl_ManPerformChoicingNew( pAbc->pAbc8Aig, pPars );
- if ( pAigNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Dch(): Tranformation has failed.\n" );
- return 1;
- }
-// Aig_ManStop( pAbc->pAbc8Aig );
- pAbc->pAbc8Aig = pAigNew;
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *dch [-WCS num] [-sptfvh]\n" );
- Abc_Print( -2, "\t computes structural choices using a new approach\n" );
- Abc_Print( -2, "\t-W num : the max number of simulation words [default = %d]\n", pPars->nWords );
- Abc_Print( -2, "\t-C num : the max number of conflicts at a node [default = %d]\n", pPars->nBTLimit );
- Abc_Print( -2, "\t-S num : the max number of SAT variables [default = %d]\n", pPars->nSatVarMax );
- Abc_Print( -2, "\t-s : toggle synthesizing three snapshots [default = %s]\n", pPars->fSynthesis? "yes": "no" );
- Abc_Print( -2, "\t-p : toggle power-aware rewriting [default = %s]\n", pPars->fPower? "yes": "no" );
- Abc_Print( -2, "\t-t : toggle simulation of the TFO classes [default = %s]\n", pPars->fSimulateTfo? "yes": "no" );
- Abc_Print( -2, "\t-f : toggle using lighter logic synthesis [default = %s]\n", pPars->fLightSynth? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", pPars->fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Dc2( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Aig_Man_t * pAigNew;
- int c;
- int fBalance;
- int fUpdateLevel;
- int fVerbose;
- int fPower;
-
- extern Aig_Man_t * Dar_ManCompress2( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fFanout, int fPower, int fVerbose );
-
- // set defaults
- fBalance = 1;
- fUpdateLevel = 1;
- fPower = 0;
- fVerbose = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "blpvh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'b':
- fBalance ^= 1;
- break;
- case 'l':
- fUpdateLevel ^= 1;
- break;
- case 'p':
- fPower ^= 1;
- break;
- case 'v':
- fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Dc2(): There is no AIG to synthesize.\n" );
- return 1;
- }
-
- // get the input file name
- pAigNew = Dar_ManCompress2( pAbc->pAbc8Aig, fBalance, fUpdateLevel, 1, fPower, fVerbose );
- if ( pAigNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Dc2(): Tranformation has failed.\n" );
- return 1;
- }
- Aig_ManStop( pAbc->pAbc8Aig );
- pAbc->pAbc8Aig = pAigNew;
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *dc2 [-blpvh]\n" );
- Abc_Print( -2, "\t performs AIG-based synthesis without deriving choices\n" );
- Abc_Print( -2, "\t-b : toggle internal balancing [default = %s]\n", fBalance? "yes": "no" );
- Abc_Print( -2, "\t-l : toggle updating level [default = %s]\n", fUpdateLevel? "yes": "no" );
- Abc_Print( -2, "\t-p : toggle power-aware rewriting [default = %s]\n", fPower? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Bidec( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- int c;
-
- // set defaults
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF )
- {
- switch ( c )
- {
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Nwk == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Bidec(): There is no mapped network to strash.\n" );
- return 1;
- }
- Nwk_ManBidecResyn( pAbc->pAbc8Nwk, 0 );
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *bidec [-h]\n" );
- Abc_Print( -2, "\t performs bi-decomposition of local functions\n" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Strash( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Aig_Man_t * pAigNew;
- int c;
-
- // set defaults
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF )
- {
- switch ( c )
- {
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Nwk == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Strash(): There is no mapped network to strash.\n" );
- return 1;
- }
-
- pAigNew = Nwk_ManStrash( pAbc->pAbc8Nwk );
- if ( pAigNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Strash(): Tranformation has failed.\n" );
- return 1;
- }
- Aig_ManStop( pAbc->pAbc8Aig );
- pAbc->pAbc8Aig = pAigNew;
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *st [-h]\n" );
- Abc_Print( -2, "\t performs structural hashing of mapped network\n" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Mfs( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Mfx_Par_t Pars, * pPars = &Pars;
- int c;
-// extern int Mfx_Perform( void * pNtk, Mfx_Par_t * pPars, If_Lib_t * pLutLib );
-
- // set defaults
- Mfx_ParsDefault( pPars );
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "WFDMLCraespvwh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'W':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-W\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nWinTfoLevs = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nWinTfoLevs < 0 )
- goto usage;
- break;
- case 'F':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-F\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nFanoutsMax = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nFanoutsMax < 1 )
- goto usage;
- break;
- case 'D':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-D\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nDepthMax = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nDepthMax < 0 )
- goto usage;
- break;
- case 'M':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-M\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nWinSizeMax = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nWinSizeMax < 0 )
- goto usage;
- break;
- case 'L':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nGrowthLevel = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nGrowthLevel < 0 || pPars->nGrowthLevel > ABC_INFINITY )
- goto usage;
- break;
- case 'C':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nBTLimit = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nBTLimit < 0 )
- goto usage;
- break;
- case 'r':
- pPars->fResub ^= 1;
- break;
- case 'a':
- pPars->fArea ^= 1;
- break;
- case 'e':
- pPars->fMoreEffort ^= 1;
- break;
- case 's':
- pPars->fSwapEdge ^= 1;
- break;
- case 'p':
- pPars->fPower ^= 1;
- break;
- case 'v':
- pPars->fVerbose ^= 1;
- break;
- case 'w':
- pPars->fVeryVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Nwk == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Mfs(): There is no mapped network.\n" );
- return 1;
- }
- if ( pAbc->pAbc8Lib == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Mfs(): There is no LUT library.\n" );
- return 1;
- }
- if ( If_LutLibDelaysAreDifferent(pAbc->pAbc8Lib) )
- {
- Abc_Print( -1, "Abc_CommandAbc8Mfs(): Cannot perform don't-care simplication with variable-pin-delay LUT model.\n" );
- Abc_Print( -1, "The delay model should be fixed-pin-delay, for example, the delay of all pins of all LUTs is 0.4.\n" );
- return 1;
- }
-
-
- // modify the current network
- if ( !Mfx_Perform( pAbc->pAbc8Nwk, pPars, pAbc->pAbc8Lib ) )
- {
- Abc_Print( -1, "Abc_CommandAbc8Mfs(): Command has failed.\n" );
- return 1;
- }
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *mfs [-WFDMLC num] [-raespvh]\n" );
- Abc_Print( -2, "\t performs don't-care-based optimization of logic networks\n" );
- Abc_Print( -2, "\t-W <num> : the number of levels in the TFO cone (0 <= num) [default = %d]\n", pPars->nWinTfoLevs );
- Abc_Print( -2, "\t-F <num> : the max number of fanouts to skip (1 <= num) [default = %d]\n", pPars->nFanoutsMax );
- Abc_Print( -2, "\t-D <num> : the max depth nodes to try (0 = no limit) [default = %d]\n", pPars->nDepthMax );
- Abc_Print( -2, "\t-M <num> : the max node count of windows to consider (0 = no limit) [default = %d]\n", pPars->nWinSizeMax );
- Abc_Print( -2, "\t-L <num> : the max increase in node level after resynthesis (0 <= num) [default = %d]\n", pPars->nGrowthLevel );
- Abc_Print( -2, "\t-C <num> : the max number of conflicts in one SAT run (0 = no limit) [default = %d]\n", pPars->nBTLimit );
- Abc_Print( -2, "\t-r : toggle resubstitution and dc-minimization [default = %s]\n", pPars->fResub? "resub": "dc-min" );
- Abc_Print( -2, "\t-a : toggle minimizing area or area+edges [default = %s]\n", pPars->fArea? "area": "area+edges" );
- Abc_Print( -2, "\t-e : toggle high-effort resubstitution [default = %s]\n", pPars->fMoreEffort? "yes": "no" );
- Abc_Print( -2, "\t-s : toggle evaluation of edge swapping [default = %s]\n", pPars->fSwapEdge? "yes": "no" );
- Abc_Print( -2, "\t-p : toggle power-aware optimization [default = %s]\n", pPars->fPower? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle printing optimization summary [default = %s]\n", pPars->fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-w : toggle printing detailed stats for each node [default = %s]\n", pPars->fVeryVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Lutpack( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- int c;
-
- Abc_Print( -1, "This command is temporarily disabled.\n" );
- return 0;
-
- // set defaults
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF )
- {
- switch ( c )
- {
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Nwk == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Lutpack(): There is no mapped network to strash.\n" );
- return 1;
- }
-
-
- return 0;
-usage:
-/*
- Abc_Print( -2, "usage: *lp [-h]\n" );
- Abc_Print( -2, "usage: lutpack [-N <num>] [-Q <num>] [-S <num>] [-L <num>] [-szfovwh]\n" );
- Abc_Print( -2, "\t performs \"rewriting\" for LUT network;\n" );
- Abc_Print( -2, "\t determines LUT size as the max fanin count of a node;\n" );
- Abc_Print( -2, "\t if the network is not LUT-mapped, packs it into 6-LUTs\n" );
- Abc_Print( -2, "\t (there is another command for resynthesis after LUT mapping, \"imfs\")\n" );
- Abc_Print( -2, "\t-N <num> : the max number of LUTs in the structure (2 <= num) [default = %d]\n", pPars->nLutsMax );
- Abc_Print( -2, "\t-Q <num> : the max number of LUTs not in MFFC (0 <= num) [default = %d]\n", pPars->nLutsOver );
- Abc_Print( -2, "\t-S <num> : the max number of LUT inputs shared (0 <= num <= 3) [default = %d]\n", pPars->nVarsShared );
- Abc_Print( -2, "\t-L <num> : max level increase after resynthesis (0 <= num) [default = %d]\n", pPars->nGrowthLevel );
- Abc_Print( -2, "\t-s : toggle iteration till saturation [default = %s]\n", pPars->fSatur? "yes": "no" );
- Abc_Print( -2, "\t-z : toggle zero-cost replacements [default = %s]\n", pPars->fZeroCost? "yes": "no" );
- Abc_Print( -2, "\t-f : toggle using only first node and first cut [default = %s]\n", pPars->fFirst? "yes": "no" );
- Abc_Print( -2, "\t-o : toggle using old implementation [default = %s]\n", pPars->fOldAlgo? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", pPars->fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-w : toggle detailed printout of decomposed functions [default = %s]\n", pPars->fVeryVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
-*/
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Balance( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Aig_Man_t * pAigNew;
- int c;
- int fExor;
- int fUpdateLevel;
- int fVerbose;
- extern Aig_Man_t * Dar_ManBalanceXor( Aig_Man_t * pAig, int fExor, int fUpdateLevel, int fVerbose );
-
- // set defaults
- fExor = 0;
- fUpdateLevel = 1;
- fVerbose = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "xlh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'x':
- fExor ^= 1;
- break;
- case 'l':
- fUpdateLevel ^= 1;
- break;
- case 'v':
- fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Balance(): There is no AIG to synthesize.\n" );
- return 1;
- }
-
- // get the input file name
- pAigNew = Dar_ManBalanceXor( pAbc->pAbc8Aig, fExor, fUpdateLevel, fVerbose );
- if ( pAigNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Balance(): Tranformation has failed.\n" );
- return 1;
- }
- Aig_ManStop( pAbc->pAbc8Aig );
- pAbc->pAbc8Aig = pAigNew;
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *b [-xlvh]\n" );
- Abc_Print( -2, "\t performs balancing of the AIG\n" );
- Abc_Print( -2, "\t-x : toggle using XOR-balancing [default = %s]\n", fExor? "yes": "no" );
- Abc_Print( -2, "\t-l : toggle updating level [default = %s]\n", fUpdateLevel? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Speedup( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Aig_Man_t * pAigNew;
- int c;
- int fUseLutLib = 0;
- int Percentage = 100;
- int Degree = 5;
- int fVerbose = 0;
- int fVeryVerbose = 0;
-
- // set defaults
- fUseLutLib = 0;
- Percentage = 5;
- Degree = 2;
- fVerbose = 0;
- fVeryVerbose = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "PNlvwh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'P':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" );
- goto usage;
- }
- Percentage = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( Percentage < 1 || Percentage > 100 )
- goto usage;
- break;
- case 'N':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-N\" should be followed by an integer.\n" );
- goto usage;
- }
- Degree = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( Degree < 1 || Degree > 5 )
- goto usage;
- break;
- case 'l':
- fUseLutLib ^= 1;
- break;
- case 'v':
- fVerbose ^= 1;
- break;
- case 'w':
- fVeryVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Nwk == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Speedup(): There is no mapped network to strash.\n" );
- return 1;
- }
-
- pAigNew = Nwk_ManSpeedup( pAbc->pAbc8Nwk, fUseLutLib, Percentage, Degree, fVerbose, fVeryVerbose );
- if ( pAigNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Speedup(): Tranformation has failed.\n" );
- return 1;
- }
- Aig_ManStop( pAbc->pAbc8Aig );
- pAbc->pAbc8Aig = pAigNew;
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *speedup [-P num] [-N num] [-lvwh]\n" );
- Abc_Print( -2, "\t transforms LUT-mapped network into an AIG with choices;\n" );
- Abc_Print( -2, "\t the choices are added to speedup the next round of mapping\n" );
- Abc_Print( -2, "\t-P <num> : delay delta defining critical path for library model [default = %d%%]\n", Percentage );
- Abc_Print( -2, "\t-N <num> : the max critical path degree for resynthesis (0 < num < 6) [default = %d]\n", Degree );
- Abc_Print( -2, "\t-l : toggle using unit- or LUT-library-delay model [default = %s]\n", fUseLutLib? "lib" : "unit" );
- Abc_Print( -2, "\t-v : toggle printing optimization summary [default = %s]\n", fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-w : toggle printing detailed stats for each node [default = %s]\n", fVeryVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Merge( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Nwk_LMPars_t Pars, * pPars = &Pars;
- Vec_Int_t * vResult;
- int c;
-
- // set defaults
- memset( pPars, 0, sizeof(Nwk_LMPars_t) );
- pPars->nMaxLutSize = 5; // the max LUT size for merging (N=5)
- pPars->nMaxSuppSize = 5; // the max total support size after merging (S=5)
- pPars->nMaxDistance = 3; // the max number of nodes separating LUTs
- pPars->nMaxLevelDiff = 2; // the max difference in levels
- pPars->nMaxFanout = 100; // the max number of fanouts to traverse
- pPars->fUseDiffSupp = 0; // enables the use of nodes with different support
- pPars->fUseTfiTfo = 0; // enables the use of TFO/TFO nodes as candidates
- pPars->fVeryVerbose = 0; // enables additional verbose output
- pPars->fVerbose = 1; // enables verbose output
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "NSDLFscvwh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'N':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-N\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nMaxLutSize = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nMaxLutSize < 2 )
- goto usage;
- break;
- case 'S':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-S\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nMaxSuppSize = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nMaxSuppSize < 2 )
- goto usage;
- break;
- case 'D':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-D\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nMaxDistance = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nMaxDistance < 2 )
- goto usage;
- break;
- case 'L':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nMaxLevelDiff = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nMaxLevelDiff < 2 )
- goto usage;
- break;
- case 'F':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-F\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nMaxFanout = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nMaxFanout < 2 )
- goto usage;
- break;
- case 's':
- pPars->fUseDiffSupp ^= 1;
- break;
- case 'c':
- pPars->fUseTfiTfo ^= 1;
- break;
- case 'w':
- pPars->fVeryVerbose ^= 1;
- break;
- case 'v':
- pPars->fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Nwk == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Speedup(): There is no mapped network to merge LUTs.\n" );
- return 1;
- }
-
- vResult = Nwk_ManLutMerge( pAbc->pAbc8Nwk, pPars );
- Vec_IntFree( vResult );
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *merge [-NSDLF num] [-scwvh]\n" );
- Abc_Print( -2, "\t creates pairs of topologically-related LUTs\n" );
- Abc_Print( -2, "\t-N <num> : the max LUT size for merging (1 < num) [default = %d]\n", pPars->nMaxLutSize );
- Abc_Print( -2, "\t-S <num> : the max total support size after merging (1 < num) [default = %d]\n", pPars->nMaxSuppSize );
- Abc_Print( -2, "\t-D <num> : the max distance in terms of LUTs (0 < num) [default = %d]\n", pPars->nMaxDistance );
- Abc_Print( -2, "\t-L <num> : the max difference in levels (0 <= num) [default = %d]\n", pPars->nMaxLevelDiff );
- Abc_Print( -2, "\t-F <num> : the max number of fanouts to stop traversal (0 < num) [default = %d]\n", pPars->nMaxFanout );
- Abc_Print( -2, "\t-s : toggle the use of nodes without support overlap [default = %s]\n", pPars->fUseDiffSupp? "yes" : "no" );
- Abc_Print( -2, "\t-c : toggle the use of TFI/TFO nodes as candidates [default = %s]\n", pPars->fUseTfiTfo? "yes" : "no" );
- Abc_Print( -2, "\t-w : toggle printing detailed stats for each node [default = %s]\n", pPars->fVeryVerbose? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle printing optimization summary [default = %s]\n", pPars->fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Insert( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Ntl_Man_t * pNtlNew;
- int c;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Insert(): There is no design.\n" );
- return 1;
- }
- if ( pAbc->pAbc8Nwk == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Insert(): There is no network to insert.\n" );
- return 1;
- }
- pNtlNew = Ntl_ManInsertNtk( pAbc->pAbc8Ntl, pAbc->pAbc8Nwk );
- Abc_FrameClearDesign();
- pAbc->pAbc8Ntl = pNtlNew;
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *insert [-h]\n" );
- Abc_Print( -2, "\t inserts the mapped network into the netlist\n" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8ClpLut( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Ntl_Man_t * pNtlNew;
- int c;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Insert(): There is no design.\n" );
- return 1;
- }
- pNtlNew = Ntl_ManDupCollapseLuts( pAbc->pAbc8Ntl );
- Abc_FrameClearDesign();
- pAbc->pAbc8Ntl = pNtlNew;
- pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl );
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *clplut [-h]\n" );
- Abc_Print( -2, "\t collapses comb white boxes whose model name begins with \"LUT\"\n" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Fraig( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Ntl_Man_t * pNtlNew, * pNtlOld;
- int c, fVerbose;
- int nPartSize;
- int nConfLimit;
- int nLevelMax;
- int fUseCSat;
-
- // set defaults
- nPartSize = 0;
- nConfLimit = 100;
- nLevelMax = 0;
- fUseCSat = 0;
- fVerbose = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "PCLcvh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'P':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" );
- goto usage;
- }
- nPartSize = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( nPartSize < 0 )
- goto usage;
- break;
- case 'C':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" );
- goto usage;
- }
- nConfLimit = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( nConfLimit < 0 )
- goto usage;
- break;
- case 'L':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" );
- goto usage;
- }
- nLevelMax = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( nLevelMax < 0 )
- goto usage;
- break;
- case 'c':
- fUseCSat ^= 1;
- break;
- case 'v':
- fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
-
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Fraig(): There is no design to SAT sweep.\n" );
- return 1;
- }
-
- // get the input file name
- pNtlOld = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL;
- pNtlNew = Ntl_ManFraig( pNtlOld, nPartSize, nConfLimit, nLevelMax, fUseCSat, fVerbose );
- if ( pNtlNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Fraig(): Tranformation has failed.\n" );
- return 1;
- }
-
- Abc_FrameClearDesign();
- pAbc->pAbc8Ntl = pNtlNew;
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Fraig(): Reading BLIF has failed.\n" );
- return 1;
- }
- pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl );
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Fraig(): AIG extraction has failed.\n" );
- return 1;
- }
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *fraig [-P num] [-C num] [-L num] [-vh]\n" );
- Abc_Print( -2, "\t applies SAT sweeping to netlist with white-boxes\n" );
- Abc_Print( -2, "\t-P num : partition size (0 = partitioning is not used) [default = %d]\n", nPartSize );
- Abc_Print( -2, "\t-C num : limit on the number of conflicts [default = %d]\n", nConfLimit );
- Abc_Print( -2, "\t-L num : limit on node level to fraig (0 = fraig all nodes) [default = %d]\n", nLevelMax );
-// Abc_Print( -2, "\t-c : toggle using new AIG package and SAT solver [default = %s]\n", fUseCSat? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Scl( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Ntl_Man_t * pNtlNew, * pNtlOld;
- int c;
- int fLatchConst;
- int fLatchEqual;
- int fVerbose;
-
- // set defaults
- fLatchConst = 1;
- fLatchEqual = 1;
- fVerbose = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "cevh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'c':
- fLatchConst ^= 1;
- break;
- case 'e':
- fLatchEqual ^= 1;
- break;
- case 'v':
- fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
-
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Scl(): There is no design to SAT sweep.\n" );
- return 1;
- }
-
- if ( Ntl_ManIsComb(pAbc->pAbc8Ntl) )
- {
- Abc_Print( -1, "Abc_CommandAbc8Scl(): The network is combinational.\n" );
- return 0;
- }
-
- // get the input file name
- pNtlOld = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL;
- pNtlNew = Ntl_ManScl( pNtlOld, fLatchConst, fLatchEqual, fVerbose );
- if ( pNtlNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Scl(): Tranformation has failed.\n" );
- return 1;
- }
-
- Abc_FrameClearDesign();
- pAbc->pAbc8Ntl = pNtlNew;
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Scl(): Reading BLIF has failed.\n" );
- return 1;
- }
- pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl );
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Scl(): AIG extraction has failed.\n" );
- return 1;
- }
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *scl [-cevh]\n" );
- Abc_Print( -2, "\t performs sequential cleanup of the netlist\n" );
- Abc_Print( -2, "\t by removing nodes and latches that do not feed into POs\n" );
- Abc_Print( -2, "\t-c : sweep stuck-at latches detected by ternary simulation [default = %s]\n", fLatchConst? "yes": "no" );
- Abc_Print( -2, "\t-e : merge equal latches (same data inputs and init states) [default = %s]\n", fLatchEqual? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Lcorr( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Ntl_Man_t * pNtlNew, * pNtlOld;
- int c;
- int fScorrGia;
- int fUseCSat;
- int nFramesP;
- int nConfMax;
- int fVerbose;
-
- // set defaults
- fScorrGia = 0;
- fUseCSat = 0;
- nFramesP = 0;
- nConfMax = 10000;
- fVerbose = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "PCncvh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'P':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" );
- goto usage;
- }
- nFramesP = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( nFramesP < 0 )
- goto usage;
- break;
- case 'C':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" );
- goto usage;
- }
- nConfMax = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( nConfMax < 0 )
- goto usage;
- break;
- case 'n':
- fScorrGia ^= 1;
- break;
- case 'c':
- fUseCSat ^= 1;
- break;
- case 'v':
- fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
-
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Lcorr(): There is no design to SAT sweep.\n" );
- return 1;
- }
-
- if ( Ntl_ManIsComb(pAbc->pAbc8Ntl) )
- {
- Abc_Print( -1, "Abc_CommandAbc8Lcorr(): The network is combinational.\n" );
- return 0;
- }
-
- // get the input file name
- pNtlOld = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL;
- pNtlNew = Ntl_ManLcorr( pNtlOld, nConfMax, fScorrGia, fUseCSat, fVerbose );
- if ( pNtlNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Lcorr(): Tranformation has failed.\n" );
- return 1;
- }
-
- Abc_FrameClearDesign();
- pAbc->pAbc8Ntl = pNtlNew;
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Lcorr(): Reading BLIF has failed.\n" );
- return 1;
- }
- pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl );
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Lcorr(): AIG extraction has failed.\n" );
- return 1;
- }
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *lcorr [-C num] [-ncvh]\n" );
- Abc_Print( -2, "\t computes latch correspondence for the netlist\n" );
-// Abc_Print( -2, "\t-P num : number of time frames to use as the prefix [default = %d]\n", nFramesP );
- Abc_Print( -2, "\t-C num : limit on the number of conflicts [default = %d]\n", nConfMax );
- Abc_Print( -2, "\t-n : toggle using new AIG package [default = %s]\n", fScorrGia? "yes": "no" );
- Abc_Print( -2, "\t-c : toggle using new AIG package and SAT solver [default = %s]\n", fUseCSat? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Ssw( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Ntl_Man_t * pNtlNew, * pNtlOld;
- Fra_Ssw_t Pars, * pPars = &Pars;
- int c;
-
- // set defaults
- pPars->nPartSize = 0;
- pPars->nOverSize = 0;
- pPars->nFramesP = 0;
- pPars->nFramesK = 1;
- pPars->nMaxImps = 5000;
- pPars->nMaxLevs = 0;
- pPars->nMinDomSize = 100;
- pPars->fUseImps = 0;
- pPars->fRewrite = 0;
- pPars->fFraiging = 0;
- pPars->fLatchCorr = 0;
- pPars->fWriteImps = 0;
- pPars->fUse1Hot = 0;
- pPars->fVerbose = 0;
- pPars->TimeLimit = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "PQNFILDirfletvh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'P':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nPartSize = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nPartSize < 2 )
- goto usage;
- break;
- case 'Q':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-Q\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nOverSize = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nOverSize < 0 )
- goto usage;
- break;
- case 'N':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-N\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nFramesP = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nFramesP < 0 )
- goto usage;
- break;
- case 'F':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-F\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nFramesK = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nFramesK <= 0 )
- goto usage;
- break;
- case 'I':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-I\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nMaxImps = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nMaxImps <= 0 )
- goto usage;
- break;
- case 'L':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nMaxLevs = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nMaxLevs <= 0 )
- goto usage;
- break;
- case 'D':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-D\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nMinDomSize = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nMinDomSize <= 0 )
- goto usage;
- break;
- case 'i':
- pPars->fUseImps ^= 1;
- break;
- case 'r':
- pPars->fRewrite ^= 1;
- break;
- case 'f':
- pPars->fFraiging ^= 1;
- break;
- case 'l':
- pPars->fLatchCorr ^= 1;
- break;
- case 'e':
- pPars->fWriteImps ^= 1;
- break;
- case 't':
- pPars->fUse1Hot ^= 1;
- break;
- case 'v':
- pPars->fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
-
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Ssw(): There is no design to SAT sweep.\n" );
- return 1;
- }
-
- if ( Ntl_ManIsComb(pAbc->pAbc8Ntl) )
- {
- Abc_Print( -1, "The network is combinational.\n" );
- return 0;
- }
-
- if ( pPars->nFramesK > 1 && pPars->fUse1Hot )
- {
- Abc_Print( -1, "Currrently can only use one-hotness for simple induction (K=1).\n" );
- return 0;
- }
-
- if ( pPars->nFramesP && pPars->fUse1Hot )
- {
- Abc_Print( -1, "Currrently can only use one-hotness without prefix.\n" );
- return 0;
- }
-
- // get the input file name
- pNtlOld = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL;
- pNtlNew = Ntl_ManSsw( pNtlOld, pPars );
- if ( pNtlNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Ssw(): Tranformation has failed.\n" );
- return 1;
- }
-
- Abc_FrameClearDesign();
- pAbc->pAbc8Ntl = pNtlNew;
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Ssw(): Reading BLIF has failed.\n" );
- return 1;
- }
- pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl );
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Ssw(): AIG extraction has failed.\n" );
- return 1;
- }
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *ssw [-PQNFLD num] [-lrfetvh]\n" );
- Abc_Print( -2, "\t performs sequential sweep using K-step induction on the netlist \n" );
- Abc_Print( -2, "\t-P num : max partition size (0 = no partitioning) [default = %d]\n", pPars->nPartSize );
- Abc_Print( -2, "\t-Q num : partition overlap (0 = no overlap) [default = %d]\n", pPars->nOverSize );
- Abc_Print( -2, "\t-N num : number of time frames to use as the prefix [default = %d]\n", pPars->nFramesP );
- Abc_Print( -2, "\t-F num : number of time frames for induction (1=simple) [default = %d]\n", pPars->nFramesK );
- Abc_Print( -2, "\t-L num : max number of levels to consider (0=all) [default = %d]\n", pPars->nMaxLevs );
- Abc_Print( -2, "\t-D num : min size of a clock domain used for synthesis [default = %d]\n", pPars->nMinDomSize );
-// Abc_Print( -2, "\t-I num : max number of implications to consider [default = %d]\n", pPars->nMaxImps );
-// Abc_Print( -2, "\t-i : toggle using implications [default = %s]\n", pPars->fUseImps? "yes": "no" );
- Abc_Print( -2, "\t-l : toggle latch correspondence only [default = %s]\n", pPars->fLatchCorr? "yes": "no" );
- Abc_Print( -2, "\t-r : toggle AIG rewriting [default = %s]\n", pPars->fRewrite? "yes": "no" );
- Abc_Print( -2, "\t-f : toggle fraiging (combinational SAT sweeping) [default = %s]\n", pPars->fFraiging? "yes": "no" );
- Abc_Print( -2, "\t-e : toggle writing implications as assertions [default = %s]\n", pPars->fWriteImps? "yes": "no" );
- Abc_Print( -2, "\t-t : toggle using one-hotness conditions [default = %s]\n", pPars->fUse1Hot? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", pPars->fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Scorr( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Ntl_Man_t * pNtlNew, * pNtlOld;
- Ssw_Pars_t Pars, * pPars = &Pars;
- int c;
-
- // set defaults
- Ssw_ManSetDefaultParams( pPars );
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "PQFCLSDVMpldsncvh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'P':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nPartSize = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nPartSize < 2 )
- goto usage;
- break;
- case 'Q':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-Q\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nOverSize = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nOverSize < 0 )
- goto usage;
- break;
- case 'F':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-F\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nFramesK = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nFramesK <= 0 )
- goto usage;
- break;
- case 'C':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nBTLimit = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nBTLimit <= 0 )
- goto usage;
- break;
- case 'L':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nMaxLevs = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nMaxLevs <= 0 )
- goto usage;
- break;
- case 'S':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-S\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nFramesAddSim = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nFramesAddSim < 0 )
- goto usage;
- break;
- case 'D':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-D\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nMinDomSize = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nMinDomSize < 0 )
- goto usage;
- break;
- case 'V':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-V\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nSatVarMax2 = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nSatVarMax2 < 0 )
- goto usage;
- break;
- case 'M':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-M\" should be followed by an integer.\n" );
- goto usage;
- }
- pPars->nRecycleCalls2 = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pPars->nRecycleCalls2 < 0 )
- goto usage;
- break;
- case 'p':
- pPars->fPolarFlip ^= 1;
- break;
- case 'l':
- pPars->fLatchCorr ^= 1;
- break;
- case 'd':
- pPars->fDynamic ^= 1;
- break;
- case 's':
- pPars->fLocalSim ^= 1;
- break;
- case 'n':
- pPars->fScorrGia ^= 1;
- break;
- case 'c':
- pPars->fUseCSat ^= 1;
- break;
- case 'v':
- pPars->fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
-
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Ssw(): There is no design to SAT sweep.\n" );
- return 1;
- }
-
- if ( Ntl_ManIsComb(pAbc->pAbc8Ntl) )
- {
- Abc_Print( -1, "The network is combinational.\n" );
- return 0;
- }
-
- if ( pPars->fDynamic && (pPars->nPartSize || pPars->nOverSize) )
- {
- pPars->nPartSize = 0;
- pPars->nOverSize = 0;
- Abc_Print( -1, "With dynamic partitioning (-d) enabled, static one (-P <num> -Q <num>) is ignored.\n" );
- }
-
- // get the input file name
- pNtlOld = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL;
- pNtlNew = Ntl_ManScorr( pNtlOld, pPars );
- if ( pNtlNew == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Scorr(): Tranformation has failed.\n" );
- return 1;
- }
-
- Abc_FrameClearDesign();
- pAbc->pAbc8Ntl = pNtlNew;
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Scorr(): Reading BLIF has failed.\n" );
- return 1;
- }
- pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl );
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Scorr(): AIG extraction has failed.\n" );
- return 1;
- }
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *scorr [-PQFCLSDVM num] [-pldsncvh]\n" );
- Abc_Print( -2, "\t performs sequential sweep using K-step induction\n" );
- Abc_Print( -2, "\t-P num : max partition size (0 = no partitioning) [default = %d]\n", pPars->nPartSize );
- Abc_Print( -2, "\t-Q num : partition overlap (0 = no overlap) [default = %d]\n", pPars->nOverSize );
- Abc_Print( -2, "\t-F num : number of time frames for induction (1=simple) [default = %d]\n", pPars->nFramesK );
- Abc_Print( -2, "\t-C num : max number of conflicts at a node (0=inifinite) [default = %d]\n", pPars->nBTLimit );
- Abc_Print( -2, "\t-L num : max number of levels to consider (0=all) [default = %d]\n", pPars->nMaxLevs );
- Abc_Print( -2, "\t-S num : additional simulation frames for c-examples (0=none) [default = %d]\n", pPars->nFramesAddSim );
- Abc_Print( -2, "\t-D num : min size of a clock domain used for synthesis [default = %d]\n", pPars->nMinDomSize );
- Abc_Print( -2, "\t-V num : min var num needed to recycle the SAT solver [default = %d]\n", pPars->nSatVarMax2 );
- Abc_Print( -2, "\t-M num : min call num needed to recycle the SAT solver [default = %d]\n", pPars->nRecycleCalls2 );
- Abc_Print( -2, "\t-p : toggle alighning polarity of SAT variables [default = %s]\n", pPars->fPolarFlip? "yes": "no" );
- Abc_Print( -2, "\t-l : toggle latch correspondence only [default = %s]\n", pPars->fLatchCorr? "yes": "no" );
- Abc_Print( -2, "\t-d : toggle dynamic addition of constraints [default = %s]\n", pPars->fDynamic? "yes": "no" );
- Abc_Print( -2, "\t-s : toggle local simulation in the cone of influence [default = %s]\n", pPars->fLocalSim? "yes": "no" );
- Abc_Print( -2, "\t-n : toggle using new AIG package [default = %s]\n", pPars->fScorrGia? "yes": "no" );
- Abc_Print( -2, "\t-c : toggle using new AIG package and SAT solver [default = %s]\n", pPars->fUseCSat? "yes": "no" );
- Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", pPars->fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Sweep( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Ntl_Man_t * pNtlTemp;
- int Counter;
- int fMapped;
- int fVerbose;
- int c;
-
- // set defaults
- fMapped = 0;
- fVerbose = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "mvh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'm':
- fMapped ^= 1;
- break;
- case 'v':
- fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Sweep(): There is no design to sweep.\n" );
- return 1;
- }
-
- // if mapped, insert the network
- if ( fMapped )
- {
- if ( pAbc->pAbc8Nwk == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Sweep(): There is no mapped network to sweep.\n" );
- return 1;
- }
- pNtlTemp = Ntl_ManInsertNtk( pAbc->pAbc8Ntl, pAbc->pAbc8Nwk );
- if ( pNtlTemp == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Sweep(): Inserting mapped network has failed.\n" );
- return 1;
- }
- Abc_FrameClearDesign();
- pAbc->pAbc8Ntl = pNtlTemp;
- }
-
- // sweep the current design
- Counter = Ntl_ManSweep( pAbc->pAbc8Ntl, fVerbose );
- if ( Counter == 0 && fVerbose )
- Abc_Print( -1, "The netlist is unchanged by sweep.\n" );
-
- // if mapped, create new AIG and new mapped network
- if ( fMapped )
- {
- pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl );
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Sweep(): AIG extraction has failed.\n" );
- return 1;
- }
- pAbc->pAbc8Nwk = Ntl_ManExtractNwk( pAbc->pAbc8Ntl, pAbc->pAbc8Aig, NULL );
- if ( pAbc->pAbc8Nwk == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Sweep(): Failed to extract the mapped network.\n" );
- return 1;
- }
- }
- else // remove old AIG/mapped and create new AIG
- {
- pNtlTemp = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL;
- Abc_FrameClearDesign();
- pAbc->pAbc8Ntl = pNtlTemp;
- // extract new AIG
- pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl );
- if ( pAbc->pAbc8Aig == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Sweep(): AIG extraction has failed.\n" );
- return 1;
- }
- }
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *sw [-mvh]\n" );
- Abc_Print( -2, "\t performs structural sweep of the netlist\n" );
- Abc_Print( -2, "\t removes dangling nodes, registers, and white-boxes\n" );
- Abc_Print( -2, "\t-m : inserts mapped network into netlist and sweeps it [default = %s]\n", fMapped? "yes": "no" );
- Abc_Print( -2, "\t-v : toggles verbose output [default = %s]\n", fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Zero( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Ntl_Man_t * pNtlNew;
- int fVerbose;
- int c;
-
- // set defaults
- fVerbose = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'v':
- fVerbose ^= 1;
- break;
- case 'h':
- goto usage;
- default:
- goto usage;
- }
- }
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Zero(): There is no design to convert.\n" );
- return 1;
- }
-
- // transform the registers
- pNtlNew = pAbc->pAbc8Ntl;
- pAbc->pAbc8Ntl = NULL;
- Ntl_ManTransformInitValues( pNtlNew );
-
- // replace the design
- Abc_FrameClearDesign();
- pAbc->pAbc8Ntl = pNtlNew;
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *zero [-h]\n" );
- Abc_Print( -2, "\t converts registers to have constant-0 initial value\n" );
- Abc_Print( -2, "\t-v : toggles verbose output [default = %s]\n", fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8Cec( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Aig_Man_t * pAig1, * pAig2;
- Ntl_Man_t * pTemp1, * pTemp2;
- char ** pArgvNew;
- int nArgcNew;
- int c;
- int fVerbose;
- int nConfLimit;
- int fSmart;
- int nPartSize;
- extern int Fra_FraigCecTop( Aig_Man_t * pMan1, Aig_Man_t * pMan2, int nConfLimit, int nPartSize, int fSmart, int fVerbose );
-
- // set defaults
- nConfLimit = 100000;
- nPartSize = 100;
- fSmart = 0;
- fVerbose = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "CPsvh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'C':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" );
- goto usage;
- }
- nConfLimit = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( nConfLimit < 0 )
- goto usage;
- break;
- case 'P':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" );
- goto usage;
- }
- nPartSize = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( nPartSize < 0 )
- goto usage;
- break;
- case 's':
- fSmart ^= 1;
- break;
- case 'v':
- fVerbose ^= 1;
- break;
- default:
- goto usage;
- }
- }
-
- pArgvNew = argv + globalUtilOptind;
- nArgcNew = argc - globalUtilOptind;
- if ( nArgcNew != 0 && nArgcNew != 2 )
- {
- Abc_Print( -1, "Currently can only compare current mapped network against the spec, or designs derived from two files.\n" );
- return 0;
- }
- if ( nArgcNew == 2 )
- {
- Ntl_ManPrepareCec( pArgvNew[0], pArgvNew[1], &pAig1, &pAig2 );
- if ( !pAig1 || !pAig2 )
- return 1;
- Fra_FraigCecTop( pAig1, pAig2, nConfLimit, nPartSize, fSmart, fVerbose );
- Aig_ManStop( pAig1 );
- Aig_ManStop( pAig2 );
- return 0;
- }
-
- if ( pAbc->pAbc8Ntl == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Cec(): There is no design to verify.\n" );
- return 1;
- }
- if ( pAbc->pAbc8Nwk == NULL )
- {
- Abc_Print( -1, "Abc_CommandAbc8Cec(): There is no mapped network to verify.\n" );
- return 1;
- }
-// Abc_Print( -1, "Currently *cec works only for two designs given on command line.\n" );
-
- // insert the mapped network
- pTemp1 = Ntl_ManDup( pAbc->pAbc8Ntl );
- pTemp2 = Ntl_ManInsertNtk( pAbc->pAbc8Ntl, pAbc->pAbc8Nwk );
- if ( pTemp2 == NULL )
- {
- Ntl_ManFree( pTemp1 );
- Abc_Print( -1, "Abc_CommandAbc8Cec(): Inserting the design has failed.\n" );
- return 1;
- }
- Ntl_ManPrepareCecMans( pTemp1, pTemp2, &pAig1, &pAig2 );
- Ntl_ManFree( pTemp1 );
- Ntl_ManFree( pTemp2 );
- if ( !pAig1 || !pAig2 )
- return 1;
- Fra_FraigCecTop( pAig1, pAig2, nConfLimit, nPartSize, fSmart, fVerbose );
- Aig_ManStop( pAig1 );
- Aig_ManStop( pAig2 );
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *cec [-C num] [-P num] [-svh] <file1> <file2>\n" );
- Abc_Print( -2, "\t performs combinational equivalence checking\n" );
- Abc_Print( -2, "\t-C num : limit on the number of conflicts [default = %d]\n", nConfLimit );
- Abc_Print( -2, "\t-P num : the partition size for partitioned CEC [default = %d]\n", nPartSize );
- Abc_Print( -2, "\t-s : toggle smart and natural output partitioning [default = %s]\n", fSmart? "smart": "natural" );
- Abc_Print( -2, "\t-v : toggles verbose output [default = %s]\n", fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- Abc_Print( -2, "\tfile1 : (optional) the file with the first network\n");
- Abc_Print( -2, "\tfile2 : (optional) the file with the second network\n");
- Abc_Print( -2, "\t if no files are given, uses the current network and its spec\n");
- Abc_Print( -2, "\t if two files are given, compares designs derived from files\n");
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_CommandAbc8DSec( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
- Fra_Sec_t SecPar, * pSecPar = &SecPar;
- Aig_Man_t * pAig;
- char ** pArgvNew;
- int nArgcNew;
- int c;
-
- extern void Fra_SecSetDefaultParams( Fra_Sec_t * pSecPar );
- extern int Fra_FraigSec( Aig_Man_t * p, Fra_Sec_t * pSecPar, Aig_Man_t ** ppResult );
-
- // set defaults
- Fra_SecSetDefaultParams( pSecPar );
- pSecPar->nFramesMax = 4;
- pSecPar->fPhaseAbstract = 0;
- pSecPar->fRetimeFirst = 0;
- pSecPar->fRetimeRegs = 0;
- Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "Farmfwvh" ) ) != EOF )
- {
- switch ( c )
- {
- case 'F':
- if ( globalUtilOptind >= argc )
- {
- Abc_Print( -1, "Command line switch \"-F\" should be followed by an integer.\n" );
- goto usage;
- }
- pSecPar->nFramesMax = atoi(argv[globalUtilOptind]);
- globalUtilOptind++;
- if ( pSecPar->nFramesMax < 0 )
- goto usage;
- break;
- case 'a':
- pSecPar->fPhaseAbstract ^= 1;
- break;
- case 'r':
- pSecPar->fRetimeFirst ^= 1;
- break;
- case 'm':
- pSecPar->fRetimeRegs ^= 1;
- break;
- case 'f':
- pSecPar->fFraiging ^= 1;
- break;
- case 'w':
- pSecPar->fVeryVerbose ^= 1;
- break;
- case 'v':
- pSecPar->fVerbose ^= 1;
- break;
- default:
- goto usage;
- }
- }
-
- pArgvNew = argv + globalUtilOptind;
- nArgcNew = argc - globalUtilOptind;
- if ( nArgcNew != 2 )
- {
- Abc_Print( -1, "Only works for two designs written from files specified on the command line.\n" );
- return 1;
- }
-
- pAig = Ntl_ManPrepareSec( pArgvNew[0], pArgvNew[1] );
- if ( pAig == NULL )
- return 0;
- Fra_FraigSec( pAig, pSecPar, NULL );
- Aig_ManStop( pAig );
- return 0;
-
-usage:
- Abc_Print( -2, "usage: *dsec [-F num] [-armfwvh] <file1> <file2>\n" );
- Abc_Print( -2, "\t performs sequential equivalence checking for two designs\n" );
- Abc_Print( -2, "\t-F num : the limit on the depth of induction [default = %d]\n", pSecPar->nFramesMax );
- Abc_Print( -2, "\t-a : toggles the use of phase abstraction [default = %s]\n", pSecPar->fPhaseAbstract? "yes": "no" );
- Abc_Print( -2, "\t-r : toggles forward retiming at the beginning [default = %s]\n", pSecPar->fRetimeFirst? "yes": "no" );
- Abc_Print( -2, "\t-m : toggles min-register retiming [default = %s]\n", pSecPar->fRetimeRegs? "yes": "no" );
- Abc_Print( -2, "\t-f : toggles the internal use of fraiging [default = %s]\n", pSecPar->fFraiging? "yes": "no" );
- Abc_Print( -2, "\t-v : toggles verbose output [default = %s]\n", pSecPar->fVerbose? "yes": "no" );
- Abc_Print( -2, "\t-w : toggles additional verbose output [default = %s]\n", pSecPar->fVeryVerbose? "yes": "no" );
- Abc_Print( -2, "\t-h : print the command usage\n");
- Abc_Print( -2, "\tfile1 : the file with the first design\n");
- Abc_Print( -2, "\tfile2 : the file with the second design\n");
-// Abc_Print( -2, "\t if no files are given, uses the current network and its spec\n");
-// Abc_Print( -2, "\t if one file is given, uses the current network and the file\n");
- return 1;
-}
-
-
/**Function*************************************************************
Synopsis []
@@ -24791,7 +21607,7 @@ int Abc_CommandAbc9Put( Abc_Frame_t * pAbc, int argc, char ** argv )
Abc_NtkForEachCi( pNtk, pObj, i ) {
if (i < Vec_PtrSize(pAbc->pGia->vNamesIn)) {
Nm_ManDeleteIdName(pNtk->pManName, pObj->Id);
- Abc_ObjAssignName( pObj, Vec_PtrEntry(pAbc->pGia->vNamesIn, i), NULL );
+ Abc_ObjAssignName( pObj, (char *)Vec_PtrEntry(pAbc->pGia->vNamesIn, i), NULL );
}
}
}
@@ -28188,14 +25004,14 @@ int Abc_CommandAbc9If( Abc_Frame_t * pAbc, int argc, char ** argv )
int c;
extern void Gia_ManSetIfParsDefault( If_Par_t * pPars );
extern int Gia_MappingIf( Gia_Man_t * p, If_Par_t * pPars );
- if ( pAbc->pAbc8Lib == NULL )
- {
- Abc_Print( -1, "LUT library is not given. Using default LUT library.\n" );
- pAbc->pAbc8Lib = If_SetSimpleLutLib( 6 );
- }
// set defaults
Gia_ManSetIfParsDefault( pPars );
- pPars->pLutLib = pAbc->pAbc8Lib;
+// if ( pAbc->pAbc8Lib == NULL )
+// {
+// Abc_Print( -1, "LUT library is not given. Using default LUT library.\n" );
+// pAbc->pAbc8Lib = If_SetSimpleLutLib( 6 );
+// }
+// pPars->pLutLib = pAbc->pAbc8Lib;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "KCFADEqaflepmrsdbvh" ) ) != EOF )
{
diff --git a/src/base/abci/abcAbc8.c b/src/base/abci/abcAbc8.c
deleted file mode 100644
index 3bfaaa98..00000000
--- a/src/base/abci/abcAbc8.c
+++ /dev/null
@@ -1,280 +0,0 @@
-/**CFile****************************************************************
-
- FileName [abcAbc8.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Network and node package.]
-
- Synopsis []
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: abcAbc8.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "abc.h"
-#include "nwk.h"
-#include "mfx.h"
-
-#include "main.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Converts old ABC network into new ABC network.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Nwk_Man_t * Abc_NtkToNtkNew( Abc_Ntk_t * pNtk )
-{
- Vec_Ptr_t * vNodes;
- Nwk_Man_t * pNtkNew;
- Nwk_Obj_t * pObjNew;
- Abc_Obj_t * pObj, * pFanin;
- int i, k;
- if ( !Abc_NtkIsLogic(pNtk) )
- {
- fprintf( stdout, "This is not a logic network.\n" );
- return 0;
- }
- // convert into the AIG
- if ( !Abc_NtkToAig(pNtk) )
- {
- fprintf( stdout, "Converting to AIGs has failed.\n" );
- return 0;
- }
- assert( Abc_NtkHasAig(pNtk) );
- // construct the network
- pNtkNew = Nwk_ManAlloc();
- pNtkNew->pName = Extra_UtilStrsav( pNtk->pName );
- pNtkNew->pSpec = Extra_UtilStrsav( pNtk->pSpec );
- Abc_NtkForEachCi( pNtk, pObj, i )
- pObj->pCopy = (Abc_Obj_t *)Nwk_ManCreateCi( pNtkNew, Abc_ObjFanoutNum(pObj) );
- vNodes = Abc_NtkDfs( pNtk, 1 );
- Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i )
- {
- pObjNew = Nwk_ManCreateNode( pNtkNew, Abc_ObjFaninNum(pObj), Abc_ObjFanoutNum(pObj) );
- Abc_ObjForEachFanin( pObj, pFanin, k )
- Nwk_ObjAddFanin( pObjNew, (Nwk_Obj_t *)pFanin->pCopy );
- pObjNew->pFunc = Hop_Transfer( (Hop_Man_t *)pNtk->pManFunc, pNtkNew->pManHop, (Hop_Obj_t *)pObj->pData, Abc_ObjFaninNum(pObj) );
- pObj->pCopy = (Abc_Obj_t *)pObjNew;
- }
- Vec_PtrFree( vNodes );
- Abc_NtkForEachCo( pNtk, pObj, i )
- {
- pObjNew = Nwk_ManCreateCo( pNtkNew );
- Nwk_ObjAddFanin( pObjNew, (Nwk_Obj_t *)Abc_ObjFanin0(pObj)->pCopy );
- }
-// if ( !Nwk_ManCheck( pNtkNew ) )
-// fprintf( stdout, "Abc_NtkToNtkNew(): Network check has failed.\n" );
- return pNtkNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Converts new ABC network into old ABC network.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_NtkFromNtkNew( Abc_Ntk_t * pNtkOld, Nwk_Man_t * pNtk )
-{
- Vec_Ptr_t * vNodes;
- Abc_Ntk_t * pNtkNew;
- Abc_Obj_t * pObjNew, * pFaninNew;
- Nwk_Obj_t * pObj, * pFanin;
- int i, k;
- // construct the network
- pNtkNew = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_AIG, 1 );
- pNtkNew->pName = Extra_UtilStrsav( pNtk->pName );
- pNtkNew->pSpec = Extra_UtilStrsav( pNtk->pSpec );
- Nwk_ManForEachCi( pNtk, pObj, i )
- {
- pObjNew = Abc_NtkCreatePi( pNtkNew );
- pObj->pCopy = (Nwk_Obj_t *)pObjNew;
- Abc_ObjAssignName( pObjNew, Abc_ObjName( Abc_NtkCi(pNtkOld, i) ), NULL );
- }
- vNodes = Nwk_ManDfs( pNtk );
- Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pObj, i )
- {
- if ( !Nwk_ObjIsNode(pObj) )
- continue;
- pObjNew = Abc_NtkCreateNode( pNtkNew );
- Nwk_ObjForEachFanin( pObj, pFanin, k )
- Abc_ObjAddFanin( pObjNew, (Abc_Obj_t *)pFanin->pCopy );
- pObjNew->pData = Hop_Transfer( pNtk->pManHop, (Hop_Man_t *)pNtkNew->pManFunc, pObj->pFunc, Nwk_ObjFaninNum(pObj) );
- pObj->pCopy = (Nwk_Obj_t *)pObjNew;
- }
- Vec_PtrFree( vNodes );
- Nwk_ManForEachCo( pNtk, pObj, i )
- {
- pObjNew = Abc_NtkCreatePo( pNtkNew );
- if ( pObj->fInvert )
- pFaninNew = Abc_NtkCreateNodeInv( pNtkNew, (Abc_Obj_t *)Nwk_ObjFanin0(pObj)->pCopy );
- else
- pFaninNew = (Abc_Obj_t *)Nwk_ObjFanin0(pObj)->pCopy;
- Abc_ObjAddFanin( pObjNew, pFaninNew );
- Abc_ObjAssignName( pObjNew, Abc_ObjName( Abc_NtkCo(pNtkOld, i) ), NULL );
- }
- if ( !Abc_NtkCheck( pNtkNew ) )
- fprintf( stdout, "Abc_NtkFromNtkNew(): Network check has failed.\n" );
- return pNtkNew;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_NtkNtkTest2( Abc_Ntk_t * pNtk )
-{
- extern void Abc_NtkSupportSum( Abc_Ntk_t * pNtk );
- Abc_Ntk_t * pNtkNew;
- Nwk_Man_t * pMan;
- int clk;
-
-clk = clock();
- Abc_NtkSupportSum( pNtk );
-ABC_PRT( "Time", clock() - clk );
-
- pMan = Abc_NtkToNtkNew( pNtk );
-clk = clock();
- Nwk_ManSupportSum( pMan );
-ABC_PRT( "Time", clock() - clk );
-
- pNtkNew = Abc_NtkFromNtkNew( pNtk, pMan );
- Nwk_ManFree( pMan );
- return pNtkNew;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_NtkNtkTest3( Abc_Ntk_t * pNtk )
-{
- extern void Abc_NtkSupportSum( Abc_Ntk_t * pNtk );
- extern void * Abc_FrameReadLibLut();
-
- Abc_Ntk_t * pNtkNew;
- Nwk_Man_t * pMan;
- int clk;
-
-clk = clock();
- printf( "%6.2f\n", Abc_NtkDelayTraceLut( pNtk, 1 ) );
-ABC_PRT( "Time", clock() - clk );
-
- pMan = Abc_NtkToNtkNew( pNtk );
- pMan->pLutLib = (If_Lib_t *)Abc_FrameReadLibLut();
-clk = clock();
- printf( "%6.2f\n", Nwk_ManDelayTraceLut( pMan ) );
-ABC_PRT( "Time", clock() - clk );
-
- pNtkNew = Abc_NtkFromNtkNew( pNtk, pMan );
- Nwk_ManFree( pMan );
- return pNtkNew;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_NtkNtkTest4( Abc_Ntk_t * pNtk, If_Lib_t * pLutLib )
-{
-
- Mfx_Par_t Pars, * pPars = &Pars;
- Abc_Ntk_t * pNtkNew;
- Nwk_Man_t * pMan;
- pMan = Abc_NtkToNtkNew( pNtk );
-
- Mfx_ParsDefault( pPars );
- Mfx_Perform( pMan, pPars, pLutLib );
-
- pNtkNew = Abc_NtkFromNtkNew( pNtk, pMan );
- Nwk_ManFree( pMan );
- return pNtkNew;
-}
-
-/**Function*************************************************************
-
- Synopsis []
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_NtkNtkTest( Abc_Ntk_t * pNtk, If_Lib_t * pLutLib )
-{
- Vec_Ptr_t * vNodes;
- extern Vec_Ptr_t * Nwk_ManRetimeCutForward( Nwk_Man_t * pMan, int nLatches, int fVerbose );
- extern Vec_Ptr_t * Nwk_ManRetimeCutBackward( Nwk_Man_t * pMan, int nLatches, int fVerbose );
-
- Abc_Ntk_t * pNtkNew;
- Nwk_Man_t * pMan;
- pMan = Abc_NtkToNtkNew( pNtk );
-
- vNodes = Nwk_ManRetimeCutBackward( pMan, Abc_NtkLatchNum(pNtk), 1 );
-// vNodes = Nwk_ManRetimeCutForward( pMan, Abc_NtkLatchNum(pNtk), 1 );
- Vec_PtrFree( vNodes );
-
- pNtkNew = Abc_NtkFromNtkNew( pNtk, pMan );
- Nwk_ManFree( pMan );
- return pNtkNew;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/abci/abcAttach.c b/src/base/abci/abcAttach.c
index d1712f4d..6408b54f 100644
--- a/src/base/abci/abcAttach.c
+++ b/src/base/abci/abcAttach.c
@@ -18,9 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "mio.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcAuto.c b/src/base/abci/abcAuto.c
index 02d5fd17..e1e479e3 100644
--- a/src/base/abci/abcAuto.c
+++ b/src/base/abci/abcAuto.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcBalance.c b/src/base/abci/abcBalance.c
index a4fa0451..c46fd4b7 100644
--- a/src/base/abci/abcBalance.c
+++ b/src/base/abci/abcBalance.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcBidec.c b/src/base/abci/abcBidec.c
index bae29e07..fc093420 100644
--- a/src/base/abci/abcBidec.c
+++ b/src/base/abci/abcBidec.c
@@ -18,9 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "bdc.h"
-#include "kit.h"
+#include "src/base/abc/abc.h"
+#include "src/bool/bdc/bdc.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcBm.c b/src/base/abci/abcBm.c
index 25fba5fd..3a8567fe 100644
--- a/src/base/abci/abcBm.c
+++ b/src/base/abci/abcBm.c
@@ -27,10 +27,10 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
-#include "sim.h"
-#include "satSolver.h"
+#include "src/base/abc/abc.h"
+#include "src/opt/sim/sim.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcBmc.c b/src/base/abci/abcBmc.c
index 21f2d484..6ea4435c 100644
--- a/src/base/abci/abcBmc.c
+++ b/src/base/abci/abcBmc.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "ivy.h"
+#include "src/base/abc/abc.h"
+#include "src/aig/ivy/ivy.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcCas.c b/src/base/abci/abcCas.c
index 68c91343..7e80c919 100644
--- a/src/base/abci/abcCas.c
+++ b/src/base/abci/abcCas.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcCascade.c b/src/base/abci/abcCascade.c
index 533321c5..a477077d 100644
--- a/src/base/abci/abcCascade.c
+++ b/src/base/abci/abcCascade.c
@@ -18,8 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "reo.h"
+#include "src/base/abc/abc.h"
+#include "src/bdd/reo/reo.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
@@ -263,7 +264,7 @@ int Abc_ResCofCount( DdManager * dd, DdNode * bFunc, unsigned uMask, int * pChec
Vec_PtrFree( vCofs );
if ( pCheck )
{
- *pCheck = Abc_ResCheckNonStrict( Pattern, nVars, Extra_Base2Log(Result) );
+ *pCheck = Abc_ResCheckNonStrict( Pattern, nVars, Abc_Base2Log(Result) );
/*
if ( *pCheck == 1 && nVars == 4 && Result == 8 )
{
@@ -290,7 +291,7 @@ int Abc_ResCofCount( DdManager * dd, DdNode * bFunc, unsigned uMask, int * pChec
int Abc_ResCost( DdManager * dd, DdNode * bFunc, unsigned uMask, int * pnCofs, int * pCheck )
{
int nCofs = Abc_ResCofCount( dd, bFunc, uMask, pCheck );
- int n2Log = Extra_Base2Log( nCofs );
+ int n2Log = Abc_Base2Log( nCofs );
if ( pnCofs ) *pnCofs = nCofs;
return 10000 * n2Log + (nCofs - (1 << (n2Log-1))) * (nCofs - (1 << (n2Log-1)));
}
@@ -360,7 +361,7 @@ void Abc_ResPrint( DdManager * dd, DdNode * bFunc, int nInputs, unsigned uParts[
CostAll += Cost;
for ( k = 0; k < nInputs; k++ )
printf( "%c", (uParts[i] & (1 << k))? 'a' + k : '-' );
- printf( " %2d %d-%d %6d ", nCofs, Extra_Base2Log(nCofs), fCheck, Cost );
+ printf( " %2d %d-%d %6d ", nCofs, Abc_Base2Log(nCofs), fCheck, Cost );
}
printf( "%4d\n", CostAll );
}
@@ -390,7 +391,7 @@ void Abc_ResPrintAllCofs( DdManager * dd, DdNode * bFunc, int nInputs, int nCofM
for ( k = 0; k < nInputs; k++ )
printf( "%c", (i & (1 << k))? 'a' + k : '-' );
printf( " n=%2d c=%2d l=%d-%d %6d\n",
- Extra_WordCountOnes(i), nCofs, Extra_Base2Log(nCofs), fCheck, Cost );
+ Extra_WordCountOnes(i), nCofs, Abc_Base2Log(nCofs), fCheck, Cost );
}
}
diff --git a/src/base/abci/abcCollapse.c b/src/base/abci/abcCollapse.c
index 07996b9a..69525e2f 100644
--- a/src/base/abci/abcCollapse.c
+++ b/src/base/abci/abcCollapse.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcCut.c b/src/base/abci/abcCut.c
index a08ce490..6116649e 100644
--- a/src/base/abci/abcCut.c
+++ b/src/base/abci/abcCut.c
@@ -18,9 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "cut.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/opt/cut/cut.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcDar.c b/src/base/abci/abcDar.c
index 4a74ad7e..b032b4e4 100644
--- a/src/base/abci/abcDar.c
+++ b/src/base/abci/abcDar.c
@@ -18,22 +18,22 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "giaAig.h"
-#include "dar.h"
-#include "cnf.h"
-#include "fra.h"
-#include "fraig.h"
-#include "int.h"
-#include "dch.h"
-#include "ssw.h"
-#include "cgt.h"
-#include "bbr.h"
-#include "gia.h"
-#include "cec.h"
-#include "csw.h"
-#include "pdr.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/aig/gia/giaAig.h"
+#include "src/opt/dar/dar.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/proof/fra/fra.h"
+#include "src/proof/fraig/fraig.h"
+#include "src/proof/int/int.h"
+#include "src/proof/dch/dch.h"
+#include "src/proof/ssw/ssw.h"
+#include "src/opt/cgt/cgt.h"
+#include "src/proof/bbr/bbr.h"
+#include "src/aig/gia/gia.h"
+#include "src/proof/cec/cec.h"
+#include "src/opt/csw/csw.h"
+#include "src/proof/pdr/pdr.h"
ABC_NAMESPACE_IMPL_START
@@ -358,7 +358,7 @@ Abc_Ntk_t * Abc_NtkFromDarSeqSweep( Abc_Ntk_t * pNtkOld, Aig_Man_t * pMan )
}
*/
assert( Abc_NtkBoxNum(pNtkOld) == Abc_NtkLatchNum(pNtkOld) );
- nDigits = Extra_Base10Log( Abc_NtkLatchNum(pNtkNew) );
+ nDigits = Abc_Base10Log( Abc_NtkLatchNum(pNtkNew) );
Abc_NtkForEachLatch( pNtkNew, pObjNew, i )
{
pLatch = Abc_NtkBox( pNtkOld, Vec_IntEntry( pMan->vFlopNums, i ) );
@@ -1669,7 +1669,7 @@ Abc_Ntk_t * Abc_NtkDarLcorrNew( Abc_Ntk_t * pNtk, int nVarsMax, int nConfMax, in
/*
#include <signal.h>
-#include "utilMem.h"
+#include "src/misc/util/utilMem.h"
static void sigfunc( int signo )
{
if (signo == SIGINT) {
@@ -2160,10 +2160,10 @@ int Abc_NtkDarDemiterDual( Abc_Ntk_t * pNtk, int fVerbose )
}
// create new AIG
ABC_FREE( pPart0->pName );
- pPart0->pName = Aig_UtilStrsav( "part0" );
+ pPart0->pName = Abc_UtilStrsav( "part0" );
// create new AIGs
ABC_FREE( pPart1->pName );
- pPart1->pName = Aig_UtilStrsav( "part1" );
+ pPart1->pName = Abc_UtilStrsav( "part1" );
// create file names
pFileNameGeneric = Extra_FileNameGeneric( pNtk->pSpec );
sprintf( pFileName0, "%s%s", pFileNameGeneric, "_part0.aig" );
@@ -3831,8 +3831,8 @@ int Abc_NtkDarReach( Abc_Ntk_t * pNtk, Saig_ParBbr_t * pPars )
ABC_NAMESPACE_IMPL_END
-#include "amap.h"
-#include "mio.h"
+#include "src/map/amap/amap.h"
+#include "src/map/mio/mio.h"
ABC_NAMESPACE_IMPL_START
@@ -4095,7 +4095,7 @@ void Abc_NtkDarConstrProfile( Abc_Ntk_t * pNtk, int fVerbose )
printf( "Primary output : ", i );
else
printf( "Constraint %3d : ", i-(Saig_ManPoNum(pMan) - Saig_ManConstrNum(pMan)) );
- printf( "ProbOne = %f ", Aig_Int2Float(Entry) );
+ printf( "ProbOne = %f ", Abc_Int2Float(Entry) );
printf( "AllZeroValue = %d ", Aig_ObjPhase(pObj) );
printf( "\n" );
}
diff --git a/src/base/abci/abcDebug.c b/src/base/abci/abcDebug.c
index 43ceb63a..baf87944 100644
--- a/src/base/abci/abcDebug.c
+++ b/src/base/abci/abcDebug.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "ioAbc.h"
+#include "src/base/abc/abc.h"
+#include "src/base/io/ioAbc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcDress.c b/src/base/abci/abcDress.c
index c9c956e4..745dcac0 100644
--- a/src/base/abci/abcDress.c
+++ b/src/base/abci/abcDress.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "ioAbc.h"
+#include "src/base/abc/abc.h"
+#include "src/base/io/ioAbc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcDress2.c b/src/base/abci/abcDress2.c
index 039a4fed..fbaf833a 100644
--- a/src/base/abci/abcDress2.c
+++ b/src/base/abci/abcDress2.c
@@ -18,9 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "aig.h"
-#include "dch.h"
+#include "src/base/abc/abc.h"
+#include "src/aig/aig/aig.h"
+#include "src/proof/dch/dch.h"
ABC_NAMESPACE_IMPL_START
@@ -392,8 +392,8 @@ void Abc_NtkDressPrintStats( Vec_Ptr_t * vRes, int nNodes0, int nNodes1, int Tim
NegAll[1] += Neg[1]; // total negative polarity in network 1
// assuming that the name can be transferred to only one node
- PairsAll += ABC_MIN(Neg[0] + Pos[0], Neg[1] + Pos[1]);
- PairsOne += ABC_MIN(Neg[0], Neg[1]) + ABC_MIN(Pos[0], Pos[1]);
+ PairsAll += Abc_MinInt(Neg[0] + Pos[0], Neg[1] + Pos[1]);
+ PairsOne += Abc_MinInt(Neg[0], Neg[1]) + Abc_MinInt(Pos[0], Pos[1]);
}
printf( "Total number of equiv classes = %7d.\n", Vec_PtrSize(vRes) );
printf( "Participating nodes from both networks = %7d.\n", NegAll[0]+PosAll[0]+NegAll[1]+PosAll[1] );
diff --git a/src/base/abci/abcDsd.c b/src/base/abci/abcDsd.c
index 250cac14..c4086ce7 100644
--- a/src/base/abci/abcDsd.c
+++ b/src/base/abci/abcDsd.c
@@ -18,9 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
-#include "dsd.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
+#include "src/bdd/dsd/dsd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcEspresso.c b/src/base/abci/abcEspresso.c
index c8c1d8e1..2e78ad3f 100644
--- a/src/base/abci/abcEspresso.c
+++ b/src/base/abci/abcEspresso.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "espresso.h"
+#include "base/abc/abc.h"
+#include "misc/espresso/espresso.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcExtract.c b/src/base/abci/abcExtract.c
index 8eca34a6..e6b4193b 100644
--- a/src/base/abci/abcExtract.c
+++ b/src/base/abci/abcExtract.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcFlop.c b/src/base/abci/abcFlop.c
index a735f279..6ed411f7 100644
--- a/src/base/abci/abcFlop.c
+++ b/src/base/abci/abcFlop.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcFpga.c b/src/base/abci/abcFpga.c
index 0c45c7d2..4d6b2978 100644
--- a/src/base/abci/abcFpga.c
+++ b/src/base/abci/abcFpga.c
@@ -18,8 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "fpgaInt.h"
+#include "src/base/abc/abc.h"
+#include "src/map/fpga/fpgaInt.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcFpgaFast.c b/src/base/abci/abcFpgaFast.c
index 46572fa8..1c5693fd 100644
--- a/src/base/abci/abcFpgaFast.c
+++ b/src/base/abci/abcFpgaFast.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "ivy.h"
+#include "src/base/abc/abc.h"
+#include "src/aig/ivy/ivy.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcFraig.c b/src/base/abci/abcFraig.c
index 1beab4f4..e1c12b3f 100644
--- a/src/base/abci/abcFraig.c
+++ b/src/base/abci/abcFraig.c
@@ -18,9 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "fraig.h"
-#include "main.h"
+#include "src/base/abc/abc.h"
+#include "src/proof/fraig/fraig.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
@@ -722,7 +722,7 @@ Abc_Ntk_t * Abc_NtkFraigRestore()
// no more than 256M for one circuit (128M + 128M)
nWords1 = 32;
nWords2 = (1<<27) / (Abc_NtkNodeNum(pNtk) + Abc_NtkCiNum(pNtk));
- nWordsMin = ABC_MIN( nWords1, nWords2 );
+ nWordsMin = Abc_MinInt( nWords1, nWords2 );
// set parameters for fraiging
Fraig_ParamsSetDefault( &Params );
diff --git a/src/base/abci/abcFxu.c b/src/base/abci/abcFxu.c
index dbbcb1b1..2470a1d1 100644
--- a/src/base/abci/abcFxu.c
+++ b/src/base/abci/abcFxu.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "fxu.h"
+#include "src/base/abc/abc.h"
+#include "src/opt/fxu/fxu.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcGen.c b/src/base/abci/abcGen.c
index 3299a968..55191021 100644
--- a/src/base/abci/abcGen.c
+++ b/src/base/abci/abcGen.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
@@ -122,7 +121,7 @@ void Abc_GenSorter( char * pFileName, int nVars )
fprintf( pFile, "\n" );
Counter = 0;
- nDigits = Extra_Base10Log( (nVars-2)*nVars );
+ nDigits = Abc_Base10Log( (nVars-2)*nVars );
if ( nVars == 2 )
fprintf( pFile, ".subckt Comp a=x00 b=x01 x=y00 y=y01\n" );
else
@@ -427,7 +426,7 @@ void Abc_GenFpga( char * pFileName, int nLutSize, int nLuts, int nVars )
int fGenerateFunc = 1;
FILE * pFile;
int nVarsLut = (1 << nLutSize); // the number of LUT variables
- int nVarsLog = Extra_Base2Log( nVars + nLuts - 1 ); // the number of encoding vars
+ int nVarsLog = Abc_Base2Log( nVars + nLuts - 1 ); // the number of encoding vars
int nVarsDeg = (1 << nVarsLog); // the number of LUT variables (total)
int nParsLut = nLuts * (1 << nLutSize); // the number of LUT params
int nParsVar = nLuts * nLutSize * nVarsLog; // the number of var params
@@ -548,12 +547,12 @@ void Abc_GenOneHot( char * pFileName, int nVars )
fprintf( pFile, "# One-hotness condition for %d vars generated by ABC on %s\n", nVars, Extra_TimeStamp() );
fprintf( pFile, ".model 1hot_%dvars\n", nVars );
fprintf( pFile, ".inputs" );
- nDigitsIn = Extra_Base10Log( nVars );
+ nDigitsIn = Abc_Base10Log( nVars );
for ( i = 0; i < nVars; i++ )
fprintf( pFile, " i%0*d", nDigitsIn, i );
fprintf( pFile, "\n" );
fprintf( pFile, ".outputs" );
- nDigitsOut = Extra_Base10Log( nVars * (nVars - 1) / 2 );
+ nDigitsOut = Abc_Base10Log( nVars * (nVars - 1) / 2 );
for ( i = 0; i < nVars * (nVars - 1) / 2; i++ )
fprintf( pFile, " o%0*d", nDigitsOut, i );
fprintf( pFile, "\n" );
@@ -598,12 +597,12 @@ void Abc_GenOneHotIntervals( char * pFileName, int nPis, int nRegs, Vec_Ptr_t *
fprintf( pFile, "}\n" );
fprintf( pFile, ".model 1hot_%dvars_%dregs\n", nPis, nRegs );
fprintf( pFile, ".inputs" );
- nDigitsIn = Extra_Base10Log( nPis+nRegs );
+ nDigitsIn = Abc_Base10Log( nPis+nRegs );
for ( i = 0; i < nPis+nRegs; i++ )
fprintf( pFile, " i%0*d", nDigitsIn, i );
fprintf( pFile, "\n" );
fprintf( pFile, ".outputs" );
- nDigitsOut = Extra_Base10Log( Counter );
+ nDigitsOut = Abc_Base10Log( Counter );
for ( i = 0; i < Counter; i++ )
fprintf( pFile, " o%0*d", nDigitsOut, i );
fprintf( pFile, "\n" );
@@ -626,7 +625,7 @@ void Abc_GenOneHotIntervals( char * pFileName, int nPis, int nRegs, Vec_Ptr_t *
ABC_NAMESPACE_IMPL_END
-#include "aig.h"
+#include "src/aig/aig/aig.h"
ABC_NAMESPACE_IMPL_START
@@ -646,7 +645,7 @@ void Abc_GenRandom( char * pFileName, int nPis )
{
FILE * pFile;
unsigned * pTruth;
- int i, b, w, nWords = Aig_TruthWordNum( nPis );
+ int i, b, w, nWords = Abc_TruthWordNum( nPis );
int nDigitsIn;
Aig_ManRandom( 1 );
pTruth = ABC_ALLOC( unsigned, nWords );
@@ -656,18 +655,18 @@ void Abc_GenRandom( char * pFileName, int nPis )
fprintf( pFile, "# Random function with %d inputs generated by ABC on %s\n", nPis, Extra_TimeStamp() );
fprintf( pFile, ".model rand%d\n", nPis );
fprintf( pFile, ".inputs" );
- nDigitsIn = Extra_Base10Log( nPis );
+ nDigitsIn = Abc_Base10Log( nPis );
for ( i = 0; i < nPis; i++ )
fprintf( pFile, " i%0*d", nDigitsIn, i );
fprintf( pFile, "\n" );
fprintf( pFile, ".outputs f\n" );
fprintf( pFile, ".names" );
- nDigitsIn = Extra_Base10Log( nPis );
+ nDigitsIn = Abc_Base10Log( nPis );
for ( i = 0; i < nPis; i++ )
fprintf( pFile, " i%0*d", nDigitsIn, i );
fprintf( pFile, " f\n" );
for ( i = 0; i < (1<<nPis); i++ )
- if ( Aig_InfoHasBit(pTruth, i) )
+ if ( Abc_InfoHasBit(pTruth, i) )
{
for ( b = nPis-1; b >= 0; b-- )
fprintf( pFile, "%d", (i>>b)&1 );
diff --git a/src/base/abci/abcHaig.c b/src/base/abci/abcHaig.c
index b102e04f..073defd0 100644
--- a/src/base/abci/abcHaig.c
+++ b/src/base/abci/abcHaig.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcIf.c b/src/base/abci/abcIf.c
index 674a4550..ded34d3c 100644
--- a/src/base/abci/abcIf.c
+++ b/src/base/abci/abcIf.c
@@ -18,11 +18,11 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "if.h"
-#include "kit.h"
-#include "aig.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/map/if/if.h"
+#include "src/bool/kit/kit.h"
+#include "src/aig/aig/aig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcIfMux.c b/src/base/abci/abcIfMux.c
index bf9d6cff..545adafb 100644
--- a/src/base/abci/abcIfMux.c
+++ b/src/base/abci/abcIfMux.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "if.h"
+#include "src/base/abc/abc.h"
+#include "src/map/if/if.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcIvy.c b/src/base/abci/abcIvy.c
index 28ff0ee6..c2637a08 100644
--- a/src/base/abci/abcIvy.c
+++ b/src/base/abci/abcIvy.c
@@ -18,13 +18,14 @@
***********************************************************************/
-#include "abc.h"
-#include "dec.h"
-#include "fra.h"
-#include "ivy.h"
-#include "fraig.h"
-#include "mio.h"
-#include "aig.h"
+#include "src/base/abc/abc.h"
+#include "src/bool/dec/dec.h"
+#include "src/proof/fra/fra.h"
+#include "src/aig/ivy/ivy.h"
+#include "src/proof/fraig/fraig.h"
+#include "src/map/mio/mio.h"
+#include "src/aig/aig/aig.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcLog.c b/src/base/abci/abcLog.c
index ecccb36b..aa926a41 100644
--- a/src/base/abci/abcLog.c
+++ b/src/base/abci/abcLog.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "gia.h"
+#include "src/base/abc/abc.h"
+#include "src/aig/gia/gia.h"
ABC_NAMESPACE_IMPL_START
@@ -102,7 +102,7 @@ void Abc_NtkWriteLogFile( char * pFileName, Abc_Cex_t * pCex, int Status, int nF
else
{
for ( i = 0; i < pCex->nRegs; i++ )
- fprintf( pFile, "%d", Gia_InfoHasBit(pCex->pData,i) );
+ fprintf( pFile, "%d", Abc_InfoHasBit(pCex->pData,i) );
}
fprintf( pFile, "\n" );
// write <TRACE>
@@ -112,7 +112,7 @@ void Abc_NtkWriteLogFile( char * pFileName, Abc_Cex_t * pCex, int Status, int nF
{
assert( pCex->nBits - pCex->nRegs == pCex->nPis * (pCex->iFrame + 1) );
for ( i = pCex->nRegs; i < pCex->nBits; i++ )
- fprintf( pFile, "%d", Gia_InfoHasBit(pCex->pData,i) );
+ fprintf( pFile, "%d", Abc_InfoHasBit(pCex->pData,i) );
}
fprintf( pFile, "\n" );
fclose( pFile );
@@ -211,7 +211,7 @@ int Abc_NtkReadLogFile( char * pFileName, Abc_Cex_t ** ppCex, int * pnFrames )
assert( Vec_IntSize(vNums) == pCex->nBits );
for ( c = 0; c < pCex->nBits; c++ )
if ( Vec_IntEntry(vNums, c) )
- Gia_InfoSetBit( pCex->pData, c );
+ Abc_InfoSetBit( pCex->pData, c );
Vec_IntFree( vNums );
if ( ppCex )
*ppCex = pCex;
diff --git a/src/base/abci/abcLut.c b/src/base/abci/abcLut.c
index 98991e25..1653918f 100644
--- a/src/base/abci/abcLut.c
+++ b/src/base/abci/abcLut.c
@@ -18,9 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
-#include "cut.h"
+#include "src/base/abc/abc.h"
+#include "src/opt/cut/cut.h"
ABC_NAMESPACE_IMPL_START
@@ -175,7 +174,7 @@ int Abc_NtkSuperChoiceLut( Abc_Ntk_t * pNtk, int nLutSize, int nCutSizeMax, int
if ( Abc_ObjFaninNum(pFanin) == 1 )
pFanin = Abc_ObjFanin0( pFanin );
// get the new level
- LevelMax = ABC_MAX( LevelMax, (int)pFanin->Level );
+ LevelMax = Abc_MaxInt( LevelMax, (int)pFanin->Level );
}
if ( fVerbose )
@@ -516,7 +515,7 @@ int Abc_NodeGetLevel( Abc_Obj_t * pObj )
int i, Level;
Level = 0;
Abc_ObjForEachFanin( pObj, pFanin, i )
- Level = ABC_MAX( Level, (int)pFanin->Level );
+ Level = Abc_MaxInt( Level, (int)pFanin->Level );
return Level + 1;
}
@@ -723,7 +722,7 @@ int Abc_NodeDecomposeStep( Abc_ManScl_t * p )
return 0;
}
// the number of cofactors is acceptable
- nVarsNew = Extra_Base2Log( nClasses );
+ nVarsNew = Abc_Base2Log( nClasses );
assert( nVarsNew < p->nLutSize );
// create the remainder truth table
// for each class of cofactors, multiply cofactor truth table by its code
diff --git a/src/base/abci/abcLutmin.c b/src/base/abci/abcLutmin.c
index 6d62f330..d740777c 100644
--- a/src/base/abci/abcLutmin.c
+++ b/src/base/abci/abcLutmin.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
@@ -418,8 +418,8 @@ Abc_Obj_t * Abc_NtkBddCurtis( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, Vec_Ptr_t
DdManager * ddNew = (DdManager *)pNtkNew->pManFunc;
DdNode * bCof, * bUniq, * bMint, * bTemp, * bFunc, * bBits[10], ** pbCodeVars;
Abc_Obj_t * pNodeNew = NULL, * pNodeBS[10];
- int nLutSize = Extra_Base2Log( Vec_PtrSize(vCofs) );
- int nBits = Extra_Base2Log( Vec_PtrSize(vUniq) );
+ int nLutSize = Abc_Base2Log( Vec_PtrSize(vCofs) );
+ int nBits = Abc_Base2Log( Vec_PtrSize(vUniq) );
int b, c, u, i;
assert( nBits + 2 <= nLutSize );
assert( nLutSize < Abc_ObjFaninNum(pNode) );
diff --git a/src/base/abci/abcMap.c b/src/base/abci/abcMap.c
index 578727cc..eeeaf15f 100644
--- a/src/base/abci/abcMap.c
+++ b/src/base/abci/abcMap.c
@@ -18,10 +18,10 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "mio.h"
-#include "mapper.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
+#include "src/map/mapper/mapper.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcMeasure.c b/src/base/abci/abcMeasure.c
index 5352084f..a366b830 100644
--- a/src/base/abci/abcMeasure.c
+++ b/src/base/abci/abcMeasure.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "kit.h"
+#include "src/base/abc/abc.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcMerge.c b/src/base/abci/abcMerge.c
index d7abece8..917a97da 100644
--- a/src/base/abci/abcMerge.c
+++ b/src/base/abci/abcMerge.c
@@ -18,9 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "aig.h"
-#include "nwkMerge.h"
+#include "src/base/abc/abc.h"
+#include "src/aig/aig/aig.h"
+#include "src/opt/nwk/nwkMerge.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcMffc.c b/src/base/abci/abcMffc.c
index b4510bd0..b88452e8 100644
--- a/src/base/abci/abcMffc.c
+++ b/src/base/abci/abcMffc.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcMini.c b/src/base/abci/abcMini.c
index 429c40c6..0af87d36 100644
--- a/src/base/abci/abcMini.c
+++ b/src/base/abci/abcMini.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcMiter.c b/src/base/abci/abcMiter.c
index 9cda4608..66734c04 100644
--- a/src/base/abci/abcMiter.c
+++ b/src/base/abci/abcMiter.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcMulti.c b/src/base/abci/abcMulti.c
index 299e22d5..c8247b28 100644
--- a/src/base/abci/abcMulti.c
+++ b/src/base/abci/abcMulti.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcMv.c b/src/base/abci/abcMv.c
index 98d27a19..5f612b62 100644
--- a/src/base/abci/abcMv.c
+++ b/src/base/abci/abcMv.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcNpnSave.c b/src/base/abci/abcNpnSave.c
index 568a3e28..b57d2ef3 100644
--- a/src/base/abci/abcNpnSave.c
+++ b/src/base/abci/abcNpnSave.c
@@ -18,9 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "aig.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/aig/aig/aig.h"
ABC_NAMESPACE_IMPL_START
@@ -81,7 +80,7 @@ static Npn_Man_t * pNpnMan = NULL;
void Npn_TruthPermute_rec( char * pStr, int mid, int end )
{
static int count = 0;
- char * pTemp = Aig_UtilStrsav(pStr);
+ char * pTemp = Abc_UtilStrsav(pStr);
char e;
int i;
if ( mid == end )
@@ -329,7 +328,7 @@ static inline word Npn_TruthCanon( word t, int nVars, int * pPhase )
}
else
{
- if ( ABC_MIN(pSigs[2*v],pSigs[2*v+1]) >= ABC_MIN(pSigs[2*(v+1)],pSigs[2*(v+1)+1]) )
+ if ( Abc_MinInt(pSigs[2*v],pSigs[2*v+1]) >= Abc_MinInt(pSigs[2*(v+1)],pSigs[2*(v+1)+1]) )
continue;
}
fChange = 1;
@@ -400,7 +399,7 @@ clk = clock();
pBinsOld = p->pBins;
nBinsOld = p->nBins;
// get the new Bins
- p->nBins = Aig_PrimeCudd( 3 * nBinsOld );
+ p->nBins = Abc_PrimeCudd( 3 * nBinsOld );
p->pBins = ABC_CALLOC( int, p->nBins );
// rehash the entries from the old table
Counter = 1;
@@ -594,7 +593,7 @@ Npn_Man_t * Npn_ManStart( char * pFileName )
p->nBufferSize = 1000000;
p->nBufferSize = 100;
p->pBuffer = ABC_ALLOC( Npn_Obj_t, p->nBufferSize );
- p->nBins = Aig_PrimeCudd( p->nBufferSize / 2 );
+ p->nBins = Abc_PrimeCudd( p->nBufferSize / 2 );
p->pBins = ABC_CALLOC( int, p->nBins );
p->nEntries = 1;
}
@@ -609,7 +608,7 @@ Npn_Man_t * Npn_ManStart( char * pFileName )
fclose( pFile );
p->nBufferSize = 4 * ( Extra_FileSize(pFileName) / 20 );
p->pBuffer = ABC_ALLOC( Npn_Obj_t, p->nBufferSize );
- p->nBins = Aig_PrimeCudd( p->nBufferSize / 2 );
+ p->nBins = Abc_PrimeCudd( p->nBufferSize / 2 );
p->pBins = ABC_CALLOC( int, p->nBins );
p->nEntries = 1;
Npn_ManRead( p, pFileName );
diff --git a/src/base/abci/abcNtbdd.c b/src/base/abci/abcNtbdd.c
index e3df605e..a1fab695 100644
--- a/src/base/abci/abcNtbdd.c
+++ b/src/base/abci/abcNtbdd.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcOdc.c b/src/base/abci/abcOdc.c
index 50694832..e0f6d6de 100644
--- a/src/base/abci/abcOdc.c
+++ b/src/base/abci/abcOdc.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcOrder.c b/src/base/abci/abcOrder.c
index c306d01d..a3f66a63 100644
--- a/src/base/abci/abcOrder.c
+++ b/src/base/abci/abcOrder.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcPart.c b/src/base/abci/abcPart.c
index 5df5af62..7ae435d8 100644
--- a/src/base/abci/abcPart.c
+++ b/src/base/abci/abcPart.c
@@ -18,9 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "cmd.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/base/cmd/cmd.h"
ABC_NAMESPACE_IMPL_START
@@ -594,7 +594,7 @@ int Abc_NtkPartitionSmartFindPart( Vec_Ptr_t * vPartSuppsAll, Vec_Ptr_t * vParts
if ( Vec_IntSize(vPartSupp) < 100 )
Repulse = 1;
else
- Repulse = 1+Extra_Base2Log(Vec_IntSize(vPartSupp)-100);
+ Repulse = 1+Abc_Base2Log(Vec_IntSize(vPartSupp)-100);
Value = Attract/Repulse;
if ( ValueBest < Value )
{
diff --git a/src/base/abci/abcPlace.c b/src/base/abci/abcPlace.c
index 06c23e65..7faa5d77 100644
--- a/src/base/abci/abcPlace.c
+++ b/src/base/abci/abcPlace.c
@@ -18,10 +18,10 @@
***********************************************************************/
-#include "abc.h"
+#include "base/abc/abc.h"
// placement includes
-#include "place_base.h"
+#include "phys/place/place_base.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcPrint.c b/src/base/abci/abcPrint.c
index 9e2f48d3..af34029e 100644
--- a/src/base/abci/abcPrint.c
+++ b/src/base/abci/abcPrint.c
@@ -19,12 +19,13 @@
***********************************************************************/
#include <math.h>
-#include "abc.h"
-#include "dec.h"
-#include "main.h"
-#include "mio.h"
-#include "aig.h"
-#include "if.h"
+#include "src/base/abc/abc.h"
+#include "src/bool/dec/dec.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
+#include "src/aig/aig/aig.h"
+#include "src/map/if/if.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
@@ -523,7 +524,7 @@ void Abc_NtkPrintFanio( FILE * pFile, Abc_Ntk_t * pNtk )
if ( nFanins > vFanins->nSize || nFanouts > vFanouts->nSize )
{
nOldSize = vFanins->nSize;
- nNewSize = ABC_MAX(nFanins, nFanouts) + 10;
+ nNewSize = Abc_MaxInt(nFanins, nFanouts) + 10;
Vec_IntGrow( vFanins, nNewSize );
Vec_IntGrow( vFanouts, nNewSize );
for ( k = nOldSize; k < nNewSize; k++ )
@@ -592,12 +593,12 @@ void Abc_NtkPrintFanioNew( FILE * pFile, Abc_Ntk_t * pNtk, int fMffc )
nFanouts = Abc_ObjFanoutNum(pNode);
nFaninsAll += nFanins;
nFanoutsAll += nFanouts;
- nFaninsMax = ABC_MAX( nFaninsMax, nFanins );
- nFanoutsMax = ABC_MAX( nFanoutsMax, nFanouts );
+ nFaninsMax = Abc_MaxInt( nFaninsMax, nFanins );
+ nFanoutsMax = Abc_MaxInt( nFanoutsMax, nFanouts );
}
// allocate storage for fanin/fanout numbers
- nSizeMax = ABC_MAX( 10 * (Extra_Base10Log(nFaninsMax) + 1), 10 * (Extra_Base10Log(nFanoutsMax) + 1) );
+ nSizeMax = Abc_MaxInt( 10 * (Abc_Base10Log(nFaninsMax) + 1), 10 * (Abc_Base10Log(nFanoutsMax) + 1) );
vFanins = Vec_IntStart( nSizeMax );
vFanouts = Vec_IntStart( nSizeMax );
diff --git a/src/base/abci/abcProve.c b/src/base/abci/abcProve.c
index 154c5e1c..3a6c42a4 100644
--- a/src/base/abci/abcProve.c
+++ b/src/base/abci/abcProve.c
@@ -18,10 +18,11 @@
***********************************************************************/
-#include "abc.h"
-#include "fraig.h"
-#include "math.h"
-#include "extra.h"
+#include <math.h>
+
+#include "src/base/abc/abc.h"
+#include "src/proof/fraig/fraig.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
@@ -254,7 +255,7 @@ Abc_Ntk_t * Abc_NtkMiterFraig( Abc_Ntk_t * pNtk, int nBTLimit, ABC_INT64_T nInsp
// no more than 256M for one circuit (128M + 128M)
nWords1 = 32;
nWords2 = (1<<27) / (Abc_NtkNodeNum(pNtk) + Abc_NtkCiNum(pNtk));
- nWordsMin = ABC_MIN( nWords1, nWords2 );
+ nWordsMin = Abc_MinInt( nWords1, nWords2 );
// set the FRAIGing parameters
Fraig_ParamsSetDefault( pParams );
diff --git a/src/base/abci/abcQbf.c b/src/base/abci/abcQbf.c
index e6395ef3..98cb3eb6 100644
--- a/src/base/abci/abcQbf.c
+++ b/src/base/abci/abcQbf.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcQuant.c b/src/base/abci/abcQuant.c
index 262797d2..7185cf8d 100644
--- a/src/base/abci/abcQuant.c
+++ b/src/base/abci/abcQuant.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcReach.c b/src/base/abci/abcReach.c
index f7bc5186..e1ffa309 100644
--- a/src/base/abci/abcReach.c
+++ b/src/base/abci/abcReach.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcRec.c b/src/base/abci/abcRec.c
index abb4be4b..e51b15bd 100644
--- a/src/base/abci/abcRec.c
+++ b/src/base/abci/abcRec.c
@@ -18,9 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "if.h"
-#include "kit.h"
+#include "src/base/abc/abc.h"
+#include "src/map/if/if.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
@@ -246,7 +246,7 @@ void Rec_ObjSet(Abc_ManRec_t* p, Rec_Obj_t* pRecObj, Abc_Obj_t* pObj, char* newD
Abc_NodeSetTravIdCurrent(pObj);
Delay0 = If_CutDelayRecComput_rec(Abc_ObjFanin0(pObj), vCosts);
Delay1 = If_CutDelayRecComput_rec(Abc_ObjFanin1(pObj), vCosts);
- Delay = ABC_MAX(Delay0, Delay1) + 1;
+ Delay = Abc_MaxInt(Delay0, Delay1) + 1;
Vec_StrWriteEntry(vCosts,pObj->Id,Delay);
return Delay;
}*/
@@ -299,7 +299,7 @@ char If_CutDepthRecComput_rec(Abc_Obj_t* pObj, int iLeaf)
return -IF_BIG_CHAR;
Depth0 = If_CutDepthRecComput_rec(Abc_ObjFanin0(pObj), iLeaf);
Depth1 = If_CutDepthRecComput_rec(Abc_ObjFanin1(pObj), iLeaf);
- Depth = ABC_MAX(Depth0, Depth1);
+ Depth = Abc_MaxInt(Depth0, Depth1);
Depth = (Depth == -IF_BIG_CHAR) ? -IF_BIG_CHAR : Depth + 1;
assert(Depth <= 127);
return Depth;
@@ -1064,7 +1064,7 @@ void Abc_NtkRecLibMerge(Abc_Ntk_t* pNtk)
Abc_NtkForEachPi( pNtk, pObj, i )
Abc_ObjSetMax( pObj, i+1 );
Abc_AigForEachAnd( pNtk, pObj, i )
- Abc_ObjSetMax( pObj, ABC_MAX( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) );
+ Abc_ObjSetMax( pObj, Abc_MaxInt( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) );
// insert the PO nodes into the table
Abc_NtkForEachPo( pNtk, pObj, i )
@@ -1105,7 +1105,7 @@ void Abc_NtkRecRezieHash(Abc_ManRec_t* p)
int nBinsNew, Counter, i;
int clk = clock();
// get the new table size
- nBinsNew = Cudd_Prime( 3 * p->nBins );
+ nBinsNew = Abc_PrimeCudd( 3 * p->nBins );
printf("Hash table resize from %d to %d.\n", p->nBins, nBinsNew);
// allocate a new array
pBinsNew = ABC_ALLOC( Rec_Obj_t *, nBinsNew );
@@ -1242,7 +1242,7 @@ p->timeTruth += clock() - clk;
Abc_NtkForEachPi( pNtk, pObj, i )
Abc_ObjSetMax( pObj, i+1 );
Abc_AigForEachAnd( pNtk, pObj, i )
- Abc_ObjSetMax( pObj, ABC_MAX( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) );
+ Abc_ObjSetMax( pObj, Abc_MaxInt( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) );
// insert the PO nodes into the table
timeInsert = clock();
@@ -1308,7 +1308,7 @@ void Abc_NtkRecDumpTruthTables( Abc_ManRec_t * p )
for ( i = 0; i < p->nBins; i++ )
for ( pObj = p->pBins[i]; pObj; pObj = pObj->pCopy )
{
- pTruth = Vec_PtrEntry(p->vTtNodes, pObj->Id);
+ pTruth = (unsigned *)Vec_PtrEntry(p->vTtNodes, pObj->Id);
if ( (int)Kit_TruthSupport(pTruth, nVars) != (1<<nVars)-1 )
continue;
Extra_PrintHex( pFile, pTruth, nVars );
@@ -1418,7 +1418,7 @@ void Abc_NtkRecPs(int fPrintLib)
Abc_NtkForEachPi( pNtk, pObj, i )
Abc_ObjSetMax( pObj, i+1 );
Abc_AigForEachAnd( pNtk, pObj, i )
- Abc_ObjSetMax( pObj, ABC_MAX( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) );
+ Abc_ObjSetMax( pObj, Abc_MaxInt( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) );
if(fPrintLib)
{
pFile = fopen( "tt10.txt", "wb" );
@@ -1426,7 +1426,7 @@ for ( i = 0; i < p->nBins; i++ )
for ( entry = p->pBins[i]; entry; entry = entry->pCopy )
{
int tmp = 0;
- pTruth = Vec_PtrEntry(p->vTtNodes, entry->Id);
+ pTruth = (unsigned *)Vec_PtrEntry(p->vTtNodes, entry->Id);
/*if ( (int)Kit_TruthSupport(pTruth, nVars) != (1<<nVars)-1 )
continue;*/
Extra_PrintHex( pFile, pTruth, nVars );
@@ -2416,7 +2416,7 @@ char Abc_NtkRecCurrentDepth_rec(If_Obj_t * pObj, int iLeaf)
return -IF_BIG_CHAR;
Depth0 = Abc_NtkRecCurrentDepth_rec(If_ObjFanin0(pObj), iLeaf);
Depth1 = Abc_NtkRecCurrentDepth_rec(If_ObjFanin1(pObj), iLeaf);
- Depth = ABC_MAX(Depth0, Depth1);
+ Depth = Abc_MaxInt(Depth0, Depth1);
Depth = (Depth == -IF_BIG_CHAR) ? -IF_BIG_CHAR : Depth + 1;
assert(Depth <= 127);
return Depth;
diff --git a/src/base/abci/abcReconv.c b/src/base/abci/abcReconv.c
index e0cec5cd..4a5be4a2 100644
--- a/src/base/abci/abcReconv.c
+++ b/src/base/abci/abcReconv.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcRefactor.c b/src/base/abci/abcRefactor.c
index 3ba171b7..69d84b0c 100644
--- a/src/base/abci/abcRefactor.c
+++ b/src/base/abci/abcRefactor.c
@@ -18,9 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "dec.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/bool/dec/dec.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcRenode.c b/src/base/abci/abcRenode.c
index 848021a0..35cebd9d 100644
--- a/src/base/abci/abcRenode.c
+++ b/src/base/abci/abcRenode.c
@@ -18,10 +18,11 @@
***********************************************************************/
-#include "abc.h"
-#include "reo.h"
-#include "if.h"
-#include "kit.h"
+#include "src/base/abc/abc.h"
+#include "src/bdd/reo/reo.h"
+#include "src/map/if/if.h"
+#include "src/bool/kit/kit.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcReorder.c b/src/base/abci/abcReorder.c
index d2e7dcea..5fd041ae 100644
--- a/src/base/abci/abcReorder.c
+++ b/src/base/abci/abcReorder.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "reo.h"
+#include "src/base/abc/abc.h"
+#include "src/bdd/reo/reo.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcRestruct.c b/src/base/abci/abcRestruct.c
index 719d722e..66b1d8e8 100644
--- a/src/base/abci/abcRestruct.c
+++ b/src/base/abci/abcRestruct.c
@@ -18,11 +18,11 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
-#include "dec.h"
-#include "dsd.h"
-#include "cut.h"
+#include "src/base/abc/abc.h"
+#include "src/bool/dec/dec.h"
+#include "src/opt/cut/cut.h"
+#include "src/misc/extra/extraBdd.h"
+#include "src/bdd/dsd/dsd.h"
ABC_NAMESPACE_IMPL_START
@@ -655,7 +655,7 @@ Dec_Edge_t Abc_NodeEvaluateDsd_rec( Dec_Graph_t * pGraph, Abc_ManRst_t * pManRst
// set level
Level1 = Dec_GraphNode( pGraph, eNode1.Node )->Level;
Level2 = Dec_GraphNode( pGraph, eNode2.Node )->Level;
- Dec_GraphNode( pGraph, eNode3.Node )->Level = 1 + ABC_MAX(Level1, Level2);
+ Dec_GraphNode( pGraph, eNode3.Node )->Level = 1 + Abc_MaxInt(Level1, Level2);
// get the new node if possible
if ( pNode3 )
{
@@ -708,7 +708,7 @@ Dec_Edge_t Abc_NodeEvaluateDsd_rec( Dec_Graph_t * pGraph, Abc_ManRst_t * pManRst
// set level
Level1 = Dec_GraphNode( pGraph, eNode1.Node )->Level;
Level2 = Dec_GraphNode( pGraph, eNode2.Node )->Level;
- Dec_GraphNode( pGraph, eNode3.Node )->Level = 2 + ABC_MAX(Level1, Level2);
+ Dec_GraphNode( pGraph, eNode3.Node )->Level = 2 + Abc_MaxInt(Level1, Level2);
// get the new node if possible
if ( pNode3 )
{
@@ -824,7 +824,7 @@ Dec_Edge_t Abc_NodeEvaluateDsd_rec( Dec_Graph_t * pGraph, Abc_ManRst_t * pManRst
Level1 = Dec_GraphNode( pGraph, eNode1.Node )->Level;
Level2 = Dec_GraphNode( pGraph, eNode2.Node )->Level;
Level3 = Dec_GraphNode( pGraph, eNode3.Node )->Level;
- Dec_GraphNode( pGraph, eResult.Node )->Level = 2 + ABC_MAX( ABC_MAX(Level1, Level2), Level3 );
+ Dec_GraphNode( pGraph, eResult.Node )->Level = 2 + Abc_MaxInt( Abc_MaxInt(Level1, Level2), Level3 );
// get the new node if possible
if ( pNode4 )
{
diff --git a/src/base/abci/abcResub.c b/src/base/abci/abcResub.c
index aab4d1ce..b03c36aa 100644
--- a/src/base/abci/abcResub.c
+++ b/src/base/abci/abcResub.c
@@ -18,9 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "dec.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/bool/dec/dec.h"
ABC_NAMESPACE_IMPL_START
@@ -1151,7 +1150,7 @@ Dec_Graph_t * Abc_ManResubDivs12( Abc_ManRes_t * p, int Required )
break;
if ( w == p->nWords )
{
- LevelMax = ABC_MAX( pObj0->Level, ABC_MAX(pObj1->Level, pObj2->Level) );
+ LevelMax = Abc_MaxInt( pObj0->Level, Abc_MaxInt(pObj1->Level, pObj2->Level) );
assert( LevelMax <= Required - 1 );
pObjMax = NULL;
@@ -1192,7 +1191,7 @@ Dec_Graph_t * Abc_ManResubDivs12( Abc_ManRes_t * p, int Required )
break;
if ( w == p->nWords )
{
- LevelMax = ABC_MAX( pObj0->Level, ABC_MAX(pObj1->Level, pObj2->Level) );
+ LevelMax = Abc_MaxInt( pObj0->Level, Abc_MaxInt(pObj1->Level, pObj2->Level) );
assert( LevelMax <= Required - 1 );
pObjMax = NULL;
diff --git a/src/base/abci/abcRewrite.c b/src/base/abci/abcRewrite.c
index 54e19f50..5e2745b9 100644
--- a/src/base/abci/abcRewrite.c
+++ b/src/base/abci/abcRewrite.c
@@ -18,10 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
-#include "rwr.h"
-#include "dec.h"
+#include "src/base/abc/abc.h"
+#include "src/opt/rwr/rwr.h"
+#include "src/bool/dec/dec.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcRr.c b/src/base/abci/abcRr.c
index 3e60ebf9..61c8d085 100644
--- a/src/base/abci/abcRr.c
+++ b/src/base/abci/abcRr.c
@@ -18,10 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "fraig.h"
-#include "extra.h"
-#include "sim.h"
+#include "src/base/abc/abc.h"
+#include "src/proof/fraig/fraig.h"
+#include "src/opt/sim/sim.h"
ABC_NAMESPACE_IMPL_START
@@ -434,7 +433,7 @@ int Abc_NtkRRWindow( Abc_RRMan_t * p )
pEdgeFanout = p->pFanout? p->pFanout : p->pNode;
pEdgeFanin = p->pFanout? p->pNode : p->pFanin;
// get the minimum and maximum levels of the window
- LevelMin = ABC_MAX( 0, ((int)p->pFanin->Level) - p->nFaninLevels );
+ LevelMin = Abc_MaxInt( 0, ((int)p->pFanin->Level) - p->nFaninLevels );
LevelMax = (int)pEdgeFanout->Level + p->nFanoutLevels;
// start the TFI leaves with the fanin
diff --git a/src/base/abci/abcSat.c b/src/base/abci/abcSat.c
index b0c5024a..29f13bda 100644
--- a/src/base/abci/abcSat.c
+++ b/src/base/abci/abcSat.c
@@ -18,10 +18,11 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "cmd.h"
-#include "satSolver.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/base/cmd/cmd.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
@@ -590,7 +591,7 @@ int Abc_NtkMiterSatCreateInt( sat_solver * pSat, Abc_Ntk_t * pNtk )
continue;
pPrefVars[nVars++] = (int)pNode->pCopy;
}
- nVars = ABC_MIN( nVars, 10 );
+ nVars = Abc_MinInt( nVars, 10 );
ASat_SolverSetPrefVars( pSat, pPrefVars, nVars );
}
*/
diff --git a/src/base/abci/abcScorr.c b/src/base/abci/abcScorr.c
index 9687003b..e7683edf 100644
--- a/src/base/abci/abcScorr.c
+++ b/src/base/abci/abcScorr.c
@@ -18,13 +18,13 @@
***********************************************************************/
-#include "abc.h"
-#include "ioAbc.h"
-#include "saig.h"
-#include "ssw.h"
-#include "gia.h"
-#include "cec.h"
-#include "giaAig.h"
+#include "src/base/abc/abc.h"
+#include "src/base/io/ioAbc.h"
+#include "src/aig/saig/saig.h"
+#include "src/proof/ssw/ssw.h"
+#include "src/aig/gia/gia.h"
+#include "src/proof/cec/cec.h"
+#include "src/aig/gia/giaAig.h"
ABC_NAMESPACE_IMPL_START
@@ -80,7 +80,7 @@ Vec_Int_t * Abc_NtkMapGiaIntoNameId( Abc_Ntk_t * pNetlist, Aig_Man_t * pAig, Gia
if ( pGia == NULL )
Vec_IntWriteEntry( vId2Name, Aig_ObjId(pObjAig), Abc_ObjId(pNet) );
else
- Vec_IntWriteEntry( vId2Name, Gia_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) );
+ Vec_IntWriteEntry( vId2Name, Abc_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) );
}
}
// overwrite CO names
@@ -95,7 +95,7 @@ Vec_Int_t * Abc_NtkMapGiaIntoNameId( Abc_Ntk_t * pNetlist, Aig_Man_t * pAig, Gia
if ( pGia == NULL )
Vec_IntWriteEntry( vId2Name, Aig_ObjId(pObjAig), Abc_ObjId(pNet) );
else
- Vec_IntWriteEntry( vId2Name, Gia_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) );
+ Vec_IntWriteEntry( vId2Name, Abc_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) );
}
}
// overwrite CI names
@@ -110,7 +110,7 @@ Vec_Int_t * Abc_NtkMapGiaIntoNameId( Abc_Ntk_t * pNetlist, Aig_Man_t * pAig, Gia
if ( pGia == NULL )
Vec_IntWriteEntry( vId2Name, Aig_ObjId(pObjAig), Abc_ObjId(pNet) );
else
- Vec_IntWriteEntry( vId2Name, Gia_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) );
+ Vec_IntWriteEntry( vId2Name, Abc_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) );
}
}
return vId2Name;
diff --git a/src/base/abci/abcSense.c b/src/base/abci/abcSense.c
index 8a477c4e..3bcbc205 100644
--- a/src/base/abci/abcSense.c
+++ b/src/base/abci/abcSense.c
@@ -18,9 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "fraig.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/proof/fraig/fraig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcSpeedup.c b/src/base/abci/abcSpeedup.c
index 35a901ad..2c3ebca0 100644
--- a/src/base/abci/abcSpeedup.c
+++ b/src/base/abci/abcSpeedup.c
@@ -18,10 +18,10 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "if.h"
-#include "aig.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/map/if/if.h"
+#include "src/aig/aig/aig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcStrash.c b/src/base/abci/abcStrash.c
index e08def57..996c9db0 100644
--- a/src/base/abci/abcStrash.c
+++ b/src/base/abci/abcStrash.c
@@ -18,9 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
-#include "dec.h"
+#include "src/base/abc/abc.h"
+#include "src/bool/dec/dec.h"
ABC_NAMESPACE_IMPL_START
@@ -468,7 +467,7 @@ Abc_Ntk_t * Abc_NtkTopmost( Abc_Ntk_t * pNtk, int nLevels )
assert( Abc_NtkIsStrash(pNtk) );
assert( Abc_NtkCoNum(pNtk) == 1 );
// get the cutoff level
- LevelCut = ABC_MAX( 0, Abc_AigLevel(pNtk) - nLevels );
+ LevelCut = Abc_MaxInt( 0, Abc_AigLevel(pNtk) - nLevels );
// start the network
pNtkNew = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 );
pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
diff --git a/src/base/abci/abcSweep.c b/src/base/abci/abcSweep.c
index 43c99d90..a898f26c 100644
--- a/src/base/abci/abcSweep.c
+++ b/src/base/abci/abcSweep.c
@@ -18,13 +18,13 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "fraig.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/proof/fraig/fraig.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
-
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
diff --git a/src/base/abci/abcSymm.c b/src/base/abci/abcSymm.c
index 41abc4db..2a36be14 100644
--- a/src/base/abci/abcSymm.c
+++ b/src/base/abci/abcSymm.c
@@ -18,9 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
-#include "sim.h"
+#include "src/base/abc/abc.h"
+#include "src/opt/sim/sim.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcTiming.c b/src/base/abci/abcTiming.c
index 79768645..d8334e9d 100644
--- a/src/base/abci/abcTiming.c
+++ b/src/base/abci/abcTiming.c
@@ -18,9 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "mio.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
ABC_NAMESPACE_IMPL_START
@@ -139,7 +139,7 @@ void Abc_NtkTimeSetDefaultArrival( Abc_Ntk_t * pNtk, float Rise, float Fall )
pNtk->pManTime = Abc_ManTimeStart();
pNtk->pManTime->tArrDef.Rise = Rise;
pNtk->pManTime->tArrDef.Fall = Fall;
- pNtk->pManTime->tArrDef.Worst = ABC_MAX( Rise, Fall );
+ pNtk->pManTime->tArrDef.Worst = Abc_MaxInt( Rise, Fall );
}
/**Function*************************************************************
@@ -161,7 +161,7 @@ void Abc_NtkTimeSetDefaultRequired( Abc_Ntk_t * pNtk, float Rise, float Fall )
pNtk->pManTime = Abc_ManTimeStart();
pNtk->pManTime->tReqDef.Rise = Rise;
pNtk->pManTime->tReqDef.Fall = Fall;
- pNtk->pManTime->tReqDef.Worst = ABC_MAX( Rise, Fall );
+ pNtk->pManTime->tReqDef.Worst = Abc_MaxInt( Rise, Fall );
}
/**Function*************************************************************
@@ -189,7 +189,7 @@ void Abc_NtkTimeSetArrival( Abc_Ntk_t * pNtk, int ObjId, float Rise, float Fall
pTime = (Abc_Time_t *)vTimes->pArray[ObjId];
pTime->Rise = Rise;
pTime->Fall = Fall;
- pTime->Worst = ABC_MAX( Rise, Fall );
+ pTime->Worst = Abc_MaxInt( Rise, Fall );
}
/**Function*************************************************************
@@ -217,7 +217,7 @@ void Abc_NtkTimeSetRequired( Abc_Ntk_t * pNtk, int ObjId, float Rise, float Fall
pTime = (Abc_Time_t *)vTimes->pArray[ObjId];
pTime->Rise = Rise;
pTime->Fall = Fall;
- pTime->Worst = ABC_MAX( Rise, Fall );
+ pTime->Worst = Abc_MaxInt( Rise, Fall );
}
/**Function*************************************************************
@@ -625,7 +625,7 @@ void Abc_NodeDelayTraceArrival( Abc_Obj_t * pNode )
}
pPin = Mio_PinReadNext(pPin);
}
- pTimeOut->Worst = ABC_MAX( pTimeOut->Rise, pTimeOut->Fall );
+ pTimeOut->Worst = Abc_MaxInt( pTimeOut->Rise, pTimeOut->Fall );
}
@@ -647,7 +647,7 @@ int Abc_ObjLevelNew( Abc_Obj_t * pObj )
Abc_Obj_t * pFanin;
int i, Level = 0;
Abc_ObjForEachFanin( pObj, pFanin, i )
- Level = ABC_MAX( Level, Abc_ObjLevel(pFanin) );
+ Level = Abc_MaxInt( Level, Abc_ObjLevel(pFanin) );
return Level + 1;
}
@@ -669,7 +669,7 @@ int Abc_ObjReverseLevelNew( Abc_Obj_t * pObj )
Abc_ObjForEachFanout( pObj, pFanout, i )
{
LevelCur = Abc_ObjReverseLevel( pFanout );
- Level = ABC_MAX( Level, LevelCur );
+ Level = Abc_MaxInt( Level, LevelCur );
}
return Level + 1;
}
@@ -827,7 +827,7 @@ void Abc_NtkUpdateLevel( Abc_Obj_t * pObjNew, Vec_Vec_t * vLevels )
assert( Abc_ObjLevel(pFanout) >= Lev );
Vec_VecPush( vLevels, Abc_ObjLevel(pFanout), pFanout );
// Counter++;
-// CounterMax = ABC_MAX( CounterMax, Counter );
+// CounterMax = Abc_MaxInt( CounterMax, Counter );
pFanout->fMarkA = 1;
}
}
diff --git a/src/base/abci/abcUnate.c b/src/base/abci/abcUnate.c
index 829a83bd..a56973b6 100644
--- a/src/base/abci/abcUnate.c
+++ b/src/base/abci/abcUnate.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcUnreach.c b/src/base/abci/abcUnreach.c
index f62ec7fc..72514029 100644
--- a/src/base/abci/abcUnreach.c
+++ b/src/base/abci/abcUnreach.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcVerify.c b/src/base/abci/abcVerify.c
index 7a9a5239..9b88cb8a 100644
--- a/src/base/abci/abcVerify.c
+++ b/src/base/abci/abcVerify.c
@@ -18,15 +18,15 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "cmd.h"
-#include "fraig.h"
-#include "sim.h"
-#include "aig.h"
-#include "saig.h"
-#include "gia.h"
-#include "ssw.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/base/cmd/cmd.h"
+#include "src/proof/fraig/fraig.h"
+#include "src/opt/sim/sim.h"
+#include "src/aig/aig/aig.h"
+#include "src/aig/saig/saig.h"
+#include "src/aig/gia/gia.h"
+#include "src/proof/ssw/ssw.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/abcXsim.c b/src/base/abci/abcXsim.c
index 12ad0e68..23bbbe1a 100644
--- a/src/base/abci/abcXsim.c
+++ b/src/base/abci/abcXsim.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "gia.h"
+#include "src/base/abc/abc.h"
+#include "src/aig/gia/gia.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/abci/fahout_cut.c b/src/base/abci/fahout_cut.c
new file mode 100644
index 00000000..0b4b421f
--- /dev/null
+++ b/src/base/abci/fahout_cut.c
@@ -0,0 +1,357 @@
+/**CFile****************************************************************
+
+ FileName [abcMerge.c]
+
+ SystemName [ABC: Logic synthesis and verification system.]
+
+ PackageName [Network and node package.]
+
+ Synopsis [LUT merging algorithm.]
+
+ Author [Alan Mishchenko]
+
+ Affiliation [UC Berkeley]
+
+ Date [Ver. 1.0. Started - June 20, 2005.]
+
+ Revision [$Id: abcMerge.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
+
+***********************************************************************/
+
+#include "base/abc/abc.h"
+#include "aig/aig/aig.h"
+#include "aig/nwk/nwkMerge.h"
+
+ABC_NAMESPACE_IMPL_START
+
+
+////////////////////////////////////////////////////////////////////////
+/// DECLARATIONS ///
+////////////////////////////////////////////////////////////////////////
+
+////////////////////////////////////////////////////////////////////////
+/// FUNCTION DEFINITIONS ///
+////////////////////////////////////////////////////////////////////////
+
+/**Function*************************************************************
+
+ Synopsis [Marks the fanins of the node with the current trav ID.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_NtkMarkFanins_rec( Abc_Obj_t * pLut, int nLevMin )
+{
+ Abc_Obj_t * pNext;
+ int i;
+ if ( !Abc_ObjIsNode(pLut) )
+ return;
+ if ( Abc_NodeIsTravIdCurrent( pLut ) )
+ return;
+ Abc_NodeSetTravIdCurrent( pLut );
+ if ( Abc_ObjLevel(pLut) < nLevMin )
+ return;
+ Abc_ObjForEachFanin( pLut, pNext, i )
+ Abc_NtkMarkFanins_rec( pNext, nLevMin );
+}
+
+/**Function*************************************************************
+
+ Synopsis [Marks the fanouts of the node with the current trav ID.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_NtkMarkFanouts_rec( Abc_Obj_t * pLut, int nLevMax, int nFanMax )
+{
+ Abc_Obj_t * pNext;
+ int i;
+ if ( !Abc_ObjIsNode(pLut) )
+ return;
+ if ( Abc_NodeIsTravIdCurrent( pLut ) )
+ return;
+ Abc_NodeSetTravIdCurrent( pLut );
+ if ( Abc_ObjLevel(pLut) > nLevMax )
+ return;
+ if ( Abc_ObjFanoutNum(pLut) > nFanMax )
+ return;
+ Abc_ObjForEachFanout( pLut, pNext, i )
+ Abc_NtkMarkFanouts_rec( pNext, nLevMax, nFanMax );
+}
+
+/**Function*************************************************************
+
+ Synopsis [Collects the circle of nodes around the given set.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_NtkCollectCircle( Vec_Ptr_t * vStart, Vec_Ptr_t * vNext, int nFanMax )
+{
+ Abc_Obj_t * pObj, * pNext;
+ int i, k;
+ Vec_PtrClear( vNext );
+ Vec_PtrForEachEntry( Vec_Int_t *, vStart, pObj, i )
+ {
+ Abc_ObjForEachFanin( pObj, pNext, k )
+ {
+ if ( !Abc_ObjIsNode(pNext) )
+ continue;
+ if ( Abc_NodeIsTravIdCurrent( pNext ) )
+ continue;
+ Abc_NodeSetTravIdCurrent( pNext );
+ Vec_PtrPush( vNext, pNext );
+ }
+ Abc_ObjForEachFanout( pObj, pNext, k )
+ {
+ if ( !Abc_ObjIsNode(pNext) )
+ continue;
+ if ( Abc_NodeIsTravIdCurrent( pNext ) )
+ continue;
+ Abc_NodeSetTravIdCurrent( pNext );
+ if ( Abc_ObjFanoutNum(pNext) > nFanMax )
+ continue;
+ Vec_PtrPush( vNext, pNext );
+ }
+ }
+}
+
+/**Function*************************************************************
+
+ Synopsis [Collects the circle of nodes removes from the given one.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_NtkCollectNonOverlapCands( Abc_Obj_t * pLut, Vec_Ptr_t * vStart, Vec_Ptr_t * vNext, Vec_Ptr_t * vCands, Nwk_LMPars_t * pPars )
+{
+ Vec_Ptr_t * vTemp;
+ Abc_Obj_t * pObj;
+ int i, k;
+ Vec_PtrClear( vCands );
+ if ( pPars->nMaxSuppSize - Abc_ObjFaninNum(pLut) <= 1 )
+ return;
+
+ // collect nodes removed by this distance
+ assert( pPars->nMaxDistance > 0 );
+ Vec_PtrClear( vStart );
+ Vec_PtrPush( vStart, pLut );
+ Abc_NtkIncrementTravId( pLut->pNtk );
+ Abc_NodeSetTravIdCurrent( pLut );
+ for ( i = 1; i <= pPars->nMaxDistance; i++ )
+ {
+ Abc_NtkCollectCircle( vStart, vNext, pPars->nMaxFanout );
+ vTemp = vStart;
+ vStart = vNext;
+ vNext = vTemp;
+ // collect the nodes in vStart
+ Vec_PtrForEachEntry( Vec_Int_t *, vStart, pObj, k )
+ Vec_PtrPush( vCands, pObj );
+ }
+
+ // mark the TFI/TFO nodes
+ Abc_NtkIncrementTravId( pLut->pNtk );
+ if ( pPars->fUseTfiTfo )
+ Abc_NodeSetTravIdCurrent( pLut );
+ else
+ {
+ Abc_NodeSetTravIdPrevious( pLut );
+ Abc_NtkMarkFanins_rec( pLut, Abc_ObjLevel(pLut) - pPars->nMaxDistance );
+ Abc_NodeSetTravIdPrevious( pLut );
+ Abc_NtkMarkFanouts_rec( pLut, Abc_ObjLevel(pLut) + pPars->nMaxDistance, pPars->nMaxFanout );
+ }
+
+ // collect nodes satisfying the following conditions:
+ // - they are close enough in terms of distance
+ // - they are not in the TFI/TFO of the LUT
+ // - they have no more than the given number of fanins
+ // - they have no more than the given diff in delay
+ k = 0;
+ Vec_PtrForEachEntry( Vec_Int_t *, vCands, pObj, i )
+ {
+ if ( Abc_NodeIsTravIdCurrent(pObj) )
+ continue;
+ if ( Abc_ObjFaninNum(pLut) + Abc_ObjFaninNum(pObj) > pPars->nMaxSuppSize )
+ continue;
+ if ( Abc_ObjLevel(pLut) - Abc_ObjLevel(pObj) > pPars->nMaxLevelDiff ||
+ Abc_ObjLevel(pObj) - Abc_ObjLevel(pLut) > pPars->nMaxLevelDiff )
+ continue;
+ Vec_PtrWriteEntry( vCands, k++, pObj );
+ }
+ Vec_PtrShrink( vCands, k );
+}
+
+
+/**Function*************************************************************
+
+ Synopsis [Count the total number of fanins.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+int Abc_NtkCountTotalFanins( Abc_Obj_t * pLut, Abc_Obj_t * pCand )
+{
+ Abc_Obj_t * pFanin;
+ int i, nCounter = Abc_ObjFaninNum(pLut);
+ Abc_ObjForEachFanin( pCand, pFanin, i )
+ nCounter += !pFanin->fMarkC;
+ return nCounter;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Collects overlapping candidates.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Abc_NtkCollectOverlapCands( Abc_Obj_t * pLut, Vec_Ptr_t * vCands, Nwk_LMPars_t * pPars )
+{
+ Abc_Obj_t * pFanin, * pObj;
+ int i, k;
+ // mark fanins of pLut
+ Abc_ObjForEachFanin( pLut, pFanin, i )
+ pFanin->fMarkC = 1;
+ // collect the matching fanouts of each fanin of the node
+ Vec_PtrClear( vCands );
+ Abc_NtkIncrementTravId( pLut->pNtk );
+ Abc_NodeSetTravIdCurrent( pLut );
+ Abc_ObjForEachFanin( pLut, pFanin, i )
+ {
+ if ( !Abc_ObjIsNode(pFanin) )
+ continue;
+ if ( Abc_ObjFanoutNum(pFanin) > pPars->nMaxFanout )
+ continue;
+ Abc_ObjForEachFanout( pFanin, pObj, k )
+ {
+ if ( !Abc_ObjIsNode(pObj) )
+ continue;
+ if ( Abc_NodeIsTravIdCurrent( pObj ) )
+ continue;
+ Abc_NodeSetTravIdCurrent( pObj );
+ // check the difference in delay
+ if ( Abc_ObjLevel(pLut) - Abc_ObjLevel(pObj) > pPars->nMaxLevelDiff ||
+ Abc_ObjLevel(pObj) - Abc_ObjLevel(pLut) > pPars->nMaxLevelDiff )
+ continue;
+ // check the total number of fanins of the node
+ if ( Abc_NtkCountTotalFanins(pLut, pObj) > pPars->nMaxSuppSize )
+ continue;
+ Vec_PtrPush( vCands, pObj );
+ }
+ }
+ // unmark fanins of pLut
+ Abc_ObjForEachFanin( pLut, pFanin, i )
+ pFanin->fMarkC = 0;
+}
+
+/**Function*************************************************************
+
+ Synopsis [Performs LUT merging with parameters.]
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+Vec_Int_t * Abc_NtkLutMerge( Abc_Ntk_t * pNtk, Nwk_LMPars_t * pPars )
+{
+ Nwk_Grf_t * p;
+ Vec_Int_t * vResult;
+ Vec_Ptr_t * vStart, * vNext, * vCands1, * vCands2;
+ Abc_Obj_t * pLut, * pCand;
+ int i, k, nVertsMax, nCands, clk = clock();
+ // count the number of vertices
+ nVertsMax = 0;
+ Abc_NtkForEachNode( pNtk, pLut, i )
+ nVertsMax += (int)(Abc_ObjFaninNum(pLut) <= pPars->nMaxLutSize);
+ p = Nwk_ManGraphAlloc( nVertsMax );
+ // create graph
+ vStart = Vec_PtrAlloc( 1000 );
+ vNext = Vec_PtrAlloc( 1000 );
+ vCands1 = Vec_PtrAlloc( 1000 );
+ vCands2 = Vec_PtrAlloc( 1000 );
+ nCands = 0;
+ Abc_NtkForEachNode( pNtk, pLut, i )
+ {
+ if ( Abc_ObjFaninNum(pLut) > pPars->nMaxLutSize )
+ continue;
+ Abc_NtkCollectOverlapCands( pLut, vCands1, pPars );
+ if ( pPars->fUseDiffSupp )
+ Abc_NtkCollectNonOverlapCands( pLut, vStart, vNext, vCands2, pPars );
+ if ( Vec_PtrSize(vCands1) == 0 && Vec_PtrSize(vCands2) == 0 )
+ continue;
+ nCands += Vec_PtrSize(vCands1) + Vec_PtrSize(vCands2);
+ // save candidates
+ Vec_PtrForEachEntry( Vec_Int_t *, vCands1, pCand, k )
+ Nwk_ManGraphHashEdge( p, Abc_ObjId(pLut), Abc_ObjId(pCand) );
+ Vec_PtrForEachEntry( Vec_Int_t *, vCands2, pCand, k )
+ Nwk_ManGraphHashEdge( p, Abc_ObjId(pLut), Abc_ObjId(pCand) );
+ // print statistics about this node
+ if ( pPars->fVeryVerbose )
+ printf( "Node %6d : Fanins = %d. Fanouts = %3d. Cand1 = %3d. Cand2 = %3d.\n",
+ Abc_ObjId(pLut), Abc_ObjFaninNum(pLut), Abc_ObjFaninNum(pLut),
+ Vec_PtrSize(vCands1), Vec_PtrSize(vCands2) );
+ }
+ Vec_PtrFree( vStart );
+ Vec_PtrFree( vNext );
+ Vec_PtrFree( vCands1 );
+ Vec_PtrFree( vCands2 );
+ if ( pPars->fVerbose )
+ {
+ printf( "Mergable LUTs = %6d. Total cands = %6d. ", p->nVertsMax, nCands );
+ ABC_PRT( "Deriving graph", clock() - clk );
+ }
+ // solve the graph problem
+ clk = clock();
+ Nwk_ManGraphSolve( p );
+ if ( pPars->fVerbose )
+ {
+ printf( "GRAPH: Nodes = %6d. Edges = %6d. Pairs = %6d. ",
+ p->nVerts, p->nEdges, Vec_IntSize(p->vPairs)/2 );
+ ABC_PRT( "Solving", clock() - clk );
+ Nwk_ManGraphReportMemoryUsage( p );
+ }
+ vResult = p->vPairs; p->vPairs = NULL;
+/*
+ for ( i = 0; i < vResult->nSize; i += 2 )
+ printf( "(%d,%d) ", vResult->pArray[i], vResult->pArray[i+1] );
+ printf( "\n" );
+*/
+ Nwk_ManGraphFree( p );
+ return vResult;
+}
+
+
+////////////////////////////////////////////////////////////////////////
+/// END OF FILE ///
+////////////////////////////////////////////////////////////////////////
+
+
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/base/abci/module.make b/src/base/abci/module.make
index 965e0258..8b2ef27b 100644
--- a/src/base/abci/module.make
+++ b/src/base/abci/module.make
@@ -1,5 +1,4 @@
SRC += src/base/abci/abc.c \
- src/base/abci/abcAbc8.c \
src/base/abci/abcAttach.c \
src/base/abci/abcAuto.c \
src/base/abci/abcBalance.c \
diff --git a/src/base/cmd/cmd.c b/src/base/cmd/cmd.c
index 35eb535a..6c8a3c2e 100644
--- a/src/base/cmd/cmd.c
+++ b/src/base/cmd/cmd.c
@@ -24,10 +24,10 @@
#include <unistd.h>
#endif
-#include "abc.h"
-#include "mainInt.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/mainInt.h"
#include "cmdInt.h"
-#include "utilSignal.h"
+#include "src/misc/util/utilSignal.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/cmd/cmd.h b/src/base/cmd/cmd.h
index 740cf758..f424f090 100644
--- a/src/base/cmd/cmd.h
+++ b/src/base/cmd/cmd.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __CMD_H__
-#define __CMD_H__
+#ifndef ABC__base__cmd__cmd_h
+#define ABC__base__cmd__cmd_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/base/cmd/cmdAlias.c b/src/base/cmd/cmdAlias.c
index 6078927d..67cdc318 100644
--- a/src/base/cmd/cmdAlias.c
+++ b/src/base/cmd/cmdAlias.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "cmdInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/cmd/cmdApi.c b/src/base/cmd/cmdApi.c
index 40c1dbf9..9357a93c 100644
--- a/src/base/cmd/cmdApi.c
+++ b/src/base/cmd/cmdApi.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "mainInt.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/mainInt.h"
#include "cmdInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/cmd/cmdFlag.c b/src/base/cmd/cmdFlag.c
index a220042b..7b46e8fc 100644
--- a/src/base/cmd/cmdFlag.c
+++ b/src/base/cmd/cmdFlag.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "mainInt.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/mainInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/cmd/cmdHist.c b/src/base/cmd/cmdHist.c
index a2f64027..b6a4d535 100644
--- a/src/base/cmd/cmdHist.c
+++ b/src/base/cmd/cmdHist.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "mainInt.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/mainInt.h"
#include "cmd.h"
#include "cmdInt.h"
diff --git a/src/base/cmd/cmdInt.h b/src/base/cmd/cmdInt.h
index 0ea9b364..6c1add92 100644
--- a/src/base/cmd/cmdInt.h
+++ b/src/base/cmd/cmdInt.h
@@ -18,15 +18,15 @@
***********************************************************************/
-#ifndef __CMD_INT_H__
-#define __CMD_INT_H__
+#ifndef ABC__base__cmd__cmdInt_h
+#define ABC__base__cmd__cmdInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "mainInt.h"
+#include "src/base/main/mainInt.h"
#include "cmd.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/base/cmd/cmdLoad.c b/src/base/cmd/cmdLoad.c
index 797275db..e4d8269a 100644
--- a/src/base/cmd/cmdLoad.c
+++ b/src/base/cmd/cmdLoad.c
@@ -18,11 +18,11 @@
***********************************************************************/
-#include "abc.h"
-#include "mainInt.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/mainInt.h"
#include "cmd.h"
#include "cmdInt.h"
-#include "utilSignal.h"
+#include "src/misc/util/utilSignal.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/cmd/cmdPlugin.c b/src/base/cmd/cmdPlugin.c
index 8649d465..84e89cb1 100644
--- a/src/base/cmd/cmdPlugin.c
+++ b/src/base/cmd/cmdPlugin.c
@@ -25,11 +25,11 @@
#include <unistd.h>
#endif
-#include "abc.h"
-#include "mainInt.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/mainInt.h"
#include "cmd.h"
#include "cmdInt.h"
-#include "utilSignal.h"
+#include "src/misc/util/utilSignal.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/cmd/cmdUtils.c b/src/base/cmd/cmdUtils.c
index 683d336e..e6dbed4e 100644
--- a/src/base/cmd/cmdUtils.c
+++ b/src/base/cmd/cmdUtils.c
@@ -18,8 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "mainInt.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/mainInt.h"
#include "cmdInt.h"
#include <ctype.h>
diff --git a/src/base/io/io.c b/src/base/io/io.c
index 1cea2e37..92dbe9fc 100644
--- a/src/base/io/io.c
+++ b/src/base/io/io.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "ioAbc.h"
-#include "mainInt.h"
-#include "saig.h"
+#include "src/base/main/mainInt.h"
+#include "src/aig/saig/saig.h"
ABC_NAMESPACE_IMPL_START
@@ -1998,7 +1998,7 @@ usage:
ABC_NAMESPACE_IMPL_END
-#include "fra.h"
+#include "src/proof/fra/fra.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioAbc.h b/src/base/io/ioAbc.h
index f3db4c15..7a38ae5c 100644
--- a/src/base/io/ioAbc.h
+++ b/src/base/io/ioAbc.h
@@ -18,16 +18,16 @@
***********************************************************************/
-#ifndef __IO_H__
-#define __IO_H__
+#ifndef ABC__base__io__ioAbc_h
+#define ABC__base__io__ioAbc_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extra.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/base/io/ioInt.h b/src/base/io/ioInt.h
index 9ded63e4..fed639a4 100644
--- a/src/base/io/ioInt.h
+++ b/src/base/io/ioInt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __IO_INT_H__
-#define __IO_INT_H__
+#ifndef ABC__base__io__ioInt_h
+#define ABC__base__io__ioInt_h
ABC_NAMESPACE_HEADER_START
diff --git a/src/base/io/ioReadAiger.c b/src/base/io/ioReadAiger.c
index 13987a1b..55ef16db 100644
--- a/src/base/io/ioReadAiger.c
+++ b/src/base/io/ioReadAiger.c
@@ -21,9 +21,9 @@
// The code in this file is developed in collaboration with Mark Jarvin of Toronto.
-#include "bzlib.h"
+#include "src/misc/bzlib/bzlib.h"
#include "ioAbc.h"
-#include "zlib.h"
+#include "src/misc/zlib/zlib.h"
ABC_NAMESPACE_IMPL_START
@@ -358,7 +358,7 @@ Abc_Ntk_t * Io_ReadAiger( char * pFileName, int fCheck )
pObj = Abc_NtkCreatePo(pNtkNew);
}
// create the latches
- nDigits = Extra_Base10Log( nLatches );
+ nDigits = Abc_Base10Log( nLatches );
for ( i = 0; i < nLatches; i++ )
{
pObj = Abc_NtkCreateLatch(pNtkNew);
diff --git a/src/base/io/ioReadBblif.c b/src/base/io/ioReadBblif.c
index 5b15c9d4..873a5671 100644
--- a/src/base/io/ioReadBblif.c
+++ b/src/base/io/ioReadBblif.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "ioAbc.h"
-#include "dec.h"
-#include "bblif.h"
+#include "src/bool/dec/dec.h"
+#include "src/misc/bbl/bblif.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioReadBlif.c b/src/base/io/ioReadBlif.c
index 9fd41261..faf0f53e 100644
--- a/src/base/io/ioReadBlif.c
+++ b/src/base/io/ioReadBlif.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "ioAbc.h"
-#include "main.h"
-#include "mio.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioReadBlifAig.c b/src/base/io/ioReadBlifAig.c
index 1ef61196..f365cb4d 100644
--- a/src/base/io/ioReadBlifAig.c
+++ b/src/base/io/ioReadBlifAig.c
@@ -18,9 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
-#include "vecPtr.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/vec/vecPtr.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioReadBlifMv.c b/src/base/io/ioReadBlifMv.c
index 20ec8aa1..3e226824 100644
--- a/src/base/io/ioReadBlifMv.c
+++ b/src/base/io/ioReadBlifMv.c
@@ -18,9 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
-#include "vecPtr.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/vec/vecPtr.h"
#include "ioAbc.h"
ABC_NAMESPACE_IMPL_START
@@ -2029,8 +2028,8 @@ Io_MvVar_t * Abc_NtkMvVarDup( Abc_Ntk_t * pNtk, Io_MvVar_t * pVar )
ABC_NAMESPACE_IMPL_END
-#include "mio.h"
-#include "main.h"
+#include "src/map/mio/mio.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioReadDsd.c b/src/base/io/ioReadDsd.c
index 3608507b..514c664a 100644
--- a/src/base/io/ioReadDsd.c
+++ b/src/base/io/ioReadDsd.c
@@ -241,7 +241,7 @@ Abc_Ntk_t * Io_ReadDsd( char * pForm )
nInputs = 0;
for ( pCur = pForm; *pCur; pCur++ )
if ( *pCur >= 'a' && *pCur <= 'z' )
- nInputs = ABC_MAX( nInputs, *pCur - 'a' );
+ nInputs = Abc_MaxInt( nInputs, *pCur - 'a' );
nInputs++;
// create the network
diff --git a/src/base/io/ioReadPla.c b/src/base/io/ioReadPla.c
index 927cf7e5..46ab811e 100644
--- a/src/base/io/ioReadPla.c
+++ b/src/base/io/ioReadPla.c
@@ -158,7 +158,7 @@ Abc_Ntk_t * Io_ReadPlaNetwork( Extra_FileReader_t * p, int fZeros )
ABC_FREE( ppSops );
return NULL;
}
- nDigits = Extra_Base10Log( nInputs );
+ nDigits = Abc_Base10Log( nInputs );
for ( i = 0; i < nInputs; i++ )
{
sprintf( Buffer, "x%0*d", nDigits, i );
@@ -175,7 +175,7 @@ Abc_Ntk_t * Io_ReadPlaNetwork( Extra_FileReader_t * p, int fZeros )
ABC_FREE( ppSops );
return NULL;
}
- nDigits = Extra_Base10Log( nOutputs );
+ nDigits = Abc_Base10Log( nOutputs );
for ( i = 0; i < nOutputs; i++ )
{
sprintf( Buffer, "z%0*d", nDigits, i );
diff --git a/src/base/io/ioReadVerilog.c b/src/base/io/ioReadVerilog.c
index 3a8c6045..da74d8d9 100644
--- a/src/base/io/ioReadVerilog.c
+++ b/src/base/io/ioReadVerilog.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "ioAbc.h"
-#include "ver.h"
+#include "src/base/ver/ver.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioUtil.c b/src/base/io/ioUtil.c
index 9a50c0c8..e8a018c2 100644
--- a/src/base/io/ioUtil.c
+++ b/src/base/io/ioUtil.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "ioAbc.h"
-#include "main.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioWriteAiger.c b/src/base/io/ioWriteAiger.c
index 9ab0905e..0f725be3 100644
--- a/src/base/io/ioWriteAiger.c
+++ b/src/base/io/ioWriteAiger.c
@@ -21,11 +21,11 @@
// The code in this file is developed in collaboration with Mark Jarvin of Toronto.
-#include "bzlib.h"
+#include "src/misc/bzlib/bzlib.h"
#include "ioAbc.h"
#include <stdarg.h>
-#include "zlib.h"
+#include "src/misc/zlib/zlib.h"
ABC_NAMESPACE_IMPL_START
@@ -770,8 +770,8 @@ void Io_WriteAiger( Abc_Ntk_t * pNtk, char * pFileName, int fWriteSymbols, int f
}
-#include "giaAig.h"
-#include "saig.h"
+#include "src/aig/gia/giaAig.h"
+#include "src/aig/saig/saig.h"
/**Function*************************************************************
@@ -825,8 +825,8 @@ void Io_WriteAigerCex( Abc_Cex_t * pCex, Abc_Ntk_t * pNtk, void * pG, char * pFi
{
for ( k = 0; k < pCex->nPis; k++ )
{
- fprintf( pFile, "%d", Aig_InfoHasBit(pCex->pData, b) );
- Aig_ManPi( pAig, k )->fMarkA = Aig_InfoHasBit(pCex->pData, b++);
+ fprintf( pFile, "%d", Abc_InfoHasBit(pCex->pData, b) );
+ Aig_ManPi( pAig, k )->fMarkA = Abc_InfoHasBit(pCex->pData, b++);
}
fprintf( pFile, " " );
Aig_ManForEachNode( pAig, pObj, k )
diff --git a/src/base/io/ioWriteBblif.c b/src/base/io/ioWriteBblif.c
index 5cace190..09bb1da9 100644
--- a/src/base/io/ioWriteBblif.c
+++ b/src/base/io/ioWriteBblif.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "ioAbc.h"
-#include "bblif.h"
+#include "src/misc/bbl/bblif.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioWriteBlif.c b/src/base/io/ioWriteBlif.c
index 9dc96afb..d8d3f787 100644
--- a/src/base/io/ioWriteBlif.c
+++ b/src/base/io/ioWriteBlif.c
@@ -19,10 +19,10 @@
***********************************************************************/
#include "ioAbc.h"
-#include "main.h"
-#include "mio.h"
-#include "kit.h"
-#include "if.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
+#include "src/bool/kit/kit.h"
+#include "src/map/if/if.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioWriteBlifMv.c b/src/base/io/ioWriteBlifMv.c
index 62028606..fd054d5f 100644
--- a/src/base/io/ioWriteBlifMv.c
+++ b/src/base/io/ioWriteBlifMv.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "ioAbc.h"
-#include "main.h"
-#include "mio.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioWriteBook.c b/src/base/io/ioWriteBook.c
index 45807ce6..ae717c8d 100644
--- a/src/base/io/ioWriteBook.c
+++ b/src/base/io/ioWriteBook.c
@@ -18,9 +18,11 @@
***********************************************************************/
+#include <math.h>
+
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
#include "ioAbc.h"
-#include "main.h"
-#include "mio.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioWriteCnf.c b/src/base/io/ioWriteCnf.c
index 6cb82a0a..d5d377cc 100644
--- a/src/base/io/ioWriteCnf.c
+++ b/src/base/io/ioWriteCnf.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "ioAbc.h"
-#include "satSolver.h"
+#include "src/sat/bsat/satSolver.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioWriteDot.c b/src/base/io/ioWriteDot.c
index c1b9befc..9a9bcd82 100644
--- a/src/base/io/ioWriteDot.c
+++ b/src/base/io/ioWriteDot.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "ioAbc.h"
-#include "main.h"
-#include "mio.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/io/ioWriteVerilog.c b/src/base/io/ioWriteVerilog.c
index 7f9bee95..511eb9f0 100644
--- a/src/base/io/ioWriteVerilog.c
+++ b/src/base/io/ioWriteVerilog.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "ioAbc.h"
-#include "main.h"
-#include "mio.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
ABC_NAMESPACE_IMPL_START
@@ -492,7 +492,7 @@ void Io_WriteVerilogObjects( FILE * pFile, Abc_Ntk_t * pNtk )
int i, k, Counter, nDigits, Length;
// write boxes
- nDigits = Extra_Base10Log( Abc_NtkBoxNum(pNtk)-Abc_NtkLatchNum(pNtk) );
+ nDigits = Abc_Base10Log( Abc_NtkBoxNum(pNtk)-Abc_NtkLatchNum(pNtk) );
Counter = 0;
Abc_NtkForEachBox( pNtk, pObj, i )
{
@@ -517,7 +517,7 @@ void Io_WriteVerilogObjects( FILE * pFile, Abc_Ntk_t * pNtk )
if ( Abc_NtkHasMapping(pNtk) )
{
Length = Mio_LibraryReadGateNameMax((Mio_Library_t *)pNtk->pManFunc);
- nDigits = Extra_Base10Log( Abc_NtkNodeNum(pNtk) );
+ nDigits = Abc_Base10Log( Abc_NtkNodeNum(pNtk) );
Counter = 0;
Abc_NtkForEachNode( pNtk, pObj, k )
{
diff --git a/src/base/main/libSupport.c b/src/base/main/libSupport.c
index 3c0b20c7..8c92a595 100644
--- a/src/base/main/libSupport.c
+++ b/src/base/main/libSupport.c
@@ -21,7 +21,7 @@
#include <stdio.h>
#include <string.h>
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "mainInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/main/main.c b/src/base/main/main.c
index 16c6e362..27b4b0bd 100644
--- a/src/base/main/main.c
+++ b/src/base/main/main.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "mainInt.h"
#ifdef ABC_PYTHON_EMBED
diff --git a/src/base/main/main.h b/src/base/main/main.h
index 134af6e2..33f8a110 100644
--- a/src/base/main/main.h
+++ b/src/base/main/main.h
@@ -18,30 +18,29 @@
***********************************************************************/
-#ifndef __MAIN_H__
-#define __MAIN_H__
+#ifndef ABC__base__main__main_h
+#define ABC__base__main__main_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-// data structure packages
-#include "extra.h"
-#include "vec.h"
-#include "st.h"
-
// core packages
-#include "abc.h"
-#include "gia.h"
+#include "src/base/abc/abc.h"
+#include "src/aig/gia/gia.h"
+
+// data structure packages
+#include "src/misc/vec/vec.h"
+#include "src/misc/st/st.h"
ABC_NAMESPACE_HEADER_START
// the framework containing all data
typedef struct Abc_Frame_t_ Abc_Frame_t;
ABC_NAMESPACE_HEADER_END
-#include "cmd.h"
-#include "ioAbc.h"
+#include "src/base/cmd/cmd.h"
+#include "src/base/io/ioAbc.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/base/main/mainFrame.c b/src/base/main/mainFrame.c
index 658bc34e..d03acf28 100644
--- a/src/base/main/mainFrame.c
+++ b/src/base/main/mainFrame.c
@@ -18,9 +18,10 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "mainInt.h"
-#include "dec.h"
+#include "src/bool/dec/dec.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/main/mainInit.c b/src/base/main/mainInit.c
index c15ca872..73abd548 100644
--- a/src/base/main/mainInit.c
+++ b/src/base/main/mainInit.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "mainInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/main/mainInt.h b/src/base/main/mainInt.h
index c008fc8b..979d376c 100644
--- a/src/base/main/mainInt.h
+++ b/src/base/main/mainInt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __MAIN_INT_H__
-#define __MAIN_INT_H__
+#ifndef ABC__base__main__mainInt_h
+#define ABC__base__main__mainInt_h
////////////////////////////////////////////////////////////////////////
@@ -27,15 +27,16 @@
////////////////////////////////////////////////////////////////////////
#include "main.h"
-#include "tim.h"
-#include "if.h"
-#include "aig.h"
-#include "gia.h"
-#include "ssw.h"
-#include "fra.h"
-#include "nwkMerge.h"
-#include "ntlnwk.h"
-#include "ext.h"
+#include "src/misc/tim/tim.h"
+#include "src/map/if/if.h"
+#include "src/aig/aig/aig.h"
+#include "src/aig/gia/gia.h"
+#include "src/proof/ssw/ssw.h"
+#include "src/proof/fra/fra.h"
+//#include "src/aig/nwk/nwkMerge.h"
+//#include "src/aig/ntl/ntlnwk.h"
+#include "src/misc/ext/ext.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_HEADER_START
@@ -89,12 +90,6 @@ struct Abc_Frame_t_
void * pLibVer; // the current Verilog library
// new code
- Ntl_Man_t * pAbc8Ntl; // the current design
- Nwk_Man_t * pAbc8Nwk; // the current mapped network
- Aig_Man_t * pAbc8Aig; // the current AIG
- If_Lib_t * pAbc8Lib; // the current LUT library
- If_Lib_t * pAbc85Lib; // the current LUT library
-
Gia_Man_t * pGia;
Gia_Man_t * pGia2;
Abc_Cex_t * pCex;
diff --git a/src/base/main/mainLib.c b/src/base/main/mainLib.c
index 39078ed9..83bae04f 100644
--- a/src/base/main/mainLib.c
+++ b/src/base/main/mainLib.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "mainInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/main/mainMC.c b/src/base/main/mainMC.c
index 5e77db57..6d9f4c73 100644
--- a/src/base/main/mainMC.c
+++ b/src/base/main/mainMC.c
@@ -19,10 +19,10 @@
***********************************************************************/
#include "mainInt.h"
-#include "aig.h"
-#include "saig.h"
-#include "fra.h"
-#include "ioa.h"
+#include "aig/aig/aig.h"
+#include "aig/saig/saig.h"
+#include "aig/fra/fra.h"
+#include "aig/ioa/ioa.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/main/mainUtils.c b/src/base/main/mainUtils.c
index c849a53d..e263bc94 100644
--- a/src/base/main/mainUtils.c
+++ b/src/base/main/mainUtils.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "mainInt.h"
#ifndef _WIN32
diff --git a/src/base/seq/module.make b/src/base/seq/module.make
deleted file mode 100644
index c7716180..00000000
--- a/src/base/seq/module.make
+++ /dev/null
@@ -1,14 +0,0 @@
-SRC += src/base/seq/seqAigCore.c \
- src/base/seq/seqAigIter.c \
- src/base/seq/seqCreate.c \
- src/base/seq/seqFpgaCore.c \
- src/base/seq/seqFpgaIter.c \
- src/base/seq/seqLatch.c \
- src/base/seq/seqMan.c \
- src/base/seq/seqMapCore.c \
- src/base/seq/seqMapIter.c \
- src/base/seq/seqMaxMeanCycle.c \
- src/base/seq/seqRetCore.c \
- src/base/seq/seqRetIter.c \
- src/base/seq/seqShare.c \
- src/base/seq/seqUtil.c
diff --git a/src/base/seq/seq.h b/src/base/seq/seq.h
deleted file mode 100644
index 7faefe19..00000000
--- a/src/base/seq/seq.h
+++ /dev/null
@@ -1,105 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seq.h]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [External declarations.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seq.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __SEQ_H__
-#define __SEQ_H__
-
-
-////////////////////////////////////////////////////////////////////////
-/// INCLUDES ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// PARAMETERS ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// BASIC TYPES ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Abc_Seq_t_ Abc_Seq_t;
-
-////////////////////////////////////////////////////////////////////////
-/// MACRO DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== seqAigCore.c ===========================================================*/
-extern void Seq_NtkSeqRetimeDelay( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int fVerbose );
-extern void Seq_NtkSeqRetimeForward( Abc_Ntk_t * pNtk, int fInitial, int fVerbose );
-extern void Seq_NtkSeqRetimeBackward( Abc_Ntk_t * pNtk, int fInitial, int fVerbose );
-/*=== seqFpgaCore.c ===============================================================*/
-extern Abc_Ntk_t * Seq_NtkFpgaMapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose );
-/*=== seqMapCore.c ===============================================================*/
-extern Abc_Ntk_t * Seq_MapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose );
-/*=== seqRetCore.c ===========================================================*/
-extern Abc_Ntk_t * Seq_NtkRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int fVerbose );
-/*=== seqLatch.c ===============================================================*/
-extern void Seq_NodeDupLats( Abc_Obj_t * pObjNew, Abc_Obj_t * pObj, int Edge );
-extern int Seq_NodeCompareLats( Abc_Obj_t * pObj1, int Edge1, Abc_Obj_t * pObj2, int Edge2 );
-/*=== seqMan.c ===============================================================*/
-extern Abc_Seq_t * Seq_Create( Abc_Ntk_t * pNtk );
-extern void Seq_Resize( Abc_Seq_t * p, int nMaxId );
-extern void Seq_Delete( Abc_Seq_t * p );
-/*=== seqMaxMeanCycle.c ======================================================*/
-extern float Seq_NtkHoward( Abc_Ntk_t * pNtk, int fVerbose );
-extern void Seq_NtkSkewForward( Abc_Ntk_t * pNtk, float period, int fMinimize );
-/*=== abcSeq.c ===============================================================*/
-extern Abc_Ntk_t * Abc_NtkAigToSeq( Abc_Ntk_t * pNtk );
-extern Abc_Ntk_t * Abc_NtkSeqToLogicSop( Abc_Ntk_t * pNtk );
-extern int Abc_NtkSeqCheck( Abc_Ntk_t * pNtk );
-/*=== seqShare.c =============================================================*/
-extern void Seq_NtkShareFanouts( Abc_Ntk_t * pNtk );
-extern void Seq_NtkShareLatches( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk );
-extern void Seq_NtkShareLatchesMapping( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, Vec_Ptr_t * vMapAnds, int fFpga );
-extern void Seq_NtkShareLatchesClean( Abc_Ntk_t * pNtk );
-/*=== seqUtil.c ==============================================================*/
-extern char * Seq_ObjFaninGetInitPrintable( Abc_Obj_t * pObj, int Edge );
-extern void Seq_NtkLatchSetValues( Abc_Ntk_t * pNtk, Abc_InitType_t Init );
-extern int Seq_NtkLatchNum( Abc_Ntk_t * pNtk );
-extern int Seq_NtkLatchNumMax( Abc_Ntk_t * pNtk );
-extern int Seq_NtkLatchNumShared( Abc_Ntk_t * pNtk );
-extern void Seq_NtkLatchGetInitNums( Abc_Ntk_t * pNtk, int * pInits );
-extern int Seq_NtkLatchGetEqualFaninNum( Abc_Ntk_t * pNtk );
-extern int Seq_NtkCountNodesAboveLimit( Abc_Ntk_t * pNtk, int Limit );
-extern int Seq_MapComputeAreaFlows( Abc_Ntk_t * pNtk, int fVerbose );
-extern Vec_Ptr_t * Seq_NtkReachNodes( Abc_Ntk_t * pNtk, int fFromPos );
-extern int Seq_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/base/seq/seqAigCore.c b/src/base/seq/seqAigCore.c
deleted file mode 100644
index ce4563f9..00000000
--- a/src/base/seq/seqAigCore.c
+++ /dev/null
@@ -1,981 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqRetCore.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [The core of retiming procedures.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqRetCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/*
- Retiming can be represented in three equivalent forms:
- - as a set of integer lags for each node (array of chars by node ID)
- - as a set of node numbers with lag for each, fwd and bwd (two arrays of Seq_RetStep_t_)
- - as a set of latch moves over the nodes, fwd and bwd (two arrays of node pointers Abc_Obj_t *)
-*/
-
-static void Abc_ObjRetimeForward( Abc_Obj_t * pObj );
-static int Abc_ObjRetimeBackward( Abc_Obj_t * pObj, Abc_Ntk_t * pNtk, stmm_table * tTable, Vec_Int_t * vValues );
-static void Abc_ObjRetimeBackwardUpdateEdge( Abc_Obj_t * pObj, int Edge, stmm_table * tTable );
-static void Abc_NtkRetimeSetInitialValues( Abc_Ntk_t * pNtk, stmm_table * tTable, int * pModel );
-
-static void Seq_NtkImplementRetimingForward( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMoves );
-static int Seq_NtkImplementRetimingBackward( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMoves, int fVerbose );
-static void Abc_ObjRetimeForward( Abc_Obj_t * pObj );
-static int Abc_ObjRetimeBackward( Abc_Obj_t * pObj, Abc_Ntk_t * pNtk, stmm_table * tTable, Vec_Int_t * vValues );
-static void Abc_ObjRetimeBackwardUpdateEdge( Abc_Obj_t * pObj, int Edge, stmm_table * tTable );
-static void Abc_NtkRetimeSetInitialValues( Abc_Ntk_t * pNtk, stmm_table * tTable, int * pModel );
-
-static Vec_Ptr_t * Abc_NtkUtilRetimingTry( Abc_Ntk_t * pNtk, int fForward );
-static Vec_Ptr_t * Abc_NtkUtilRetimingGetMoves( Abc_Ntk_t * pNtk, Vec_Int_t * vSteps, int fForward );
-static Vec_Int_t * Abc_NtkUtilRetimingSplit( Vec_Str_t * vLags, int fForward );
-static void Abc_ObjRetimeForwardTry( Abc_Obj_t * pObj, int nLatches );
-static void Abc_ObjRetimeBackwardTry( Abc_Obj_t * pObj, int nLatches );
-
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Performs performs optimal delay retiming.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkSeqRetimeDelay( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- int RetValue;
- if ( !fInitial )
- Seq_NtkLatchSetValues( pNtk, ABC_INIT_DC );
- // get the retiming lags
- p->nMaxIters = nMaxIters;
- if ( !Seq_AigRetimeDelayLags( pNtk, fVerbose ) )
- return;
- // implement this retiming
- RetValue = Seq_NtkImplementRetiming( pNtk, p->vLags, fVerbose );
- if ( RetValue == 0 )
- printf( "Retiming completed but initial state computation has failed.\n" );
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs most forward retiming.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkSeqRetimeForward( Abc_Ntk_t * pNtk, int fInitial, int fVerbose )
-{
- Vec_Ptr_t * vMoves;
- Abc_Obj_t * pNode;
- int i;
- if ( !fInitial )
- Seq_NtkLatchSetValues( pNtk, ABC_INIT_DC );
- // get the forward moves
- vMoves = Abc_NtkUtilRetimingTry( pNtk, 1 );
- // undo the forward moves
- Vec_PtrForEachEntryReverse( Abc_Obj_t *, vMoves, pNode, i )
- Abc_ObjRetimeBackwardTry( pNode, 1 );
- // implement this forward retiming
- Seq_NtkImplementRetimingForward( pNtk, vMoves );
- Vec_PtrFree( vMoves );
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs most backward retiming.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkSeqRetimeBackward( Abc_Ntk_t * pNtk, int fInitial, int fVerbose )
-{
- Vec_Ptr_t * vMoves;
- Abc_Obj_t * pNode;
- int i, RetValue;
- if ( !fInitial )
- Seq_NtkLatchSetValues( pNtk, ABC_INIT_DC );
- // get the backward moves
- vMoves = Abc_NtkUtilRetimingTry( pNtk, 0 );
- // undo the backward moves
- Vec_PtrForEachEntryReverse( Abc_Obj_t *, vMoves, pNode, i )
- Abc_ObjRetimeForwardTry( pNode, 1 );
- // implement this backward retiming
- RetValue = Seq_NtkImplementRetimingBackward( pNtk, vMoves, fVerbose );
- Vec_PtrFree( vMoves );
- if ( RetValue == 0 )
- printf( "Retiming completed but initial state computation has failed.\n" );
-}
-
-
-
-
-/**Function*************************************************************
-
- Synopsis [Implements the retiming on the sequential AIG.]
-
- Description [Split the retiming into forward and backward.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkImplementRetiming( Abc_Ntk_t * pNtk, Vec_Str_t * vLags, int fVerbose )
-{
- Vec_Int_t * vSteps;
- Vec_Ptr_t * vMoves;
- int RetValue;
-
- // forward retiming
- vSteps = Abc_NtkUtilRetimingSplit( vLags, 1 );
- // translate each set of steps into moves
- if ( fVerbose )
- printf( "The number of forward steps = %6d.\n", Vec_IntSize(vSteps) );
- vMoves = Abc_NtkUtilRetimingGetMoves( pNtk, vSteps, 1 );
- if ( fVerbose )
- printf( "The number of forward moves = %6d.\n", Vec_PtrSize(vMoves) );
- // implement this retiming
- Seq_NtkImplementRetimingForward( pNtk, vMoves );
- Vec_IntFree( vSteps );
- Vec_PtrFree( vMoves );
-
- // backward retiming
- vSteps = Abc_NtkUtilRetimingSplit( vLags, 0 );
- // translate each set of steps into moves
- if ( fVerbose )
- printf( "The number of backward steps = %6d.\n", Vec_IntSize(vSteps) );
- vMoves = Abc_NtkUtilRetimingGetMoves( pNtk, vSteps, 0 );
- if ( fVerbose )
- printf( "The number of backward moves = %6d.\n", Vec_PtrSize(vMoves) );
- // implement this retiming
- RetValue = Seq_NtkImplementRetimingBackward( pNtk, vMoves, fVerbose );
- Vec_IntFree( vSteps );
- Vec_PtrFree( vMoves );
- return RetValue;
-}
-
-/**Function*************************************************************
-
- Synopsis [Implements the given retiming on the sequential AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkImplementRetimingForward( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMoves )
-{
- Abc_Obj_t * pNode;
- int i;
- Vec_PtrForEachEntry( Abc_Obj_t *, vMoves, pNode, i )
- Abc_ObjRetimeForward( pNode );
-}
-
-/**Function*************************************************************
-
- Synopsis [Retimes node forward by one latch.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_ObjRetimeForward( Abc_Obj_t * pObj )
-{
- Abc_Obj_t * pFanout;
- int Init0, Init1, Init, i;
- assert( Abc_ObjFaninNum(pObj) == 2 );
- assert( Seq_ObjFaninL0(pObj) >= 1 );
- assert( Seq_ObjFaninL1(pObj) >= 1 );
- // remove the init values from the fanins
- Init0 = Seq_NodeDeleteFirst( pObj, 0 );
- Init1 = Seq_NodeDeleteFirst( pObj, 1 );
- assert( Init0 != ABC_INIT_NONE );
- assert( Init1 != ABC_INIT_NONE );
- // take into account the complements in the node
- if ( Abc_ObjFaninC0(pObj) )
- {
- if ( Init0 == ABC_INIT_ZERO )
- Init0 = ABC_INIT_ONE;
- else if ( Init0 == ABC_INIT_ONE )
- Init0 = ABC_INIT_ZERO;
- }
- if ( Abc_ObjFaninC1(pObj) )
- {
- if ( Init1 == ABC_INIT_ZERO )
- Init1 = ABC_INIT_ONE;
- else if ( Init1 == ABC_INIT_ONE )
- Init1 = ABC_INIT_ZERO;
- }
- // compute the value at the output of the node
- if ( Init0 == ABC_INIT_ZERO || Init1 == ABC_INIT_ZERO )
- Init = ABC_INIT_ZERO;
- else if ( Init0 == ABC_INIT_ONE && Init1 == ABC_INIT_ONE )
- Init = ABC_INIT_ONE;
- else
- Init = ABC_INIT_DC;
-
- // make sure the label is clean
- Abc_ObjForEachFanout( pObj, pFanout, i )
- assert( pFanout->fMarkC == 0 );
- // add the init values to the fanouts
- Abc_ObjForEachFanout( pObj, pFanout, i )
- {
- if ( pFanout->fMarkC )
- continue;
- pFanout->fMarkC = 1;
- if ( Abc_ObjFaninId0(pFanout) != Abc_ObjFaninId1(pFanout) )
- Seq_NodeInsertLast( pFanout, Abc_ObjFanoutEdgeNum(pObj, pFanout), Init );
- else
- {
- assert( Abc_ObjFanin0(pFanout) == pObj );
- Seq_NodeInsertLast( pFanout, 0, Init );
- Seq_NodeInsertLast( pFanout, 1, Init );
- }
- }
- // clean the label
- Abc_ObjForEachFanout( pObj, pFanout, i )
- pFanout->fMarkC = 0;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Implements the given retiming on the sequential AIG.]
-
- Description [Returns 0 of initial state computation fails.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkImplementRetimingBackward( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMoves, int fVerbose )
-{
- Seq_RetEdge_t RetEdge;
- stmm_table * tTable;
- stmm_generator * gen;
- Vec_Int_t * vValues;
- Abc_Ntk_t * pNtkProb, * pNtkMiter, * pNtkCnf;
- Abc_Obj_t * pNode, * pNodeNew;
- int * pModel, RetValue, i, clk;
-
- // return if the retiming is trivial
- if ( Vec_PtrSize(vMoves) == 0 )
- return 1;
-
- // create the network for the initial state computation
- // start the table and the array of PO values
- pNtkProb = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP, 1 );
- tTable = stmm_init_table( stmm_numcmp, stmm_numhash );
- vValues = Vec_IntAlloc( 100 );
-
- // perform the backward moves and build the network for initial state computation
- RetValue = 0;
- Vec_PtrForEachEntry( Abc_Obj_t *, vMoves, pNode, i )
- RetValue |= Abc_ObjRetimeBackward( pNode, pNtkProb, tTable, vValues );
-
- // add the PIs corresponding to the white spots
- stmm_foreach_item( tTable, gen, (char **)&RetEdge, (char **)&pNodeNew )
- Abc_ObjAddFanin( pNodeNew, Abc_NtkCreatePi(pNtkProb) );
-
- // add the PI/PO names
- Abc_NtkAddDummyPiNames( pNtkProb );
- Abc_NtkAddDummyPoNames( pNtkProb );
-
- // make sure everything is okay with the network structure
- if ( !Abc_NtkDoCheck( pNtkProb ) )
- {
- printf( "Seq_NtkImplementRetimingBackward: The internal network check has failed.\n" );
- Abc_NtkRetimeSetInitialValues( pNtk, tTable, NULL );
- Abc_NtkDelete( pNtkProb );
- stmm_free_table( tTable );
- Vec_IntFree( vValues );
- return 0;
- }
-
- // check if conflict is found
- if ( RetValue )
- {
- printf( "Seq_NtkImplementRetimingBackward: A top level conflict is detected. DC latch values are used.\n" );
- Abc_NtkRetimeSetInitialValues( pNtk, tTable, NULL );
- Abc_NtkDelete( pNtkProb );
- stmm_free_table( tTable );
- Vec_IntFree( vValues );
- return 0;
- }
-
- // get the miter cone
- pNtkMiter = Abc_NtkCreateTarget( pNtkProb, pNtkProb->vCos, vValues );
- Abc_NtkDelete( pNtkProb );
- Vec_IntFree( vValues );
-
- if ( fVerbose )
- printf( "The number of ANDs in the AIG = %5d.\n", Abc_NtkNodeNum(pNtkMiter) );
-
- // transform the miter into a logic network for efficient CNF construction
-// pNtkCnf = Abc_Ntk_Renode( pNtkMiter, 0, 100, 1, 0, 0 );
-// Abc_NtkDelete( pNtkMiter );
- pNtkCnf = pNtkMiter;
-
- // solve the miter
-clk = clock();
-// RetValue = Abc_NtkMiterSat_OldAndRusty( pNtkCnf, 30, 0 );
- RetValue = Abc_NtkMiterSat( pNtkCnf, (sint64)500000, (sint64)50000000, 0, 0, NULL, NULL );
-if ( fVerbose )
-if ( clock() - clk > 100 )
-{
-PRT( "SAT solving time", clock() - clk );
-}
- pModel = pNtkCnf->pModel; pNtkCnf->pModel = NULL;
- Abc_NtkDelete( pNtkCnf );
-
- // analyze the result
- if ( RetValue == -1 || RetValue == 1 )
- {
- Abc_NtkRetimeSetInitialValues( pNtk, tTable, NULL );
- if ( RetValue == 1 )
- printf( "Seq_NtkImplementRetimingBackward: The problem is unsatisfiable. DC latch values are used.\n" );
- else
- printf( "Seq_NtkImplementRetimingBackward: The SAT problem timed out. DC latch values are used.\n" );
- stmm_free_table( tTable );
- return 0;
- }
-
- // set the values of the latches
- Abc_NtkRetimeSetInitialValues( pNtk, tTable, pModel );
- stmm_free_table( tTable );
- free( pModel );
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Retimes node backward by one latch.]
-
- Description [Constructs the problem for initial state computation.
- Returns 1 if the conflict is found.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_ObjRetimeBackward( Abc_Obj_t * pObj, Abc_Ntk_t * pNtkNew, stmm_table * tTable, Vec_Int_t * vValues )
-{
- Abc_Obj_t * pFanout;
- Abc_InitType_t Init, Value;
- Seq_RetEdge_t RetEdge;
- Abc_Obj_t * pNodeNew, * pFanoutNew, * pBuffer;
- int i, Edge, fMet0, fMet1, fMetN;
-
- // make sure the node can be retimed
- assert( Seq_ObjFanoutLMin(pObj) > 0 );
- // get the fanout values
- fMet0 = fMet1 = fMetN = 0;
- Abc_ObjForEachFanout( pObj, pFanout, i )
- {
- if ( Abc_ObjFaninId0(pFanout) == pObj->Id )
- {
- Init = Seq_NodeGetInitLast( pFanout, 0 );
- if ( Init == ABC_INIT_ZERO )
- fMet0 = 1;
- else if ( Init == ABC_INIT_ONE )
- fMet1 = 1;
- else if ( Init == ABC_INIT_NONE )
- fMetN = 1;
- }
- if ( Abc_ObjFaninId1(pFanout) == pObj->Id )
- {
- Init = Seq_NodeGetInitLast( pFanout, 1 );
- if ( Init == ABC_INIT_ZERO )
- fMet0 = 1;
- else if ( Init == ABC_INIT_ONE )
- fMet1 = 1;
- else if ( Init == ABC_INIT_NONE )
- fMetN = 1;
- }
- }
-
- // consider the case when all fanout latches have don't-care values
- // the new values on the fanin edges will be don't-cares
- if ( !fMet0 && !fMet1 && !fMetN )
- {
- // make sure the label is clean
- Abc_ObjForEachFanout( pObj, pFanout, i )
- assert( pFanout->fMarkC == 0 );
- // update the fanout edges
- Abc_ObjForEachFanout( pObj, pFanout, i )
- {
- if ( pFanout->fMarkC )
- continue;
- pFanout->fMarkC = 1;
- if ( Abc_ObjFaninId0(pFanout) == pObj->Id )
- Seq_NodeDeleteLast( pFanout, 0 );
- if ( Abc_ObjFaninId1(pFanout) == pObj->Id )
- Seq_NodeDeleteLast( pFanout, 1 );
- }
- // clean the label
- Abc_ObjForEachFanout( pObj, pFanout, i )
- pFanout->fMarkC = 0;
- // update the fanin edges
- Abc_ObjRetimeBackwardUpdateEdge( pObj, 0, tTable );
- Abc_ObjRetimeBackwardUpdateEdge( pObj, 1, tTable );
- Seq_NodeInsertFirst( pObj, 0, ABC_INIT_DC );
- Seq_NodeInsertFirst( pObj, 1, ABC_INIT_DC );
- return 0;
- }
- // the initial values on the fanout edges contain 0, 1, or unknown
- // the new values on the fanin edges will be unknown
-
- // add new AND-gate to the network
- pNodeNew = Abc_NtkCreateNode( pNtkNew );
- pNodeNew->pData = Abc_SopCreateAnd2( (Extra_MmFlex_t *)pNtkNew->pManFunc, Abc_ObjFaninC0(pObj), Abc_ObjFaninC1(pObj) );
-
- // add PO fanouts if any
- if ( fMet0 )
- {
- Abc_ObjAddFanin( Abc_NtkCreatePo(pNtkNew), pNodeNew );
- Vec_IntPush( vValues, 0 );
- }
- if ( fMet1 )
- {
- Abc_ObjAddFanin( Abc_NtkCreatePo(pNtkNew), pNodeNew );
- Vec_IntPush( vValues, 1 );
- }
-
- // make sure the label is clean
- Abc_ObjForEachFanout( pObj, pFanout, i )
- assert( pFanout->fMarkC == 0 );
- // perform the changes
- Abc_ObjForEachFanout( pObj, pFanout, i )
- {
- if ( pFanout->fMarkC )
- continue;
- pFanout->fMarkC = 1;
- if ( Abc_ObjFaninId0(pFanout) == pObj->Id )
- {
- Edge = 0;
- Value = Seq_NodeDeleteLast( pFanout, Edge );
- if ( Value == ABC_INIT_NONE )
- {
- // value is unknown, remove it from the table
- RetEdge.iNode = pFanout->Id;
- RetEdge.iEdge = Edge;
- RetEdge.iLatch = Seq_ObjFaninL( pFanout, Edge ); // after edge is removed
- if ( !stmm_delete( tTable, (char **)&RetEdge, (char **)&pFanoutNew ) )
- assert( 0 );
- // create the fanout of the AND gate
- Abc_ObjAddFanin( pFanoutNew, pNodeNew );
- }
- }
- if ( Abc_ObjFaninId1(pFanout) == pObj->Id )
- {
- Edge = 1;
- Value = Seq_NodeDeleteLast( pFanout, Edge );
- if ( Value == ABC_INIT_NONE )
- {
- // value is unknown, remove it from the table
- RetEdge.iNode = pFanout->Id;
- RetEdge.iEdge = Edge;
- RetEdge.iLatch = Seq_ObjFaninL( pFanout, Edge ); // after edge is removed
- if ( !stmm_delete( tTable, (char **)&RetEdge, (char **)&pFanoutNew ) )
- assert( 0 );
- // create the fanout of the AND gate
- Abc_ObjAddFanin( pFanoutNew, pNodeNew );
- }
- }
- }
- // clean the label
- Abc_ObjForEachFanout( pObj, pFanout, i )
- pFanout->fMarkC = 0;
-
- // update the fanin edges
- Abc_ObjRetimeBackwardUpdateEdge( pObj, 0, tTable );
- Abc_ObjRetimeBackwardUpdateEdge( pObj, 1, tTable );
- Seq_NodeInsertFirst( pObj, 0, ABC_INIT_NONE );
- Seq_NodeInsertFirst( pObj, 1, ABC_INIT_NONE );
-
- // add the buffer
- pBuffer = Abc_NtkCreateNode( pNtkNew );
- pBuffer->pData = Abc_SopCreateBuf( (Extra_MmFlex_t *)pNtkNew->pManFunc );
- Abc_ObjAddFanin( pNodeNew, pBuffer );
- // point to it from the table
- RetEdge.iNode = pObj->Id;
- RetEdge.iEdge = 0;
- RetEdge.iLatch = 0;
- if ( stmm_insert( tTable, (char *)Seq_RetEdge2Int(RetEdge), (char *)pBuffer ) )
- assert( 0 );
-
- // add the buffer
- pBuffer = Abc_NtkCreateNode( pNtkNew );
- pBuffer->pData = Abc_SopCreateBuf( (Extra_MmFlex_t *)pNtkNew->pManFunc );
- Abc_ObjAddFanin( pNodeNew, pBuffer );
- // point to it from the table
- RetEdge.iNode = pObj->Id;
- RetEdge.iEdge = 1;
- RetEdge.iLatch = 0;
- if ( stmm_insert( tTable, (char *)Seq_RetEdge2Int(RetEdge), (char *)pBuffer ) )
- assert( 0 );
-
- // report conflict is found
- return fMet0 && fMet1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Generates the printable edge label with the initial state.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_ObjRetimeBackwardUpdateEdge( Abc_Obj_t * pObj, int Edge, stmm_table * tTable )
-{
- Abc_Obj_t * pFanoutNew;
- Seq_RetEdge_t RetEdge;
- Abc_InitType_t Init;
- int nLatches, i;
-
- // get the number of latches on the edge
- nLatches = Seq_ObjFaninL( pObj, Edge );
- for ( i = nLatches - 1; i >= 0; i-- )
- {
- // get the value of this latch
- Init = Seq_NodeGetInitOne( pObj, Edge, i );
- if ( Init != ABC_INIT_NONE )
- continue;
- // get the retiming edge
- RetEdge.iNode = pObj->Id;
- RetEdge.iEdge = Edge;
- RetEdge.iLatch = i;
- // remove entry from table and add it with a different key
- if ( !stmm_delete( tTable, (char **)&RetEdge, (char **)&pFanoutNew ) )
- assert( 0 );
- RetEdge.iLatch++;
- if ( stmm_insert( tTable, (char *)Seq_RetEdge2Int(RetEdge), (char *)pFanoutNew ) )
- assert( 0 );
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Sets the initial values.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_NtkRetimeSetInitialValues( Abc_Ntk_t * pNtk, stmm_table * tTable, int * pModel )
-{
- Abc_Obj_t * pNode;
- stmm_generator * gen;
- Seq_RetEdge_t RetEdge;
- Abc_InitType_t Init;
- int i;
-
- i = 0;
- stmm_foreach_item( tTable, gen, (char **)&RetEdge, NULL )
- {
- pNode = Abc_NtkObj( pNtk, RetEdge.iNode );
- Init = pModel? (pModel[i]? ABC_INIT_ONE : ABC_INIT_ZERO) : ABC_INIT_DC;
- Seq_NodeSetInitOne( pNode, RetEdge.iEdge, RetEdge.iLatch, Init );
- i++;
- }
-}
-
-
-
-/**Function*************************************************************
-
- Synopsis [Performs forward retiming of the sequential AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Abc_NtkUtilRetimingTry( Abc_Ntk_t * pNtk, int fForward )
-{
- Vec_Ptr_t * vNodes, * vMoves;
- Abc_Obj_t * pNode, * pFanout, * pFanin;
- int i, k, nLatches;
- assert( Abc_NtkIsSeq( pNtk ) );
- // assume that all nodes can be retimed
- vNodes = Vec_PtrAlloc( 100 );
- Abc_AigForEachAnd( pNtk, pNode, i )
- {
- Vec_PtrPush( vNodes, pNode );
- pNode->fMarkA = 1;
- }
- // process the nodes
- vMoves = Vec_PtrAlloc( 100 );
- Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pNode, i )
- {
-// printf( "(%d,%d) ", Seq_ObjFaninL0(pNode), Seq_ObjFaninL0(pNode) );
- // unmark the node as processed
- pNode->fMarkA = 0;
- // get the number of latches to retime
- if ( fForward )
- nLatches = Seq_ObjFaninLMin(pNode);
- else
- nLatches = Seq_ObjFanoutLMin(pNode);
- if ( nLatches == 0 )
- continue;
- assert( nLatches > 0 );
- // retime the latches forward
- if ( fForward )
- Abc_ObjRetimeForwardTry( pNode, nLatches );
- else
- Abc_ObjRetimeBackwardTry( pNode, nLatches );
- // write the moves
- for ( k = 0; k < nLatches; k++ )
- Vec_PtrPush( vMoves, pNode );
- // schedule fanouts for updating
- if ( fForward )
- {
- Abc_ObjForEachFanout( pNode, pFanout, k )
- {
- if ( Abc_ObjFaninNum(pFanout) != 2 || pFanout->fMarkA )
- continue;
- pFanout->fMarkA = 1;
- Vec_PtrPush( vNodes, pFanout );
- }
- }
- else
- {
- Abc_ObjForEachFanin( pNode, pFanin, k )
- {
- if ( Abc_ObjFaninNum(pFanin) != 2 || pFanin->fMarkA )
- continue;
- pFanin->fMarkA = 1;
- Vec_PtrPush( vNodes, pFanin );
- }
- }
- }
- Vec_PtrFree( vNodes );
- // make sure the marks are clean the the retiming is final
- Abc_AigForEachAnd( pNtk, pNode, i )
- {
- assert( pNode->fMarkA == 0 );
- if ( fForward )
- assert( Seq_ObjFaninLMin(pNode) == 0 );
- else
- assert( Seq_ObjFanoutLMin(pNode) == 0 );
- }
- return vMoves;
-}
-
-/**Function*************************************************************
-
- Synopsis [Translates retiming steps into retiming moves.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Abc_NtkUtilRetimingGetMoves( Abc_Ntk_t * pNtk, Vec_Int_t * vSteps, int fForward )
-{
- Seq_RetStep_t RetStep;
- Vec_Ptr_t * vMoves;
- Abc_Obj_t * pNode;
- int i, k, iNode, nLatches, Number;
- int fChange;
- assert( Abc_NtkIsSeq( pNtk ) );
-
-/*
- // try implementing all the moves at once
- Vec_IntForEachEntry( vSteps, Number, i )
- {
- // get the retiming step
- RetStep = Seq_Int2RetStep( Number );
- // get the node to be retimed
- pNode = Abc_NtkObj( pNtk, RetStep.iNode );
- assert( RetStep.nLatches > 0 );
- nLatches = RetStep.nLatches;
-
- if ( fForward )
- Abc_ObjRetimeForwardTry( pNode, nLatches );
- else
- Abc_ObjRetimeBackwardTry( pNode, nLatches );
- }
- // now look if any node has wrong number of latches
- Abc_AigForEachAnd( pNtk, pNode, i )
- {
- if ( Seq_ObjFaninL0(pNode) < 0 )
- printf( "Wrong 0node %d.\n", pNode->Id );
- if ( Seq_ObjFaninL1(pNode) < 0 )
- printf( "Wrong 1node %d.\n", pNode->Id );
- }
- // try implementing all the moves at once
- Vec_IntForEachEntry( vSteps, Number, i )
- {
- // get the retiming step
- RetStep = Seq_Int2RetStep( Number );
- // get the node to be retimed
- pNode = Abc_NtkObj( pNtk, RetStep.iNode );
- assert( RetStep.nLatches > 0 );
- nLatches = RetStep.nLatches;
-
- if ( !fForward )
- Abc_ObjRetimeForwardTry( pNode, nLatches );
- else
- Abc_ObjRetimeBackwardTry( pNode, nLatches );
- }
-*/
-
- // process the nodes
- vMoves = Vec_PtrAlloc( 100 );
- while ( Vec_IntSize(vSteps) > 0 )
- {
- iNode = 0;
- fChange = 0;
- Vec_IntForEachEntry( vSteps, Number, i )
- {
- // get the retiming step
- RetStep = Seq_Int2RetStep( Number );
- // get the node to be retimed
- pNode = Abc_NtkObj( pNtk, RetStep.iNode );
- assert( RetStep.nLatches > 0 );
- // get the number of latches that can be retimed
- if ( fForward )
- nLatches = Seq_ObjFaninLMin(pNode);
- else
- nLatches = Seq_ObjFanoutLMin(pNode);
- if ( nLatches == 0 )
- {
- Vec_IntWriteEntry( vSteps, iNode++, Seq_RetStep2Int(RetStep) );
- continue;
- }
- assert( nLatches > 0 );
- fChange = 1;
- // get the number of latches to be retimed over this node
- nLatches = ABC_MIN( nLatches, (int)RetStep.nLatches );
- // retime the latches forward
- if ( fForward )
- Abc_ObjRetimeForwardTry( pNode, nLatches );
- else
- Abc_ObjRetimeBackwardTry( pNode, nLatches );
- // write the moves
- for ( k = 0; k < nLatches; k++ )
- Vec_PtrPush( vMoves, pNode );
- // subtract the retiming performed
- RetStep.nLatches -= nLatches;
- // store the node if it is not retimed completely
- if ( RetStep.nLatches > 0 )
- Vec_IntWriteEntry( vSteps, iNode++, Seq_RetStep2Int(RetStep) );
- }
- // reduce the array
- Vec_IntShrink( vSteps, iNode );
- if ( !fChange )
- {
- printf( "Warning: %d strange steps (a minor bug to be fixed later).\n", Vec_IntSize(vSteps) );
-/*
- Vec_IntForEachEntry( vSteps, Number, i )
- {
- RetStep = Seq_Int2RetStep( Number );
- printf( "%d(%d) ", RetStep.iNode, RetStep.nLatches );
- }
- printf( "\n" );
-*/
- break;
- }
- }
- // undo the tentative retiming
- if ( fForward )
- {
- Vec_PtrForEachEntryReverse( Abc_Obj_t *, vMoves, pNode, i )
- Abc_ObjRetimeBackwardTry( pNode, 1 );
- }
- else
- {
- Vec_PtrForEachEntryReverse( Abc_Obj_t *, vMoves, pNode, i )
- Abc_ObjRetimeForwardTry( pNode, 1 );
- }
- return vMoves;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Splits retiming into forward and backward.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Int_t * Abc_NtkUtilRetimingSplit( Vec_Str_t * vLags, int fForward )
-{
- Vec_Int_t * vNodes;
- Seq_RetStep_t RetStep;
- int Value, i;
- vNodes = Vec_IntAlloc( 100 );
- Vec_StrForEachEntry( vLags, Value, i )
- {
- if ( Value < 0 && fForward )
- {
- RetStep.iNode = i;
- RetStep.nLatches = -Value;
- Vec_IntPush( vNodes, Seq_RetStep2Int(RetStep) );
- }
- else if ( Value > 0 && !fForward )
- {
- RetStep.iNode = i;
- RetStep.nLatches = Value;
- Vec_IntPush( vNodes, Seq_RetStep2Int(RetStep) );
- }
- }
- return vNodes;
-}
-
-/**Function*************************************************************
-
- Synopsis [Retime node forward without initial states.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_ObjRetimeForwardTry( Abc_Obj_t * pObj, int nLatches )
-{
- Abc_Obj_t * pFanout;
- int i;
- // make sure it is an AND gate
- assert( Abc_ObjFaninNum(pObj) == 2 );
- // make sure it has enough latches
-// assert( Seq_ObjFaninL0(pObj) >= nLatches );
-// assert( Seq_ObjFaninL1(pObj) >= nLatches );
- // subtract these latches on the fanin side
- Seq_ObjAddFaninL0( pObj, -nLatches );
- Seq_ObjAddFaninL1( pObj, -nLatches );
- // make sure the label is clean
- Abc_ObjForEachFanout( pObj, pFanout, i )
- assert( pFanout->fMarkC == 0 );
- // add these latches on the fanout side
- Abc_ObjForEachFanout( pObj, pFanout, i )
- {
- if ( pFanout->fMarkC )
- continue;
- pFanout->fMarkC = 1;
- if ( Abc_ObjFaninId0(pFanout) != Abc_ObjFaninId1(pFanout) )
- Seq_ObjAddFanoutL( pObj, pFanout, nLatches );
- else
- {
- assert( Abc_ObjFanin0(pFanout) == pObj );
- Seq_ObjAddFaninL0( pFanout, nLatches );
- Seq_ObjAddFaninL1( pFanout, nLatches );
- }
- }
- // clean the label
- Abc_ObjForEachFanout( pObj, pFanout, i )
- pFanout->fMarkC = 0;
-}
-
-/**Function*************************************************************
-
- Synopsis [Retime node backward without initial states.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_ObjRetimeBackwardTry( Abc_Obj_t * pObj, int nLatches )
-{
- Abc_Obj_t * pFanout;
- int i;
- // make sure it is an AND gate
- assert( Abc_ObjFaninNum(pObj) == 2 );
- // make sure the label is clean
- Abc_ObjForEachFanout( pObj, pFanout, i )
- assert( pFanout->fMarkC == 0 );
- // subtract these latches on the fanout side
- Abc_ObjForEachFanout( pObj, pFanout, i )
- {
- if ( pFanout->fMarkC )
- continue;
- pFanout->fMarkC = 1;
-// assert( Abc_ObjFanoutL(pObj, pFanout) >= nLatches );
- if ( Abc_ObjFaninId0(pFanout) != Abc_ObjFaninId1(pFanout) )
- Seq_ObjAddFanoutL( pObj, pFanout, -nLatches );
- else
- {
- assert( Abc_ObjFanin0(pFanout) == pObj );
- Seq_ObjAddFaninL0( pFanout, -nLatches );
- Seq_ObjAddFaninL1( pFanout, -nLatches );
- }
- }
- // clean the label
- Abc_ObjForEachFanout( pObj, pFanout, i )
- pFanout->fMarkC = 0;
- // add these latches on the fanin side
- Seq_ObjAddFaninL0( pObj, nLatches );
- Seq_ObjAddFaninL1( pObj, nLatches );
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqAigIter.c b/src/base/seq/seqAigIter.c
deleted file mode 100644
index b71312f7..00000000
--- a/src/base/seq/seqAigIter.c
+++ /dev/null
@@ -1,273 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqRetIter.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [The iterative L-Value computation for retiming procedures.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqRetIter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-// the internal procedures
-static int Seq_RetimeSearch_rec( Abc_Ntk_t * pNtk, int FiMin, int FiMax, int fVerbose );
-static int Seq_RetimeForPeriod( Abc_Ntk_t * pNtk, int Fi, int fVerbose );
-static int Seq_RetimeNodeUpdateLValue( Abc_Obj_t * pObj, int Fi );
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Retimes AIG for optimal delay using Pan's algorithm.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Abc_Obj_t * pNode;
- int i, FiMax, RetValue, clk, clkIter;
- char NodeLag;
-
- assert( Abc_NtkIsSeq( pNtk ) );
-
- // get the upper bound on the clock period
- FiMax = 2 + Seq_NtkLevelMax(pNtk);
-
- // make sure this clock period is feasible
- if ( !Seq_RetimeForPeriod( pNtk, FiMax, fVerbose ) )
- {
- Vec_StrFill( p->vLags, p->nSize, 0 );
- printf( "Error: The upper bound on the clock period cannot be computed.\n" );
- printf( "The reason for this error may be the presence in the circuit of logic\n" );
- printf( "that is not reachable from the PIs. Mapping/retiming is not performed.\n" );
- return 0;
- }
-
- // search for the optimal clock period between 0 and nLevelMax
-clk = clock();
- p->FiBestInt = Seq_RetimeSearch_rec( pNtk, 0, FiMax, fVerbose );
-clkIter = clock() - clk;
-
- // recompute the best l-values
- RetValue = Seq_RetimeForPeriod( pNtk, p->FiBestInt, fVerbose );
- assert( RetValue );
-
- // fix the problem with non-converged delays
- Abc_AigForEachAnd( pNtk, pNode, i )
- if ( Seq_NodeGetLValue(pNode) < -ABC_INFINITY/2 )
- Seq_NodeSetLValue( pNode, 0 );
-
- // write the retiming lags
- Vec_StrFill( p->vLags, p->nSize, 0 );
- Abc_AigForEachAnd( pNtk, pNode, i )
- {
- NodeLag = Seq_NodeComputeLag( Seq_NodeGetLValue(pNode), p->FiBestInt );
- Seq_NodeSetLag( pNode, NodeLag );
- }
-
- // print the result
- if ( fVerbose )
- printf( "The best clock period is %3d.\n", p->FiBestInt );
-
-/*
- printf( "lvalues and lags : " );
- Abc_AigForEachAnd( pNtk, pNode, i )
- printf( "%d=%d(%d) ", pNode->Id, Seq_NodeGetLValue(pNode), Seq_NodeGetLag(pNode) );
- printf( "\n" );
-*/
-/*
- {
- FILE * pTable;
- pTable = fopen( "stats.txt", "a+" );
- fprintf( pTable, "%s ", pNtk->pName );
- fprintf( pTable, "%d ", FiBest );
- fprintf( pTable, "\n" );
- fclose( pTable );
- }
-*/
-/*
- {
- FILE * pTable;
- pTable = fopen( "stats.txt", "a+" );
- fprintf( pTable, "%s ", pNtk->pName );
- fprintf( pTable, "%.2f ", (float)(p->timeCuts)/(float)(CLOCKS_PER_SEC) );
- fprintf( pTable, "%.2f ", (float)(clkIter)/(float)(CLOCKS_PER_SEC) );
- fprintf( pTable, "\n" );
- fclose( pTable );
- }
-*/
- return 1;
-
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs binary search for the optimal clock period.]
-
- Description [Assumes that FiMin is infeasible while FiMax is feasible.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_RetimeSearch_rec( Abc_Ntk_t * pNtk, int FiMin, int FiMax, int fVerbose )
-{
- int Median;
- assert( FiMin < FiMax );
- if ( FiMin + 1 == FiMax )
- return FiMax;
- Median = FiMin + (FiMax - FiMin)/2;
- if ( Seq_RetimeForPeriod( pNtk, Median, fVerbose ) )
- return Seq_RetimeSearch_rec( pNtk, FiMin, Median, fVerbose ); // Median is feasible
- else
- return Seq_RetimeSearch_rec( pNtk, Median, FiMax, fVerbose ); // Median is infeasible
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns 1 if retiming with this clock period is feasible.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_RetimeForPeriod( Abc_Ntk_t * pNtk, int Fi, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Abc_Obj_t * pObj;
- int i, c, RetValue, fChange, Counter;
- char * pReason = "";
-
- // set l-values of all nodes to be minus infinity
- Vec_IntFill( p->vLValues, p->nSize, -ABC_INFINITY );
-
- // set l-values of constants and PIs
- pObj = Abc_NtkObj( pNtk, 0 );
- Seq_NodeSetLValue( pObj, 0 );
- Abc_NtkForEachPi( pNtk, pObj, i )
- Seq_NodeSetLValue( pObj, 0 );
-
- // update all values iteratively
- Counter = 0;
- for ( c = 0; c < p->nMaxIters; c++ )
- {
- fChange = 0;
- Abc_AigForEachAnd( pNtk, pObj, i )
- {
- Counter++;
- if ( Seq_NodeCutMan(pObj) )
- RetValue = Seq_FpgaNodeUpdateLValue( pObj, Fi );
- else
- RetValue = Seq_RetimeNodeUpdateLValue( pObj, Fi );
- if ( RetValue == SEQ_UPDATE_YES )
- fChange = 1;
- }
- Abc_NtkForEachPo( pNtk, pObj, i )
- {
- if ( Seq_NodeCutMan(pObj) )
- RetValue = Seq_FpgaNodeUpdateLValue( pObj, Fi );
- else
- RetValue = Seq_RetimeNodeUpdateLValue( pObj, Fi );
- if ( RetValue == SEQ_UPDATE_FAIL )
- break;
- }
- if ( RetValue == SEQ_UPDATE_FAIL )
- break;
- if ( fChange == 0 )
- break;
- }
- if ( c == p->nMaxIters )
- {
- RetValue = SEQ_UPDATE_FAIL;
- pReason = "(timeout)";
- }
- else
- c++;
- // report the results
- if ( fVerbose )
- {
- if ( RetValue == SEQ_UPDATE_FAIL )
- printf( "Period = %3d. Iterations = %3d. Updates = %10d. Infeasible %s\n", Fi, c, Counter, pReason );
- else
- printf( "Period = %3d. Iterations = %3d. Updates = %10d. Feasible\n", Fi, c, Counter );
- }
-/*
- // check if any AND gates have infinite delay
- Counter = 0;
- Abc_AigForEachAnd( pNtk, pObj, i )
- Counter += (Seq_NodeGetLValue(pObj) < -ABC_INFINITY/2);
- if ( Counter > 0 )
- printf( "Warning: %d internal nodes have wrong l-values!\n", Counter );
-*/
- return RetValue != SEQ_UPDATE_FAIL;
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes the l-value of the node.]
-
- Description [The node can be internal or a PO.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_RetimeNodeUpdateLValue( Abc_Obj_t * pObj, int Fi )
-{
- int lValueNew, lValueOld, lValue0, lValue1;
- assert( !Abc_ObjIsPi(pObj) );
- assert( Abc_ObjFaninNum(pObj) > 0 );
- lValue0 = Seq_NodeGetLValue(Abc_ObjFanin0(pObj)) - Fi * Seq_ObjFaninL0(pObj);
- if ( Abc_ObjIsPo(pObj) )
- return (lValue0 > Fi)? SEQ_UPDATE_FAIL : SEQ_UPDATE_NO;
- if ( Abc_ObjFaninNum(pObj) == 2 )
- lValue1 = Seq_NodeGetLValue(Abc_ObjFanin1(pObj)) - Fi * Seq_ObjFaninL1(pObj);
- else
- lValue1 = -ABC_INFINITY;
- lValueNew = 1 + ABC_MAX( lValue0, lValue1 );
- lValueOld = Seq_NodeGetLValue(pObj);
-// if ( lValueNew == lValueOld )
- if ( lValueNew <= lValueOld )
- return SEQ_UPDATE_NO;
- Seq_NodeSetLValue( pObj, lValueNew );
- return SEQ_UPDATE_YES;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqCreate.c b/src/base/seq/seqCreate.c
deleted file mode 100644
index ec4fa6aa..00000000
--- a/src/base/seq/seqCreate.c
+++ /dev/null
@@ -1,487 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqCreate.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [Transformations to and from the sequential AIG.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqCreate.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-/*
- A sequential network is similar to AIG in that it contains only
- AND gates. However, the AND-gates are currently not hashed.
-
- When converting AIG into sequential AIG:
- - Const1/PIs/POs remain the same as in the original AIG.
- - Instead of the latches, a new cutset is added, which is currently
- defined as a set of AND gates that have a latch among their fanouts.
- - The edges of a sequential AIG are labeled with latch attributes
- in addition to the complementation attibutes.
- - The attributes contain information about the number of latches
- and their initial states.
- - The number of latches is stored directly on the edges. The initial
- states are stored in the sequential AIG manager.
-
- In the current version of the code, the sequential AIG is static
- in the sense that the new AIG nodes are never created.
- The retiming (or retiming/mapping) is performed by moving the
- latches over the static nodes of the AIG.
- The new initial state after backward retiming is computed
- by setting up and solving a SAT problem.
-*/
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-static Abc_Obj_t * Abc_NodeAigToSeq( Abc_Obj_t * pObjNew, Abc_Obj_t * pObj, int Edge, Vec_Int_t * vInitValues );
-static void Abc_NtkAigCutsetCopy( Abc_Ntk_t * pNtk );
-static Abc_Obj_t * Abc_NodeSeqToLogic( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pFanin, Seq_Lat_t * pRing, int nLatches );
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-
-/**Function*************************************************************
-
- Synopsis [Converts combinational AIG with latches into sequential AIG.]
-
- Description [The const/PI/PO nodes are duplicated. The internal
- nodes are duplicated in the topological order. The dangling nodes
- are not duplicated. The choice nodes are duplicated.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_NtkAigToSeq( Abc_Ntk_t * pNtk )
-{
- Abc_Ntk_t * pNtkNew;
- Abc_Obj_t * pObj, * pFaninNew;
- Vec_Int_t * vInitValues;
- Abc_InitType_t Init;
- int i, k, RetValue;
-
- // make sure it is an AIG without self-feeding latches
- assert( Abc_NtkIsStrash(pNtk) );
- assert( Abc_NtkIsDfsOrdered(pNtk) );
-
- if ( RetValue = Abc_NtkRemoveSelfFeedLatches(pNtk) )
- printf( "Modified %d self-feeding latches. The result may not verify.\n", RetValue );
- assert( Abc_NtkCountSelfFeedLatches(pNtk) == 0 );
-
- // start the network
- pNtkNew = Abc_NtkAlloc( ABC_NTK_SEQ, ABC_FUNC_AIG, 1 );
- // duplicate the name and the spec
- pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
- pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec);
-
- // map the constant nodes
- Abc_NtkCleanCopy( pNtk );
- Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
-
- // copy all objects, except the latches and constant
- Vec_PtrFill( pNtkNew->vObjs, Abc_NtkObjNumMax(pNtk), NULL );
- Vec_PtrWriteEntry( pNtkNew->vObjs, 0, Abc_AigConst1(pNtk)->pCopy );
- Abc_NtkForEachObj( pNtk, pObj, i )
- {
- if ( i == 0 || Abc_ObjIsLatch(pObj) )
- continue;
- pObj->pCopy = Abc_ObjAlloc( pNtkNew, pObj->Type );
- pObj->pCopy->Id = pObj->Id; // the ID is the same for both
- pObj->pCopy->fPhase = pObj->fPhase; // used to work with choices
- pObj->pCopy->Level = pObj->Level; // used for upper bound on clock cycle
- Vec_PtrWriteEntry( pNtkNew->vObjs, pObj->pCopy->Id, pObj->pCopy );
- pNtkNew->nObjs++;
- }
- pNtkNew->nObjCounts[ABC_OBJ_NODE] = pNtk->nObjCounts[ABC_OBJ_NODE];
-
- // create PI/PO and their names
- Abc_NtkForEachPi( pNtk, pObj, i )
- {
- Vec_PtrPush( pNtkNew->vPis, pObj->pCopy );
- Vec_PtrPush( pNtkNew->vCis, pObj->pCopy );
- Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL );
- }
- Abc_NtkForEachPo( pNtk, pObj, i )
- {
- Vec_PtrPush( pNtkNew->vPos, pObj->pCopy );
- Vec_PtrPush( pNtkNew->vCos, pObj->pCopy );
- Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL );
- }
- Abc_NtkForEachAssert( pNtk, pObj, i )
- {
- Vec_PtrPush( pNtkNew->vAsserts, pObj->pCopy );
- Vec_PtrPush( pNtkNew->vCos, pObj->pCopy );
- Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL );
- }
-
- // relink the choice nodes
- Abc_AigForEachAnd( pNtk, pObj, i )
- if ( pObj->pData )
- pObj->pCopy->pData = ((Abc_Obj_t *)pObj->pData)->pCopy;
-
- // start the storage for initial states
- Seq_Resize( pNtkNew->pManFunc, Abc_NtkObjNumMax(pNtkNew) );
- // reconnect the internal nodes
- vInitValues = Vec_IntAlloc( 100 );
- Abc_NtkForEachObj( pNtk, pObj, i )
- {
- // skip constants, PIs, and latches
- if ( Abc_ObjFaninNum(pObj) == 0 || Abc_ObjIsLatch(pObj) )
- continue;
- // process the first fanin
- Vec_IntClear( vInitValues );
- pFaninNew = Abc_NodeAigToSeq( pObj->pCopy, pObj, 0, vInitValues );
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
- // store the initial values
- Vec_IntForEachEntry( vInitValues, Init, k )
- Seq_NodeInsertFirst( pObj->pCopy, 0, Init );
- // skip single-input nodes
- if ( Abc_ObjFaninNum(pObj) == 1 )
- continue;
- // process the second fanin
- Vec_IntClear( vInitValues );
- pFaninNew = Abc_NodeAigToSeq( pObj->pCopy, pObj, 1, vInitValues );
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
- // store the initial values
- Vec_IntForEachEntry( vInitValues, Init, k )
- Seq_NodeInsertFirst( pObj->pCopy, 1, Init );
- }
- Vec_IntFree( vInitValues );
-
- // set the cutset composed of latch drivers
- Abc_NtkAigCutsetCopy( pNtk );
- Seq_NtkLatchGetEqualFaninNum( pNtkNew );
-
- // copy EXDC and check correctness
- if ( pNtk->pExdc )
- fprintf( stdout, "Warning: EXDC is not copied when converting to sequential AIG.\n" );
- if ( !Abc_NtkCheck( pNtkNew ) )
- fprintf( stdout, "Abc_NtkAigToSeq(): Network check has failed.\n" );
- return pNtkNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Determines the fanin that is transparent for latches.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t * Abc_NodeAigToSeq( Abc_Obj_t * pObjNew, Abc_Obj_t * pObj, int Edge, Vec_Int_t * vInitValues )
-{
- Abc_Obj_t * pFanin, * pFaninNew;
- Abc_InitType_t Init;
- // get the given fanin of the node
- pFanin = Abc_ObjFanin( pObj, Edge );
- // if fanin is the internal node, return its copy in the corresponding polarity
- if ( !Abc_ObjIsLatch(pFanin) )
- return Abc_ObjNotCond( pFanin->pCopy, Abc_ObjFaninC(pObj, Edge) );
- // fanin is a latch
- // get the new fanins
- pFaninNew = Abc_NodeAigToSeq( pObjNew, pFanin, 0, vInitValues );
- // get the initial state
- Init = Abc_LatchInit(pFanin);
- // complement the initial state if the inv is retimed over the latch
- if ( Abc_ObjIsComplement(pFaninNew) )
- {
- if ( Init == ABC_INIT_ZERO )
- Init = ABC_INIT_ONE;
- else if ( Init == ABC_INIT_ONE )
- Init = ABC_INIT_ZERO;
- else if ( Init != ABC_INIT_DC )
- assert( 0 );
- }
- // record the initial state
- Vec_IntPush( vInitValues, Init );
- return Abc_ObjNotCond( pFaninNew, Abc_ObjFaninC(pObj, Edge) );
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the cut set nodes.]
-
- Description [These are internal AND gates that have latch fanouts.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_NtkAigCutsetCopy( Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pLatch, * pDriver, * pDriverNew;
- int i;
- Abc_NtkIncrementTravId(pNtk);
- Abc_NtkForEachLatch( pNtk, pLatch, i )
- {
- pDriver = Abc_ObjFanin0(pLatch);
- if ( Abc_NodeIsTravIdCurrent(pDriver) || !Abc_AigNodeIsAnd(pDriver) )
- continue;
- Abc_NodeSetTravIdCurrent(pDriver);
- pDriverNew = pDriver->pCopy;
- Vec_PtrPush( pDriverNew->pNtk->vCutSet, pDriverNew );
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Converts a sequential AIG into a logic SOP network.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_NtkSeqToLogicSop( Abc_Ntk_t * pNtk )
-{
- Abc_Ntk_t * pNtkNew;
- Abc_Obj_t * pObj, * pFaninNew;
- Seq_Lat_t * pRing;
- int i;
-
- assert( Abc_NtkIsSeq(pNtk) );
- // start the network without latches
- pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
- // duplicate the nodes
- Abc_AigForEachAnd( pNtk, pObj, i )
- {
- Abc_NtkDupObj(pNtkNew, pObj, 0);
- pObj->pCopy->pData = Abc_SopCreateAnd2( (Extra_MmFlex_t *)pNtkNew->pManFunc, Abc_ObjFaninC0(pObj), Abc_ObjFaninC1(pObj) );
- }
- // share and create the latches
- Seq_NtkShareLatches( pNtkNew, pNtk );
- // connect the objects
- Abc_AigForEachAnd( pNtk, pObj, i )
- {
- if ( pRing = Seq_NodeGetRing(pObj,0) )
- pFaninNew = pRing->pLatch;
- else
- pFaninNew = Abc_ObjFanin0(pObj)->pCopy;
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
-
- if ( pRing = Seq_NodeGetRing(pObj,1) )
- pFaninNew = pRing->pLatch;
- else
- pFaninNew = Abc_ObjFanin1(pObj)->pCopy;
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
- }
- // connect the POs
- Abc_NtkForEachPo( pNtk, pObj, i )
- {
- if ( pRing = Seq_NodeGetRing(pObj,0) )
- pFaninNew = pRing->pLatch;
- else
- pFaninNew = Abc_ObjFanin0(pObj)->pCopy;
- pFaninNew = Abc_ObjNotCond( pFaninNew, Abc_ObjFaninC0(pObj) );
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
- }
- // clean the latch pointers
- Seq_NtkShareLatchesClean( pNtk );
-
- // add the latches and their names
- Abc_NtkAddDummyBoxNames( pNtkNew );
- Abc_NtkOrderCisCos( pNtkNew );
- // fix the problem with complemented and duplicated CO edges
- Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
- if ( !Abc_NtkCheck( pNtkNew ) )
- fprintf( stdout, "Abc_NtkSeqToLogicSop(): Network check has failed.\n" );
- return pNtkNew;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Converts a sequential AIG into a logic SOP network.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_NtkSeqToLogicSop_old( Abc_Ntk_t * pNtk )
-{
- Abc_Ntk_t * pNtkNew;
- Abc_Obj_t * pObj, * pFaninNew;
- int i;
-
- assert( Abc_NtkIsSeq(pNtk) );
- // start the network without latches
- pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
-
- // duplicate the nodes, create node functions
- Abc_NtkForEachNode( pNtk, pObj, i )
- {
- // skip the constant
- if ( Abc_ObjFaninNum(pObj) == 0 )
- continue;
- // duplicate the node
- Abc_NtkDupObj(pNtkNew, pObj, 0);
- if ( Abc_ObjFaninNum(pObj) == 1 )
- {
- assert( !Abc_ObjFaninC0(pObj) );
- pObj->pCopy->pData = Abc_SopCreateBuf( (Extra_MmFlex_t *)pNtkNew->pManFunc );
- continue;
- }
- pObj->pCopy->pData = Abc_SopCreateAnd2( (Extra_MmFlex_t *)pNtkNew->pManFunc, Abc_ObjFaninC0(pObj), Abc_ObjFaninC1(pObj) );
- }
- // connect the objects
- Abc_NtkForEachObj( pNtk, pObj, i )
- {
- assert( (int)pObj->Id == i );
- // skip PIs and the constant
- if ( Abc_ObjFaninNum(pObj) == 0 )
- continue;
- // create the edge
- pFaninNew = Abc_NodeSeqToLogic( pNtkNew, Abc_ObjFanin0(pObj), Seq_NodeGetRing(pObj,0), Seq_ObjFaninL0(pObj) );
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
- if ( Abc_ObjFaninNum(pObj) == 1 )
- {
- // create the complemented edge
- if ( Abc_ObjFaninC0(pObj) )
- Abc_ObjSetFaninC( pObj->pCopy, 0 );
- continue;
- }
- // create the edge
- pFaninNew = Abc_NodeSeqToLogic( pNtkNew, Abc_ObjFanin1(pObj), Seq_NodeGetRing(pObj,1), Seq_ObjFaninL1(pObj) );
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
- // the complemented edges are subsumed by the node function
- }
- // add the latches and their names
- Abc_NtkAddDummyBoxNames( pNtkNew );
- Abc_NtkOrderCisCos( pNtkNew );
- // fix the problem with complemented and duplicated CO edges
- Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
- if ( !Abc_NtkCheck( pNtkNew ) )
- fprintf( stdout, "Abc_NtkSeqToLogicSop(): Network check has failed.\n" );
- return pNtkNew;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Creates latches on one edge.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t * Abc_NodeSeqToLogic( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pFanin, Seq_Lat_t * pRing, int nLatches )
-{
- Abc_Obj_t * pLatch;
- if ( nLatches == 0 )
- {
- assert( pFanin->pCopy );
- return pFanin->pCopy;
- }
- pFanin = Abc_NodeSeqToLogic( pNtkNew, pFanin, Seq_LatNext(pRing), nLatches - 1 );
- pLatch = Abc_NtkCreateLatch( pNtkNew );
- pLatch->pData = (void *)Seq_LatInit( pRing );
- Abc_ObjAddFanin( pLatch, pFanin );
- return pLatch;
-}
-
-/**Function*************************************************************
-
- Synopsis [Makes sure that every node in the table is in the network and vice versa.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_NtkSeqCheck( Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pObj;
- int i, nFanins;
- Abc_NtkForEachNode( pNtk, pObj, i )
- {
- nFanins = Abc_ObjFaninNum(pObj);
- if ( nFanins == 0 )
- {
- if ( pObj != Abc_AigConst1(pNtk) )
- {
- printf( "Abc_SeqCheck: The AIG has non-standard constant nodes.\n" );
- return 0;
- }
- continue;
- }
- if ( nFanins == 1 )
- {
- printf( "Abc_SeqCheck: The AIG has single input nodes.\n" );
- return 0;
- }
- if ( nFanins > 2 )
- {
- printf( "Abc_SeqCheck: The AIG has non-standard nodes.\n" );
- return 0;
- }
- }
- // check the correctness of the internal representation of the initial states
- Abc_NtkForEachObj( pNtk, pObj, i )
- {
- nFanins = Abc_ObjFaninNum(pObj);
- if ( nFanins == 0 )
- continue;
- if ( nFanins == 1 )
- {
- if ( Seq_NodeCountLats(pObj, 0) != Seq_ObjFaninL0(pObj) )
- {
- printf( "Abc_SeqCheck: Node %d has mismatch in the number of latches.\n", Abc_ObjName(pObj) );
- return 0;
- }
- }
- // look at both inputs
- if ( Seq_NodeCountLats(pObj, 0) != Seq_ObjFaninL0(pObj) )
- {
- printf( "Abc_SeqCheck: The first fanin of node %d has mismatch in the number of latches.\n", Abc_ObjName(pObj) );
- return 0;
- }
- if ( Seq_NodeCountLats(pObj, 1) != Seq_ObjFaninL1(pObj) )
- {
- printf( "Abc_SeqCheck: The second fanin of node %d has mismatch in the number of latches.\n", Abc_ObjName(pObj) );
- return 0;
- }
- }
- return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqFpgaCore.c b/src/base/seq/seqFpgaCore.c
deleted file mode 100644
index 8ab97b43..00000000
--- a/src/base/seq/seqFpgaCore.c
+++ /dev/null
@@ -1,648 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqFpgaCore.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [The core of FPGA mapping/retiming package.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqFpgaCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-static Abc_Ntk_t * Seq_NtkFpgaDup( Abc_Ntk_t * pNtk );
-static int Seq_NtkFpgaInitCompatible( Abc_Ntk_t * pNtk, int fVerbose );
-static Abc_Ntk_t * Seq_NtkSeqFpgaMapped( Abc_Ntk_t * pNtkNew );
-static int Seq_FpgaMappingCount( Abc_Ntk_t * pNtk );
-static int Seq_FpgaMappingCount_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves );
-static Abc_Obj_t * Seq_FpgaMappingBuild_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, unsigned SeqEdge, int fTop, int LagCut, Vec_Ptr_t * vLeaves );
-static DdNode * Seq_FpgaMappingBdd_rec( DdManager * dd, Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves );
-static void Seq_FpgaMappingEdges_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, Vec_Ptr_t * vLeaves, Vec_Vec_t * vMapEdges );
-static void Seq_FpgaMappingConnect_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves );
-static DdNode * Seq_FpgaMappingConnectBdd_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves );
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Performs FPGA mapping and retiming.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Seq_NtkFpgaMapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Abc_Ntk_t * pNtkNew;
- Abc_Ntk_t * pNtkMap;
- int RetValue;
-
- // get the LUT library
- p->nVarsMax = Fpga_LutLibReadVarMax( Abc_FrameReadLibLut() );
- p->nMaxIters = nMaxIters;
-
- // find the best mapping and retiming for all nodes (p->vLValues, p->vBestCuts, p->vLags)
- if ( !Seq_FpgaMappingDelays( pNtk, fVerbose ) )
- return NULL;
- if ( RetValue = Abc_NtkGetChoiceNum(pNtk) )
- {
- printf( "The network has %d choices. The resulting network is not derived (this is temporary).\n", RetValue );
- printf( "The mininum clock period computed is %d.\n", p->FiBestInt );
- return NULL;
- }
-
- // duplicate the nodes contained in multiple cuts
- pNtkNew = Seq_NtkFpgaDup( pNtk );
-// return pNtkNew;
-
- // implement the retiming
- RetValue = Seq_NtkImplementRetiming( pNtkNew, ((Abc_Seq_t *)pNtkNew->pManFunc)->vLags, fVerbose );
- if ( RetValue == 0 )
- printf( "Retiming completed but initial state computation has failed.\n" );
-// return pNtkNew;
-
- // check the compatibility of initial states computed
- if ( RetValue = Seq_NtkFpgaInitCompatible( pNtkNew, fVerbose ) )
- printf( "The number of LUTs with incompatible edges = %d.\n", RetValue );
-
- // create the final mapped network
- pNtkMap = Seq_NtkSeqFpgaMapped( pNtkNew );
- Abc_NtkDelete( pNtkNew );
- if ( RetValue )
- printf( "The number of LUTs with more than %d inputs = %d.\n",
- p->nVarsMax, Seq_NtkCountNodesAboveLimit(pNtkMap, p->nVarsMax) );
- return pNtkMap;
-}
-
-/**Function*************************************************************
-
- Synopsis [Derives the network by duplicating some of the nodes.]
-
- Description [Information about mapping is given as mapping nodes (p->vMapAnds)
- and best cuts for each node (p->vMapCuts).]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Seq_NtkFpgaDup( Abc_Ntk_t * pNtk )
-{
- Abc_Seq_t * pNew, * p = pNtk->pManFunc;
- Abc_Ntk_t * pNtkNew;
- Abc_Obj_t * pObj, * pLeaf;
- Vec_Ptr_t * vLeaves;
- unsigned SeqEdge;
- int i, k, nObjsNew, Lag;
-
- assert( Abc_NtkIsSeq(pNtk) );
-
- // start the expanded network
- pNtkNew = Abc_NtkStartFrom( pNtk, pNtk->ntkType, pNtk->ntkFunc );
-
- // start the new sequential AIG manager
- nObjsNew = 1 + Abc_NtkPiNum(pNtk) + Abc_NtkPoNum(pNtk) + Seq_FpgaMappingCount(pNtk);
- Seq_Resize( pNtkNew->pManFunc, nObjsNew );
-
- // duplicate the nodes in the mapping
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i )
- Abc_NtkDupObj( pNtkNew, pObj, 0 );
-
- // recursively construct the internals of each node
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i )
- {
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
- Seq_FpgaMappingBuild_rec( pNtkNew, pNtk, pObj->Id << 8, 1, Seq_NodeGetLag(pObj), vLeaves );
- }
- assert( nObjsNew == pNtkNew->nObjs );
-
- // set the POs
- Abc_NtkFinalize( pNtk, pNtkNew );
- // duplicate the latches on the PO edges
- Abc_NtkForEachPo( pNtk, pObj, i )
- Seq_NodeDupLats( pObj->pCopy, pObj, 0 );
-
- // transfer the mapping info to the new manager
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i )
- {
- // get the leaves of the cut
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
- // convert the leaf nodes
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, k )
- {
- SeqEdge = (unsigned)pLeaf;
- pLeaf = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- Lag = (SeqEdge & 255) + Seq_NodeGetLag(pObj) - Seq_NodeGetLag(pLeaf);
- assert( Lag >= 0 );
- // translate the old leaf into the leaf in the new network
- Vec_PtrWriteEntry( vLeaves, k, (void *)((pLeaf->pCopy->Id << 8) | Lag) );
-// printf( "%d -> %d\n", pLeaf->Id, pLeaf->pCopy->Id );
- }
- // convert the root node
- Vec_PtrWriteEntry( p->vMapAnds, i, pObj->pCopy );
- }
- pNew = pNtkNew->pManFunc;
- pNew->nVarsMax = p->nVarsMax;
- pNew->vMapAnds = p->vMapAnds; p->vMapAnds = NULL;
- pNew->vMapCuts = p->vMapCuts; p->vMapCuts = NULL;
-
- if ( !Abc_NtkCheck( pNtkNew ) )
- fprintf( stdout, "Seq_NtkFpgaDup(): Network check has failed.\n" );
- return pNtkNew;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Checks if the initial states are compatible.]
-
- Description [Checks of all the initial states on the fanins edges
- of the cut have compatible number of latches and initial states.
- If this is not true, then the mapped network with the does not have initial
- state. Returns the number of LUTs with incompatible edges.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkFpgaInitCompatible( Abc_Ntk_t * pNtk, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Abc_Obj_t * pAnd, * pLeaf, * pFanout0, * pFanout1;
- Vec_Vec_t * vTotalEdges;
- Vec_Ptr_t * vLeaves, * vEdges;
- int i, k, m, Edge0, Edge1, nLatchAfter, nLatches1, nLatches2;
- unsigned SeqEdge;
- int CountBad = 0, CountAll = 0;
-
- vTotalEdges = Vec_VecStart( p->nVarsMax );
- // go through all the nodes (cuts) used in the mapping
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pAnd, i )
- {
-// printf( "*** Node %d.\n", pAnd->Id );
-
- // get the cut of this gate
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
-
- // get the edges pointing to the leaves
- Vec_VecClear( vTotalEdges );
- Seq_FpgaMappingEdges_rec( pNtk, pAnd->Id << 8, NULL, vLeaves, vTotalEdges );
-
- // for each leaf, consider its edges
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, k )
- {
- SeqEdge = (unsigned)pLeaf;
- pLeaf = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- nLatchAfter = SeqEdge & 255;
- if ( nLatchAfter == 0 )
- continue;
-
- // go through the edges
- vEdges = Vec_VecEntry( vTotalEdges, k );
- pFanout0 = NULL;
- Vec_PtrForEachEntry( Abc_Obj_t *, vEdges, pFanout1, m )
- {
- Edge1 = Abc_ObjIsComplement(pFanout1);
- pFanout1 = Abc_ObjRegular(pFanout1);
-//printf( "Fanin = %d. Fanout = %d.\n", pLeaf->Id, pFanout1->Id );
-
- // make sure this is the same fanin
- if ( Edge1 )
- assert( pLeaf == Abc_ObjFanin1(pFanout1) );
- else
- assert( pLeaf == Abc_ObjFanin0(pFanout1) );
-
- // save the first one
- if ( pFanout0 == NULL )
- {
- pFanout0 = pFanout1;
- Edge0 = Edge1;
- continue;
- }
- // compare the rings
- // if they have different number of latches, this is the bug
- nLatches1 = Seq_NodeCountLats(pFanout0, Edge0);
- nLatches2 = Seq_NodeCountLats(pFanout1, Edge1);
- assert( nLatches1 == nLatches2 );
- assert( nLatches1 == nLatchAfter );
- assert( nLatches1 > 0 );
-
- // if they have different initial states, this is the problem
- if ( !Seq_NodeCompareLats(pFanout0, Edge0, pFanout1, Edge1) )
- {
- CountBad++;
- break;
- }
- CountAll++;
- }
- }
- }
- if ( fVerbose )
- printf( "The number of pairs of edges checked = %d.\n", CountAll );
- Vec_VecFree( vTotalEdges );
- return CountBad;
-}
-
-/**Function*************************************************************
-
- Synopsis [Derives the final mapped network.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Seq_NtkSeqFpgaMapped( Abc_Ntk_t * pNtk )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Abc_Ntk_t * pNtkMap;
- Vec_Ptr_t * vLeaves;
- Abc_Obj_t * pObj, * pFaninNew;
- Seq_Lat_t * pRing;
- int i;
-
- assert( Abc_NtkIsSeq(pNtk) );
-
- // start the network
- pNtkMap = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD );
-
- // duplicate the nodes used in the mapping
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i )
- pObj->pCopy = Abc_NtkCreateNode( pNtkMap );
-
- // create and share the latches
- Seq_NtkShareLatchesMapping( pNtkMap, pNtk, p->vMapAnds, 1 );
-
- // connect the nodes
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i )
- {
- // get the leaves of this gate
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
- // get the BDD of the node
- pObj->pCopy->pData = Seq_FpgaMappingConnectBdd_rec( pNtk, pObj->Id << 8, NULL, -1, pObj, vLeaves );
- Cudd_Ref( pObj->pCopy->pData );
- // complement the BDD of the cut if it came from the opposite polarity choice cut
-// if ( Vec_StrEntry(p->vPhase, i) )
-// pObj->pCopy->pData = Cudd_Not( pObj->pCopy->pData );
- }
-
- // set the POs
- Abc_NtkForEachPo( pNtk, pObj, i )
- {
- if ( pRing = Seq_NodeGetRing(pObj,0) )
- pFaninNew = pRing->pLatch;
- else
- pFaninNew = Abc_ObjFanin0(pObj)->pCopy;
- pFaninNew = Abc_ObjNotCond( pFaninNew, Abc_ObjFaninC0(pObj) );
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
- }
-
- // add the latches and their names
- Abc_NtkAddDummyBoxNames( pNtkMap );
- Abc_NtkOrderCisCos( pNtkMap );
- // fix the problem with complemented and duplicated CO edges
- Abc_NtkLogicMakeSimpleCos( pNtkMap, 1 );
- // make the network minimum base
- Abc_NtkMinimumBase( pNtkMap );
- if ( !Abc_NtkCheck( pNtkMap ) )
- fprintf( stdout, "Seq_NtkSeqFpgaMapped(): Network check has failed.\n" );
- return pNtkMap;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of nodes in the bag.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_FpgaMappingCount( Abc_Ntk_t * pNtk )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Vec_Ptr_t * vLeaves;
- Abc_Obj_t * pAnd;
- int i, Counter = 0;
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pAnd, i )
- {
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
- Counter += Seq_FpgaMappingCount_rec( pNtk, pAnd->Id << 8, vLeaves );
- }
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of nodes in the bag.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_FpgaMappingCount_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves )
-{
- Abc_Obj_t * pObj, * pLeaf;
- unsigned SeqEdge0, SeqEdge1;
- int Lag, i;
- // get the object and the lag
- pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- Lag = SeqEdge & 255;
- // if the node is the fanin of the cut, return
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- if ( SeqEdge == (unsigned)pLeaf )
- return 0;
- // continue unfolding
- assert( Abc_AigNodeIsAnd(pObj) );
- // get new sequential edges
- assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
- assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
- SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj);
- SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj);
- // call for the children
- return 1 + Seq_FpgaMappingCount_rec( pNtk, SeqEdge0, vLeaves ) +
- Seq_FpgaMappingCount_rec( pNtk, SeqEdge1, vLeaves );
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the edges pointing to the leaves of the cut.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t * Seq_FpgaMappingBuild_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, unsigned SeqEdge, int fTop, int LagCut, Vec_Ptr_t * vLeaves )
-{
- Abc_Obj_t * pObj, * pObjNew, * pLeaf, * pFaninNew0, * pFaninNew1;
- unsigned SeqEdge0, SeqEdge1;
- int Lag, i;
- // get the object and the lag
- pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- Lag = SeqEdge & 255;
- // if the node is the fanin of the cut, return
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- if ( SeqEdge == (unsigned)pLeaf )
- return pObj->pCopy;
- // continue unfolding
- assert( Abc_AigNodeIsAnd(pObj) );
- // get new sequential edges
- assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
- assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
- SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj);
- SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj);
- // call for the children
- pObjNew = fTop? pObj->pCopy : Abc_NtkCreateNode( pNtkNew );
- // solve subproblems
- pFaninNew0 = Seq_FpgaMappingBuild_rec( pNtkNew, pNtk, SeqEdge0, 0, LagCut, vLeaves );
- pFaninNew1 = Seq_FpgaMappingBuild_rec( pNtkNew, pNtk, SeqEdge1, 0, LagCut, vLeaves );
- // add the fanins to the node
- Abc_ObjAddFanin( pObjNew, Abc_ObjNotCond( pFaninNew0, Abc_ObjFaninC0(pObj) ) );
- Abc_ObjAddFanin( pObjNew, Abc_ObjNotCond( pFaninNew1, Abc_ObjFaninC1(pObj) ) );
- Seq_NodeDupLats( pObjNew, pObj, 0 );
- Seq_NodeDupLats( pObjNew, pObj, 1 );
- // set the lag of the new node equal to the internal lag plus mapping/retiming lag
- Seq_NodeSetLag( pObjNew, (char)(Lag + LagCut) );
-// Seq_NodeSetLag( pObjNew, (char)(Lag) );
- return pObjNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Derives the BDD of the selected cut.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-DdNode * Seq_FpgaMappingBdd_rec( DdManager * dd, Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves )
-{
- Abc_Obj_t * pObj, * pLeaf;
- DdNode * bFunc0, * bFunc1, * bFunc;
- unsigned SeqEdge0, SeqEdge1;
- int Lag, i;
- // get the object and the lag
- pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- Lag = SeqEdge & 255;
- // if the node is the fanin of the cut, return
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- if ( SeqEdge == (unsigned)pLeaf )
- return Cudd_bddIthVar( dd, i );
- // continue unfolding
- assert( Abc_AigNodeIsAnd(pObj) );
- // get new sequential edges
- assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
- assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
- SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj);
- SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj);
- // call for the children
- bFunc0 = Seq_FpgaMappingBdd_rec( dd, pNtk, SeqEdge0, vLeaves ); Cudd_Ref( bFunc0 );
- bFunc1 = Seq_FpgaMappingBdd_rec( dd, pNtk, SeqEdge1, vLeaves ); Cudd_Ref( bFunc1 );
- bFunc0 = Cudd_NotCond( bFunc0, Abc_ObjFaninC0(pObj) );
- bFunc1 = Cudd_NotCond( bFunc1, Abc_ObjFaninC1(pObj) );
- // get the BDD of the node
- bFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 ); Cudd_Ref( bFunc );
- Cudd_RecursiveDeref( dd, bFunc0 );
- Cudd_RecursiveDeref( dd, bFunc1 );
- // return the BDD
- Cudd_Deref( bFunc );
- return bFunc;
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the edges pointing to the leaves of the cut.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_FpgaMappingEdges_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, Vec_Ptr_t * vLeaves, Vec_Vec_t * vMapEdges )
-{
- Abc_Obj_t * pObj, * pLeaf;
- unsigned SeqEdge0, SeqEdge1;
- int Lag, i;
- // get the object and the lag
- pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- Lag = SeqEdge & 255;
- // if the node is the fanin of the cut, return
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- {
- if ( SeqEdge == (unsigned)pLeaf )
- {
- assert( pPrev != NULL );
- Vec_VecPush( vMapEdges, i, pPrev );
- return;
- }
- }
- // continue unfolding
- assert( Abc_AigNodeIsAnd(pObj) );
- // get new sequential edges
- assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
- assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
- SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj);
- SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj);
- // call for the children
- Seq_FpgaMappingEdges_rec( pNtk, SeqEdge0, pObj , vLeaves, vMapEdges );
- Seq_FpgaMappingEdges_rec( pNtk, SeqEdge1, Abc_ObjNot(pObj), vLeaves, vMapEdges );
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the edges pointing to the leaves of the cut.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_FpgaMappingConnect_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves )
-{
- Seq_Lat_t * pRing;
- Abc_Obj_t * pObj, * pLeaf, * pFanin, * pFaninNew;
- unsigned SeqEdge0, SeqEdge1;
- int Lag, i, k;
- // get the object and the lag
- pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- Lag = SeqEdge & 255;
- // if the node is the fanin of the cut, add the connection and return
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- {
- if ( SeqEdge == (unsigned)pLeaf )
- {
- assert( pPrev != NULL );
- if ( pRing = Seq_NodeGetRing(pPrev,Edge) )
- pFaninNew = pRing->pLatch;
- else
- pFaninNew = Abc_ObjFanin(pPrev,Edge)->pCopy;
- // check if the root already has this fanin
- Abc_ObjForEachFanin( pRoot, pFanin, k )
- if ( pFanin == pFaninNew )
- return;
- Abc_ObjAddFanin( pRoot->pCopy, pFaninNew );
- return;
- }
- }
- // continue unfolding
- assert( Abc_AigNodeIsAnd(pObj) );
- // get new sequential edges
- assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
- assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
- SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj);
- SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj);
- // call for the children
- Seq_FpgaMappingConnect_rec( pNtk, SeqEdge0, pObj, 0, pRoot, vLeaves );
- Seq_FpgaMappingConnect_rec( pNtk, SeqEdge1, pObj, 1, pRoot, vLeaves );
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the edges pointing to the leaves of the cut.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-DdNode * Seq_FpgaMappingConnectBdd_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves )
-{
- Seq_Lat_t * pRing;
- Abc_Obj_t * pObj, * pLeaf, * pFanin, * pFaninNew;
- unsigned SeqEdge0, SeqEdge1;
- DdManager * dd = pRoot->pCopy->pNtk->pManFunc;
- DdNode * bFunc, * bFunc0, * bFunc1;
- int Lag, i, k;
- // get the object and the lag
- pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- Lag = SeqEdge & 255;
- // if the node is the fanin of the cut, add the connection and return
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- {
- if ( SeqEdge == (unsigned)pLeaf )
- {
- assert( pPrev != NULL );
- if ( pRing = Seq_NodeGetRing(pPrev,Edge) )
- pFaninNew = pRing->pLatch;
- else
- pFaninNew = Abc_ObjFanin(pPrev,Edge)->pCopy;
- // check if the root already has this fanin
- Abc_ObjForEachFanin( pRoot->pCopy, pFanin, k )
- if ( pFanin == pFaninNew )
- return Cudd_bddIthVar( dd, k );
- Abc_ObjAddFanin( pRoot->pCopy, pFaninNew );
- return Cudd_bddIthVar( dd, k );
- }
- }
- // continue unfolding
- assert( Abc_AigNodeIsAnd(pObj) );
- // get new sequential edges
- assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
- assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
- SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj);
- SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj);
- // call for the children
- bFunc0 = Seq_FpgaMappingConnectBdd_rec( pNtk, SeqEdge0, pObj, 0, pRoot, vLeaves ); Cudd_Ref( bFunc0 );
- bFunc1 = Seq_FpgaMappingConnectBdd_rec( pNtk, SeqEdge1, pObj, 1, pRoot, vLeaves ); Cudd_Ref( bFunc1 );
- bFunc0 = Cudd_NotCond( bFunc0, Abc_ObjFaninC0(pObj) );
- bFunc1 = Cudd_NotCond( bFunc1, Abc_ObjFaninC1(pObj) );
- // get the BDD of the node
- bFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 ); Cudd_Ref( bFunc );
- Cudd_RecursiveDeref( dd, bFunc0 );
- Cudd_RecursiveDeref( dd, bFunc1 );
- // return the BDD
- Cudd_Deref( bFunc );
- return bFunc;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqFpgaIter.c b/src/base/seq/seqFpgaIter.c
deleted file mode 100644
index c4551a73..00000000
--- a/src/base/seq/seqFpgaIter.c
+++ /dev/null
@@ -1,275 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqFpgaIter.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [Iterative delay computation in FPGA mapping/retiming package.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqFpgaIter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-#include "main.h"
-#include "fpga.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-static void Seq_FpgaMappingCollectNode_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vMapping, Vec_Vec_t * vMapCuts );
-static Cut_Cut_t * Seq_FpgaMappingSelectCut( Abc_Obj_t * pAnd );
-
-extern Cut_Man_t * Abc_NtkSeqCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams );
-extern Cut_Man_t * Abc_NtkCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams );
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Computes the retiming lags for FPGA mapping.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_FpgaMappingDelays( Abc_Ntk_t * pNtk, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Cut_Params_t Params, * pParams = &Params;
- Abc_Obj_t * pObj;
- int i, clk;
-
- // set defaults for cut computation
- memset( pParams, 0, sizeof(Cut_Params_t) );
- pParams->nVarsMax = p->nVarsMax; // the max cut size ("k" of the k-feasible cuts)
- pParams->nKeepMax = 1000; // the max number of cuts kept at a node
- pParams->fTruth = 0; // compute truth tables
- pParams->fFilter = 1; // filter dominated cuts
- pParams->fSeq = 1; // compute sequential cuts
- pParams->fVerbose = fVerbose; // the verbosiness flag
-
- // compute the cuts
-clk = clock();
- p->pCutMan = Abc_NtkSeqCuts( pNtk, pParams );
-// pParams->fSeq = 0;
-// p->pCutMan = Abc_NtkCuts( pNtk, pParams );
-p->timeCuts = clock() - clk;
-
- if ( fVerbose )
- Cut_ManPrintStats( p->pCutMan );
-
- // compute area flows
-// Seq_MapComputeAreaFlows( pNtk, fVerbose );
-
- // compute the delays
-clk = clock();
- if ( !Seq_AigRetimeDelayLags( pNtk, fVerbose ) )
- return 0;
- p->timeDelay = clock() - clk;
-
- // collect the nodes and cuts used in the mapping
- p->vMapAnds = Vec_PtrAlloc( 1000 );
- p->vMapCuts = Vec_VecAlloc( 1000 );
- Abc_NtkIncrementTravId( pNtk );
- Abc_NtkForEachPo( pNtk, pObj, i )
- Seq_FpgaMappingCollectNode_rec( Abc_ObjFanin0(pObj), p->vMapAnds, p->vMapCuts );
-
- if ( fVerbose )
- printf( "The number of LUTs = %d.\n", Vec_PtrSize(p->vMapAnds) );
-
- // remove the cuts
- Cut_ManStop( p->pCutMan );
- p->pCutMan = NULL;
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Derives the parameters of the best mapping/retiming for one node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_FpgaMappingCollectNode_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vMapping, Vec_Vec_t * vMapCuts )
-{
- Abc_Obj_t * pFanin;
- Cut_Cut_t * pCutBest;
- int k;
-
- // skip if this is a non-PI node
- if ( !Abc_AigNodeIsAnd(pAnd) )
- return;
- // skip a visited node
- if ( Abc_NodeIsTravIdCurrent(pAnd) )
- return;
- Abc_NodeSetTravIdCurrent(pAnd);
-
- // visit the fanins of the node
- pCutBest = Seq_FpgaMappingSelectCut( pAnd );
- for ( k = 0; k < (int)pCutBest->nLeaves; k++ )
- {
- pFanin = Abc_NtkObj( pAnd->pNtk, pCutBest->pLeaves[k] >> 8 );
- Seq_FpgaMappingCollectNode_rec( pFanin, vMapping, vMapCuts );
- }
-
- // add this node
- Vec_PtrPush( vMapping, pAnd );
- for ( k = 0; k < (int)pCutBest->nLeaves; k++ )
- Vec_VecPush( vMapCuts, Vec_PtrSize(vMapping)-1, (void *)pCutBest->pLeaves[k] );
-}
-
-/**Function*************************************************************
-
- Synopsis [Selects the best cut to represent the node in the mapping.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Cut_Cut_t * Seq_FpgaMappingSelectCut( Abc_Obj_t * pAnd )
-{
- Abc_Obj_t * pFanin;
- Cut_Cut_t * pCut, * pCutBest, * pList;
- float CostCur, CostMin = ABC_INFINITY;
- int ArrivalCut, ArrivalMin, i;
- // get the arrival time of the best non-trivial cut
- ArrivalMin = Seq_NodeGetLValue( pAnd );
- // iterate through the cuts and select the one with the minimum cost
- pList = Abc_NodeReadCuts( Seq_NodeCutMan(pAnd), pAnd );
- CostMin = ABC_INFINITY;
- pCutBest = NULL;
- for ( pCut = pList->pNext; pCut; pCut = pCut->pNext )
- {
- ArrivalCut = *((int *)&pCut->uSign);
-// assert( ArrivalCut >= ArrivalMin );
- if ( ArrivalCut > ArrivalMin )
- continue;
- CostCur = 0.0;
- for ( i = 0; i < (int)pCut->nLeaves; i++ )
- {
- pFanin = Abc_NtkObj( pAnd->pNtk, pCut->pLeaves[i] >> 8 );
- if ( Abc_ObjIsPi(pFanin) )
- continue;
- if ( Abc_NodeIsTravIdCurrent(pFanin) )
- continue;
- CostCur += (float)(1.0 / Abc_ObjFanoutNum(pFanin));
-// CostCur += Seq_NodeGetFlow( pFanin );
- }
- if ( CostMin > CostCur )
- {
- CostMin = CostCur;
- pCutBest = pCut;
- }
- }
- assert( pCutBest != NULL );
- return pCutBest;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Computes the l-value of the cut.]
-
- Description [The node should be internal.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static inline int Seq_FpgaCutUpdateLValue( Cut_Cut_t * pCut, Abc_Obj_t * pObj, int Fi )
-{
- Abc_Obj_t * pFanin;
- int i, lValueMax, lValueCur;
- assert( Abc_AigNodeIsAnd(pObj) );
- lValueMax = -ABC_INFINITY;
- for ( i = 0; i < (int)pCut->nLeaves; i++ )
- {
-// lValue0 = Seq_NodeGetLValue(Abc_ObjFanin0(pObj)) - Fi * Abc_ObjFaninL0(pObj);
- pFanin = Abc_NtkObj(pObj->pNtk, pCut->pLeaves[i] >> 8);
- lValueCur = Seq_NodeGetLValue(pFanin) - Fi * (pCut->pLeaves[i] & 255);
- if ( lValueMax < lValueCur )
- lValueMax = lValueCur;
- }
- lValueMax += 1;
- *((int *)&pCut->uSign) = lValueMax;
- return lValueMax;
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes the l-value of the node.]
-
- Description [The node can be internal or a PO.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_FpgaNodeUpdateLValue( Abc_Obj_t * pObj, int Fi )
-{
- Cut_Cut_t * pCut, * pList;
- int lValueNew, lValueOld, lValueCut;
- assert( !Abc_ObjIsPi(pObj) );
- assert( Abc_ObjFaninNum(pObj) > 0 );
- if ( Abc_ObjIsPo(pObj) )
- {
- lValueNew = Seq_NodeGetLValue(Abc_ObjFanin0(pObj)) - Fi * Seq_ObjFaninL0(pObj);
- return (lValueNew > Fi)? SEQ_UPDATE_FAIL : SEQ_UPDATE_NO;
- }
- // get the arrival time of the best non-trivial cut
- pList = Abc_NodeReadCuts( Seq_NodeCutMan(pObj), pObj );
- // skip the choice nodes
- if ( pList == NULL )
- return SEQ_UPDATE_NO;
- lValueNew = ABC_INFINITY;
- for ( pCut = pList->pNext; pCut; pCut = pCut->pNext )
- {
- lValueCut = Seq_FpgaCutUpdateLValue( pCut, pObj, Fi );
- if ( lValueNew > lValueCut )
- lValueNew = lValueCut;
- }
- // compare the arrival time with the previous arrival time
- lValueOld = Seq_NodeGetLValue(pObj);
-// if ( lValueNew == lValueOld )
- if ( lValueNew <= lValueOld )
- return SEQ_UPDATE_NO;
- Seq_NodeSetLValue( pObj, lValueNew );
-//printf( "%d -> %d ", lValueOld, lValueNew );
- return SEQ_UPDATE_YES;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqInt.h b/src/base/seq/seqInt.h
deleted file mode 100644
index 89ce6843..00000000
--- a/src/base/seq/seqInt.h
+++ /dev/null
@@ -1,260 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqInt.h]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [Internal declarations.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __SEQ_INT_H__
-#define __SEQ_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-/// INCLUDES ///
-////////////////////////////////////////////////////////////////////////
-
-#include "abc.h"
-#include "cut.h"
-#include "main.h"
-#include "mio.h"
-#include "mapper.h"
-#include "fpga.h"
-#include "seq.h"
-
-////////////////////////////////////////////////////////////////////////
-/// PARAMETERS ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-#define SEQ_FULL_MASK 0xFFFFFFFF
-
-// node status after updating its arrival time
-enum { SEQ_UPDATE_FAIL, SEQ_UPDATE_NO, SEQ_UPDATE_YES };
-
-////////////////////////////////////////////////////////////////////////
-/// BASIC TYPES ///
-////////////////////////////////////////////////////////////////////////
-
-// manager of sequential AIG
-struct Abc_Seq_t_
-{
- // sequential information
- Abc_Ntk_t * pNtk; // the network
- int nSize; // the number of entries in all internal arrays
- Vec_Int_t * vNums; // the number of latches on each edge in the AIG
- Vec_Ptr_t * vInits; // the initial states for each edge in the AIG
- Extra_MmFixed_t * pMmInits; // memory manager for latch structures used to remember init states
- int fVerbose; // the verbose flag
- float fEpsilon; // the accuracy for delay computation
- int fStandCells; // the flag denoting standard cell mapping
- int nMaxIters; // the max number of iterations
- int FiBestInt; // the best clock period
- float FiBestFloat; // the best clock period
- // K-feasible cuts
- int nVarsMax; // the max cut size
- Cut_Man_t * pCutMan; // cut manager
- Map_SuperLib_t * pSuperLib; // the current supergate library
- // sequential arrival time computation
- Vec_Int_t * vAFlows; // the area flow of each cut
- Vec_Int_t * vLValues; // the arrival times (L-Values of nodes)
- Vec_Int_t * vLValuesN; // the arrival times (L-Values of nodes)
- Vec_Str_t * vLags; // the lags of the mapped nodes
- Vec_Str_t * vLagsN; // the lags of the mapped nodes
- Vec_Str_t * vUses; // the phase usage
- // representation of the mapping
- Vec_Ptr_t * vMapAnds; // nodes visible in the mapping
- Vec_Vec_t * vMapCuts; // best cuts for each node
- Vec_Vec_t * vMapDelays; // the delay of each fanin
- Vec_Vec_t * vMapFanins; // the delay of each fanin
- // runtime stats
- int timeCuts; // runtime to compute the cuts
- int timeDelay; // runtime to compute the L-values
- int timeRet; // runtime to retime the resulting network
- int timeNtk; // runtime to create the final network
-
-};
-
-// data structure to store initial state
-typedef struct Seq_Lat_t_ Seq_Lat_t;
-struct Seq_Lat_t_
-{
- Seq_Lat_t * pNext; // the next Lat in the ring
- Seq_Lat_t * pPrev; // the prev Lat in the ring
- Abc_Obj_t * pLatch; // the real latch corresponding to Lat
-};
-
-// representation of latch on the edge
-typedef struct Seq_RetEdge_t_ Seq_RetEdge_t;
-struct Seq_RetEdge_t_ // 1 word
-{
- unsigned iNode : 24; // the ID of the node
- unsigned iEdge : 1; // the edge of the node
- unsigned iLatch : 7; // the latch number counting from the node
-};
-
-// representation of one retiming step
-typedef struct Seq_RetStep_t_ Seq_RetStep_t;
-struct Seq_RetStep_t_ // 1 word
-{
- unsigned iNode : 24; // the ID of the node
- unsigned nLatches : 8; // the number of latches to retime
-};
-
-// representation of one mapping match
-typedef struct Seq_Match_t_ Seq_Match_t;
-struct Seq_Match_t_ // 3 words
-{
- Abc_Obj_t * pAnd; // the AND gate used in the mapping
- Cut_Cut_t * pCut; // the cut used to map it
- Map_Super_t * pSuper; // the supergate used to implement the cut
- unsigned fCompl : 1; // the polarity of the AND gate
- unsigned fCutInv : 1; // the polarity of the cut
- unsigned PolUse : 2; // the polarity use of this node
- unsigned uPhase : 14; // the phase assignment at the boundary
- unsigned uPhaseR : 14; // the real phase assignment at the boundary
-};
-
-////////////////////////////////////////////////////////////////////////
-/// MACRO DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-// transforming retedges into ints and back
-static inline int Seq_RetEdge2Int( Seq_RetEdge_t Val ) { return *((int *)&Val); }
-static inline Seq_RetEdge_t Seq_Int2RetEdge( int Num ) { return *((Seq_RetEdge_t *)&Num); }
-// transforming retsteps into ints and back
-static inline int Seq_RetStep2Int( Seq_RetStep_t Val ) { return *((int *)&Val); }
-static inline Seq_RetStep_t Seq_Int2RetStep( int Num ) { return *((Seq_RetStep_t *)&Num); }
-
-// manipulating the number of latches on each edge
-static inline Vec_Int_t * Seq_ObjLNums( Abc_Obj_t * pObj ) { return ((Abc_Seq_t*)pObj->pNtk->pManFunc)->vNums; }
-static inline int Seq_ObjFaninL( Abc_Obj_t * pObj, int i ) { return Vec_IntEntry(Seq_ObjLNums(pObj), 2*pObj->Id + i); }
-static inline int Seq_ObjFaninL0( Abc_Obj_t * pObj ) { return Vec_IntEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 0); }
-static inline int Seq_ObjFaninL1( Abc_Obj_t * pObj ) { return Vec_IntEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 1); }
-static inline void Seq_ObjSetFaninL( Abc_Obj_t * pObj, int i, int nLats ) { Vec_IntWriteEntry(Seq_ObjLNums(pObj), 2*pObj->Id + i, nLats); }
-static inline void Seq_ObjSetFaninL0( Abc_Obj_t * pObj, int nLats ) { Vec_IntWriteEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 0, nLats); }
-static inline void Seq_ObjSetFaninL1( Abc_Obj_t * pObj, int nLats ) { Vec_IntWriteEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 1, nLats); }
-static inline void Seq_ObjAddFaninL( Abc_Obj_t * pObj, int i, int nLats ) { Vec_IntAddToEntry(Seq_ObjLNums(pObj), 2*pObj->Id + i, nLats); }
-static inline void Seq_ObjAddFaninL0( Abc_Obj_t * pObj, int nLats ) { Vec_IntAddToEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 0, nLats); }
-static inline void Seq_ObjAddFaninL1( Abc_Obj_t * pObj, int nLats ) { Vec_IntAddToEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 1, nLats); }
-static inline int Seq_ObjFanoutL( Abc_Obj_t * pObj, Abc_Obj_t * pFanout ) { return Seq_ObjFaninL( pFanout, Abc_ObjFanoutEdgeNum(pObj,pFanout) ); }
-static inline void Seq_ObjSetFanoutL( Abc_Obj_t * pObj, Abc_Obj_t * pFanout, int nLats ) { Seq_ObjSetFaninL( pFanout, Abc_ObjFanoutEdgeNum(pObj,pFanout), nLats ); }
-static inline void Seq_ObjAddFanoutL( Abc_Obj_t * pObj, Abc_Obj_t * pFanout, int nLats ) { Seq_ObjAddFaninL( pFanout, Abc_ObjFanoutEdgeNum(pObj,pFanout), nLats ); }
-static inline int Seq_ObjFaninLMin( Abc_Obj_t * pObj ) { assert( Abc_ObjIsNode(pObj) ); return ABC_MIN( Seq_ObjFaninL0(pObj), Seq_ObjFaninL1(pObj) ); }
-static inline int Seq_ObjFaninLMax( Abc_Obj_t * pObj ) { assert( Abc_ObjIsNode(pObj) ); return ABC_MAX( Seq_ObjFaninL0(pObj), Seq_ObjFaninL1(pObj) ); }
-
-// reading l-values and lags
-static inline Vec_Int_t * Seq_NodeLValues( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vLValues; }
-static inline Vec_Int_t * Seq_NodeLValuesN( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vLValuesN; }
-static inline int Seq_NodeGetLValue( Abc_Obj_t * pNode ) { return Vec_IntEntry( Seq_NodeLValues(pNode), (pNode)->Id ); }
-static inline void Seq_NodeSetLValue( Abc_Obj_t * pNode, int Value ) { Vec_IntWriteEntry( Seq_NodeLValues(pNode), (pNode)->Id, Value ); }
-static inline float Seq_NodeGetLValueP( Abc_Obj_t * pNode ) { return Abc_Int2Float( Vec_IntEntry( Seq_NodeLValues(pNode), (pNode)->Id ) ); }
-static inline float Seq_NodeGetLValueN( Abc_Obj_t * pNode ) { return Abc_Int2Float( Vec_IntEntry( Seq_NodeLValuesN(pNode), (pNode)->Id ) ); }
-static inline void Seq_NodeSetLValueP( Abc_Obj_t * pNode, float Value ) { Vec_IntWriteEntry( Seq_NodeLValues(pNode), (pNode)->Id, Abc_Float2Int(Value) ); }
-static inline void Seq_NodeSetLValueN( Abc_Obj_t * pNode, float Value ) { Vec_IntWriteEntry( Seq_NodeLValuesN(pNode), (pNode)->Id, Abc_Float2Int(Value) ); }
-
-// reading area flows
-static inline Vec_Int_t * Seq_NodeFlow( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vAFlows; }
-static inline float Seq_NodeGetFlow( Abc_Obj_t * pNode ) { return Abc_Int2Float( Vec_IntEntry( Seq_NodeFlow(pNode), (pNode)->Id ) ); }
-static inline void Seq_NodeSetFlow( Abc_Obj_t * pNode, float Value ) { Vec_IntWriteEntry( Seq_NodeFlow(pNode), (pNode)->Id, Abc_Float2Int(Value) ); }
-
-// reading the contents of the lat
-static inline Abc_InitType_t Seq_LatInit( Seq_Lat_t * pLat ) { return ((unsigned)pLat->pPrev) & 3; }
-static inline Seq_Lat_t * Seq_LatNext( Seq_Lat_t * pLat ) { return pLat->pNext; }
-static inline Seq_Lat_t * Seq_LatPrev( Seq_Lat_t * pLat ) { return (void *)(((unsigned)pLat->pPrev) & (SEQ_FULL_MASK << 2)); }
-
-// setting the contents of the lat
-static inline void Seq_LatSetInit( Seq_Lat_t * pLat, Abc_InitType_t Init ) { pLat->pPrev = (void *)( (3 & Init) | (((unsigned)pLat->pPrev) & (SEQ_FULL_MASK << 2)) ); }
-static inline void Seq_LatSetNext( Seq_Lat_t * pLat, Seq_Lat_t * pNext ) { pLat->pNext = pNext; }
-static inline void Seq_LatSetPrev( Seq_Lat_t * pLat, Seq_Lat_t * pPrev ) { Abc_InitType_t Init = Seq_LatInit(pLat); pLat->pPrev = pPrev; Seq_LatSetInit(pLat, Init); }
-
-// accessing retiming lags
-static inline Cut_Man_t * Seq_NodeCutMan( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->pCutMan; }
-static inline Vec_Str_t * Seq_NodeLags( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vLags; }
-static inline Vec_Str_t * Seq_NodeLagsN( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vLagsN; }
-static inline char Seq_NodeGetLag( Abc_Obj_t * pNode ) { return Vec_StrEntry( Seq_NodeLags(pNode), (pNode)->Id ); }
-static inline char Seq_NodeGetLagN( Abc_Obj_t * pNode ) { return Vec_StrEntry( Seq_NodeLagsN(pNode), (pNode)->Id ); }
-static inline void Seq_NodeSetLag( Abc_Obj_t * pNode, char Value ) { Vec_StrWriteEntry( Seq_NodeLags(pNode), (pNode)->Id, (Value) ); }
-static inline void Seq_NodeSetLagN( Abc_Obj_t * pNode, char Value ) { Vec_StrWriteEntry( Seq_NodeLagsN(pNode), (pNode)->Id, (Value) ); }
-static inline int Seq_NodeComputeLag( int LValue, int Fi ) { return (LValue + 1024*Fi)/Fi - 1024 - (int)(LValue % Fi == 0); }
-static inline int Seq_NodeComputeLagFloat( float LValue, float Fi ) { return ((int)ceil(LValue/Fi)) - 1; }
-
-// phase usage
-static inline Vec_Str_t * Seq_NodeUses( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vUses; }
-static inline char Seq_NodeGetUses( Abc_Obj_t * pNode ) { return Vec_StrEntry( Seq_NodeUses(pNode), (pNode)->Id ); }
-static inline void Seq_NodeSetUses( Abc_Obj_t * pNode, char Value ) { Vec_StrWriteEntry( Seq_NodeUses(pNode), (pNode)->Id, (Value) ); }
-
-// accessing initial states
-static inline Vec_Ptr_t * Seq_NodeLats( Abc_Obj_t * pObj ) { return ((Abc_Seq_t*)pObj->pNtk->pManFunc)->vInits; }
-static inline Seq_Lat_t * Seq_NodeGetRing( Abc_Obj_t * pObj, int Edge ) { return Vec_PtrEntry( Seq_NodeLats(pObj), (pObj->Id<<1)+Edge ); }
-static inline void Seq_NodeSetRing( Abc_Obj_t * pObj, int Edge, Seq_Lat_t * pLat ) { Vec_PtrWriteEntry( Seq_NodeLats(pObj), (pObj->Id<<1)+Edge, pLat ); }
-static inline Seq_Lat_t * Seq_NodeCreateLat( Abc_Obj_t * pObj ) { Seq_Lat_t * p = (Seq_Lat_t *)Extra_MmFixedEntryFetch( ((Abc_Seq_t*)pObj->pNtk->pManFunc)->pMmInits ); p->pNext = p->pPrev = NULL; p->pLatch = NULL; return p; }
-static inline void Seq_NodeRecycleLat( Abc_Obj_t * pObj, Seq_Lat_t * pLat ) { Extra_MmFixedEntryRecycle( ((Abc_Seq_t*)pObj->pNtk->pManFunc)->pMmInits, (char *)pLat ); }
-
-// getting hold of the structure storing initial states of the latches
-static inline Seq_Lat_t * Seq_NodeGetLatFirst( Abc_Obj_t * pObj, int Edge ) { return Seq_NodeGetRing(pObj, Edge); }
-static inline Seq_Lat_t * Seq_NodeGetLatLast( Abc_Obj_t * pObj, int Edge ) { return Seq_LatPrev( Seq_NodeGetRing(pObj, Edge) ); }
-static inline Seq_Lat_t * Seq_NodeGetLat( Abc_Obj_t * pObj, int Edge, int iLat ) { int c; Seq_Lat_t * pLat = Seq_NodeGetRing(pObj, Edge); for ( c = 0; c != iLat; c++ ) pLat = pLat->pNext; return pLat; }
-static inline int Seq_NodeCountLats( Abc_Obj_t * pObj, int Edge ) { int c; Seq_Lat_t * pLat, * pRing = Seq_NodeGetRing(pObj, Edge); if ( pRing == NULL ) return 0; for ( c = 0, pLat = pRing; !c || pLat != pRing; c++ ) pLat = pLat->pNext; return c; }
-static inline void Seq_NodeCleanLats( Abc_Obj_t * pObj, int Edge ) { int c; Seq_Lat_t * pLat, * pRing = Seq_NodeGetRing(pObj, Edge); if ( pRing == NULL ) return ; for ( c = 0, pLat = pRing; !c || pLat != pRing; c++ ) pLat->pLatch = NULL, pLat = pLat->pNext; return; }
-
-// getting/setting initial states of the latches
-static inline Abc_InitType_t Seq_NodeGetInitOne( Abc_Obj_t * pObj, int Edge, int iLat ) { return Seq_LatInit( Seq_NodeGetLat(pObj, Edge, iLat) ); }
-static inline Abc_InitType_t Seq_NodeGetInitFirst( Abc_Obj_t * pObj, int Edge ) { return Seq_LatInit( Seq_NodeGetLatFirst(pObj, Edge) ); }
-static inline Abc_InitType_t Seq_NodeGetInitLast( Abc_Obj_t * pObj, int Edge ) { return Seq_LatInit( Seq_NodeGetLatLast(pObj, Edge) ); }
-static inline void Seq_NodeSetInitOne( Abc_Obj_t * pObj, int Edge, int iLat, Abc_InitType_t Init ) { Seq_LatSetInit( Seq_NodeGetLat(pObj, Edge, iLat), Init ); }
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== seqAigIter.c =============================================================*/
-extern int Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose );
-extern int Seq_NtkImplementRetiming( Abc_Ntk_t * pNtk, Vec_Str_t * vLags, int fVerbose );
-/*=== seqFpgaIter.c ============================================================*/
-extern int Seq_FpgaMappingDelays( Abc_Ntk_t * pNtk, int fVerbose );
-extern int Seq_FpgaNodeUpdateLValue( Abc_Obj_t * pObj, int Fi );
-/*=== seqMapIter.c ============================================================*/
-extern int Seq_MapRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose );
-/*=== seqRetIter.c =============================================================*/
-extern int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose );
-/*=== seqLatch.c ===============================================================*/
-extern void Seq_NodeInsertFirst( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init );
-extern void Seq_NodeInsertLast( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init );
-extern Abc_InitType_t Seq_NodeDeleteFirst( Abc_Obj_t * pObj, int Edge );
-extern Abc_InitType_t Seq_NodeDeleteLast( Abc_Obj_t * pObj, int Edge );
-/*=== seqUtil.c ================================================================*/
-extern int Seq_NtkLevelMax( Abc_Ntk_t * pNtk );
-extern int Seq_ObjFanoutLMax( Abc_Obj_t * pObj );
-extern int Seq_ObjFanoutLMin( Abc_Obj_t * pObj );
-extern int Seq_ObjFanoutLSum( Abc_Obj_t * pObj );
-extern int Seq_ObjFaninLSum( Abc_Obj_t * pObj );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/base/seq/seqLatch.c b/src/base/seq/seqLatch.c
deleted file mode 100644
index f6384fcb..00000000
--- a/src/base/seq/seqLatch.c
+++ /dev/null
@@ -1,228 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqLatch.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [Manipulation of latch data structures representing initial states.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqLatch.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Insert the first Lat on the edge.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NodeInsertFirst( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init )
-{
- Seq_Lat_t * pLat, * pRing, * pPrev;
- pRing = Seq_NodeGetRing( pObj, Edge );
- pLat = Seq_NodeCreateLat( pObj );
- if ( pRing == NULL )
- {
- Seq_LatSetPrev( pLat, pLat );
- Seq_LatSetNext( pLat, pLat );
- Seq_NodeSetRing( pObj, Edge, pLat );
- }
- else
- {
- pPrev = Seq_LatPrev( pRing );
- Seq_LatSetPrev( pLat, pPrev );
- Seq_LatSetNext( pPrev, pLat );
- Seq_LatSetPrev( pRing, pLat );
- Seq_LatSetNext( pLat, pRing );
- Seq_NodeSetRing( pObj, Edge, pLat ); // rotate the ring to make pLat the first
- }
- Seq_LatSetInit( pLat, Init );
- Seq_ObjAddFaninL( pObj, Edge, 1 );
- assert( pLat->pLatch == NULL );
-}
-
-/**Function*************************************************************
-
- Synopsis [Insert the last Lat on the edge.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NodeInsertLast( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init )
-{
- Seq_Lat_t * pLat, * pRing, * pPrev;
- pRing = Seq_NodeGetRing( pObj, Edge );
- pLat = Seq_NodeCreateLat( pObj );
- if ( pRing == NULL )
- {
- Seq_LatSetPrev( pLat, pLat );
- Seq_LatSetNext( pLat, pLat );
- Seq_NodeSetRing( pObj, Edge, pLat );
- }
- else
- {
- pPrev = Seq_LatPrev( pRing );
- Seq_LatSetPrev( pLat, pPrev );
- Seq_LatSetNext( pPrev, pLat );
- Seq_LatSetPrev( pRing, pLat );
- Seq_LatSetNext( pLat, pRing );
- }
- Seq_LatSetInit( pLat, Init );
- Seq_ObjAddFaninL( pObj, Edge, 1 );
-}
-
-/**Function*************************************************************
-
- Synopsis [Delete the first Lat on the edge.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_InitType_t Seq_NodeDeleteFirst( Abc_Obj_t * pObj, int Edge )
-{
- Abc_InitType_t Init;
- Seq_Lat_t * pLat, * pRing, * pPrev, * pNext;
- pRing = Seq_NodeGetRing( pObj, Edge );
- pLat = pRing; // consider the first latch
- if ( pLat->pNext == pLat )
- Seq_NodeSetRing( pObj, Edge, NULL );
- else
- {
- pPrev = Seq_LatPrev( pLat );
- pNext = Seq_LatNext( pLat );
- Seq_LatSetPrev( pNext, pPrev );
- Seq_LatSetNext( pPrev, pNext );
- Seq_NodeSetRing( pObj, Edge, pNext ); // rotate the ring
- }
- Init = Seq_LatInit( pLat );
- Seq_NodeRecycleLat( pObj, pLat );
- Seq_ObjAddFaninL( pObj, Edge, -1 );
- return Init;
-}
-
-/**Function*************************************************************
-
- Synopsis [Delete the last Lat on the edge.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_InitType_t Seq_NodeDeleteLast( Abc_Obj_t * pObj, int Edge )
-{
- Abc_InitType_t Init;
- Seq_Lat_t * pLat, * pRing, * pPrev, * pNext;
- pRing = Seq_NodeGetRing( pObj, Edge );
- pLat = Seq_LatPrev( pRing ); // consider the last latch
- if ( pLat->pNext == pLat )
- Seq_NodeSetRing( pObj, Edge, NULL );
- else
- {
- pPrev = Seq_LatPrev( pLat );
- pNext = Seq_LatNext( pLat );
- Seq_LatSetPrev( pNext, pPrev );
- Seq_LatSetNext( pPrev, pNext );
- }
- Init = Seq_LatInit( pLat );
- Seq_NodeRecycleLat( pObj, pLat );
- Seq_ObjAddFaninL( pObj, Edge, -1 );
- return Init;
-}
-
-/**Function*************************************************************
-
- Synopsis [Insert the last Lat on the edge.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NodeDupLats( Abc_Obj_t * pObjNew, Abc_Obj_t * pObj, int Edge )
-{
- Seq_Lat_t * pRing, * pLat;
- int i, nLatches;
- pRing = Seq_NodeGetRing( pObj, Edge );
- if ( pRing == NULL )
- return;
- nLatches = Seq_NodeCountLats( pObj, Edge );
- for ( i = 0, pLat = pRing; i < nLatches; i++, pLat = pLat->pNext )
- Seq_NodeInsertLast( pObjNew, Edge, Seq_LatInit(pLat) );
-}
-
-/**Function*************************************************************
-
- Synopsis [Insert the last Lat on the edge.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NodeCompareLats( Abc_Obj_t * pObj1, int Edge1, Abc_Obj_t * pObj2, int Edge2 )
-{
- Seq_Lat_t * pRing1, * pRing2, * pLat1, * pLat2;
- int i, nLatches1, nLatches2;
-
- nLatches1 = Seq_NodeCountLats( pObj1, Edge1 );
- nLatches2 = Seq_NodeCountLats( pObj2, Edge2 );
- if ( nLatches1 != nLatches2 )
- return 0;
-
- pRing1 = Seq_NodeGetRing( pObj1, Edge1 );
- pRing2 = Seq_NodeGetRing( pObj2, Edge2 );
- for ( i = 0, pLat1 = pRing1, pLat2 = pRing2; i < nLatches1; i++, pLat1 = pLat1->pNext, pLat2 = pLat2->pNext )
- if ( Seq_LatInit(pLat1) != Seq_LatInit(pLat2) )
- return 0;
-
- return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqMan.c b/src/base/seq/seqMan.c
deleted file mode 100644
index d0697b36..00000000
--- a/src/base/seq/seqMan.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqMan.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [Manager of sequential AIG containing.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Allocates sequential AIG manager.]
-
- Description [The manager contains all the data structures needed to
- represent sequential AIG and compute stand-alone retiming as well as
- the integrated mapping/retiming of the sequential AIG.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Seq_t * Seq_Create( Abc_Ntk_t * pNtk )
-{
- Abc_Seq_t * p;
- // start the manager
- p = ALLOC( Abc_Seq_t, 1 );
- memset( p, 0, sizeof(Abc_Seq_t) );
- p->pNtk = pNtk;
- p->nSize = 1000;
- p->nMaxIters = 15;
- p->pMmInits = Extra_MmFixedStart( sizeof(Seq_Lat_t) );
- p->fEpsilon = (float)0.001;
- // create internal data structures
- p->vNums = Vec_IntStart( 2 * p->nSize );
- p->vInits = Vec_PtrStart( 2 * p->nSize );
- p->vLValues = Vec_IntStart( p->nSize );
- p->vLags = Vec_StrStart( p->nSize );
- p->vLValuesN = Vec_IntStart( p->nSize );
- p->vAFlows = Vec_IntStart( p->nSize );
- p->vLagsN = Vec_StrStart( p->nSize );
- p->vUses = Vec_StrStart( p->nSize );
- return p;
-}
-
-/**Function*************************************************************
-
- Synopsis [Deallocates sequential AIG manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_Resize( Abc_Seq_t * p, int nMaxId )
-{
- if ( p->nSize > nMaxId )
- return;
- p->nSize = nMaxId + 1;
- Vec_IntFill( p->vNums, 2 * p->nSize, 0 );
- Vec_PtrFill( p->vInits, 2 * p->nSize, NULL );
- Vec_IntFill( p->vLValues, p->nSize, 0 );
- Vec_StrFill( p->vLags, p->nSize, 0 );
- Vec_IntFill( p->vLValuesN, p->nSize, 0 );
- Vec_IntFill( p->vAFlows, p->nSize, 0 );
- Vec_StrFill( p->vLagsN, p->nSize, 0 );
- Vec_StrFill( p->vUses, p->nSize, 0 );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Deallocates sequential AIG manager.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_Delete( Abc_Seq_t * p )
-{
- if ( p->fStandCells && p->vMapAnds )
- {
- void * pVoid; int i;
- Vec_PtrForEachEntry( void *, p->vMapAnds, pVoid, i )
- free( pVoid );
- }
- if ( p->vMapDelays ) Vec_VecFree( p->vMapDelays ); // the nodes used in the mapping
- if ( p->vMapFanins ) Vec_VecFree( p->vMapFanins ); // the cuts used in the mapping
- if ( p->vMapAnds ) Vec_PtrFree( p->vMapAnds ); // the nodes used in the mapping
- if ( p->vMapCuts ) Vec_VecFree( p->vMapCuts ); // the cuts used in the mapping
- if ( p->vLValues ) Vec_IntFree( p->vLValues ); // the arrival times (L-Values of nodes)
- if ( p->vLags ) Vec_StrFree( p->vLags ); // the lags of the mapped nodes
- if ( p->vLValuesN ) Vec_IntFree( p->vLValuesN ); // the arrival times (L-Values of nodes)
- if ( p->vAFlows ) Vec_IntFree( p->vAFlows ); // the arrival times (L-Values of nodes)
- if ( p->vLagsN ) Vec_StrFree( p->vLagsN ); // the lags of the mapped nodes
- if ( p->vUses ) Vec_StrFree( p->vUses ); // the uses of phases
- if ( p->vInits ) Vec_PtrFree( p->vInits ); // the initial values of the latches
- if ( p->vNums ) Vec_IntFree( p->vNums ); // the numbers of latches
- Extra_MmFixedStop( p->pMmInits );
- free( p );
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqMapCore.c b/src/base/seq/seqMapCore.c
deleted file mode 100644
index db1da0bc..00000000
--- a/src/base/seq/seqMapCore.c
+++ /dev/null
@@ -1,657 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqMapCore.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [The core of SC mapping/retiming package.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqMapCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-#include "main.h"
-#include "mio.h"
-#include "mapper.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-extern Abc_Ntk_t * Seq_NtkMapDup( Abc_Ntk_t * pNtk );
-extern int Seq_NtkMapInitCompatible( Abc_Ntk_t * pNtk, int fVerbose );
-extern Abc_Ntk_t * Seq_NtkSeqMapMapped( Abc_Ntk_t * pNtk );
-
-static int Seq_MapMappingCount( Abc_Ntk_t * pNtk );
-static int Seq_MapMappingCount_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves );
-static Abc_Obj_t * Seq_MapMappingBuild_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, unsigned SeqEdge, int fTop, int fCompl, int LagCut, Vec_Ptr_t * vLeaves, unsigned uPhase );
-static DdNode * Seq_MapMappingBdd_rec( DdManager * dd, Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves );
-static void Seq_MapMappingEdges_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, Vec_Ptr_t * vLeaves, Vec_Vec_t * vMapEdges );
-static void Seq_MapMappingConnect_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves );
-static DdNode * Seq_MapMappingConnectBdd_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves );
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Performs Map mapping and retiming.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Seq_MapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Abc_Ntk_t * pNtkNew;
- Abc_Ntk_t * pNtkMap;
- int RetValue;
-
- // derive the supergate library
- if ( Abc_FrameReadLibSuper() == NULL && Abc_FrameReadLibGen() )
- {
-// printf( "A simple supergate library is derived from gate library \"%s\".\n",
-// Mio_LibraryReadName(Abc_FrameReadLibGen()) );
- Map_SuperLibDeriveFromGenlib( Abc_FrameReadLibGen() );
- }
- p->pSuperLib = Abc_FrameReadLibSuper();
- p->nVarsMax = Map_SuperLibReadVarsMax(p->pSuperLib);
- p->nMaxIters = nMaxIters;
- p->fStandCells = 1;
-
- // find the best mapping and retiming for all nodes (p->vLValues, p->vBestCuts, p->vLags)
- if ( !Seq_MapRetimeDelayLags( pNtk, fVerbose ) )
- return NULL;
- if ( RetValue = Abc_NtkGetChoiceNum(pNtk) )
- {
- printf( "The network has %d choices. The resulting network is not derived (this is temporary).\n", RetValue );
- printf( "The mininum clock period computed is %5.2f.\n", p->FiBestFloat );
- return NULL;
- }
- printf( "The mininum clock period computed is %5.2f.\n", p->FiBestFloat );
- printf( "The resulting network is derived as BDD logic network (this is temporary).\n" );
-
- // duplicate the nodes contained in multiple cuts
- pNtkNew = Seq_NtkMapDup( pNtk );
-
- // implement the retiming
- RetValue = Seq_NtkImplementRetiming( pNtkNew, ((Abc_Seq_t *)pNtkNew->pManFunc)->vLags, fVerbose );
- if ( RetValue == 0 )
- printf( "Retiming completed but initial state computation has failed.\n" );
-
- // check the compatibility of initial states computed
- if ( RetValue = Seq_NtkMapInitCompatible( pNtkNew, fVerbose ) )
- printf( "The number of LUTs with incompatible edges = %d.\n", RetValue );
-// return pNtkNew;
-
- // create the final mapped network
- pNtkMap = Seq_NtkSeqMapMapped( pNtkNew );
- Abc_NtkDelete( pNtkNew );
- return pNtkMap;
-}
-
-/**Function*************************************************************
-
- Synopsis [Derives the network by duplicating some of the nodes.]
-
- Description [Information about mapping is given as mapping nodes (p->vMapAnds)
- and best cuts for each node (p->vMapCuts).]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Seq_NtkMapDup( Abc_Ntk_t * pNtk )
-{
- Abc_Seq_t * pNew, * p = pNtk->pManFunc;
- Seq_Match_t * pMatch;
- Abc_Ntk_t * pNtkNew;
- Abc_Obj_t * pObj, * pFanin, * pFaninNew, * pLeaf;
- Vec_Ptr_t * vLeaves;
- unsigned SeqEdge;
- int i, k, nObjsNew, Lag;
-
- assert( Abc_NtkIsSeq(pNtk) );
-
- // start the expanded network
- pNtkNew = Abc_NtkStartFrom( pNtk, pNtk->ntkType, pNtk->ntkFunc );
- Abc_NtkCleanNext(pNtk);
-
- // start the new sequential AIG manager
- nObjsNew = 1 + Abc_NtkPiNum(pNtk) + Abc_NtkPoNum(pNtk) + Seq_MapMappingCount(pNtk);
- Seq_Resize( pNtkNew->pManFunc, nObjsNew );
-
- // duplicate the nodes in the mapping
- Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i )
- {
-// Abc_NtkDupObj( pNtkNew, pMatch->pAnd );
- if ( !pMatch->fCompl )
- pMatch->pAnd->pCopy = Abc_NtkCreateNode( pNtkNew );
- else
- pMatch->pAnd->pNext = Abc_NtkCreateNode( pNtkNew );
- }
-
- // compute the real phase assignment
- Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i )
- {
- pMatch->uPhaseR = 0;
- // get the leaves of the cut
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
- // convert the leaf nodes
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, k )
- {
- SeqEdge = (unsigned)pLeaf;
- pLeaf = Abc_NtkObj( pNtk, SeqEdge >> 8 );
-
- // set the phase
- if ( pMatch->uPhase & (1 << k) ) // neg is required
- {
- if ( pLeaf->pNext ) // neg is available
- pMatch->uPhaseR |= (1 << k); // neg is used
-// else
-// Seq_NodeSetLag( pLeaf, Seq_NodeGetLagN(pLeaf) );
- }
- else // pos is required
- {
- if ( pLeaf->pCopy == NULL ) // pos is not available
- pMatch->uPhaseR |= (1 << k); // neg is used
-// else
-// Seq_NodeSetLagN( pLeaf, Seq_NodeGetLag(pLeaf) );
- }
- }
- }
-
-
- // recursively construct the internals of each node
- Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i )
- {
-// if ( pMatch->pSuper == NULL )
-// {
-// int x = 0;
-// }
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
- if ( !pMatch->fCompl )
- Seq_MapMappingBuild_rec( pNtkNew, pNtk, pMatch->pAnd->Id << 8, 1, pMatch->fCompl, Seq_NodeGetLag(pMatch->pAnd), vLeaves, pMatch->uPhaseR );
- else
- Seq_MapMappingBuild_rec( pNtkNew, pNtk, pMatch->pAnd->Id << 8, 1, pMatch->fCompl, Seq_NodeGetLagN(pMatch->pAnd), vLeaves, pMatch->uPhaseR );
- }
- assert( nObjsNew == pNtkNew->nObjs );
-
- // set the POs
-// Abc_NtkFinalize( pNtk, pNtkNew );
- Abc_NtkForEachPo( pNtk, pObj, i )
- {
- pFanin = Abc_ObjFanin0(pObj);
- if ( Abc_ObjFaninC0(pObj) )
- pFaninNew = pFanin->pNext ? pFanin->pNext : pFanin->pCopy;
- else
- pFaninNew = pFanin->pCopy ? pFanin->pCopy : pFanin->pNext;
- pFaninNew = Abc_ObjNotCond( pFaninNew, Abc_ObjFaninC0(pObj) );
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
- }
-
- // duplicate the latches on the PO edges
- Abc_NtkForEachPo( pNtk, pObj, i )
- Seq_NodeDupLats( pObj->pCopy, pObj, 0 );
-
- // transfer the mapping info to the new manager
- Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i )
- {
- // get the leaves of the cut
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
- // convert the leaf nodes
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, k )
- {
- SeqEdge = (unsigned)pLeaf;
- pLeaf = Abc_NtkObj( pNtk, SeqEdge >> 8 );
-
-// Lag = (SeqEdge & 255) + Seq_NodeGetLag(pMatch->pAnd) - Seq_NodeGetLag(pLeaf);
- Lag = (SeqEdge & 255) +
- (pMatch->fCompl? Seq_NodeGetLagN(pMatch->pAnd) : Seq_NodeGetLag(pMatch->pAnd)) -
- (((pMatch->uPhaseR & (1 << k)) > 0)? Seq_NodeGetLagN(pLeaf) : Seq_NodeGetLag(pLeaf) );
-
- assert( Lag >= 0 );
-
- // translate the old leaf into the leaf in the new network
-// if ( pMatch->uPhase & (1 << k) ) // negative phase is required
-// pFaninNew = pLeaf->pNext? pLeaf->pNext : pLeaf->pCopy;
-// else // positive phase is required
-// pFaninNew = pLeaf->pCopy? pLeaf->pCopy : pLeaf->pNext;
-
- // translate the old leaf into the leaf in the new network
- if ( pMatch->uPhaseR & (1 << k) ) // negative phase is required
- pFaninNew = pLeaf->pNext;
- else // positive phase is required
- pFaninNew = pLeaf->pCopy;
-
- Vec_PtrWriteEntry( vLeaves, k, (void *)((pFaninNew->Id << 8) | Lag) );
-// printf( "%d -> %d\n", pLeaf->Id, pLeaf->pCopy->Id );
-
- // UPDATE PHASE!!! leaving only those bits that require inverters
- }
- // convert the root node
-// Vec_PtrWriteEntry( p->vMapAnds, i, pObj->pCopy );
- pMatch->pAnd = pMatch->fCompl? pMatch->pAnd->pNext : pMatch->pAnd->pCopy;
- }
- pNew = pNtkNew->pManFunc;
- pNew->nVarsMax = p->nVarsMax;
- pNew->vMapAnds = p->vMapAnds; p->vMapAnds = NULL;
- pNew->vMapCuts = p->vMapCuts; p->vMapCuts = NULL;
- pNew->fStandCells = p->fStandCells; p->fStandCells = 0;
-
- if ( !Abc_NtkCheck( pNtkNew ) )
- fprintf( stdout, "Seq_NtkMapDup(): Network check has failed.\n" );
- return pNtkNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Checks if the initial states are compatible.]
-
- Description [Checks of all the initial states on the fanins edges
- of the cut have compatible number of latches and initial states.
- If this is not true, then the mapped network with the does not have initial
- state. Returns the number of LUTs with incompatible edges.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkMapInitCompatible( Abc_Ntk_t * pNtk, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Seq_Match_t * pMatch;
- Abc_Obj_t * pAnd, * pLeaf, * pFanout0, * pFanout1;
- Vec_Vec_t * vTotalEdges;
- Vec_Ptr_t * vLeaves, * vEdges;
- int i, k, m, Edge0, Edge1, nLatchAfter, nLatches1, nLatches2;
- unsigned SeqEdge;
- int CountBad = 0, CountAll = 0;
-
- vTotalEdges = Vec_VecStart( p->nVarsMax );
- // go through all the nodes (cuts) used in the mapping
- Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i )
- {
- pAnd = pMatch->pAnd;
-// printf( "*** Node %d.\n", pAnd->Id );
-
- // get the cut of this gate
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
-
- // get the edges pointing to the leaves
- Vec_VecClear( vTotalEdges );
- Seq_MapMappingEdges_rec( pNtk, pAnd->Id << 8, NULL, vLeaves, vTotalEdges );
-
- // for each leaf, consider its edges
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, k )
- {
- SeqEdge = (unsigned)pLeaf;
- pLeaf = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- nLatchAfter = SeqEdge & 255;
- if ( nLatchAfter == 0 )
- continue;
-
- // go through the edges
- vEdges = Vec_VecEntry( vTotalEdges, k );
- pFanout0 = NULL;
- Vec_PtrForEachEntry( Abc_Obj_t *, vEdges, pFanout1, m )
- {
- Edge1 = Abc_ObjIsComplement(pFanout1);
- pFanout1 = Abc_ObjRegular(pFanout1);
-//printf( "Fanin = %d. Fanout = %d.\n", pLeaf->Id, pFanout1->Id );
-
- // make sure this is the same fanin
- if ( Edge1 )
- assert( pLeaf == Abc_ObjFanin1(pFanout1) );
- else
- assert( pLeaf == Abc_ObjFanin0(pFanout1) );
-
- // save the first one
- if ( pFanout0 == NULL )
- {
- pFanout0 = pFanout1;
- Edge0 = Edge1;
- continue;
- }
- // compare the rings
- // if they have different number of latches, this is the bug
- nLatches1 = Seq_NodeCountLats(pFanout0, Edge0);
- nLatches2 = Seq_NodeCountLats(pFanout1, Edge1);
- assert( nLatches1 == nLatches2 );
- assert( nLatches1 == nLatchAfter );
- assert( nLatches1 > 0 );
-
- // if they have different initial states, this is the problem
- if ( !Seq_NodeCompareLats(pFanout0, Edge0, pFanout1, Edge1) )
- {
- CountBad++;
- break;
- }
- CountAll++;
- }
- }
- }
- if ( fVerbose )
- printf( "The number of pairs of edges checked = %d.\n", CountAll );
- Vec_VecFree( vTotalEdges );
- return CountBad;
-}
-
-/**Function*************************************************************
-
- Synopsis [Derives the final mapped network.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Seq_NtkSeqMapMapped( Abc_Ntk_t * pNtk )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Seq_Match_t * pMatch;
- Abc_Ntk_t * pNtkMap;
- Vec_Ptr_t * vLeaves;
- Abc_Obj_t * pObj, * pFaninNew;
- Seq_Lat_t * pRing;
- int i;
-
- assert( Abc_NtkIsSeq(pNtk) );
-
- // start the network
- pNtkMap = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD );
-
- // duplicate the nodes used in the mapping
- Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i )
- pMatch->pAnd->pCopy = Abc_NtkCreateNode( pNtkMap );
-
- // create and share the latches
- Seq_NtkShareLatchesMapping( pNtkMap, pNtk, p->vMapAnds, 0 );
-
- // connect the nodes
- Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i )
- {
- pObj = pMatch->pAnd;
- // get the leaves of this gate
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
- // get the BDD of the node
- pObj->pCopy->pData = Seq_MapMappingConnectBdd_rec( pNtk, pObj->Id << 8, NULL, -1, pObj, vLeaves );
- Cudd_Ref( pObj->pCopy->pData );
- // complement the BDD of the cut if it came from the opposite polarity choice cut
-// if ( Vec_StrEntry(p->vPhase, i) )
-// pObj->pCopy->pData = Cudd_Not( pObj->pCopy->pData );
- }
-
- // set the POs
- Abc_NtkForEachPo( pNtk, pObj, i )
- {
- if ( pRing = Seq_NodeGetRing(pObj,0) )
- pFaninNew = pRing->pLatch;
- else
- pFaninNew = Abc_ObjFanin0(pObj)->pCopy;
- pFaninNew = Abc_ObjNotCond( pFaninNew, Abc_ObjFaninC0(pObj) );
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
- }
-
- // add the latches and their names
- Abc_NtkAddDummyBoxNames( pNtkMap );
- Abc_NtkOrderCisCos( pNtkMap );
- // fix the problem with complemented and duplicated CO edges
- Abc_NtkLogicMakeSimpleCos( pNtkMap, 1 );
- // make the network minimum base
- Abc_NtkMinimumBase( pNtkMap );
- if ( !Abc_NtkCheck( pNtkMap ) )
- fprintf( stdout, "Seq_NtkSeqFpgaMapped(): Network check has failed.\n" );
- return pNtkMap;
-}
-
-
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of nodes in the bag.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_MapMappingCount( Abc_Ntk_t * pNtk )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Vec_Ptr_t * vLeaves;
- Seq_Match_t * pMatch;
- int i, Counter = 0;
- Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i )
- {
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
- Counter += Seq_MapMappingCount_rec( pNtk, pMatch->pAnd->Id << 8, vLeaves );
- }
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of nodes in the bag.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_MapMappingCount_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves )
-{
- Abc_Obj_t * pObj, * pLeaf;
- unsigned SeqEdge0, SeqEdge1;
- int Lag, i;
- // get the object and the lag
- pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- Lag = SeqEdge & 255;
- // if the node is the fanin of the cut, return
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- if ( SeqEdge == (unsigned)pLeaf )
- return 0;
- // continue unfolding
- assert( Abc_AigNodeIsAnd(pObj) );
- // get new sequential edges
- assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
- assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
- SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj);
- SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj);
- // call for the children
- return 1 + Seq_MapMappingCount_rec( pNtk, SeqEdge0, vLeaves ) +
- Seq_MapMappingCount_rec( pNtk, SeqEdge1, vLeaves );
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the edges pointing to the leaves of the cut.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t * Seq_MapMappingBuild_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, unsigned SeqEdge, int fTop, int fCompl, int LagCut, Vec_Ptr_t * vLeaves, unsigned uPhase )
-{
- Abc_Obj_t * pObj, * pObjNew, * pLeaf, * pFaninNew0, * pFaninNew1;
- unsigned SeqEdge0, SeqEdge1;
- int Lag, i;
- // get the object and the lag
- pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- Lag = SeqEdge & 255;
- // if the node is the fanin of the cut, return
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- if ( SeqEdge == (unsigned)pLeaf )
- {
-// if ( uPhase & (1 << i) ) // negative phase is required
-// return pObj->pNext? pObj->pNext : pObj->pCopy;
-// else // positive phase is required
-// return pObj->pCopy? pObj->pCopy : pObj->pNext;
-
- if ( uPhase & (1 << i) ) // negative phase is required
- return pObj->pNext;
- else // positive phase is required
- return pObj->pCopy;
- }
- // continue unfolding
- assert( Abc_AigNodeIsAnd(pObj) );
- // get new sequential edges
- assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
- assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
- SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj);
- SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj);
- // call for the children
- pObjNew = fTop? (fCompl? pObj->pNext : pObj->pCopy) : Abc_NtkCreateNode( pNtkNew );
- // solve subproblems
- pFaninNew0 = Seq_MapMappingBuild_rec( pNtkNew, pNtk, SeqEdge0, 0, fCompl, LagCut, vLeaves, uPhase );
- pFaninNew1 = Seq_MapMappingBuild_rec( pNtkNew, pNtk, SeqEdge1, 0, fCompl, LagCut, vLeaves, uPhase );
- // add the fanins to the node
- Abc_ObjAddFanin( pObjNew, Abc_ObjNotCond( pFaninNew0, Abc_ObjFaninC0(pObj) ) );
- Abc_ObjAddFanin( pObjNew, Abc_ObjNotCond( pFaninNew1, Abc_ObjFaninC1(pObj) ) );
- Seq_NodeDupLats( pObjNew, pObj, 0 );
- Seq_NodeDupLats( pObjNew, pObj, 1 );
- // set the lag of the new node equal to the internal lag plus mapping/retiming lag
- Seq_NodeSetLag( pObjNew, (char)(Lag + LagCut) );
-// Seq_NodeSetLag( pObjNew, (char)(Lag) );
- return pObjNew;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Collects the edges pointing to the leaves of the cut.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_MapMappingEdges_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, Vec_Ptr_t * vLeaves, Vec_Vec_t * vMapEdges )
-{
- Abc_Obj_t * pObj, * pLeaf;
- unsigned SeqEdge0, SeqEdge1;
- int Lag, i;
- // get the object and the lag
- pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- Lag = SeqEdge & 255;
- // if the node is the fanin of the cut, return
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- {
- if ( SeqEdge == (unsigned)pLeaf )
- {
- assert( pPrev != NULL );
- Vec_VecPush( vMapEdges, i, pPrev );
- return;
- }
- }
- // continue unfolding
- assert( Abc_AigNodeIsAnd(pObj) );
- // get new sequential edges
- assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
- assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
- SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj);
- SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj);
- // call for the children
- Seq_MapMappingEdges_rec( pNtk, SeqEdge0, pObj , vLeaves, vMapEdges );
- Seq_MapMappingEdges_rec( pNtk, SeqEdge1, Abc_ObjNot(pObj), vLeaves, vMapEdges );
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects the edges pointing to the leaves of the cut.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-DdNode * Seq_MapMappingConnectBdd_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves )
-{
- Seq_Lat_t * pRing;
- Abc_Obj_t * pObj, * pLeaf, * pFanin, * pFaninNew;
- unsigned SeqEdge0, SeqEdge1;
- DdManager * dd = pRoot->pCopy->pNtk->pManFunc;
- DdNode * bFunc, * bFunc0, * bFunc1;
- int Lag, i, k;
- // get the object and the lag
- pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 );
- Lag = SeqEdge & 255;
- // if the node is the fanin of the cut, add the connection and return
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- {
- if ( SeqEdge == (unsigned)pLeaf )
- {
- assert( pPrev != NULL );
- if ( pRing = Seq_NodeGetRing(pPrev,Edge) )
- pFaninNew = pRing->pLatch;
- else
- pFaninNew = Abc_ObjFanin(pPrev,Edge)->pCopy;
-
- // check if the root already has this fanin
- Abc_ObjForEachFanin( pRoot->pCopy, pFanin, k )
- if ( pFanin == pFaninNew )
- return Cudd_bddIthVar( dd, k );
- Abc_ObjAddFanin( pRoot->pCopy, pFaninNew );
- return Cudd_bddIthVar( dd, k );
- }
- }
- // continue unfolding
- assert( Abc_AigNodeIsAnd(pObj) );
- // get new sequential edges
- assert( Lag + Seq_ObjFaninL0(pObj) < 255 );
- assert( Lag + Seq_ObjFaninL1(pObj) < 255 );
- SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj);
- SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj);
- // call for the children
- bFunc0 = Seq_MapMappingConnectBdd_rec( pNtk, SeqEdge0, pObj, 0, pRoot, vLeaves ); Cudd_Ref( bFunc0 );
- bFunc1 = Seq_MapMappingConnectBdd_rec( pNtk, SeqEdge1, pObj, 1, pRoot, vLeaves ); Cudd_Ref( bFunc1 );
- bFunc0 = Cudd_NotCond( bFunc0, Abc_ObjFaninC0(pObj) );
- bFunc1 = Cudd_NotCond( bFunc1, Abc_ObjFaninC1(pObj) );
- // get the BDD of the node
- bFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 ); Cudd_Ref( bFunc );
- Cudd_RecursiveDeref( dd, bFunc0 );
- Cudd_RecursiveDeref( dd, bFunc1 );
- // return the BDD
- Cudd_Deref( bFunc );
- return bFunc;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqMapIter.c b/src/base/seq/seqMapIter.c
deleted file mode 100644
index bb762d62..00000000
--- a/src/base/seq/seqMapIter.c
+++ /dev/null
@@ -1,628 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqMapIter.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [Iterative delay computation in SC mapping/retiming package.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqMapIter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-#include "main.h"
-#include "mio.h"
-#include "mapperInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-// the internal procedures
-static float Seq_MapRetimeDelayLagsInternal( Abc_Ntk_t * pNtk, int fVerbose );
-static float Seq_MapRetimeSearch_rec( Abc_Ntk_t * pNtk, float FiMin, float FiMax, float Delta, int fVerbose );
-static int Seq_MapRetimeForPeriod( Abc_Ntk_t * pNtk, float Fi, int fVerbose );
-static int Seq_MapNodeUpdateLValue( Abc_Obj_t * pObj, float Fi, float DelayInv );
-static float Seq_MapCollectNode_rec( Abc_Obj_t * pAnd, float FiBest, Vec_Ptr_t * vMapping, Vec_Vec_t * vMapCuts );
-static void Seq_MapCanonicizeTruthTables( Abc_Ntk_t * pNtk );
-
-extern Cut_Man_t * Abc_NtkSeqCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams );
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Computes the retiming lags for FPGA mapping.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_MapRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Cut_Params_t Params, * pParams = &Params;
- Abc_Obj_t * pObj;
- float TotalArea;
- int i, clk;
-
- // set defaults for cut computation
- memset( pParams, 0, sizeof(Cut_Params_t) );
- pParams->nVarsMax = p->nVarsMax; // the max cut size ("k" of the k-feasible cuts)
- pParams->nKeepMax = 1000; // the max number of cuts kept at a node
- pParams->fTruth = 1; // compute truth tables
- pParams->fFilter = 1; // filter dominated cuts
- pParams->fSeq = 1; // compute sequential cuts
- pParams->fVerbose = fVerbose; // the verbosiness flag
-
- // compute the cuts
-clk = clock();
- p->pCutMan = Abc_NtkSeqCuts( pNtk, pParams );
-p->timeCuts = clock() - clk;
- if ( fVerbose )
- Cut_ManPrintStats( p->pCutMan );
-
- // compute canonical forms of the truth tables of the cuts
- Seq_MapCanonicizeTruthTables( pNtk );
-
- // compute area flows
-// Seq_MapComputeAreaFlows( pNtk, fVerbose );
-
- // compute the delays
-clk = clock();
- p->FiBestFloat = Seq_MapRetimeDelayLagsInternal( pNtk, fVerbose );
- if ( p->FiBestFloat == 0.0 )
- return 0;
-p->timeDelay = clock() - clk;
-/*
- {
- FILE * pTable;
- pTable = fopen( "stats.txt", "a+" );
- fprintf( pTable, "%s ", pNtk->pName );
- fprintf( pTable, "%.2f ", p->FiBestFloat );
- fprintf( pTable, "%.2f ", (float)(p->timeCuts)/(float)(CLOCKS_PER_SEC) );
- fprintf( pTable, "%.2f ", (float)(p->timeDelay)/(float)(CLOCKS_PER_SEC) );
- fprintf( pTable, "\n" );
- fclose( pTable );
- }
-*/
- // clean the marks
- Abc_NtkForEachObj( pNtk, pObj, i )
- assert( !pObj->fMarkA && !pObj->fMarkB );
-
- // collect the nodes and cuts used in the mapping
- p->vMapAnds = Vec_PtrAlloc( 1000 );
- p->vMapCuts = Vec_VecAlloc( 1000 );
- TotalArea = 0.0;
- Abc_NtkForEachPo( pNtk, pObj, i )
- TotalArea += Seq_MapCollectNode_rec( Abc_ObjChild0(pObj), p->FiBestFloat, p->vMapAnds, p->vMapCuts );
-
- // clean the marks
- Abc_NtkForEachObj( pNtk, pObj, i )
- pObj->fMarkA = pObj->fMarkB = 0;
-
- if ( fVerbose )
- printf( "Total area = %6.2f.\n", TotalArea );
-
- // remove the cuts
- Cut_ManStop( p->pCutMan );
- p->pCutMan = NULL;
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Retimes AIG for optimal delay using Pan's algorithm.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-float Seq_MapRetimeDelayLagsInternal( Abc_Ntk_t * pNtk, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Abc_Obj_t * pNode;
- float FiMax, FiBest, Delta;
- int i, RetValue;
- char NodeLag;
-
- assert( Abc_NtkIsSeq( pNtk ) );
-
- // assign the accuracy for min-period computation
- Delta = Mio_LibraryReadDelayNand2Max(Abc_FrameReadLibGen());
- if ( Delta == 0.0 )
- {
- Delta = Mio_LibraryReadDelayAnd2Max(Abc_FrameReadLibGen());
- if ( Delta == 0.0 )
- {
- printf( "Cannot retime/map if the library does not have NAND2 or AND2.\n" );
- return 0.0;
- }
- }
-
- // get the upper bound on the clock period
- FiMax = Delta * (5 + Seq_NtkLevelMax(pNtk));
- Delta /= 2;
-
- // make sure this clock period is feasible
- if ( !Seq_MapRetimeForPeriod( pNtk, FiMax, fVerbose ) )
- {
- Vec_StrFill( p->vLags, p->nSize, 0 );
- Vec_StrFill( p->vLagsN, p->nSize, 0 );
- printf( "Error: The upper bound on the clock period cannot be computed.\n" );
- printf( "The reason for this error may be the presence in the circuit of logic\n" );
- printf( "that is not reachable from the PIs. Mapping/retiming is not performed.\n" );
- return 0;
- }
-
- // search for the optimal clock period between 0 and nLevelMax
- FiBest = Seq_MapRetimeSearch_rec( pNtk, 0.0, FiMax, Delta, fVerbose );
-
- // recompute the best l-values
- RetValue = Seq_MapRetimeForPeriod( pNtk, FiBest, fVerbose );
- assert( RetValue );
-
- // fix the problem with non-converged delays
- Abc_AigForEachAnd( pNtk, pNode, i )
- {
- if ( Seq_NodeGetLValueP(pNode) < -ABC_INFINITY/2 )
- Seq_NodeSetLValueP( pNode, 0 );
- if ( Seq_NodeGetLValueN(pNode) < -ABC_INFINITY/2 )
- Seq_NodeSetLValueN( pNode, 0 );
- }
-
- // write the retiming lags for both phases of each node
- Vec_StrFill( p->vLags, p->nSize, 0 );
- Vec_StrFill( p->vLagsN, p->nSize, 0 );
- Abc_AigForEachAnd( pNtk, pNode, i )
- {
- NodeLag = Seq_NodeComputeLagFloat( Seq_NodeGetLValueP(pNode), FiBest );
- Seq_NodeSetLag( pNode, NodeLag );
- NodeLag = Seq_NodeComputeLagFloat( Seq_NodeGetLValueN(pNode), FiBest );
- Seq_NodeSetLagN( pNode, NodeLag );
-//printf( "%6d=(%d,%d) ", pNode->Id, Seq_NodeGetLag(pNode), Seq_NodeGetLagN(pNode) );
-// if ( Seq_NodeGetLag(pNode) != Seq_NodeGetLagN(pNode) )
-// {
-//printf( "%6d=(%d,%d) ", pNode->Id, Seq_NodeGetLag(pNode), Seq_NodeGetLagN(pNode) );
-// }
- }
-//printf( "\n\n" );
-
- // print the result
- if ( fVerbose )
- printf( "The best clock period after mapping/retiming is %6.2f.\n", FiBest );
- return FiBest;
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs binary search for the optimal clock period.]
-
- Description [Assumes that FiMin is infeasible while FiMax is feasible.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-float Seq_MapRetimeSearch_rec( Abc_Ntk_t * pNtk, float FiMin, float FiMax, float Delta, int fVerbose )
-{
- float Median;
- assert( FiMin < FiMax );
- if ( FiMin + Delta >= FiMax )
- return FiMax;
- Median = FiMin + (FiMax - FiMin)/2;
- if ( Seq_MapRetimeForPeriod( pNtk, Median, fVerbose ) )
- return Seq_MapRetimeSearch_rec( pNtk, FiMin, Median, Delta, fVerbose ); // Median is feasible
- else
- return Seq_MapRetimeSearch_rec( pNtk, Median, FiMax, Delta, fVerbose ); // Median is infeasible
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns 1 if retiming with this clock period is feasible.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_MapRetimeForPeriod( Abc_Ntk_t * pNtk, float Fi, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Abc_Obj_t * pObj;
- float DelayInv = Mio_LibraryReadDelayInvMax(Abc_FrameReadLibGen());
- int i, c, RetValue, fChange, Counter;
- char * pReason = "";
-
- // set l-values of all nodes to be minus infinity
- Vec_IntFill( p->vLValues, p->nSize, Abc_Float2Int( (float)-ABC_INFINITY ) );
- Vec_IntFill( p->vLValuesN, p->nSize, Abc_Float2Int( (float)-ABC_INFINITY ) );
- Vec_StrFill( p->vUses, p->nSize, 0 );
-
- // set l-values of constants and PIs
- pObj = Abc_NtkObj( pNtk, 0 );
- Seq_NodeSetLValueP( pObj, 0.0 );
- Seq_NodeSetLValueN( pObj, 0.0 );
- Abc_NtkForEachPi( pNtk, pObj, i )
- {
- Seq_NodeSetLValueP( pObj, 0.0 );
- Seq_NodeSetLValueN( pObj, DelayInv );
- }
-
- // update all values iteratively
- Counter = 0;
- for ( c = 0; c < p->nMaxIters; c++ )
- {
- fChange = 0;
- Abc_AigForEachAnd( pNtk, pObj, i )
- {
- Counter++;
- RetValue = Seq_MapNodeUpdateLValue( pObj, Fi, DelayInv );
- if ( RetValue == SEQ_UPDATE_YES )
- fChange = 1;
- }
- Abc_NtkForEachPo( pNtk, pObj, i )
- {
- RetValue = Seq_MapNodeUpdateLValue( pObj, Fi, DelayInv );
- if ( RetValue == SEQ_UPDATE_FAIL )
- break;
- }
- if ( RetValue == SEQ_UPDATE_FAIL )
- break;
- if ( fChange == 0 )
- break;
-//printf( "\n\n" );
- }
- if ( c == p->nMaxIters )
- {
- RetValue = SEQ_UPDATE_FAIL;
- pReason = "(timeout)";
- }
- else
- c++;
-
- // report the results
- if ( fVerbose )
- {
- if ( RetValue == SEQ_UPDATE_FAIL )
- printf( "Period = %6.2f. Iterations = %3d. Updates = %10d. Infeasible %s\n", Fi, c, Counter, pReason );
- else
- printf( "Period = %6.2f. Iterations = %3d. Updates = %10d. Feasible\n", Fi, c, Counter );
- }
- return RetValue != SEQ_UPDATE_FAIL;
-}
-
-
-
-/**Function*************************************************************
-
- Synopsis [Computes the l-value of the cut.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-float Seq_MapSuperGetArrival( Abc_Obj_t * pObj, float Fi, Seq_Match_t * pMatch, float DelayMax )
-{
- Abc_Seq_t * p = pObj->pNtk->pManFunc;
- Abc_Obj_t * pFanin;
- float lValueCur, lValueMax;
- int i;
- lValueMax = -ABC_INFINITY;
- for ( i = pMatch->pCut->nLeaves - 1; i >= 0; i-- )
- {
- // get the arrival time of the fanin
- pFanin = Abc_NtkObj( pObj->pNtk, pMatch->pCut->pLeaves[i] >> 8 );
- if ( pMatch->uPhase & (1 << i) )
- lValueCur = Seq_NodeGetLValueN(pFanin) - Fi * (pMatch->pCut->pLeaves[i] & 255);
- else
- lValueCur = Seq_NodeGetLValueP(pFanin) - Fi * (pMatch->pCut->pLeaves[i] & 255);
- // add the arrival time of this pin
- if ( lValueMax < lValueCur + pMatch->pSuper->tDelaysR[i].Worst )
- lValueMax = lValueCur + pMatch->pSuper->tDelaysR[i].Worst;
- if ( lValueMax < lValueCur + pMatch->pSuper->tDelaysF[i].Worst )
- lValueMax = lValueCur + pMatch->pSuper->tDelaysF[i].Worst;
- if ( lValueMax > DelayMax + p->fEpsilon )
- return ABC_INFINITY;
- }
- return lValueMax;
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes the l-value of the cut.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-float Seq_MapNodeComputeCut( Abc_Obj_t * pObj, Cut_Cut_t * pCut, int fCompl, float Fi, Seq_Match_t * pMatchBest )
-{
- Seq_Match_t Match, * pMatchCur = &Match;
- Abc_Seq_t * p = pObj->pNtk->pManFunc;
- Map_Super_t * pSuper, * pSuperList;
- unsigned uCanon[2];
- float lValueBest, lValueCur;
- int i;
- assert( pCut->nLeaves < 6 );
- // get the canonical truth table of this cut
- uCanon[0] = uCanon[1] = (fCompl? pCut->uCanon0 : pCut->uCanon1);
- if ( uCanon[0] == 0 || ~uCanon[0] == 0 )
- {
- if ( pMatchBest )
- {
- memset( pMatchBest, 0, sizeof(Seq_Match_t) );
- pMatchBest->pCut = pCut;
- }
- return (float)0.0;
- }
- // match the given phase of the cut
- pSuperList = Map_SuperTableLookupC( p->pSuperLib, uCanon );
- // compute the arrival times of each supergate
- lValueBest = ABC_INFINITY;
- for ( pSuper = pSuperList; pSuper; pSuper = pSuper->pNext )
- {
- // create the match
- pMatchCur->pCut = pCut;
- pMatchCur->pSuper = pSuper;
- // get the phase
- for ( i = 0; i < (int)pSuper->nPhases; i++ )
- {
- pMatchCur->uPhase = (fCompl? pCut->Num0 : pCut->Num1) ^ pSuper->uPhases[i];
- // find the arrival time of this match
- lValueCur = Seq_MapSuperGetArrival( pObj, Fi, pMatchCur, lValueBest );
- if ( lValueBest > lValueCur )//&& lValueCur > -ABC_INFINITY/2 )
- {
- lValueBest = lValueCur;
- if ( pMatchBest )
- *pMatchBest = *pMatchCur;
- }
- }
- }
-// assert( lValueBest < ABC_INFINITY/2 );
- return lValueBest;
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes the l-value of the node.]
-
- Description [The node can be internal or a PO.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-float Seq_MapNodeComputePhase( Abc_Obj_t * pObj, int fCompl, float Fi, Seq_Match_t * pMatchBest )
-{
- Seq_Match_t Match, * pMatchCur = &Match;
- Cut_Cut_t * pList, * pCut;
- float lValueBest, lValueCut;
- // get the list of cuts
- pList = Abc_NodeReadCuts( Seq_NodeCutMan(pObj), pObj );
- // get the arrival time of the best non-trivial cut
- lValueBest = ABC_INFINITY;
- for ( pCut = pList->pNext; pCut; pCut = pCut->pNext )
- {
- lValueCut = Seq_MapNodeComputeCut( pObj, pCut, fCompl, Fi, pMatchBest? pMatchCur : NULL );
- if ( lValueBest > lValueCut )
- {
- lValueBest = lValueCut;
- if ( pMatchBest )
- *pMatchBest = *pMatchCur;
- }
- }
-// assert( lValueBest < ABC_INFINITY/2 );
- return lValueBest;
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes the l-value of the node.]
-
- Description [The node can be internal or a PO.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_MapNodeUpdateLValue( Abc_Obj_t * pObj, float Fi, float DelayInv )
-{
- Abc_Seq_t * p = pObj->pNtk->pManFunc;
- Cut_Cut_t * pList;
- char Use;
- float lValueOld0, lValueOld1, lValue0, lValue1, lValue;
- assert( !Abc_ObjIsPi(pObj) );
- assert( Abc_ObjFaninNum(pObj) > 0 );
- // consider the case of the PO
- if ( Abc_ObjIsPo(pObj) )
- {
- if ( Abc_ObjFaninC0(pObj) ) // PO requires negative polarity
- lValue = Seq_NodeGetLValueN(Abc_ObjFanin0(pObj)) - Fi * Seq_ObjFaninL0(pObj);
- else
- lValue = Seq_NodeGetLValueP(Abc_ObjFanin0(pObj)) - Fi * Seq_ObjFaninL0(pObj);
- return (lValue > Fi + p->fEpsilon)? SEQ_UPDATE_FAIL : SEQ_UPDATE_NO;
- }
- // get the cuts
- pList = Abc_NodeReadCuts( Seq_NodeCutMan(pObj), pObj );
- if ( pList == NULL )
- return SEQ_UPDATE_NO;
- // compute the arrival time of both phases
- lValue0 = Seq_MapNodeComputePhase( pObj, 1, Fi, NULL );
- lValue1 = Seq_MapNodeComputePhase( pObj, 0, Fi, NULL );
- // consider the case when negative phase is too slow
- if ( lValue0 > lValue1 + DelayInv + p->fEpsilon )
- lValue0 = lValue1 + DelayInv, Use = 2;
- else if ( lValue1 > lValue0 + DelayInv + p->fEpsilon )
- lValue1 = lValue0 + DelayInv, Use = 1;
- else
- Use = 3;
- // set the uses of the phases
- Seq_NodeSetUses( pObj, Use );
- // get the old arrival times
- lValueOld0 = Seq_NodeGetLValueN(pObj);
- lValueOld1 = Seq_NodeGetLValueP(pObj);
- // compare
- if ( lValue0 <= lValueOld0 + p->fEpsilon && lValue1 <= lValueOld1 + p->fEpsilon )
- return SEQ_UPDATE_NO;
- assert( lValue0 < ABC_INFINITY/2 );
- assert( lValue1 < ABC_INFINITY/2 );
- // update the values
- if ( lValue0 > lValueOld0 + p->fEpsilon )
- Seq_NodeSetLValueN( pObj, lValue0 );
- if ( lValue1 > lValueOld1 + p->fEpsilon )
- Seq_NodeSetLValueP( pObj, lValue1 );
-//printf( "%6d=(%4.2f,%4.2f) ", pObj->Id, Seq_NodeGetLValueP(pObj), Seq_NodeGetLValueN(pObj) );
- return SEQ_UPDATE_YES;
-}
-
-
-
-/**Function*************************************************************
-
- Synopsis [Derives the parameters of the best mapping/retiming for one node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-float Seq_MapCollectNode_rec( Abc_Obj_t * pAnd, float FiBest, Vec_Ptr_t * vMapping, Vec_Vec_t * vMapCuts )
-{
- Seq_Match_t * pMatch;
- Abc_Obj_t * pFanin;
- int k, fCompl, Use;
- float AreaInv = Mio_LibraryReadAreaInv(Abc_FrameReadLibGen());
- float Area;
-
- // get the polarity of the node
- fCompl = Abc_ObjIsComplement(pAnd);
- pAnd = Abc_ObjRegular(pAnd);
-
- // skip visited nodes
- if ( !fCompl )
- { // need the positive polarity
- if ( pAnd->fMarkA )
- return 0.0;
- pAnd->fMarkA = 1;
- }
- else
- { // need the negative polarity
- if ( pAnd->fMarkB )
- return 0.0;
- pAnd->fMarkB = 1;
- }
-
- // skip if this is a PI or a constant
- if ( !Abc_AigNodeIsAnd(pAnd) )
- {
- if ( Abc_ObjIsPi(pAnd) && fCompl )
- return AreaInv;
- return 0.0;
- }
-
- // check the uses of this node
- Use = Seq_NodeGetUses( pAnd );
- if ( !fCompl && Use == 1 ) // the pos phase is required; only the neg phase is used
- {
- Area = Seq_MapCollectNode_rec( Abc_ObjNot(pAnd), FiBest, vMapping, vMapCuts );
- return Area + AreaInv;
- }
- if ( fCompl && Use == 2 ) // the neg phase is required; only the pos phase is used
- {
- Area = Seq_MapCollectNode_rec( pAnd, FiBest, vMapping, vMapCuts );
- return Area + AreaInv;
- }
- // both phases are used; the needed one can be selected
-
- // get the best match
- pMatch = ALLOC( Seq_Match_t, 1 );
- memset( pMatch, 1, sizeof(Seq_Match_t) );
- Seq_MapNodeComputePhase( pAnd, fCompl, FiBest, pMatch );
- pMatch->pAnd = pAnd;
- pMatch->fCompl = fCompl;
- pMatch->fCutInv = pMatch->pCut->fCompl;
- pMatch->PolUse = Use;
-
- // call for the fanin cuts
- Area = pMatch->pSuper? pMatch->pSuper->Area : (float)0.0;
- for ( k = 0; k < (int)pMatch->pCut->nLeaves; k++ )
- {
- pFanin = Abc_NtkObj( pAnd->pNtk, pMatch->pCut->pLeaves[k] >> 8 );
- if ( pMatch->uPhase & (1 << k) )
- pFanin = Abc_ObjNot( pFanin );
- Area += Seq_MapCollectNode_rec( pFanin, FiBest, vMapping, vMapCuts );
- }
-
- // add this node
- Vec_PtrPush( vMapping, pMatch );
- for ( k = 0; k < (int)pMatch->pCut->nLeaves; k++ )
- Vec_VecPush( vMapCuts, Vec_PtrSize(vMapping)-1, (void *)pMatch->pCut->pLeaves[k] );
-
- // the cut will become unavailable when the cuts are deallocated
- pMatch->pCut = NULL;
-
- return Area;
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes the canonical versions of the truth tables.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_MapCanonicizeTruthTables( Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pObj;
- Cut_Cut_t * pCut, * pList;
- int i;
- Abc_AigForEachAnd( pNtk, pObj, i )
- {
- pList = Abc_NodeReadCuts( Seq_NodeCutMan(pObj), pObj );
- if ( pList == NULL )
- continue;
- for ( pCut = pList->pNext; pCut; pCut = pCut->pNext )
- Cut_TruthNCanonicize( pCut );
- }
-}
-
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqMaxMeanCycle.c b/src/base/seq/seqMaxMeanCycle.c
deleted file mode 100644
index b62e4b33..00000000
--- a/src/base/seq/seqMaxMeanCycle.c
+++ /dev/null
@@ -1,572 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqMaxMeanCycle.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [Efficient computation of maximum mean cycle times.]
-
- Author [Aaron P. Hurst]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - May 15, 2006.]
-
- Revision [$Id: seqMaxMeanCycle.c,v 1.00 2005/05/15 00:00:00 ahurst Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-#include "hash.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-struct Abc_ManTime_t_
-{
- Abc_Time_t tArrDef;
- Abc_Time_t tReqDef;
- Vec_Ptr_t * vArrs;
- Vec_Ptr_t * vReqs;
-};
-
-typedef struct Seq_HowardData_t_
-{
- char visited;
- int mark;
- int policy;
- float cycle;
- float skew;
- float delay;
-} Seq_HowardData_t;
-
-// accessing the arrival and required times of a node
-static inline Abc_Time_t * Abc_NodeArrival( Abc_Obj_t * pNode ) { return pNode->pNtk->pManTime->vArrs->pArray[pNode->Id]; }
-static inline Abc_Time_t * Abc_NodeRequired( Abc_Obj_t * pNode ) { return pNode->pNtk->pManTime->vReqs->pArray[pNode->Id]; }
-
-Hash_Ptr_t * Seq_NtkPathDelays( Abc_Ntk_t * pNtk, int fVerbose );
-void Seq_NtkMergePios( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays, int fVerbose );
-
-void Seq_NtkHowardLoop( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays,
- Hash_Ptr_t * hNodeData, int node,
- int *howardDepth, float *howardDelay, int *howardSink,
- float *maxMeanCycle);
-void Abc_NtkDfsReverse_rec2( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Vec_Ptr_t * vEndpoints );
-
-#define Seq_NtkGetPathDelay( hFwdDelays, from, to ) \
- (Hash_PtrExists(hFwdDelays, from)?Hash_FltEntry( ((Hash_Flt_t *)Hash_PtrEntry(hFwdDelays, from, 0)), to, 0):0 )
-
-#define HOWARD_EPSILON 1e-3
-#define ZERO_SLOP 1e-5
-#define REMOVE_ZERO_SLOP( x ) \
- (x = (x > -ZERO_SLOP && x < ZERO_SLOP)?0:x)
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Computes maximum mean cycle time.]
-
- Description [Uses Howard's algorithm.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-float Seq_NtkHoward( Abc_Ntk_t * pNtk, int fVerbose ) {
-
- Abc_Obj_t * pObj;
- Hash_Ptr_t * hFwdDelays;
- Hash_Flt_t * hOutgoing;
- Hash_Ptr_Entry_t * pSourceEntry, * pNodeEntry;
- Hash_Flt_Entry_t * pSinkEntry;
- int i, j, iteration = 0;
- int source, sink;
- int fChanged;
- int howardDepth, howardSink = 0;
- float delay, howardDelay, t;
- float maxMeanCycle = -ABC_INFINITY;
- Hash_Ptr_t * hNodeData;
- Seq_HowardData_t * pNodeData, * pSourceData, * pSinkData;
-
- // gather timing constraints
- hFwdDelays = Seq_NtkPathDelays( pNtk, fVerbose );
- Seq_NtkMergePios( pNtk, hFwdDelays, fVerbose );
-
- // initialize data, create initial policy
- hNodeData = Hash_PtrAlloc( hFwdDelays->nSize );
- Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) {
- Hash_PtrWriteEntry( hNodeData, pSourceEntry->key,
- (pNodeData = ALLOC(Seq_HowardData_t, 1)) );
- pNodeData->skew = 0.0;
- pNodeData->policy = 0;
- hOutgoing = (Hash_Flt_t *)(pSourceEntry->data);
- assert(hOutgoing);
-
- Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) {
- sink = pSinkEntry->key;
- delay = pSinkEntry->data;
- if (delay > pNodeData->skew) {
- pNodeData->policy = sink;
- pNodeData->skew = delay;
- }
- }
- }
-
- // iteratively refine policy
- do {
- iteration++;
- fChanged = 0;
- howardDelay = 0.0;
- howardDepth = 0;
-
- // reset data
- Hash_PtrForEachEntry( hNodeData, pNodeEntry, i ) {
- pNodeData = (Seq_HowardData_t *)pNodeEntry->data;
- pNodeData->skew = -ABC_INFINITY;
- pNodeData->cycle = -ABC_INFINITY;
- pNodeData->mark = 0;
- pNodeData->visited = 0;
- }
-
- // find loops in policy graph
- Hash_PtrForEachEntry( hNodeData, pNodeEntry, i ) {
- pNodeData = (Seq_HowardData_t *)(pNodeEntry->data);
- assert(pNodeData);
- if (!pNodeData->visited)
- Seq_NtkHowardLoop( pNtk, hFwdDelays,
- hNodeData, pNodeEntry->key,
- &howardDepth, &howardDelay, &howardSink, &maxMeanCycle);
- }
-
- if (!howardSink) {
- return -1;
- }
-
- // improve policy by tightening loops
- Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) {
- source = pSourceEntry->key;
- pSourceData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, source, 0 );
- assert(pSourceData);
- hOutgoing = (Hash_Flt_t *)(pSourceEntry->data);
- assert(hOutgoing);
- Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) {
- sink = pSinkEntry->key;
- pSinkData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, sink, 0 );
- assert(pSinkData);
- delay = pSinkEntry->data;
-
- if (pSinkData->cycle > pSourceData->cycle + HOWARD_EPSILON) {
- fChanged = 1;
- pSourceData->cycle = pSinkData->cycle;
- pSourceData->policy = sink;
- }
- }
- }
-
- // improve policy by correcting skews
- if (!fChanged) {
- Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) {
- source = pSourceEntry->key;
- pSourceData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, source, 0 );
- assert(pSourceData);
- hOutgoing = (Hash_Flt_t *)(pSourceEntry->data);
- assert(hOutgoing);
- Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) {
- sink = pSinkEntry->key;
- pSinkData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, sink, 0 );
- assert(pSinkData);
- delay = pSinkEntry->data;
-
- if (pSinkData->cycle < 0.0 || pSinkData->cycle < pSourceData->cycle)
- continue;
-
- t = delay - pSinkData->cycle + pSinkData->skew;
- if (t > pSourceData->skew + HOWARD_EPSILON) {
- fChanged = 1;
- pSourceData->skew = t;
- pSourceData->policy = sink;
- }
- }
- }
- }
-
- if (fVerbose) printf("Iteration %d \t Period = %.2f\n", iteration, maxMeanCycle);
- } while (fChanged);
-
- // set global skew, mmct
- pNodeData = Hash_PtrEntry( hNodeData, -1, 0 );
- pNtk->globalSkew = -pNodeData->skew;
- pNtk->maxMeanCycle = maxMeanCycle;
-
- // set endpoint skews
- Vec_FltGrow( pNtk->vSkews, Abc_NtkLatchNum( pNtk ) );
- pNtk->vSkews->nSize = Abc_NtkLatchNum( pNtk );
- Abc_NtkForEachLatch( pNtk, pObj, i ) {
- pNodeData = Hash_PtrEntry( hNodeData, pObj->Id, 0 );
- // skews are set based on latch # NOT id #
- Abc_NtkSetLatSkew( pNtk, i, pNodeData->skew );
- }
-
- // free node data
- Hash_PtrForEachEntry( hNodeData, pNodeEntry, i ) {
- pNodeData = (Seq_HowardData_t *)(pNodeEntry->data);
- FREE( pNodeData );
- }
- Hash_PtrFree(hNodeData);
-
- // free delay data
- Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) {
- Hash_FltFree( (Hash_Flt_t *)(pSourceEntry->data) );
- }
- Hash_PtrFree(hFwdDelays);
-
- return maxMeanCycle;
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes the mean cycle times of current policy graph.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkHowardLoop( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays,
- Hash_Ptr_t * hNodeData, int node,
- int *howardDepth, float *howardDelay, int *howardSink,
- float *maxMeanCycle) {
-
- Seq_HowardData_t * pNodeData, *pToData;
- float delay, t;
-
- pNodeData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, node, 0 );
- assert(pNodeData);
- pNodeData->visited = 1;
- pNodeData->mark = ++(*howardDepth);
- pNodeData->delay = (*howardDelay);
- if (pNodeData->policy) {
- pToData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, pNodeData->policy, 0 );
- assert(pToData);
- delay = Seq_NtkGetPathDelay( hFwdDelays, node, pNodeData->policy );
- assert(delay > 0.0);
- (*howardDelay) += delay;
- if (pToData->mark) {
- t = (*howardDelay - pToData->delay) / (*howardDepth - pToData->mark + 1);
- pNodeData->cycle = t;
- pNodeData->skew = 0.0;
- if (*maxMeanCycle < t) {
- *maxMeanCycle = t;
- *howardSink = pNodeData->policy;
- }
- } else {
- if(!pToData->visited) {
- Seq_NtkHowardLoop(pNtk, hFwdDelays, hNodeData, pNodeData->policy,
- howardDepth, howardDelay, howardSink, maxMeanCycle);
- }
- if(pToData->cycle > 0) {
- t = delay - pToData->cycle + pToData->skew;
- pNodeData->skew = t;
- pNodeData->cycle = pToData->cycle;
- }
- }
- }
- *howardDelay = pNodeData->delay;
- pNodeData->mark = 0;
- --(*howardDepth);
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes the register-to-register delays.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Hash_Ptr_t * Seq_NtkPathDelays( Abc_Ntk_t * pNtk, int fVerbose ) {
-
- Abc_Time_t * pTime, ** ppTimes;
- Abc_Obj_t * pObj, * pDriver, * pStart, * pFanout;
- Vec_Ptr_t * vNodes, * vEndpoints;
- int i, j, nPaths = 0;
- Hash_Flt_t * hOutgoing;
- Hash_Ptr_t * hFwdDelays;
- float nMaxPath = 0, nSumPath = 0;
-
- extern void Abc_NtkTimePrepare( Abc_Ntk_t * pNtk );
- extern void Abc_NodeDelayTraceArrival( Abc_Obj_t * pNode );
-
- if (fVerbose) printf("Gathering path delays...\n");
-
- hFwdDelays = Hash_PtrAlloc( Abc_NtkCiNum( pNtk ) );
-
- assert( Abc_NtkIsMappedLogic(pNtk) );
-
- Abc_NtkTimePrepare( pNtk );
- ppTimes = (Abc_Time_t **)pNtk->pManTime->vArrs->pArray;
- vNodes = Vec_PtrAlloc( 100 );
- vEndpoints = Vec_PtrAlloc( 100 );
-
- // set the initial times (i.e. ignore all inputs)
- Abc_NtkForEachObj( pNtk, pObj, i) {
- pTime = ppTimes[pObj->Id];
- pTime->Fall = pTime->Rise = pTime->Worst = -ABC_INFINITY;
- }
-
- // starting at each Ci, compute timing forward
- Abc_NtkForEachCi( pNtk, pStart, j ) {
-
- hOutgoing = Hash_FltAlloc( 10 );
- Hash_PtrWriteEntry( hFwdDelays, pStart->Id, (void *)(hOutgoing) );
-
- // seed the starting point of interest
- pTime = ppTimes[pStart->Id];
- pTime->Fall = pTime->Rise = pTime->Worst = 0.0;
-
- // find a DFS ordering from the start
- Abc_NtkIncrementTravId( pNtk );
- Abc_NodeSetTravIdCurrent( pStart );
- pObj = Abc_ObjFanout0Ntk(pStart);
- Abc_ObjForEachFanout( pObj, pFanout, i )
- Abc_NtkDfsReverse_rec2( pFanout, vNodes, vEndpoints );
- if ( Abc_ObjIsCo( pStart ) )
- Vec_PtrPush( vEndpoints, pStart );
-
- // do timing analysis
- for ( i = vNodes->nSize-1; i >= 0; --i )
- Abc_NodeDelayTraceArrival( vNodes->pArray[i] );
-
- // there is a path to each set of Co endpoints
- Vec_PtrForEachEntry( Abc_Obj_t *, vEndpoints, pObj, i )
- {
- assert(pObj);
- assert( Abc_ObjIsCo( pObj ) );
- pDriver = Abc_ObjFanin0(pObj);
- pTime = Abc_NodeArrival(pDriver);
- if ( pTime->Worst > 0 ) {
- Hash_FltWriteEntry( hOutgoing, pObj->Id, pTime->Worst );
- nPaths++;
- // if (fVerbose) printf("\tpath %d,%d delay = %f\n", pStart->Id, pObj->Id, pTime->Worst);
- nSumPath += pTime->Worst;
- if (pTime->Worst > nMaxPath)
- nMaxPath = pTime->Worst;
- }
- }
-
- // clear the times that were altered
- for ( i = 0; i < vNodes->nSize; i++ ) {
- pObj = (Abc_Obj_t *)(vNodes->pArray[i]);
- pTime = ppTimes[pObj->Id];
- pTime->Fall = pTime->Rise = pTime->Worst = -ABC_INFINITY;
- }
- pTime = ppTimes[pStart->Id];
- pTime->Fall = pTime->Rise = pTime->Worst = -ABC_INFINITY;
-
- Vec_PtrClear( vNodes );
- Vec_PtrClear( vEndpoints );
- }
-
- Vec_PtrFree( vNodes );
-
- // rezero Cis (note: these should be restored to values if they were nonzero)
- Abc_NtkForEachCi( pNtk, pObj, i) {
- pTime = ppTimes[pObj->Id];
- pTime->Fall = pTime->Rise = pTime->Worst = 0.0;
- }
-
- if (fVerbose) printf("Num. paths = %d\tMax. Path Delay = %.2f\tAvg. Path Delay = %.2f\n", nPaths, nMaxPath, nSumPath / nPaths);
- return hFwdDelays;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Merges all the Pios together into one ID = -1.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkMergePios( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays,
- int fVerbose ) {
-
- Abc_Obj_t * pObj;
- Hash_Flt_Entry_t * pSinkEntry;
- Hash_Ptr_Entry_t * pSourceEntry;
- Hash_Flt_t * hOutgoing, * hPioSource;
- int i, j;
- int source, sink, nMerges = 0;
- float delay = 0, max_delay = 0;
- Vec_Int_t * vFreeList;
-
- vFreeList = Vec_IntAlloc( 10 );
-
- // create a new "-1" source entry for the Pios
- hPioSource = Hash_FltAlloc( 100 );
- Hash_PtrWriteEntry( hFwdDelays, -1, (void *)(hPioSource) );
-
- // merge all edges with a Pio as a source
- Abc_NtkForEachPi( pNtk, pObj, i ) {
- source = pObj->Id;
- hOutgoing = (Hash_Flt_t *)Hash_PtrEntry( hFwdDelays, source, 0 );
- if (!hOutgoing) continue;
-
- Hash_PtrForEachEntry( hOutgoing, pSinkEntry, j ) {
- nMerges++;
- sink = pSinkEntry->key;
- delay = pSinkEntry->data;
- if (Hash_FltEntry( hPioSource, sink, 1 ) < delay) {
- Hash_FltWriteEntry( hPioSource, sink, delay );
- }
- }
-
- Hash_FltFree( hOutgoing );
- Hash_PtrRemove( hFwdDelays, source );
- }
-
- // merge all edges with a Pio as a sink
- Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) {
- hOutgoing = (Hash_Flt_t *)(pSourceEntry->data);
- Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) {
- sink = pSinkEntry->key;
- delay = pSinkEntry->data;
-
- max_delay = -ABC_INFINITY;
- if (Abc_ObjIsPo( Abc_NtkObj( pNtk, sink ) )) {
- nMerges++;
- if (delay > max_delay)
- max_delay = delay;
- Vec_IntPush( vFreeList, sink );
- }
- }
- if (max_delay != -ABC_INFINITY)
- Hash_FltWriteEntry( hOutgoing, -1, delay );
- // do freeing
- while( vFreeList->nSize > 0 ) {
- Hash_FltRemove( hOutgoing, Vec_IntPop( vFreeList ) );
- }
- }
-
- if (fVerbose) printf("Merged %d paths into one Pio node\n", nMerges);
-
-}
-
-/**Function*************************************************************
-
- Synopsis [This is a modification of routine from abcDfs.c]
-
- Description [Recursive DFS from a starting point. Keeps the endpoints.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_NtkDfsReverse_rec2( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Vec_Ptr_t * vEndpoints )
-{
- Abc_Obj_t * pFanout;
- int i;
- assert( !Abc_ObjIsNet(pNode) );
- // if this node is already visited, skip
- if ( Abc_NodeIsTravIdCurrent( pNode ) )
- return;
- // mark the node as visited
- Abc_NodeSetTravIdCurrent( pNode );
- // terminate at the Co
- if ( Abc_ObjIsCo(pNode) ) {
- Vec_PtrPush( vEndpoints, pNode );
- return;
- }
- assert( Abc_ObjIsNode( pNode ) );
- // visit the transitive fanin of the node
- pNode = Abc_ObjFanout0Ntk(pNode);
- Abc_ObjForEachFanout( pNode, pFanout, i )
- Abc_NtkDfsReverse_rec2( pFanout, vNodes, vEndpoints );
- // add the node after the fanins have been added
- Vec_PtrPush( vNodes, pNode );
-}
-
-/**Function*************************************************************
-
- Synopsis [Converts all skews into forward skews 0<skew<T.]
-
- Description [Can also minimize total skew by changing global skew.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkSkewForward( Abc_Ntk_t * pNtk, float period, int fMinimize ) {
-
- Abc_Obj_t * pObj;
- int i;
- float skew;
- float currentSum = 0, bestSum = ABC_INFINITY;
- float currentOffset = 0, nextStep, bestOffset = 0;
-
- assert( pNtk->vSkews->nSize >= Abc_NtkLatchNum( pNtk )-1 );
-
- if (fMinimize) {
- // search all offsets for the one that minimizes sum of skews
- while(currentOffset < period) {
- currentSum = 0;
- nextStep = period;
- Abc_NtkForEachLatch( pNtk, pObj, i ) {
- skew = Abc_NtkGetLatSkew( pNtk, i ) + currentOffset;
- skew = (float)(skew - period*floor(skew/period));
- currentSum += skew;
- if (skew > ZERO_SLOP && skew < nextStep) {
- nextStep = skew;
- }
- }
-
- if (currentSum < bestSum) {
- bestSum = currentSum;
- bestOffset = currentOffset;
- }
- currentOffset += nextStep;
- }
- printf("Offseting all skews by %.2f\n", bestOffset);
- }
-
- // convert global skew into forward skew
- pNtk->globalSkew = pNtk->globalSkew - bestOffset;
- pNtk->globalSkew = (float)(pNtk->globalSkew - period*floor(pNtk->globalSkew/period));
- assert(pNtk->globalSkew>= 0 && pNtk->globalSkew < period);
-
- // convert endpoint skews into forward skews
- Abc_NtkForEachLatch( pNtk, pObj, i ) {
- skew = Abc_NtkGetLatSkew( pNtk, i ) + bestOffset;
- skew = (float)(skew - period*floor(skew/period));
- REMOVE_ZERO_SLOP( skew );
- assert(skew >=0 && skew < period);
-
- Abc_NtkSetLatSkew( pNtk, i, skew );
- }
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqRetCore.c b/src/base/seq/seqRetCore.c
deleted file mode 100644
index 846a6707..00000000
--- a/src/base/seq/seqRetCore.c
+++ /dev/null
@@ -1,498 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqRetCore.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [The core of FPGA mapping/retiming package.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqRetCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-#include "dec.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-static Abc_Ntk_t * Seq_NtkRetimeDerive( Abc_Ntk_t * pNtk, int fVerbose );
-static Abc_Obj_t * Seq_NodeRetimeDerive( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, char * pSop, Vec_Ptr_t * vFanins );
-static Abc_Ntk_t * Seq_NtkRetimeReconstruct( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtkSeq );
-static Abc_Obj_t * Seq_EdgeReconstruct_rec( Abc_Obj_t * pGoal, Abc_Obj_t * pNode );
-static Abc_Obj_t * Seq_EdgeReconstructPO( Abc_Obj_t * pNode );
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Performs FPGA mapping and retiming.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Seq_NtkRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int fVerbose )
-{
- Abc_Seq_t * p;
- Abc_Ntk_t * pNtkSeq, * pNtkNew;
- int RetValue;
- assert( !Abc_NtkHasAig(pNtk) );
- // derive the isomorphic seq AIG
- pNtkSeq = Seq_NtkRetimeDerive( pNtk, fVerbose );
- p = pNtkSeq->pManFunc;
- p->nMaxIters = nMaxIters;
-
- if ( !fInitial )
- Seq_NtkLatchSetValues( pNtkSeq, ABC_INIT_DC );
- // find the best mapping and retiming
- if ( !Seq_NtkRetimeDelayLags( pNtk, pNtkSeq, fVerbose ) )
- return NULL;
-
- // implement the retiming
- RetValue = Seq_NtkImplementRetiming( pNtkSeq, p->vLags, fVerbose );
- if ( RetValue == 0 )
- printf( "Retiming completed but initial state computation has failed.\n" );
-//return pNtkSeq;
-
- // create the final mapped network
- pNtkNew = Seq_NtkRetimeReconstruct( pNtk, pNtkSeq );
- Abc_NtkDelete( pNtkSeq );
- return pNtkNew;
-}
-
-/**Function*************************************************************
-
- Synopsis [Derives the isomorphic seq AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Seq_NtkRetimeDerive( Abc_Ntk_t * pNtk, int fVerbose )
-{
- Abc_Seq_t * p;
- Abc_Ntk_t * pNtkNew;
- Abc_Obj_t * pObj, * pFanin, * pMirror;
- Vec_Ptr_t * vMapAnds, * vMirrors;
- Vec_Vec_t * vMapFanins;
- int i, k, RetValue, fHasBdds;
- char * pSop;
-
- // make sure it is an AIG without self-feeding latches
- assert( !Abc_NtkHasAig(pNtk) );
- if ( RetValue = Abc_NtkRemoveSelfFeedLatches(pNtk) )
- printf( "Modified %d self-feeding latches. The result may not verify.\n", RetValue );
- assert( Abc_NtkCountSelfFeedLatches(pNtk) == 0 );
-
- // remove the dangling nodes
- Abc_NtkCleanup( pNtk, fVerbose );
-
- // transform logic functions from BDD to SOP
- if ( fHasBdds = Abc_NtkIsBddLogic(pNtk) )
- {
- if ( !Abc_NtkBddToSop(pNtk, 0) )
- {
- printf( "Seq_NtkRetimeDerive(): Converting to SOPs has failed.\n" );
- return NULL;
- }
- }
-
- // start the network
- pNtkNew = Abc_NtkAlloc( ABC_NTK_SEQ, ABC_FUNC_AIG, 1 );
- // duplicate the name and the spec
- pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
- pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec);
-
- // map the constant nodes
- Abc_NtkCleanCopy( pNtk );
- // clone the PIs/POs/latches
- Abc_NtkForEachPi( pNtk, pObj, i )
- Abc_NtkDupObj( pNtkNew, pObj, 0 );
- Abc_NtkForEachPo( pNtk, pObj, i )
- Abc_NtkDupObj( pNtkNew, pObj, 0 );
- // copy the names
- Abc_NtkForEachPi( pNtk, pObj, i )
- Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL );
- Abc_NtkForEachPo( pNtk, pObj, i )
- Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL );
-
- // create one AND for each logic node in the topological order
- vMapAnds = Abc_NtkDfs( pNtk, 0 );
- Vec_PtrForEachEntry( Abc_Obj_t *, vMapAnds, pObj, i )
- {
- if ( pObj->Id == 0 )
- {
- pObj->pCopy = Abc_AigConst1(pNtkNew);
- continue;
- }
- pObj->pCopy = Abc_NtkCreateNode( pNtkNew );
- }
-
- // make the new seq AIG point to the old network through pNext
- Abc_NtkForEachObj( pNtk, pObj, i )
- if ( pObj->pCopy ) pObj->pCopy->pNext = pObj;
-
- // make latches point to the latch fanins
- Abc_NtkForEachLatch( pNtk, pObj, i )
- {
- assert( !Abc_ObjIsLatch(Abc_ObjFanin0(pObj)) );
- pObj->pCopy = Abc_ObjFanin0(pObj)->pCopy;
- }
-
- // create internal AND nodes w/o strashing for each logic node (including constants)
- vMapFanins = Vec_VecStart( Vec_PtrSize(vMapAnds) );
- Vec_PtrForEachEntry( Abc_Obj_t *, vMapAnds, pObj, i )
- {
- // get the SOP of the node
- if ( Abc_NtkHasMapping(pNtk) )
- pSop = Mio_GateReadSop(pObj->pData);
- else
- pSop = pObj->pData;
- pFanin = Seq_NodeRetimeDerive( pNtkNew, pObj, pSop, Vec_VecEntry(vMapFanins, i) );
- Abc_ObjAddFanin( pObj->pCopy, pFanin );
- Abc_ObjAddFanin( pObj->pCopy, pFanin );
- }
- // connect the POs
- Abc_NtkForEachPo( pNtk, pObj, i )
- Abc_ObjAddFanin( pObj->pCopy, Abc_ObjFanin0(pObj)->pCopy );
-
- // start the storage for initial states
- p = pNtkNew->pManFunc;
- Seq_Resize( p, Abc_NtkObjNumMax(pNtkNew) );
-
- // add the sequential edges
- Vec_PtrForEachEntry( Abc_Obj_t *, vMapAnds, pObj, i )
- {
- vMirrors = Vec_VecEntry( vMapFanins, i );
- Abc_ObjForEachFanin( pObj, pFanin, k )
- {
- pMirror = Vec_PtrEntry( vMirrors, k );
- if ( Abc_ObjIsLatch(pFanin) )
- {
- Seq_NodeInsertFirst( pMirror, 0, Abc_LatchInit(pFanin) );
- Seq_NodeInsertFirst( pMirror, 1, Abc_LatchInit(pFanin) );
- }
- }
- }
- // add the sequential edges to the POs
- Abc_NtkForEachPo( pNtk, pObj, i )
- {
- pFanin = Abc_ObjFanin0(pObj);
- if ( Abc_ObjIsLatch(pFanin) )
- Seq_NodeInsertFirst( pObj->pCopy, 0, Abc_LatchInit(pFanin) );
- }
-
-
- // save the fanin/delay info
- p->vMapAnds = vMapAnds;
- p->vMapFanins = vMapFanins;
- p->vMapCuts = Vec_VecStart( Vec_PtrSize(p->vMapAnds) );
- p->vMapDelays = Vec_VecStart( Vec_PtrSize(p->vMapAnds) );
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i )
- {
- // change the node to be the new one
- Vec_PtrWriteEntry( p->vMapAnds, i, pObj->pCopy );
- // collect the new fanins of this node
- Abc_ObjForEachFanin( pObj, pFanin, k )
- Vec_VecPush( p->vMapCuts, i, (void *)( (pFanin->pCopy->Id << 8) | Abc_ObjIsLatch(pFanin) ) );
- // collect the delay info
- if ( !Abc_NtkHasMapping(pNtk) )
- {
- Abc_ObjForEachFanin( pObj, pFanin, k )
- Vec_VecPush( p->vMapDelays, i, (void *)Abc_Float2Int(1.0) );
- }
- else
- {
- Mio_Pin_t * pPin = Mio_GateReadPins(pObj->pData);
- float Max, tDelayBlockRise, tDelayBlockFall;
- Abc_ObjForEachFanin( pObj, pFanin, k )
- {
- tDelayBlockRise = (float)Mio_PinReadDelayBlockRise( pPin );
- tDelayBlockFall = (float)Mio_PinReadDelayBlockFall( pPin );
- Max = ABC_MAX( tDelayBlockRise, tDelayBlockFall );
- Vec_VecPush( p->vMapDelays, i, (void *)Abc_Float2Int(Max) );
- pPin = Mio_PinReadNext(pPin);
- }
- }
- }
-
- // set the cutset composed of latch drivers
-// Abc_NtkAigCutsetCopy( pNtk );
-// Seq_NtkLatchGetEqualFaninNum( pNtkNew );
-
- // convert the network back into BDDs if this is how it was
- if ( fHasBdds )
- Abc_NtkSopToBdd(pNtk);
-
- // copy EXDC and check correctness
- if ( pNtk->pExdc )
- fprintf( stdout, "Warning: EXDC is not copied when converting to sequential AIG.\n" );
- if ( !Abc_NtkCheck( pNtkNew ) )
- fprintf( stdout, "Seq_NtkRetimeDerive(): Network check has failed.\n" );
- return pNtkNew;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Strashes one logic node using its SOP.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t * Seq_NodeRetimeDerive( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pRoot, char * pSop, Vec_Ptr_t * vFanins )
-{
- extern Abc_Obj_t * Dec_GraphToNetworkNoStrash( Abc_Ntk_t * pNtk, Dec_Graph_t * pGraph );
- Dec_Graph_t * pFForm;
- Dec_Node_t * pNode;
- Abc_Obj_t * pResult, * pFanin, * pMirror;
- int i, nFanins;
-
- // get the number of node's fanins
- nFanins = Abc_ObjFaninNum( pRoot );
- assert( nFanins == Abc_SopGetVarNum(pSop) );
- if ( nFanins < 2 )
- {
- if ( Abc_SopIsConst1(pSop) )
- pFanin = Abc_AigConst1(pNtkNew);
- else if ( Abc_SopIsConst0(pSop) )
- pFanin = Abc_ObjNot( Abc_AigConst1(pNtkNew) );
- else if ( Abc_SopIsBuf(pSop) )
- pFanin = Abc_ObjFanin0(pRoot)->pCopy;
- else if ( Abc_SopIsInv(pSop) )
- pFanin = Abc_ObjNot( Abc_ObjFanin0(pRoot)->pCopy );
- else
- assert( 0 );
- // create the node with these fanins
- pMirror = Abc_NtkCreateNode( pNtkNew );
- Abc_ObjAddFanin( pMirror, pFanin );
- Abc_ObjAddFanin( pMirror, pFanin );
- Vec_PtrPush( vFanins, pMirror );
- return pMirror;
- }
-
- // perform factoring
- pFForm = Dec_Factor( pSop );
- // collect the fanins
- Dec_GraphForEachLeaf( pFForm, pNode, i )
- {
- pFanin = Abc_ObjFanin(pRoot,i)->pCopy;
- pMirror = Abc_NtkCreateNode( pNtkNew );
- Abc_ObjAddFanin( pMirror, pFanin );
- Abc_ObjAddFanin( pMirror, pFanin );
- Vec_PtrPush( vFanins, pMirror );
- pNode->pFunc = pMirror;
- }
- // perform strashing
- pResult = Dec_GraphToNetworkNoStrash( pNtkNew, pFForm );
- Dec_GraphFree( pFForm );
- return pResult;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Reconstructs the network after retiming.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Seq_NtkRetimeReconstruct( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtkSeq )
-{
- Abc_Seq_t * p = pNtkSeq->pManFunc;
- Seq_Lat_t * pRing0, * pRing1;
- Abc_Ntk_t * pNtkNew;
- Abc_Obj_t * pObj, * pFanin, * pFaninNew, * pMirror;
- Vec_Ptr_t * vMirrors;
- int i, k;
-
- assert( !Abc_NtkIsSeq(pNtkOld) );
- assert( Abc_NtkIsSeq(pNtkSeq) );
-
- // transfer the pointers pNtkOld->pNtkSeq from pCopy to pNext
- Abc_NtkForEachObj( pNtkOld, pObj, i )
- pObj->pNext = pObj->pCopy;
-
- // start the final network
- pNtkNew = Abc_NtkStartFrom( pNtkSeq, pNtkOld->ntkType, pNtkOld->ntkFunc );
-
- // transfer the pointers to the old network
- if ( Abc_AigConst1(pNtkOld) )
- Abc_AigConst1(pNtkOld)->pCopy = Abc_AigConst1(pNtkNew);
- Abc_NtkForEachPi( pNtkOld, pObj, i )
- pObj->pCopy = pObj->pNext->pCopy;
- Abc_NtkForEachPo( pNtkOld, pObj, i )
- pObj->pCopy = pObj->pNext->pCopy;
-
- // copy the internal nodes of the old network into the new network
- // transfer the pointers pNktOld->pNtkNew to pNtkSeq->pNtkNew
- Abc_NtkForEachNode( pNtkOld, pObj, i )
- {
- if ( i == 0 ) continue;
- Abc_NtkDupObj( pNtkNew, pObj, 0 );
- pObj->pNext->pCopy = pObj->pCopy;
- }
- Abc_NtkForEachLatch( pNtkOld, pObj, i )
- pObj->pCopy = Abc_ObjFanin0(pObj)->pCopy;
-
- // share the latches
- Seq_NtkShareLatches( pNtkNew, pNtkSeq );
-
- // connect the objects
-// Abc_NtkForEachNode( pNtkOld, pObj, i )
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i )
- {
- // pObj is from pNtkSeq - transform to pNtkOld
- pObj = pObj->pNext;
- // iterate through the fanins of this node in the old network
- vMirrors = Vec_VecEntry( p->vMapFanins, i );
- Abc_ObjForEachFanin( pObj, pFanin, k )
- {
- pMirror = Vec_PtrEntry( vMirrors, k );
- assert( Seq_ObjFaninL0(pMirror) == Seq_ObjFaninL1(pMirror) );
- pRing0 = Seq_NodeGetRing( pMirror, 0 );
- pRing1 = Seq_NodeGetRing( pMirror, 1 );
- if ( pRing0 == NULL )
- {
- Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy );
- continue;
- }
-// assert( pRing0->pLatch == pRing1->pLatch );
- if ( pRing0->pLatch->pData > pRing1->pLatch->pData )
- Abc_ObjAddFanin( pObj->pCopy, pRing0->pLatch );
- else
- Abc_ObjAddFanin( pObj->pCopy, pRing1->pLatch );
- }
- }
-
- // connect the POs
- Abc_NtkForEachPo( pNtkOld, pObj, i )
- {
- pFanin = Abc_ObjFanin0(pObj);
- pRing0 = Seq_NodeGetRing( Abc_NtkPo(pNtkSeq, i), 0 );
- if ( pRing0 )
- pFaninNew = pRing0->pLatch;
- else
- pFaninNew = pFanin->pCopy;
- assert( pFaninNew != NULL );
- Abc_ObjAddFanin( pObj->pCopy, pFaninNew );
- }
-
- // clean the result of latch sharing
- Seq_NtkShareLatchesClean( pNtkSeq );
-
- // add the latches and their names
- Abc_NtkAddDummyBoxNames( pNtkNew );
- Abc_NtkOrderCisCos( pNtkNew );
- // fix the problem with complemented and duplicated CO edges
- Abc_NtkLogicMakeSimpleCos( pNtkNew, 1 );
- if ( !Abc_NtkCheck( pNtkNew ) )
- fprintf( stdout, "Seq_NtkRetimeReconstruct(): Network check has failed.\n" );
- return pNtkNew;
-
-}
-
-/**Function*************************************************************
-
- Synopsis [Reconstructs the network after retiming.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t * Seq_EdgeReconstruct_rec( Abc_Obj_t * pGoal, Abc_Obj_t * pNode )
-{
- Seq_Lat_t * pRing;
- Abc_Obj_t * pFanin, * pRes = NULL;
-
- if ( !Abc_AigNodeIsAnd(pNode) )
- return NULL;
-
- // consider the first fanin
- pFanin = Abc_ObjFanin0(pNode);
- if ( pFanin->pCopy == NULL ) // internal node
- pRes = Seq_EdgeReconstruct_rec( pGoal, pFanin );
- else if ( pFanin == pGoal )
- {
- if ( pRing = Seq_NodeGetRing( pNode, 0 ) )
- pRes = pRing->pLatch;
- else
- pRes = pFanin->pCopy;
- }
- if ( pRes != NULL )
- return pRes;
-
- // consider the second fanin
- pFanin = Abc_ObjFanin1(pNode);
- if ( pFanin->pCopy == NULL ) // internal node
- pRes = Seq_EdgeReconstruct_rec( pGoal, pFanin );
- else if ( pFanin == pGoal )
- {
- if ( pRing = Seq_NodeGetRing( pNode, 1 ) )
- pRes = pRing->pLatch;
- else
- pRes = pFanin->pCopy;
- }
- return pRes;
-}
-
-/**Function*************************************************************
-
- Synopsis [Reconstructs the network after retiming.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t * Seq_EdgeReconstructPO( Abc_Obj_t * pNode )
-{
- Seq_Lat_t * pRing;
- assert( Abc_ObjIsPo(pNode) );
- if ( pRing = Seq_NodeGetRing( pNode, 0 ) )
- return pRing->pLatch;
- else
- return Abc_ObjFanin0(pNode)->pCopy;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqRetIter.c b/src/base/seq/seqRetIter.c
deleted file mode 100644
index 816e71a1..00000000
--- a/src/base/seq/seqRetIter.c
+++ /dev/null
@@ -1,408 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqRetIter.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [Iterative delay computation in FPGA mapping/retiming package.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqRetIter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-#include "main.h"
-#include "fpga.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-static float Seq_NtkMappingSearch_rec( Abc_Ntk_t * pNtk, float FiMin, float FiMax, float Delta, int fVerbose );
-static int Seq_NtkMappingForPeriod( Abc_Ntk_t * pNtk, float Fi, int fVerbose );
-static int Seq_NtkNodeUpdateLValue( Abc_Obj_t * pObj, float Fi, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vDelays );
-static void Seq_NodeRetimeSetLag_rec( Abc_Obj_t * pNode, char Lag );
-
-static void Seq_NodePrintInfo( Abc_Obj_t * pNode );
-static void Seq_NodePrintInfoPlus( Abc_Obj_t * pNode );
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Computes the retiming lags for arbitrary network.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Abc_Obj_t * pNode;
- float FiMax, Delta;
- int i, RetValue;
- char NodeLag;
-
- assert( Abc_NtkIsSeq( pNtk ) );
-
- // the root AND gates and node delay should be assigned
- assert( p->vMapAnds );
- assert( p->vMapCuts );
- assert( p->vMapDelays );
- assert( p->vMapFanins );
-
- // guess the upper bound on the clock period
- if ( Abc_NtkHasMapping(pNtkOld) )
- {
- // assign the accuracy for min-period computation
- Delta = Mio_LibraryReadDelayNand2Max(Abc_FrameReadLibGen());
- if ( Delta == 0.0 )
- {
- Delta = Mio_LibraryReadDelayAnd2Max(Abc_FrameReadLibGen());
- if ( Delta == 0.0 )
- {
- printf( "Cannot retime/map if the library does not have NAND2 or AND2.\n" );
- return 0;
- }
- }
- // get the upper bound on the clock period
- FiMax = Delta * 2 + Abc_NtkDelayTrace(pNtkOld);
- Delta /= 2;
- }
- else
- {
- FiMax = (float)2.0 + Abc_NtkGetLevelNum(pNtkOld);
- Delta = 1;
- }
-
- // make sure this clock period is feasible
- if ( !Seq_NtkMappingForPeriod( pNtk, FiMax, fVerbose ) )
- {
- printf( "Error: The upper bound on the clock period cannot be computed.\n" );
- printf( "The reason for this error may be the presence in the circuit of logic\n" );
- printf( "that is not reachable from the PIs. Mapping/retiming is not performed.\n" );
- return 0;
- }
-
- // search for the optimal clock period between 0 and nLevelMax
- p->FiBestFloat = Seq_NtkMappingSearch_rec( pNtk, 0.0, FiMax, Delta, fVerbose );
-
- // recompute the best l-values
- RetValue = Seq_NtkMappingForPeriod( pNtk, p->FiBestFloat, fVerbose );
- assert( RetValue );
-
- // fix the problem with non-converged delays
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pNode, i )
- if ( Seq_NodeGetLValueP(pNode) < -ABC_INFINITY/2 )
- Seq_NodeSetLValueP( pNode, 0 );
-
- // experiment by adding an epsilon to all LValues
-// Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pNode, i )
-// Seq_NodeSetLValueP( pNode, Seq_NodeGetLValueP(pNode) - p->fEpsilon );
-
- // save the retiming lags
- // mark the nodes
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pNode, i )
- pNode->fMarkA = 1;
- // process the nodes
- Vec_StrFill( p->vLags, p->nSize, 0 );
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pNode, i )
- {
- if ( Vec_PtrSize( Vec_VecEntry(p->vMapCuts, i) ) == 0 )
- {
- Seq_NodeSetLag( pNode, 0 );
- continue;
- }
- NodeLag = Seq_NodeComputeLagFloat( Seq_NodeGetLValueP(pNode), p->FiBestFloat );
- Seq_NodeRetimeSetLag_rec( pNode, NodeLag );
- }
- // unmark the nodes
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pNode, i )
- pNode->fMarkA = 0;
-
- // print the result
- if ( fVerbose )
- printf( "The best clock period is %6.2f.\n", p->FiBestFloat );
-/*
- {
- FILE * pTable;
- pTable = fopen( "stats.txt", "a+" );
- fprintf( pTable, "%s ", pNtk->pName );
- fprintf( pTable, "%.2f ", FiBest );
- fprintf( pTable, "\n" );
- fclose( pTable );
- }
-*/
-// Seq_NodePrintInfo( Abc_NtkObj(pNtk, 847) );
- return 1;
-}
-
-/**Function*************************************************************
-
- Synopsis [Performs binary search for the optimal clock period.]
-
- Description [Assumes that FiMin is infeasible while FiMax is feasible.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-float Seq_NtkMappingSearch_rec( Abc_Ntk_t * pNtk, float FiMin, float FiMax, float Delta, int fVerbose )
-{
- float Median;
- assert( FiMin < FiMax );
- if ( FiMin + Delta >= FiMax )
- return FiMax;
- Median = FiMin + (FiMax - FiMin)/2;
- if ( Seq_NtkMappingForPeriod( pNtk, Median, fVerbose ) )
- return Seq_NtkMappingSearch_rec( pNtk, FiMin, Median, Delta, fVerbose ); // Median is feasible
- else
- return Seq_NtkMappingSearch_rec( pNtk, Median, FiMax, Delta, fVerbose ); // Median is infeasible
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns 1 if retiming with this clock period is feasible.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkMappingForPeriod( Abc_Ntk_t * pNtk, float Fi, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Vec_Ptr_t * vLeaves, * vDelays;
- Abc_Obj_t * pObj;
- int i, c, RetValue, fChange, Counter;
- char * pReason = "";
-
- // set l-values of all nodes to be minus infinity
- Vec_IntFill( p->vLValues, p->nSize, Abc_Float2Int( (float)-ABC_INFINITY ) );
-
- // set l-values of constants and PIs
- pObj = Abc_NtkObj( pNtk, 0 );
- Seq_NodeSetLValueP( pObj, 0.0 );
- Abc_NtkForEachPi( pNtk, pObj, i )
- Seq_NodeSetLValueP( pObj, 0.0 );
-
- // update all values iteratively
- Counter = 0;
- for ( c = 0; c < p->nMaxIters; c++ )
- {
- fChange = 0;
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i )
- {
- Counter++;
- vLeaves = Vec_VecEntry( p->vMapCuts, i );
- vDelays = Vec_VecEntry( p->vMapDelays, i );
- if ( Vec_PtrSize(vLeaves) == 0 )
- {
- Seq_NodeSetLValueP( pObj, 0.0 );
- continue;
- }
- RetValue = Seq_NtkNodeUpdateLValue( pObj, Fi, vLeaves, vDelays );
- if ( RetValue == SEQ_UPDATE_YES )
- fChange = 1;
- }
- Abc_NtkForEachPo( pNtk, pObj, i )
- {
- RetValue = Seq_NtkNodeUpdateLValue( pObj, Fi, NULL, NULL );
- if ( RetValue == SEQ_UPDATE_FAIL )
- break;
- }
- if ( RetValue == SEQ_UPDATE_FAIL )
- break;
- if ( fChange == 0 )
- break;
- }
- if ( c == p->nMaxIters )
- {
- RetValue = SEQ_UPDATE_FAIL;
- pReason = "(timeout)";
- }
- else
- c++;
-
- // report the results
- if ( fVerbose )
- {
- if ( RetValue == SEQ_UPDATE_FAIL )
- printf( "Period = %6.2f. Iterations = %3d. Updates = %10d. Infeasible %s\n", Fi, c, Counter, pReason );
- else
- printf( "Period = %6.2f. Iterations = %3d. Updates = %10d. Feasible\n", Fi, c, Counter );
- }
- return RetValue != SEQ_UPDATE_FAIL;
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes the l-value of the node.]
-
- Description [The node can be internal or a PO.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkNodeUpdateLValue( Abc_Obj_t * pObj, float Fi, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vDelays )
-{
- Abc_Seq_t * p = pObj->pNtk->pManFunc;
- float lValueOld, lValueNew, lValueCur, lValuePin;
- unsigned SeqEdge;
- Abc_Obj_t * pLeaf;
- int i;
-
- assert( !Abc_ObjIsPi(pObj) );
- assert( Abc_ObjFaninNum(pObj) > 0 );
- // consider the case of the PO
- if ( Abc_ObjIsPo(pObj) )
- {
- lValueCur = Seq_NodeGetLValueP(Abc_ObjFanin0(pObj)) - Fi * Seq_ObjFaninL0(pObj);
- return (lValueCur > Fi + p->fEpsilon)? SEQ_UPDATE_FAIL : SEQ_UPDATE_NO;
- }
- // get the new arrival time of the cut output
- lValueNew = -ABC_INFINITY;
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- {
- SeqEdge = (unsigned)pLeaf;
- pLeaf = Abc_NtkObj( pObj->pNtk, SeqEdge >> 8 );
- lValueCur = Seq_NodeGetLValueP(pLeaf) - Fi * (SeqEdge & 255);
- lValuePin = Abc_Int2Float( (int)Vec_PtrEntry(vDelays, i) );
- if ( lValueNew < lValuePin + lValueCur )
- lValueNew = lValuePin + lValueCur;
- }
- // compare
- lValueOld = Seq_NodeGetLValueP( pObj );
- if ( lValueNew <= lValueOld + p->fEpsilon )
- return SEQ_UPDATE_NO;
- // update the values
- if ( lValueNew > lValueOld + p->fEpsilon )
- Seq_NodeSetLValueP( pObj, lValueNew );
- return SEQ_UPDATE_YES;
-}
-
-
-
-/**Function*************************************************************
-
- Synopsis [Add sequential edges.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NodeRetimeSetLag_rec( Abc_Obj_t * pNode, char Lag )
-{
- Abc_Obj_t * pFanin;
- if ( !Abc_AigNodeIsAnd(pNode) )
- return;
- Seq_NodeSetLag( pNode, Lag );
- // consider the first fanin
- pFanin = Abc_ObjFanin0(pNode);
- if ( pFanin->fMarkA == 0 ) // internal node
- Seq_NodeRetimeSetLag_rec( pFanin, Lag );
- // consider the second fanin
- pFanin = Abc_ObjFanin1(pNode);
- if ( pFanin->fMarkA == 0 ) // internal node
- Seq_NodeRetimeSetLag_rec( pFanin, Lag );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Add sequential edges.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NodePrintInfo( Abc_Obj_t * pNode )
-{
- Abc_Seq_t * p = pNode->pNtk->pManFunc;
- Abc_Obj_t * pFanin, * pObj, * pLeaf;
- Vec_Ptr_t * vLeaves;
- unsigned SeqEdge;
- int i, Number;
-
- // print the node
- printf( " Node = %6d. LValue = %7.2f. Lag = %2d.\n",
- pNode->Id, Seq_NodeGetLValueP(pNode), Seq_NodeGetLag(pNode) );
-
- // find the number
- Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, Number )
- if ( pObj == pNode )
- break;
-
- // get the leaves
- vLeaves = Vec_VecEntry( p->vMapCuts, Number );
-
- // print the leaves
- Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i )
- {
- SeqEdge = (unsigned)pLeaf;
- pFanin = Abc_NtkObj( pNode->pNtk, SeqEdge >> 8 );
- // print the leaf
- printf( " Fanin%d(%d) = %6d. LValue = %7.2f. Lag = %2d.\n", i, SeqEdge & 255,
- pFanin->Id, Seq_NodeGetLValueP(pFanin), Seq_NodeGetLag(pFanin) );
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Add sequential edges.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NodePrintInfoPlus( Abc_Obj_t * pNode )
-{
- Abc_Obj_t * pFanout;
- int i;
- printf( "CENTRAL NODE:\n" );
- Seq_NodePrintInfo( pNode );
- Abc_ObjForEachFanout( pNode, pFanout, i )
- {
- printf( "FANOUT%d:\n", i );
- Seq_NodePrintInfo( pFanout );
- }
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqShare.c b/src/base/seq/seqShare.c
deleted file mode 100644
index bccfff80..00000000
--- a/src/base/seq/seqShare.c
+++ /dev/null
@@ -1,393 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqShare.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [Latch sharing at the fanout stems.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqShare.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-static void Seq_NodeShareFanouts( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes );
-static void Seq_NodeShareOne( Abc_Obj_t * pNode, Abc_InitType_t Init, Vec_Ptr_t * vNodes );
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Transforms the sequential AIG to take fanout sharing into account.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkShareFanouts( Abc_Ntk_t * pNtk )
-{
- Vec_Ptr_t * vNodes;
- Abc_Obj_t * pObj;
- int i;
- vNodes = Vec_PtrAlloc( 10 );
- // share the PI latches
- Abc_NtkForEachPi( pNtk, pObj, i )
- Seq_NodeShareFanouts( pObj, vNodes );
- // share the node latches
- Abc_NtkForEachNode( pNtk, pObj, i )
- Seq_NodeShareFanouts( pObj, vNodes );
- Vec_PtrFree( vNodes );
-}
-
-/**Function*************************************************************
-
- Synopsis [Transforms the node to take fanout sharing into account.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NodeShareFanouts( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes )
-{
- Abc_Obj_t * pFanout;
- Abc_InitType_t Type;
- int nLatches[4], i;
- // skip the node with only one fanout
- if ( Abc_ObjFanoutNum(pNode) < 2 )
- return;
- // clean the the fanout counters
- for ( i = 0; i < 4; i++ )
- nLatches[i] = 0;
- // find the number of fanouts having latches of each type
- Abc_ObjForEachFanout( pNode, pFanout, i )
- {
- if ( Seq_ObjFanoutL(pNode, pFanout) == 0 )
- continue;
- Type = Seq_NodeGetInitLast( pFanout, Abc_ObjFanoutEdgeNum(pNode, pFanout) );
- nLatches[Type]++;
- }
- // decide what to do
- if ( nLatches[ABC_INIT_ZERO] > 1 && nLatches[ABC_INIT_ONE] > 1 ) // 0-group and 1-group
- {
- Seq_NodeShareOne( pNode, ABC_INIT_ZERO, vNodes ); // shares 0 and DC
- Seq_NodeShareOne( pNode, ABC_INIT_ONE, vNodes ); // shares 1 and DC
- }
- else if ( nLatches[ABC_INIT_ZERO] > 1 ) // 0-group
- Seq_NodeShareOne( pNode, ABC_INIT_ZERO, vNodes ); // shares 0 and DC
- else if ( nLatches[ABC_INIT_ONE] > 1 ) // 1-group
- Seq_NodeShareOne( pNode, ABC_INIT_ONE, vNodes ); // shares 1 and DC
- else if ( nLatches[ABC_INIT_DC] > 1 ) // DC-group
- {
- if ( nLatches[ABC_INIT_ZERO] > 0 )
- Seq_NodeShareOne( pNode, ABC_INIT_ZERO, vNodes ); // shares 0 and DC
- else
- Seq_NodeShareOne( pNode, ABC_INIT_ONE, vNodes ); // shares 1 and DC
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Transforms the node to take fanout sharing into account.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NodeShareOne( Abc_Obj_t * pNode, Abc_InitType_t Init, Vec_Ptr_t * vNodes )
-{
- Vec_Int_t * vNums = Seq_ObjLNums( pNode );
- Vec_Ptr_t * vInits = Seq_NodeLats( pNode );
- Abc_Obj_t * pFanout, * pBuffer;
- Abc_InitType_t Type, InitNew;
- int i;
- // collect the fanouts that satisfy the property (have initial value Init or DC)
- InitNew = ABC_INIT_DC;
- Vec_PtrClear( vNodes );
- Abc_ObjForEachFanout( pNode, pFanout, i )
- {
- if ( Seq_ObjFanoutL(pNode, pFanout) == 0 )
- continue;
- Type = Seq_NodeGetInitLast( pFanout, Abc_ObjFanoutEdgeNum(pNode, pFanout) );
- if ( Type == Init )
- InitNew = Init;
- if ( Type == Init || Type == ABC_INIT_DC )
- {
- Vec_PtrPush( vNodes, pFanout );
- Seq_NodeDeleteLast( pFanout, Abc_ObjFanoutEdgeNum(pNode, pFanout) );
- }
- }
- // create the new buffer
- pBuffer = Abc_NtkCreateNode( pNode->pNtk );
- Abc_ObjAddFanin( pBuffer, pNode );
-
- // grow storage for initial states
- Vec_PtrGrow( vInits, 2 * pBuffer->Id + 2 );
- for ( i = Vec_PtrSize(vInits); i < 2 * (int)pBuffer->Id + 2; i++ )
- Vec_PtrPush( vInits, NULL );
- // grow storage for numbers of latches
- Vec_IntGrow( vNums, 2 * pBuffer->Id + 2 );
- for ( i = Vec_IntSize(vNums); i < 2 * (int)pBuffer->Id + 2; i++ )
- Vec_IntPush( vNums, 0 );
- // insert the new latch
- Seq_NodeInsertFirst( pBuffer, 0, InitNew );
-
- // redirect the fanouts
- Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pFanout, i )
- Abc_ObjPatchFanin( pFanout, pNode, pBuffer );
-}
-
-
-
-
-
-/**Function*************************************************************
-
- Synopsis [Maps virtual latches into real latches.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static inline unsigned Seq_NtkShareLatchesKey( Abc_Obj_t * pObj, Abc_InitType_t Init )
-{
- return (pObj->Id << 2) | Init;
-}
-
-/**Function*************************************************************
-
- Synopsis [Maps virtual latches into real latches.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t * Seq_NtkShareLatches_rec( Abc_Ntk_t * pNtk, Abc_Obj_t * pObj, Seq_Lat_t * pRing, int nLatch, stmm_table * tLatchMap )
-{
- Abc_Obj_t * pLatch, * pFanin;
- Abc_InitType_t Init;
- unsigned Key;
- if ( nLatch == 0 )
- return pObj;
- assert( pRing->pLatch == NULL );
- // get the latch on the previous level
- pFanin = Seq_NtkShareLatches_rec( pNtk, pObj, Seq_LatNext(pRing), nLatch - 1, tLatchMap );
-
- // get the initial state
- Init = Seq_LatInit( pRing );
- // check if the latch with this initial state exists
- Key = Seq_NtkShareLatchesKey( pFanin, Init );
- if ( stmm_lookup( tLatchMap, (char *)Key, (char **)&pLatch ) )
- return pRing->pLatch = pLatch;
-
- // does not exist
- if ( Init != ABC_INIT_DC )
- {
- // check if the don't-care exists
- Key = Seq_NtkShareLatchesKey( pFanin, ABC_INIT_DC );
- if ( stmm_lookup( tLatchMap, (char *)Key, (char **)&pLatch ) ) // yes
- {
- // update the table
- stmm_delete( tLatchMap, (char **)&Key, (char **)&pLatch );
- Key = Seq_NtkShareLatchesKey( pFanin, Init );
- stmm_insert( tLatchMap, (char *)Key, (char *)pLatch );
- // change don't-care to the given value
- pLatch->pData = (void *)Init;
- return pRing->pLatch = pLatch;
- }
-
- // add the latch with this value
- pLatch = Abc_NtkCreateLatch( pNtk );
- pLatch->pData = (void *)Init;
- Abc_ObjAddFanin( pLatch, pFanin );
- // add it to the table
- Key = Seq_NtkShareLatchesKey( pFanin, Init );
- stmm_insert( tLatchMap, (char *)Key, (char *)pLatch );
- return pRing->pLatch = pLatch;
- }
- // the init value is the don't-care
-
- // check if care values exist
- Key = Seq_NtkShareLatchesKey( pFanin, ABC_INIT_ZERO );
- if ( stmm_lookup( tLatchMap, (char *)Key, (char **)&pLatch ) )
- {
- Seq_LatSetInit( pRing, ABC_INIT_ZERO );
- return pRing->pLatch = pLatch;
- }
- Key = Seq_NtkShareLatchesKey( pFanin, ABC_INIT_ONE );
- if ( stmm_lookup( tLatchMap, (char *)Key, (char **)&pLatch ) )
- {
- Seq_LatSetInit( pRing, ABC_INIT_ONE );
- return pRing->pLatch = pLatch;
- }
-
- // create the don't-care latch
- pLatch = Abc_NtkCreateLatch( pNtk );
- pLatch->pData = (void *)ABC_INIT_DC;
- Abc_ObjAddFanin( pLatch, pFanin );
- // add it to the table
- Key = Seq_NtkShareLatchesKey( pFanin, ABC_INIT_DC );
- stmm_insert( tLatchMap, (char *)Key, (char *)pLatch );
- return pRing->pLatch = pLatch;
-}
-
-/**Function*************************************************************
-
- Synopsis [Maps virtual latches into real latches.]
-
- Description [Creates new latches and assigns them to virtual latches
- on the edges of a sequential AIG. The nodes of the new network should
- be created before this procedure is called.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkShareLatches( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pObj, * pFanin;
- stmm_table * tLatchMap;
- int i;
- assert( Abc_NtkIsSeq( pNtk ) );
- tLatchMap = stmm_init_table( (int (*)(void))stmm_ptrcmp, (int (*)(void))stmm_ptrhash );
- Abc_AigForEachAnd( pNtk, pObj, i )
- {
- pFanin = Abc_ObjFanin0(pObj);
- Seq_NtkShareLatches_rec( pNtkNew, pFanin->pCopy, Seq_NodeGetRing(pObj,0), Seq_NodeCountLats(pObj,0), tLatchMap );
- pFanin = Abc_ObjFanin1(pObj);
- Seq_NtkShareLatches_rec( pNtkNew, pFanin->pCopy, Seq_NodeGetRing(pObj,1), Seq_NodeCountLats(pObj,1), tLatchMap );
- }
- Abc_NtkForEachPo( pNtk, pObj, i )
- Seq_NtkShareLatches_rec( pNtkNew, Abc_ObjFanin0(pObj)->pCopy, Seq_NodeGetRing(pObj,0), Seq_NodeCountLats(pObj,0), tLatchMap );
- stmm_free_table( tLatchMap );
-}
-
-/**Function*************************************************************
-
- Synopsis [Maps virtual latches into real latches.]
-
- Description [Creates new latches and assigns them to virtual latches
- on the edges of a sequential AIG. The nodes of the new network should
- be created before this procedure is called.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkShareLatchesMapping( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, Vec_Ptr_t * vMapAnds, int fFpga )
-{
- Seq_Match_t * pMatch;
- Abc_Obj_t * pObj, * pFanout;
- stmm_table * tLatchMap;
- Vec_Ptr_t * vNodes;
- int i, k;
- assert( Abc_NtkIsSeq( pNtk ) );
-
- // start the table
- tLatchMap = stmm_init_table( (int (*)(void))stmm_ptrcmp, (int (*)(void))stmm_ptrhash );
-
- // create the array of all nodes with sharable fanouts
- vNodes = Vec_PtrAlloc( 100 );
- Vec_PtrPush( vNodes, Abc_AigConst1(pNtk) );
- Abc_NtkForEachPi( pNtk, pObj, i )
- Vec_PtrPush( vNodes, pObj );
- if ( fFpga )
- {
- Vec_PtrForEachEntry( Abc_Obj_t *, vMapAnds, pObj, i )
- Vec_PtrPush( vNodes, pObj );
- }
- else
- {
- Vec_PtrForEachEntry( Abc_Obj_t *, vMapAnds, pMatch, i )
- Vec_PtrPush( vNodes, pMatch->pAnd );
- }
-
- // process nodes used in the mapping
- Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i )
- {
- // make sure the label is clean
- Abc_ObjForEachFanout( pObj, pFanout, k )
- assert( pFanout->fMarkC == 0 );
- Abc_ObjForEachFanout( pObj, pFanout, k )
- {
- if ( pFanout->fMarkC )
- continue;
- pFanout->fMarkC = 1;
- if ( Abc_ObjFaninId0(pFanout) == pObj->Id )
- Seq_NtkShareLatches_rec( pNtkNew, pObj->pCopy, Seq_NodeGetRing(pFanout,0), Seq_NodeCountLats(pFanout,0), tLatchMap );
- if ( Abc_ObjFaninId1(pFanout) == pObj->Id )
- Seq_NtkShareLatches_rec( pNtkNew, pObj->pCopy, Seq_NodeGetRing(pFanout,1), Seq_NodeCountLats(pFanout,1), tLatchMap );
- }
- // clean the label
- Abc_ObjForEachFanout( pObj, pFanout, k )
- pFanout->fMarkC = 0;
- }
- stmm_free_table( tLatchMap );
- // return to the old array
- Vec_PtrFree( vNodes );
-}
-
-/**Function*************************************************************
-
- Synopsis [Clean the latches after sharing them.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkShareLatchesClean( Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pObj;
- int i;
- assert( Abc_NtkIsSeq( pNtk ) );
- Abc_AigForEachAnd( pNtk, pObj, i )
- {
- Seq_NodeCleanLats( pObj, 0 );
- Seq_NodeCleanLats( pObj, 1 );
- }
- Abc_NtkForEachPo( pNtk, pObj, i )
- Seq_NodeCleanLats( pObj, 0 );
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/seq/seqUtil.c b/src/base/seq/seqUtil.c
deleted file mode 100644
index 137151e2..00000000
--- a/src/base/seq/seqUtil.c
+++ /dev/null
@@ -1,602 +0,0 @@
-/**CFile****************************************************************
-
- FileName [seqUtil.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Construction and manipulation of sequential AIGs.]
-
- Synopsis [Various utilities working with sequential AIGs.]
-
- Author [Alan Mishchenko]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - June 20, 2005.]
-
- Revision [$Id: seqUtil.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "seqInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Returns the maximum latch number on any of the fanouts.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkLevelMax( Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pNode;
- int i, Result;
- assert( Abc_NtkIsSeq(pNtk) );
- Result = 0;
- Abc_NtkForEachPo( pNtk, pNode, i )
- {
- pNode = Abc_ObjFanin0(pNode);
- if ( Result < (int)pNode->Level )
- Result = pNode->Level;
- }
- Abc_SeqForEachCutsetNode( pNtk, pNode, i )
- {
- if ( Result < (int)pNode->Level )
- Result = pNode->Level;
- }
- return Result;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns the maximum latch number on any of the fanouts.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_ObjFanoutLMax( Abc_Obj_t * pObj )
-{
- Abc_Obj_t * pFanout;
- int i, nLatchCur, nLatchRes;
- if ( Abc_ObjFanoutNum(pObj) == 0 )
- return 0;
- nLatchRes = 0;
- Abc_ObjForEachFanout( pObj, pFanout, i )
- {
- nLatchCur = Seq_ObjFanoutL(pObj, pFanout);
- if ( nLatchRes < nLatchCur )
- nLatchRes = nLatchCur;
- }
- assert( nLatchRes >= 0 );
- return nLatchRes;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns the minimum latch number on any of the fanouts.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_ObjFanoutLMin( Abc_Obj_t * pObj )
-{
- Abc_Obj_t * pFanout;
- int i, nLatchCur, nLatchRes;
- if ( Abc_ObjFanoutNum(pObj) == 0 )
- return 0;
- nLatchRes = ABC_INFINITY;
- Abc_ObjForEachFanout( pObj, pFanout, i )
- {
- nLatchCur = Seq_ObjFanoutL(pObj, pFanout);
- if ( nLatchRes > nLatchCur )
- nLatchRes = nLatchCur;
- }
- assert( nLatchRes < ABC_INFINITY );
- return nLatchRes;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns the sum of latches on the fanout edges.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_ObjFanoutLSum( Abc_Obj_t * pObj )
-{
- Abc_Obj_t * pFanout;
- int i, nSum = 0;
- Abc_ObjForEachFanout( pObj, pFanout, i )
- nSum += Seq_ObjFanoutL(pObj, pFanout);
- return nSum;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns the sum of latches on the fanin edges.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_ObjFaninLSum( Abc_Obj_t * pObj )
-{
- Abc_Obj_t * pFanin;
- int i, nSum = 0;
- Abc_ObjForEachFanin( pObj, pFanin, i )
- nSum += Seq_ObjFaninL(pObj, i);
- return nSum;
-}
-
-/**Function*************************************************************
-
- Synopsis [Generates the printable edge label with the initial state.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-char * Seq_ObjFaninGetInitPrintable( Abc_Obj_t * pObj, int Edge )
-{
- static char Buffer[1000];
- Abc_InitType_t Init;
- int nLatches, i;
- nLatches = Seq_ObjFaninL( pObj, Edge );
- for ( i = 0; i < nLatches; i++ )
- {
- Init = Seq_LatInit( Seq_NodeGetLat(pObj, Edge, i) );
- if ( Init == ABC_INIT_NONE )
- Buffer[i] = '_';
- else if ( Init == ABC_INIT_ZERO )
- Buffer[i] = '0';
- else if ( Init == ABC_INIT_ONE )
- Buffer[i] = '1';
- else if ( Init == ABC_INIT_DC )
- Buffer[i] = 'x';
- else assert( 0 );
- }
- Buffer[nLatches] = 0;
- return Buffer;
-}
-
-/**Function*************************************************************
-
- Synopsis [Sets the given value to all the latches of the edge.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NodeLatchSetValues( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init )
-{
- Seq_Lat_t * pLat, * pRing;
- int c;
- pRing = Seq_NodeGetRing(pObj, Edge);
- if ( pRing == NULL )
- return;
- for ( c = 0, pLat = pRing; !c || pLat != pRing; c++, pLat = pLat->pNext )
- Seq_LatSetInit( pLat, Init );
-}
-
-/**Function*************************************************************
-
- Synopsis [Sets the given value to all the latches of the edge.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkLatchSetValues( Abc_Ntk_t * pNtk, Abc_InitType_t Init )
-{
- Abc_Obj_t * pObj;
- int i;
- assert( Abc_NtkIsSeq( pNtk ) );
- Abc_NtkForEachPo( pNtk, pObj, i )
- Seq_NodeLatchSetValues( pObj, 0, Init );
- Abc_NtkForEachNode( pNtk, pObj, i )
- {
- Seq_NodeLatchSetValues( pObj, 0, Init );
- Seq_NodeLatchSetValues( pObj, 1, Init );
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of latches in the sequential AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkLatchNum( Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pObj;
- int i, Counter;
- assert( Abc_NtkIsSeq( pNtk ) );
- Counter = 0;
- Abc_NtkForEachNode( pNtk, pObj, i )
- Counter += Seq_ObjFaninLSum( pObj );
- Abc_NtkForEachPo( pNtk, pObj, i )
- Counter += Seq_ObjFaninLSum( pObj );
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of latches in the sequential AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkLatchNumMax( Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pObj;
- int i, Max, Cur;
- assert( Abc_NtkIsSeq( pNtk ) );
- Max = 0;
- Abc_AigForEachAnd( pNtk, pObj, i )
- {
- Cur = Seq_ObjFaninLMax( pObj );
- if ( Max < Cur )
- Max = Cur;
- }
- Abc_NtkForEachPo( pNtk, pObj, i )
- {
- Cur = Seq_ObjFaninL0( pObj );
- if ( Max < Cur )
- Max = Cur;
- }
- return Max;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of latches in the sequential AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkLatchNumShared( Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pObj;
- int i, Counter;
- assert( Abc_NtkIsSeq( pNtk ) );
- Counter = 0;
- Abc_NtkForEachPi( pNtk, pObj, i )
- Counter += Seq_ObjFanoutLMax( pObj );
- Abc_NtkForEachNode( pNtk, pObj, i )
- Counter += Seq_ObjFanoutLMax( pObj );
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of latches in the sequential AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_ObjLatchGetInitNums( Abc_Obj_t * pObj, int Edge, int * pInits )
-{
- Abc_InitType_t Init;
- int nLatches, i;
- nLatches = Seq_ObjFaninL( pObj, Edge );
- for ( i = 0; i < nLatches; i++ )
- {
- Init = Seq_NodeGetInitOne( pObj, Edge, i );
- pInits[Init]++;
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Counts the number of latches in the sequential AIG.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkLatchGetInitNums( Abc_Ntk_t * pNtk, int * pInits )
-{
- Abc_Obj_t * pObj;
- int i;
- assert( Abc_NtkIsSeq( pNtk ) );
- for ( i = 0; i < 4; i++ )
- pInits[i] = 0;
- Abc_NtkForEachPo( pNtk, pObj, i )
- Seq_ObjLatchGetInitNums( pObj, 0, pInits );
- Abc_NtkForEachNode( pNtk, pObj, i )
- {
- if ( Abc_ObjFaninNum(pObj) > 0 )
- Seq_ObjLatchGetInitNums( pObj, 0, pInits );
- if ( Abc_ObjFaninNum(pObj) > 1 )
- Seq_ObjLatchGetInitNums( pObj, 1, pInits );
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Report nodes with equal fanins.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkLatchGetEqualFaninNum( Abc_Ntk_t * pNtk )
-{
- Abc_Obj_t * pObj;
- int i, Counter;
- assert( Abc_NtkIsSeq( pNtk ) );
- Counter = 0;
- Abc_AigForEachAnd( pNtk, pObj, i )
- if ( Abc_ObjFaninId0(pObj) == Abc_ObjFaninId1(pObj) )
- Counter++;
- if ( Counter )
- printf( "The number of nodes with equal fanins = %d.\n", Counter );
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Returns the maximum latch number on any of the fanouts.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkCountNodesAboveLimit( Abc_Ntk_t * pNtk, int Limit )
-{
- Abc_Obj_t * pNode;
- int i, Counter;
- assert( !Abc_NtkIsSeq(pNtk) );
- Counter = 0;
- Abc_NtkForEachNode( pNtk, pNode, i )
- if ( Abc_ObjFaninNum(pNode) > Limit )
- Counter++;
- return Counter;
-}
-
-/**Function*************************************************************
-
- Synopsis [Computes area flows.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_MapComputeAreaFlows( Abc_Ntk_t * pNtk, int fVerbose )
-{
- Abc_Seq_t * p = pNtk->pManFunc;
- Abc_Obj_t * pObj;
- float AFlow;
- int i, c;
-
- assert( Abc_NtkIsSeq(pNtk) );
-
- Vec_IntFill( p->vAFlows, p->nSize, Abc_Float2Int( (float)0.0 ) );
-
- // update all values iteratively
- for ( c = 0; c < 7; c++ )
- {
- Abc_AigForEachAnd( pNtk, pObj, i )
- {
- AFlow = (float)1.0 + Seq_NodeGetFlow( Abc_ObjFanin0(pObj) ) + Seq_NodeGetFlow( Abc_ObjFanin1(pObj) );
- AFlow /= Abc_ObjFanoutNum(pObj);
- pObj->pNext = (void *)Abc_Float2Int( AFlow );
- }
- Abc_AigForEachAnd( pNtk, pObj, i )
- {
- AFlow = Abc_Int2Float( (int)pObj->pNext );
- pObj->pNext = NULL;
- Seq_NodeSetFlow( pObj, AFlow );
-
-// printf( "%5d : %6.1f\n", pObj->Id, Seq_NodeGetFlow(pObj) );
- }
-// printf( "\n" );
- }
- return 1;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Collects all the internal nodes reachable from POs.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkReachNodesFromPos_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vNodes )
-{
- // skip if this is a non-PI node
- if ( !Abc_AigNodeIsAnd(pAnd) )
- return;
- // skip a visited node
- if ( Abc_NodeIsTravIdCurrent(pAnd) )
- return;
- Abc_NodeSetTravIdCurrent(pAnd);
- // visit the fanin nodes
- Seq_NtkReachNodesFromPos_rec( Abc_ObjFanin0(pAnd), vNodes );
- Seq_NtkReachNodesFromPos_rec( Abc_ObjFanin1(pAnd), vNodes );
- // add this node
- Vec_PtrPush( vNodes, pAnd );
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects all the internal nodes reachable from POs.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Seq_NtkReachNodesFromPis_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vNodes )
-{
- Abc_Obj_t * pFanout;
- int k;
- // skip if this is a non-PI node
- if ( !Abc_AigNodeIsAnd(pAnd) )
- return;
- // skip a visited node
- if ( Abc_NodeIsTravIdCurrent(pAnd) )
- return;
- Abc_NodeSetTravIdCurrent(pAnd);
- // visit the fanin nodes
- Abc_ObjForEachFanout( pAnd, pFanout, k )
- Seq_NtkReachNodesFromPis_rec( pFanout, vNodes );
- // add this node
- Vec_PtrPush( vNodes, pAnd );
-}
-
-/**Function*************************************************************
-
- Synopsis [Collects all the internal nodes reachable from POs.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Vec_Ptr_t * Seq_NtkReachNodes( Abc_Ntk_t * pNtk, int fFromPos )
-{
- Vec_Ptr_t * vNodes;
- Abc_Obj_t * pObj, * pFanout;
- int i, k;
- assert( Abc_NtkIsSeq(pNtk) );
- vNodes = Vec_PtrAlloc( 1000 );
- Abc_NtkIncrementTravId( pNtk );
- if ( fFromPos )
- {
- // traverse the cone of each PO
- Abc_NtkForEachPo( pNtk, pObj, i )
- Seq_NtkReachNodesFromPos_rec( Abc_ObjFanin0(pObj), vNodes );
- }
- else
- {
- // tranvers the reverse cone of the constant node
- pObj = Abc_AigConst1( pNtk );
- Abc_ObjForEachFanout( pObj, pFanout, k )
- Seq_NtkReachNodesFromPis_rec( pFanout, vNodes );
- // tranvers the reverse cone of the PIs
- Abc_NtkForEachPi( pNtk, pObj, i )
- Abc_ObjForEachFanout( pObj, pFanout, k )
- Seq_NtkReachNodesFromPis_rec( pFanout, vNodes );
- }
- return vNodes;
-}
-
-/**Function*************************************************************
-
- Synopsis [Perform sequential cleanup.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Seq_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose )
-{
- Vec_Ptr_t * vNodesPo, * vNodesPi;
- int Counter = 0;
- assert( Abc_NtkIsSeq(pNtk) );
- // collect the nodes reachable from POs and PIs
- vNodesPo = Seq_NtkReachNodes( pNtk, 1 );
- vNodesPi = Seq_NtkReachNodes( pNtk, 0 );
- printf( "Total nodes = %6d. Reachable from POs = %6d. Reachable from PIs = %6d.\n",
- Abc_NtkNodeNum(pNtk), Vec_PtrSize(vNodesPo), Vec_PtrSize(vNodesPi) );
- if ( Abc_NtkNodeNum(pNtk) > Vec_PtrSize(vNodesPo) )
- {
-// Counter = Abc_NtkReduceNodes( pNtk, vNodesPo );
- Counter = 0;
- if ( fVerbose )
- printf( "Cleanup removed %d nodes that are not reachable from the POs.\n", Counter );
- }
- Vec_PtrFree( vNodesPo );
- Vec_PtrFree( vNodesPi );
- return Counter;
-}
-
-////////////////////////////////////////////////////////////////////////
-/// END OF FILE ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/base/test/test.c b/src/base/test/test.c
index f603befd..92094d9a 100644
--- a/src/base/test/test.c
+++ b/src/base/test/test.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "main.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/base/ver/ver.h b/src/base/ver/ver.h
index e421ff95..8c9d6e00 100644
--- a/src/base/ver/ver.h
+++ b/src/base/ver/ver.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __VER_H__
-#define __VER_H__
+#ifndef ABC__base__ver__ver_h
+#define ABC__base__ver__ver_h
////////////////////////////////////////////////////////////////////////
@@ -27,8 +27,7 @@
////////////////////////////////////////////////////////////////////////
#include <stdio.h>
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/base/ver/verCore.c b/src/base/ver/verCore.c
index d2744402..1a924c31 100644
--- a/src/base/ver/verCore.c
+++ b/src/base/ver/verCore.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "ver.h"
-#include "mio.h"
-#include "main.h"
+#include "src/map/mio/mio.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cas/cas.h b/src/bdd/cas/cas.h
index 33958325..9ef6f1fa 100644
--- a/src/bdd/cas/cas.h
+++ b/src/bdd/cas/cas.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __CAS_H__
-#define __CAS_H__
+#ifndef ABC__bdd__cas__cas_h
+#define ABC__bdd__cas__cas_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/bdd/cas/casCore.c b/src/bdd/cas/casCore.c
index 5511b8e7..b73b5b3f 100644
--- a/src/bdd/cas/casCore.c
+++ b/src/bdd/cas/casCore.c
@@ -23,9 +23,9 @@
#include <string.h>
#include <time.h>
-#include "main.h"
-#include "cmd.h"
-#include "extra.h"
+#include "src/base/main/main.h"
+#include "src/base/cmd/cmd.h"
+#include "src/misc/extra/extraBdd.h"
#include "cas.h"
ABC_NAMESPACE_IMPL_START
@@ -112,7 +112,7 @@ int Abc_CascadeExperiment( char * pFileGeneric, DdManager * dd, DdNode ** pOutpu
// create the variables to encode the outputs
- nVarsEnc = Extra_Base2Log( nOuts );
+ nVarsEnc = Abc_Base2Log( nOuts );
for ( i = 0; i < nVarsEnc; i++ )
pbVarsEnc[i] = Cudd_bddNewVarAtLevel( dd, i );
@@ -704,7 +704,7 @@ DdNode * GetSingleOutputFunctionRemappedNewDD( DdManager * dd, DdNode ** pOutput
}
// select the encoding variables to follow immediately after the original variables
- nVarsEnc = Extra_Base2Log(nOuts);
+ nVarsEnc = Abc_Base2Log(nOuts);
/*
for ( v = 0; v < nVarsEnc; v++ )
if ( nVarsMax + v < dd->size )
diff --git a/src/bdd/cas/casDec.c b/src/bdd/cas/casDec.c
index 111f559e..ea132540 100644
--- a/src/bdd/cas/casDec.c
+++ b/src/bdd/cas/casDec.c
@@ -23,7 +23,7 @@
#include <stdlib.h>
#include <time.h>
-#include "extra.h"
+#include "src/misc/extra/extraBdd.h"
#include "cas.h"
ABC_NAMESPACE_IMPL_START
@@ -175,7 +175,7 @@ int CreateDecomposedNetwork( DdManager * dd, DdNode * aFunc, char ** pNames, int
p->nIns = s_LutSize;
p->nInsP = PrevMulti;
p->nCols = Profile[nNames-(nVarsRem-(s_LutSize-PrevMulti))];
- p->nMulti = Extra_Base2Log(p->nCols);
+ p->nMulti = Abc_Base2Log(p->nCols);
p->Level = nNames-nVarsRem;
nVarsRem = nVarsRem-(s_LutSize-PrevMulti);
diff --git a/src/bdd/cudd/cudd.h b/src/bdd/cudd/cudd.h
index 9231b5ab..fb1d6d58 100644
--- a/src/bdd/cudd/cudd.h
+++ b/src/bdd/cudd/cudd.h
@@ -54,16 +54,16 @@
******************************************************************************/
-#ifndef _CUDD
-#define _CUDD
+#ifndef ABC__bdd__cudd__cudd_h
+#define ABC__bdd__cudd__cudd_h
/*---------------------------------------------------------------------------*/
/* Nested includes */
/*---------------------------------------------------------------------------*/
-#include "mtr.h"
-#include "epd.h"
+#include "src/bdd/mtr/mtr.h"
+#include "src/bdd/epd/epd.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/bdd/cudd/cuddAPI.c b/src/bdd/cudd/cuddAPI.c
index e2926ea2..6456d17c 100644
--- a/src/bdd/cudd/cuddAPI.c
+++ b/src/bdd/cudd/cuddAPI.c
@@ -191,7 +191,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddAddAbs.c b/src/bdd/cudd/cuddAddAbs.c
index f420f99e..44c77d94 100644
--- a/src/bdd/cudd/cuddAddAbs.c
+++ b/src/bdd/cudd/cuddAddAbs.c
@@ -59,7 +59,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddAddApply.c b/src/bdd/cudd/cuddAddApply.c
index 7bea5871..ec77229c 100644
--- a/src/bdd/cudd/cuddAddApply.c
+++ b/src/bdd/cudd/cuddAddApply.c
@@ -69,7 +69,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddAddFind.c b/src/bdd/cudd/cuddAddFind.c
index 4d63965d..57343b1a 100644
--- a/src/bdd/cudd/cuddAddFind.c
+++ b/src/bdd/cudd/cuddAddFind.c
@@ -54,7 +54,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddAddInv.c b/src/bdd/cudd/cuddAddInv.c
index cae00ca1..e15da46e 100644
--- a/src/bdd/cudd/cuddAddInv.c
+++ b/src/bdd/cudd/cuddAddInv.c
@@ -51,7 +51,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddAddIte.c b/src/bdd/cudd/cuddAddIte.c
index 67f1cf14..b9b8c3e3 100644
--- a/src/bdd/cudd/cuddAddIte.c
+++ b/src/bdd/cudd/cuddAddIte.c
@@ -60,7 +60,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddAddNeg.c b/src/bdd/cudd/cuddAddNeg.c
index c21c995a..192ea513 100644
--- a/src/bdd/cudd/cuddAddNeg.c
+++ b/src/bdd/cudd/cuddAddNeg.c
@@ -53,7 +53,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddAddWalsh.c b/src/bdd/cudd/cuddAddWalsh.c
index e8e8a641..0ad53418 100644
--- a/src/bdd/cudd/cuddAddWalsh.c
+++ b/src/bdd/cudd/cuddAddWalsh.c
@@ -53,7 +53,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddAndAbs.c b/src/bdd/cudd/cuddAndAbs.c
index b42f376d..00ba67b4 100644
--- a/src/bdd/cudd/cuddAndAbs.c
+++ b/src/bdd/cudd/cuddAndAbs.c
@@ -52,7 +52,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddAnneal.c b/src/bdd/cudd/cuddAnneal.c
index 7a08b5ae..943265cc 100644
--- a/src/bdd/cudd/cuddAnneal.c
+++ b/src/bdd/cudd/cuddAnneal.c
@@ -62,7 +62,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddApa.c b/src/bdd/cudd/cuddApa.c
index 82547b54..8515ee0a 100644
--- a/src/bdd/cudd/cuddApa.c
+++ b/src/bdd/cudd/cuddApa.c
@@ -70,7 +70,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddApprox.c b/src/bdd/cudd/cuddApprox.c
index 1fdb595f..203c438d 100644
--- a/src/bdd/cudd/cuddApprox.c
+++ b/src/bdd/cudd/cuddApprox.c
@@ -78,7 +78,7 @@
#else
#define DBL_MAX_EXP 1024
#endif
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddBddAbs.c b/src/bdd/cudd/cuddBddAbs.c
index 9bcb32ad..7dc3ef56 100644
--- a/src/bdd/cudd/cuddBddAbs.c
+++ b/src/bdd/cudd/cuddBddAbs.c
@@ -62,7 +62,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddBddCorr.c b/src/bdd/cudd/cuddBddCorr.c
index 62f48bde..4606ea48 100644
--- a/src/bdd/cudd/cuddBddCorr.c
+++ b/src/bdd/cudd/cuddBddCorr.c
@@ -57,7 +57,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddBddIte.c b/src/bdd/cudd/cuddBddIte.c
index b4921fb2..d3386088 100644
--- a/src/bdd/cudd/cuddBddIte.c
+++ b/src/bdd/cudd/cuddBddIte.c
@@ -72,7 +72,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddBridge.c b/src/bdd/cudd/cuddBridge.c
index c051666d..75a5fa2a 100644
--- a/src/bdd/cudd/cuddBridge.c
+++ b/src/bdd/cudd/cuddBridge.c
@@ -71,7 +71,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddCache.c b/src/bdd/cudd/cuddCache.c
index b8978ab6..31545bd6 100644
--- a/src/bdd/cudd/cuddCache.c
+++ b/src/bdd/cudd/cuddCache.c
@@ -63,7 +63,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddCheck.c b/src/bdd/cudd/cuddCheck.c
index 5526aaf2..c4b9b5c2 100644
--- a/src/bdd/cudd/cuddCheck.c
+++ b/src/bdd/cudd/cuddCheck.c
@@ -61,7 +61,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddClip.c b/src/bdd/cudd/cuddClip.c
index 028474fe..6d4216a9 100644
--- a/src/bdd/cudd/cuddClip.c
+++ b/src/bdd/cudd/cuddClip.c
@@ -60,7 +60,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddCof.c b/src/bdd/cudd/cuddCof.c
index 004689c2..f2d3c118 100644
--- a/src/bdd/cudd/cuddCof.c
+++ b/src/bdd/cudd/cuddCof.c
@@ -56,7 +56,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddCompose.c b/src/bdd/cudd/cuddCompose.c
index 7c99ac62..6264513f 100644
--- a/src/bdd/cudd/cuddCompose.c
+++ b/src/bdd/cudd/cuddCompose.c
@@ -82,7 +82,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddDecomp.c b/src/bdd/cudd/cuddDecomp.c
index 34eaef0c..99aa9348 100644
--- a/src/bdd/cudd/cuddDecomp.c
+++ b/src/bdd/cudd/cuddDecomp.c
@@ -61,7 +61,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddEssent.c b/src/bdd/cudd/cuddEssent.c
index b3264715..dfd5bd9d 100644
--- a/src/bdd/cudd/cuddEssent.c
+++ b/src/bdd/cudd/cuddEssent.c
@@ -71,7 +71,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddExact.c b/src/bdd/cudd/cuddExact.c
index 19fcbcd4..54560a44 100644
--- a/src/bdd/cudd/cuddExact.c
+++ b/src/bdd/cudd/cuddExact.c
@@ -67,7 +67,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddExport.c b/src/bdd/cudd/cuddExport.c
index c0cac4ec..2f19e504 100644
--- a/src/bdd/cudd/cuddExport.c
+++ b/src/bdd/cudd/cuddExport.c
@@ -62,7 +62,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddGenCof.c b/src/bdd/cudd/cuddGenCof.c
index 35c380c0..f5597f3d 100644
--- a/src/bdd/cudd/cuddGenCof.c
+++ b/src/bdd/cudd/cuddGenCof.c
@@ -75,7 +75,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddGenetic.c b/src/bdd/cudd/cuddGenetic.c
index 8c168440..8c65875e 100644
--- a/src/bdd/cudd/cuddGenetic.c
+++ b/src/bdd/cudd/cuddGenetic.c
@@ -80,7 +80,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddGroup.c b/src/bdd/cudd/cuddGroup.c
index fc848259..598cc9a1 100644
--- a/src/bdd/cudd/cuddGroup.c
+++ b/src/bdd/cudd/cuddGroup.c
@@ -76,7 +76,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddHarwell.c b/src/bdd/cudd/cuddHarwell.c
index 75e328ea..b61af2e0 100644
--- a/src/bdd/cudd/cuddHarwell.c
+++ b/src/bdd/cudd/cuddHarwell.c
@@ -48,7 +48,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddInit.c b/src/bdd/cudd/cuddInit.c
index 857e638c..c0dbaa0c 100644
--- a/src/bdd/cudd/cuddInit.c
+++ b/src/bdd/cudd/cuddInit.c
@@ -56,7 +56,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddInt.h b/src/bdd/cudd/cuddInt.h
index ba8da8cf..3d4b3db9 100644
--- a/src/bdd/cudd/cuddInt.h
+++ b/src/bdd/cudd/cuddInt.h
@@ -48,8 +48,8 @@
******************************************************************************/
-#ifndef _CUDDINT
-#define _CUDDINT
+#ifndef ABC__bdd__cudd__cuddInt_h
+#define ABC__bdd__cudd__cuddInt_h
/*---------------------------------------------------------------------------*/
@@ -59,8 +59,8 @@
#ifdef DD_MIS
#include "array.h"
#include "list.h"
-#include "st.h"
-#include "espresso.h"
+#include "src/misc/st/st.h"
+#include "src/misc/espresso/espresso.h"
#include "node.h"
#ifdef SIS
#include "graph.h"
@@ -71,7 +71,7 @@
#include <math.h>
#include "cudd.h"
-#include "st.h"
+#include "src/misc/st/st.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/bdd/cudd/cuddInteract.c b/src/bdd/cudd/cuddInteract.c
index 1d335c2a..b0757d00 100644
--- a/src/bdd/cudd/cuddInteract.c
+++ b/src/bdd/cudd/cuddInteract.c
@@ -74,7 +74,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddLCache.c b/src/bdd/cudd/cuddLCache.c
index 2d66264e..e08e0f00 100644
--- a/src/bdd/cudd/cuddLCache.c
+++ b/src/bdd/cudd/cuddLCache.c
@@ -72,7 +72,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddLevelQ.c b/src/bdd/cudd/cuddLevelQ.c
index 43e730d6..987d39b4 100644
--- a/src/bdd/cudd/cuddLevelQ.c
+++ b/src/bdd/cudd/cuddLevelQ.c
@@ -77,7 +77,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddLinear.c b/src/bdd/cudd/cuddLinear.c
index e137484c..601b6496 100644
--- a/src/bdd/cudd/cuddLinear.c
+++ b/src/bdd/cudd/cuddLinear.c
@@ -61,7 +61,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddLiteral.c b/src/bdd/cudd/cuddLiteral.c
index b5895fcf..bc7ac3a0 100644
--- a/src/bdd/cudd/cuddLiteral.c
+++ b/src/bdd/cudd/cuddLiteral.c
@@ -52,7 +52,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddMatMult.c b/src/bdd/cudd/cuddMatMult.c
index f78d037d..b3989e9e 100644
--- a/src/bdd/cudd/cuddMatMult.c
+++ b/src/bdd/cudd/cuddMatMult.c
@@ -56,7 +56,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddPriority.c b/src/bdd/cudd/cuddPriority.c
index 188d2c9e..2ecc1636 100644
--- a/src/bdd/cudd/cuddPriority.c
+++ b/src/bdd/cudd/cuddPriority.c
@@ -73,7 +73,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddRead.c b/src/bdd/cudd/cuddRead.c
index 06789589..8cb555d2 100644
--- a/src/bdd/cudd/cuddRead.c
+++ b/src/bdd/cudd/cuddRead.c
@@ -50,7 +50,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddRef.c b/src/bdd/cudd/cuddRef.c
index 183d30ca..9592f4c2 100644
--- a/src/bdd/cudd/cuddRef.c
+++ b/src/bdd/cudd/cuddRef.c
@@ -65,7 +65,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddReorder.c b/src/bdd/cudd/cuddReorder.c
index f9c08772..fef0768a 100644
--- a/src/bdd/cudd/cuddReorder.c
+++ b/src/bdd/cudd/cuddReorder.c
@@ -72,7 +72,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddSat.c b/src/bdd/cudd/cuddSat.c
index c3a161b4..a01268e6 100644
--- a/src/bdd/cudd/cuddSat.c
+++ b/src/bdd/cudd/cuddSat.c
@@ -69,7 +69,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddSign.c b/src/bdd/cudd/cuddSign.c
index 75d1f60c..5ece24ad 100644
--- a/src/bdd/cudd/cuddSign.c
+++ b/src/bdd/cudd/cuddSign.c
@@ -52,7 +52,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddSolve.c b/src/bdd/cudd/cuddSolve.c
index 47570bf1..a1fb77ca 100644
--- a/src/bdd/cudd/cuddSolve.c
+++ b/src/bdd/cudd/cuddSolve.c
@@ -55,7 +55,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddSplit.c b/src/bdd/cudd/cuddSplit.c
index 4ac243b5..d650ecbc 100644
--- a/src/bdd/cudd/cuddSplit.c
+++ b/src/bdd/cudd/cuddSplit.c
@@ -59,7 +59,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddSubsetHB.c b/src/bdd/cudd/cuddSubsetHB.c
index 68902b09..21daf9ed 100644
--- a/src/bdd/cudd/cuddSubsetHB.c
+++ b/src/bdd/cudd/cuddSubsetHB.c
@@ -73,7 +73,7 @@
#else
#define DBL_MAX_EXP 1024
#endif
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddSubsetSP.c b/src/bdd/cudd/cuddSubsetSP.c
index cddc58ed..5eb3e099 100644
--- a/src/bdd/cudd/cuddSubsetSP.c
+++ b/src/bdd/cudd/cuddSubsetSP.c
@@ -68,7 +68,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddSymmetry.c b/src/bdd/cudd/cuddSymmetry.c
index 3386e798..630c3778 100644
--- a/src/bdd/cudd/cuddSymmetry.c
+++ b/src/bdd/cudd/cuddSymmetry.c
@@ -65,7 +65,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddTable.c b/src/bdd/cudd/cuddTable.c
index c83d1073..f64f1f8e 100644
--- a/src/bdd/cudd/cuddTable.c
+++ b/src/bdd/cudd/cuddTable.c
@@ -80,7 +80,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddUtil.c b/src/bdd/cudd/cuddUtil.c
index ec21e928..046c1957 100644
--- a/src/bdd/cudd/cuddUtil.c
+++ b/src/bdd/cudd/cuddUtil.c
@@ -105,7 +105,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddWindow.c b/src/bdd/cudd/cuddWindow.c
index 0a7c6705..d07f188f 100644
--- a/src/bdd/cudd/cuddWindow.c
+++ b/src/bdd/cudd/cuddWindow.c
@@ -58,7 +58,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddZddCount.c b/src/bdd/cudd/cuddZddCount.c
index a422ad99..c91ef92b 100644
--- a/src/bdd/cudd/cuddZddCount.c
+++ b/src/bdd/cudd/cuddZddCount.c
@@ -61,7 +61,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddZddFuncs.c b/src/bdd/cudd/cuddZddFuncs.c
index 41f7c64c..f4bae0aa 100644
--- a/src/bdd/cudd/cuddZddFuncs.c
+++ b/src/bdd/cudd/cuddZddFuncs.c
@@ -75,7 +75,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddZddGroup.c b/src/bdd/cudd/cuddZddGroup.c
index 5d0409de..2d2a5049 100644
--- a/src/bdd/cudd/cuddZddGroup.c
+++ b/src/bdd/cudd/cuddZddGroup.c
@@ -67,7 +67,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddZddIsop.c b/src/bdd/cudd/cuddZddIsop.c
index 1de9110a..a1e3b7b8 100644
--- a/src/bdd/cudd/cuddZddIsop.c
+++ b/src/bdd/cudd/cuddZddIsop.c
@@ -61,7 +61,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddZddLin.c b/src/bdd/cudd/cuddZddLin.c
index c6e11561..09777b2f 100644
--- a/src/bdd/cudd/cuddZddLin.c
+++ b/src/bdd/cudd/cuddZddLin.c
@@ -59,7 +59,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddZddMisc.c b/src/bdd/cudd/cuddZddMisc.c
index 4d28f6a7..14250322 100644
--- a/src/bdd/cudd/cuddZddMisc.c
+++ b/src/bdd/cudd/cuddZddMisc.c
@@ -60,7 +60,7 @@
******************************************************************************/
#include <math.h>
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddZddPort.c b/src/bdd/cudd/cuddZddPort.c
index 76b46ca5..fbca346e 100644
--- a/src/bdd/cudd/cuddZddPort.c
+++ b/src/bdd/cudd/cuddZddPort.c
@@ -59,7 +59,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddZddReord.c b/src/bdd/cudd/cuddZddReord.c
index c5fcb9fb..8a7ae526 100644
--- a/src/bdd/cudd/cuddZddReord.c
+++ b/src/bdd/cudd/cuddZddReord.c
@@ -73,7 +73,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddZddSetop.c b/src/bdd/cudd/cuddZddSetop.c
index b4726b63..ec0c467c 100644
--- a/src/bdd/cudd/cuddZddSetop.c
+++ b/src/bdd/cudd/cuddZddSetop.c
@@ -73,7 +73,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddZddSymm.c b/src/bdd/cudd/cuddZddSymm.c
index 52e26d88..4979968a 100644
--- a/src/bdd/cudd/cuddZddSymm.c
+++ b/src/bdd/cudd/cuddZddSymm.c
@@ -67,7 +67,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/cudd/cuddZddUtil.c b/src/bdd/cudd/cuddZddUtil.c
index 1e89c610..e87f5af8 100644
--- a/src/bdd/cudd/cuddZddUtil.c
+++ b/src/bdd/cudd/cuddZddUtil.c
@@ -66,7 +66,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "cuddInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/dsd/dsd.h b/src/bdd/dsd/dsd.h
index 00b38625..7bb6111f 100644
--- a/src/bdd/dsd/dsd.h
+++ b/src/bdd/dsd/dsd.h
@@ -25,8 +25,8 @@
***********************************************************************/
-#ifndef __DSD_H__
-#define __DSD_H__
+#ifndef ABC__bdd__dsd__dsd_h
+#define ABC__bdd__dsd__dsd_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/bdd/dsd/dsdCheck.c b/src/bdd/dsd/dsdCheck.c
index 4cecba59..4de75a92 100644
--- a/src/bdd/dsd/dsdCheck.c
+++ b/src/bdd/dsd/dsdCheck.c
@@ -68,7 +68,7 @@ void Dsd_CheckCacheAllocate( int nEntries )
memset( pCache, 0, sizeof(Dds_Cache_t) );
// check what is the size of the current cache
- nRequested = Cudd_Prime( nEntries );
+ nRequested = Abc_PrimeCudd( nEntries );
if ( pCache->nTableSize != nRequested )
{ // the current size is different
// deallocate the old, allocate the new
diff --git a/src/bdd/dsd/dsdInt.h b/src/bdd/dsd/dsdInt.h
index 78b7b154..11a8e82e 100644
--- a/src/bdd/dsd/dsdInt.h
+++ b/src/bdd/dsd/dsdInt.h
@@ -16,11 +16,11 @@
***********************************************************************/
-#ifndef __DSD_INT_H__
-#define __DSD_INT_H__
+#ifndef ABC__bdd__dsd__dsdInt_h
+#define ABC__bdd__dsd__dsdInt_h
-#include "extra.h"
+#include "src/misc/extra/extraBdd.h"
#include "dsd.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/bdd/epd/epd.c b/src/bdd/epd/epd.c
index 3f92af94..6a803e16 100644
--- a/src/bdd/epd/epd.c
+++ b/src/bdd/epd/epd.c
@@ -52,7 +52,7 @@
#include <stdlib.h>
#include <string.h>
#include <math.h>
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "epd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/epd/epd.h b/src/bdd/epd/epd.h
index 1ca033d2..012380ed 100644
--- a/src/bdd/epd/epd.h
+++ b/src/bdd/epd/epd.h
@@ -48,8 +48,8 @@
******************************************************************************/
-#ifndef _EPD
-#define _EPD
+#ifndef ABC__bdd__epd__epd_h
+#define ABC__bdd__epd__epd_h
ABC_NAMESPACE_HEADER_START
diff --git a/src/bdd/mtr/mtr.h b/src/bdd/mtr/mtr.h
index 5ac35313..db936ab8 100644
--- a/src/bdd/mtr/mtr.h
+++ b/src/bdd/mtr/mtr.h
@@ -56,8 +56,8 @@
******************************************************************************/
-#ifndef __MTR
-#define __MTR
+#ifndef ABC__bdd__mtr__mtr_h
+#define ABC__bdd__mtr__mtr_h
/*---------------------------------------------------------------------------*/
/* Nested includes */
diff --git a/src/bdd/mtr/mtrBasic.c b/src/bdd/mtr/mtrBasic.c
index a2420d4a..b710ef4a 100644
--- a/src/bdd/mtr/mtrBasic.c
+++ b/src/bdd/mtr/mtrBasic.c
@@ -60,7 +60,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "mtrInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/mtr/mtrGroup.c b/src/bdd/mtr/mtrGroup.c
index 280108c9..b29fe32d 100644
--- a/src/bdd/mtr/mtrGroup.c
+++ b/src/bdd/mtr/mtrGroup.c
@@ -60,7 +60,7 @@
******************************************************************************/
-#include "util_hack.h"
+#include "src/misc/util/util_hack.h"
#include "mtrInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/mtr/mtrInt.h b/src/bdd/mtr/mtrInt.h
index 9c8c6e26..624c64a9 100644
--- a/src/bdd/mtr/mtrInt.h
+++ b/src/bdd/mtr/mtrInt.h
@@ -48,8 +48,8 @@
******************************************************************************/
-#ifndef _MTRINT
-#define _MTRINT
+#ifndef ABC__bdd__mtr__mtrInt_h
+#define ABC__bdd__mtr__mtrInt_h
#include "mtr.h"
diff --git a/src/bdd/parse/parse.h b/src/bdd/parse/parse.h
index 5c97dd4e..584ec30a 100644
--- a/src/bdd/parse/parse.h
+++ b/src/bdd/parse/parse.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __PARSE_H__
-#define __PARSE_H__
+#ifndef ABC__bdd__parse__parse_h
+#define ABC__bdd__parse__parse_h
ABC_NAMESPACE_HEADER_START
diff --git a/src/bdd/parse/parseEqn.c b/src/bdd/parse/parseEqn.c
index ed2599ca..a0b9ada8 100644
--- a/src/bdd/parse/parseEqn.c
+++ b/src/bdd/parse/parseEqn.c
@@ -22,8 +22,8 @@
////////////////////////////////////////////////////////////////////////
#include "parseInt.h"
-#include "vec.h"
-#include "hop.h"
+#include "src/misc/vec/vec.h"
+#include "src/aig/hop/hop.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bdd/parse/parseInt.h b/src/bdd/parse/parseInt.h
index f0f3f302..78766612 100644
--- a/src/bdd/parse/parseInt.h
+++ b/src/bdd/parse/parseInt.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __PARSE_INT_H__
-#define __PARSE_INT_H__
+#ifndef ABC__bdd__parse__parseInt_h
+#define ABC__bdd__parse__parseInt_h
////////////////////////////////////////////////////////////////////////
@@ -26,8 +26,7 @@
#include <stdio.h>
-#include "extra.h"
-#include "cuddInt.h"
+#include "src/misc/extra/extraBdd.h"
#include "parse.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/bdd/reo/reo.h b/src/bdd/reo/reo.h
index 9d82329c..9381a350 100644
--- a/src/bdd/reo/reo.h
+++ b/src/bdd/reo/reo.h
@@ -16,13 +16,13 @@
***********************************************************************/
-#ifndef __REO_H__
-#define __REO_H__
+#ifndef ABC__bdd__reo__reo_h
+#define ABC__bdd__reo__reo_h
#include <stdio.h>
#include <stdlib.h>
-#include "extra.h"
+#include "src/misc/extra/extraBdd.h"
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
diff --git a/src/aig/bdc/bdc.h b/src/bool/bdc/bdc.h
index 8a240b0c..6c88857a 100644
--- a/src/aig/bdc/bdc.h
+++ b/src/bool/bdc/bdc.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __BDC_H__
-#define __BDC_H__
+#ifndef ABC__aig__bdc__bdc_h
+#define ABC__aig__bdc__bdc_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/bdc/bdcCore.c b/src/bool/bdc/bdcCore.c
index 58324f81..58324f81 100644
--- a/src/aig/bdc/bdcCore.c
+++ b/src/bool/bdc/bdcCore.c
diff --git a/src/aig/bdc/bdcDec.c b/src/bool/bdc/bdcDec.c
index 61f46f17..61f46f17 100644
--- a/src/aig/bdc/bdcDec.c
+++ b/src/bool/bdc/bdcDec.c
diff --git a/src/aig/bdc/bdcInt.h b/src/bool/bdc/bdcInt.h
index 74630664..05ce20b6 100644
--- a/src/aig/bdc/bdcInt.h
+++ b/src/bool/bdc/bdcInt.h
@@ -18,15 +18,15 @@
***********************************************************************/
-#ifndef __BDC_INT_H__
-#define __BDC_INT_H__
+#ifndef ABC__aig__bdc__bdcInt_h
+#define ABC__aig__bdc__bdcInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "kit.h"
+#include "src/bool/kit/kit.h"
#include "bdc.h"
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/bdc/bdcSpfd.c b/src/bool/bdc/bdcSpfd.c
index 2f05419d..83a35c11 100644
--- a/src/aig/bdc/bdcSpfd.c
+++ b/src/bool/bdc/bdcSpfd.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "bdcInt.h"
-#include "aig.h"
+#include "src/aig/aig/aig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/bdc/bdcTable.c b/src/bool/bdc/bdcTable.c
index 69f35d88..69f35d88 100644
--- a/src/aig/bdc/bdcTable.c
+++ b/src/bool/bdc/bdcTable.c
diff --git a/src/aig/bdc/bdc_.c b/src/bool/bdc/bdc_.c
index b29d4f5e..b29d4f5e 100644
--- a/src/aig/bdc/bdc_.c
+++ b/src/bool/bdc/bdc_.c
diff --git a/src/bool/bdc/module.make b/src/bool/bdc/module.make
new file mode 100644
index 00000000..0bd5084e
--- /dev/null
+++ b/src/bool/bdc/module.make
@@ -0,0 +1,5 @@
+SRC += src/bool/bdc/bdcCore.c \
+ src/bool/bdc/bdcDec.c \
+ src/bool/bdc/bdcSpfd.c \
+ src/bool/bdc/bdcTable.c
+
diff --git a/src/opt/dec/dec.h b/src/bool/dec/dec.h
index 543fabf1..07bf9f6b 100644
--- a/src/opt/dec/dec.h
+++ b/src/bool/dec/dec.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __DEC_H__
-#define __DEC_H__
+#ifndef ABC__opt__dec__dec_h
+#define ABC__opt__dec__dec_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/opt/dec/decAbc.c b/src/bool/dec/decAbc.c
index 24bfc9a8..65f69f9b 100644
--- a/src/opt/dec/decAbc.c
+++ b/src/bool/dec/decAbc.c
@@ -16,9 +16,9 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
+#include "src/aig/ivy/ivy.h"
#include "dec.h"
-#include "ivy.h"
ABC_NAMESPACE_IMPL_START
@@ -205,7 +205,7 @@ int Dec_GraphToNetworkCount( Abc_Obj_t * pRoot, Dec_Graph_t * pGraph, int NodeMa
return -1;
}
// count the number of new levels
- LevelNew = 1 + ABC_MAX( pNode0->Level, pNode1->Level );
+ LevelNew = 1 + Abc_MaxInt( pNode0->Level, pNode1->Level );
if ( pAnd )
{
if ( Abc_ObjRegular(pAnd) == Abc_AigConst1(pRoot->pNtk) )
diff --git a/src/opt/dec/decFactor.c b/src/bool/dec/decFactor.c
index 8c414915..faed9e74 100644
--- a/src/opt/dec/decFactor.c
+++ b/src/bool/dec/decFactor.c
@@ -16,9 +16,10 @@
***********************************************************************/
-#include "abc.h"
-#include "main.h"
-#include "mvc.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/main.h"
+#include "src/misc/mvc/mvc.h"
+#include "src/misc/extra/extraBdd.h"
#include "dec.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/dec/decMan.c b/src/bool/dec/decMan.c
index 8b6fae65..cfca58c5 100644
--- a/src/opt/dec/decMan.c
+++ b/src/bool/dec/decMan.c
@@ -16,8 +16,8 @@
***********************************************************************/
-#include "abc.h"
-#include "mvc.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/mvc/mvc.h"
#include "dec.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/dec/decPrint.c b/src/bool/dec/decPrint.c
index 3cc0f811..208c7e8e 100644
--- a/src/opt/dec/decPrint.c
+++ b/src/bool/dec/decPrint.c
@@ -16,7 +16,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "dec.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/dec/decUtil.c b/src/bool/dec/decUtil.c
index d2b5631e..0350b3e2 100644
--- a/src/opt/dec/decUtil.c
+++ b/src/bool/dec/decUtil.c
@@ -16,8 +16,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/misc/extra/extraBdd.h"
#include "dec.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/bool/dec/module.make b/src/bool/dec/module.make
new file mode 100644
index 00000000..34e58d30
--- /dev/null
+++ b/src/bool/dec/module.make
@@ -0,0 +1,5 @@
+SRC += src/bool/dec/decAbc.c \
+ src/bool/dec/decFactor.c \
+ src/bool/dec/decMan.c \
+ src/bool/dec/decPrint.c \
+ src/bool/dec/decUtil.c
diff --git a/src/aig/deco/deco.h b/src/bool/deco/deco.h
index 84f2e25e..a1db47ce 100644
--- a/src/aig/deco/deco.h
+++ b/src/bool/deco/deco.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __DEC_H__
-#define __DEC_H__
+#ifndef ABC__aig__deco__deco_h
+#define ABC__aig__deco__deco_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/deco/module.make b/src/bool/deco/module.make
index d6d908e7..d6d908e7 100644
--- a/src/aig/deco/module.make
+++ b/src/bool/deco/module.make
diff --git a/src/aig/kit/cloud.c b/src/bool/kit/cloud.c
index fd372970..1ab53c00 100644
--- a/src/aig/kit/cloud.c
+++ b/src/bool/kit/cloud.c
@@ -16,6 +16,7 @@
***********************************************************************/
+#include <string.h>
#include "cloud.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/kit/cloud.h b/src/bool/kit/cloud.h
index c48b55de..208a47ec 100644
--- a/src/aig/kit/cloud.h
+++ b/src/bool/kit/cloud.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __CLOUD_H__
-#define __CLOUD_H__
+#ifndef ABC__aig__kit__cloud_h
+#define ABC__aig__kit__cloud_h
#include <stdio.h>
@@ -25,7 +25,7 @@
#include <assert.h>
#include <time.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
diff --git a/src/aig/kit/kit.h b/src/bool/kit/kit.h
index 9e15e994..4ca75622 100644
--- a/src/aig/kit/kit.h
+++ b/src/bool/kit/kit.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __KIT_H__
-#define __KIT_H__
+#ifndef ABC__aig__kit__kit_h
+#define ABC__aig__kit__kit_h
////////////////////////////////////////////////////////////////////////
@@ -31,8 +31,9 @@
#include <string.h>
#include <assert.h>
#include <time.h>
-#include "vec.h"
-#include "extra.h"
+
+#include "src/misc/vec/vec.h"
+#include "src/misc/extra/extraBdd.h"
#include "cloud.h"
////////////////////////////////////////////////////////////////////////
@@ -141,21 +142,14 @@ struct Kit_DsdMan_t_
Vec_Ptr_t * vTtBdds; // the node truth tables
Vec_Int_t * vNodes; // temporary array for BDD nodes
};
-
-static inline int Kit_DsdVar2Lit( int Var, int fCompl ) { return Var + Var + fCompl; }
-static inline int Kit_DsdLit2Var( int Lit ) { return Lit >> 1; }
-static inline int Kit_DsdLitIsCompl( int Lit ) { return Lit & 1; }
-static inline int Kit_DsdLitNot( int Lit ) { return Lit ^ 1; }
-static inline int Kit_DsdLitNotCond( int Lit, int c ) { return Lit ^ (int)(c > 0); }
-static inline int Kit_DsdLitRegular( int Lit ) { return Lit & 0xfe; }
static inline unsigned Kit_DsdObjOffset( int nFans ) { return (nFans >> 2) + ((nFans & 3) > 0); }
static inline unsigned * Kit_DsdObjTruth( Kit_DsdObj_t * pObj ) { return pObj->Type == KIT_DSD_PRIME ? (unsigned *)pObj->pFans + pObj->Offset: NULL; }
static inline int Kit_DsdNtkObjNum( Kit_DsdNtk_t * pNtk ){ return pNtk->nVars + pNtk->nNodes; }
static inline Kit_DsdObj_t * Kit_DsdNtkObj( Kit_DsdNtk_t * pNtk, int Id ) { assert( Id >= 0 && Id < pNtk->nVars + pNtk->nNodes ); return Id < pNtk->nVars ? NULL : pNtk->pNodes[Id - pNtk->nVars]; }
-static inline Kit_DsdObj_t * Kit_DsdNtkRoot( Kit_DsdNtk_t * pNtk ) { return Kit_DsdNtkObj( pNtk, Kit_DsdLit2Var(pNtk->Root) ); }
-static inline int Kit_DsdLitIsLeaf( Kit_DsdNtk_t * pNtk, int Lit ) { int Id = Kit_DsdLit2Var(Lit); assert( Id >= 0 && Id < pNtk->nVars + pNtk->nNodes ); return Id < pNtk->nVars; }
-static inline unsigned Kit_DsdLitSupport( Kit_DsdNtk_t * pNtk, int Lit ) { int Id = Kit_DsdLit2Var(Lit); assert( Id >= 0 && Id < pNtk->nVars + pNtk->nNodes ); return pNtk->pSupps? (Id < pNtk->nVars? (1 << Id) : pNtk->pSupps[Id - pNtk->nVars]) : 0; }
+static inline Kit_DsdObj_t * Kit_DsdNtkRoot( Kit_DsdNtk_t * pNtk ) { return Kit_DsdNtkObj( pNtk, Abc_Lit2Var(pNtk->Root) ); }
+static inline int Kit_DsdLitIsLeaf( Kit_DsdNtk_t * pNtk, int Lit ) { int Id = Abc_Lit2Var(Lit); assert( Id >= 0 && Id < pNtk->nVars + pNtk->nNodes ); return Id < pNtk->nVars; }
+static inline unsigned Kit_DsdLitSupport( Kit_DsdNtk_t * pNtk, int Lit ) { int Id = Abc_Lit2Var(Lit); assert( Id >= 0 && Id < pNtk->nVars + pNtk->nNodes ); return pNtk->pSupps? (Id < pNtk->nVars? (1 << Id) : pNtk->pSupps[Id - pNtk->nVars]) : 0; }
#define Kit_DsdNtkForEachObj( pNtk, pObj, i ) \
for ( i = 0; (i < (pNtk)->nNodes) && ((pObj) = (pNtk)->pNodes[i]); i++ )
@@ -225,10 +219,6 @@ static inline int Kit_GraphRootLevel( Kit_Graph_t * pGraph )
static inline int Kit_SuppIsMinBase( int Supp ) { return (Supp & (Supp+1)) == 0; }
-//static inline int Kit_Float2Int( float Val ) { return *((int *)&Val); }
-//static inline float Kit_Int2Float( int Num ) { return *((float *)&Num); }
-static inline int Kit_Float2Int( float Val ) { union { int x; float y; } v; v.y = Val; return v.x; }
-static inline float Kit_Int2Float( int Num ) { union { int x; float y; } v; v.x = Num; return v.y; }
static inline int Kit_BitWordNum( int nBits ) { return nBits/(8*sizeof(unsigned)) + ((nBits%(8*sizeof(unsigned))) > 0); }
static inline int Kit_TruthWordNum( int nVars ) { return nVars <= 5 ? 1 : (1 << (nVars - 5)); }
static inline unsigned Kit_BitMask( int nBits ) { assert( nBits <= 32 ); return ~((~(unsigned)0) << nBits); }
diff --git a/src/aig/kit/kitAig.c b/src/bool/kit/kitAig.c
index 88f17fc2..95fccbad 100644
--- a/src/aig/kit/kitAig.c
+++ b/src/bool/kit/kitAig.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "kit.h"
-#include "aig.h"
+#include "src/aig/aig/aig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/kit/kitBdd.c b/src/bool/kit/kitBdd.c
index 1b24ac24..0d12d0dc 100644
--- a/src/aig/kit/kitBdd.c
+++ b/src/bool/kit/kitBdd.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "kit.h"
-#include "extra.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/kit/kitCloud.c b/src/bool/kit/kitCloud.c
index dea56749..dea56749 100644
--- a/src/aig/kit/kitCloud.c
+++ b/src/bool/kit/kitCloud.c
diff --git a/src/aig/kit/kitDec.c b/src/bool/kit/kitDec.c
index afc7ef6c..1da35e73 100644
--- a/src/aig/kit/kitDec.c
+++ b/src/bool/kit/kitDec.c
@@ -138,7 +138,7 @@ int Kit_DecComputeOuputArrival( int nVars, Vec_Int_t * vSupps, int LutSize, char
{
iVar = Vec_IntEntry( vSupps, v * LutSize + i );
assert( iVar < nVars + v );
- Delay = ABC_MAX( Delay, ATimesOut[iVar] );
+ Delay = Abc_MaxInt( Delay, ATimesOut[iVar] );
}
ATimesOut[nVars + v] = Delay + 1;
}
@@ -190,7 +190,7 @@ void Kit_DecComputeTruth( Kit_ManDec_t * p, int nVars, Vec_Int_t * vSupps, int L
unsigned * pResult, * pTruthLuts, * pTruths[17];
int nTruthLutWords, i, v, iVar, nLuts;
nLuts = Vec_IntSize(vSupps) / LutSize;
- pTruthLuts = Vec_IntArray( vLuts );
+ pTruthLuts = (unsigned *)Vec_IntArray( vLuts );
nTruthLutWords = Kit_TruthWordNum( LutSize );
assert( nLuts > 0 );
assert( Vec_IntSize(vSupps) % LutSize == 0 );
@@ -201,10 +201,10 @@ void Kit_DecComputeTruth( Kit_ManDec_t * p, int nVars, Vec_Int_t * vSupps, int L
{
iVar = Vec_IntEntry( vSupps, v * LutSize + i );
assert( iVar < nVars + v );
- pTruths[i] = (iVar < nVars)? Vec_PtrEntry(p->vTruthVars, iVar) : Vec_PtrEntry(p->vTruthNodes, iVar-nVars);
+ pTruths[i] = (iVar < nVars)? (unsigned *)Vec_PtrEntry(p->vTruthVars, iVar) : (unsigned *)Vec_PtrEntry(p->vTruthNodes, iVar-nVars);
}
- pResult = (v == nLuts - 1) ? pRes : Vec_PtrEntry(p->vTruthNodes, v);
- Kit_DecComputeTruthOne( LutSize, pTruthLuts, nVars, pTruths, Vec_PtrEntry(p->vTruthNodes, v+1), pResult );
+ pResult = (v == nLuts - 1) ? pRes : (unsigned *)Vec_PtrEntry(p->vTruthNodes, v);
+ Kit_DecComputeTruthOne( LutSize, pTruthLuts, nVars, pTruths, (unsigned *)Vec_PtrEntry(p->vTruthNodes, v+1), pResult );
pTruthLuts += nTruthLutWords;
}
}
diff --git a/src/aig/kit/kitDsd.c b/src/bool/kit/kitDsd.c
index dffbe315..3df16d8c 100644
--- a/src/aig/kit/kitDsd.c
+++ b/src/bool/kit/kitDsd.c
@@ -271,9 +271,9 @@ void Kit_DsdPrint2_rec( FILE * pFile, Kit_DsdNtk_t * pNtk, int Id )
fprintf( pFile, "(" );
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
{
- if ( Kit_DsdLitIsCompl(iLit) )
+ if ( Abc_LitIsCompl(iLit) )
fprintf( pFile, "!" );
- Kit_DsdPrint2_rec( pFile, pNtk, Kit_DsdLit2Var(iLit) );
+ Kit_DsdPrint2_rec( pFile, pNtk, Abc_Lit2Var(iLit) );
if ( i < pObj->nFans - 1 )
fprintf( pFile, "%c", Symbol );
}
@@ -297,9 +297,9 @@ void Kit_DsdPrint2_rec( FILE * pFile, Kit_DsdNtk_t * pNtk, int Id )
void Kit_DsdPrint2( FILE * pFile, Kit_DsdNtk_t * pNtk )
{
// fprintf( pFile, "F = " );
- if ( Kit_DsdLitIsCompl(pNtk->Root) )
+ if ( Abc_LitIsCompl(pNtk->Root) )
fprintf( pFile, "!" );
- Kit_DsdPrint2_rec( pFile, pNtk, Kit_DsdLit2Var(pNtk->Root) );
+ Kit_DsdPrint2_rec( pFile, pNtk, Abc_Lit2Var(pNtk->Root) );
// fprintf( pFile, "\n" );
}
@@ -351,9 +351,9 @@ void Kit_DsdPrint_rec( FILE * pFile, Kit_DsdNtk_t * pNtk, int Id )
fprintf( pFile, "(" );
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
{
- if ( Kit_DsdLitIsCompl(iLit) )
+ if ( Abc_LitIsCompl(iLit) )
fprintf( pFile, "!" );
- Kit_DsdPrint_rec( pFile, pNtk, Kit_DsdLit2Var(iLit) );
+ Kit_DsdPrint_rec( pFile, pNtk, Abc_Lit2Var(iLit) );
if ( i < pObj->nFans - 1 )
fprintf( pFile, "%c", Symbol );
}
@@ -374,9 +374,9 @@ void Kit_DsdPrint_rec( FILE * pFile, Kit_DsdNtk_t * pNtk, int Id )
void Kit_DsdPrint( FILE * pFile, Kit_DsdNtk_t * pNtk )
{
fprintf( pFile, "F = " );
- if ( Kit_DsdLitIsCompl(pNtk->Root) )
+ if ( Abc_LitIsCompl(pNtk->Root) )
fprintf( pFile, "!" );
- Kit_DsdPrint_rec( pFile, pNtk, Kit_DsdLit2Var(pNtk->Root) );
+ Kit_DsdPrint_rec( pFile, pNtk, Abc_Lit2Var(pNtk->Root) );
// fprintf( pFile, "\n" );
}
@@ -428,9 +428,9 @@ char * Kit_DsdWrite_rec( char * pBuff, Kit_DsdNtk_t * pNtk, int Id )
*pBuff++ = '(';
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
{
- if ( Kit_DsdLitIsCompl(iLit) )
+ if ( Abc_LitIsCompl(iLit) )
*pBuff++ = '!';
- pBuff = Kit_DsdWrite_rec( pBuff, pNtk, Kit_DsdLit2Var(iLit) );
+ pBuff = Kit_DsdWrite_rec( pBuff, pNtk, Abc_Lit2Var(iLit) );
if ( i < pObj->nFans - 1 )
*pBuff++ = Symbol;
}
@@ -451,9 +451,9 @@ char * Kit_DsdWrite_rec( char * pBuff, Kit_DsdNtk_t * pNtk, int Id )
***********************************************************************/
void Kit_DsdWrite( char * pBuff, Kit_DsdNtk_t * pNtk )
{
- if ( Kit_DsdLitIsCompl(pNtk->Root) )
+ if ( Abc_LitIsCompl(pNtk->Root) )
*pBuff++ = '!';
- pBuff = Kit_DsdWrite_rec( pBuff, pNtk, Kit_DsdLit2Var(pNtk->Root) );
+ pBuff = Kit_DsdWrite_rec( pBuff, pNtk, Abc_Lit2Var(pNtk->Root) );
*pBuff = 0;
}
@@ -588,8 +588,8 @@ unsigned * Kit_DsdTruthComputeNode_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, i
{
assert( pObj->nFans == 1 );
iLit = pObj->pFans[0];
- pTruthFans[0] = Kit_DsdTruthComputeNode_rec( p, pNtk, Kit_DsdLit2Var(iLit) );
- if ( Kit_DsdLitIsCompl(iLit) )
+ pTruthFans[0] = Kit_DsdTruthComputeNode_rec( p, pNtk, Abc_Lit2Var(iLit) );
+ if ( Abc_LitIsCompl(iLit) )
Kit_TruthNot( pTruthRes, pTruthFans[0], pNtk->nVars );
else
Kit_TruthCopy( pTruthRes, pTruthFans[0], pNtk->nVars );
@@ -598,7 +598,7 @@ unsigned * Kit_DsdTruthComputeNode_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, i
// collect the truth tables of the fanins
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- pTruthFans[i] = Kit_DsdTruthComputeNode_rec( p, pNtk, Kit_DsdLit2Var(iLit) );
+ pTruthFans[i] = Kit_DsdTruthComputeNode_rec( p, pNtk, Abc_Lit2Var(iLit) );
// create the truth table
// simple gates
@@ -606,7 +606,7 @@ unsigned * Kit_DsdTruthComputeNode_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, i
{
Kit_TruthFill( pTruthRes, pNtk->nVars );
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Kit_DsdLitIsCompl(iLit) );
+ Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Abc_LitIsCompl(iLit) );
return pTruthRes;
}
if ( pObj->Type == KIT_DSD_XOR )
@@ -616,7 +616,7 @@ unsigned * Kit_DsdTruthComputeNode_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, i
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
{
Kit_TruthXor( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars );
- fCompl ^= Kit_DsdLitIsCompl(iLit);
+ fCompl ^= Abc_LitIsCompl(iLit);
}
if ( fCompl )
Kit_TruthNot( pTruthRes, pTruthRes, pNtk->nVars );
@@ -637,12 +637,12 @@ unsigned * Kit_DsdTruthComputeNode_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, i
continue;
Kit_TruthFill( pTruthMint, pNtk->nVars );
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- Kit_TruthAndPhase( pTruthMint, pTruthMint, pTruthFans[i], pNtk->nVars, 0, ((m & (1<<i)) == 0) ^ Kit_DsdLitIsCompl(iLit) );
+ Kit_TruthAndPhase( pTruthMint, pTruthMint, pTruthFans[i], pNtk->nVars, 0, ((m & (1<<i)) == 0) ^ Abc_LitIsCompl(iLit) );
Kit_TruthOr( pTruthRes, pTruthRes, pTruthMint, pNtk->nVars );
}
*/
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- if ( Kit_DsdLitIsCompl(iLit) )
+ if ( Abc_LitIsCompl(iLit) )
Kit_TruthNot( pTruthFans[i], pTruthFans[i], pNtk->nVars );
pTruthTemp = Kit_TruthCompose( p->dd, Kit_DsdObjTruth(pObj), pObj->nFans, pTruthFans, pNtk->nVars, p->vTtBdds, p->vNodes );
Kit_TruthCopy( pTruthRes, pTruthTemp, pNtk->nVars );
@@ -669,9 +669,9 @@ unsigned * Kit_DsdTruthCompute( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk )
for ( i = 0; i < (int)pNtk->nVars; i++ )
Kit_TruthCopy( (unsigned *)Vec_PtrEntry(p->vTtNodes, i), (unsigned *)Vec_PtrEntry(p->vTtElems, i), p->nVars );
// compute truth table for each node
- pTruthRes = Kit_DsdTruthComputeNode_rec( p, pNtk, Kit_DsdLit2Var(pNtk->Root) );
+ pTruthRes = Kit_DsdTruthComputeNode_rec( p, pNtk, Abc_Lit2Var(pNtk->Root) );
// complement the truth table if needed
- if ( Kit_DsdLitIsCompl(pNtk->Root) )
+ if ( Abc_LitIsCompl(pNtk->Root) )
Kit_TruthNot( pTruthRes, pTruthRes, pNtk->nVars );
return pTruthRes;
}
@@ -720,8 +720,8 @@ unsigned * Kit_DsdTruthComputeNodeOne_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
assert( pObj->nFans == 1 );
iLit = pObj->pFans[0];
assert( Kit_DsdLitIsLeaf( pNtk, iLit ) );
- pTruthFans[0] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(iLit), uSupp );
- if ( Kit_DsdLitIsCompl(iLit) )
+ pTruthFans[0] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Abc_Lit2Var(iLit), uSupp );
+ if ( Abc_LitIsCompl(iLit) )
Kit_TruthNot( pTruthRes, pTruthFans[0], pNtk->nVars );
else
Kit_TruthCopy( pTruthRes, pTruthFans[0], pNtk->nVars );
@@ -733,7 +733,7 @@ unsigned * Kit_DsdTruthComputeNodeOne_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
{
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
if ( uSupp != (uSupp & ~Kit_DsdLitSupport(pNtk, iLit)) )
- pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(iLit), uSupp );
+ pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Abc_Lit2Var(iLit), uSupp );
else
{
pTruthFans[i] = NULL;
@@ -743,7 +743,7 @@ unsigned * Kit_DsdTruthComputeNodeOne_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
else
{
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(iLit), uSupp );
+ pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Abc_Lit2Var(iLit), uSupp );
}
// create the truth table
@@ -753,7 +753,7 @@ unsigned * Kit_DsdTruthComputeNodeOne_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
Kit_TruthFill( pTruthRes, pNtk->nVars );
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
if ( pTruthFans[i] )
- Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Kit_DsdLitIsCompl(iLit) );
+ Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Abc_LitIsCompl(iLit) );
return pTruthRes;
}
if ( pObj->Type == KIT_DSD_XOR )
@@ -765,7 +765,7 @@ unsigned * Kit_DsdTruthComputeNodeOne_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
if ( pTruthFans[i] )
{
Kit_TruthXor( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars );
- fCompl ^= Kit_DsdLitIsCompl(iLit);
+ fCompl ^= Abc_LitIsCompl(iLit);
}
}
if ( fCompl )
@@ -797,12 +797,12 @@ unsigned * Kit_DsdTruthComputeNodeOne_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
continue;
Kit_TruthFill( pTruthMint, pNtk->nVars );
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- Kit_TruthAndPhase( pTruthMint, pTruthMint, pTruthFans[i], pNtk->nVars, 0, ((m & (1<<i)) == 0) ^ Kit_DsdLitIsCompl(iLit) );
+ Kit_TruthAndPhase( pTruthMint, pTruthMint, pTruthFans[i], pNtk->nVars, 0, ((m & (1<<i)) == 0) ^ Abc_LitIsCompl(iLit) );
Kit_TruthOr( pTruthRes, pTruthRes, pTruthMint, pNtk->nVars );
}
*/
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- if ( Kit_DsdLitIsCompl(iLit) )
+ if ( Abc_LitIsCompl(iLit) )
Kit_TruthNot( pTruthFans[i], pTruthFans[i], pNtk->nVars );
pTruthTemp = Kit_TruthCompose( p->dd, Kit_DsdObjTruth(pObj), pObj->nFans, pTruthFans, pNtk->nVars, p->vTtBdds, p->vNodes );
Kit_TruthCopy( pTruthRes, pTruthTemp, pNtk->nVars );
@@ -832,9 +832,9 @@ unsigned * Kit_DsdTruthComputeOne( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, unsign
for ( i = 0; i < (int)pNtk->nVars; i++ )
Kit_TruthCopy( (unsigned *)Vec_PtrEntry(p->vTtNodes, i), (unsigned *)Vec_PtrEntry(p->vTtElems, i), p->nVars );
// compute truth table for each node
- pTruthRes = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(pNtk->Root), uSupp );
+ pTruthRes = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Abc_Lit2Var(pNtk->Root), uSupp );
// complement the truth table if needed
- if ( Kit_DsdLitIsCompl(pNtk->Root) )
+ if ( Abc_LitIsCompl(pNtk->Root) )
Kit_TruthNot( pTruthRes, pTruthRes, pNtk->nVars );
return pTruthRes;
}
@@ -897,9 +897,9 @@ unsigned * Kit_DsdTruthComputeNodeTwo_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
{
if ( uSupp & Kit_DsdLitSupport(pNtk, iLit) )
- pTruthFans[i] = Kit_DsdTruthComputeNodeTwo_rec( p, pNtk, Kit_DsdLit2Var(iLit), uSupp, iVar, pTruthDec );
+ pTruthFans[i] = Kit_DsdTruthComputeNodeTwo_rec( p, pNtk, Abc_Lit2Var(iLit), uSupp, iVar, pTruthDec );
else
- pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(iLit), 0 );
+ pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Abc_Lit2Var(iLit), 0 );
}
// create composition/decomposition functions
@@ -907,7 +907,7 @@ unsigned * Kit_DsdTruthComputeNodeTwo_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
{
Kit_TruthFill( pTruthRes, pNtk->nVars );
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Kit_DsdLitIsCompl(iLit) );
+ Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Abc_LitIsCompl(iLit) );
return pTruthRes;
}
if ( pObj->Type == KIT_DSD_XOR )
@@ -916,7 +916,7 @@ unsigned * Kit_DsdTruthComputeNodeTwo_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
fCompl = 0;
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
{
- fCompl ^= Kit_DsdLitIsCompl(iLit);
+ fCompl ^= Abc_LitIsCompl(iLit);
Kit_TruthXor( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars );
}
if ( fCompl )
@@ -935,7 +935,7 @@ unsigned * Kit_DsdTruthComputeNodeTwo_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
// solve the fanins and collect info, which components belong to the bound set
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
{
- pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(iLit), 0 );
+ pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Abc_Lit2Var(iLit), 0 );
pfBoundSet[i] = (int)((uSupp & Kit_DsdLitSupport(pNtk, iLit)) > 0);
}
@@ -946,9 +946,9 @@ unsigned * Kit_DsdTruthComputeNodeTwo_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
Kit_TruthFill( pTruthDec, pNtk->nVars );
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
if ( pfBoundSet[i] )
- Kit_TruthAndPhase( pTruthDec, pTruthDec, pTruthFans[i], pNtk->nVars, 0, Kit_DsdLitIsCompl(iLit) );
+ Kit_TruthAndPhase( pTruthDec, pTruthDec, pTruthFans[i], pNtk->nVars, 0, Abc_LitIsCompl(iLit) );
else
- Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Kit_DsdLitIsCompl(iLit) );
+ Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Abc_LitIsCompl(iLit) );
return pTruthRes;
}
if ( pObj->Type == KIT_DSD_XOR )
@@ -958,7 +958,7 @@ unsigned * Kit_DsdTruthComputeNodeTwo_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
fCompl = 0;
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
{
- fCompl ^= Kit_DsdLitIsCompl(iLit);
+ fCompl ^= Abc_LitIsCompl(iLit);
if ( pfBoundSet[i] )
Kit_TruthXor( pTruthDec, pTruthDec, pTruthFans[i], pNtk->nVars );
else
@@ -996,14 +996,14 @@ unsigned * Kit_DsdTruthComputeNodeTwo_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk
continue;
Kit_TruthFill( pTruthMint, pNtk->nVars );
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- Kit_TruthAndPhase( pTruthMint, pTruthMint, pTruthFans[i], pNtk->nVars, 0, ((m & (1<<i)) == 0) ^ Kit_DsdLitIsCompl(iLit) );
+ Kit_TruthAndPhase( pTruthMint, pTruthMint, pTruthFans[i], pNtk->nVars, 0, ((m & (1<<i)) == 0) ^ Abc_LitIsCompl(iLit) );
Kit_TruthOr( pTruthRes, pTruthRes, pTruthMint, pNtk->nVars );
}
*/
// Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-// assert( !Kit_DsdLitIsCompl(iLit) );
+// assert( !Abc_LitIsCompl(iLit) );
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- if ( Kit_DsdLitIsCompl(iLit) )
+ if ( Abc_LitIsCompl(iLit) )
Kit_TruthNot( pTruthFans[i], pTruthFans[i], pNtk->nVars );
pTruthTemp = Kit_TruthCompose( p->dd, Kit_DsdObjTruth(pObj), pObj->nFans, pTruthFans, pNtk->nVars, p->vTtBdds, p->vNodes );
Kit_TruthCopy( pTruthRes, pTruthTemp, pNtk->nVars );
@@ -1047,9 +1047,9 @@ unsigned * Kit_DsdTruthComputeTwo( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, unsign
for ( i = 0; i < (int)pNtk->nVars; i++ )
Kit_TruthCopy( (unsigned *)Vec_PtrEntry(p->vTtNodes, i), (unsigned *)Vec_PtrEntry(p->vTtElems, i), p->nVars );
// compute truth table for each node
- pTruthRes = Kit_DsdTruthComputeNodeTwo_rec( p, pNtk, Kit_DsdLit2Var(pNtk->Root), uSupp, iVar, pTruthDec );
+ pTruthRes = Kit_DsdTruthComputeNodeTwo_rec( p, pNtk, Abc_Lit2Var(pNtk->Root), uSupp, iVar, pTruthDec );
// complement the truth table if needed
- if ( Kit_DsdLitIsCompl(pNtk->Root) )
+ if ( Abc_LitIsCompl(pNtk->Root) )
Kit_TruthNot( pTruthRes, pTruthRes, pNtk->nVars );
return pTruthRes;
}
@@ -1150,8 +1150,8 @@ int Kit_DsdCountLuts_rec( Kit_DsdNtk_t * pNtk, int nLutSize, int Id, int * pCoun
if ( pObj->Type == KIT_DSD_AND || pObj->Type == KIT_DSD_XOR )
{
assert( pObj->nFans == 2 );
- Res0 = Kit_DsdCountLuts_rec( pNtk, nLutSize, Kit_DsdLit2Var(pObj->pFans[0]), pCounter );
- Res1 = Kit_DsdCountLuts_rec( pNtk, nLutSize, Kit_DsdLit2Var(pObj->pFans[1]), pCounter );
+ Res0 = Kit_DsdCountLuts_rec( pNtk, nLutSize, Abc_Lit2Var(pObj->pFans[0]), pCounter );
+ Res1 = Kit_DsdCountLuts_rec( pNtk, nLutSize, Abc_Lit2Var(pObj->pFans[1]), pCounter );
if ( Res0 == 0 && Res1 > 0 )
return Res1 - 1;
if ( Res0 > 0 && Res1 == 0 )
@@ -1166,7 +1166,7 @@ int Kit_DsdCountLuts_rec( Kit_DsdNtk_t * pNtk, int nLutSize, int Id, int * pCoun
return 0;
}
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- Kit_DsdCountLuts_rec( pNtk, nLutSize, Kit_DsdLit2Var(iLit), pCounter );
+ Kit_DsdCountLuts_rec( pNtk, nLutSize, Abc_Lit2Var(iLit), pCounter );
(*pCounter)++;
// if ( (int)pObj->nFans == nLutSize + 1 )
// (*pCounter)++;
@@ -1191,7 +1191,7 @@ int Kit_DsdCountLuts( Kit_DsdNtk_t * pNtk, int nLutSize )
return 0;
if ( Kit_DsdNtkRoot(pNtk)->Type == KIT_DSD_VAR )
return 0;
- Kit_DsdCountLuts_rec( pNtk, nLutSize, Kit_DsdLit2Var(pNtk->Root), &Counter );
+ Kit_DsdCountLuts_rec( pNtk, nLutSize, Abc_Lit2Var(pNtk->Root), &Counter );
if ( Counter >= 1000 )
return -1;
return Counter;
@@ -1271,7 +1271,7 @@ unsigned Kit_DsdNonDsdSupports( Kit_DsdNtk_t * pNtk )
{
if ( pObj->Type != KIT_DSD_PRIME )
continue;
- uSupport |= Kit_DsdLitSupport( pNtk, Kit_DsdVar2Lit(pObj->Id,0) );
+ uSupport |= Kit_DsdLitSupport( pNtk, Abc_Var2Lit(pObj->Id,0) );
}
return uSupport;
}
@@ -1293,8 +1293,8 @@ void Kit_DsdExpandCollectAnd_rec( Kit_DsdNtk_t * p, unsigned iLit, unsigned * pi
Kit_DsdObj_t * pObj;
unsigned i, iLitFanin;
// check the end of the supergate
- pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
- if ( Kit_DsdLitIsCompl(iLit) || Kit_DsdLit2Var(iLit) < p->nVars || pObj->Type != KIT_DSD_AND )
+ pObj = Kit_DsdNtkObj( p, Abc_Lit2Var(iLit) );
+ if ( Abc_LitIsCompl(iLit) || Abc_Lit2Var(iLit) < p->nVars || pObj->Type != KIT_DSD_AND )
{
piLitsNew[(*nLitsNew)++] = iLit;
return;
@@ -1320,19 +1320,19 @@ void Kit_DsdExpandCollectXor_rec( Kit_DsdNtk_t * p, unsigned iLit, unsigned * pi
Kit_DsdObj_t * pObj;
unsigned i, iLitFanin;
// check the end of the supergate
- pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
- if ( Kit_DsdLit2Var(iLit) < p->nVars || pObj->Type != KIT_DSD_XOR )
+ pObj = Kit_DsdNtkObj( p, Abc_Lit2Var(iLit) );
+ if ( Abc_Lit2Var(iLit) < p->nVars || pObj->Type != KIT_DSD_XOR )
{
piLitsNew[(*nLitsNew)++] = iLit;
return;
}
// iterate through the fanins
- pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
+ pObj = Kit_DsdNtkObj( p, Abc_Lit2Var(iLit) );
Kit_DsdObjForEachFanin( p, pObj, iLitFanin, i )
Kit_DsdExpandCollectXor_rec( p, iLitFanin, piLitsNew, nLitsNew );
// if the literal was complemented, pass the complemented attribute somewhere
- if ( Kit_DsdLitIsCompl(iLit) )
- piLitsNew[0] = Kit_DsdLitNot( piLitsNew[0] );
+ if ( Abc_LitIsCompl(iLit) )
+ piLitsNew[0] = Abc_LitNot( piLitsNew[0] );
}
/**Function*************************************************************
@@ -1353,28 +1353,28 @@ int Kit_DsdExpandNode_rec( Kit_DsdNtk_t * pNew, Kit_DsdNtk_t * p, int iLit )
Kit_DsdObj_t * pObj, * pObjNew;
// consider the case of simple gate
- pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
+ pObj = Kit_DsdNtkObj( p, Abc_Lit2Var(iLit) );
if ( pObj == NULL )
return iLit;
if ( pObj->Type == KIT_DSD_AND )
{
- Kit_DsdExpandCollectAnd_rec( p, Kit_DsdLitRegular(iLit), piLitsNew, (int *)&nLitsNew );
+ Kit_DsdExpandCollectAnd_rec( p, Abc_LitRegular(iLit), piLitsNew, (int *)&nLitsNew );
pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_AND, nLitsNew );
for ( i = 0; i < pObjNew->nFans; i++ )
pObjNew->pFans[i] = Kit_DsdExpandNode_rec( pNew, p, piLitsNew[i] );
- return Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(iLit) );
+ return Abc_Var2Lit( pObjNew->Id, Abc_LitIsCompl(iLit) );
}
if ( pObj->Type == KIT_DSD_XOR )
{
- int fCompl = Kit_DsdLitIsCompl(iLit);
- Kit_DsdExpandCollectXor_rec( p, Kit_DsdLitRegular(iLit), piLitsNew, (int *)&nLitsNew );
+ int fCompl = Abc_LitIsCompl(iLit);
+ Kit_DsdExpandCollectXor_rec( p, Abc_LitRegular(iLit), piLitsNew, (int *)&nLitsNew );
pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_XOR, nLitsNew );
for ( i = 0; i < pObjNew->nFans; i++ )
{
- pObjNew->pFans[i] = Kit_DsdExpandNode_rec( pNew, p, Kit_DsdLitRegular(piLitsNew[i]) );
- fCompl ^= Kit_DsdLitIsCompl(piLitsNew[i]);
+ pObjNew->pFans[i] = Kit_DsdExpandNode_rec( pNew, p, Abc_LitRegular(piLitsNew[i]) );
+ fCompl ^= Abc_LitIsCompl(piLitsNew[i]);
}
- return Kit_DsdVar2Lit( pObjNew->Id, fCompl );
+ return Abc_Var2Lit( pObjNew->Id, fCompl );
}
assert( pObj->Type == KIT_DSD_PRIME );
@@ -1389,9 +1389,9 @@ int Kit_DsdExpandNode_rec( Kit_DsdNtk_t * pNew, Kit_DsdNtk_t * p, int iLit )
{
pObjNew->pFans[i] = Kit_DsdExpandNode_rec( pNew, p, iLitFanin );
// complement the corresponding inputs of the truth table
- if ( Kit_DsdLitIsCompl(pObjNew->pFans[i]) )
+ if ( Abc_LitIsCompl(pObjNew->pFans[i]) )
{
- pObjNew->pFans[i] = Kit_DsdLitRegular(pObjNew->pFans[i]);
+ pObjNew->pFans[i] = Abc_LitRegular(pObjNew->pFans[i]);
Kit_TruthChangePhase( pTruthNew, pObjNew->nFans, i );
}
}
@@ -1402,38 +1402,38 @@ int Kit_DsdExpandNode_rec( Kit_DsdNtk_t * pNew, Kit_DsdNtk_t * p, int iLit )
{
// translate into regular MUXes
if ( pTruthNew[0] == 0xC5C5C5C5 )
- pObjNew->pFans[0] = Kit_DsdLitNot(pObjNew->pFans[0]);
+ pObjNew->pFans[0] = Abc_LitNot(pObjNew->pFans[0]);
else if ( pTruthNew[0] == 0x3A3A3A3A )
- pObjNew->pFans[1] = Kit_DsdLitNot(pObjNew->pFans[1]);
+ pObjNew->pFans[1] = Abc_LitNot(pObjNew->pFans[1]);
else if ( pTruthNew[0] == 0x35353535 )
{
- pObjNew->pFans[0] = Kit_DsdLitNot(pObjNew->pFans[0]);
- pObjNew->pFans[1] = Kit_DsdLitNot(pObjNew->pFans[1]);
+ pObjNew->pFans[0] = Abc_LitNot(pObjNew->pFans[0]);
+ pObjNew->pFans[1] = Abc_LitNot(pObjNew->pFans[1]);
}
pTruthNew[0] = 0xCACACACA;
// resolve the complemented control input
- if ( Kit_DsdLitIsCompl(pObjNew->pFans[2]) )
+ if ( Abc_LitIsCompl(pObjNew->pFans[2]) )
{
unsigned char Temp = pObjNew->pFans[0];
pObjNew->pFans[0] = pObjNew->pFans[1];
pObjNew->pFans[1] = Temp;
- pObjNew->pFans[2] = Kit_DsdLitNot(pObjNew->pFans[2]);
+ pObjNew->pFans[2] = Abc_LitNot(pObjNew->pFans[2]);
}
// resolve the complemented true input
- if ( Kit_DsdLitIsCompl(pObjNew->pFans[1]) )
+ if ( Abc_LitIsCompl(pObjNew->pFans[1]) )
{
- iLit = Kit_DsdLitNot(iLit);
- pObjNew->pFans[0] = Kit_DsdLitNot(pObjNew->pFans[0]);
- pObjNew->pFans[1] = Kit_DsdLitNot(pObjNew->pFans[1]);
+ iLit = Abc_LitNot(iLit);
+ pObjNew->pFans[0] = Abc_LitNot(pObjNew->pFans[0]);
+ pObjNew->pFans[1] = Abc_LitNot(pObjNew->pFans[1]);
}
- return Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(iLit) );
+ return Abc_Var2Lit( pObjNew->Id, Abc_LitIsCompl(iLit) );
}
else
{
// if the incoming phase is complemented, absorb it into the prime node
- if ( Kit_DsdLitIsCompl(iLit) )
+ if ( Abc_LitIsCompl(iLit) )
Kit_TruthNot( pTruthNew, pTruthNew, pObj->nFans );
- return Kit_DsdVar2Lit( pObjNew->Id, 0 );
+ return Abc_Var2Lit( pObjNew->Id, 0 );
}
}
@@ -1459,14 +1459,14 @@ Kit_DsdNtk_t * Kit_DsdExpand( Kit_DsdNtk_t * p )
if ( Kit_DsdNtkRoot(p)->Type == KIT_DSD_CONST1 )
{
pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_CONST1, 0 );
- pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(p->Root) );
+ pNew->Root = Abc_Var2Lit( pObjNew->Id, Abc_LitIsCompl(p->Root) );
return pNew;
}
if ( Kit_DsdNtkRoot(p)->Type == KIT_DSD_VAR )
{
pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_VAR, 1 );
pObjNew->pFans[0] = Kit_DsdNtkRoot(p)->pFans[0];
- pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(p->Root) );
+ pNew->Root = Abc_Var2Lit( pObjNew->Id, Abc_LitIsCompl(p->Root) );
return pNew;
}
// convert the root node
@@ -1549,7 +1549,7 @@ int Kit_DsdShrink_rec( Kit_DsdNtk_t * pNew, Kit_DsdNtk_t * p, int iLit, int pPri
int iLitFanin, iLitNew;
// consider the case of simple gate
- pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
+ pObj = Kit_DsdNtkObj( p, Abc_Lit2Var(iLit) );
if ( pObj == NULL )
return iLit;
if ( pObj->Type == KIT_DSD_AND )
@@ -1567,16 +1567,16 @@ int Kit_DsdShrink_rec( Kit_DsdNtk_t * pNew, Kit_DsdNtk_t * p, int iLit, int pPri
pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_AND, 2 );
pObjNew->pFans[0] = Kit_DsdShrink_rec( pNew, p, piLitsNew[i], pPrios );
pObjNew->pFans[1] = iLitNew;
- iLitNew = Kit_DsdVar2Lit( pObjNew->Id, 0 );
+ iLitNew = Abc_Var2Lit( pObjNew->Id, 0 );
}
- return Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(iLit) );
+ return Abc_Var2Lit( pObjNew->Id, Abc_LitIsCompl(iLit) );
}
if ( pObj->Type == KIT_DSD_XOR )
{
// get the supports
Kit_DsdObjForEachFanin( p, pObj, iLitFanin, i )
{
- assert( !Kit_DsdLitIsCompl(iLitFanin) );
+ assert( !Abc_LitIsCompl(iLitFanin) );
uSupps[i] = Kit_DsdLitSupport( p, iLitFanin );
}
// put the largest component last
@@ -1589,9 +1589,9 @@ int Kit_DsdShrink_rec( Kit_DsdNtk_t * pNew, Kit_DsdNtk_t * p, int iLit, int pPri
pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_XOR, 2 );
pObjNew->pFans[0] = Kit_DsdShrink_rec( pNew, p, piLitsNew[i], pPrios );
pObjNew->pFans[1] = iLitNew;
- iLitNew = Kit_DsdVar2Lit( pObjNew->Id, 0 );
+ iLitNew = Abc_Var2Lit( pObjNew->Id, 0 );
}
- return Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(iLit) );
+ return Abc_Var2Lit( pObjNew->Id, Abc_LitIsCompl(iLit) );
}
assert( pObj->Type == KIT_DSD_PRIME );
@@ -1606,16 +1606,16 @@ int Kit_DsdShrink_rec( Kit_DsdNtk_t * pNew, Kit_DsdNtk_t * p, int iLit, int pPri
{
pObjNew->pFans[i] = Kit_DsdShrink_rec( pNew, p, iLitFanin, pPrios );
// complement the corresponding inputs of the truth table
- if ( Kit_DsdLitIsCompl(pObjNew->pFans[i]) )
+ if ( Abc_LitIsCompl(pObjNew->pFans[i]) )
{
- pObjNew->pFans[i] = Kit_DsdLitRegular(pObjNew->pFans[i]);
+ pObjNew->pFans[i] = Abc_LitRegular(pObjNew->pFans[i]);
Kit_TruthChangePhase( pTruthNew, pObjNew->nFans, i );
}
}
// if the incoming phase is complemented, absorb it into the prime node
- if ( Kit_DsdLitIsCompl(iLit) )
+ if ( Abc_LitIsCompl(iLit) )
Kit_TruthNot( pTruthNew, pTruthNew, pObj->nFans );
- return Kit_DsdVar2Lit( pObjNew->Id, 0 );
+ return Abc_Var2Lit( pObjNew->Id, 0 );
}
/**Function*************************************************************
@@ -1641,14 +1641,14 @@ Kit_DsdNtk_t * Kit_DsdShrink( Kit_DsdNtk_t * p, int pPrios[] )
if ( Kit_DsdNtkRoot(p)->Type == KIT_DSD_CONST1 )
{
pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_CONST1, 0 );
- pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(p->Root) );
+ pNew->Root = Abc_Var2Lit( pObjNew->Id, Abc_LitIsCompl(p->Root) );
return pNew;
}
if ( Kit_DsdNtkRoot(p)->Type == KIT_DSD_VAR )
{
pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_VAR, 1 );
pObjNew->pFans[0] = Kit_DsdNtkRoot(p)->pFans[0];
- pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(p->Root) );
+ pNew->Root = Abc_Var2Lit( pObjNew->Id, Abc_LitIsCompl(p->Root) );
return pNew;
}
// convert the root node
@@ -1737,7 +1737,7 @@ unsigned Kit_DsdGetSupports_rec( Kit_DsdNtk_t * p, int iLit )
Kit_DsdObj_t * pObj;
unsigned uSupport, k;
int iFaninLit;
- pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
+ pObj = Kit_DsdNtkObj( p, Abc_Lit2Var(iLit) );
if ( pObj == NULL )
return Kit_DsdLitSupport( p, iLit );
uSupport = 0;
@@ -1805,7 +1805,7 @@ int Kit_DsdFindLargeBox_rec( Kit_DsdNtk_t * pNtk, int Id, int Size )
return 1;
RetValue = 0;
Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
- RetValue |= Kit_DsdFindLargeBox_rec( pNtk, Kit_DsdLit2Var(iLit), Size );
+ RetValue |= Kit_DsdFindLargeBox_rec( pNtk, Abc_Lit2Var(iLit), Size );
return RetValue;
}
@@ -1822,7 +1822,7 @@ int Kit_DsdFindLargeBox_rec( Kit_DsdNtk_t * pNtk, int Id, int Size )
***********************************************************************/
int Kit_DsdFindLargeBox( Kit_DsdNtk_t * pNtk, int Size )
{
- return Kit_DsdFindLargeBox_rec( pNtk, Kit_DsdLit2Var(pNtk->Root), Size );
+ return Kit_DsdFindLargeBox_rec( pNtk, Abc_Lit2Var(pNtk->Root), Size );
}
/**Function*************************************************************
@@ -1841,10 +1841,10 @@ int Kit_DsdRootNodeHasCommonVars( Kit_DsdObj_t * pObj0, Kit_DsdObj_t * pObj1 )
unsigned i, k;
for ( i = 0; i < pObj0->nFans; i++ )
{
- if ( Kit_DsdLit2Var(pObj0->pFans[i]) >= 4 )
+ if ( Abc_Lit2Var(pObj0->pFans[i]) >= 4 )
continue;
for ( k = 0; k < pObj1->nFans; k++ )
- if ( Kit_DsdLit2Var(pObj0->pFans[i]) == Kit_DsdLit2Var(pObj1->pFans[k]) )
+ if ( Abc_Lit2Var(pObj0->pFans[i]) == Abc_Lit2Var(pObj1->pFans[k]) )
return 1;
}
return 0;
@@ -1916,11 +1916,11 @@ void Kit_DsdDecompose_rec( Kit_DsdNtk_t * pNtk, Kit_DsdObj_t * pObj, unsigned uS
{
pObj->Type = KIT_DSD_NONE;
if ( pTruth[0] == 0x55555555 )
- pObj->pFans[0] = Kit_DsdLitNot(pObj->pFans[0]);
+ pObj->pFans[0] = Abc_LitNot(pObj->pFans[0]);
else
assert( pTruth[0] == 0xAAAAAAAA );
// update the parent pointer
- *pPar = Kit_DsdLitNotCond( pObj->pFans[0], Kit_DsdLitIsCompl(*pPar) );
+ *pPar = Abc_LitNotCond( pObj->pFans[0], Abc_LitIsCompl(*pPar) );
return;
}
@@ -1978,7 +1978,7 @@ void Kit_DsdDecompose_rec( Kit_DsdNtk_t * pNtk, Kit_DsdObj_t * pObj, unsigned uS
pRes->pFans[0] = pObj->pFans[i]; pObj->pFans[i] = 127; uSupp &= ~(1 << i);
pRes->pFans[1] = 2*pObj->Id;
// update the parent pointer
- *pPar = Kit_DsdLitNotCond( 2 * pRes->Id, Kit_DsdLitIsCompl(*pPar) );
+ *pPar = Abc_LitNotCond( 2 * pRes->Id, Abc_LitIsCompl(*pPar) );
// consider different decompositions
if ( fEquals[0][0] )
{
@@ -1986,20 +1986,20 @@ void Kit_DsdDecompose_rec( Kit_DsdNtk_t * pNtk, Kit_DsdObj_t * pObj, unsigned uS
}
else if ( fEquals[0][1] )
{
- pRes->pFans[0] = Kit_DsdLitNot(pRes->pFans[0]);
+ pRes->pFans[0] = Abc_LitNot(pRes->pFans[0]);
Kit_TruthCopy( pTruth, pCofs2[0], pObj->nFans );
}
else if ( fEquals[1][0] )
{
- *pPar = Kit_DsdLitNot(*pPar);
- pRes->pFans[1] = Kit_DsdLitNot(pRes->pFans[1]);
+ *pPar = Abc_LitNot(*pPar);
+ pRes->pFans[1] = Abc_LitNot(pRes->pFans[1]);
Kit_TruthCopy( pTruth, pCofs2[1], pObj->nFans );
}
else if ( fEquals[1][1] )
{
- *pPar = Kit_DsdLitNot(*pPar);
- pRes->pFans[0] = Kit_DsdLitNot(pRes->pFans[0]);
- pRes->pFans[1] = Kit_DsdLitNot(pRes->pFans[1]);
+ *pPar = Abc_LitNot(*pPar);
+ pRes->pFans[0] = Abc_LitNot(pRes->pFans[0]);
+ pRes->pFans[1] = Abc_LitNot(pRes->pFans[1]);
Kit_TruthCopy( pTruth, pCofs2[0], pObj->nFans );
}
else if ( fOppos )
@@ -2070,7 +2070,7 @@ void Kit_DsdDecompose_rec( Kit_DsdNtk_t * pNtk, Kit_DsdObj_t * pObj, unsigned uS
// Kit_TruthMuxVar( pTruth, pCofs4[0][1], pCofs4[0][0], pObj->nFans, i );
Kit_TruthMuxVar( pTruth, pCofs4[1][0], pCofs4[1][1], pObj->nFans, i );
if ( fEquals[1][0] && fEquals[1][1] )
- pRes->pFans[0] = Kit_DsdLitNot(pRes->pFans[0]);
+ pRes->pFans[0] = Abc_LitNot(pRes->pFans[0]);
// decompose the remainder
Kit_DsdDecompose_rec( pNtk, pObj, uSupp, pPar, nDecMux );
return;
@@ -2104,18 +2104,18 @@ void Kit_DsdDecompose_rec( Kit_DsdNtk_t * pNtk, Kit_DsdObj_t * pObj, unsigned uS
pRes->pFans[1] = pObj->pFans[i]; pObj->pFans[i] = 127; uSupp &= ~(1 << i);
if ( !fPairs[0][1] && !fPairs[0][2] && !fPairs[0][3] ) // 00
{
- pRes->pFans[0] = Kit_DsdLitNot(pRes->pFans[0]);
- pRes->pFans[1] = Kit_DsdLitNot(pRes->pFans[1]);
+ pRes->pFans[0] = Abc_LitNot(pRes->pFans[0]);
+ pRes->pFans[1] = Abc_LitNot(pRes->pFans[1]);
Kit_TruthMuxVar( pTruth, pCofs4[1][1], pCofs4[0][0], pObj->nFans, k );
}
else if ( !fPairs[1][0] && !fPairs[1][2] && !fPairs[1][3] ) // 01
{
- pRes->pFans[1] = Kit_DsdLitNot(pRes->pFans[1]);
+ pRes->pFans[1] = Abc_LitNot(pRes->pFans[1]);
Kit_TruthMuxVar( pTruth, pCofs4[0][0], pCofs4[0][1], pObj->nFans, k );
}
else if ( !fPairs[2][0] && !fPairs[2][1] && !fPairs[2][3] ) // 10
{
- pRes->pFans[0] = Kit_DsdLitNot(pRes->pFans[0]);
+ pRes->pFans[0] = Abc_LitNot(pRes->pFans[0]);
Kit_TruthMuxVar( pTruth, pCofs4[0][0], pCofs4[1][0], pObj->nFans, k );
}
else if ( !fPairs[3][0] && !fPairs[3][1] && !fPairs[3][2] ) // 11
@@ -2187,12 +2187,12 @@ Kit_DsdNtk_t * Kit_DsdDecomposeInt( unsigned * pTruth, int nVars, int nDecMux )
int i, nVarsReal;
assert( nVars <= 16 );
pNtk = Kit_DsdNtkAlloc( nVars );
- pNtk->Root = Kit_DsdVar2Lit( pNtk->nVars, 0 );
+ pNtk->Root = Abc_Var2Lit( pNtk->nVars, 0 );
// create the first node
pObj = Kit_DsdObjAlloc( pNtk, KIT_DSD_PRIME, nVars );
assert( pNtk->pNodes[0] == pObj );
for ( i = 0; i < nVars; i++ )
- pObj->pFans[i] = Kit_DsdVar2Lit( i, 0 );
+ pObj->pFans[i] = Abc_Var2Lit( i, 0 );
Kit_TruthCopy( Kit_DsdObjTruth(pObj), pTruth, nVars );
uSupp = Kit_TruthSupport( pTruth, nVars );
// consider special cases
@@ -2202,14 +2202,14 @@ Kit_DsdNtk_t * Kit_DsdDecomposeInt( unsigned * pTruth, int nVars, int nDecMux )
pObj->Type = KIT_DSD_CONST1;
pObj->nFans = 0;
if ( pTruth[0] == 0 )
- pNtk->Root = Kit_DsdLitNot(pNtk->Root);
+ pNtk->Root = Abc_LitNot(pNtk->Root);
return pNtk;
}
if ( nVarsReal == 1 )
{
pObj->Type = KIT_DSD_VAR;
pObj->nFans = 1;
- pObj->pFans[0] = Kit_DsdVar2Lit( Kit_WordFindFirstBit(uSupp), (pTruth[0] & 1) );
+ pObj->pFans[0] = Abc_Var2Lit( Kit_WordFindFirstBit(uSupp), (pTruth[0] & 1) );
return pNtk;
}
Kit_DsdDecompose_rec( pNtk, pNtk->pNodes[0], uSupp, &pNtk->Root, nDecMux );
@@ -2275,14 +2275,14 @@ Kit_DsdNtk_t * Kit_DsdDecomposeMux( unsigned * pTruth, int nVars, int nDecMux )
if ( nVars == 0 )
{
pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_CONST1, 0 );
- pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, (int)(pTruth[0] == 0) );
+ pNew->Root = Abc_Var2Lit( pObjNew->Id, (int)(pTruth[0] == 0) );
return pNew;
}
if ( nVars == 1 )
{
pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_VAR, 1 );
- pObjNew->pFans[0] = Kit_DsdVar2Lit( 0, 0 );
- pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, (int)(pTruth[0] != 0xAAAAAAAA) );
+ pObjNew->pFans[0] = Abc_Var2Lit( 0, 0 );
+ pNew->Root = Abc_Var2Lit( pObjNew->Id, (int)(pTruth[0] != 0xAAAAAAAA) );
return pNew;
}
*/
@@ -2434,7 +2434,7 @@ void Kit_DsdTest( unsigned * pTruth, int nVars )
Kit_DsdNtk_t * pNtk, * pTemp;
pNtk = Kit_DsdDecompose( pTruth, nVars );
-// if ( Kit_DsdFindLargeBox(pNtk, Kit_DsdLit2Var(pNtk->Root)) )
+// if ( Kit_DsdFindLargeBox(pNtk, Abc_Lit2Var(pNtk->Root)) )
// Kit_DsdPrint( stdout, pNtk );
// if ( Kit_DsdNtkRoot(pNtk)->nFans == (unsigned)nVars && nVars == 6 )
@@ -2447,7 +2447,7 @@ void Kit_DsdTest( unsigned * pTruth, int nVars )
Kit_DsdPrint( stdout, pNtk ), printf( "\n" );
-// if ( Kit_DsdFindLargeBox(pNtk, Kit_DsdLit2Var(pNtk->Root)) )
+// if ( Kit_DsdFindLargeBox(pNtk, Abc_Lit2Var(pNtk->Root)) )
// Kit_DsdTestCofs( pNtk, pTruth );
// recompute the truth table
@@ -2567,7 +2567,7 @@ int Kit_DsdCofactoringGetVars( Kit_DsdNtk_t ** ppNtk, int nSize, int * pVars )
if ( !Kit_DsdLitIsLeaf(ppNtk[i], iFaninLit) )
continue;
// add it to the array
- Var = Kit_DsdLit2Var( iFaninLit );
+ Var = Abc_Lit2Var( iFaninLit );
for ( v = 0; v < nVars; v++ )
if ( pVars[v] == Var )
break;
diff --git a/src/aig/kit/kitFactor.c b/src/bool/kit/kitFactor.c
index ec4775ca..ec4775ca 100644
--- a/src/aig/kit/kitFactor.c
+++ b/src/bool/kit/kitFactor.c
diff --git a/src/aig/kit/kitGraph.c b/src/bool/kit/kitGraph.c
index e4eea885..e4eea885 100644
--- a/src/aig/kit/kitGraph.c
+++ b/src/bool/kit/kitGraph.c
diff --git a/src/aig/kit/kitHop.c b/src/bool/kit/kitHop.c
index 9dfa67a8..28f4e714 100644
--- a/src/aig/kit/kitHop.c
+++ b/src/bool/kit/kitHop.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "kit.h"
-#include "hop.h"
+#include "src/aig/hop/hop.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/kit/kitIsop.c b/src/bool/kit/kitIsop.c
index fc017c0e..fc017c0e 100644
--- a/src/aig/kit/kitIsop.c
+++ b/src/bool/kit/kitIsop.c
diff --git a/src/aig/kit/kitPerm.c b/src/bool/kit/kitPerm.c
index d3e9ff5a..d3e9ff5a 100644
--- a/src/aig/kit/kitPerm.c
+++ b/src/bool/kit/kitPerm.c
diff --git a/src/aig/kit/kitPla.c b/src/bool/kit/kitPla.c
index df6d4e11..acc163fc 100644
--- a/src/aig/kit/kitPla.c
+++ b/src/bool/kit/kitPla.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "kit.h"
-#include "aig.h"
+#include "src/aig/aig/aig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/kit/kitSop.c b/src/bool/kit/kitSop.c
index 21ea69b8..21ea69b8 100644
--- a/src/aig/kit/kitSop.c
+++ b/src/bool/kit/kitSop.c
diff --git a/src/aig/kit/kitTruth.c b/src/bool/kit/kitTruth.c
index bd8bbb1c..bd8bbb1c 100644
--- a/src/aig/kit/kitTruth.c
+++ b/src/bool/kit/kitTruth.c
diff --git a/src/aig/kit/kit_.c b/src/bool/kit/kit_.c
index 37be0b49..37be0b49 100644
--- a/src/aig/kit/kit_.c
+++ b/src/bool/kit/kit_.c
diff --git a/src/bool/kit/module.make b/src/bool/kit/module.make
new file mode 100644
index 00000000..ac29f1f7
--- /dev/null
+++ b/src/bool/kit/module.make
@@ -0,0 +1,11 @@
+SRC += src/bool/kit/kitAig.c \
+ src/bool/kit/kitBdd.c \
+ src/bool/kit/kitCloud.c src/bool/kit/cloud.c \
+ src/bool/kit/kitDsd.c \
+ src/bool/kit/kitFactor.c \
+ src/bool/kit/kitGraph.c \
+ src/bool/kit/kitHop.c \
+ src/bool/kit/kitIsop.c \
+ src/bool/kit/kitPla.c \
+ src/bool/kit/kitSop.c \
+ src/bool/kit/kitTruth.c
diff --git a/src/generic.h b/src/generic.h
index 923cddd3..92fd554b 100644
--- a/src/generic.h
+++ b/src/generic.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __zzz_H__
-#define __zzz_H__
+#ifndef ABC__generic_h
+#define ABC__generic_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/map/amap/amap.h b/src/map/amap/amap.h
index de7fcc18..0a0c7cc0 100644
--- a/src/map/amap/amap.h
+++ b/src/map/amap/amap.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __AMAP_H__
-#define __AMAP_H__
+#ifndef ABC__map__amap__amap_h
+#define ABC__map__amap__amap_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/map/amap/amapCore.c b/src/map/amap/amapCore.c
index 4f2d2310..ce1f61bd 100644
--- a/src/map/amap/amapCore.c
+++ b/src/map/amap/amapCore.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "amapInt.h"
-#include "main.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/amap/amapGraph.c b/src/map/amap/amapGraph.c
index bc0878d1..c346ca98 100644
--- a/src/map/amap/amapGraph.c
+++ b/src/map/amap/amapGraph.c
@@ -141,9 +141,9 @@ Amap_Obj_t * Amap_ManCreateAnd( Amap_Man_t * p, Amap_Obj_t * pFan0, Amap_Obj_t *
pObj->Type = AMAP_OBJ_AND;
pObj->Fan[0] = Amap_ObjToLit(pFan0); Amap_Regular(pFan0)->nRefs++;
pObj->Fan[1] = Amap_ObjToLit(pFan1); Amap_Regular(pFan1)->nRefs++;
- assert( Amap_Lit2Var(pObj->Fan[0]) != Amap_Lit2Var(pObj->Fan[1]) );
+ assert( Abc_Lit2Var(pObj->Fan[0]) != Abc_Lit2Var(pObj->Fan[1]) );
pObj->fPhase = Amap_ObjPhaseReal(pFan0) & Amap_ObjPhaseReal(pFan1);
- pObj->Level = 1 + ABC_MAX( Amap_Regular(pFan0)->Level, Amap_Regular(pFan1)->Level );
+ pObj->Level = 1 + Abc_MaxInt( Amap_Regular(pFan0)->Level, Amap_Regular(pFan1)->Level );
if ( p->nLevelMax < (int)pObj->Level )
p->nLevelMax = (int)pObj->Level;
assert( p->nLevelMax < 4094 ); // 2^12-2
@@ -170,7 +170,7 @@ Amap_Obj_t * Amap_ManCreateXor( Amap_Man_t * p, Amap_Obj_t * pFan0, Amap_Obj_t *
pObj->Fan[0] = Amap_ObjToLit(pFan0); Amap_Regular(pFan0)->nRefs++;
pObj->Fan[1] = Amap_ObjToLit(pFan1); Amap_Regular(pFan1)->nRefs++;
pObj->fPhase = Amap_ObjPhaseReal(pFan0) ^ Amap_ObjPhaseReal(pFan1);
- pObj->Level = 2 + ABC_MAX( Amap_Regular(pFan0)->Level, Amap_Regular(pFan1)->Level );
+ pObj->Level = 2 + Abc_MaxInt( Amap_Regular(pFan0)->Level, Amap_Regular(pFan1)->Level );
if ( p->nLevelMax < (int)pObj->Level )
p->nLevelMax = (int)pObj->Level;
assert( p->nLevelMax < 4094 ); // 2^12-2
@@ -199,8 +199,8 @@ Amap_Obj_t * Amap_ManCreateMux( Amap_Man_t * p, Amap_Obj_t * pFan0, Amap_Obj_t *
pObj->Fan[2] = Amap_ObjToLit(pFanC); Amap_Regular(pFanC)->nRefs++;
pObj->fPhase = (Amap_ObjPhaseReal(pFan1) & Amap_ObjPhaseReal(pFanC)) |
(Amap_ObjPhaseReal(pFan0) & ~Amap_ObjPhaseReal(pFanC));
- pObj->Level = ABC_MAX( Amap_Regular(pFan0)->Level, Amap_Regular(pFan1)->Level );
- pObj->Level = 2 + ABC_MAX( pObj->Level, Amap_Regular(pFanC)->Level );
+ pObj->Level = Abc_MaxInt( Amap_Regular(pFan0)->Level, Amap_Regular(pFan1)->Level );
+ pObj->Level = 2 + Abc_MaxInt( pObj->Level, Amap_Regular(pFanC)->Level );
if ( p->nLevelMax < (int)pObj->Level )
p->nLevelMax = (int)pObj->Level;
assert( p->nLevelMax < 4094 ); // 2^12-2
@@ -228,7 +228,7 @@ void Amap_ManCreateChoice( Amap_Man_t * p, Amap_Obj_t * pObj )
// update the level of this node (needed for correct required time computation)
for ( pTemp = pObj; pTemp; pTemp = Amap_ObjChoice(p, pTemp) )
{
- pObj->Level = ABC_MAX( pObj->Level, pTemp->Level );
+ pObj->Level = Abc_MaxInt( pObj->Level, pTemp->Level );
// pTemp->nVisits++; pTemp->nVisitsCopy++;
}
// mark the largest level
diff --git a/src/map/amap/amapInt.h b/src/map/amap/amapInt.h
index 92e77e10..86e3e18f 100644
--- a/src/map/amap/amapInt.h
+++ b/src/map/amap/amapInt.h
@@ -18,15 +18,15 @@
***********************************************************************/
-#ifndef __AMAP_INT_H__
-#define __AMAP_INT_H__
+#ifndef ABC__map__amap__amapInt_h
+#define ABC__map__amap__amapInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "aig.h"
+#include "src/aig/aig/aig.h"
#include "amap.h"
////////////////////////////////////////////////////////////////////////
@@ -216,13 +216,6 @@ struct Amap_Obj_t_
Amap_Mat_t Best; // the best match of the node
};
-static inline int Amap_Var2Lit( int Var, int fCompl ) { return Var + Var + fCompl; }
-static inline int Amap_Lit2Var( int Lit ) { return Lit >> 1; }
-static inline int Amap_LitIsCompl( int Lit ) { return Lit & 1; }
-static inline int Amap_LitNot( int Lit ) { return Lit ^ 1; }
-static inline int Amap_LitNotCond( int Lit, int c ) { return Lit ^ (int)(c > 0); }
-static inline int Amap_LitRegular( int Lit ) { return Lit & ~01; }
-
static inline Amap_Obj_t * Amap_Regular( Amap_Obj_t * p ) { return (Amap_Obj_t *)((ABC_PTRUINT_T)(p) & ~01); }
static inline Amap_Obj_t * Amap_Not( Amap_Obj_t * p ) { return (Amap_Obj_t *)((ABC_PTRUINT_T)(p) ^ 01); }
static inline Amap_Obj_t * Amap_NotCond( Amap_Obj_t * p, int c ) { return (Amap_Obj_t *)((ABC_PTRUINT_T)(p) ^ (c)); }
@@ -249,13 +242,13 @@ static inline int Amap_ObjIsXor( Amap_Obj_t * pObj )
static inline int Amap_ObjIsMux( Amap_Obj_t * pObj ) { return pObj->Type == AMAP_OBJ_MUX; }
static inline int Amap_ObjIsNode( Amap_Obj_t * pObj ) { return pObj->Type == AMAP_OBJ_AND || pObj->Type == AMAP_OBJ_XOR || pObj->Type == AMAP_OBJ_MUX; }
-static inline int Amap_ObjToLit( Amap_Obj_t * pObj ) { return Amap_Var2Lit( Amap_Regular(pObj)->Id, Amap_IsComplement(pObj) ); }
-static inline Amap_Obj_t * Amap_ObjFanin0( Amap_Man_t * p, Amap_Obj_t * pObj ) { return Amap_ManObj(p, Amap_Lit2Var(pObj->Fan[0])); }
-static inline Amap_Obj_t * Amap_ObjFanin1( Amap_Man_t * p, Amap_Obj_t * pObj ) { return Amap_ManObj(p, Amap_Lit2Var(pObj->Fan[1])); }
-static inline Amap_Obj_t * Amap_ObjFanin2( Amap_Man_t * p, Amap_Obj_t * pObj ) { return Amap_ManObj(p, Amap_Lit2Var(pObj->Fan[2])); }
-static inline int Amap_ObjFaninC0( Amap_Obj_t * pObj ) { return Amap_LitIsCompl(pObj->Fan[0]); }
-static inline int Amap_ObjFaninC1( Amap_Obj_t * pObj ) { return Amap_LitIsCompl(pObj->Fan[1]); }
-static inline int Amap_ObjFaninC2( Amap_Obj_t * pObj ) { return Amap_LitIsCompl(pObj->Fan[2]); }
+static inline int Amap_ObjToLit( Amap_Obj_t * pObj ) { return Abc_Var2Lit( Amap_Regular(pObj)->Id, Amap_IsComplement(pObj) ); }
+static inline Amap_Obj_t * Amap_ObjFanin0( Amap_Man_t * p, Amap_Obj_t * pObj ) { return Amap_ManObj(p, Abc_Lit2Var(pObj->Fan[0])); }
+static inline Amap_Obj_t * Amap_ObjFanin1( Amap_Man_t * p, Amap_Obj_t * pObj ) { return Amap_ManObj(p, Abc_Lit2Var(pObj->Fan[1])); }
+static inline Amap_Obj_t * Amap_ObjFanin2( Amap_Man_t * p, Amap_Obj_t * pObj ) { return Amap_ManObj(p, Abc_Lit2Var(pObj->Fan[2])); }
+static inline int Amap_ObjFaninC0( Amap_Obj_t * pObj ) { return Abc_LitIsCompl(pObj->Fan[0]); }
+static inline int Amap_ObjFaninC1( Amap_Obj_t * pObj ) { return Abc_LitIsCompl(pObj->Fan[1]); }
+static inline int Amap_ObjFaninC2( Amap_Obj_t * pObj ) { return Abc_LitIsCompl(pObj->Fan[2]); }
static inline void * Amap_ObjCopy( Amap_Obj_t * pObj ) { return pObj->pData; }
static inline int Amap_ObjLevel( Amap_Obj_t * pObj ) { return pObj->Level; }
static inline void Amap_ObjSetLevel( Amap_Obj_t * pObj, int Level ) { pObj->Level = Level; }
@@ -313,14 +306,14 @@ extern void Kit_DsdPrintFromTruth( unsigned * pTruth, int nVars );
// iterates through each fanin of the match
#define Amap_MatchForEachFaninCompl( p, pM, pFanin, fCompl, i ) \
for ( i = 0; i < (int)(pM)->pCut->nFans && \
- ((pFanin = Amap_ManObj((p), Amap_Lit2Var((pM)->pCut->Fans[Amap_Lit2Var((pM)->pSet->Ins[i])]))), 1) && \
- ((fCompl = Amap_LitIsCompl((pM)->pSet->Ins[i]) ^ Amap_LitIsCompl((pM)->pCut->Fans[Amap_Lit2Var((pM)->pSet->Ins[i])])), 1); \
+ ((pFanin = Amap_ManObj((p), Abc_Lit2Var((pM)->pCut->Fans[Abc_Lit2Var((pM)->pSet->Ins[i])]))), 1) && \
+ ((fCompl = Abc_LitIsCompl((pM)->pSet->Ins[i]) ^ Abc_LitIsCompl((pM)->pCut->Fans[Abc_Lit2Var((pM)->pSet->Ins[i])])), 1); \
i++ )
// iterates through each fanin of the match
#define Amap_MatchForEachFanin( p, pM, pFanin, i ) \
for ( i = 0; i < (int)(pM)->pCut->nFans && \
- ((pFanin = Amap_ManObj((p), Amap_Lit2Var((pM)->pCut->Fans[Amap_Lit2Var((pM)->pSet->Ins[i])]))), 1); \
+ ((pFanin = Amap_ManObj((p), Abc_Lit2Var((pM)->pCut->Fans[Abc_Lit2Var((pM)->pSet->Ins[i])]))), 1); \
i++ )
////////////////////////////////////////////////////////////////////////
diff --git a/src/map/amap/amapLib.c b/src/map/amap/amapLib.c
index 74017dde..bbf76a64 100644
--- a/src/map/amap/amapLib.c
+++ b/src/map/amap/amapLib.c
@@ -277,7 +277,7 @@ Vec_Ptr_t * Amap_LibSelectGates( Amap_Lib_t * p, int fVerbose )
continue;
if ( pGate2->nPins != pGate->nPins )
continue;
- if ( !memcmp( pGate2->pFunc, pGate->pFunc, sizeof(unsigned) * Aig_TruthWordNum(pGate->nPins) ) )
+ if ( !memcmp( pGate2->pFunc, pGate->pFunc, sizeof(unsigned) * Abc_TruthWordNum(pGate->nPins) ) )
break;
}
if ( k < i )
diff --git a/src/map/amap/amapLiberty.c b/src/map/amap/amapLiberty.c
index 8006d61d..9a213d2a 100644
--- a/src/map/amap/amapLiberty.c
+++ b/src/map/amap/amapLiberty.c
@@ -843,7 +843,7 @@ Amap_Tree_t * Amap_LibertyStart( char * pFileName )
fclose( pFile );
p->pContents[p->nContents] = 0;
// other
- p->pFileName = Aig_UtilStrsav( pFileName );
+ p->pFileName = Abc_UtilStrsav( pFileName );
p->nItermAlloc = 10 + Amap_LibertyCountItems( p->pContents, p->pContents+p->nContents );
p->pItems = ABC_CALLOC( Amap_Item_t, p->nItermAlloc );
p->nItems = 0;
diff --git a/src/map/amap/amapMatch.c b/src/map/amap/amapMatch.c
index ca513e61..40409e0d 100644
--- a/src/map/amap/amapMatch.c
+++ b/src/map/amap/amapMatch.c
@@ -105,7 +105,7 @@ float Amap_ManMaxDelay( Amap_Man_t * p )
float Delay = 0.0;
int i;
Amap_ManForEachPo( p, pObj, i )
- Delay = ABC_MAX( Delay, Amap_ObjFanin0(p,pObj)->Best.Delay );
+ Delay = Abc_MaxInt( Delay, Amap_ObjFanin0(p,pObj)->Best.Delay );
return Delay;
}
@@ -157,9 +157,9 @@ float Amap_ManComputeMapping_rec( Amap_Man_t * p, Amap_Obj_t * pObj, int fCompl
Area = pGate->dArea;
for ( i = 0; i < (int)pGate->nPins; i++ )
{
- iFanin = Amap_Lit2Var( pM->pSet->Ins[i] );
- pFanin = Amap_ManObj( p, Amap_Lit2Var(pM->pCut->Fans[iFanin]) );
- fComplFanin = Amap_LitIsCompl( pM->pSet->Ins[i] ) ^ Amap_LitIsCompl( pM->pCut->Fans[iFanin] );
+ iFanin = Abc_Lit2Var( pM->pSet->Ins[i] );
+ pFanin = Amap_ManObj( p, Abc_Lit2Var(pM->pCut->Fans[iFanin]) );
+ fComplFanin = Abc_LitIsCompl( pM->pSet->Ins[i] ) ^ Abc_LitIsCompl( pM->pCut->Fans[iFanin] );
Area += Amap_ManComputeMapping_rec( p, pFanin, fComplFanin );
}
return Area;
@@ -376,7 +376,7 @@ static inline void Amap_ManMatchGetFlows( Amap_Man_t * p, Amap_Mat_t * pM )
Amap_MatchForEachFanin( p, pM, pFanin, i )
{
pMFanin = &pFanin->Best;
- pM->Delay = ABC_MAX( pM->Delay, pMFanin->Delay );
+ pM->Delay = Abc_MaxInt( pM->Delay, pMFanin->Delay );
pM->AveFan += Amap_ObjRefsTotal(pFanin);
if ( Amap_ObjRefsTotal(pFanin) == 0 )
pM->Area += pMFanin->Area;
@@ -412,7 +412,7 @@ static inline void Amap_ManMatchGetExacts( Amap_Man_t * p, Amap_Obj_t * pNode, A
Amap_MatchForEachFanin( p, pM, pFanin, i )
{
pMFanin = &pFanin->Best;
- pM->Delay = ABC_MAX( pM->Delay, pMFanin->Delay );
+ pM->Delay = Abc_MaxInt( pM->Delay, pMFanin->Delay );
pM->AveFan += Amap_ObjRefsTotal(pFanin);
}
pM->AveFan /= pGate->nPins;
diff --git a/src/map/amap/amapMerge.c b/src/map/amap/amapMerge.c
index ecf11b07..c52642e3 100644
--- a/src/map/amap/amapMerge.c
+++ b/src/map/amap/amapMerge.c
@@ -54,7 +54,7 @@ Amap_Cut_t * Amap_ManSetupPis( Amap_Man_t * p )
pCut->iMat = 0;
pCut->fInv = 0;
pCut->nFans = 1;
- pCut->Fans[0] = Amap_Var2Lit( pObj->Id, 0 );
+ pCut->Fans[0] = Abc_Var2Lit( pObj->Id, 0 );
pObj->pData = pCut;
pObj->nCuts = 1;
pObj->EstRefs = (float)1.0;
@@ -83,7 +83,7 @@ Amap_Cut_t * Amap_ManCutStore( Amap_Man_t * p, Amap_Cut_t * pCut, int fCompl )
pNew->nFans = pCut->nFans;
memcpy( pNew->Fans, pCut->Fans, sizeof(int) * pCut->nFans );
// add it to storage
- iFan = Amap_Var2Lit( pNew->iMat, pNew->fInv );
+ iFan = Abc_Var2Lit( pNew->iMat, pNew->fInv );
if ( p->ppCutsTemp[ iFan ] == NULL )
Vec_IntPushOrder( p->vTemp, iFan );
*Amap_ManCutNextP( pNew ) = p->ppCutsTemp[ iFan ];
@@ -198,7 +198,7 @@ void Amap_ManCutSaveStored( Amap_Man_t * p, Amap_Obj_t * pNode )
pNext->iMat = 0;
pNext->fInv = 0;
pNext->nFans = 1;
- pNext->Fans[0] = Amap_Var2Lit(pNode->Id, 0);
+ pNext->Fans[0] = Abc_Var2Lit(pNode->Id, 0);
pNext = (Amap_Cut_t *)(pBuffer + 2);
// add other cuts
nCuts2 = 1;
@@ -224,7 +224,7 @@ void Amap_ManCutSaveStored( Amap_Man_t * p, Amap_Obj_t * pNode )
if ( p->ppCutsTemp[i] != NULL )
printf( "Amap_ManCutSaveStored(): Error!\n" );
pNode->pData = (Amap_Cut_t *)pBuffer;
- pNode->nCuts = ABC_MIN( nCuts, nMaxCuts-1 );
+ pNode->nCuts = Abc_MinInt( nCuts, nMaxCuts-1 );
assert( nCuts < (1<<20) );
// printf("%d ", nCuts );
// verify cuts
@@ -263,8 +263,8 @@ int Amap_ManMergeCountCuts( Amap_Man_t * p, Amap_Obj_t * pNode )
{
iCompl0 = pCut0->fInv ^ Amap_ObjFaninC0(pNode);
iCompl1 = pCut1->fInv ^ Amap_ObjFaninC1(pNode);
- iFan0 = !pCut0->iMat? 0: Amap_Var2Lit( pCut0->iMat, iCompl0 );
- iFan1 = !pCut1->iMat? 0: Amap_Var2Lit( pCut1->iMat, iCompl1 );
+ iFan0 = !pCut0->iMat? 0: Abc_Var2Lit( pCut0->iMat, iCompl0 );
+ iFan1 = !pCut1->iMat? 0: Abc_Var2Lit( pCut1->iMat, iCompl1 );
Entry = Amap_LibFindNode( p->pLib, iFan0, iFan1, pNode->Type == AMAP_OBJ_XOR );
Counter += ( Entry >=0 );
// if ( Entry >=0 )
@@ -300,7 +300,7 @@ void Amap_ManPrintCuts( Amap_Obj_t * pNode )
{
printf( "%3d : Mat= %3d Inv=%d ", c, pCut->iMat, pCut->fInv );
for ( i = 0; i < (int)pCut->nFans; i++ )
- printf( "%d%c ", Amap_Lit2Var(pCut->Fans[i]), Amap_LitIsCompl(pCut->Fans[i])?'-':'+' );
+ printf( "%d%c ", Abc_Lit2Var(pCut->Fans[i]), Abc_LitIsCompl(pCut->Fans[i])?'-':'+' );
printf( "\n" );
}
}
@@ -356,7 +356,7 @@ int Amap_ManFindCut( Amap_Obj_t * pNode, Amap_Obj_t * pFanin, int fComplFanin, i
Amap_NodeForEachCut( pFanin, pCut, c )
{
iCompl = pCut->fInv ^ fComplFanin;
- iFan = !pCut->iMat? 0: Amap_Var2Lit( pCut->iMat, iCompl );
+ iFan = !pCut->iMat? 0: Abc_Var2Lit( pCut->iMat, iCompl );
if ( iFan == Val )
Vec_PtrPush( vCuts, pCut );
}
@@ -406,20 +406,20 @@ void Amap_ManMergeNodeCutsMux( Amap_Man_t * p, Amap_Obj_t * pNode )
continue;
// complement literals
if ( pCut0->nFans == 1 && (pCut0->fInv ^ fComplFanin0) )
- pCut0->Fans[0] = Amap_LitNot(pCut0->Fans[0]);
+ pCut0->Fans[0] = Abc_LitNot(pCut0->Fans[0]);
if ( pCut1->nFans == 1 && (pCut1->fInv ^ fComplFanin1) )
- pCut1->Fans[0] = Amap_LitNot(pCut1->Fans[0]);
+ pCut1->Fans[0] = Abc_LitNot(pCut1->Fans[0]);
if ( pCut2->nFans == 1 && (pCut2->fInv ^ fComplFanin2) )
- pCut2->Fans[0] = Amap_LitNot(pCut2->Fans[0]);
+ pCut2->Fans[0] = Abc_LitNot(pCut2->Fans[0]);
// create new cut
Amap_ManCutCreate3( p, pCut0, pCut1, pCut2, Vec_IntEntry(vRules, x+3) );
// uncomplement literals
if ( pCut0->nFans == 1 && (pCut0->fInv ^ fComplFanin0) )
- pCut0->Fans[0] = Amap_LitNot(pCut0->Fans[0]);
+ pCut0->Fans[0] = Abc_LitNot(pCut0->Fans[0]);
if ( pCut1->nFans == 1 && (pCut1->fInv ^ fComplFanin1) )
- pCut1->Fans[0] = Amap_LitNot(pCut1->Fans[0]);
+ pCut1->Fans[0] = Abc_LitNot(pCut1->Fans[0]);
if ( pCut2->nFans == 1 && (pCut2->fInv ^ fComplFanin2) )
- pCut2->Fans[0] = Amap_LitNot(pCut2->Fans[0]);
+ pCut2->Fans[0] = Abc_LitNot(pCut2->Fans[0]);
}
}
Amap_ManCutSaveStored( p, pNode );
@@ -457,10 +457,10 @@ void Amap_ManMergeNodeCuts( Amap_Man_t * p, Amap_Obj_t * pNode )
Amap_NodeForEachCut( pFanin0, pCut0, c )
{
iCompl0 = pCut0->fInv ^ Amap_ObjFaninC0(pNode);
- iFan0 = !pCut0->iMat? 0: Amap_Var2Lit( pCut0->iMat, iCompl0 );
+ iFan0 = !pCut0->iMat? 0: Abc_Var2Lit( pCut0->iMat, iCompl0 );
// complement literals
if ( pCut0->nFans == 1 && iCompl0 )
- pCut0->Fans[0] = Amap_LitNot(pCut0->Fans[0]);
+ pCut0->Fans[0] = Abc_LitNot(pCut0->Fans[0]);
// label resulting sets
for ( i = 0; (Entry = pRules[iFan0][i]); i++ )
p->pMatsTemp[Entry & 0xffff] = (Entry >> 16);
@@ -468,12 +468,12 @@ void Amap_ManMergeNodeCuts( Amap_Man_t * p, Amap_Obj_t * pNode )
Amap_NodeForEachCut( pFanin1, pCut1, k )
{
iCompl1 = pCut1->fInv ^ Amap_ObjFaninC1(pNode);
- iFan1 = !pCut1->iMat? 0: Amap_Var2Lit( pCut1->iMat, iCompl1 );
+ iFan1 = !pCut1->iMat? 0: Abc_Var2Lit( pCut1->iMat, iCompl1 );
if ( p->pMatsTemp[iFan1] == 0 )
continue;
// complement literals
if ( pCut1->nFans == 1 && iCompl1 )
- pCut1->Fans[0] = Amap_LitNot(pCut1->Fans[0]);
+ pCut1->Fans[0] = Abc_LitNot(pCut1->Fans[0]);
// create new cut
if ( iFan0 >= iFan1 )
Amap_ManCutCreate( p, pCut0, pCut1, p->pMatsTemp[iFan1] );
@@ -481,11 +481,11 @@ void Amap_ManMergeNodeCuts( Amap_Man_t * p, Amap_Obj_t * pNode )
Amap_ManCutCreate( p, pCut1, pCut0, p->pMatsTemp[iFan1] );
// uncomplement literals
if ( pCut1->nFans == 1 && iCompl1 )
- pCut1->Fans[0] = Amap_LitNot(pCut1->Fans[0]);
+ pCut1->Fans[0] = Abc_LitNot(pCut1->Fans[0]);
}
// uncomplement literals
if ( pCut0->nFans == 1 && iCompl0 )
- pCut0->Fans[0] = Amap_LitNot(pCut0->Fans[0]);
+ pCut0->Fans[0] = Abc_LitNot(pCut0->Fans[0]);
// label resulting sets
for ( i = 0; (Entry = pRules[iFan0][i]); i++ )
p->pMatsTemp[Entry & 0xffff] = 0;
diff --git a/src/map/amap/amapParse.c b/src/map/amap/amapParse.c
index 49c1eb66..6fa469a9 100644
--- a/src/map/amap/amapParse.c
+++ b/src/map/amap/amapParse.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "amapInt.h"
-#include "hop.h"
-#include "kit.h"
+#include "src/aig/hop/hop.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
@@ -437,8 +437,8 @@ int Amap_LibParseEquations( Amap_Lib_t * p, int fVerbose )
printf( "Skipping gate \"%s\" because its output \"%s\" does not depend on all input variables.\n", pGate->pName, pGate->pForm );
continue;
}
- pGate->pFunc = (unsigned *)Aig_MmFlexEntryFetch( p->pMemGates, sizeof(unsigned)*Aig_TruthWordNum(pGate->nPins) );
- memcpy( pGate->pFunc, pTruth, sizeof(unsigned)*Aig_TruthWordNum(pGate->nPins) );
+ pGate->pFunc = (unsigned *)Aig_MmFlexEntryFetch( p->pMemGates, sizeof(unsigned)*Abc_TruthWordNum(pGate->nPins) );
+ memcpy( pGate->pFunc, pTruth, sizeof(unsigned)*Abc_TruthWordNum(pGate->nPins) );
}
Vec_PtrFree( vNames );
Vec_IntFree( vTruth );
diff --git a/src/map/amap/amapPerm.c b/src/map/amap/amapPerm.c
index 71d4749a..0177a66c 100644
--- a/src/map/amap/amapPerm.c
+++ b/src/map/amap/amapPerm.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "amapInt.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
@@ -51,13 +51,13 @@ void Amap_LibCollectFanins_rec( Amap_Lib_t * pLib, Amap_Nod_t * pNod, Vec_Int_t
Vec_IntPush( vFanins, 0 );
return;
}
- pFan0 = Amap_LibNod( pLib, Amap_Lit2Var(pNod->iFan0) );
- if ( Amap_LitIsCompl(pNod->iFan0) || pFan0->Type != pNod->Type )
+ pFan0 = Amap_LibNod( pLib, Abc_Lit2Var(pNod->iFan0) );
+ if ( Abc_LitIsCompl(pNod->iFan0) || pFan0->Type != pNod->Type )
Vec_IntPush( vFanins, pNod->iFan0 );
else
Amap_LibCollectFanins_rec( pLib, pFan0, vFanins );
- pFan1 = Amap_LibNod( pLib, Amap_Lit2Var(pNod->iFan1) );
- if ( Amap_LitIsCompl(pNod->iFan1) || pFan1->Type != pNod->Type )
+ pFan1 = Amap_LibNod( pLib, Abc_Lit2Var(pNod->iFan1) );
+ if ( Abc_LitIsCompl(pNod->iFan1) || pFan1->Type != pNod->Type )
Vec_IntPush( vFanins, pNod->iFan1 );
else
Amap_LibCollectFanins_rec( pLib, pFan1, vFanins );
@@ -98,8 +98,8 @@ Vec_Int_t * Amap_LibDeriveGatePerm_rec( Amap_Lib_t * pLib, Kit_DsdNtk_t * pNtk,
Kit_DsdObj_t * pDsdObj, * pDsdFanin;
Amap_Nod_t * pNodFanin;
int iDsdFanin, iNodFanin, Value, iDsdLit, i, k, j;
- assert( !Kit_DsdLitIsCompl(iLit) );
- pDsdObj = Kit_DsdNtkObj( pNtk, Kit_DsdLit2Var(iLit) );
+ assert( !Abc_LitIsCompl(iLit) );
+ pDsdObj = Kit_DsdNtkObj( pNtk, Abc_Lit2Var(iLit) );
if ( pDsdObj == NULL )
{
vPerm = Vec_IntAlloc( 1 );
@@ -110,22 +110,22 @@ Vec_Int_t * Amap_LibDeriveGatePerm_rec( Amap_Lib_t * pLib, Kit_DsdNtk_t * pNtk,
{
vPerm = Vec_IntAlloc( 10 );
- iDsdFanin = Kit_DsdLitRegular(pDsdObj->pFans[0]);
- pNodFanin = Amap_LibNod( pLib, Amap_Lit2Var(pNod->iFan0) );
+ iDsdFanin = Abc_LitRegular(pDsdObj->pFans[0]);
+ pNodFanin = Amap_LibNod( pLib, Abc_Lit2Var(pNod->iFan0) );
vPermFanin = Amap_LibDeriveGatePerm_rec( pLib, pNtk, iDsdFanin, pNodFanin );
Vec_IntForEachEntry( vPermFanin, Value, k )
Vec_IntPush( vPerm, Value );
Vec_IntFree( vPermFanin );
- iDsdFanin = Kit_DsdLitRegular(pDsdObj->pFans[1]);
- pNodFanin = Amap_LibNod( pLib, Amap_Lit2Var(pNod->iFan1) );
+ iDsdFanin = Abc_LitRegular(pDsdObj->pFans[1]);
+ pNodFanin = Amap_LibNod( pLib, Abc_Lit2Var(pNod->iFan1) );
vPermFanin = Amap_LibDeriveGatePerm_rec( pLib, pNtk, iDsdFanin, pNodFanin );
Vec_IntForEachEntry( vPermFanin, Value, k )
Vec_IntPush( vPerm, Value );
Vec_IntFree( vPermFanin );
- iDsdFanin = Kit_DsdLitRegular(pDsdObj->pFans[2]);
- pNodFanin = Amap_LibNod( pLib, Amap_Lit2Var(pNod->iFan2) );
+ iDsdFanin = Abc_LitRegular(pDsdObj->pFans[2]);
+ pNodFanin = Amap_LibNod( pLib, Abc_Lit2Var(pNod->iFan2) );
vPermFanin = Amap_LibDeriveGatePerm_rec( pLib, pNtk, iDsdFanin, pNodFanin );
Vec_IntForEachEntry( vPermFanin, Value, k )
Vec_IntPush( vPerm, Value );
@@ -149,7 +149,7 @@ Vec_Int_t * Amap_LibDeriveGatePerm_rec( Amap_Lib_t * pLib, Kit_DsdNtk_t * pNtk,
vDsdLits = Vec_IntAlloc( 10 );
Kit_DsdObjForEachFaninReverse( pNtk, pDsdObj, iDsdFanin, i )
{
- pDsdFanin = Kit_DsdNtkObj( pNtk, Kit_DsdLit2Var(iDsdFanin) );
+ pDsdFanin = Kit_DsdNtkObj( pNtk, Abc_Lit2Var(iDsdFanin) );
if ( pDsdFanin )
pDsdFanin->fMark = 0;
else
@@ -166,10 +166,10 @@ Vec_Int_t * Amap_LibDeriveGatePerm_rec( Amap_Lib_t * pLib, Kit_DsdNtk_t * pNtk,
continue;
}
// find a matching component
- pNodFanin = Amap_LibNod( pLib, Amap_Lit2Var(iNodFanin) );
+ pNodFanin = Amap_LibNod( pLib, Abc_Lit2Var(iNodFanin) );
Kit_DsdObjForEachFaninReverse( pNtk, pDsdObj, iDsdFanin, i )
{
- pDsdFanin = Kit_DsdNtkObj( pNtk, Kit_DsdLit2Var(iDsdFanin) );
+ pDsdFanin = Kit_DsdNtkObj( pNtk, Abc_Lit2Var(iDsdFanin) );
if ( pDsdFanin == NULL )
continue;
if ( pDsdFanin->fMark == 1 )
@@ -178,7 +178,7 @@ Vec_Int_t * Amap_LibDeriveGatePerm_rec( Amap_Lib_t * pLib, Kit_DsdNtk_t * pNtk,
(pDsdFanin->Type == KIT_DSD_XOR && pNodFanin->Type == AMAP_OBJ_XOR) ||
(pDsdFanin->Type == KIT_DSD_PRIME && pNodFanin->Type == AMAP_OBJ_MUX)) )
continue;
- vPermFanin = Amap_LibDeriveGatePerm_rec( pLib, pNtk, Kit_DsdLitRegular(iDsdFanin), pNodFanin );
+ vPermFanin = Amap_LibDeriveGatePerm_rec( pLib, pNtk, Abc_LitRegular(iDsdFanin), pNodFanin );
if ( vPermFanin == NULL )
continue;
pDsdFanin->fMark = 1;
@@ -214,24 +214,24 @@ unsigned * Amap_LibVerifyPerm_rec( Amap_Lib_t * pLib, Amap_Nod_t * pNod,
assert( pNod->Type != AMAP_OBJ_MUX );
if ( pNod->Id == 0 )
return (unsigned *)Vec_PtrEntry( vTtElems, (*piInput)++ );
- pFan0 = Amap_LibNod( pLib, Amap_Lit2Var(pNod->iFan0) );
+ pFan0 = Amap_LibNod( pLib, Abc_Lit2Var(pNod->iFan0) );
pTruth0 = Amap_LibVerifyPerm_rec( pLib, pFan0, vTtElems, vTruth, nWords, piInput );
- pFan1 = Amap_LibNod( pLib, Amap_Lit2Var(pNod->iFan1) );
+ pFan1 = Amap_LibNod( pLib, Abc_Lit2Var(pNod->iFan1) );
pTruth1 = Amap_LibVerifyPerm_rec( pLib, pFan1, vTtElems, vTruth, nWords, piInput );
pTruth = Vec_IntFetch( vTruth, nWords );
if ( pNod->Type == AMAP_OBJ_XOR )
for ( i = 0; i < nWords; i++ )
pTruth[i] = pTruth0[i] ^ pTruth1[i];
- else if ( !Amap_LitIsCompl(pNod->iFan0) && !Amap_LitIsCompl(pNod->iFan1) )
+ else if ( !Abc_LitIsCompl(pNod->iFan0) && !Abc_LitIsCompl(pNod->iFan1) )
for ( i = 0; i < nWords; i++ )
pTruth[i] = pTruth0[i] & pTruth1[i];
- else if ( !Amap_LitIsCompl(pNod->iFan0) && Amap_LitIsCompl(pNod->iFan1) )
+ else if ( !Abc_LitIsCompl(pNod->iFan0) && Abc_LitIsCompl(pNod->iFan1) )
for ( i = 0; i < nWords; i++ )
pTruth[i] = pTruth0[i] & ~pTruth1[i];
- else if ( Amap_LitIsCompl(pNod->iFan0) && !Amap_LitIsCompl(pNod->iFan1) )
+ else if ( Abc_LitIsCompl(pNod->iFan0) && !Abc_LitIsCompl(pNod->iFan1) )
for ( i = 0; i < nWords; i++ )
pTruth[i] = ~pTruth0[i] & pTruth1[i];
- else // if ( Amap_LitIsCompl(pNod->iFan0) && Hop_ObjFaninC1(pObj) )
+ else // if ( Abc_LitIsCompl(pNod->iFan0) && Hop_ObjFaninC1(pObj) )
for ( i = 0; i < nWords; i++ )
pTruth[i] = ~pTruth0[i] & ~pTruth1[i];
return pTruth;
@@ -265,8 +265,8 @@ void Amap_LibVerifyPerm( Amap_Lib_t * pLib, Amap_Gat_t * pGate, Kit_DsdNtk_t * p
vTtElemsPol = Vec_PtrAlloc( pGate->nPins );
for ( i = 0; i < (int)pGate->nPins; i++ )
{
- pTruth = (unsigned *)Vec_PtrEntry( vTtElems, Amap_Lit2Var(pArray[i]) );
- if ( Amap_LitIsCompl( pArray[i] ) )
+ pTruth = (unsigned *)Vec_PtrEntry( vTtElems, Abc_Lit2Var(pArray[i]) );
+ if ( Abc_LitIsCompl( pArray[i] ) )
Kit_TruthNot( pTruth, pTruth, pGate->nPins );
Vec_PtrPush( vTtElemsPol, pTruth );
}
@@ -275,7 +275,7 @@ void Amap_LibVerifyPerm( Amap_Lib_t * pLib, Amap_Gat_t * pGate, Kit_DsdNtk_t * p
// compute the truth table recursively
pTruth = Amap_LibVerifyPerm_rec( pLib, pNod, vTtElemsPol, vTruth, nWords, &iInput );
assert( iInput == (int)pGate->nPins );
- if ( Kit_DsdLitIsCompl(pNtk->Root) )
+ if ( Abc_LitIsCompl(pNtk->Root) )
Kit_TruthNot( pTruth, pTruth, pGate->nPins );
//Extra_PrintBinary( stdout, pTruth, 4 ); printf("\n" );
//Extra_PrintBinary( stdout, pGate->pFunc, 4 ); printf("\n" );
@@ -304,14 +304,14 @@ int Amap_LibDeriveGatePerm( Amap_Lib_t * pLib, Amap_Gat_t * pGate, Kit_DsdNtk_t
int fVerbose = 0;
Vec_Int_t * vPerm;
int Entry, Entry2, i, k;
- vPerm = Amap_LibDeriveGatePerm_rec( pLib, pNtk, Kit_DsdLitRegular(pNtk->Root), pNod );
+ vPerm = Amap_LibDeriveGatePerm_rec( pLib, pNtk, Abc_LitRegular(pNtk->Root), pNod );
if ( vPerm == NULL )
return 0;
// check that the permutation is valid
assert( Vec_IntSize(vPerm) == (int)pNod->nSuppSize );
Vec_IntForEachEntry( vPerm, Entry, i )
Vec_IntForEachEntryStart( vPerm, Entry2, k, i+1 )
- if ( Amap_Lit2Var(Entry) == Amap_Lit2Var(Entry2) )
+ if ( Abc_Lit2Var(Entry) == Abc_Lit2Var(Entry2) )
{
Vec_IntFree( vPerm );
return 0;
@@ -321,9 +321,9 @@ int Amap_LibDeriveGatePerm( Amap_Lib_t * pLib, Amap_Gat_t * pGate, Kit_DsdNtk_t
Vec_IntForEachEntry( vPerm, Entry, i )
{
assert( Entry < 2 * (int)pNod->nSuppSize );
- pArray[Kit_DsdLit2Var(Entry)] = Amap_Var2Lit( i, Kit_DsdLitIsCompl(Entry) );
+ pArray[Abc_Lit2Var(Entry)] = Abc_Var2Lit( i, Abc_LitIsCompl(Entry) );
// pArray[i] = Entry;
-//printf( "%d=%d%c ", Kit_DsdLit2Var(Entry), i, Kit_DsdLitIsCompl(Entry)?'-':'+' );
+//printf( "%d=%d%c ", Abc_Lit2Var(Entry), i, Abc_LitIsCompl(Entry)?'-':'+' );
}
//printf( "\n" );
// if ( Kit_DsdNonDsdSizeMax(pNtk) < 3 )
@@ -334,7 +334,7 @@ int Amap_LibDeriveGatePerm( Amap_Lib_t * pLib, Amap_Gat_t * pGate, Kit_DsdNtk_t
{
printf( "node %4d : ", pNod->Id );
for ( i = 0; i < (int)pNod->nSuppSize; i++ )
- printf( "%d=%d%c ", i, Amap_Lit2Var(pArray[i]), Amap_LitIsCompl(pArray[i])?'-':'+' );
+ printf( "%d=%d%c ", i, Abc_Lit2Var(pArray[i]), Abc_LitIsCompl(pArray[i])?'-':'+' );
printf( "\n" );
}
return 1;
diff --git a/src/map/amap/amapRead.c b/src/map/amap/amapRead.c
index 77292099..5776c3ff 100644
--- a/src/map/amap/amapRead.c
+++ b/src/map/amap/amapRead.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "amapInt.h"
-#include "ioAbc.h"
+#include "src/base/io/ioAbc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/amap/amapRule.c b/src/map/amap/amapRule.c
index 8308a197..0f6c7708 100644
--- a/src/map/amap/amapRule.c
+++ b/src/map/amap/amapRule.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "amapInt.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
@@ -59,7 +59,7 @@ Vec_Int_t * Amap_CreateRulesPrime( Amap_Lib_t * p, Vec_Int_t * vNods0, Vec_Int_t
iNod = Amap_LibFindMux( p, iNod0, iNod1, iNod2 );
if ( iNod == -1 )
iNod = Amap_LibCreateMux( p, iNod0, iNod1, iNod2 );
- Vec_IntPush( vRes, Amap_Var2Lit(iNod, 0) );
+ Vec_IntPush( vRes, Abc_Var2Lit(iNod, 0) );
}
return vRes;
}
@@ -84,7 +84,7 @@ void Amap_CreateRulesTwo( Amap_Lib_t * p, Vec_Int_t * vNods, Vec_Int_t * vNods0,
iNod = Amap_LibFindNode( p, iNod0, iNod1, fXor );
if ( iNod == -1 )
iNod = Amap_LibCreateNode( p, iNod0, iNod1, fXor );
- Vec_IntPushUnique( vNods, Amap_Var2Lit(iNod, 0) );
+ Vec_IntPushUnique( vNods, Abc_Var2Lit(iNod, 0) );
}
}
@@ -196,20 +196,20 @@ Vec_Int_t * Amap_CreateRulesFromDsd_rec( Amap_Lib_t * pLib, Kit_DsdNtk_t * p, in
Kit_DsdObj_t * pObj;
unsigned i;
int iFanin, iNod, k;
- assert( !Kit_DsdLitIsCompl(iLit) );
- pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
+ assert( !Abc_LitIsCompl(iLit) );
+ pObj = Kit_DsdNtkObj( p, Abc_Lit2Var(iLit) );
if ( pObj == NULL )
return Vec_IntStartNatural( 1 );
// solve for the inputs
vVecNods = Vec_PtrAlloc( pObj->nFans );
Kit_DsdObjForEachFanin( p, pObj, iFanin, i )
{
- vNodsFanin = Amap_CreateRulesFromDsd_rec( pLib, p, Kit_DsdLitRegular(iFanin) );
- if ( Kit_DsdLitIsCompl(iFanin) )
+ vNodsFanin = Amap_CreateRulesFromDsd_rec( pLib, p, Abc_LitRegular(iFanin) );
+ if ( Abc_LitIsCompl(iFanin) )
{
Vec_IntForEachEntry( vNodsFanin, iNod, k )
if ( iNod > 0 )
- Vec_IntWriteEntry( vNodsFanin, k, Amap_LitNot(iNod) );
+ Vec_IntWriteEntry( vNodsFanin, k, Abc_LitNot(iNod) );
}
Vec_PtrPush( vVecNods, vNodsFanin );
}
@@ -247,13 +247,13 @@ Vec_Int_t * Amap_CreateRulesFromDsd( Amap_Lib_t * pLib, Kit_DsdNtk_t * p )
Vec_Int_t * vNods;
int iNod, i;
assert( p->nVars >= 2 );
- vNods = Amap_CreateRulesFromDsd_rec( pLib, p, Kit_DsdLitRegular(p->Root) );
+ vNods = Amap_CreateRulesFromDsd_rec( pLib, p, Abc_LitRegular(p->Root) );
if ( vNods == NULL )
return NULL;
- if ( Kit_DsdLitIsCompl(p->Root) )
+ if ( Abc_LitIsCompl(p->Root) )
{
Vec_IntForEachEntry( vNods, iNod, i )
- Vec_IntWriteEntry( vNods, i, Amap_LitNot(iNod) );
+ Vec_IntWriteEntry( vNods, i, Abc_LitNot(iNod) );
}
return vNods;
}
@@ -298,12 +298,12 @@ Kit_DsdPrint( stdout, pNtk );
Vec_IntForEachEntry( vNods, iNod, i )
{
assert( iNod > 1 );
- pNod = Amap_LibNod( pLib, Amap_Lit2Var(iNod) );
+ pNod = Amap_LibNod( pLib, Abc_Lit2Var(iNod) );
// assert( pNod->Type == AMAP_OBJ_MUX || pNod->nSuppSize == pGate->nPins );
pSet = (Amap_Set_t *)Aig_MmFlexEntryFetch( pLib->pMemSet, sizeof(Amap_Set_t) );
memset( pSet, 0, sizeof(Amap_Set_t) );
pSet->iGate = pGate->Id;
- pSet->fInv = Amap_LitIsCompl(iNod);
+ pSet->fInv = Abc_LitIsCompl(iNod);
pSet->nIns = pGate->nPins;
if ( Amap_LibDeriveGatePerm( pLib, pGate, pNtk, pNod, pSet->Ins ) == 0 )
{
diff --git a/src/map/amap/amapUniq.c b/src/map/amap/amapUniq.c
index a2375389..dd858c96 100644
--- a/src/map/amap/amapUniq.c
+++ b/src/map/amap/amapUniq.c
@@ -198,14 +198,14 @@ int Amap_LibCreateNode( Amap_Lib_t * p, int iFan0, int iFan1, int fXor )
}
pNode = Amap_LibCreateObj( p );
pNode->Type = fXor? AMAP_OBJ_XOR : AMAP_OBJ_AND;
- pNode->nSuppSize = p->pNodes[Amap_Lit2Var(iFan0)].nSuppSize + p->pNodes[Amap_Lit2Var(iFan1)].nSuppSize;
+ pNode->nSuppSize = p->pNodes[Abc_Lit2Var(iFan0)].nSuppSize + p->pNodes[Abc_Lit2Var(iFan1)].nSuppSize;
pNode->iFan0 = iFan0;
pNode->iFan1 = iFan1;
if ( p->fVerbose )
printf( "Creating node %5d %c : iFan0 = %5d%c iFan1 = %5d%c\n",
pNode->Id, (fXor?'x':' '),
-Amap_Lit2Var(iFan0), (Amap_LitIsCompl(iFan0)?'-':'+'),
-Amap_Lit2Var(iFan1), (Amap_LitIsCompl(iFan1)?'-':'+') );
+Abc_Lit2Var(iFan0), (Abc_LitIsCompl(iFan0)?'-':'+'),
+Abc_Lit2Var(iFan1), (Abc_LitIsCompl(iFan1)?'-':'+') );
if ( fXor )
{
@@ -246,16 +246,16 @@ int Amap_LibCreateMux( Amap_Lib_t * p, int iFan0, int iFan1, int iFan2 )
Amap_Nod_t * pNode;
pNode = Amap_LibCreateObj( p );
pNode->Type = AMAP_OBJ_MUX;
- pNode->nSuppSize = p->pNodes[Amap_Lit2Var(iFan0)].nSuppSize + p->pNodes[Amap_Lit2Var(iFan1)].nSuppSize + p->pNodes[Amap_Lit2Var(iFan2)].nSuppSize;
+ pNode->nSuppSize = p->pNodes[Abc_Lit2Var(iFan0)].nSuppSize + p->pNodes[Abc_Lit2Var(iFan1)].nSuppSize + p->pNodes[Abc_Lit2Var(iFan2)].nSuppSize;
pNode->iFan0 = iFan0;
pNode->iFan1 = iFan1;
pNode->iFan2 = iFan2;
if ( p->fVerbose )
printf( "Creating node %5d %c : iFan0 = %5d%c iFan1 = %5d%c iFan2 = %5d%c\n",
pNode->Id, 'm',
-Amap_Lit2Var(iFan0), (Amap_LitIsCompl(iFan0)?'-':'+'),
-Amap_Lit2Var(iFan1), (Amap_LitIsCompl(iFan1)?'-':'+'),
-Amap_Lit2Var(iFan2), (Amap_LitIsCompl(iFan2)?'-':'+') );
+Abc_Lit2Var(iFan0), (Abc_LitIsCompl(iFan0)?'-':'+'),
+Abc_Lit2Var(iFan1), (Abc_LitIsCompl(iFan1)?'-':'+'),
+Abc_Lit2Var(iFan2), (Abc_LitIsCompl(iFan2)?'-':'+') );
Vec_IntPush( p->vRules3, iFan0 );
Vec_IntPush( p->vRules3, iFan1 );
diff --git a/src/map/cov/cov.h b/src/map/cov/cov.h
index 80ef1925..135fee8c 100644
--- a/src/map/cov/cov.h
+++ b/src/map/cov/cov.h
@@ -18,11 +18,10 @@
***********************************************************************/
-#ifndef __COV_H__
-#define __COV_H__
+#ifndef ABC__map__cov__cov_h
+#define ABC__map__cov__cov_h
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "covInt.h"
diff --git a/src/map/cov/covCore.c b/src/map/cov/covCore.c
index a53f6b49..b128ed65 100644
--- a/src/map/cov/covCore.c
+++ b/src/map/cov/covCore.c
@@ -447,7 +447,7 @@ int Abc_NodeCovPropagate( Cov_Man_t * p, Abc_Obj_t * pObj )
// count statistics
p->nSupps++;
- p->nSuppsMax = ABC_MAX( p->nSuppsMax, p->nSupps );
+ p->nSuppsMax = Abc_MaxInt( p->nSuppsMax, p->nSupps );
return 1;
}
@@ -732,7 +732,7 @@ int Abc_NodeCovPropagateEsop( Cov_Man_t * p, Abc_Obj_t * pObj, Abc_Obj_t * pObj0
// count statistics
p->nSupps++;
- p->nSuppsMax = ABC_MAX( p->nSuppsMax, p->nSupps );
+ p->nSuppsMax = Abc_MaxInt( p->nSuppsMax, p->nSupps );
// set the covers
assert( Abc_ObjGetSupp(pObj) == NULL );
@@ -835,7 +835,7 @@ int Abc_NodeCovPropagateSop( Cov_Man_t * p, Abc_Obj_t * pObj, Abc_Obj_t * pObj0,
// count statistics
p->nSupps++;
- p->nSuppsMax = ABC_MAX( p->nSuppsMax, p->nSupps );
+ p->nSuppsMax = Abc_MaxInt( p->nSuppsMax, p->nSupps );
// set the covers
assert( Abc_ObjGetSupp(pObj) == NULL );
diff --git a/src/map/cov/covInt.h b/src/map/cov/covInt.h
index 73c6bc20..5a75a8f3 100644
--- a/src/map/cov/covInt.h
+++ b/src/map/cov/covInt.h
@@ -18,11 +18,10 @@
***********************************************************************/
-#ifndef __COV_INT_H__
-#define __COV_INT_H__
+#ifndef ABC__map__cov__covInt_h
+#define ABC__map__cov__covInt_h
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/map/fpga/fpga.c b/src/map/fpga/fpga.c
index 08adb52e..94a84ffd 100644
--- a/src/map/fpga/fpga.c
+++ b/src/map/fpga/fpga.c
@@ -17,7 +17,7 @@
***********************************************************************/
#include "fpgaInt.h"
-#include "main.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/fpga/fpga.h b/src/map/fpga/fpga.h
index 082e6635..b63d2448 100644
--- a/src/map/fpga/fpga.h
+++ b/src/map/fpga/fpga.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __FPGA_H__
-#define __FPGA_H__
+#ifndef ABC__map__fpga__fpga_h
+#define ABC__map__fpga__fpga_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/map/fpga/fpgaCreate.c b/src/map/fpga/fpgaCreate.c
index 168b69c6..64f6d750 100644
--- a/src/map/fpga/fpgaCreate.c
+++ b/src/map/fpga/fpgaCreate.c
@@ -17,7 +17,7 @@
***********************************************************************/
#include "fpgaInt.h"
-#include "main.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
@@ -346,7 +346,7 @@ Fpga_Node_t * Fpga_NodeCreate( Fpga_Man_t * p, Fpga_Node_t * p1, Fpga_Node_t * p
void Fpga_TableCreate( Fpga_Man_t * pMan )
{
assert( pMan->pBins == NULL );
- pMan->nBins = Cudd_Prime(50000);
+ pMan->nBins = Abc_PrimeCudd(50000);
pMan->pBins = ABC_ALLOC( Fpga_Node_t *, pMan->nBins );
memset( pMan->pBins, 0, sizeof(Fpga_Node_t *) * pMan->nBins );
pMan->nNodes = 0;
@@ -430,7 +430,7 @@ void Fpga_TableResize( Fpga_Man_t * pMan )
clk = clock();
// get the new table size
- nBinsNew = Cudd_Prime(2 * pMan->nBins);
+ nBinsNew = Abc_PrimeCudd(2 * pMan->nBins);
// allocate a new array
pBinsNew = ABC_ALLOC( Fpga_Node_t *, nBinsNew );
memset( pBinsNew, 0, sizeof(Fpga_Node_t *) * nBinsNew );
diff --git a/src/map/fpga/fpgaCut.c b/src/map/fpga/fpgaCut.c
index 5f46be18..2e9ea77e 100644
--- a/src/map/fpga/fpgaCut.c
+++ b/src/map/fpga/fpgaCut.c
@@ -918,7 +918,7 @@ Fpga_CutTable_t * Fpga_CutTableStart( Fpga_Man_t * pMan )
// allocate the table
p = ABC_ALLOC( Fpga_CutTable_t, 1 );
memset( p, 0, sizeof(Fpga_CutTable_t) );
- p->nBins = Cudd_Prime( 10 * FPGA_CUTS_MAX_COMPUTE );
+ p->nBins = Abc_PrimeCudd( 10 * FPGA_CUTS_MAX_COMPUTE );
p->pBins = ABC_ALLOC( Fpga_Cut_t *, p->nBins );
memset( p->pBins, 0, sizeof(Fpga_Cut_t *) * p->nBins );
p->pCuts = ABC_ALLOC( int, 2 * FPGA_CUTS_MAX_COMPUTE );
diff --git a/src/map/fpga/fpgaInt.h b/src/map/fpga/fpgaInt.h
index 26de9b80..c9272154 100644
--- a/src/map/fpga/fpgaInt.h
+++ b/src/map/fpga/fpgaInt.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __FPGA_INT_H__
-#define __FPGA_INT_H__
+#ifndef ABC__map__fpga__fpgaInt_h
+#define ABC__map__fpga__fpgaInt_h
////////////////////////////////////////////////////////////////////////
@@ -27,7 +27,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "extra.h"
+#include "src/misc/extra/extra.h"
#include "fpga.h"
ABC_NAMESPACE_HEADER_START
@@ -378,9 +378,6 @@ extern int Fpga_MappingMaxLevel( Fpga_Man_t * pMan );
extern void Fpga_ManReportChoices( Fpga_Man_t * pMan );
extern void Fpga_MappingSetChoiceLevels( Fpga_Man_t * pMan );
-/*=== CUDD package.c ===============================================================*/
-extern unsigned int Cudd_Prime( unsigned int p );
-
ABC_NAMESPACE_HEADER_END
diff --git a/src/map/fpga/fpgaTruth.c b/src/map/fpga/fpgaTruth.c
index d37ff81d..d41b1184 100644
--- a/src/map/fpga/fpgaTruth.c
+++ b/src/map/fpga/fpgaTruth.c
@@ -17,7 +17,7 @@
***********************************************************************/
#include "fpgaInt.h"
-#include "cudd.h"
+#include "src/bdd/cudd/cudd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/if/if.h b/src/map/if/if.h
index 9f04902b..09be93e0 100644
--- a/src/map/if/if.h
+++ b/src/map/if/if.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __IF_H__
-#define __IF_H__
+#ifndef ABC__map__if__if_h
+#define ABC__map__if__if_h
////////////////////////////////////////////////////////////////////////
@@ -31,9 +31,9 @@
#include <string.h>
#include <assert.h>
#include <time.h>
-#include "vec.h"
-#include "mem.h"
-#include "tim.h"
+#include "src/misc/vec/vec.h"
+#include "src/misc/mem/mem.h"
+#include "src/misc/tim/tim.h"
diff --git a/src/map/if/ifDec07.c b/src/map/if/ifDec07.c
index 41949a2f..074ac6ef 100644
--- a/src/map/if/ifDec07.c
+++ b/src/map/if/ifDec07.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "if.h"
-#include "extra.h"
-#include "kit.h"
+#include "src/misc/extra/extra.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/if/ifDec08.c b/src/map/if/ifDec08.c
index 06081414..54eff63e 100644
--- a/src/map/if/ifDec08.c
+++ b/src/map/if/ifDec08.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "if.h"
-#include "extra.h"
-#include "kit.h"
+#include "src/misc/extra/extra.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/if/ifDec10.c b/src/map/if/ifDec10.c
index 9280e193..01aa32ae 100644
--- a/src/map/if/ifDec10.c
+++ b/src/map/if/ifDec10.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "if.h"
-#include "extra.h"
-#include "kit.h"
+#include "src/misc/extra/extra.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/if/ifDec16.c b/src/map/if/ifDec16.c
index 5972c2ea..c1e87aaa 100644
--- a/src/map/if/ifDec16.c
+++ b/src/map/if/ifDec16.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "if.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/if/ifTime.c b/src/map/if/ifTime.c
index b901a363..b5e2a3d0 100644
--- a/src/map/if/ifTime.c
+++ b/src/map/if/ifTime.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "if.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
@@ -143,7 +143,7 @@ If_And_t If_CutDelaySopCube( Vec_Wrd_t * vCube, Vec_Wrd_t * vAnds, int fOrGate )
Next.fCompl1 = This.fCompl ^ fOrGate;
Next.Id = Vec_WrdSize(vAnds);
Next.fCompl = fOrGate;
- Next.Delay = 1 + ABC_MAX( This.Delay, Prev.Delay );
+ Next.Delay = 1 + Abc_MaxInt( This.Delay, Prev.Delay );
// add new
If_AndInsertSorted( vCube, Next );
Vec_WrdPush( vAnds, If_AndToWrd(Next) );
@@ -313,7 +313,7 @@ int If_CutDelayLeafDepth_rec( Vec_Wrd_t * vAnds, If_And_t And, int iLeaf )
return -IF_BIG_CHAR;
Depth0 = If_CutDelayLeafDepth_rec( vAnds, If_WrdToAnd(Vec_WrdEntry(vAnds, And.iFan0)), iLeaf );
Depth1 = If_CutDelayLeafDepth_rec( vAnds, If_WrdToAnd(Vec_WrdEntry(vAnds, And.iFan1)), iLeaf );
- Depth = ABC_MAX( Depth0, Depth1 );
+ Depth = Abc_MaxInt( Depth0, Depth1 );
Depth = (Depth == -IF_BIG_CHAR) ? -IF_BIG_CHAR : Depth + 1;
return Depth;
}
diff --git a/src/map/mapper/mapper.c b/src/map/mapper/mapper.c
index f13a7641..87a0d4b8 100644
--- a/src/map/mapper/mapper.c
+++ b/src/map/mapper/mapper.c
@@ -16,9 +16,9 @@
***********************************************************************/
-#include "abc.h"
-#include "mainInt.h"
-#include "mio.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/mainInt.h"
+#include "src/map/mio/mio.h"
#include "mapperInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/mapper/mapper.h b/src/map/mapper/mapper.h
index aaad08ee..3fd5fd9e 100644
--- a/src/map/mapper/mapper.h
+++ b/src/map/mapper/mapper.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __MAPPER_H__
-#define __MAPPER_H__
+#ifndef ABC__map__mapper__mapper_h
+#define ABC__map__mapper__mapper_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/map/mapper/mapperCreate.c b/src/map/mapper/mapperCreate.c
index af1a858f..73ccdb19 100644
--- a/src/map/mapper/mapperCreate.c
+++ b/src/map/mapper/mapperCreate.c
@@ -390,7 +390,7 @@ Map_Node_t * Map_NodeCreate( Map_Man_t * p, Map_Node_t * p1, Map_Node_t * p2 )
void Map_TableCreate( Map_Man_t * pMan )
{
assert( pMan->pBins == NULL );
- pMan->nBins = Cudd_Prime(5000);
+ pMan->nBins = Abc_PrimeCudd(5000);
pMan->pBins = ABC_ALLOC( Map_Node_t *, pMan->nBins );
memset( pMan->pBins, 0, sizeof(Map_Node_t *) * pMan->nBins );
pMan->nNodes = 0;
@@ -474,7 +474,7 @@ void Map_TableResize( Map_Man_t * pMan )
clk = clock();
// get the new table size
- nBinsNew = Cudd_Prime(2 * pMan->nBins);
+ nBinsNew = Abc_PrimeCudd(2 * pMan->nBins);
// allocate a new array
pBinsNew = ABC_ALLOC( Map_Node_t *, nBinsNew );
memset( pBinsNew, 0, sizeof(Map_Node_t *) * nBinsNew );
diff --git a/src/map/mapper/mapperCut.c b/src/map/mapper/mapperCut.c
index e0afa792..29861531 100644
--- a/src/map/mapper/mapperCut.c
+++ b/src/map/mapper/mapperCut.c
@@ -814,7 +814,7 @@ Map_CutTable_t * Map_CutTableStart( Map_Man_t * pMan )
// allocate the table
p = ABC_ALLOC( Map_CutTable_t, 1 );
memset( p, 0, sizeof(Map_CutTable_t) );
- p->nBins = Cudd_Prime( 10 * MAP_CUTS_MAX_COMPUTE );
+ p->nBins = Abc_PrimeCudd( 10 * MAP_CUTS_MAX_COMPUTE );
p->pBins = ABC_ALLOC( Map_Cut_t *, p->nBins );
memset( p->pBins, 0, sizeof(Map_Cut_t *) * p->nBins );
p->pCuts = ABC_ALLOC( int, 2 * MAP_CUTS_MAX_COMPUTE );
diff --git a/src/map/mapper/mapperInt.h b/src/map/mapper/mapperInt.h
index ac8110fc..08a27e68 100644
--- a/src/map/mapper/mapperInt.h
+++ b/src/map/mapper/mapperInt.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __MAPPER_INT_H__
-#define __MAPPER_INT_H__
+#ifndef ABC__map__mapper__mapperInt_h
+#define ABC__map__mapper__mapperInt_h
////////////////////////////////////////////////////////////////////////
@@ -28,10 +28,10 @@
#include <stdlib.h>
#include <string.h>
#include <float.h>
-#include "main.h"
-#include "mio.h"
+#include "src/base/main/main.h"
+#include "src/map/mio/mio.h"
#include "mapper.h"
-#include "cuddInt.h"
+#include "src/misc/extra/extraBdd.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/map/mapper/mapperTable.c b/src/map/mapper/mapperTable.c
index 2120b5ce..7e12d8dc 100644
--- a/src/map/mapper/mapperTable.c
+++ b/src/map/mapper/mapperTable.c
@@ -53,7 +53,7 @@ Map_HashTable_t * Map_SuperTableCreate( Map_SuperLib_t * pLib )
memset( p, 0, sizeof(Map_HashTable_t) );
p->mmMan = pLib->mmEntries;
// allocate and clean the bins
- p->nBins = Cudd_Prime(20000);
+ p->nBins = Abc_PrimeCudd(20000);
p->pBins = ABC_ALLOC( Map_HashEntry_t *, p->nBins );
memset( p->pBins, 0, sizeof(Map_HashEntry_t *) * p->nBins );
return p;
@@ -237,7 +237,7 @@ void Map_SuperTableResize( Map_HashTable_t * p )
int nBinsNew, Counter, i;
unsigned Key;
// get the new table size
- nBinsNew = Cudd_Prime(2 * p->nBins);
+ nBinsNew = Abc_PrimeCudd(2 * p->nBins);
// allocate a new array
pBinsNew = ABC_ALLOC( Map_HashEntry_t *, nBinsNew );
memset( pBinsNew, 0, sizeof(Map_HashEntry_t *) * nBinsNew );
diff --git a/src/map/mio/exp.h b/src/map/mio/exp.h
index fa643325..40dff2e8 100644
--- a/src/map/mio/exp.h
+++ b/src/map/mio/exp.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __EXP_H__
-#define __EXP_H__
+#ifndef ABC__map__mio__exp_h
+#define ABC__map__mio__exp_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
diff --git a/src/map/mio/mio.c b/src/map/mio/mio.c
index a034e549..f7eddab2 100644
--- a/src/map/mio/mio.c
+++ b/src/map/mio/mio.c
@@ -22,10 +22,10 @@
#include <unistd.h>
#endif
-#include "main.h"
+#include "src/base/main/main.h"
#include "mio.h"
-#include "mapper.h"
-#include "amap.h"
+#include "src/map/mapper/mapper.h"
+#include "src/map/amap/amap.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/mio/mio.h b/src/map/mio/mio.h
index de35b637..a31e2e2b 100644
--- a/src/map/mio/mio.h
+++ b/src/map/mio/mio.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __MIO_H__
-#define __MIO_H__
+#ifndef ABC__map__mio__mio_h
+#define ABC__map__mio__mio_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/map/mio/mioForm.c b/src/map/mio/mioForm.c
index 5c7a48e6..b3b962c0 100644
--- a/src/map/mio/mioForm.c
+++ b/src/map/mio/mioForm.c
@@ -17,7 +17,7 @@
***********************************************************************/
#include "mioInt.h"
-#include "parse.h"
+#include "bdd/parse/parse.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/mio/mioInt.h b/src/map/mio/mioInt.h
index 0752e29a..02f081fa 100644
--- a/src/map/mio/mioInt.h
+++ b/src/map/mio/mioInt.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __MIO_INT_H__
-#define __MIO_INT_H__
+#ifndef ABC__map__mio__mioInt_h
+#define ABC__map__mio__mioInt_h
////////////////////////////////////////////////////////////////////////
@@ -28,9 +28,9 @@
#include <stdlib.h>
#include <string.h>
#include <assert.h>
-#include "vec.h"
-#include "mem.h"
-#include "st.h"
+#include "src/misc/vec/vec.h"
+#include "src/misc/mem/mem.h"
+#include "src/misc/st/st.h"
#include "mio.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/map/mio/mioRead.c b/src/map/mio/mioRead.c
index dd57d766..ccbc0ac6 100644
--- a/src/map/mio/mioRead.c
+++ b/src/map/mio/mioRead.c
@@ -18,7 +18,7 @@
#include <ctype.h>
#include "mioInt.h"
-#include "ioAbc.h"
+#include "src/base/io/ioAbc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/mio/mioUtils.c b/src/map/mio/mioUtils.c
index 09f1ec96..d9447085 100644
--- a/src/map/mio/mioUtils.c
+++ b/src/map/mio/mioUtils.c
@@ -17,7 +17,7 @@
***********************************************************************/
#include "mioInt.h"
-#include "main.h"
+#include "src/base/main/main.h"
#include "exp.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/super/super.c b/src/map/super/super.c
index 2cc52a44..2cbf0718 100644
--- a/src/map/super/super.c
+++ b/src/map/super/super.c
@@ -17,8 +17,8 @@
***********************************************************************/
#include "superInt.h"
-#include "mainInt.h"
-#include "mio.h"
+#include "src/base/main/mainInt.h"
+#include "src/map/mio/mio.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/super/super.h b/src/map/super/super.h
index 246ea092..e2af9a85 100644
--- a/src/map/super/super.h
+++ b/src/map/super/super.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __SUPER_H__
-#define __SUPER_H__
+#ifndef ABC__map__super__super_h
+#define ABC__map__super__super_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/map/super/superInt.h b/src/map/super/superInt.h
index 0d4215ff..63df0f38 100644
--- a/src/map/super/superInt.h
+++ b/src/map/super/superInt.h
@@ -16,19 +16,19 @@
***********************************************************************/
-#ifndef __super_INT_H__
-#define __super_INT_H__
+#ifndef ABC__map__super__superInt_h
+#define ABC__map__super__superInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "abc.h"
-#include "mainInt.h"
-#include "mvc.h"
-#include "mio.h"
-#include "stmm.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/mainInt.h"
+#include "src/misc/mvc/mvc.h"
+#include "src/map/mio/mio.h"
+#include "src/misc/st/stmm.h"
#include "super.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/misc/avl/avl.h b/src/misc/avl/avl.h
index 50a06b69..141e4f56 100644
--- a/src/misc/avl/avl.h
+++ b/src/misc/avl/avl.h
@@ -7,8 +7,8 @@
* $Date: 1994/07/15 23:00:40 $
*
*/
-#ifndef AVL_INCLUDED
-#define AVL_INCLUDED
+#ifndef ABC__misc__avl__avl_h
+#define ABC__misc__avl__avl_h
ABC_NAMESPACE_HEADER_START
diff --git a/src/aig/bar/bar.c b/src/misc/bar/bar.c
index b5c31779..565a969e 100644
--- a/src/aig/bar/bar.c
+++ b/src/misc/bar/bar.c
@@ -22,8 +22,8 @@
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
-#include "main.h"
+#include "src/misc/util/abc_global.h"
+#include "src/base/main/main.h"
#include "bar.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/bar/bar.h b/src/misc/bar/bar.h
index 65c9ec6a..c66e302e 100644
--- a/src/aig/bar/bar.h
+++ b/src/misc/bar/bar.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __BAR_H__
-#define __BAR_H__
+#ifndef ABC__aig__bar__bar_h
+#define ABC__aig__bar__bar_h
#ifdef _WIN32
diff --git a/src/misc/bar/module.make b/src/misc/bar/module.make
new file mode 100644
index 00000000..7234e386
--- /dev/null
+++ b/src/misc/bar/module.make
@@ -0,0 +1 @@
+SRC += src/misc/bar/bar.c
diff --git a/src/aig/bbl/bblif.c b/src/misc/bbl/bblif.c
index e68258d9..fc227760 100644
--- a/src/aig/bbl/bblif.c
+++ b/src/misc/bbl/bblif.c
@@ -24,7 +24,7 @@
#include <assert.h>
#include <time.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "bblif.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/bbl/bblif.h b/src/misc/bbl/bblif.h
index 787d649f..b4859370 100644
--- a/src/aig/bbl/bblif.h
+++ b/src/misc/bbl/bblif.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __BBLIF_H__
-#define __BBLIF_H__
+#ifndef ABC__aig__bbl__bblif_h
+#define ABC__aig__bbl__bblif_h
/*
diff --git a/src/misc/bbl/module.make b/src/misc/bbl/module.make
new file mode 100644
index 00000000..187e570b
--- /dev/null
+++ b/src/misc/bbl/module.make
@@ -0,0 +1 @@
+SRC += src/misc/bbl/bblif.c
diff --git a/src/misc/bzlib/bzlib.h b/src/misc/bzlib/bzlib.h
index 68a6cd01..30487828 100644
--- a/src/misc/bzlib/bzlib.h
+++ b/src/misc/bzlib/bzlib.h
@@ -24,8 +24,8 @@
#endif
#endif
-#ifndef _BZLIB_H
-#define _BZLIB_H
+#ifndef ABC__misc__bzlib__bzlib_h
+#define ABC__misc__bzlib__bzlib_h
#define BZ_RUN 0
#define BZ_FLUSH 1
@@ -96,7 +96,7 @@ typedef
#endif
#include <stdio.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/misc/bzlib/bzlib_private.h b/src/misc/bzlib/bzlib_private.h
index 072f0486..229ed386 100644
--- a/src/misc/bzlib/bzlib_private.h
+++ b/src/misc/bzlib/bzlib_private.h
@@ -19,8 +19,8 @@
------------------------------------------------------------------ */
-#ifndef _BZLIB_PRIVATE_H
-#define _BZLIB_PRIVATE_H
+#ifndef ABC__misc__bzlib__bzlib_private_h
+#define ABC__misc__bzlib__bzlib_private_h
#include <stdlib.h>
diff --git a/src/misc/espresso/espresso.h b/src/misc/espresso/espresso.h
index 27d1c124..8b54fab5 100644
--- a/src/misc/espresso/espresso.h
+++ b/src/misc/espresso/espresso.h
@@ -18,7 +18,7 @@
#include "util_hack.h" // added
-#define ptime() util_cpu_time()
+#define ABC__misc__espresso__espresso_h
#define print_time(t) util_print_time(t)
#ifdef IBM_WATC
@@ -55,7 +55,7 @@
/* Define host machine characteristics of "unsigned int" */
-#ifndef BPI
+#ifndef ABC__misc__espresso__espresso_h
#define BPI
diff --git a/src/misc/espresso/main.c b/src/misc/espresso/main.c
index 157ef5a0..76c5fb79 100644
--- a/src/misc/espresso/main.c
+++ b/src/misc/espresso/main.c
@@ -14,7 +14,7 @@
*/
#include "espresso.h"
-#include "main.h"
+#include "base/main/main.h"
ABC_NAMESPACE_IMPL_START
/* table definitions for options */
diff --git a/src/misc/espresso/mincov_int.h b/src/misc/espresso/mincov_int.h
index e81850f2..4b61be17 100644
--- a/src/misc/espresso/mincov_int.h
+++ b/src/misc/espresso/mincov_int.h
@@ -52,4 +52,4 @@ extern solution_t *sm_mincov();
extern int gimpel_reduce();
-#define WEIGHT(weight, col) (weight == NIL(int) ? 1 : weight[col])
+#define ABC__misc__espresso__mincov_int_h
diff --git a/src/misc/espresso/sparse.h b/src/misc/espresso/sparse.h
index 9a15fc65..dda0a7ed 100644
--- a/src/misc/espresso/sparse.h
+++ b/src/misc/espresso/sparse.h
@@ -7,8 +7,8 @@
* $Date$
*
*/
-#ifndef SPARSE_H
-#define SPARSE_H
+#ifndef ABC__misc__espresso__sparse_h
+#define ABC__misc__espresso__sparse_h
ABC_NAMESPACE_HEADER_START
diff --git a/src/misc/espresso/sparse_int.h b/src/misc/espresso/sparse_int.h
index 49b2509a..c567afde 100644
--- a/src/misc/espresso/sparse_int.h
+++ b/src/misc/espresso/sparse_int.h
@@ -30,7 +30,7 @@
* e: an object to use if insertion needed (set to actual value used)
*/
-#define sorted_insert(type, first, last, count, next, prev, value, newval, e) \
+#define ABC__misc__espresso__sparse_int_h
if (last == 0) { \
e->value = newval; \
first = e; \
diff --git a/src/misc/espresso/util_old.h b/src/misc/espresso/util_old.h
index 32be6ffa..d60790d3 100644
--- a/src/misc/espresso/util_old.h
+++ b/src/misc/espresso/util_old.h
@@ -7,8 +7,8 @@
* $Date: 1993/06/07 21:04:07 $
*
*/
-#ifndef UTIL_H
-#define UTIL_H
+#ifndef ABC__misc__espresso__util_old_h
+#define ABC__misc__espresso__util_old_h
#if defined(_IBMR2)
#ifndef _POSIX_SOURCE
diff --git a/src/misc/ext/ext.h b/src/misc/ext/ext.h
index 8db5a056..86601e52 100644
--- a/src/misc/ext/ext.h
+++ b/src/misc/ext/ext.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __EXT_H__
-#define __EXT_H__
+#ifndef ABC__misc__ext__ext_h
+#define ABC__misc__ext__ext_h
#define EXT_ABC_FRAME
#define EXT_ABC_INIT(pAbc)
diff --git a/src/misc/extra/extra.h b/src/misc/extra/extra.h
index 693c25bd..0bef042c 100644
--- a/src/misc/extra/extra.h
+++ b/src/misc/extra/extra.h
@@ -26,8 +26,8 @@
***********************************************************************/
-#ifndef __EXTRA_H__
-#define __EXTRA_H__
+#ifndef ABC__misc__extra__extra_h
+#define ABC__misc__extra__extra_h
#ifdef _WIN32
@@ -44,10 +44,7 @@
#include <assert.h>
#include <time.h>
-#include "st.h"
-#include "cuddInt.h"
-
-
+#include "src/misc/st/st.h"
ABC_NAMESPACE_HEADER_START
@@ -76,239 +73,10 @@ typedef unsigned char uint8;
typedef unsigned short uint16;
typedef unsigned int uint32;
-/* constants of the manager */
-#define b0 Cudd_Not((dd)->one)
-#define b1 (dd)->one
-#define z0 (dd)->zero
-#define z1 (dd)->one
-#define a0 (dd)->zero
-#define a1 (dd)->one
-
-// hash key macros
-#define hashKey1(a,TSIZE) \
-((ABC_PTRUINT_T)(a) % TSIZE)
-
-#define hashKey2(a,b,TSIZE) \
-(((ABC_PTRUINT_T)(a) + (ABC_PTRUINT_T)(b) * DD_P1) % TSIZE)
-
-#define hashKey3(a,b,c,TSIZE) \
-(((((ABC_PTRUINT_T)(a) + (ABC_PTRUINT_T)(b)) * DD_P1 + (ABC_PTRUINT_T)(c)) * DD_P2 ) % TSIZE)
-
-#define hashKey4(a,b,c,d,TSIZE) \
-((((((ABC_PTRUINT_T)(a) + (ABC_PTRUINT_T)(b)) * DD_P1 + (ABC_PTRUINT_T)(c)) * DD_P2 + \
- (ABC_PTRUINT_T)(d)) * DD_P3) % TSIZE)
-
-#define hashKey5(a,b,c,d,e,TSIZE) \
-(((((((ABC_PTRUINT_T)(a) + (ABC_PTRUINT_T)(b)) * DD_P1 + (ABC_PTRUINT_T)(c)) * DD_P2 + \
- (ABC_PTRUINT_T)(d)) * DD_P3 + (ABC_PTRUINT_T)(e)) * DD_P1) % TSIZE)
-
/*===========================================================================*/
/* Various Utilities */
/*===========================================================================*/
-/*=== extraBddAuto.c ========================================================*/
-
-extern DdNode * Extra_bddSpaceFromFunctionFast( DdManager * dd, DdNode * bFunc );
-extern DdNode * Extra_bddSpaceFromFunction( DdManager * dd, DdNode * bF, DdNode * bG );
-extern DdNode * extraBddSpaceFromFunction( DdManager * dd, DdNode * bF, DdNode * bG );
-extern DdNode * Extra_bddSpaceFromFunctionPos( DdManager * dd, DdNode * bFunc );
-extern DdNode * extraBddSpaceFromFunctionPos( DdManager * dd, DdNode * bFunc );
-extern DdNode * Extra_bddSpaceFromFunctionNeg( DdManager * dd, DdNode * bFunc );
-extern DdNode * extraBddSpaceFromFunctionNeg( DdManager * dd, DdNode * bFunc );
-
-extern DdNode * Extra_bddSpaceCanonVars( DdManager * dd, DdNode * bSpace );
-extern DdNode * extraBddSpaceCanonVars( DdManager * dd, DdNode * bSpace );
-
-extern DdNode * Extra_bddSpaceEquations( DdManager * dd, DdNode * bSpace );
-extern DdNode * Extra_bddSpaceEquationsNeg( DdManager * dd, DdNode * bSpace );
-extern DdNode * extraBddSpaceEquationsNeg( DdManager * dd, DdNode * bSpace );
-extern DdNode * Extra_bddSpaceEquationsPos( DdManager * dd, DdNode * bSpace );
-extern DdNode * extraBddSpaceEquationsPos( DdManager * dd, DdNode * bSpace );
-
-extern DdNode * Extra_bddSpaceFromMatrixPos( DdManager * dd, DdNode * zA );
-extern DdNode * extraBddSpaceFromMatrixPos( DdManager * dd, DdNode * zA );
-extern DdNode * Extra_bddSpaceFromMatrixNeg( DdManager * dd, DdNode * zA );
-extern DdNode * extraBddSpaceFromMatrixNeg( DdManager * dd, DdNode * zA );
-
-extern DdNode * Extra_bddSpaceReduce( DdManager * dd, DdNode * bFunc, DdNode * bCanonVars );
-extern DdNode ** Extra_bddSpaceExorGates( DdManager * dd, DdNode * bFuncRed, DdNode * zEquations );
-
-/*=== extraBddCas.c =============================================================*/
-
-/* performs the binary encoding of the set of function using the given vars */
-extern DdNode * Extra_bddEncodingBinary( DdManager * dd, DdNode ** pbFuncs, int nFuncs, DdNode ** pbVars, int nVars );
-/* solves the column encoding problem using a sophisticated method */
-extern DdNode * Extra_bddEncodingNonStrict( DdManager * dd, DdNode ** pbColumns, int nColumns, DdNode * bVarsCol, DdNode ** pCVars, int nMulti, int * pSimple );
-/* collects the nodes under the cut and, for each node, computes the sum of paths leading to it from the root */
-extern st_table * Extra_bddNodePathsUnderCut( DdManager * dd, DdNode * bFunc, int CutLevel );
-/* collects the nodes under the cut starting from the given set of ADD nodes */
-extern int Extra_bddNodePathsUnderCutArray( DdManager * dd, DdNode ** paNodes, DdNode ** pbCubes, int nNodes, DdNode ** paNodesRes, DdNode ** pbCubesRes, int CutLevel );
-/* find the profile of a DD (the number of edges crossing each level) */
-extern int Extra_ProfileWidth( DdManager * dd, DdNode * F, int * Profile, int CutLevel );
-
-/*=== extraBddImage.c ================================================================*/
-
-typedef struct Extra_ImageTree_t_ Extra_ImageTree_t;
-extern Extra_ImageTree_t * Extra_bddImageStart(
- DdManager * dd, DdNode * bCare,
- int nParts, DdNode ** pbParts,
- int nVars, DdNode ** pbVars, int fVerbose );
-extern DdNode * Extra_bddImageCompute( Extra_ImageTree_t * pTree, DdNode * bCare );
-extern void Extra_bddImageTreeDelete( Extra_ImageTree_t * pTree );
-extern DdNode * Extra_bddImageRead( Extra_ImageTree_t * pTree );
-
-typedef struct Extra_ImageTree2_t_ Extra_ImageTree2_t;
-extern Extra_ImageTree2_t * Extra_bddImageStart2(
- DdManager * dd, DdNode * bCare,
- int nParts, DdNode ** pbParts,
- int nVars, DdNode ** pbVars, int fVerbose );
-extern DdNode * Extra_bddImageCompute2( Extra_ImageTree2_t * pTree, DdNode * bCare );
-extern void Extra_bddImageTreeDelete2( Extra_ImageTree2_t * pTree );
-extern DdNode * Extra_bddImageRead2( Extra_ImageTree2_t * pTree );
-
-/*=== extraBddMisc.c ========================================================*/
-
-extern DdNode * Extra_TransferPermute( DdManager * ddSource, DdManager * ddDestination, DdNode * f, int * Permute );
-extern DdNode * Extra_TransferLevelByLevel( DdManager * ddSource, DdManager * ddDestination, DdNode * f );
-extern DdNode * Extra_bddRemapUp( DdManager * dd, DdNode * bF );
-extern DdNode * Extra_bddMove( DdManager * dd, DdNode * bF, int nVars );
-extern DdNode * extraBddMove( DdManager * dd, DdNode * bF, DdNode * bFlag );
-extern void Extra_StopManager( DdManager * dd );
-extern void Extra_bddPrint( DdManager * dd, DdNode * F );
-extern void Extra_bddPrintSupport( DdManager * dd, DdNode * F );
-extern void extraDecomposeCover( DdManager* dd, DdNode* zC, DdNode** zC0, DdNode** zC1, DdNode** zC2 );
-extern int Extra_bddSuppSize( DdManager * dd, DdNode * bSupp );
-extern int Extra_bddSuppContainVar( DdManager * dd, DdNode * bS, DdNode * bVar );
-extern int Extra_bddSuppOverlapping( DdManager * dd, DdNode * S1, DdNode * S2 );
-extern int Extra_bddSuppDifferentVars( DdManager * dd, DdNode * S1, DdNode * S2, int DiffMax );
-extern int Extra_bddSuppCheckContainment( DdManager * dd, DdNode * bL, DdNode * bH, DdNode ** bLarge, DdNode ** bSmall );
-extern int * Extra_SupportArray( DdManager * dd, DdNode * F, int * support );
-extern int * Extra_VectorSupportArray( DdManager * dd, DdNode ** F, int n, int * support );
-extern DdNode * Extra_bddFindOneCube( DdManager * dd, DdNode * bF );
-extern DdNode * Extra_bddGetOneCube( DdManager * dd, DdNode * bFunc );
-extern DdNode * Extra_bddComputeRangeCube( DdManager * dd, int iStart, int iStop );
-extern DdNode * Extra_bddBitsToCube( DdManager * dd, int Code, int CodeWidth, DdNode ** pbVars, int fMsbFirst );
-extern DdNode * Extra_bddSupportNegativeCube( DdManager * dd, DdNode * f );
-extern int Extra_bddIsVar( DdNode * bFunc );
-extern DdNode * Extra_bddCreateAnd( DdManager * dd, int nVars );
-extern DdNode * Extra_bddCreateOr( DdManager * dd, int nVars );
-extern DdNode * Extra_bddCreateExor( DdManager * dd, int nVars );
-extern DdNode * Extra_zddPrimes( DdManager * dd, DdNode * F );
-extern void Extra_bddPermuteArray( DdManager * dd, DdNode ** bNodesIn, DdNode ** bNodesOut, int nNodes, int *permut );
-extern DdNode * Extra_bddComputeCube( DdManager * dd, DdNode ** bXVars, int nVars );
-extern DdNode * Extra_bddChangePolarity( DdManager * dd, DdNode * bFunc, DdNode * bVars );
-extern DdNode * extraBddChangePolarity( DdManager * dd, DdNode * bFunc, DdNode * bVars );
-extern int Extra_bddVarIsInCube( DdNode * bCube, int iVar );
-extern DdNode * Extra_bddAndPermute( DdManager * ddF, DdNode * bF, DdManager * ddG, DdNode * bG, int * pPermute );
-
-#ifndef ABC_PRB
-#define ABC_PRB(dd,f) printf("%s = ", #f); Extra_bddPrint(dd,f); printf("\n")
-#endif
-
-/*=== extraBddKmap.c ================================================================*/
-
-/* displays the Karnaugh Map of a function */
-extern void Extra_PrintKMap( FILE * pFile, DdManager * dd, DdNode * OnSet, DdNode * OffSet, int nVars, DdNode ** XVars, int fSuppType, char ** pVarNames );
-/* displays the Karnaugh Map of a relation */
-extern void Extra_PrintKMapRelation( FILE * pFile, DdManager * dd, DdNode * OnSet, DdNode * OffSet, int nXVars, int nYVars, DdNode ** XVars, DdNode ** YVars );
-
-/*=== extraBddSymm.c =================================================================*/
-
-typedef struct Extra_SymmInfo_t_ Extra_SymmInfo_t;
-struct Extra_SymmInfo_t_ {
- int nVars; // the number of variables in the support
- int nVarsMax; // the number of variables in the DD manager
- int nSymms; // the number of pair-wise symmetries
- int nNodes; // the number of nodes in a ZDD (if applicable)
- int * pVars; // the list of all variables present in the support
- char ** pSymms; // the symmetry information
-};
-
-/* computes the classical symmetry information for the function - recursive */
-extern Extra_SymmInfo_t * Extra_SymmPairsCompute( DdManager * dd, DdNode * bFunc );
-/* computes the classical symmetry information for the function - using naive approach */
-extern Extra_SymmInfo_t * Extra_SymmPairsComputeNaive( DdManager * dd, DdNode * bFunc );
-extern int Extra_bddCheckVarsSymmetricNaive( DdManager * dd, DdNode * bF, int iVar1, int iVar2 );
-
-/* allocates the data structure */
-extern Extra_SymmInfo_t * Extra_SymmPairsAllocate( int nVars );
-/* deallocates the data structure */
-extern void Extra_SymmPairsDissolve( Extra_SymmInfo_t * );
-/* print the contents the data structure */
-extern void Extra_SymmPairsPrint( Extra_SymmInfo_t * );
-/* converts the ZDD into the Extra_SymmInfo_t structure */
-extern Extra_SymmInfo_t * Extra_SymmPairsCreateFromZdd( DdManager * dd, DdNode * zPairs, DdNode * bVars );
-
-/* computes the classical symmetry information as a ZDD */
-extern DdNode * Extra_zddSymmPairsCompute( DdManager * dd, DdNode * bF, DdNode * bVars );
-extern DdNode * extraZddSymmPairsCompute( DdManager * dd, DdNode * bF, DdNode * bVars );
-/* returns a singleton-set ZDD containing all variables that are symmetric with the given one */
-extern DdNode * Extra_zddGetSymmetricVars( DdManager * dd, DdNode * bF, DdNode * bG, DdNode * bVars );
-extern DdNode * extraZddGetSymmetricVars( DdManager * dd, DdNode * bF, DdNode * bG, DdNode * bVars );
-/* converts a set of variables into a set of singleton subsets */
-extern DdNode * Extra_zddGetSingletons( DdManager * dd, DdNode * bVars );
-extern DdNode * extraZddGetSingletons( DdManager * dd, DdNode * bVars );
-/* filters the set of variables using the support of the function */
-extern DdNode * Extra_bddReduceVarSet( DdManager * dd, DdNode * bVars, DdNode * bF );
-extern DdNode * extraBddReduceVarSet( DdManager * dd, DdNode * bVars, DdNode * bF );
-
-/* checks the possibility that the two vars are symmetric */
-extern int Extra_bddCheckVarsSymmetric( DdManager * dd, DdNode * bF, int iVar1, int iVar2 );
-extern DdNode * extraBddCheckVarsSymmetric( DdManager * dd, DdNode * bF, DdNode * bVars );
-
-/* build the set of all tuples of K variables out of N from the BDD cube */
-extern DdNode * Extra_zddTuplesFromBdd( DdManager * dd, int K, DdNode * bVarsN );
-extern DdNode * extraZddTuplesFromBdd( DdManager * dd, DdNode * bVarsK, DdNode * bVarsN );
-/* selects one subset from a ZDD representing the set of subsets */
-extern DdNode * Extra_zddSelectOneSubset( DdManager * dd, DdNode * zS );
-extern DdNode * extraZddSelectOneSubset( DdManager * dd, DdNode * zS );
-
-/*=== extraBddUnate.c =================================================================*/
-
-extern DdNode * Extra_bddAndTime( DdManager * dd, DdNode * f, DdNode * g, int TimeOut );
-extern DdNode * Extra_bddAndAbstractTime( DdManager * manager, DdNode * f, DdNode * g, DdNode * cube, int TimeOut );
-extern DdNode * Extra_TransferPermuteTime( DdManager * ddSource, DdManager * ddDestination, DdNode * f, int * Permute, int TimeOut );
-
-/*=== extraBddUnate.c =================================================================*/
-
-typedef struct Extra_UnateVar_t_ Extra_UnateVar_t;
-struct Extra_UnateVar_t_ {
- unsigned iVar : 30; // index of the variable
- unsigned Pos : 1; // 1 if positive unate
- unsigned Neg : 1; // 1 if negative unate
-};
-
-typedef struct Extra_UnateInfo_t_ Extra_UnateInfo_t;
-struct Extra_UnateInfo_t_ {
- int nVars; // the number of variables in the support
- int nVarsMax; // the number of variables in the DD manager
- int nUnate; // the number of unate variables
- Extra_UnateVar_t * pVars; // the array of variables present in the support
-};
-
-/* allocates the data structure */
-extern Extra_UnateInfo_t * Extra_UnateInfoAllocate( int nVars );
-/* deallocates the data structure */
-extern void Extra_UnateInfoDissolve( Extra_UnateInfo_t * );
-/* print the contents the data structure */
-extern void Extra_UnateInfoPrint( Extra_UnateInfo_t * );
-/* converts the ZDD into the Extra_SymmInfo_t structure */
-extern Extra_UnateInfo_t * Extra_UnateInfoCreateFromZdd( DdManager * dd, DdNode * zUnate, DdNode * bVars );
-/* naive check of unateness of one variable */
-extern int Extra_bddCheckUnateNaive( DdManager * dd, DdNode * bF, int iVar );
-
-/* computes the unateness information for the function */
-extern Extra_UnateInfo_t * Extra_UnateComputeFast( DdManager * dd, DdNode * bFunc );
-extern Extra_UnateInfo_t * Extra_UnateComputeSlow( DdManager * dd, DdNode * bFunc );
-
-/* computes the classical symmetry information as a ZDD */
-extern DdNode * Extra_zddUnateInfoCompute( DdManager * dd, DdNode * bF, DdNode * bVars );
-extern DdNode * extraZddUnateInfoCompute( DdManager * dd, DdNode * bF, DdNode * bVars );
-
-/* converts a set of variables into a set of singleton subsets */
-extern DdNode * Extra_zddGetSingletonsBoth( DdManager * dd, DdNode * bVars );
-extern DdNode * extraZddGetSingletonsBoth( DdManager * dd, DdNode * bVars );
-
/*=== extraUtilBitMatrix.c ================================================================*/
typedef struct Extra_BitMat_t_ Extra_BitMat_t;
@@ -391,9 +159,7 @@ extern int Extra_MmStepReadMemUsage( Extra_MmStep_t * p );
/*=== extraUtilMisc.c ========================================================*/
/* finds the smallest integer larger or equal than the logarithm */
-extern int Extra_Base2Log( unsigned Num );
extern int Extra_Base2LogDouble( double Num );
-extern int Extra_Base10Log( unsigned Num );
/* returns the power of two as a double */
extern double Extra_Power2( int Num );
extern int Extra_Power3( int Num );
@@ -430,8 +196,6 @@ extern unsigned ** Extra_TruthPerm53();
extern unsigned ** Extra_TruthPerm54();
/* bubble sort for small number of entries */
extern void Extra_BubbleSort( int Order[], int Costs[], int nSize, int fIncreasing );
-/* for independence from CUDD */
-extern unsigned int Cudd_PrimeCopy( unsigned int p );
/*=== extraUtilCanon.c ========================================================*/
@@ -451,10 +215,6 @@ static inline void Extra_ProgressBarUpdate( ProgressBar * p, int nItemsCur, char
/*=== extraUtilTruth.c ================================================================*/
-//static inline int Extra_Float2Int( float Val ) { return *((int *)&Val); }
-//static inline float Extra_Int2Float( int Num ) { return *((float *)&Num); }
-static inline int Extra_Float2Int( float Val ) { union { int x; float y; } v; v.y = Val; return v.x; }
-static inline float Extra_Int2Float( int Num ) { union { int x; float y; } v; v.x = Num; return v.y; }
static inline int Extra_BitWordNum( int nBits ) { return nBits/(8*sizeof(unsigned)) + ((nBits%(8*sizeof(unsigned))) > 0); }
static inline int Extra_TruthWordNum( int nVars ) { return nVars <= 5 ? 1 : (1 << (nVars - 5)); }
diff --git a/src/misc/extra/extraBdd.h b/src/misc/extra/extraBdd.h
new file mode 100644
index 00000000..25df14bb
--- /dev/null
+++ b/src/misc/extra/extraBdd.h
@@ -0,0 +1,316 @@
+/**CFile****************************************************************
+
+ FileName [extraBdd.h]
+
+ SystemName [ABC: Logic synthesis and verification system.]
+
+ PackageName [extra]
+
+ Synopsis [Various reusable software utilities.]
+
+ Description [This library contains a number of operators and
+ traversal routines developed to extend the functionality of
+ CUDD v.2.3.x, by Fabio Somenzi (http://vlsi.colorado.edu/~fabio/)
+ To compile your code with the library, #include "extra.h"
+ in your source files and link your project to CUDD and this
+ library. Use the library at your own risk and with caution.
+ Note that debugging of some operators still continues.]
+
+ Author [Alan Mishchenko]
+
+ Affiliation [UC Berkeley]
+
+ Date [Ver. 1.0. Started - June 20, 2005.]
+
+ Revision [$Id: extraBdd.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
+
+***********************************************************************/
+
+#ifndef ABC__misc__extra__extra_bdd_h
+#define ABC__misc__extra__extra_bdd_h
+
+
+#ifdef _WIN32
+#define inline __inline // compatible with MS VS 6.0
+#endif
+
+/*---------------------------------------------------------------------------*/
+/* Nested includes */
+/*---------------------------------------------------------------------------*/
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <assert.h>
+#include <time.h>
+
+#include "src/misc/st/st.h"
+#include "src/bdd/cudd/cuddInt.h"
+#include "src/misc/extra/extra.h"
+
+
+ABC_NAMESPACE_HEADER_START
+
+
+/*---------------------------------------------------------------------------*/
+/* Constant declarations */
+/*---------------------------------------------------------------------------*/
+
+/*---------------------------------------------------------------------------*/
+/* Stucture declarations */
+/*---------------------------------------------------------------------------*/
+
+/*---------------------------------------------------------------------------*/
+/* Type declarations */
+/*---------------------------------------------------------------------------*/
+
+/*---------------------------------------------------------------------------*/
+/* Variable declarations */
+/*---------------------------------------------------------------------------*/
+
+/*---------------------------------------------------------------------------*/
+/* Macro declarations */
+/*---------------------------------------------------------------------------*/
+
+/* constants of the manager */
+#define b0 Cudd_Not((dd)->one)
+#define b1 (dd)->one
+#define z0 (dd)->zero
+#define z1 (dd)->one
+#define a0 (dd)->zero
+#define a1 (dd)->one
+
+// hash key macros
+#define hashKey1(a,TSIZE) \
+((ABC_PTRUINT_T)(a) % TSIZE)
+
+#define hashKey2(a,b,TSIZE) \
+(((ABC_PTRUINT_T)(a) + (ABC_PTRUINT_T)(b) * DD_P1) % TSIZE)
+
+#define hashKey3(a,b,c,TSIZE) \
+(((((ABC_PTRUINT_T)(a) + (ABC_PTRUINT_T)(b)) * DD_P1 + (ABC_PTRUINT_T)(c)) * DD_P2 ) % TSIZE)
+
+#define hashKey4(a,b,c,d,TSIZE) \
+((((((ABC_PTRUINT_T)(a) + (ABC_PTRUINT_T)(b)) * DD_P1 + (ABC_PTRUINT_T)(c)) * DD_P2 + \
+ (ABC_PTRUINT_T)(d)) * DD_P3) % TSIZE)
+
+#define hashKey5(a,b,c,d,e,TSIZE) \
+(((((((ABC_PTRUINT_T)(a) + (ABC_PTRUINT_T)(b)) * DD_P1 + (ABC_PTRUINT_T)(c)) * DD_P2 + \
+ (ABC_PTRUINT_T)(d)) * DD_P3 + (ABC_PTRUINT_T)(e)) * DD_P1) % TSIZE)
+
+/*===========================================================================*/
+/* Various Utilities */
+/*===========================================================================*/
+
+/*=== extraBddAuto.c ========================================================*/
+
+extern DdNode * Extra_bddSpaceFromFunctionFast( DdManager * dd, DdNode * bFunc );
+extern DdNode * Extra_bddSpaceFromFunction( DdManager * dd, DdNode * bF, DdNode * bG );
+extern DdNode * extraBddSpaceFromFunction( DdManager * dd, DdNode * bF, DdNode * bG );
+extern DdNode * Extra_bddSpaceFromFunctionPos( DdManager * dd, DdNode * bFunc );
+extern DdNode * extraBddSpaceFromFunctionPos( DdManager * dd, DdNode * bFunc );
+extern DdNode * Extra_bddSpaceFromFunctionNeg( DdManager * dd, DdNode * bFunc );
+extern DdNode * extraBddSpaceFromFunctionNeg( DdManager * dd, DdNode * bFunc );
+
+extern DdNode * Extra_bddSpaceCanonVars( DdManager * dd, DdNode * bSpace );
+extern DdNode * extraBddSpaceCanonVars( DdManager * dd, DdNode * bSpace );
+
+extern DdNode * Extra_bddSpaceEquations( DdManager * dd, DdNode * bSpace );
+extern DdNode * Extra_bddSpaceEquationsNeg( DdManager * dd, DdNode * bSpace );
+extern DdNode * extraBddSpaceEquationsNeg( DdManager * dd, DdNode * bSpace );
+extern DdNode * Extra_bddSpaceEquationsPos( DdManager * dd, DdNode * bSpace );
+extern DdNode * extraBddSpaceEquationsPos( DdManager * dd, DdNode * bSpace );
+
+extern DdNode * Extra_bddSpaceFromMatrixPos( DdManager * dd, DdNode * zA );
+extern DdNode * extraBddSpaceFromMatrixPos( DdManager * dd, DdNode * zA );
+extern DdNode * Extra_bddSpaceFromMatrixNeg( DdManager * dd, DdNode * zA );
+extern DdNode * extraBddSpaceFromMatrixNeg( DdManager * dd, DdNode * zA );
+
+extern DdNode * Extra_bddSpaceReduce( DdManager * dd, DdNode * bFunc, DdNode * bCanonVars );
+extern DdNode ** Extra_bddSpaceExorGates( DdManager * dd, DdNode * bFuncRed, DdNode * zEquations );
+
+/*=== extraBddCas.c =============================================================*/
+
+/* performs the binary encoding of the set of function using the given vars */
+extern DdNode * Extra_bddEncodingBinary( DdManager * dd, DdNode ** pbFuncs, int nFuncs, DdNode ** pbVars, int nVars );
+/* solves the column encoding problem using a sophisticated method */
+extern DdNode * Extra_bddEncodingNonStrict( DdManager * dd, DdNode ** pbColumns, int nColumns, DdNode * bVarsCol, DdNode ** pCVars, int nMulti, int * pSimple );
+/* collects the nodes under the cut and, for each node, computes the sum of paths leading to it from the root */
+extern st_table * Extra_bddNodePathsUnderCut( DdManager * dd, DdNode * bFunc, int CutLevel );
+/* collects the nodes under the cut starting from the given set of ADD nodes */
+extern int Extra_bddNodePathsUnderCutArray( DdManager * dd, DdNode ** paNodes, DdNode ** pbCubes, int nNodes, DdNode ** paNodesRes, DdNode ** pbCubesRes, int CutLevel );
+/* find the profile of a DD (the number of edges crossing each level) */
+extern int Extra_ProfileWidth( DdManager * dd, DdNode * F, int * Profile, int CutLevel );
+
+/*=== extraBddImage.c ================================================================*/
+
+typedef struct Extra_ImageTree_t_ Extra_ImageTree_t;
+extern Extra_ImageTree_t * Extra_bddImageStart(
+ DdManager * dd, DdNode * bCare,
+ int nParts, DdNode ** pbParts,
+ int nVars, DdNode ** pbVars, int fVerbose );
+extern DdNode * Extra_bddImageCompute( Extra_ImageTree_t * pTree, DdNode * bCare );
+extern void Extra_bddImageTreeDelete( Extra_ImageTree_t * pTree );
+extern DdNode * Extra_bddImageRead( Extra_ImageTree_t * pTree );
+
+typedef struct Extra_ImageTree2_t_ Extra_ImageTree2_t;
+extern Extra_ImageTree2_t * Extra_bddImageStart2(
+ DdManager * dd, DdNode * bCare,
+ int nParts, DdNode ** pbParts,
+ int nVars, DdNode ** pbVars, int fVerbose );
+extern DdNode * Extra_bddImageCompute2( Extra_ImageTree2_t * pTree, DdNode * bCare );
+extern void Extra_bddImageTreeDelete2( Extra_ImageTree2_t * pTree );
+extern DdNode * Extra_bddImageRead2( Extra_ImageTree2_t * pTree );
+
+/*=== extraBddMisc.c ========================================================*/
+
+extern DdNode * Extra_TransferPermute( DdManager * ddSource, DdManager * ddDestination, DdNode * f, int * Permute );
+extern DdNode * Extra_TransferLevelByLevel( DdManager * ddSource, DdManager * ddDestination, DdNode * f );
+extern DdNode * Extra_bddRemapUp( DdManager * dd, DdNode * bF );
+extern DdNode * Extra_bddMove( DdManager * dd, DdNode * bF, int nVars );
+extern DdNode * extraBddMove( DdManager * dd, DdNode * bF, DdNode * bFlag );
+extern void Extra_StopManager( DdManager * dd );
+extern void Extra_bddPrint( DdManager * dd, DdNode * F );
+extern void Extra_bddPrintSupport( DdManager * dd, DdNode * F );
+extern void extraDecomposeCover( DdManager* dd, DdNode* zC, DdNode** zC0, DdNode** zC1, DdNode** zC2 );
+extern int Extra_bddSuppSize( DdManager * dd, DdNode * bSupp );
+extern int Extra_bddSuppContainVar( DdManager * dd, DdNode * bS, DdNode * bVar );
+extern int Extra_bddSuppOverlapping( DdManager * dd, DdNode * S1, DdNode * S2 );
+extern int Extra_bddSuppDifferentVars( DdManager * dd, DdNode * S1, DdNode * S2, int DiffMax );
+extern int Extra_bddSuppCheckContainment( DdManager * dd, DdNode * bL, DdNode * bH, DdNode ** bLarge, DdNode ** bSmall );
+extern int * Extra_SupportArray( DdManager * dd, DdNode * F, int * support );
+extern int * Extra_VectorSupportArray( DdManager * dd, DdNode ** F, int n, int * support );
+extern DdNode * Extra_bddFindOneCube( DdManager * dd, DdNode * bF );
+extern DdNode * Extra_bddGetOneCube( DdManager * dd, DdNode * bFunc );
+extern DdNode * Extra_bddComputeRangeCube( DdManager * dd, int iStart, int iStop );
+extern DdNode * Extra_bddBitsToCube( DdManager * dd, int Code, int CodeWidth, DdNode ** pbVars, int fMsbFirst );
+extern DdNode * Extra_bddSupportNegativeCube( DdManager * dd, DdNode * f );
+extern int Extra_bddIsVar( DdNode * bFunc );
+extern DdNode * Extra_bddCreateAnd( DdManager * dd, int nVars );
+extern DdNode * Extra_bddCreateOr( DdManager * dd, int nVars );
+extern DdNode * Extra_bddCreateExor( DdManager * dd, int nVars );
+extern DdNode * Extra_zddPrimes( DdManager * dd, DdNode * F );
+extern void Extra_bddPermuteArray( DdManager * dd, DdNode ** bNodesIn, DdNode ** bNodesOut, int nNodes, int *permut );
+extern DdNode * Extra_bddComputeCube( DdManager * dd, DdNode ** bXVars, int nVars );
+extern DdNode * Extra_bddChangePolarity( DdManager * dd, DdNode * bFunc, DdNode * bVars );
+extern DdNode * extraBddChangePolarity( DdManager * dd, DdNode * bFunc, DdNode * bVars );
+extern int Extra_bddVarIsInCube( DdNode * bCube, int iVar );
+extern DdNode * Extra_bddAndPermute( DdManager * ddF, DdNode * bF, DdManager * ddG, DdNode * bG, int * pPermute );
+
+#ifndef ABC_PRB
+#define ABC_PRB(dd,f) printf("%s = ", #f); Extra_bddPrint(dd,f); printf("\n")
+#endif
+
+/*=== extraBddKmap.c ================================================================*/
+
+/* displays the Karnaugh Map of a function */
+extern void Extra_PrintKMap( FILE * pFile, DdManager * dd, DdNode * OnSet, DdNode * OffSet, int nVars, DdNode ** XVars, int fSuppType, char ** pVarNames );
+/* displays the Karnaugh Map of a relation */
+extern void Extra_PrintKMapRelation( FILE * pFile, DdManager * dd, DdNode * OnSet, DdNode * OffSet, int nXVars, int nYVars, DdNode ** XVars, DdNode ** YVars );
+
+/*=== extraBddSymm.c =================================================================*/
+
+typedef struct Extra_SymmInfo_t_ Extra_SymmInfo_t;
+struct Extra_SymmInfo_t_ {
+ int nVars; // the number of variables in the support
+ int nVarsMax; // the number of variables in the DD manager
+ int nSymms; // the number of pair-wise symmetries
+ int nNodes; // the number of nodes in a ZDD (if applicable)
+ int * pVars; // the list of all variables present in the support
+ char ** pSymms; // the symmetry information
+};
+
+/* computes the classical symmetry information for the function - recursive */
+extern Extra_SymmInfo_t * Extra_SymmPairsCompute( DdManager * dd, DdNode * bFunc );
+/* computes the classical symmetry information for the function - using naive approach */
+extern Extra_SymmInfo_t * Extra_SymmPairsComputeNaive( DdManager * dd, DdNode * bFunc );
+extern int Extra_bddCheckVarsSymmetricNaive( DdManager * dd, DdNode * bF, int iVar1, int iVar2 );
+
+/* allocates the data structure */
+extern Extra_SymmInfo_t * Extra_SymmPairsAllocate( int nVars );
+/* deallocates the data structure */
+extern void Extra_SymmPairsDissolve( Extra_SymmInfo_t * );
+/* print the contents the data structure */
+extern void Extra_SymmPairsPrint( Extra_SymmInfo_t * );
+/* converts the ZDD into the Extra_SymmInfo_t structure */
+extern Extra_SymmInfo_t * Extra_SymmPairsCreateFromZdd( DdManager * dd, DdNode * zPairs, DdNode * bVars );
+
+/* computes the classical symmetry information as a ZDD */
+extern DdNode * Extra_zddSymmPairsCompute( DdManager * dd, DdNode * bF, DdNode * bVars );
+extern DdNode * extraZddSymmPairsCompute( DdManager * dd, DdNode * bF, DdNode * bVars );
+/* returns a singleton-set ZDD containing all variables that are symmetric with the given one */
+extern DdNode * Extra_zddGetSymmetricVars( DdManager * dd, DdNode * bF, DdNode * bG, DdNode * bVars );
+extern DdNode * extraZddGetSymmetricVars( DdManager * dd, DdNode * bF, DdNode * bG, DdNode * bVars );
+/* converts a set of variables into a set of singleton subsets */
+extern DdNode * Extra_zddGetSingletons( DdManager * dd, DdNode * bVars );
+extern DdNode * extraZddGetSingletons( DdManager * dd, DdNode * bVars );
+/* filters the set of variables using the support of the function */
+extern DdNode * Extra_bddReduceVarSet( DdManager * dd, DdNode * bVars, DdNode * bF );
+extern DdNode * extraBddReduceVarSet( DdManager * dd, DdNode * bVars, DdNode * bF );
+
+/* checks the possibility that the two vars are symmetric */
+extern int Extra_bddCheckVarsSymmetric( DdManager * dd, DdNode * bF, int iVar1, int iVar2 );
+extern DdNode * extraBddCheckVarsSymmetric( DdManager * dd, DdNode * bF, DdNode * bVars );
+
+/* build the set of all tuples of K variables out of N from the BDD cube */
+extern DdNode * Extra_zddTuplesFromBdd( DdManager * dd, int K, DdNode * bVarsN );
+extern DdNode * extraZddTuplesFromBdd( DdManager * dd, DdNode * bVarsK, DdNode * bVarsN );
+/* selects one subset from a ZDD representing the set of subsets */
+extern DdNode * Extra_zddSelectOneSubset( DdManager * dd, DdNode * zS );
+extern DdNode * extraZddSelectOneSubset( DdManager * dd, DdNode * zS );
+
+/*=== extraBddUnate.c =================================================================*/
+
+extern DdNode * Extra_bddAndTime( DdManager * dd, DdNode * f, DdNode * g, int TimeOut );
+extern DdNode * Extra_bddAndAbstractTime( DdManager * manager, DdNode * f, DdNode * g, DdNode * cube, int TimeOut );
+extern DdNode * Extra_TransferPermuteTime( DdManager * ddSource, DdManager * ddDestination, DdNode * f, int * Permute, int TimeOut );
+
+/*=== extraBddUnate.c =================================================================*/
+
+typedef struct Extra_UnateVar_t_ Extra_UnateVar_t;
+struct Extra_UnateVar_t_ {
+ unsigned iVar : 30; // index of the variable
+ unsigned Pos : 1; // 1 if positive unate
+ unsigned Neg : 1; // 1 if negative unate
+};
+
+typedef struct Extra_UnateInfo_t_ Extra_UnateInfo_t;
+struct Extra_UnateInfo_t_ {
+ int nVars; // the number of variables in the support
+ int nVarsMax; // the number of variables in the DD manager
+ int nUnate; // the number of unate variables
+ Extra_UnateVar_t * pVars; // the array of variables present in the support
+};
+
+/* allocates the data structure */
+extern Extra_UnateInfo_t * Extra_UnateInfoAllocate( int nVars );
+/* deallocates the data structure */
+extern void Extra_UnateInfoDissolve( Extra_UnateInfo_t * );
+/* print the contents the data structure */
+extern void Extra_UnateInfoPrint( Extra_UnateInfo_t * );
+/* converts the ZDD into the Extra_SymmInfo_t structure */
+extern Extra_UnateInfo_t * Extra_UnateInfoCreateFromZdd( DdManager * dd, DdNode * zUnate, DdNode * bVars );
+/* naive check of unateness of one variable */
+extern int Extra_bddCheckUnateNaive( DdManager * dd, DdNode * bF, int iVar );
+
+/* computes the unateness information for the function */
+extern Extra_UnateInfo_t * Extra_UnateComputeFast( DdManager * dd, DdNode * bFunc );
+extern Extra_UnateInfo_t * Extra_UnateComputeSlow( DdManager * dd, DdNode * bFunc );
+
+/* computes the classical symmetry information as a ZDD */
+extern DdNode * Extra_zddUnateInfoCompute( DdManager * dd, DdNode * bF, DdNode * bVars );
+extern DdNode * extraZddUnateInfoCompute( DdManager * dd, DdNode * bF, DdNode * bVars );
+
+/* converts a set of variables into a set of singleton subsets */
+extern DdNode * Extra_zddGetSingletonsBoth( DdManager * dd, DdNode * bVars );
+extern DdNode * extraZddGetSingletonsBoth( DdManager * dd, DdNode * bVars );
+
+/**AutomaticEnd***************************************************************/
+
+
+
+ABC_NAMESPACE_HEADER_END
+
+
+
+#endif /* __EXTRA_H__ */
diff --git a/src/misc/extra/extraBddAuto.c b/src/misc/extra/extraBddAuto.c
index 3b0e2aa0..5fb38aec 100644
--- a/src/misc/extra/extraBddAuto.c
+++ b/src/misc/extra/extraBddAuto.c
@@ -16,7 +16,7 @@
***********************************************************************/
-#include "extra.h"
+#include "extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/misc/extra/extraBddCas.c b/src/misc/extra/extraBddCas.c
index 14de2d2b..0416a0d2 100644
--- a/src/misc/extra/extraBddCas.c
+++ b/src/misc/extra/extraBddCas.c
@@ -16,7 +16,7 @@
***********************************************************************/
-#include "extra.h"
+#include "extraBdd.h"
ABC_NAMESPACE_IMPL_START
@@ -146,7 +146,7 @@ Extra_bddEncodingBinary(
DdNode * bResult;
DdNode * bCube, * bTemp, * bProd;
- assert( nVars >= Extra_Base2Log(nFuncs) );
+ assert( nVars >= Abc_Base2Log(nFuncs) );
bResult = b0; Cudd_Ref( bResult );
for ( i = 0; i < nFuncs; i++ )
diff --git a/src/misc/extra/extraBddImage.c b/src/misc/extra/extraBddImage.c
index 38c18f63..46afb4f2 100644
--- a/src/misc/extra/extraBddImage.c
+++ b/src/misc/extra/extraBddImage.c
@@ -16,7 +16,7 @@
***********************************************************************/
-#include "extra.h"
+#include "extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/misc/extra/extraBddKmap.c b/src/misc/extra/extraBddKmap.c
index aa8e3764..23bf2224 100644
--- a/src/misc/extra/extraBddKmap.c
+++ b/src/misc/extra/extraBddKmap.c
@@ -20,7 +20,7 @@
/// Version 1.0. Started - August 20, 2000 ///
/// Version 2.0. Added to EXTRA - July 17, 2001 ///
-#include "extra.h"
+#include "extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/misc/extra/extraBddMisc.c b/src/misc/extra/extraBddMisc.c
index 3af9c81e..4512572d 100644
--- a/src/misc/extra/extraBddMisc.c
+++ b/src/misc/extra/extraBddMisc.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "extra.h"
+#include "extraBdd.h"
ABC_NAMESPACE_IMPL_START
@@ -1917,7 +1917,7 @@ DdNode * extraBddAndPermute( DdHashTable * table, DdManager * ddF, DdNode * bF,
// find the topmost variable in F and G using var order of F
LevF = cuddI( ddF, Cudd_Regular(bF)->index );
LevG = cuddI( ddF, pPermute ? pPermute[Cudd_Regular(bG)->index] : Cudd_Regular(bG)->index );
- Lev = ABC_MIN( LevF, LevG );
+ Lev = Abc_MinInt( LevF, LevG );
assert( Lev < ddF->size );
bVar = ddF->vars[ddF->invperm[Lev]];
diff --git a/src/misc/extra/extraBddSymm.c b/src/misc/extra/extraBddSymm.c
index 0adcbd2a..9dd2c8e5 100644
--- a/src/misc/extra/extraBddSymm.c
+++ b/src/misc/extra/extraBddSymm.c
@@ -19,7 +19,7 @@
***********************************************************************/
-#include "extra.h"
+#include "extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/misc/extra/extraBddTime.c b/src/misc/extra/extraBddTime.c
index b861d51a..853f8a64 100644
--- a/src/misc/extra/extraBddTime.c
+++ b/src/misc/extra/extraBddTime.c
@@ -16,7 +16,7 @@
***********************************************************************/
-#include "extra.h"
+#include "extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/misc/extra/extraBddUnate.c b/src/misc/extra/extraBddUnate.c
index 3aa18e51..9ebdd4e5 100644
--- a/src/misc/extra/extraBddUnate.c
+++ b/src/misc/extra/extraBddUnate.c
@@ -20,7 +20,7 @@
***********************************************************************/
-#include "extra.h"
+#include "extraBdd.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/misc/extra/extraUtilFile.c b/src/misc/extra/extraUtilFile.c
index a8542da4..b38befd6 100644
--- a/src/misc/extra/extraUtilFile.c
+++ b/src/misc/extra/extraUtilFile.c
@@ -580,7 +580,7 @@ void Extra_FileSort( char * pFileName, char * pFileNameOut )
Begin = i + 1;
}
// sort the lines
- qsort( pLines, nLines, sizeof(char *), Extra_StringCompare );
+ qsort( pLines, nLines, sizeof(char *), (int(*)(const void *,const void *))Extra_StringCompare );
// write a new file
pFile = fopen( pFileNameOut, "wb" );
for ( i = 0; i < nLines; i++ )
diff --git a/src/misc/extra/extraUtilMisc.c b/src/misc/extra/extraUtilMisc.c
index e4c5acd5..b910f209 100644
--- a/src/misc/extra/extraUtilMisc.c
+++ b/src/misc/extra/extraUtilMisc.c
@@ -18,6 +18,8 @@
***********************************************************************/
+#include <math.h>
+
#include "extra.h"
ABC_NAMESPACE_IMPL_START
@@ -58,27 +60,6 @@ static void Extra_Permutations_rec( char ** pRes, int nFact, int n, char Array[]
/* Definition of exported functions */
/*---------------------------------------------------------------------------*/
-
-/**Function********************************************************************
-
- Synopsis [Finds the smallest integer larger of equal than the logarithm.]
-
- Description [Returns [Log2(Num)].]
-
- SideEffects []
-
- SeeAlso []
-
-******************************************************************************/
-int Extra_Base2Log( unsigned Num )
-{
- int Res;
- if ( Num == 0 ) return 0;
- if ( Num == 1 ) return 1;
- for ( Res = 0, Num--; Num; Num >>= 1, Res++ );
- return Res;
-} /* end of Extra_Base2Log */
-
/**Function********************************************************************
Synopsis [Finds the smallest integer larger of equal than the logarithm.]
@@ -105,26 +86,6 @@ int Extra_Base2LogDouble( double Num )
/**Function********************************************************************
- Synopsis [Finds the smallest integer larger of equal than the logarithm.]
-
- Description [Returns [Log10(Num)].]
-
- SideEffects []
-
- SeeAlso []
-
-******************************************************************************/
-int Extra_Base10Log( unsigned Num )
-{
- int Res;
- if ( Num == 0 ) return 0;
- if ( Num == 1 ) return 1;
- for ( Res = 0, Num--; Num; Num /= 10, Res++ );
- return Res;
-} /* end of Extra_Base2Log */
-
-/**Function********************************************************************
-
Synopsis [Returns the power of two as a double.]
Description []
@@ -2118,41 +2079,6 @@ void Extra_BubbleSort( int Order[], int Costs[], int nSize, int fIncreasing )
}
}
-/**Function*************************************************************
-
- Synopsis [Returns the smallest prime larger than the number.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-unsigned int Cudd_PrimeCopy( unsigned int p)
-{
- int i,pn;
-
- p--;
- do {
- p++;
- if (p&1) {
- pn = 1;
- i = 3;
- while ((unsigned) (i * i) <= p) {
- if (p % i == 0) {
- pn = 0;
- break;
- }
- i += 2;
- }
- } else {
- pn = 0;
- }
- } while (!pn);
- return(p);
-
-} /* end of Cudd_Prime */
/*---------------------------------------------------------------------------*/
/* Definition of internal functions */
diff --git a/src/misc/extra/extraUtilProgress.c b/src/misc/extra/extraUtilProgress.c
index e7add47f..ab0f5849 100644
--- a/src/misc/extra/extraUtilProgress.c
+++ b/src/misc/extra/extraUtilProgress.c
@@ -20,7 +20,7 @@
#include <stdio.h>
#include "extra.h"
-#include "main.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/misc/extra/extraUtilReader.c b/src/misc/extra/extraUtilReader.c
index bcf3da37..41e02a27 100644
--- a/src/misc/extra/extraUtilReader.c
+++ b/src/misc/extra/extraUtilReader.c
@@ -20,7 +20,7 @@
#include <stdio.h>
#include "extra.h"
-#include "vec.h"
+#include "src/misc/vec/vec.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/misc/hash/hash.h b/src/misc/hash/hash.h
index 9b5b25d6..6e6c637c 100644
--- a/src/misc/hash/hash.h
+++ b/src/misc/hash/hash.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __HASH_H__
-#define __HASH_H__
+#ifndef ABC__misc__hash__hash_h
+#define ABC__misc__hash__hash_h
#ifdef _WIN32
@@ -29,7 +29,7 @@
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "hashInt.h"
#include "hashFlt.h"
@@ -55,7 +55,7 @@ ABC_NAMESPACE_HEADER_START
////////////////////////////////////////////////////////////////////////
int Hash_DefaultHashFunc(int key, int nBins) {
- return ABC_ABS( ( (key+11)*(key)*7+3 ) % nBins );
+ return Abc_AbsInt( ( (key+11)*(key)*7+3 ) % nBins );
}
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/hash/hashFlt.h b/src/misc/hash/hashFlt.h
index 74e8503d..c5776b46 100644
--- a/src/misc/hash/hashFlt.h
+++ b/src/misc/hash/hashFlt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __HASH_FLT_H__
-#define __HASH_FLT_H__
+#ifndef ABC__misc__hash__hashFlt_h
+#define ABC__misc__hash__hashFlt_h
////////////////////////////////////////////////////////////////////////
@@ -27,7 +27,7 @@
////////////////////////////////////////////////////////////////////////
#include <stdio.h>
-#include "extra.h"
+#include "src/misc/extra/extra.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/misc/hash/hashGen.h b/src/misc/hash/hashGen.h
index e26a3c84..eaeef6fd 100644
--- a/src/misc/hash/hashGen.h
+++ b/src/misc/hash/hashGen.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __HASH_GEN_H__
-#define __HASH_GEN_H__
+#ifndef ABC__misc__hash__hashGen_h
+#define ABC__misc__hash__hashGen_h
////////////////////////////////////////////////////////////////////////
@@ -27,7 +27,7 @@
////////////////////////////////////////////////////////////////////////
#include <stdio.h>
-#include "extra.h"
+#include "misc/extra/extra.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/misc/hash/hashInt.h b/src/misc/hash/hashInt.h
index 23947946..81a338fc 100644
--- a/src/misc/hash/hashInt.h
+++ b/src/misc/hash/hashInt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __HASH_INT_H__
-#define __HASH_INT_H__
+#ifndef ABC__misc__hash__hashInt_h
+#define ABC__misc__hash__hashInt_h
////////////////////////////////////////////////////////////////////////
@@ -27,7 +27,7 @@
////////////////////////////////////////////////////////////////////////
#include <stdio.h>
-#include "extra.h"
+#include "src/misc/extra/extra.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/misc/hash/hashPtr.h b/src/misc/hash/hashPtr.h
index a10fb548..72e2f394 100644
--- a/src/misc/hash/hashPtr.h
+++ b/src/misc/hash/hashPtr.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __HASH_PTR_H__
-#define __HASH_PTR_H__
+#ifndef ABC__misc__hash__hashPtr_h
+#define ABC__misc__hash__hashPtr_h
////////////////////////////////////////////////////////////////////////
@@ -27,7 +27,7 @@
////////////////////////////////////////////////////////////////////////
#include <stdio.h>
-#include "extra.h"
+#include "src/misc/extra/extra.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/aig/mem/mem.c b/src/misc/mem/mem.c
index 23d8d7ec..23d8d7ec 100644
--- a/src/aig/mem/mem.c
+++ b/src/misc/mem/mem.c
diff --git a/src/aig/mem/mem.h b/src/misc/mem/mem.h
index 15cb56fe..0f04c160 100644
--- a/src/aig/mem/mem.h
+++ b/src/misc/mem/mem.h
@@ -18,10 +18,10 @@
***********************************************************************/
-#ifndef __MEM_H__
-#define __MEM_H__
+#ifndef ABC__aig__mem__mem_h
+#define ABC__aig__mem__mem_h
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/misc/mem/module.make b/src/misc/mem/module.make
new file mode 100644
index 00000000..53d76603
--- /dev/null
+++ b/src/misc/mem/module.make
@@ -0,0 +1 @@
+SRC += src/misc/mem/mem.c
diff --git a/src/misc/mvc/mvc.h b/src/misc/mvc/mvc.h
index 93229470..94b9acd9 100644
--- a/src/misc/mvc/mvc.h
+++ b/src/misc/mvc/mvc.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __MVC_H__
-#define __MVC_H__
+#ifndef ABC__misc__mvc__mvc_h
+#define ABC__misc__mvc__mvc_h
////////////////////////////////////////////////////////////////////////
@@ -25,8 +25,7 @@
////////////////////////////////////////////////////////////////////////
#include <stdio.h>
-#include "extra.h"
-#include "extra.h"
+#include "src/misc/extra/extra.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/misc/nm/nm.h b/src/misc/nm/nm.h
index 015b4ef4..2fa46d73 100644
--- a/src/misc/nm/nm.h
+++ b/src/misc/nm/nm.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __NM_H__
-#define __NM_H__
+#ifndef ABC__misc__nm__nm_h
+#define ABC__misc__nm__nm_h
/*
diff --git a/src/misc/nm/nmApi.c b/src/misc/nm/nmApi.c
index e6bfb069..ab334032 100644
--- a/src/misc/nm/nmApi.c
+++ b/src/misc/nm/nmApi.c
@@ -52,7 +52,7 @@ Nm_Man_t * Nm_ManCreate( int nSize )
p->nSizeFactor = 2; // determined the limit on the grow of data before the table resizes
p->nGrowthFactor = 3; // determined how much the table grows after resizing
// allocate and clean the bins
- p->nBins = Cudd_PrimeNm(nSize);
+ p->nBins = Abc_PrimeCudd(nSize);
p->pBinsI2N = ABC_ALLOC( Nm_Entry_t *, p->nBins );
p->pBinsN2I = ABC_ALLOC( Nm_Entry_t *, p->nBins );
memset( p->pBinsI2N, 0, sizeof(Nm_Entry_t *) * p->nBins );
diff --git a/src/misc/nm/nmInt.h b/src/misc/nm/nmInt.h
index 0978c6b6..4463b276 100644
--- a/src/misc/nm/nmInt.h
+++ b/src/misc/nm/nmInt.h
@@ -18,16 +18,16 @@
***********************************************************************/
-#ifndef __NM_INT_H__
-#define __NM_INT_H__
+#ifndef ABC__misc__nm__nmInt_h
+#define ABC__misc__nm__nmInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "extra.h"
-#include "vec.h"
+#include "src/misc/extra/extra.h"
+#include "src/misc/vec/vec.h"
#include "nm.h"
////////////////////////////////////////////////////////////////////////
@@ -78,7 +78,6 @@ extern int Nm_ManTableAdd( Nm_Man_t * p, Nm_Entry_t * pEntry );
extern int Nm_ManTableDelete( Nm_Man_t * p, int ObjId );
extern Nm_Entry_t * Nm_ManTableLookupId( Nm_Man_t * p, int ObjId );
extern Nm_Entry_t * Nm_ManTableLookupName( Nm_Man_t * p, char * pName, int Type );
-extern unsigned int Cudd_PrimeNm( unsigned int p );
diff --git a/src/misc/nm/nmTable.c b/src/misc/nm/nmTable.c
index 29c751a6..4c2b7a0a 100644
--- a/src/misc/nm/nmTable.c
+++ b/src/misc/nm/nmTable.c
@@ -260,7 +260,7 @@ void Nm_ManResize( Nm_Man_t * p )
clk = clock();
// get the new table size
- nBinsNew = Cudd_PrimeCopy( p->nGrowthFactor * p->nBins );
+ nBinsNew = Abc_PrimeCudd( p->nGrowthFactor * p->nBins );
// allocate a new array
pBinsNewI2N = ABC_ALLOC( Nm_Entry_t *, nBinsNew );
pBinsNewN2I = ABC_ALLOC( Nm_Entry_t *, nBinsNew );
@@ -299,41 +299,6 @@ clk = clock();
}
-/**Function*************************************************************
-
- Synopsis [Returns the smallest prime larger than the number.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-unsigned int Cudd_PrimeNm( unsigned int p)
-{
- int i,pn;
-
- p--;
- do {
- p++;
- if (p&1) {
- pn = 1;
- i = 3;
- while ((unsigned) (i * i) <= p) {
- if (p % i == 0) {
- pn = 0;
- break;
- }
- i += 2;
- }
- } else {
- pn = 0;
- }
- } while (!pn);
- return(p);
-
-} /* end of Cudd_Prime */
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
diff --git a/src/misc/st/st.c b/src/misc/st/st.c
index cadddb0b..2e2edc53 100644
--- a/src/misc/st/st.c
+++ b/src/misc/st/st.c
@@ -9,6 +9,7 @@
*/
#include <stdio.h>
#include <stdlib.h>
+#include <string.h>
#include "st.h"
@@ -16,7 +17,7 @@ ABC_NAMESPACE_IMPL_START
#define ST_NUMCMP(x,y) ((x) != (y))
-#define ST_NUMHASH(x,size) (ABC_ABS((long)x)%(size))
+#define ST_NUMHASH(x,size) (Abc_AbsInt((long)x)%(size))
//#define ST_PTRHASH(x,size) ((int)((ABC_PTRUINT_T)(x)>>2)%size) // 64-bit bug fix 9/17/2007
#define ST_PTRHASH(x,size) ((int)(((ABC_PTRUINT_T)(x)>>2)%size))
#define EQUAL(func, x, y) \
diff --git a/src/misc/st/st.h b/src/misc/st/st.h
index d16fc4b6..50a8440e 100644
--- a/src/misc/st/st.h
+++ b/src/misc/st/st.h
@@ -11,10 +11,11 @@
/* /projects/hsis/CVS/utilities/st/st.h,v 1.1 1993/07/29 01:00:21 serdar Exp */
-#ifndef ST_INCLUDED
+#ifndef ABC__misc__st__st_h
+#define ABC__misc__st__st_h
#define ST_INCLUDED
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/misc/st/stmm.c b/src/misc/st/stmm.c
index 1305d5b0..dc883a67 100644
--- a/src/misc/st/stmm.c
+++ b/src/misc/st/stmm.c
@@ -8,14 +8,14 @@
*
*/
#include <stdio.h>
-#include "extra.h"
+#include "src/misc/extra/extra.h"
#include "stmm.h"
ABC_NAMESPACE_IMPL_START
#define STMM_NUMCMP(x,y) ((x) != (y))
-#define STMM_NUMHASH(x,size) (ABC_ABS((long)x)%(size))
+#define STMM_NUMHASH(x,size) (Abc_AbsInt((long)x)%(size))
//#define STMM_PTRHASH(x,size) ((int)((ABC_PTRUINT_T)(x)>>2)%size) // 64-bit bug fix 9/17/2007
#define STMM_PTRHASH(x,size) ((int)(((ABC_PTRUINT_T)(x)>>2)%size))
#define EQUAL(func, x, y) \
diff --git a/src/misc/st/stmm.h b/src/misc/st/stmm.h
index eee90073..1853ce36 100644
--- a/src/misc/st/stmm.h
+++ b/src/misc/st/stmm.h
@@ -11,10 +11,10 @@
/* /projects/hsis/CVS/utilities/st/st.h,v 1.1 1993/07/29 01:00:21 serdar Exp */
-#ifndef STMM_INCLUDED
-#define STMM_INCLUDED
+#ifndef ABC__misc__st__stmm_h
+#define ABC__misc__st__stmm_h
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/misc/tim/module.make b/src/misc/tim/module.make
new file mode 100644
index 00000000..62a3ede5
--- /dev/null
+++ b/src/misc/tim/module.make
@@ -0,0 +1 @@
+SRC += src/misc/tim/tim.c
diff --git a/src/aig/tim/tim.c b/src/misc/tim/tim.c
index 6b7e310c..fe5f214d 100644
--- a/src/aig/tim/tim.c
+++ b/src/misc/tim/tim.c
@@ -24,8 +24,8 @@
#include <assert.h>
#include <time.h>
-#include "vec.h"
-#include "mem.h"
+#include "src/misc/vec/vec.h"
+#include "src/misc/mem/mem.h"
#include "tim.h"
ABC_NAMESPACE_IMPL_START
@@ -808,7 +808,7 @@ float Tim_ManGetCiArrival( Tim_Man_t * p, int iCi )
pDelays = pBox->pDelayTable + i * pBox->nInputs;
DelayBest = -TIM_ETERNITY;
Tim_ManBoxForEachInput( p, pBox, pObj, k )
- DelayBest = ABC_MAX( DelayBest, pObj->timeArr + pDelays[k] );
+ DelayBest = Abc_MaxInt( DelayBest, pObj->timeArr + pDelays[k] );
pObjRes->timeArr = DelayBest;
pObjRes->TravId = p->nTravIds;
}
@@ -855,7 +855,7 @@ float Tim_ManGetCoRequired( Tim_Man_t * p, int iCo )
Tim_ManBoxForEachOutput( p, pBox, pObj, k )
{
pDelays = pBox->pDelayTable + k * pBox->nInputs;
- DelayBest = ABC_MIN( DelayBest, pObj->timeReq - pDelays[i] );
+ DelayBest = Abc_MinInt( DelayBest, pObj->timeReq - pDelays[i] );
}
pObjRes->timeReq = DelayBest;
pObjRes->TravId = p->nTravIds;
diff --git a/src/aig/tim/tim.h b/src/misc/tim/tim.h
index 2d52b7b1..d921bcc5 100644
--- a/src/aig/tim/tim.h
+++ b/src/misc/tim/tim.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __TIM_H__
-#define __TIM_H__
+#ifndef ABC__aig__tim__tim_h
+#define ABC__aig__tim__tim_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/util/abc_global.h b/src/misc/util/abc_global.h
index 61aa9327..83c86f28 100644
--- a/src/misc/util/abc_global.h
+++ b/src/misc/util/abc_global.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __ABC_GLOBAL_H__
-#define __ABC_GLOBAL_H__
+#ifndef ABC__misc__util__abc_global_h
+#define ABC__misc__util__abc_global_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
@@ -200,11 +200,7 @@ typedef ABC_UINT64_T word;
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
-
-#define ABC_ABS(a) ((a) < 0 ? -(a) : (a))
-#define ABC_MAX(a,b) ((a) > (b) ? (a) : (b))
-#define ABC_MIN(a,b) ((a) < (b) ? (a) : (b))
-#define ABC_INFINITY (100000000)
+#define ABC_INFINITY (100000000)
#define ABC_PRT(a,t) (printf("%s = ", (a)), printf("%7.2f sec\n", (float)(t)/(float)(CLOCKS_PER_SEC)))
#define ABC_PRTr(a,t) (printf("%s = ", (a)), printf("%7.2f sec\r", (float)(t)/(float)(CLOCKS_PER_SEC)))
@@ -236,17 +232,37 @@ ABC_NAMESPACE_HEADER_START
((type *) Util_MemRecAlloc(malloc(sizeof(type) * (num)))))
#endif
-static inline int Abc_AbsInt( int a ) { return a < 0 ? -a : a; }
-static inline int Abc_MaxInt( int a, int b ) { return a > b ? a : b; }
-static inline int Abc_MinInt( int a, int b ) { return a < b ? a : b; }
-static inline word Abc_MaxWord( word a, word b ) { return a > b ? a : b; }
-static inline word Abc_MinWord( word a, word b ) { return a < b ? a : b; }
-static inline float Abc_AbsFloat( float a ) { return a < 0 ? -a : a; }
-static inline float Abc_MaxFloat( float a, float b ) { return a > b ? a : b; }
-static inline float Abc_MinFloat( float a, float b ) { return a < b ? a : b; }
-static inline double Abc_AbsDouble( double a ) { return a < 0 ? -a : a; }
-static inline double Abc_MaxDouble( double a, double b ) { return a > b ? a : b; }
-static inline double Abc_MinDouble( double a, double b ) { return a < b ? a : b; }
+static inline int Abc_AbsInt( int a ) { return a < 0 ? -a : a; }
+static inline int Abc_MaxInt( int a, int b ) { return a > b ? a : b; }
+static inline int Abc_MinInt( int a, int b ) { return a < b ? a : b; }
+static inline word Abc_MaxWord( word a, word b ) { return a > b ? a : b; }
+static inline word Abc_MinWord( word a, word b ) { return a < b ? a : b; }
+static inline float Abc_AbsFloat( float a ) { return a < 0 ? -a : a; }
+static inline float Abc_MaxFloat( float a, float b ) { return a > b ? a : b; }
+static inline float Abc_MinFloat( float a, float b ) { return a < b ? a : b; }
+static inline double Abc_AbsDouble( double a ) { return a < 0 ? -a : a; }
+static inline double Abc_MaxDouble( double a, double b ) { return a > b ? a : b; }
+static inline double Abc_MinDouble( double a, double b ) { return a < b ? a : b; }
+
+static inline int Abc_Float2Int( float Val ) { union { int x; float y; } v; v.y = Val; return v.x; }
+static inline float Abc_Int2Float( int Num ) { union { int x; float y; } v; v.x = Num; return v.y; }
+static inline int Abc_Base2Log( unsigned n ) { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n >>= 1, r++ ); return r; }
+static inline int Abc_Base10Log( unsigned n ) { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n /= 10, r++ ); return r; }
+static inline int Abc_Base16Log( unsigned n ) { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n /= 16, r++ ); return r; }
+static inline char * Abc_UtilStrsav( char * s ) { return s ? strcpy(ABC_ALLOC(char, strlen(s)+1), s) : NULL; }
+static inline int Abc_BitWordNum( int nBits ) { return (nBits>>5) + ((nBits&31) > 0); }
+static inline int Abc_TruthWordNum( int nVars ) { return nVars <= 5 ? 1 : (1 << (nVars - 5)); }
+static inline int Abc_InfoHasBit( unsigned * p, int i ) { return (p[(i)>>5] & (1<<((i) & 31))) > 0; }
+static inline void Abc_InfoSetBit( unsigned * p, int i ) { p[(i)>>5] |= (1<<((i) & 31)); }
+static inline void Abc_InfoXorBit( unsigned * p, int i ) { p[(i)>>5] ^= (1<<((i) & 31)); }
+static inline unsigned Abc_InfoMask( int nVar ) { return (~(unsigned)0) >> (32-nVar); }
+
+static inline int Abc_Var2Lit( int Var, int fCompl ) { return Var + Var + fCompl; }
+static inline int Abc_Lit2Var( int Lit ) { return Lit >> 1; }
+static inline int Abc_LitIsCompl( int Lit ) { return Lit & 1; }
+static inline int Abc_LitNot( int Lit ) { return Lit ^ 1; }
+static inline int Abc_LitNotCond( int Lit, int c ) { return Lit ^ (int)(c > 0); }
+static inline int Abc_LitRegular( int Lit ) { return Lit & ~01; }
enum Abc_VerbLevel
{
diff --git a/src/misc/util/utilCex.c b/src/misc/util/utilCex.c
index 37205543..80d8e141 100644
--- a/src/misc/util/utilCex.c
+++ b/src/misc/util/utilCex.c
@@ -32,10 +32,6 @@ ABC_NAMESPACE_IMPL_START
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
-static inline int Abc_BitWordNum( int nBits ) { return (nBits>>5) + ((nBits&31) > 0); }
-static inline int Abc_InfoHasBit( unsigned * p, int i ) { return (p[(i)>>5] & (1<<((i) & 31))) > 0; }
-static inline void Abc_InfoSetBit( unsigned * p, int i ) { p[(i)>>5] |= (1<<((i) & 31)); }
-
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/util/utilCex.h b/src/misc/util/utilCex.h
index 556f2268..b45cd27b 100644
--- a/src/misc/util/utilCex.h
+++ b/src/misc/util/utilCex.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __UTIL_CEX_H__
-#define __UTIL_CEX_H__
+#ifndef ABC__misc__util__utilCex_h
+#define ABC__misc__util__utilCex_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
diff --git a/src/misc/util/utilMem.h b/src/misc/util/utilMem.h
index 1f8432c1..af5873c0 100644
--- a/src/misc/util/utilMem.h
+++ b/src/misc/util/utilMem.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __UTIL_INT_H__
-#define __UTIL_INT_H__
+#ifndef ABC__misc__util__utilMem_h
+#define ABC__misc__util__utilMem_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/util/utilNam.c b/src/misc/util/utilNam.c
index 79565186..c6399818 100644
--- a/src/misc/util/utilNam.c
+++ b/src/misc/util/utilNam.c
@@ -25,7 +25,7 @@
#include <assert.h>
#include "abc_global.h"
-#include "vec.h"
+#include "src/misc/vec/vec.h"
#include "utilNam.h"
ABC_NAMESPACE_IMPL_START
@@ -304,7 +304,7 @@ void Abc_NamStrHashResize( Abc_Nam_t * p )
char * pThis;
int * piPlace, * pBinsOld, iHandleOld, i;//, clk = clock();
assert( p->pBins != NULL );
-// Abc_Print( 1, "Resizing names manager hash table from %6d to %6d. ", p->nBins, Gia_PrimeCudd( 3 * p->nBins ) );
+// Abc_Print( 1, "Resizing names manager hash table from %6d to %6d. ", p->nBins, Abc_PrimeCudd( 3 * p->nBins ) );
// replace the table
pBinsOld = p->pBins;
p->nBins = Abc_PrimeCudd( 3 * p->nBins );
diff --git a/src/misc/util/utilNam.h b/src/misc/util/utilNam.h
index ae2c099c..fd29e537 100644
--- a/src/misc/util/utilNam.h
+++ b/src/misc/util/utilNam.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __UTIL_NAM_H__
-#define __UTIL_NAM_H__
+#ifndef ABC__misc__util__utilNam_h
+#define ABC__misc__util__utilNam_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/util/utilSignal.c b/src/misc/util/utilSignal.c
index 2886f69b..af0948bd 100644
--- a/src/misc/util/utilSignal.c
+++ b/src/misc/util/utilSignal.c
@@ -20,6 +20,8 @@
#include <stdio.h>
#include <stdlib.h>
+#include <string.h>
+
#include "abc_global.h"
#include "utilSignal.h"
diff --git a/src/misc/util/utilSignal.h b/src/misc/util/utilSignal.h
index 0ac87290..b29def80 100644
--- a/src/misc/util/utilSignal.h
+++ b/src/misc/util/utilSignal.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __UTIL_SIGNAL_H__
-#define __UTIL_SIGNAL_H__
+#ifndef ABC__misc__util__utilSignal_h
+#define ABC__misc__util__utilSignal_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
diff --git a/src/misc/util/util_hack.h b/src/misc/util/util_hack.h
index 1a734f03..9c702bfe 100644
--- a/src/misc/util/util_hack.h
+++ b/src/misc/util/util_hack.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __UTIL_HACK_H__
-#define __UTIL_HACK_H__
+#ifndef ABC__misc__util__util_hack_h
+#define ABC__misc__util__util_hack_h
#include <stdio.h>
#include <stdlib.h>
diff --git a/src/misc/vec/vec.h b/src/misc/vec/vec.h
index da5fc866..c02cafeb 100644
--- a/src/misc/vec/vec.h
+++ b/src/misc/vec/vec.h
@@ -18,15 +18,15 @@
***********************************************************************/
-#ifndef __VEC_H__
-#define __VEC_H__
+#ifndef ABC__misc__vec__vec_h
+#define ABC__misc__vec__vec_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "vecInt.h"
#include "vecFlt.h"
diff --git a/src/misc/vec/vecAtt.h b/src/misc/vec/vecAtt.h
index 60b2d17a..63dd4779 100644
--- a/src/misc/vec/vecAtt.h
+++ b/src/misc/vec/vecAtt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __VEC_ATT_H__
-#define __VEC_ATT_H__
+#ifndef ABC__misc__vec__vecAtt_h
+#define ABC__misc__vec__vecAtt_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/vec/vecBit.h b/src/misc/vec/vecBit.h
index 802486d9..7f0d7409 100644
--- a/src/misc/vec/vecBit.h
+++ b/src/misc/vec/vecBit.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __VEC_BIT_H__
-#define __VEC_BIT_H__
+#ifndef ABC__misc__vec__vecBit_h
+#define ABC__misc__vec__vecBit_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/vec/vecFlt.h b/src/misc/vec/vecFlt.h
index 8273b033..0ad6da27 100644
--- a/src/misc/vec/vecFlt.h
+++ b/src/misc/vec/vecFlt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __VEC_FLT_H__
-#define __VEC_FLT_H__
+#ifndef ABC__misc__vec__vecFlt_h
+#define ABC__misc__vec__vecFlt_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/vec/vecInt.h b/src/misc/vec/vecInt.h
index 0d0c24a8..0d18f973 100644
--- a/src/misc/vec/vecInt.h
+++ b/src/misc/vec/vecInt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __VEC_INT_H__
-#define __VEC_INT_H__
+#ifndef ABC__misc__vec__vecInt_h
+#define ABC__misc__vec__vecInt_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/vec/vecPtr.h b/src/misc/vec/vecPtr.h
index fe4b00b2..afad09d1 100644
--- a/src/misc/vec/vecPtr.h
+++ b/src/misc/vec/vecPtr.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __VEC_PTR_H__
-#define __VEC_PTR_H__
+#ifndef ABC__misc__vec__vecPtr_h
+#define ABC__misc__vec__vecPtr_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/vec/vecStr.h b/src/misc/vec/vecStr.h
index c92760f2..cec3e7e1 100644
--- a/src/misc/vec/vecStr.h
+++ b/src/misc/vec/vecStr.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __VEC_STR_H__
-#define __VEC_STR_H__
+#ifndef ABC__misc__vec__vecStr_h
+#define ABC__misc__vec__vecStr_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/vec/vecVec.h b/src/misc/vec/vecVec.h
index 91713291..f72bd93c 100644
--- a/src/misc/vec/vecVec.h
+++ b/src/misc/vec/vecVec.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __VEC_VEC_H__
-#define __VEC_VEC_H__
+#ifndef ABC__misc__vec__vecVec_h
+#define ABC__misc__vec__vecVec_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/vec/vecWrd.h b/src/misc/vec/vecWrd.h
index 94449262..ab8e8306 100644
--- a/src/misc/vec/vecWrd.h
+++ b/src/misc/vec/vecWrd.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __VEC_WRD_H__
-#define __VEC_WRD_H__
+#ifndef ABC__misc__vec__vecWrd_h
+#define ABC__misc__vec__vecWrd_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/misc/zlib/adler32.c b/src/misc/zlib/adler32.c
index 7783d96c..10208ab4 100644
--- a/src/misc/zlib/adler32.c
+++ b/src/misc/zlib/adler32.c
@@ -8,7 +8,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "zutil.h"
diff --git a/src/misc/zlib/crc32.c b/src/misc/zlib/crc32.c
index 749480ef..6c33b549 100644
--- a/src/misc/zlib/crc32.c
+++ b/src/misc/zlib/crc32.c
@@ -29,7 +29,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "zutil.h" /* for STDC and FAR definitions */
diff --git a/src/misc/zlib/deflate.c b/src/misc/zlib/deflate.c
index ceeeed06..e47050bd 100644
--- a/src/misc/zlib/deflate.c
+++ b/src/misc/zlib/deflate.c
@@ -52,7 +52,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "deflate.h"
diff --git a/src/misc/zlib/gzclose.c b/src/misc/zlib/gzclose.c
index 07d6e0d9..6cd8dc3d 100644
--- a/src/misc/zlib/gzclose.c
+++ b/src/misc/zlib/gzclose.c
@@ -6,7 +6,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "gzguts.h"
diff --git a/src/misc/zlib/gzguts.h b/src/misc/zlib/gzguts.h
index 7334b92e..f95db6c2 100644
--- a/src/misc/zlib/gzguts.h
+++ b/src/misc/zlib/gzguts.h
@@ -61,7 +61,7 @@
#endif
#include <stdio.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/misc/zlib/gzlib.c b/src/misc/zlib/gzlib.c
index 1d88baa4..4d6fdfd0 100644
--- a/src/misc/zlib/gzlib.c
+++ b/src/misc/zlib/gzlib.c
@@ -6,7 +6,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "gzguts.h"
diff --git a/src/misc/zlib/gzread.c b/src/misc/zlib/gzread.c
index 7abe5d9c..6a4d13b6 100644
--- a/src/misc/zlib/gzread.c
+++ b/src/misc/zlib/gzread.c
@@ -6,7 +6,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "gzguts.h"
diff --git a/src/misc/zlib/gzwrite.c b/src/misc/zlib/gzwrite.c
index bf96602c..f7482615 100644
--- a/src/misc/zlib/gzwrite.c
+++ b/src/misc/zlib/gzwrite.c
@@ -6,7 +6,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "gzguts.h"
diff --git a/src/misc/zlib/infback.c b/src/misc/zlib/infback.c
index 882b2492..7163f99d 100644
--- a/src/misc/zlib/infback.c
+++ b/src/misc/zlib/infback.c
@@ -13,7 +13,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "zutil.h"
#include "inftrees.h"
diff --git a/src/misc/zlib/inffast.c b/src/misc/zlib/inffast.c
index 22bc98d1..fbdf94d0 100644
--- a/src/misc/zlib/inffast.c
+++ b/src/misc/zlib/inffast.c
@@ -6,7 +6,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "zutil.h"
#include "inftrees.h"
diff --git a/src/misc/zlib/inflate.c b/src/misc/zlib/inflate.c
index c68c13f5..04feb237 100644
--- a/src/misc/zlib/inflate.c
+++ b/src/misc/zlib/inflate.c
@@ -83,7 +83,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "zutil.h"
#include "inftrees.h"
diff --git a/src/misc/zlib/inftrees.c b/src/misc/zlib/inftrees.c
index ad631f85..a73e58a8 100644
--- a/src/misc/zlib/inftrees.c
+++ b/src/misc/zlib/inftrees.c
@@ -6,7 +6,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "zutil.h"
#include "inftrees.h"
diff --git a/src/misc/zlib/trees.c b/src/misc/zlib/trees.c
index e107ba04..a7365594 100644
--- a/src/misc/zlib/trees.c
+++ b/src/misc/zlib/trees.c
@@ -37,7 +37,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "deflate.h"
diff --git a/src/misc/zlib/uncompr.c b/src/misc/zlib/uncompr.c
index e195ec3e..cf021273 100644
--- a/src/misc/zlib/uncompr.c
+++ b/src/misc/zlib/uncompr.c
@@ -8,7 +8,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#define ZLIB_INTERNAL
#include "zlib.h"
diff --git a/src/misc/zlib/zlib.h b/src/misc/zlib/zlib.h
index 58ff1d15..94825b55 100644
--- a/src/misc/zlib/zlib.h
+++ b/src/misc/zlib/zlib.h
@@ -32,7 +32,10 @@
#define ZLIB_H
#include <stdio.h>
-#include "abc_global.h"
+#include <stdlib.h>
+#include <string.h>
+
+#include "src/misc/util/abc_global.h"
#include "zconf.h"
diff --git a/src/misc/zlib/zutil.c b/src/misc/zlib/zutil.c
index 17a906d8..b74b21ea 100644
--- a/src/misc/zlib/zutil.c
+++ b/src/misc/zlib/zutil.c
@@ -8,7 +8,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "zutil.h"
diff --git a/src/aig/cgt/cgt.h b/src/opt/cgt/cgt.h
index aa8f9338..73edbfc3 100644
--- a/src/aig/cgt/cgt.h
+++ b/src/opt/cgt/cgt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __CGT_H__
-#define __CGT_H__
+#ifndef ABC__aig__cgt__cgt_h
+#define ABC__aig__cgt__cgt_h
/*
diff --git a/src/aig/cgt/cgtAig.c b/src/opt/cgt/cgtAig.c
index 428fcd1a..757ebb85 100644
--- a/src/aig/cgt/cgtAig.c
+++ b/src/opt/cgt/cgtAig.c
@@ -271,7 +271,7 @@ Aig_Man_t * Cgt_ManDeriveAigForGating( Cgt_Man_t * p )
int i;
assert( Aig_ManRegNum(p->pAig) );
pNew = Aig_ManStart( Aig_ManObjNumMax(p->pAig) );
- pNew->pName = Aig_UtilStrsav( "CG_miter" );
+ pNew->pName = Abc_UtilStrsav( "CG_miter" );
// build the first frame
Aig_ManConst1(p->pAig)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p->pAig, pObj, i )
@@ -449,7 +449,7 @@ Aig_Man_t * Cgt_ManDupPartition( Aig_Man_t * pFrame, int nVarsMin, int nFlopsMin
vLeaves = Vec_PtrAlloc( 100 );
vPos = Vec_PtrAlloc( 100 );
pNew = Aig_ManStart( nVarsMin );
- pNew->pName = Aig_UtilStrsav( "partition" );
+ pNew->pName = Abc_UtilStrsav( "partition" );
Aig_ManIncrementTravId( pFrame );
Aig_ManConst1(pFrame)->pData = Aig_ManConst1(pNew);
Aig_ObjSetTravIdCurrent( pFrame, Aig_ManConst1(pFrame) );
@@ -539,8 +539,8 @@ Aig_Man_t * Cgt_ManDeriveGatedAig( Aig_Man_t * pAig, Vec_Vec_t * vGates, int fRe
// construct AIG
assert( Aig_ManRegNum(pAig) );
pNew = Aig_ManStart( Aig_ManObjNumMax(pAig) );
- pNew->pName = Aig_UtilStrsav( pAig->pName );
- pNew->pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pNew->pName = Abc_UtilStrsav( pAig->pName );
+ pNew->pSpec = Abc_UtilStrsav( pAig->pSpec );
Aig_ManConst1(pAig)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( pAig, pObj, i )
pObj->pData = Aig_ObjCreatePi( pNew );
diff --git a/src/aig/cgt/cgtCore.c b/src/opt/cgt/cgtCore.c
index d4229ce6..958080c9 100644
--- a/src/aig/cgt/cgtCore.c
+++ b/src/opt/cgt/cgtCore.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "cgtInt.h"
-#include "bar.h"
+#include "src/misc/bar/bar.h"
ABC_NAMESPACE_IMPL_START
@@ -70,7 +70,7 @@ void Cgt_SetDefaultParams( Cgt_Par_t * p )
int Cgt_SimulationFilter( Cgt_Man_t * p, Aig_Obj_t * pCandPart, Aig_Obj_t * pMiterPart )
{
unsigned * pInfoCand, * pInfoMiter;
- int w, nWords = Aig_BitWordNum( p->nPatts );
+ int w, nWords = Abc_BitWordNum( p->nPatts );
pInfoCand = (unsigned *)Vec_PtrEntry( p->vPatts, Aig_ObjId(Aig_Regular(pCandPart)) );
pInfoMiter = (unsigned *)Vec_PtrEntry( p->vPatts, Aig_ObjId(pMiterPart) );
// C => !M -- true is the same as C & M -- false
@@ -106,7 +106,7 @@ void Cgt_SimulationRecord( Cgt_Man_t * p )
int i;
Aig_ManForEachObj( p->pPart, pObj, i )
if ( sat_solver_var_value( p->pSat, p->pCnf->pVarNums[i] ) )
- Aig_InfoSetBit( (unsigned *)Vec_PtrEntry(p->vPatts, i), p->nPatts );
+ Abc_InfoSetBit( (unsigned *)Vec_PtrEntry(p->vPatts, i), p->nPatts );
p->nPatts++;
if ( p->nPatts == 32 * p->nPattWords )
{
diff --git a/src/aig/cgt/cgtDecide.c b/src/opt/cgt/cgtDecide.c
index 383ff970..293bde85 100644
--- a/src/aig/cgt/cgtDecide.c
+++ b/src/opt/cgt/cgtDecide.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "cgtInt.h"
-#include "sswInt.h"
+#include "src/proof/ssw/sswInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/cgt/cgtInt.h b/src/opt/cgt/cgtInt.h
index 8cce2381..1fdbf35f 100644
--- a/src/aig/cgt/cgtInt.h
+++ b/src/opt/cgt/cgtInt.h
@@ -18,17 +18,17 @@
***********************************************************************/
-#ifndef __CGT_INT_H__
-#define __CGT_INT_H__
+#ifndef ABC__aig__cgt__cgtInt_h
+#define ABC__aig__cgt__cgtInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "saig.h"
-#include "satSolver.h"
-#include "cnf.h"
+#include "src/aig/saig/saig.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/cnf/cnf.h"
#include "cgt.h"
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/cgt/cgtMan.c b/src/opt/cgt/cgtMan.c
index 7744226d..7744226d 100644
--- a/src/aig/cgt/cgtMan.c
+++ b/src/opt/cgt/cgtMan.c
diff --git a/src/aig/cgt/cgtSat.c b/src/opt/cgt/cgtSat.c
index 0a2a1daa..0a2a1daa 100644
--- a/src/aig/cgt/cgtSat.c
+++ b/src/opt/cgt/cgtSat.c
diff --git a/src/opt/cgt/module.make b/src/opt/cgt/module.make
new file mode 100644
index 00000000..68494e68
--- /dev/null
+++ b/src/opt/cgt/module.make
@@ -0,0 +1,5 @@
+SRC += src/opt/cgt/cgtAig.c \
+ src/opt/cgt/cgtCore.c \
+ src/opt/cgt/cgtDecide.c \
+ src/opt/cgt/cgtMan.c \
+ src/opt/cgt/cgtSat.c
diff --git a/src/aig/csw/csw.h b/src/opt/csw/csw.h
index c1bf7a73..f590ec62 100644
--- a/src/aig/csw/csw.h
+++ b/src/opt/csw/csw.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __CSW_H__
-#define __CSW_H__
+#ifndef ABC__aig__csw__csw_h
+#define ABC__aig__csw__csw_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/csw/cswCore.c b/src/opt/csw/cswCore.c
index e1bdca00..e1bdca00 100644
--- a/src/aig/csw/cswCore.c
+++ b/src/opt/csw/cswCore.c
diff --git a/src/aig/csw/cswCut.c b/src/opt/csw/cswCut.c
index bb6677c2..bb6677c2 100644
--- a/src/aig/csw/cswCut.c
+++ b/src/opt/csw/cswCut.c
diff --git a/src/aig/csw/cswInt.h b/src/opt/csw/cswInt.h
index 3a06f3f1..e6c10b36 100644
--- a/src/aig/csw/cswInt.h
+++ b/src/opt/csw/cswInt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __CSW_INT_H__
-#define __CSW_INT_H__
+#ifndef ABC__aig__csw__cswInt_h
+#define ABC__aig__csw__cswInt_h
////////////////////////////////////////////////////////////////////////
@@ -32,9 +32,9 @@
#include <assert.h>
#include <time.h>
-#include "aig.h"
-#include "dar.h"
-#include "kit.h"
+#include "src/aig/aig/aig.h"
+#include "src/opt/dar/dar.h"
+#include "src/bool/kit/kit.h"
#include "csw.h"
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/csw/cswMan.c b/src/opt/csw/cswMan.c
index 8b6e538b..5df69492 100644
--- a/src/aig/csw/cswMan.c
+++ b/src/opt/csw/cswMan.c
@@ -66,11 +66,11 @@ Csw_Man_t * Csw_ManStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, int fVer
memset( p->pCuts, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pMan) );
memset( p->pnRefs, 0, sizeof(int) * Aig_ManObjNumMax(pMan) );
// allocate memory manager
- p->nTruthWords = Aig_TruthWordNum(nLeafMax);
+ p->nTruthWords = Abc_TruthWordNum(nLeafMax);
p->nCutSize = sizeof(Csw_Cut_t) + sizeof(int) * nLeafMax + sizeof(unsigned) * p->nTruthWords;
p->pMemCuts = Aig_MmFixedStart( p->nCutSize * p->nCutsMax, 512 );
// allocate hash table for cuts
- p->nTableSize = Aig_PrimeCudd( Aig_ManNodeNum(pMan) * p->nCutsMax / 2 );
+ p->nTableSize = Abc_PrimeCudd( Aig_ManNodeNum(pMan) * p->nCutsMax / 2 );
p->pTable = ABC_ALLOC( Csw_Cut_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
// set the pointers to the available fraig nodes
diff --git a/src/aig/csw/cswTable.c b/src/opt/csw/cswTable.c
index 9bab0a01..9bab0a01 100644
--- a/src/aig/csw/cswTable.c
+++ b/src/opt/csw/cswTable.c
diff --git a/src/aig/csw/csw_.c b/src/opt/csw/csw_.c
index c12607d3..c12607d3 100644
--- a/src/aig/csw/csw_.c
+++ b/src/opt/csw/csw_.c
diff --git a/src/opt/csw/module.make b/src/opt/csw/module.make
new file mode 100644
index 00000000..501f92aa
--- /dev/null
+++ b/src/opt/csw/module.make
@@ -0,0 +1,4 @@
+SRC += src/opt/csw/cswCore.c \
+ src/opt/csw/cswCut.c \
+ src/opt/csw/cswMan.c \
+ src/opt/csw/cswTable.c
diff --git a/src/opt/cut/abcCut.c b/src/opt/cut/abcCut.c
index 3b80fe8d..0b57b844 100644
--- a/src/opt/cut/abcCut.c
+++ b/src/opt/cut/abcCut.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "base/abc/abc.h"
#include "cut.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/cut/cut.h b/src/opt/cut/cut.h
index 2ba3e341..cd87e5a0 100644
--- a/src/opt/cut/cut.h
+++ b/src/opt/cut/cut.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __CUT_H__
-#define __CUT_H__
+#ifndef ABC__opt__cut__cut_h
+#define ABC__opt__cut__cut_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/opt/cut/cutInt.h b/src/opt/cut/cutInt.h
index 4705c019..39606b00 100644
--- a/src/opt/cut/cutInt.h
+++ b/src/opt/cut/cutInt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __CUT_INT_H__
-#define __CUT_INT_H__
+#ifndef ABC__opt__cut__cutInt_h
+#define ABC__opt__cut__cutInt_h
////////////////////////////////////////////////////////////////////////
@@ -27,8 +27,8 @@
////////////////////////////////////////////////////////////////////////
#include <stdio.h>
-#include "extra.h"
-#include "vec.h"
+#include "src/misc/extra/extra.h"
+#include "src/misc/vec/vec.h"
#include "cut.h"
#include "cutList.h"
diff --git a/src/opt/cut/cutList.h b/src/opt/cut/cutList.h
index 0f0ccedf..3da27134 100644
--- a/src/opt/cut/cutList.h
+++ b/src/opt/cut/cutList.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __CUT_LIST_H__
-#define __CUT_LIST_H__
+#ifndef ABC__opt__cut__cutList_h
+#define ABC__opt__cut__cutList_h
ABC_NAMESPACE_HEADER_START
diff --git a/src/opt/cut/cutPre22.c b/src/opt/cut/cutPre22.c
index fdb9bd8c..d51d9056 100644
--- a/src/opt/cut/cutPre22.c
+++ b/src/opt/cut/cutPre22.c
@@ -192,7 +192,7 @@ void Cut_CellLoad()
// derive the cell
pCell = (Cut_Cell_t *)Extra_MmFixedEntryFetch( p->pMem );
memset( pCell, 0, sizeof(Cut_Cell_t) );
- pCell->nVars = Extra_Base2Log(Length*4);
+ pCell->nVars = Abc_Base2Log(Length*4);
pCell->nUsed = 1;
// Extra_TruthCopy( pCell->uTruth, pTruth, nVars );
Extra_ReadHexadecimal( pCell->uTruth, pString, pCell->nVars );
diff --git a/src/aig/dar/dar.h b/src/opt/dar/dar.h
index 0a3b5eb7..5c2c9bcc 100644
--- a/src/aig/dar/dar.h
+++ b/src/opt/dar/dar.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __DAR_H__
-#define __DAR_H__
+#ifndef ABC__aig__dar__dar_h
+#define ABC__aig__dar__dar_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/dar/darBalance.c b/src/opt/dar/darBalance.c
index 6e9e7e21..56ec51fa 100644
--- a/src/aig/dar/darBalance.c
+++ b/src/opt/dar/darBalance.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "darInt.h"
-#include "tim.h"
+#include "src/misc/tim/tim.h"
ABC_NAMESPACE_IMPL_START
@@ -475,8 +475,8 @@ Aig_Man_t * Dar_ManBalance( Aig_Man_t * p, int fUpdateLevel )
assert( Aig_ManVerifyTopoOrder(p) );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
pNew->nAsserts = p->nAsserts;
pNew->nConstrs = p->nConstrs;
if ( p->vFlopNums )
diff --git a/src/aig/dar/darCore.c b/src/opt/dar/darCore.c
index 6ca3082d..6ca3082d 100644
--- a/src/aig/dar/darCore.c
+++ b/src/opt/dar/darCore.c
diff --git a/src/aig/dar/darCut.c b/src/opt/dar/darCut.c
index b272b388..b272b388 100644
--- a/src/aig/dar/darCut.c
+++ b/src/opt/dar/darCut.c
diff --git a/src/aig/dar/darData.c b/src/opt/dar/darData.c
index 17963c4a..8257f4bb 100644
--- a/src/aig/dar/darData.c
+++ b/src/opt/dar/darData.c
@@ -11145,7 +11145,7 @@ Vec_Int_t * Dar_LibReadPrios()
#if 0
-#include "abc.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/dar/darInt.h b/src/opt/dar/darInt.h
index 23e89d3c..08af70df 100644
--- a/src/aig/dar/darInt.h
+++ b/src/opt/dar/darInt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __DAR_INT_H__
-#define __DAR_INT_H__
+#ifndef ABC__aig__dar__darInt_h
+#define ABC__aig__dar__darInt_h
////////////////////////////////////////////////////////////////////////
@@ -33,8 +33,8 @@
#include <time.h>
//#include "bar.h"
-#include "vec.h"
-#include "aig.h"
+#include "src/misc/vec/vec.h"
+#include "src/aig/aig/aig.h"
#include "dar.h"
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/dar/darLib.c b/src/opt/dar/darLib.c
index bf78577c..2d047404 100644
--- a/src/aig/dar/darLib.c
+++ b/src/opt/dar/darLib.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "darInt.h"
-#include "gia.h"
+#include "src/aig/gia/gia.h"
#include "dar.h"
ABC_NAMESPACE_IMPL_START
@@ -496,7 +496,7 @@ void Dar_LibPrepare( int nSubgraphs )
if ( i == 1 ) // special classes
p->nSubgr0[i] = p->nSubgr[i];
else
- p->nSubgr0[i] = ABC_MIN( p->nSubgr[i], nSubgraphs );
+ p->nSubgr0[i] = Abc_MinInt( p->nSubgr[i], nSubgraphs );
p->nSubgr0Total += p->nSubgr0[i];
for ( k = 0; k < p->nSubgr0[i]; k++ )
p->pSubgr0[i][k] = p->pSubgr[i][ p->pPrios[i][k] ];
@@ -518,7 +518,7 @@ void Dar_LibPrepare( int nSubgraphs )
for ( k = 0; k < p->nSubgr0[i]; k++ )
Dar_LibSetup0_rec( p, Dar_LibObj(p, p->pSubgr0[i][k]), i, 0 );
p->nNodes0Total += p->nNodes0[i];
- p->nNodes0Max = ABC_MAX( p->nNodes0Max, p->nNodes0[i] );
+ p->nNodes0Max = Abc_MaxInt( p->nNodes0Max, p->nNodes0[i] );
}
// clean node counters
@@ -726,7 +726,7 @@ int Dar_LibCutMatch( Dar_Man_t * p, Dar_Cut_t * pCut )
// copy the propability of node being one
if ( p->pPars->fPower )
{
- float Prob = Aig_Int2Float( Vec_IntEntry( p->pAig->vProbs, Aig_ObjId(Aig_Regular(pFanin)) ) );
+ float Prob = Abc_Int2Float( Vec_IntEntry( p->pAig->vProbs, Aig_ObjId(Aig_Regular(pFanin)) ) );
s_DarLib->pDatas[i].dProb = Aig_IsComplement(pFanin)? 1.0-Prob : Prob;
}
}
@@ -823,7 +823,7 @@ void Dar_LibEvalAssignNums( Dar_Man_t * p, int Class, Aig_Obj_t * pRoot )
assert( (int)Dar_LibObj(s_DarLib, pObj->Fan1)->Num < s_DarLib->nNodes0Max + 4 );
pData0 = s_DarLib->pDatas + Dar_LibObj(s_DarLib, pObj->Fan0)->Num;
pData1 = s_DarLib->pDatas + Dar_LibObj(s_DarLib, pObj->Fan1)->Num;
- pData->Level = 1 + ABC_MAX(pData0->Level, pData1->Level);
+ pData->Level = 1 + Abc_MaxInt(pData0->Level, pData1->Level);
if ( pData0->pFunc == NULL || pData1->pFunc == NULL )
continue;
pFanin0 = Aig_NotCond( pData0->pFunc, pObj->fCompl0 );
@@ -840,7 +840,7 @@ void Dar_LibEvalAssignNums( Dar_Man_t * p, int Class, Aig_Obj_t * pRoot )
// assign the probability
if ( p->pPars->fPower )
{
- float Prob = Aig_Int2Float( Vec_IntEntry( p->pAig->vProbs, Aig_ObjId(Aig_Regular(pData->pFunc)) ) );
+ float Prob = Abc_Int2Float( Vec_IntEntry( p->pAig->vProbs, Aig_ObjId(Aig_Regular(pData->pFunc)) ) );
pData->dProb = Aig_IsComplement(pData->pFunc)? 1.0-Prob : Prob;
}
}
@@ -1066,7 +1066,7 @@ int Dar2_LibCutMatch( Gia_Man_t * p, Vec_Int_t * vCutLits, unsigned uTruth )
// pFanin = Gia_ManObj( p, pCut->pLeaves[ (int)pPerm[i] ] );
// pFanin = Gia_ManObj( p, Vec_IntEntry( vCutLits, (int)pPerm[i] ) );
// pFanin = Gia_ObjFromLit( p, Vec_IntEntry( vCutLits, (int)pPerm[i] ) );
- s_DarLib->pDatas[i].iGunc = Gia_LitNotCond( Vec_IntEntry(vCutLits, (int)pPerm[i]), ((uPhase >> i) & 1) );
+ s_DarLib->pDatas[i].iGunc = Abc_LitNotCond( Vec_IntEntry(vCutLits, (int)pPerm[i]), ((uPhase >> i) & 1) );
s_DarLib->pDatas[i].Level = Gia_ObjLevel( p, Gia_Regular(Gia_ObjFromLit(p, s_DarLib->pDatas[i].iGunc)) );
}
return 1;
@@ -1104,13 +1104,13 @@ void Dar2_LibEvalAssignNums( Gia_Man_t * p, int Class )
assert( (int)Dar_LibObj(s_DarLib, pObj->Fan1)->Num < s_DarLib->nNodes0Max + 4 );
pData0 = s_DarLib->pDatas + Dar_LibObj(s_DarLib, pObj->Fan0)->Num;
pData1 = s_DarLib->pDatas + Dar_LibObj(s_DarLib, pObj->Fan1)->Num;
- pData->Level = 1 + ABC_MAX(pData0->Level, pData1->Level);
+ pData->Level = 1 + Abc_MaxInt(pData0->Level, pData1->Level);
if ( pData0->iGunc == -1 || pData1->iGunc == -1 )
continue;
- iFanin0 = Gia_LitNotCond( pData0->iGunc, pObj->fCompl0 );
- iFanin1 = Gia_LitNotCond( pData1->iGunc, pObj->fCompl1 );
+ iFanin0 = Abc_LitNotCond( pData0->iGunc, pObj->fCompl0 );
+ iFanin1 = Abc_LitNotCond( pData1->iGunc, pObj->fCompl1 );
// compute the resulting literal
- if ( iFanin0 == 0 || iFanin1 == 0 || iFanin0 == Gia_LitNot(iFanin1) )
+ if ( iFanin0 == 0 || iFanin1 == 0 || iFanin0 == Abc_LitNot(iFanin1) )
iLit = 0;
else if ( iFanin0 == 1 || iFanin0 == iFanin1 )
iLit = iFanin1;
@@ -1282,10 +1282,10 @@ int Dar2_LibBuildBest_rec( Gia_Man_t * p, Dar_LibObj_t * pObj )
return pData->iGunc;
iFanin0 = Dar2_LibBuildBest_rec( p, Dar_LibObj(s_DarLib, pObj->Fan0) );
iFanin1 = Dar2_LibBuildBest_rec( p, Dar_LibObj(s_DarLib, pObj->Fan1) );
- iFanin0 = Gia_LitNotCond( iFanin0, pObj->fCompl0 );
- iFanin1 = Gia_LitNotCond( iFanin1, pObj->fCompl1 );
+ iFanin0 = Abc_LitNotCond( iFanin0, pObj->fCompl0 );
+ iFanin1 = Abc_LitNotCond( iFanin1, pObj->fCompl1 );
pData->iGunc = Gia_ManHashAnd( p, iFanin0, iFanin1 );
- pNode = Gia_ManObj( p, Gia_Lit2Var(pData->iGunc) );
+ pNode = Gia_ManObj( p, Abc_Lit2Var(pData->iGunc) );
if ( Gia_ObjIsAnd( pNode ) )
Gia_ObjSetAndLevel( p, pNode );
Gia_ObjSetPhase( pNode );
diff --git a/src/aig/dar/darMan.c b/src/opt/dar/darMan.c
index 59150103..5a3e0687 100644
--- a/src/aig/dar/darMan.c
+++ b/src/opt/dar/darMan.c
@@ -144,7 +144,7 @@ void Dar_ManPrintStats( Dar_Man_t * p )
ABC_NAMESPACE_IMPL_END
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/dar/darPrec.c b/src/opt/dar/darPrec.c
index 4d164123..4d164123 100644
--- a/src/aig/dar/darPrec.c
+++ b/src/opt/dar/darPrec.c
diff --git a/src/aig/dar/darRefact.c b/src/opt/dar/darRefact.c
index d13856ba..60364358 100644
--- a/src/aig/dar/darRefact.c
+++ b/src/opt/dar/darRefact.c
@@ -19,10 +19,10 @@
***********************************************************************/
#include "darInt.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
-#include "bdc.h"
-#include "bdcInt.h"
+#include "src/bool/bdc/bdc.h"
+#include "src/bool/bdc/bdcInt.h"
ABC_NAMESPACE_IMPL_START
@@ -270,7 +270,7 @@ int Dar_RefactTryGraph( Aig_Man_t * pAig, Aig_Obj_t * pRoot, Vec_Ptr_t * vCut, K
return -1;
}
// count the number of new levels
- LevelNew = 1 + ABC_MAX( pNode0->Level, pNode1->Level );
+ LevelNew = 1 + Abc_MaxInt( pNode0->Level, pNode1->Level );
if ( pAnd )
{
if ( Aig_Regular(pAnd) == Aig_ManConst1(pAig) )
@@ -530,7 +530,7 @@ int Dar_ManRefactor( Aig_Man_t * pAig, Dar_RefPar_t * pPars )
//printf( "\nConsidering node %d.\n", pObj->Id );
// get the bounded MFFC size
clk = clock();
- nLevelMin = ABC_MAX( 0, Aig_ObjLevel(pObj) - 10 );
+ nLevelMin = Abc_MaxInt( 0, Aig_ObjLevel(pObj) - 10 );
nNodesSaved = Aig_NodeMffcSupp( pAig, pObj, nLevelMin, vCut );
if ( nNodesSaved < p->pPars->nMffcMin ) // too small to consider
{
diff --git a/src/aig/dar/darResub.c b/src/opt/dar/darResub.c
index 44367207..44367207 100644
--- a/src/aig/dar/darResub.c
+++ b/src/opt/dar/darResub.c
diff --git a/src/aig/dar/darScript.c b/src/opt/dar/darScript.c
index 884eed07..79d6dfc4 100644
--- a/src/aig/dar/darScript.c
+++ b/src/opt/dar/darScript.c
@@ -19,9 +19,9 @@
***********************************************************************/
#include "darInt.h"
-#include "dch.h"
-#include "gia.h"
-#include "giaAig.h"
+#include "src/proof/dch/dch.h"
+#include "src/aig/gia/gia.h"
+#include "src/aig/gia/giaAig.h"
ABC_NAMESPACE_IMPL_START
@@ -764,8 +764,8 @@ clk = clock();
Aig_ManChoiceLevel( pMan );
ABC_FREE( pMan->pName );
ABC_FREE( pMan->pSpec );
- pMan->pName = Aig_UtilStrsav( pTemp->pName );
- pMan->pSpec = Aig_UtilStrsav( pTemp->pSpec );
+ pMan->pName = Abc_UtilStrsav( pTemp->pName );
+ pMan->pSpec = Abc_UtilStrsav( pTemp->pSpec );
// cleanup
Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pTemp, i )
@@ -827,8 +827,8 @@ pPars->timeSynth = clock() - clk;
// save useful things
pManTime = pAig->pManTime; pAig->pManTime = NULL;
- pName = Aig_UtilStrsav( pAig->pName );
- pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pName = Abc_UtilStrsav( pAig->pName );
+ pSpec = Abc_UtilStrsav( pAig->pSpec );
// create guidence
vPios = Aig_ManOrderPios( pMan, pAig );
@@ -877,8 +877,8 @@ Aig_Man_t * Dar_ManChoiceNew( Aig_Man_t * pAig, Dch_Pars_t * pPars )
// save useful things
pManTime = pAig->pManTime; pAig->pManTime = NULL;
- pName = Aig_UtilStrsav( pAig->pName );
- pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pName = Abc_UtilStrsav( pAig->pName );
+ pSpec = Abc_UtilStrsav( pAig->pSpec );
// perform synthesis
clk = clock();
diff --git a/src/aig/dar/dar_.c b/src/opt/dar/dar_.c
index 323abed2..323abed2 100644
--- a/src/aig/dar/dar_.c
+++ b/src/opt/dar/dar_.c
diff --git a/src/opt/dar/module.make b/src/opt/dar/module.make
new file mode 100644
index 00000000..ef9ddbd5
--- /dev/null
+++ b/src/opt/dar/module.make
@@ -0,0 +1,10 @@
+SRC += src/opt/dar/darBalance.c \
+ src/opt/dar/darCore.c \
+ src/opt/dar/darCut.c \
+ src/opt/dar/darData.c \
+ src/opt/dar/darLib.c \
+ src/opt/dar/darMan.c \
+ src/opt/dar/darPrec.c \
+ src/opt/dar/darRefact.c \
+ src/opt/dar/darResub.c \
+ src/opt/dar/darScript.c
diff --git a/src/opt/dec/module.make b/src/opt/dec/module.make
deleted file mode 100644
index 1e0722d5..00000000
--- a/src/opt/dec/module.make
+++ /dev/null
@@ -1,5 +0,0 @@
-SRC += src/opt/dec/decAbc.c \
- src/opt/dec/decFactor.c \
- src/opt/dec/decMan.c \
- src/opt/dec/decPrint.c \
- src/opt/dec/decUtil.c
diff --git a/src/opt/fret/fretFlow.c b/src/opt/fret/fretFlow.c
deleted file mode 100644
index 498cb962..00000000
--- a/src/opt/fret/fretFlow.c
+++ /dev/null
@@ -1,702 +0,0 @@
-/**CFile****************************************************************
-
- FileName [fretFlow.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Flow-based retiming package.]
-
- Synopsis [Max-flow computation.]
-
- Author [Aaron Hurst]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - January 1, 2008.]
-
- Revision [$Id: fretFlow.c,v 1.00 2008/01/01 00:00:00 ahurst Exp $]
-
-***********************************************************************/
-
-#include "abc.h"
-#include "vec.h"
-#include "fretime.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-static void dfsfast_e_retreat( Abc_Obj_t *pObj );
-static void dfsfast_r_retreat( Abc_Obj_t *pObj );
-
-#define FDIST(xn, xe, yn, ye) (FDATA(xn)->xe##_dist == (FDATA(yn)->ye##_dist + 1))
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Fast DFS.]
-
- Description [Uses sink-distance-histogram heuristic. May not find all
- flow paths: this occurs in a small number of cases where
- the flow predecessor points to a non-adjacent node and
- the distance ordering is perturbed.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-
-void dfsfast_preorder( Abc_Ntk_t *pNtk ) {
- Abc_Obj_t *pObj, *pNext;
- Vec_Ptr_t *vTimeIn, *qn = Vec_PtrAlloc(Abc_NtkObjNum(pNtk));
- Vec_Int_t *qe = Vec_IntAlloc(Abc_NtkObjNum(pNtk));
- int i, j, d = 0, end;
- int qpos = 0;
-
- // create reverse timing edges for backward traversal
-#if !defined(IGNORE_TIMING)
- if (pManMR->maxDelay) {
- Vec_PtrForEachEntry( Abc_Obj_t *, pNtk, pObj, i ) {
- Vec_PtrForEachEntry( FTIMEEDGES(pObj), pNext, j ) {
- vTimeIn = FDATA(pNext)->vNodes;
- if (!vTimeIn) {
- vTimeIn = FDATA(pNext)->vNodes = Vec_PtrAlloc(2);
- }
- Vec_PtrPush(vTimeIn, pObj);
- }
- }
- }
-#endif
-
- // clear histogram
- assert(pManMR->vSinkDistHist);
- memset(Vec_IntArray(pManMR->vSinkDistHist), 0, sizeof(int)*Vec_IntSize(pManMR->vSinkDistHist));
-
- // seed queue : latches, PIOs, and blocks
- Vec_PtrForEachEntry( Abc_Obj_t *, pNtk, pObj, i )
- if (Abc_ObjIsPo(pObj) ||
- Abc_ObjIsLatch(pObj) ||
- (pManMR->fIsForward && FTEST(pObj, BLOCK_OR_CONS) & pManMR->constraintMask)) {
- Vec_PtrPush(qn, pObj);
- Vec_IntPush(qe, 'r');
- FDATA(pObj)->r_dist = 1;
- } else if (Abc_ObjIsPi(pObj) ||
- (!pManMR->fIsForward && FTEST(pObj, BLOCK_OR_CONS) & pManMR->constraintMask)) {
- Vec_PtrPush(qn, pObj);
- Vec_IntPush(qe, 'e');
- FDATA(pObj)->e_dist = 1;
- }
-
- // until queue is empty...
- while(qpos < Vec_PtrSize(qn)) {
- pObj = (Abc_Obj_t *)Vec_PtrEntry(qn, qpos);
- assert(pObj);
- end = Vec_IntEntry(qe, qpos);
- qpos++;
-
- if (end == 'r') {
- d = FDATA(pObj)->r_dist;
-
- // 1. structural edges
- if (pManMR->fIsForward) {
- Abc_ObjForEachFanin( pObj, pNext, i )
- if (!FDATA(pNext)->e_dist) {
- FDATA(pNext)->e_dist = d+1;
- Vec_PtrPush(qn, pNext);
- Vec_IntPush(qe, 'e');
- }
- } else
- Abc_ObjForEachFanout( pObj, pNext, i )
- if (!FDATA(pNext)->e_dist) {
- FDATA(pNext)->e_dist = d+1;
- Vec_PtrPush(qn, pNext);
- Vec_IntPush(qe, 'e');
- }
-
- if (d == 1) continue;
-
- // 2. reverse edges (forward retiming only)
- if (pManMR->fIsForward) {
- Abc_ObjForEachFanout( pObj, pNext, i )
- if (!FDATA(pNext)->r_dist && !Abc_ObjIsLatch(pNext)) {
- FDATA(pNext)->r_dist = d+1;
- Vec_PtrPush(qn, pNext);
- Vec_IntPush(qe, 'r');
- }
-
- // 3. timimg edges (forward retiming only)
-#if !defined(IGNORE_TIMING)
- if (pManMR->maxDelay && FDATA(pObj)->vNodes)
- Vec_PtrForEachEntry( FDATA(pObj)->vNodes, pNext, i ) {
- if (!FDATA(pNext)->r_dist) {
- FDATA(pNext)->r_dist = d+1;
- Vec_PtrPush(qn, pNext);
- Vec_IntPush(qe, 'r');
- }
- }
-#endif
- }
-
- } else { // if 'e'
- if (Abc_ObjIsLatch(pObj)) continue;
-
- d = FDATA(pObj)->e_dist;
-
- // 1. through node
- if (!FDATA(pObj)->r_dist) {
- FDATA(pObj)->r_dist = d+1;
- Vec_PtrPush(qn, pObj);
- Vec_IntPush(qe, 'r');
- }
-
- // 2. reverse edges (backward retiming only)
- if (!pManMR->fIsForward) {
- Abc_ObjForEachFanin( pObj, pNext, i )
- if (!FDATA(pNext)->e_dist && !Abc_ObjIsLatch(pNext)) {
- FDATA(pNext)->e_dist = d+1;
- Vec_PtrPush(qn, pNext);
- Vec_IntPush(qe, 'e');
- }
-
- // 3. timimg edges (backward retiming only)
-#if !defined(IGNORE_TIMING)
- if (pManMR->maxDelay && FDATA(pObj)->vNodes)
- Vec_PtrForEachEntry( FDATA(pObj)->vNodes, pNext, i ) {
- if (!FDATA(pNext)->e_dist) {
- FDATA(pNext)->e_dist = d+1;
- Vec_PtrPush(qn, pNext);
- Vec_IntPush(qe, 'e');
- }
- }
-#endif
- }
- }
- }
-
- // free time edges
-#if !defined(IGNORE_TIMING)
- if (pManMR->maxDelay) {
- Vec_PtrForEachEntry( Abc_Obj_t *, pNtk, pObj, i ) {
- vTimeIn = FDATA(pObj)->vNodes;
- if (vTimeIn) {
- Vec_PtrFree(vTimeIn);
- FDATA(pObj)->vNodes = 0;
- }
- }
- }
-#endif
-
- Vec_PtrForEachEntry( Abc_Obj_t *, pNtk, pObj, i ) {
- Vec_IntAddToEntry(pManMR->vSinkDistHist, FDATA(pObj)->r_dist, 1);
- Vec_IntAddToEntry(pManMR->vSinkDistHist, FDATA(pObj)->e_dist, 1);
-
-#ifdef DEBUG_PREORDER
- printf("node %d\t: r=%d\te=%d\n", Abc_ObjId(pObj), FDATA(pObj)->r_dist, FDATA(pObj)->e_dist);
-#endif
- }
-
- // printf("\t\tpre-ordered (max depth=%d)\n", d+1);
-
- // deallocate
- Vec_PtrFree( qn );
- Vec_IntFree( qe );
-}
-
-int dfsfast_e( Abc_Obj_t *pObj, Abc_Obj_t *pPred ) {
- int i;
- Abc_Obj_t *pNext;
-
- if (pManMR->fSinkDistTerminate) return 0;
-
- // have we reached the sink?
- if(FTEST(pObj, BLOCK_OR_CONS) & pManMR->constraintMask ||
- Abc_ObjIsPi(pObj)) {
- assert(pPred);
- assert(!pManMR->fIsForward);
- return 1;
- }
-
- FSET(pObj, VISITED_E);
-
-#ifdef DEBUG_VISITED
- printf("(%de=%d) ", Abc_ObjId(pObj), FDATA(pObj)->e_dist);
-#endif
-
- // 1. structural edges
- if (pManMR->fIsForward)
- Abc_ObjForEachFanout( pObj, pNext, i ) {
- if (!FTEST(pNext, VISITED_R) &&
- FDIST(pObj, e, pNext, r) &&
- dfsfast_r(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("o");
-#endif
- goto found;
- }
- }
- else
- Abc_ObjForEachFanin( pObj, pNext, i ) {
- if (!FTEST(pNext, VISITED_R) &&
- FDIST(pObj, e, pNext, r) &&
- dfsfast_r(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("o");
-#endif
- goto found;
- }
- }
-
- if (Abc_ObjIsLatch(pObj))
- goto not_found;
-
- // 2. reverse edges (backward retiming only)
- if (!pManMR->fIsForward) {
- Abc_ObjForEachFanout( pObj, pNext, i ) {
- if (!FTEST(pNext, VISITED_E) &&
- FDIST(pObj, e, pNext, e) &&
- dfsfast_e(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("i");
-#endif
- goto found;
- }
- }
-
- // 3. timing edges (backward retiming only)
-#if !defined(IGNORE_TIMING)
- if (pManMR->maxDelay)
- Vec_PtrForEachEntry( FTIMEEDGES(pObj), pNext, i) {
- if (!FTEST(pNext, VISITED_E) &&
- FDIST(pObj, e, pNext, e) &&
- dfsfast_e(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("o");
-#endif
- goto found;
- }
- }
-#endif
- }
-
- // unwind
- if (FTEST(pObj, FLOW) &&
- !FTEST(pObj, VISITED_R) &&
- FDIST(pObj, e, pObj, r) &&
- dfsfast_r(pObj, FGETPRED(pObj))) {
-
- FUNSET(pObj, FLOW);
- FSETPRED(pObj, NULL);
-#ifdef DEBUG_PRINT_FLOWS
- printf("u");
-#endif
- goto found;
- }
-
- not_found:
- FUNSET(pObj, VISITED_E);
- dfsfast_e_retreat(pObj);
- return 0;
-
- found:
-#ifdef DEBUG_PRINT_FLOWS
- printf("%d ", Abc_ObjId(pObj));
-#endif
- FUNSET(pObj, VISITED_E);
- return 1;
-}
-
-int dfsfast_r( Abc_Obj_t *pObj, Abc_Obj_t *pPred ) {
- int i;
- Abc_Obj_t *pNext, *pOldPred;
-
- if (pManMR->fSinkDistTerminate) return 0;
-
-#ifdef DEBUG_VISITED
- printf("(%dr=%d) ", Abc_ObjId(pObj), FDATA(pObj)->r_dist);
-#endif
-
- // have we reached the sink?
- if (Abc_ObjIsLatch(pObj) ||
- (pManMR->fIsForward && Abc_ObjIsPo(pObj)) ||
- (pManMR->fIsForward && FTEST(pObj, BLOCK_OR_CONS) & pManMR->constraintMask)) {
- assert(pPred);
- return 1;
- }
-
- FSET(pObj, VISITED_R);
-
- if (FTEST(pObj, FLOW)) {
-
- pOldPred = FGETPRED(pObj);
- if (pOldPred &&
- !FTEST(pOldPred, VISITED_E) &&
- FDIST(pObj, r, pOldPred, e) &&
- dfsfast_e(pOldPred, pOldPred)) {
-
- FSETPRED(pObj, pPred);
-
-#ifdef DEBUG_PRINT_FLOWS
- printf("fr");
-#endif
- goto found;
- }
-
- } else {
-
- if (!FTEST(pObj, VISITED_E) &&
- FDIST(pObj, r, pObj, e) &&
- dfsfast_e(pObj, pObj)) {
-
- FSET(pObj, FLOW);
- FSETPRED(pObj, pPred);
-
-#ifdef DEBUG_PRINT_FLOWS
- printf("f");
-#endif
- goto found;
- }
- }
-
- // 2. reverse edges (forward retiming only)
- if (pManMR->fIsForward) {
- Abc_ObjForEachFanin( pObj, pNext, i ) {
- if (!FTEST(pNext, VISITED_R) &&
- FDIST(pObj, r, pNext, r) &&
- !Abc_ObjIsLatch(pNext) &&
- dfsfast_r(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("i");
-#endif
- goto found;
- }
- }
-
- // 3. timing edges (forward retiming only)
-#if !defined(IGNORE_TIMING)
- if (pManMR->maxDelay)
- Vec_PtrForEachEntry( FTIMEEDGES(pObj), pNext, i) {
- if (!FTEST(pNext, VISITED_R) &&
- FDIST(pObj, r, pNext, r) &&
- dfsfast_r(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("o");
-#endif
- goto found;
- }
- }
-#endif
- }
-
- FUNSET(pObj, VISITED_R);
- dfsfast_r_retreat(pObj);
- return 0;
-
- found:
-#ifdef DEBUG_PRINT_FLOWS
- printf("%d ", Abc_ObjId(pObj));
-#endif
- FUNSET(pObj, VISITED_R);
- return 1;
-}
-
-void
-dfsfast_e_retreat(Abc_Obj_t *pObj) {
- Abc_Obj_t *pNext;
- int i, *h;
- int old_dist = FDATA(pObj)->e_dist;
- int adj_dist, min_dist = MAX_DIST;
-
- // 1. structural edges
- if (pManMR->fIsForward)
- Abc_ObjForEachFanout( pObj, pNext, i ) {
- adj_dist = FDATA(pNext)->r_dist;
- if (adj_dist) min_dist = MIN(min_dist, adj_dist);
- }
- else
- Abc_ObjForEachFanin( pObj, pNext, i ) {
- adj_dist = FDATA(pNext)->r_dist;
- if (adj_dist) min_dist = MIN(min_dist, adj_dist);
- }
-
- if (Abc_ObjIsLatch(pObj)) goto update;
-
- // 2. through
- if (FTEST(pObj, FLOW)) {
- adj_dist = FDATA(pObj)->r_dist;
- if (adj_dist) min_dist = MIN(min_dist, adj_dist);
- }
-
- // 3. reverse edges (backward retiming only)
- if (!pManMR->fIsForward) {
- Abc_ObjForEachFanout( pObj, pNext, i ) {
- adj_dist = FDATA(pNext)->e_dist;
- if (adj_dist) min_dist = MIN(min_dist, adj_dist);
- }
-
- // 4. timing edges (backward retiming only)
-#if !defined(IGNORE_TIMING)
- if (pManMR->maxDelay)
- Vec_PtrForEachEntry( FTIMEEDGES(pObj), pNext, i) {
- adj_dist = FDATA(pNext)->e_dist;
- if (adj_dist) min_dist = MIN(min_dist, adj_dist);
- }
-#endif
- }
-
- update:
- ++min_dist;
- if (min_dist >= MAX_DIST) min_dist = 0;
- // printf("[%de=%d->%d] ", Abc_ObjId(pObj), old_dist, min_dist+1);
- FDATA(pObj)->e_dist = min_dist;
-
- assert(min_dist < Vec_IntSize(pManMR->vSinkDistHist));
- h = Vec_IntArray(pManMR->vSinkDistHist);
- h[old_dist]--;
- h[min_dist]++;
- if (!h[old_dist]) {
- pManMR->fSinkDistTerminate = 1;
- }
-}
-
-void
-dfsfast_r_retreat(Abc_Obj_t *pObj) {
- Abc_Obj_t *pNext;
- int i, *h;
- int old_dist = FDATA(pObj)->r_dist;
- int adj_dist, min_dist = MAX_DIST;
-
- // 1. through or pred
- if (FTEST(pObj, FLOW)) {
- if (FGETPRED(pObj)) {
- adj_dist = FDATA(FGETPRED(pObj))->e_dist;
- if (adj_dist) min_dist = MIN(min_dist, adj_dist);
- }
- } else {
- adj_dist = FDATA(pObj)->e_dist;
- if (adj_dist) min_dist = MIN(min_dist, adj_dist);
- }
-
- // 2. reverse edges (forward retiming only)
- if (pManMR->fIsForward) {
- Abc_ObjForEachFanin( pObj, pNext, i )
- if (!Abc_ObjIsLatch(pNext)) {
- adj_dist = FDATA(pNext)->r_dist;
- if (adj_dist) min_dist = MIN(min_dist, adj_dist);
- }
-
- // 3. timing edges (forward retiming only)
-#if !defined(IGNORE_TIMING)
- if (pManMR->maxDelay)
- Vec_PtrForEachEntry( FTIMEEDGES(pObj), pNext, i) {
- adj_dist = FDATA(pNext)->r_dist;
- if (adj_dist) min_dist = MIN(min_dist, adj_dist);
- }
-#endif
- }
-
- ++min_dist;
- if (min_dist >= MAX_DIST) min_dist = 0;
- //printf("[%dr=%d->%d] ", Abc_ObjId(pObj), old_dist, min_dist+1);
- FDATA(pObj)->r_dist = min_dist;
-
- assert(min_dist < Vec_IntSize(pManMR->vSinkDistHist));
- h = Vec_IntArray(pManMR->vSinkDistHist);
- h[old_dist]--;
- h[min_dist]++;
- if (!h[old_dist]) {
- pManMR->fSinkDistTerminate = 1;
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Plain DFS.]
-
- Description [Does not use sink-distance-histogram heuristic.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-
-int dfsplain_e( Abc_Obj_t *pObj, Abc_Obj_t *pPred ) {
- int i;
- Abc_Obj_t *pNext;
-
- if (FTEST(pObj, BLOCK_OR_CONS) & pManMR->constraintMask ||
- Abc_ObjIsPi(pObj)) {
- assert(pPred);
- assert(!pManMR->fIsForward);
- return 1;
- }
-
- FSET(pObj, VISITED_E);
-
- // printf(" %de\n", Abc_ObjId(pObj));
-
- // 1. structural edges
- if (pManMR->fIsForward)
- Abc_ObjForEachFanout( pObj, pNext, i ) {
- if (!FTEST(pNext, VISITED_R) &&
- dfsplain_r(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("o");
-#endif
- goto found;
- }
- }
- else
- Abc_ObjForEachFanin( pObj, pNext, i ) {
- if (!FTEST(pNext, VISITED_R) &&
- dfsplain_r(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("o");
-#endif
- goto found;
- }
- }
-
- if (Abc_ObjIsLatch(pObj))
- return 0;
-
- // 2. reverse edges (backward retiming only)
- if (!pManMR->fIsForward) {
- Abc_ObjForEachFanout( pObj, pNext, i ) {
- if (!FTEST(pNext, VISITED_E) &&
- dfsplain_e(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("i");
-#endif
- goto found;
- }
- }
-
- // 3. timing edges (backward retiming only)
-#if !defined(IGNORE_TIMING)
- if (pManMR->maxDelay)
- Vec_PtrForEachEntry( FTIMEEDGES(pObj), pNext, i) {
- if (!FTEST(pNext, VISITED_E) &&
- dfsplain_e(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("o");
-#endif
- goto found;
- }
- }
-#endif
- }
-
- // unwind
- if (FTEST(pObj, FLOW) &&
- !FTEST(pObj, VISITED_R) &&
- dfsplain_r(pObj, FGETPRED(pObj))) {
- FUNSET(pObj, FLOW);
- FSETPRED(pObj, NULL);
-#ifdef DEBUG_PRINT_FLOWS
- printf("u");
-#endif
- goto found;
- }
-
- return 0;
-
- found:
-#ifdef DEBUG_PRINT_FLOWS
- printf("%d ", Abc_ObjId(pObj));
-#endif
-
- return 1;
-}
-
-int dfsplain_r( Abc_Obj_t *pObj, Abc_Obj_t *pPred ) {
- int i;
- Abc_Obj_t *pNext, *pOldPred;
-
- // have we reached the sink?
- if (Abc_ObjIsLatch(pObj) ||
- (pManMR->fIsForward && Abc_ObjIsPo(pObj)) ||
- (pManMR->fIsForward && FTEST(pObj, BLOCK_OR_CONS) & pManMR->constraintMask)) {
- assert(pPred);
- return 1;
- }
-
- FSET(pObj, VISITED_R);
-
- // printf(" %dr\n", Abc_ObjId(pObj));
-
- if (FTEST(pObj, FLOW)) {
-
- pOldPred = FGETPRED(pObj);
- if (pOldPred &&
- !FTEST(pOldPred, VISITED_E) &&
- dfsplain_e(pOldPred, pOldPred)) {
-
- FSETPRED(pObj, pPred);
-
-#ifdef DEBUG_PRINT_FLOWS
- printf("fr");
-#endif
- goto found;
- }
-
- } else {
-
- if (!FTEST(pObj, VISITED_E) &&
- dfsplain_e(pObj, pObj)) {
-
- FSET(pObj, FLOW);
- FSETPRED(pObj, pPred);
-
-#ifdef DEBUG_PRINT_FLOWS
- printf("f");
-#endif
- goto found;
- }
- }
-
- // 2. follow reverse edges
- if (pManMR->fIsForward) { // forward retiming only
- Abc_ObjForEachFanin( pObj, pNext, i ) {
- if (!FTEST(pNext, VISITED_R) &&
- !Abc_ObjIsLatch(pNext) &&
- dfsplain_r(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("i");
-#endif
- goto found;
- }
- }
-
- // 3. timing edges (forward only)
-#if !defined(IGNORE_TIMING)
- if (pManMR->maxDelay)
- Vec_PtrForEachEntry( FTIMEEDGES(pObj), pNext, i) {
- if (!FTEST(pNext, VISITED_R) &&
- dfsplain_r(pNext, pPred)) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("o");
-#endif
- goto found;
- }
- }
-#endif
- }
-
- return 0;
-
- found:
-#ifdef DEBUG_PRINT_FLOWS
- printf("%d ", Abc_ObjId(pObj));
-#endif
- return 1;
-}
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/opt/fret/fretInit.c b/src/opt/fret/fretInit.c
deleted file mode 100644
index ce9adefa..00000000
--- a/src/opt/fret/fretInit.c
+++ /dev/null
@@ -1,1334 +0,0 @@
-/**CFile****************************************************************
-
- FileName [fretInit.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Flow-based retiming package.]
-
- Synopsis [Initialization for retiming package.]
-
- Author [Aaron Hurst]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - January 1, 2008.]
-
- Revision [$Id: fretInit.c,v 1.00 2008/01/01 00:00:00 ahurst Exp $]
-
-***********************************************************************/
-
-#include "abc.h"
-#include "vec.h"
-#include "ioAbc.h"
-#include "fretime.h"
-#include "mio.h"
-#include "hop.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-#undef DEBUG_PRINT_INIT_NTK
-
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION PROTOTYPES ///
-////////////////////////////////////////////////////////////////////////
-
-static void Abc_FlowRetime_UpdateForwardInit_rec( Abc_Obj_t * pObj );
-static void Abc_FlowRetime_VerifyBackwardInit( Abc_Ntk_t * pNtk );
-static void Abc_FlowRetime_VerifyBackwardInit_rec( Abc_Obj_t * pObj );
-static Abc_Obj_t* Abc_FlowRetime_UpdateBackwardInit_rec( Abc_Obj_t *pOrigObj );
-
-static void Abc_FlowRetime_SimulateNode( Abc_Obj_t * pObj );
-static void Abc_FlowRetime_SimulateSop( Abc_Obj_t * pObj, char *pSop );
-
-static void Abc_FlowRetime_SetInitToOrig( Abc_Obj_t *pInit, Abc_Obj_t *pOrig );
-static void Abc_FlowRetime_GetInitToOrig( Abc_Obj_t *pInit, Abc_Obj_t **pOrig, int *lag );
-static void Abc_FlowRetime_ClearInitToOrig( Abc_Obj_t *pInit );
-
-extern void * Abc_FrameReadLibGen();
-
-extern void Abc_NtkMarkCone_rec( Abc_Obj_t * pObj, int fForward );
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-
-/**Function*************************************************************
-
- Synopsis [Updates initial state information.]
-
- Description [Assumes latch boxes in original position, latches in
- new positions.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_InitState( Abc_Ntk_t * pNtk ) {
-
- if (!pManMR->fComputeInitState) return;
-
- if (pManMR->fIsForward)
- Abc_FlowRetime_UpdateForwardInit( pNtk );
- else {
- Abc_FlowRetime_UpdateBackwardInit( pNtk );
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Prints initial state information.]
-
- Description [Prints distribution of 0,1,and X initial states.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-inline int
-Abc_FlowRetime_ObjFirstNonLatchBox( Abc_Obj_t * pOrigObj, Abc_Obj_t ** pResult ) {
- int lag = 0;
- Abc_Ntk_t *pNtk;
- *pResult = pOrigObj;
- pNtk = Abc_ObjNtk( pOrigObj );
-
- Abc_NtkIncrementTravId( pNtk );
-
- while( Abc_ObjIsBo(*pResult) || Abc_ObjIsLatch(*pResult) || Abc_ObjIsBi(*pResult) ) {
- assert(Abc_ObjFaninNum(*pResult));
- *pResult = Abc_ObjFanin0(*pResult);
-
- if (Abc_NodeIsTravIdCurrent(*pResult))
- return -1;
- Abc_NodeSetTravIdCurrent(*pResult);
-
- if (Abc_ObjIsLatch(*pResult)) ++lag;
- }
-
- return lag;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Prints initial state information.]
-
- Description [Prints distribution of 0,1,and X initial states.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_PrintInitStateInfo( Abc_Ntk_t * pNtk ) {
- int i, n0=0, n1=0, nDC=0, nOther=0;
- Abc_Obj_t *pLatch;
-
- Abc_NtkForEachLatch( pNtk, pLatch, i ) {
- if (Abc_LatchIsInit0(pLatch)) n0++;
- else if (Abc_LatchIsInit1(pLatch)) n1++;
- else if (Abc_LatchIsInitDc(pLatch)) nDC++;
- else nOther++;
- }
-
- printf("\tinitial states {0,1,x} = {%d, %d, %d}", n0, n1, nDC);
- if (nOther)
- printf(" + %d UNKNOWN", nOther);
- printf("\n");
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Computes initial state after forward retiming.]
-
- Description [Assumes box outputs in old positions stored w/ init values.
- Uses three-value simulation to preserve don't cares.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_UpdateForwardInit( Abc_Ntk_t * pNtk ) {
- Abc_Obj_t *pObj, *pFanin;
- int i;
-
- vprintf("\t\tupdating init state\n");
-
- Abc_NtkIncrementTravId( pNtk );
-
- Abc_NtkForEachLatch( pNtk, pObj, i ) {
- pFanin = Abc_ObjFanin0(pObj);
- Abc_FlowRetime_UpdateForwardInit_rec( pFanin );
-
- if (FTEST(pFanin, INIT_0))
- Abc_LatchSetInit0( pObj );
- else if (FTEST(pFanin, INIT_1))
- Abc_LatchSetInit1( pObj );
- else
- Abc_LatchSetInitDc( pObj );
- }
-}
-
-void Abc_FlowRetime_UpdateForwardInit_rec( Abc_Obj_t * pObj ) {
- Abc_Obj_t *pNext;
- int i;
-
- assert(!Abc_ObjIsPi(pObj)); // should never reach the inputs
-
- if (Abc_ObjIsBo(pObj)) return;
-
- // visited?
- if (Abc_NodeIsTravIdCurrent(pObj)) return;
- Abc_NodeSetTravIdCurrent(pObj);
-
- Abc_ObjForEachFanin( pObj, pNext, i ) {
- Abc_FlowRetime_UpdateForwardInit_rec( pNext );
- }
-
- Abc_FlowRetime_SimulateNode( pObj );
-}
-
-/**Function*************************************************************
-
- Synopsis [Recursively evaluates HOP netlist.]
-
- Description [Exponential. There aren't enough flags on a HOP node.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static void Abc_FlowRetime_EvalHop_rec( Hop_Man_t *pHop, Hop_Obj_t *pObj, int *f, int *dc ) {
- int f1, dc1, f2, dc2;
- Hop_Obj_t *pReg = Hop_Regular(pObj);
-
- // const 0
- if (Hop_ObjIsConst1(pReg)) {
- *f = 1;
- *f ^= (pReg == pObj ? 1 : 0);
- *dc = 0;
- return;
- }
-
- // PI
- if (Hop_ObjIsPi(pReg)) {
- *f = pReg->fMarkA;
- *f ^= (pReg == pObj ? 1 : 0);
- *dc = pReg->fMarkB;
- return;
- }
-
- // PO
- if (Hop_ObjIsPo(pReg)) {
- assert( pReg == pObj );
- Abc_FlowRetime_EvalHop_rec(pHop, Hop_ObjChild0(pReg), f, dc);
- return;
- }
-
- // AND
- if (Hop_ObjIsAnd(pReg)) {
- Abc_FlowRetime_EvalHop_rec(pHop, Hop_ObjChild0(pReg), &f1, &dc1);
- Abc_FlowRetime_EvalHop_rec(pHop, Hop_ObjChild1(pReg), &f2, &dc2);
-
- *dc = (dc1 & f2) | (dc2 & f1) | (dc1 & dc2);
- *f = f1 & f2;
- *f ^= (pReg == pObj ? 1 : 0);
- return;
- }
-
- assert(0);
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Sets initial value flags.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static inline void Abc_FlowRetime_SetInitValue( Abc_Obj_t * pObj,
- int val, int dc ) {
-
- // store init value
- FUNSET(pObj, INIT_CARE);
- if (!dc){
- if (val) {
- FSET(pObj, INIT_1);
- } else {
- FSET(pObj, INIT_0);
- }
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Propogates initial state through a logic node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_SimulateNode( Abc_Obj_t * pObj ) {
- Abc_Ntk_t *pNtk = Abc_ObjNtk(pObj);
- Abc_Obj_t * pFanin;
- int i, rAnd, rVar, dcAnd, dcVar;
- DdManager * dd = pNtk->pManFunc;
- DdNode *pBdd = pObj->pData, *pVar;
- Hop_Man_t *pHop = pNtk->pManFunc;
-
- assert(!Abc_ObjIsLatch(pObj));
- assert(Abc_ObjRegular(pObj));
-
- // (i) constant nodes
- if (Abc_NtkIsStrash(pNtk) && Abc_AigNodeIsConst(pObj)) {
- Abc_FlowRetime_SetInitValue(pObj, 1, 0);
- return;
- }
- if (!Abc_NtkIsStrash( pNtk ) && Abc_ObjIsNode(pObj)) {
- if (Abc_NodeIsConst0(pObj)) {
- Abc_FlowRetime_SetInitValue(pObj, 0, 0);
- return;
- } else if (Abc_NodeIsConst1(pObj)) {
- Abc_FlowRetime_SetInitValue(pObj, 1, 0);
- return;
- }
- }
-
- // (ii) terminal nodes
- if (!Abc_ObjIsNode(pObj)) {
- pFanin = Abc_ObjFanin0(pObj);
-
- Abc_FlowRetime_SetInitValue(pObj,
- (FTEST(pFanin, INIT_1) ? 1 : 0) ^ pObj->fCompl0,
- !FTEST(pFanin, INIT_CARE));
- return;
- }
-
- // (iii) logic nodes
-
- // ------ SOP network
- if ( Abc_NtkHasSop( pNtk )) {
- Abc_FlowRetime_SimulateSop( pObj, (char *)Abc_ObjData(pObj) );
- return;
- }
-
- // ------ BDD network
- else if ( Abc_NtkHasBdd( pNtk )) {
- assert(dd);
- assert(pBdd);
-
- // cofactor for 0,1 inputs
- // do nothing for X values
- Abc_ObjForEachFanin(pObj, pFanin, i) {
- pVar = Cudd_bddIthVar( dd, i );
- if (FTEST(pFanin, INIT_CARE)) {
- if (FTEST(pFanin, INIT_0))
- pBdd = Cudd_Cofactor( dd, pBdd, Cudd_Not(pVar) );
- else
- pBdd = Cudd_Cofactor( dd, pBdd, pVar );
- }
- }
-
- // if function has not been reduced to
- // a constant, propagate an X
- rVar = (pBdd == Cudd_ReadOne(dd));
- dcVar = !Cudd_IsConstant(pBdd);
-
- Abc_FlowRetime_SetInitValue(pObj, rVar, dcVar);
- return;
- }
-
-
- // ------ AIG logic network
- else if ( Abc_NtkHasAig( pNtk ) && !Abc_NtkIsStrash( pNtk )) {
-
- assert(Abc_ObjIsNode(pObj));
- assert(pObj->pData);
- assert(Abc_ObjFaninNum(pObj) <= Hop_ManPiNum(pHop) );
-
- // set vals at inputs
- Abc_ObjForEachFanin(pObj, pFanin, i) {
- Hop_ManPi(pHop, i)->fMarkA = FTEST(pFanin, INIT_1)?1:0;
- Hop_ManPi(pHop, i)->fMarkB = FTEST(pFanin, INIT_CARE)?1:0;
- }
-
- Abc_FlowRetime_EvalHop_rec( pHop, pObj->pData, &rVar, &dcVar );
-
- Abc_FlowRetime_SetInitValue(pObj, rVar, dcVar);
-
- // clear flags
- Abc_ObjForEachFanin(pObj, pFanin, i) {
- Hop_ManPi(pHop, i)->fMarkA = 0;
- Hop_ManPi(pHop, i)->fMarkB = 0;
- }
-
- return;
- }
-
- // ------ strashed network
- else if ( Abc_NtkIsStrash( pNtk )) {
-
- assert(Abc_ObjType(pObj) == ABC_OBJ_NODE);
- dcAnd = 0, rAnd = 1;
-
- pFanin = Abc_ObjFanin0(pObj);
- dcAnd |= FTEST(pFanin, INIT_CARE) ? 0 : 1;
- rVar = FTEST(pFanin, INIT_0) ? 0 : 1;
- if (pObj->fCompl0) rVar ^= 1; // complimented?
- rAnd &= rVar;
-
- pFanin = Abc_ObjFanin1(pObj);
- dcAnd |= FTEST(pFanin, INIT_CARE) ? 0 : 1;
- rVar = FTEST(pFanin, INIT_0) ? 0 : 1;
- if (pObj->fCompl1) rVar ^= 1; // complimented?
- rAnd &= rVar;
-
- if (!rAnd) dcAnd = 0; /* controlling value */
-
- Abc_FlowRetime_SetInitValue(pObj, rAnd, dcAnd);
- return;
- }
-
- // ------ MAPPED network
- else if ( Abc_NtkHasMapping( pNtk )) {
- Abc_FlowRetime_SimulateSop( pObj, (char *)Mio_GateReadSop(pObj->pData) );
- return;
- }
-
- assert(0);
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Propogates initial state through a SOP node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_SimulateSop( Abc_Obj_t * pObj, char *pSop ) {
- Abc_Obj_t * pFanin;
- char *pCube;
- int i, j, rAnd, rOr, rVar, dcAnd, dcOr, v;
-
- assert( pSop && !Abc_SopIsExorType(pSop) );
-
- rOr = 0, dcOr = 0;
-
- i = Abc_SopGetVarNum(pSop);
- Abc_SopForEachCube( pSop, i, pCube ) {
- rAnd = 1, dcAnd = 0;
- Abc_CubeForEachVar( pCube, v, j ) {
- pFanin = Abc_ObjFanin(pObj, j);
- if ( v == '0' )
- rVar = FTEST(pFanin, INIT_0) ? 1 : 0;
- else if ( v == '1' )
- rVar = FTEST(pFanin, INIT_1) ? 1 : 0;
- else
- continue;
-
- if (FTEST(pFanin, INIT_CARE))
- rAnd &= rVar;
- else
- dcAnd = 1;
- }
- if (!rAnd) dcAnd = 0; /* controlling value */
- if (dcAnd)
- dcOr = 1;
- else
- rOr |= rAnd;
- }
- if (rOr) dcOr = 0; /* controlling value */
-
- // complement the result if necessary
- if ( !Abc_SopGetPhase(pSop) )
- rOr ^= 1;
-
- Abc_FlowRetime_SetInitValue(pObj, rOr, dcOr);
-}
-
-/**Function*************************************************************
-
- Synopsis [Sets up backward initial state computation.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_SetupBackwardInit( Abc_Ntk_t * pNtk ) {
- Abc_Obj_t *pLatch, *pObj, *pPi;
- int i;
- Vec_Ptr_t *vObj = Vec_PtrAlloc(100);
-
- // create the network used for the initial state computation
- if (Abc_NtkIsStrash(pNtk)) {
- pManMR->pInitNtk = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP, 1 );
- } else if (Abc_NtkHasMapping(pNtk))
- pManMR->pInitNtk = Abc_NtkAlloc( pNtk->ntkType, ABC_FUNC_SOP, 1 );
- else
- pManMR->pInitNtk = Abc_NtkAlloc( pNtk->ntkType, pNtk->ntkFunc, 1 );
-
- // mitre inputs
- Abc_NtkForEachLatch( pNtk, pLatch, i ) {
- // map latch to initial state network
- pPi = Abc_NtkCreatePi( pManMR->pInitNtk );
-
- // DEBUG
- // printf("setup : mapping latch %d to PI %d\n", pLatch->Id, pPi->Id);
-
- // has initial state requirement?
- if (Abc_LatchIsInit0(pLatch)) {
- pObj = Abc_NtkCreateNodeInv( pManMR->pInitNtk, pPi );
- Vec_PtrPush(vObj, pObj);
- }
- else if (Abc_LatchIsInit1(pLatch)) {
- Vec_PtrPush(vObj, pPi);
- }
-
- Abc_ObjSetData( pLatch, pPi ); // if not verifying init state
- // FDATA(pLatch)->pInitObj = pPi; // if verifying init state
- }
-
- // are there any nodes not DC?
- if (!Vec_PtrSize(vObj)) {
- pManMR->fSolutionIsDc = 1;
- return;
- } else
- pManMR->fSolutionIsDc = 0;
-
- // mitre output
-
- // create n-input AND gate
- pObj = Abc_NtkCreateNodeAnd( pManMR->pInitNtk, vObj );
-
- Abc_ObjAddFanin( Abc_NtkCreatePo( pManMR->pInitNtk ), pObj );
-
- Vec_PtrFree( vObj );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Solves backward initial state computation.]
-
- Description []
-
- SideEffects [Sets object copies in init ntk.]
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_FlowRetime_SolveBackwardInit( Abc_Ntk_t * pNtk ) {
- int i;
- Abc_Obj_t *pObj, *pInitObj;
- Vec_Ptr_t *vDelete = Vec_PtrAlloc(0);
- Abc_Ntk_t *pSatNtk;
- int result;
-
- assert(pManMR->pInitNtk);
-
- // is the solution entirely DC's?
- if (pManMR->fSolutionIsDc) {
- Vec_PtrFree(vDelete);
- Abc_NtkForEachLatch( pNtk, pObj, i ) Abc_LatchSetInitDc( pObj );
- vprintf("\tno init state computation: all-don't-care solution\n");
- return 1;
- }
-
- // check that network is combinational
- Abc_NtkForEachObj( pManMR->pInitNtk, pObj, i ) {
- assert(!Abc_ObjIsLatch(pObj));
- assert(!Abc_ObjIsBo(pObj));
- assert(!Abc_ObjIsBi(pObj));
- }
-
- // delete superfluous nodes
- while(Vec_PtrSize( vDelete )) {
- pObj = (Abc_Obj_t *)Vec_PtrPop( vDelete );
- Abc_NtkDeleteObj( pObj );
- }
- Vec_PtrFree(vDelete);
-
- // do some final cleanup on the network
- Abc_NtkAddDummyPoNames(pManMR->pInitNtk);
- Abc_NtkAddDummyPiNames(pManMR->pInitNtk);
- if (Abc_NtkIsLogic(pManMR->pInitNtk))
- Abc_NtkCleanup(pManMR->pInitNtk, 0);
-
-#if defined(DEBUG_PRINT_INIT_NTK)
- Abc_NtkLevelReverse( pManMR->pInitNtk );
- Abc_NtkForEachObj( pManMR->pInitNtk, pObj, i )
- if (Abc_ObjLevel( pObj ) < 2)
- Abc_ObjPrint(stdout, pObj);
-#endif
-
- vprintf("\tsolving for init state (%d nodes)... ", Abc_NtkObjNum(pManMR->pInitNtk));
- fflush(stdout);
-
- // convert SOPs to BDD
- if (Abc_NtkHasSop(pManMR->pInitNtk))
- Abc_NtkSopToBdd( pManMR->pInitNtk );
- // convert AIGs to BDD
- if (Abc_NtkHasAig(pManMR->pInitNtk))
- Abc_NtkAigToBdd( pManMR->pInitNtk );
-
- pSatNtk = pManMR->pInitNtk;
-
- // solve
- result = Abc_NtkMiterSat( pSatNtk, (sint64)500000, (sint64)50000000, 0, NULL, NULL );
-
- if (!result) {
- vprintf("SUCCESS\n");
- } else {
- vprintf("FAILURE\n");
- return 0;
- }
-
- // clear initial values, associate PIs to latches
- Abc_NtkForEachPi( pManMR->pInitNtk, pInitObj, i ) Abc_ObjSetCopy( pInitObj, NULL );
- Abc_NtkForEachLatch( pNtk, pObj, i ) {
- pInitObj = Abc_ObjData( pObj );
- assert( Abc_ObjIsPi( pInitObj ));
- Abc_ObjSetCopy( pInitObj, pObj );
- Abc_LatchSetInitNone( pObj );
-
- // DEBUG
- // printf("solve : getting latch %d from PI %d\n", pObj->Id, pInitObj->Id);
- }
-
- // copy solution from PIs to latches
- assert(pManMR->pInitNtk->pModel);
- Abc_NtkForEachPi( pManMR->pInitNtk, pInitObj, i ) {
- if ((pObj = Abc_ObjCopy( pInitObj ))) {
- if ( pManMR->pInitNtk->pModel[i] )
- Abc_LatchSetInit1( pObj );
- else
- Abc_LatchSetInit0( pObj );
- }
- }
-
-#if defined(DEBUG_CHECK)
- // check that all latches have initial state
- Abc_NtkForEachLatch( pNtk, pObj, i ) assert( !Abc_LatchIsInitNone( pObj ) );
-#endif
-
- return 1;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Updates backward initial state computation problem.]
-
- Description [Assumes box outputs in old positions stored w/ init values.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_UpdateBackwardInit( Abc_Ntk_t * pNtk ) {
- Abc_Obj_t *pOrigObj, *pInitObj;
- Vec_Ptr_t *vBo = Vec_PtrAlloc(100);
- Vec_Ptr_t *vPi = Vec_PtrAlloc(100);
- Abc_Ntk_t *pInitNtk = pManMR-> pInitNtk;
- Abc_Obj_t *pBuf;
- int i;
-
- // remove PIs from network (from BOs)
- Abc_NtkForEachObj( pNtk, pOrigObj, i )
- if (Abc_ObjIsBo(pOrigObj)) {
- pInitObj = FDATA(pOrigObj)->pInitObj;
- assert(Abc_ObjIsPi(pInitObj));
-
- // DEBUG
- // printf("update : freeing PI %d\n", pInitObj->Id);
-
- // create a buffer instead
- pBuf = Abc_NtkCreateNodeBuf( pInitNtk, NULL );
- Abc_FlowRetime_ClearInitToOrig( pBuf );
-
- Abc_ObjBetterTransferFanout( pInitObj, pBuf, 0 );
- FDATA(pOrigObj)->pInitObj = pBuf;
- pOrigObj->fMarkA = 1;
-
- Vec_PtrPush(vBo, pOrigObj);
- Vec_PtrPush(vPi, pInitObj);
- }
-
- // check that PIs are all free
- Abc_NtkForEachPi( pInitNtk, pInitObj, i) {
- assert( Abc_ObjFanoutNum( pInitObj ) == 0);
- }
-
- // add PIs to to latches
- Abc_NtkForEachLatch( pNtk, pOrigObj, i ) {
- assert(Vec_PtrSize(vPi) > 0);
- pInitObj = Vec_PtrPop(vPi);
-
- // DEBUG
- // printf("update : mapping latch %d to PI %d\n", pOrigObj->Id, pInitObj->Id);
-
- pOrigObj->fMarkA = pOrigObj->fMarkB = 1;
- FDATA(pOrigObj)->pInitObj = pInitObj;
- Abc_ObjSetData(pOrigObj, pInitObj);
- }
-
- // recursively build init network
- Vec_PtrForEachEntry( Abc_Obj_t *, vBo, pOrigObj, i )
- Abc_FlowRetime_UpdateBackwardInit_rec( pOrigObj );
-
- // clear flags
- Abc_NtkForEachObj( pNtk, pOrigObj, i )
- pOrigObj->fMarkA = pOrigObj->fMarkB = 0;
-
- // deallocate
- Vec_PtrFree( vBo );
- Vec_PtrFree( vPi );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Creates a corresponding node in the init state network]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t *Abc_FlowRetime_CopyNodeToInitNtk( Abc_Obj_t *pOrigObj ) {
- Abc_Ntk_t *pNtk = pManMR->pNtk;
- Abc_Ntk_t *pInitNtk = pManMR->pInitNtk;
- Abc_Obj_t *pInitObj;
- void *pData;
- int fCompl[2];
-
- assert(pOrigObj);
-
- // what we do depends on the ntk types of original / init networks...
-
- // (0) convert BI/BO nodes to buffers
- if (Abc_ObjIsBi( pOrigObj ) || Abc_ObjIsBo( pOrigObj ) ) {
- pInitObj = Abc_NtkCreateNodeBuf( pInitNtk, NULL );
- Abc_FlowRetime_ClearInitToOrig( pInitObj );
- return pInitObj;
- }
-
- // (i) strash node -> SOP node
- if (Abc_NtkIsStrash( pNtk )) {
-
- if (Abc_AigNodeIsConst( pOrigObj )) {
- return Abc_NtkCreateNodeConst1( pInitNtk );
- }
- if (!Abc_ObjIsNode( pOrigObj )) {
- assert(Abc_ObjFaninNum(pOrigObj) == 1);
- pInitObj = Abc_NtkCreateNodeBuf( pInitNtk, NULL );
- Abc_FlowRetime_ClearInitToOrig( pInitObj );
- return pInitObj;
- }
-
- assert( Abc_ObjIsNode(pOrigObj) );
- pInitObj = Abc_NtkCreateObj( pInitNtk, ABC_OBJ_NODE );
-
- fCompl[0] = pOrigObj->fCompl0 ? 1 : 0;
- fCompl[1] = pOrigObj->fCompl1 ? 1 : 0;
-
- pData = Abc_SopCreateAnd( (Extra_MmFlex_t *)pInitNtk->pManFunc, 2, fCompl );
- assert(pData);
- pInitObj->pData = Abc_SopRegister( (Extra_MmFlex_t *)pInitNtk->pManFunc, pData );
- }
-
- // (ii) mapped node -> SOP node
- else if (Abc_NtkHasMapping( pNtk )) {
- if (!pOrigObj->pData) {
- // assume terminal...
- assert(Abc_ObjFaninNum(pOrigObj) == 1);
-
- pInitObj = Abc_NtkCreateNodeBuf( pInitNtk, NULL );
- Abc_FlowRetime_ClearInitToOrig( pInitObj );
- return pInitObj;
- }
-
- pInitObj = Abc_NtkCreateObj( pInitNtk, Abc_ObjType(pOrigObj) );
- pData = Mio_GateReadSop(pOrigObj->pData);
- assert( Abc_SopGetVarNum(pData) == Abc_ObjFaninNum(pOrigObj) );
-
- pInitObj->pData = Abc_SopRegister( (Extra_MmFlex_t *)pInitNtk->pManFunc, pData );
- }
-
- // (iii) otherwise, duplicate obj
- else {
- pInitObj = Abc_NtkDupObj( pInitNtk, pOrigObj, 0 );
-
- // copy phase
- pInitObj->fPhase = pOrigObj->fPhase;
- }
-
- assert(pInitObj);
- return pInitObj;
-}
-
-/**Function*************************************************************
-
- Synopsis [Updates backward initial state computation problem.]
-
- Description [Creates a duplicate node in the initial state network
- corresponding to a node in the original circuit. If
- fRecurse is set, the procedure recurses on and connects
- the new node to its fan-ins. A latch in the original
- circuit corresponds to a PI in the initial state network.
- An existing PI may be supplied by pUseThisPi, and if the
- node is a latch, it will be used; otherwise the PI is
- saved in the list vOtherPis and subsequently used for
- another latch.]
-
- SideEffects [Nodes that have a corresponding initial state node
- are marked with fMarkA. Nodes that have been fully
- connected in the initial state network are marked with
- fMarkB.]
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t* Abc_FlowRetime_UpdateBackwardInit_rec( Abc_Obj_t *pOrigObj) {
- Abc_Obj_t *pOrigFanin, *pInitFanin, *pInitObj;
- int i;
-
- assert(pOrigObj);
-
- // should never reach primary IOs
- assert(!Abc_ObjIsPi(pOrigObj));
- assert(!Abc_ObjIsPo(pOrigObj));
-
- // skip bias nodes
- if (FTEST(pOrigObj, BIAS_NODE))
- return NULL;
-
- // does an init node already exist?
- if(!pOrigObj->fMarkA) {
-
- pInitObj = Abc_FlowRetime_CopyNodeToInitNtk( pOrigObj );
-
- Abc_FlowRetime_SetInitToOrig( pInitObj, pOrigObj );
- FDATA(pOrigObj)->pInitObj = pInitObj;
-
- pOrigObj->fMarkA = 1;
- } else {
- pInitObj = FDATA(pOrigObj)->pInitObj;
- }
- assert(pInitObj);
-
- // have we already connected this object?
- if (!pOrigObj->fMarkB) {
-
- // create and/or connect fanins
- Abc_ObjForEachFanin( pOrigObj, pOrigFanin, i ) {
- // should not reach BOs (i.e. the start of the next frame)
- // the new latch bounday should lie before it
- assert(!Abc_ObjIsBo( pOrigFanin ));
- pInitFanin = Abc_FlowRetime_UpdateBackwardInit_rec( pOrigFanin );
- Abc_ObjAddFanin( pInitObj, pInitFanin );
- }
-
- pOrigObj->fMarkB = 1;
- }
-
- return pInitObj;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Verifies backward init state computation.]
-
- Description [This procedure requires the BOs to store the original
- latch values and the latches to store the new values:
- both in the INIT_0 and INIT_1 flags in the Flow_Data
- structure. (This is not currently the case in the rest
- of the code.) Also, can not verify backward state
- computations that span multiple combinational frames.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_VerifyBackwardInit( Abc_Ntk_t * pNtk ) {
- Abc_Obj_t *pObj, *pFanin;
- int i;
-
- vprintf("\t\tupdating init state\n");
-
- Abc_NtkIncrementTravId( pNtk );
-
- Abc_NtkForEachObj( pNtk, pObj, i )
- if (Abc_ObjIsBo( pObj )) {
- pFanin = Abc_ObjFanin0(pObj);
- Abc_FlowRetime_VerifyBackwardInit_rec( pFanin );
-
- if (FTEST(pObj, INIT_CARE)) {
- if(FTEST(pObj, INIT_CARE) != FTEST(pFanin, INIT_CARE)) {
- printf("ERROR: expected val=%d care=%d and got val=%d care=%d\n",
- FTEST(pObj, INIT_1)?1:0, FTEST(pObj, INIT_CARE)?1:0,
- FTEST(pFanin, INIT_1)?1:0, FTEST(pFanin, INIT_CARE)?1:0 );
-
- }
- }
- }
-}
-
-void Abc_FlowRetime_VerifyBackwardInit_rec( Abc_Obj_t * pObj ) {
- Abc_Obj_t *pNext;
- int i;
-
- assert(!Abc_ObjIsBo(pObj)); // should never reach the inputs
- assert(!Abc_ObjIsPi(pObj)); // should never reach the inputs
-
- // visited?
- if (Abc_NodeIsTravIdCurrent(pObj)) return;
- Abc_NodeSetTravIdCurrent(pObj);
-
- if (Abc_ObjIsLatch(pObj)) {
- FUNSET(pObj, INIT_CARE);
- if (Abc_LatchIsInit0(pObj))
- FSET(pObj, INIT_0);
- else if (Abc_LatchIsInit1(pObj))
- FSET(pObj, INIT_1);
- return;
- }
-
- Abc_ObjForEachFanin( pObj, pNext, i ) {
- Abc_FlowRetime_VerifyBackwardInit_rec( pNext );
- }
-
- Abc_FlowRetime_SimulateNode( pObj );
-}
-
-/**Function*************************************************************
-
- Synopsis [Constrains backward retiming for initializability.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_FlowRetime_PartialSat(Vec_Ptr_t *vNodes, int cut) {
- Abc_Ntk_t *pPartNtk, *pInitNtk = pManMR->pInitNtk;
- Abc_Obj_t *pObj, *pNext, *pPartObj, *pPartNext, *pPo;
- int i, j, result;
-
- assert( Abc_NtkPoNum( pInitNtk ) == 1 );
-
- pPartNtk = Abc_NtkAlloc( pInitNtk->ntkType, pInitNtk->ntkFunc, 0 );
-
- // copy network
- Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i ) {
- pObj->Level = i;
- assert(!Abc_ObjIsPo( pObj ));
-
- if (i < cut && !pObj->fMarkA) {
- pPartObj = Abc_NtkCreatePi( pPartNtk );
- Abc_ObjSetCopy( pObj, pPartObj );
- } else {
- // copy node
- pPartObj = Abc_NtkDupObj( pPartNtk, pObj, 0 );
- // copy complementation
- pPartObj->fPhase = pObj->fPhase;
-
- // connect fanins
- Abc_ObjForEachFanin( pObj, pNext, j ) {
- pPartNext = Abc_ObjCopy( pNext );
- assert(pPartNext);
- Abc_ObjAddFanin( pPartObj, pPartNext );
- }
- }
-
- assert(pObj->pCopy == pPartObj);
- }
-
- // create PO
- pPo = Abc_NtkCreatePo( pPartNtk );
- pNext = Abc_ObjFanin0( Abc_NtkPo( pInitNtk, 0 ) );
- pPartNext = Abc_ObjCopy( pNext );
- assert( pPartNext );
- Abc_ObjAddFanin( pPo, pPartNext );
-
- // check network
-#if defined(DEBUG_CHECK)
- Abc_NtkAddDummyPoNames(pPartNtk);
- Abc_NtkAddDummyPiNames(pPartNtk);
- Abc_NtkCheck( pPartNtk );
-#endif
-
- result = Abc_NtkMiterSat( pPartNtk, (sint64)500000, (sint64)50000000, 0, NULL, NULL );
-
- Abc_NtkDelete( pPartNtk );
-
- return !result;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Constrains backward retiming for initializability.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_ConstrainInit( ) {
- Vec_Ptr_t *vNodes;
- int low, high, mid;
- int i, n, lag;
- Abc_Obj_t *pObj = NULL, *pOrigObj;
- InitConstraint_t *pConstraint = ALLOC( InitConstraint_t, 1 );
-
- memset( pConstraint, 0, sizeof(InitConstraint_t) );
-
- assert(pManMR->pInitNtk);
-
- vprintf("\tsearch for initial state conflict...\n");
-
- vNodes = Abc_NtkDfs(pManMR->pInitNtk, 0);
- n = Vec_PtrSize(vNodes);
- // also add PIs to vNodes
- Abc_NtkForEachPi(pManMR->pInitNtk, pObj, i)
- Vec_PtrPush(vNodes, pObj);
- Vec_PtrReorder(vNodes, n);
-
-#if defined(DEBUG_CHECK)
- assert(!Abc_FlowRetime_PartialSat( vNodes, 0 ));
-#endif
-
- // grow initialization constraint
- do {
- vprintf("\t\t");
-
- // find element to add to set...
- low = 0, high = Vec_PtrSize(vNodes);
- while (low != high-1) {
- mid = (low + high) >> 1;
-
- if (!Abc_FlowRetime_PartialSat( vNodes, mid )) {
- low = mid;
- vprintf("-");
- } else {
- high = mid;
- vprintf("*");
- }
- fflush(stdout);
- }
-
-#if defined(DEBUG_CHECK)
- assert(Abc_FlowRetime_PartialSat( vNodes, high ));
- assert(!Abc_FlowRetime_PartialSat( vNodes, low ));
-#endif
-
- // mark its TFO
- pObj = Vec_PtrEntry( vNodes, low );
- Abc_NtkMarkCone_rec( pObj, 1 );
- vprintf(" conflict term = %d ", low);
-
-#if 0
- printf("init ------\n");
- Abc_ObjPrint(stdout, pObj);
- printf("\n");
- Abc_ObjPrintNeighborhood( pObj, 1 );
- printf("------\n");
-#endif
-
- // add node to constraint
- Abc_FlowRetime_GetInitToOrig( pObj, &pOrigObj, &lag );
- assert(pOrigObj);
- vprintf(" <=> %d/%d\n", Abc_ObjId(pOrigObj), lag);
-
-#if 0
- printf("orig ------\n");
- Abc_ObjPrint(stdout, pOrigObj);
- printf("\n");
- Abc_ObjPrintNeighborhood( pOrigObj, 1 );
- printf("------\n");
-#endif
- Vec_IntPush( &pConstraint->vNodes, Abc_ObjId(pOrigObj) );
- Vec_IntPush( &pConstraint->vLags, lag );
-
- } while (Abc_FlowRetime_PartialSat( vNodes, Vec_PtrSize(vNodes) ));
-
- pConstraint->pBiasNode = NULL;
-
- // add constraint
- Vec_PtrPush( pManMR->vInitConstraints, pConstraint );
-
- // clear marks
- Abc_NtkForEachObj( pManMR->pInitNtk, pObj, i)
- pObj->fMarkA = 0;
-
- // free
- Vec_PtrFree( vNodes );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Removes nodes to bias against uninitializable cuts.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_RemoveInitBias( ) {
- // Abc_Ntk_t *pNtk = pManMR->pNtk;
- Abc_Obj_t *pBiasNode;
- InitConstraint_t *pConstraint;
- int i;
-
- Vec_PtrForEachEntry( Abc_Obj_t *, pManMR->vInitConstraints, pConstraint, i ) {
- pBiasNode = pConstraint->pBiasNode;
- pConstraint->pBiasNode = NULL;
-
- if (pBiasNode)
- Abc_NtkDeleteObj(pBiasNode);
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Connects the bias node to one of the constraint vertices.]
-
- Description [ACK!
- Currently this is dumb dumb hack.
- What should we do with biases that belong on BOs? These
- move through the circuit.
- Currently, the bias gets marked on the fan-in of BO
- and the bias gets implemented on every BO fan-out of a
- node.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static void Abc_FlowRetime_ConnectBiasNode(Abc_Obj_t *pBiasNode, Abc_Obj_t *pObj, int biasLag) {
- Abc_Obj_t *pCur, *pNext;
- int i;
- int lag;
- Vec_Ptr_t *vNodes = Vec_PtrAlloc(1);
- Vec_Int_t *vLags = Vec_IntAlloc(1);
- Abc_Ntk_t *pNtk = Abc_ObjNtk( pObj );
-
- Vec_PtrPush( vNodes, pObj );
- Vec_IntPush( vLags, 0 );
-
- Abc_NtkIncrementTravId( pNtk );
-
- while (Vec_PtrSize( vNodes )) {
- pCur = Vec_PtrPop( vNodes );
- lag = Vec_IntPop( vLags );
-
- if (Abc_NodeIsTravIdCurrent( pCur )) continue;
- Abc_NodeSetTravIdCurrent( pCur );
-
- if (!Abc_ObjIsLatch(pCur) &&
- !Abc_ObjIsBo(pCur) &&
- Abc_FlowRetime_GetLag(pObj)+lag == biasLag ) {
-
- // printf("biasing : ");
- // Abc_ObjPrint(stdout, pCur );
-#if 1
- FSET( pCur, BLOCK );
-#else
- Abc_ObjAddFanin( pCur, pBiasNode );
-#endif
- }
-
- Abc_ObjForEachFanout( pCur, pNext, i ) {
- if (Abc_ObjIsBi(pNext) ||
- Abc_ObjIsLatch(pNext) ||
- Abc_ObjIsBo(pNext) ||
- Abc_ObjIsBo(pCur)) {
- Vec_PtrPush( vNodes, pNext );
- Vec_IntPush( vLags, lag - Abc_ObjIsLatch(pNext) ? 1 : 0 );
- }
- }
- }
-
- Vec_PtrFree( vNodes );
- Vec_IntFree( vLags );
-}
-
-/**Function*************************************************************
-
- Synopsis [Adds nodes to bias against uninitializable cuts.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_AddInitBias( ) {
- Abc_Ntk_t *pNtk = pManMR->pNtk;
- Abc_Obj_t *pBiasNode, *pObj;
- InitConstraint_t *pConstraint;
- int i, j, id;
- const int nConstraints = Vec_PtrSize( pManMR->vInitConstraints );
-
- pManMR->pDataArray = REALLOC( Flow_Data_t, pManMR->pDataArray, pManMR->nNodes + (nConstraints*(pManMR->iteration+1)) );
- memset(pManMR->pDataArray + pManMR->nNodes, 0, sizeof(Flow_Data_t)*(nConstraints*(pManMR->iteration+1)));
-
- vprintf("\t\tcreating %d bias structures\n", nConstraints);
-
- Vec_PtrForEachEntry( Abc_Obj_t *, pManMR->vInitConstraints, pConstraint, i ) {
- if (pConstraint->pBiasNode) continue;
-
- // printf("\t\t\tbias %d...\n", i);
- pBiasNode = Abc_NtkCreateBlackbox( pNtk );
-
- Vec_IntForEachEntry( &pConstraint->vNodes, id, j ) {
- pObj = Abc_NtkObj(pNtk, id);
- Abc_FlowRetime_ConnectBiasNode(pBiasNode, pObj, Vec_IntEntry(&pConstraint->vLags, j));
- }
-
- // pConstraint->pBiasNode = pBiasNode;
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Clears mapping from init node to original node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_ClearInitToOrig( Abc_Obj_t *pInit )
-{
- int id = Abc_ObjId( pInit );
-
- // grow data structure if necessary
- if (id >= pManMR->sizeInitToOrig) {
- int oldSize = pManMR->sizeInitToOrig;
- pManMR->sizeInitToOrig = 1.5*id + 10;
- pManMR->pInitToOrig = realloc(pManMR->pInitToOrig, sizeof(NodeLag_t)*pManMR->sizeInitToOrig);
- memset( &(pManMR->pInitToOrig[oldSize]), 0, sizeof(NodeLag_t)*(pManMR->sizeInitToOrig-oldSize) );
- }
- assert( pManMR->pInitToOrig );
-
- pManMR->pInitToOrig[id].id = -1;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Sets mapping from init node to original node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_SetInitToOrig( Abc_Obj_t *pInit, Abc_Obj_t *pOrig)
-{
- int lag;
- int id = Abc_ObjId( pInit );
-
- // grow data structure if necessary
- if (id >= pManMR->sizeInitToOrig) {
- int oldSize = pManMR->sizeInitToOrig;
- pManMR->sizeInitToOrig = 1.5*id + 10;
- pManMR->pInitToOrig = realloc(pManMR->pInitToOrig, sizeof(NodeLag_t)*pManMR->sizeInitToOrig);
- memset( &(pManMR->pInitToOrig[oldSize]), 0, sizeof(NodeLag_t)*(pManMR->sizeInitToOrig-oldSize) );
- }
- assert( pManMR->pInitToOrig );
-
- // ignore BI, BO, and latch nodes
- if (Abc_ObjIsBo(pOrig) || Abc_ObjIsBi(pOrig) || Abc_ObjIsLatch(pOrig)) {
- Abc_FlowRetime_ClearInitToOrig(pInit);
- return;
- }
-
- // move out of latch boxes
- lag = Abc_FlowRetime_ObjFirstNonLatchBox(pOrig, &pOrig);
-
- pManMR->pInitToOrig[id].id = Abc_ObjId(pOrig);
- pManMR->pInitToOrig[id].lag = Abc_FlowRetime_GetLag(pOrig) + lag;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Gets mapping from init node to original node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_GetInitToOrig( Abc_Obj_t *pInit, Abc_Obj_t **pOrig, int *lag ) {
-
- int id = Abc_ObjId( pInit );
- int origId;
-
- assert(id < pManMR->sizeInitToOrig);
-
- origId = pManMR->pInitToOrig[id].id;
-
- if (origId < 0) {
- assert(Abc_ObjFaninNum(pInit));
- Abc_FlowRetime_GetInitToOrig( Abc_ObjFanin0(pInit), pOrig, lag);
- return;
- }
-
- *pOrig = Abc_NtkObj(pManMR->pNtk, origId);
- *lag = pManMR->pInitToOrig[id].lag;
-}
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/opt/fret/fretMain.c b/src/opt/fret/fretMain.c
deleted file mode 100644
index 141baff4..00000000
--- a/src/opt/fret/fretMain.c
+++ /dev/null
@@ -1,1385 +0,0 @@
-/**CFile****************************************************************
-
- FileName [fretMain.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Flow-based retiming package.]
-
- Synopsis [Main file for retiming package.]
-
- Author [Aaron Hurst]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - January 1, 2008.]
-
- Revision [$Id: fretMain.c,v 1.00 2008/01/01 00:00:00 ahurst Exp $]
-
-***********************************************************************/
-
-#include "abc.h"
-#include "vec.h"
-#include "fretime.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-static void Abc_FlowRetime_AddDummyFanin( Abc_Obj_t * pObj );
-
-static Abc_Ntk_t* Abc_FlowRetime_MainLoop( );
-
-static void Abc_FlowRetime_MarkBlocks( Abc_Ntk_t * pNtk );
-static void Abc_FlowRetime_MarkReachable_rec( Abc_Obj_t * pObj, char end );
-static int Abc_FlowRetime_ImplementCut( Abc_Ntk_t * pNtk );
-static void Abc_FlowRetime_RemoveLatchBubbles( Abc_Obj_t * pLatch );
-
-static Abc_Ntk_t* Abc_FlowRetime_NtkDup( Abc_Ntk_t * pNtk );
-
-static void Abc_FlowRetime_VerifyPathLatencies( Abc_Ntk_t * pNtk );
-static int Abc_FlowRetime_VerifyPathLatencies_rec( Abc_Obj_t * pObj, int markD );
-
-static void Abc_FlowRetime_UpdateLags_forw_rec( Abc_Obj_t *pObj );
-static void Abc_FlowRetime_UpdateLags_back_rec( Abc_Obj_t *pObj );
-
-extern void Abc_NtkMarkCone_rec( Abc_Obj_t * pObj, int fForward );
-
-void
-print_node3(Abc_Obj_t *pObj);
-
-MinRegMan_t *pManMR;
-
-int fPathError = 0;
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
- Synopsis [Performs minimum-register retiming.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t *
-Abc_FlowRetime_MinReg( Abc_Ntk_t * pNtk, int fVerbose,
- int fComputeInitState, int fGuaranteeInitState, int fBlockConst,
- int fForwardOnly, int fBackwardOnly, int nMaxIters,
- int maxDelay, int fFastButConservative ) {
-
- int i;
- Abc_Obj_t *pObj, *pNext;
- InitConstraint_t *pData;
-
- // create manager
- pManMR = ALLOC( MinRegMan_t, 1 );
-
- pManMR->pNtk = pNtk;
- pManMR->fVerbose = fVerbose;
- pManMR->fComputeInitState = fComputeInitState;
- pManMR->fGuaranteeInitState = fGuaranteeInitState;
- pManMR->fBlockConst = fBlockConst;
- pManMR->fForwardOnly = fForwardOnly;
- pManMR->fBackwardOnly = fBackwardOnly;
- pManMR->nMaxIters = nMaxIters;
- pManMR->maxDelay = maxDelay;
- pManMR->fComputeInitState = fComputeInitState;
- pManMR->fConservTimingOnly = fFastButConservative;
- pManMR->vNodes = Vec_PtrAlloc(100);
- pManMR->vInitConstraints = Vec_PtrAlloc(2);
- pManMR->pInitNtk = NULL;
- pManMR->pInitToOrig = NULL;
- pManMR->sizeInitToOrig = 0;
-
- vprintf("Flow-based minimum-register retiming...\n");
-
- if (!Abc_NtkHasOnlyLatchBoxes(pNtk)) {
- printf("\tERROR: Can not retime with black/white boxes\n");
- return pNtk;
- }
-
- if (maxDelay) {
- vprintf("\tmax delay constraint = %d\n", maxDelay);
- if (maxDelay < (i = Abc_NtkLevel(pNtk))) {
- printf("ERROR: max delay constraint (%d) must be > current max delay (%d)\n", maxDelay, i);
- return pNtk;
- }
- }
-
- // print info about type of network
- vprintf("\tnetlist type = ");
- if (Abc_NtkIsNetlist( pNtk )) { vprintf("netlist/"); }
- else if (Abc_NtkIsLogic( pNtk )) { vprintf("logic/"); }
- else if (Abc_NtkIsStrash( pNtk )) { vprintf("strash/"); }
- else { vprintf("***unknown***/"); }
- if (Abc_NtkHasSop( pNtk )) { vprintf("sop\n"); }
- else if (Abc_NtkHasBdd( pNtk )) { vprintf("bdd\n"); }
- else if (Abc_NtkHasAig( pNtk )) { vprintf("aig\n"); }
- else if (Abc_NtkHasMapping( pNtk )) { vprintf("mapped\n"); }
- else { vprintf("***unknown***\n"); }
-
- vprintf("\tinitial reg count = %d\n", Abc_NtkLatchNum(pNtk));
- vprintf("\tinitial levels = %d\n", Abc_NtkLevel(pNtk));
-
- // remove bubbles from latch boxes
- if (pManMR->fVerbose) Abc_FlowRetime_PrintInitStateInfo(pNtk);
- vprintf("\tpushing bubbles out of latch boxes\n");
- Abc_NtkForEachLatch( pNtk, pObj, i )
- Abc_FlowRetime_RemoveLatchBubbles(pObj);
- if (pManMR->fVerbose) Abc_FlowRetime_PrintInitStateInfo(pNtk);
-
- // check for box inputs/outputs
- Abc_NtkForEachLatch( pNtk, pObj, i ) {
- assert(Abc_ObjFaninNum(pObj) == 1);
- assert(Abc_ObjFanoutNum(pObj) == 1);
- assert(!Abc_ObjFaninC0(pObj));
-
- pNext = Abc_ObjFanin0(pObj);
- assert(Abc_ObjIsBi(pNext));
- assert(Abc_ObjFaninNum(pNext) <= 1);
- if(Abc_ObjFaninNum(pNext) == 0) // every Bi should have a fanin
- Abc_FlowRetime_AddDummyFanin( pNext );
-
- pNext = Abc_ObjFanout0(pObj);
- assert(Abc_ObjIsBo(pNext));
- assert(Abc_ObjFaninNum(pNext) == 1);
- assert(!Abc_ObjFaninC0(pNext));
- }
-
- pManMR->nLatches = Abc_NtkLatchNum( pNtk );
- pManMR->nNodes = Abc_NtkObjNumMax( pNtk )+1;
-
- // build histogram
- pManMR->vSinkDistHist = Vec_IntStart( pManMR->nNodes*2+10 );
-
- // initialize timing
- if (maxDelay)
- Abc_FlowRetime_InitTiming( pNtk );
-
- // create lag and Flow_Data structure
- pManMR->vLags = Vec_IntStart(pManMR->nNodes);
- memset(pManMR->vLags->pArray, 0, sizeof(int)*pManMR->nNodes);
-
- pManMR->pDataArray = ALLOC( Flow_Data_t, pManMR->nNodes );
- Abc_FlowRetime_ClearFlows( 1 );
-
- // main loop!
- pNtk = Abc_FlowRetime_MainLoop();
-
- // cleanup node fields
- Abc_NtkForEachObj( pNtk, pObj, i ) {
- // if not computing init state, set all latches to DC
- if (!fComputeInitState && Abc_ObjIsLatch(pObj))
- Abc_LatchSetInitDc(pObj);
- }
-
- // deallocate space
- FREE( pManMR->pDataArray );
- if (pManMR->pInitToOrig) FREE( pManMR->pInitToOrig );
- if (pManMR->vNodes) Vec_PtrFree(pManMR->vNodes);
- if (pManMR->vLags) Vec_IntFree(pManMR->vLags);
- if (pManMR->vSinkDistHist) Vec_IntFree(pManMR->vSinkDistHist);
- if (pManMR->maxDelay) Abc_FlowRetime_FreeTiming( pNtk );
- while( Vec_PtrSize( pManMR->vInitConstraints )) {
- pData = Vec_PtrPop( pManMR->vInitConstraints );
- //assert( pData->pBiasNode );
- //Abc_NtkDeleteObj( pData->pBiasNode );
- FREE( pData->vNodes.pArray );
- FREE( pData );
- }
- FREE( pManMR->vInitConstraints );
-
- // restrash if necessary
- if (Abc_NtkIsStrash(pNtk)) {
- Abc_NtkReassignIds( pNtk );
- pNtk = Abc_FlowRetime_NtkSilentRestrash( pNtk, 1 );
- }
-
- vprintf("\tfinal reg count = %d\n", Abc_NtkLatchNum(pNtk));
- vprintf("\tfinal levels = %d\n", Abc_NtkLevel(pNtk));
-
-#if defined(DEBUG_CHECK)
- Abc_NtkDoCheck( pNtk );
-#endif
-
- // free manager
- FREE( pManMR );
-
- return pNtk;
-}
-
-/**Function*************************************************************
-
- Synopsis [Main loop.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t *
-Abc_FlowRetime_MainLoop( ) {
- Abc_Ntk_t *pNtk = pManMR->pNtk, *pNtkCopy = pNtk;
- Abc_Obj_t *pObj; int i;
- int last, flow = 0, cut;
-
- // (i) forward retiming loop
- pManMR->fIsForward = 1;
- pManMR->iteration = 0;
-
- if (!pManMR->fBackwardOnly) do {
- if (pManMR->iteration == pManMR->nMaxIters) break;
- pManMR->subIteration = 0;
-
- vprintf("\tforward iteration %d\n", pManMR->iteration);
- last = Abc_NtkLatchNum( pNtk );
-
- Abc_FlowRetime_MarkBlocks( pNtk );
-
- if (pManMR->maxDelay) {
- // timing-constrained loop
- Abc_FlowRetime_ConstrainConserv( pNtk );
- while(Abc_FlowRetime_RefineConstraints( )) {
- pManMR->subIteration++;
- Abc_FlowRetime_ClearFlows( 0 );
- }
- } else {
- flow = Abc_FlowRetime_PushFlows( pNtk, 1 );
- }
-
- cut = Abc_FlowRetime_ImplementCut( pNtk );
-
-#if defined (DEBUG_PRINT_LEVELS)
- vprintf("\t\tlevels = %d\n", Abc_NtkLevel(pNtk));
-#endif
-
- Abc_FlowRetime_ClearFlows( 1 );
-
- pManMR->iteration++;
- } while( cut != last );
-
- // intermediate cleanup (for strashed networks)
- if (Abc_NtkIsStrash(pNtk)) {
- Abc_NtkReassignIds( pNtk );
- pNtk = pManMR->pNtk = Abc_FlowRetime_NtkSilentRestrash( pNtk, 1 );
- }
-
- // print info about initial states
- if (pManMR->fComputeInitState && pManMR->fVerbose)
- Abc_FlowRetime_PrintInitStateInfo( pNtk );
-
- // (ii) backward retiming loop
- pManMR->fIsForward = 0;
-
- if (!pManMR->fForwardOnly) do {
- // initializability loop
- pManMR->iteration = 0;
-
- // copy/restore network
- if (pManMR->fGuaranteeInitState) {
- if ( pNtk != pNtkCopy )
- Abc_NtkDelete( pNtk );
- pNtk = pManMR->pNtk = Abc_FlowRetime_NtkDup( pNtkCopy );
- vprintf("\trestoring network. regs = %d\n", Abc_NtkLatchNum( pNtk ));
- }
-
- if (pManMR->fComputeInitState) {
- Abc_FlowRetime_SetupBackwardInit( pNtk );
- }
-
- do {
- if (pManMR->iteration == pManMR->nMaxIters) break;
- pManMR->subIteration = 0;
-
- vprintf("\tbackward iteration %d\n", pManMR->iteration);
- last = Abc_NtkLatchNum( pNtk );
-
- Abc_FlowRetime_AddInitBias( );
- Abc_FlowRetime_MarkBlocks( pNtk );
-
- if (pManMR->maxDelay) {
- // timing-constrained loop
- Abc_FlowRetime_ConstrainConserv( pNtk );
- while(Abc_FlowRetime_RefineConstraints( )) {
- pManMR->subIteration++;
- Abc_FlowRetime_ClearFlows( 0 );
- }
- } else {
- flow = Abc_FlowRetime_PushFlows( pNtk, 1 );
- }
-
- Abc_FlowRetime_RemoveInitBias( );
- cut = Abc_FlowRetime_ImplementCut( pNtk );
-
-#if defined(DEBUG_PRINT_LEVELS)
- vprintf("\t\tlevels = %d\n", Abc_NtkLevelReverse(pNtk));
-#endif
-
- Abc_FlowRetime_ClearFlows( 1 );
-
- pManMR->iteration++;
- } while( cut != last );
-
- // compute initial states
- if (!pManMR->fComputeInitState) break;
-
- if (Abc_FlowRetime_SolveBackwardInit( pNtk )) {
- if (pManMR->fVerbose) Abc_FlowRetime_PrintInitStateInfo( pNtk );
- break;
- } else {
- if (!pManMR->fGuaranteeInitState) {
- printf("WARNING: no equivalent init state. setting all initial states to don't-cares\n");
- Abc_NtkForEachLatch( pNtk, pObj, i ) Abc_LatchSetInitDc( pObj );
- break;
- }
- Abc_FlowRetime_ConstrainInit( );
- }
-
- Abc_NtkDelete(pManMR->pInitNtk);
- pManMR->pInitNtk = NULL;
- } while(1);
-
-// assert(!pManMR->fComputeInitState || pManMR->pInitNtk);
- if (pManMR->fComputeInitState) Abc_NtkDelete(pManMR->pInitNtk);
- if (pManMR->fGuaranteeInitState) ; /* Abc_NtkDelete(pNtkCopy); note: original ntk deleted later */
-
- return pNtk;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Pushes latch bubbles outside of box.]
-
- Description [If network is an AIG, a fCompl0 is allowed to remain on
- the BI node.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_RemoveLatchBubbles( Abc_Obj_t * pLatch ) {
- int bubble = 0;
- Abc_Ntk_t *pNtk = pManMR->pNtk;
- Abc_Obj_t *pBi, *pBo, *pInv;
-
- pBi = Abc_ObjFanin0(pLatch);
- pBo = Abc_ObjFanout0(pLatch);
- assert(!Abc_ObjIsComplement(pBi));
- assert(!Abc_ObjIsComplement(pBo));
-
- // push bubbles on BO into latch box
- if (Abc_ObjFaninC0(pBo) && Abc_ObjFanoutNum(pBo) > 0) {
- bubble = 1;
- if (Abc_LatchIsInit0(pLatch)) Abc_LatchSetInit1(pLatch);
- else if (Abc_LatchIsInit1(pLatch)) Abc_LatchSetInit0(pLatch);
- }
-
- // absorb bubbles on BI
- pBi->fCompl0 ^= bubble ^ Abc_ObjFaninC0(pLatch);
-
- // convert bubble to INV if not AIG
- if (!Abc_NtkIsStrash( pNtk ) && Abc_ObjFaninC0(pBi)) {
- pBi->fCompl0 = 0;
- pInv = Abc_NtkCreateNodeInv( pNtk, Abc_ObjFanin0(pBi) );
- Abc_ObjPatchFanin( pBi, Abc_ObjFanin0(pBi), pInv );
- }
-
- pBo->fCompl0 = 0;
- pLatch->fCompl0 = 0;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Marks nodes in TFO/TFI of PI/PO.]
-
- Description [Sets flow data flag BLOCK appropriately.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_MarkBlocks( Abc_Ntk_t * pNtk ) {
- int i;
- Abc_Obj_t *pObj;
-
- if (pManMR->fIsForward){
- // --- forward retiming : block TFO of inputs
-
- // mark the frontier
- Abc_NtkForEachPo( pNtk, pObj, i )
- pObj->fMarkA = 1;
- Abc_NtkForEachLatch( pNtk, pObj, i )
- {
- pObj->fMarkA = 1;
- }
- // mark the nodes reachable from the PIs
- Abc_NtkForEachPi( pNtk, pObj, i )
- Abc_NtkMarkCone_rec( pObj, pManMR->fIsForward );
- } else {
- // --- backward retiming : block TFI of outputs
-
- // mark the frontier
- Abc_NtkForEachPi( pNtk, pObj, i )
- pObj->fMarkA = 1;
- Abc_NtkForEachLatch( pNtk, pObj, i )
- {
- pObj->fMarkA = 1;
- }
- // mark the nodes reachable from the POs
- Abc_NtkForEachPo( pNtk, pObj, i )
- Abc_NtkMarkCone_rec( pObj, pManMR->fIsForward );
- // block constant nodes (if enabled)
- if (pManMR->fBlockConst) {
- Abc_NtkForEachObj( pNtk, pObj, i )
- if ((Abc_NtkIsStrash(pNtk) && Abc_AigNodeIsConst(pObj)) ||
- (!Abc_NtkIsStrash(pNtk) && Abc_NodeIsConst(pObj))) {
- FSET(pObj, BLOCK);
- }
- }
- }
-
- // copy marks
- Abc_NtkForEachObj( pNtk, pObj, i ) {
- if (pObj->fMarkA) {
- pObj->fMarkA = 0;
- if (!Abc_ObjIsLatch(pObj) /* && !Abc_ObjIsPi(pObj) */ )
- FSET(pObj, BLOCK);
- }
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Computes maximum flow.]
-
- Description []
-
- SideEffects [Leaves VISITED flags on source-reachable nodes.]
-
- SeeAlso []
-
-***********************************************************************/
-int
-Abc_FlowRetime_PushFlows( Abc_Ntk_t * pNtk, int fVerbose ) {
- int i, j, flow = 0, last, srcDist = 0;
- Abc_Obj_t *pObj, *pObj2;
-// int clk = clock();
-
- pManMR->constraintMask |= BLOCK;
-
- pManMR->fSinkDistTerminate = 0;
- dfsfast_preorder( pNtk );
-
- // (i) fast max-flow computation
- while(!pManMR->fSinkDistTerminate && srcDist < MAX_DIST) {
- srcDist = MAX_DIST;
- Abc_NtkForEachLatch( pNtk, pObj, i )
- if (FDATA(pObj)->e_dist)
- srcDist = MIN(srcDist, FDATA(pObj)->e_dist);
-
- Abc_NtkForEachLatch( pNtk, pObj, i ) {
- if (srcDist == FDATA(pObj)->e_dist &&
- dfsfast_e( pObj, NULL )) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("\n\n");
-#endif
- flow++;
- }
- }
- }
-
- if (fVerbose) vprintf("\t\tmax-flow1 = %d \t", flow);
-
- // (ii) complete max-flow computation
- // also, marks source-reachable nodes
- do {
- last = flow;
- Abc_NtkForEachLatch( pNtk, pObj, i ) {
- if (dfsplain_e( pObj, NULL )) {
-#ifdef DEBUG_PRINT_FLOWS
- printf("\n\n");
-#endif
- flow++;
- Abc_NtkForEachObj( pNtk, pObj2, j )
- FUNSET( pObj2, VISITED );
- }
- }
- } while (flow > last);
-
- if (fVerbose) vprintf("max-flow2 = %d\n", flow);
-
-// PRT( "time", clock() - clk );
- return flow;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Restores latch boxes.]
-
- Description [Latchless BI/BO nodes are removed. Latch boxes are
- restored around remaining latches.]
-
- SideEffects [Deletes nodes as appropriate.]
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_FixLatchBoxes( Abc_Ntk_t *pNtk, Vec_Ptr_t *vBoxIns ) {
- int i;
- Abc_Obj_t *pObj, *pBo = NULL, *pBi = NULL;
- Vec_Ptr_t *vFreeBi = Vec_PtrAlloc( 100 );
- Vec_Ptr_t *vFreeBo = Vec_PtrAlloc( 100 );
-
- // 1. remove empty bi/bo pairs
- while(Vec_PtrSize( vBoxIns )) {
- pBi = (Abc_Obj_t *)Vec_PtrPop( vBoxIns );
- assert(Abc_ObjIsBi(pBi));
- assert(Abc_ObjFanoutNum(pBi) == 1);
- // APH: broken by bias nodes assert(Abc_ObjFaninNum(pBi) == 1);
- pBo = Abc_ObjFanout0(pBi);
- assert(!Abc_ObjFaninC0(pBo));
-
- if (Abc_ObjIsBo(pBo)) {
- // an empty bi/bo pair
-
- Abc_ObjRemoveFanins( pBo );
- // transfer complement from BI, if present
- assert(!Abc_ObjIsComplement(Abc_ObjFanin0(pBi)));
- Abc_ObjBetterTransferFanout( pBo, Abc_ObjFanin0(pBi), Abc_ObjFaninC0(pBi) );
-
- Abc_ObjRemoveFanins( pBi );
- pBi->fCompl0 = 0;
- Vec_PtrPush( vFreeBi, pBi );
- Vec_PtrPush( vFreeBo, pBo );
-
- // free names
- if (Nm_ManFindNameById(pNtk->pManName, Abc_ObjId(pBi)))
- Nm_ManDeleteIdName( pNtk->pManName, Abc_ObjId(pBi));
- if (Nm_ManFindNameById(pNtk->pManName, Abc_ObjId(pBo)))
- Nm_ManDeleteIdName( pNtk->pManName, Abc_ObjId(pBo));
-
- // check for complete detachment
- assert(Abc_ObjFaninNum(pBi) == 0);
- assert(Abc_ObjFanoutNum(pBi) == 0);
- assert(Abc_ObjFaninNum(pBo) == 0);
- assert(Abc_ObjFanoutNum(pBo) == 0);
- } else if (Abc_ObjIsLatch(pBo)) {
- } else {
- Abc_ObjPrint(stdout, pBi);
- Abc_ObjPrint(stdout, pBo);
- assert(0);
- }
- }
-
- // 2. add bi/bos as necessary for latches
- Abc_NtkForEachLatch( pNtk, pObj, i ) {
- assert(Abc_ObjFaninNum(pObj) == 1);
- if (Abc_ObjFanoutNum(pObj))
- pBo = Abc_ObjFanout0(pObj);
- else pBo = NULL;
- pBi = Abc_ObjFanin0(pObj);
-
- // add BO
- if (!pBo || !Abc_ObjIsBo(pBo)) {
- pBo = (Abc_Obj_t *)Vec_PtrPop( vFreeBo );
- if (Abc_ObjFanoutNum(pObj)) Abc_ObjTransferFanout( pObj, pBo );
- Abc_ObjAddFanin( pBo, pObj );
- }
- // add BI
- if (!Abc_ObjIsBi(pBi)) {
- pBi = (Abc_Obj_t *)Vec_PtrPop( vFreeBi );
- assert(Abc_ObjFaninNum(pBi) == 0);
- Abc_ObjAddFanin( pBi, Abc_ObjFanin0(pObj) );
- pBi->fCompl0 = pObj->fCompl0;
- Abc_ObjRemoveFanins( pObj );
- Abc_ObjAddFanin( pObj, pBi );
- }
- }
-
- // delete remaining BIs and BOs
- while(Vec_PtrSize( vFreeBi )) {
- pObj = (Abc_Obj_t *)Vec_PtrPop( vFreeBi );
- Abc_NtkDeleteObj( pObj );
- }
- while(Vec_PtrSize( vFreeBo )) {
- pObj = (Abc_Obj_t *)Vec_PtrPop( vFreeBo );
- Abc_NtkDeleteObj( pObj );
- }
-
-#if defined(DEBUG_CHECK)
- Abc_NtkForEachObj( pNtk, pObj, i ) {
- if (Abc_ObjIsBo(pObj)) {
- assert(Abc_ObjFaninNum(pObj) == 1);
- assert(Abc_ObjIsLatch(Abc_ObjFanin0(pObj)));
- }
- if (Abc_ObjIsBi(pObj)) {
- assert(Abc_ObjFaninNum(pObj) == 1);
- assert(Abc_ObjFanoutNum(pObj) == 1);
- assert(Abc_ObjIsLatch(Abc_ObjFanout0(pObj)));
- }
- if (Abc_ObjIsLatch(pObj)) {
- assert(Abc_ObjFanoutNum(pObj) == 1);
- assert(Abc_ObjFaninNum(pObj) == 1);
- }
- }
-#endif
-
- Vec_PtrFree( vFreeBi );
- Vec_PtrFree( vFreeBo );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Checks register count along all combinational paths.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_VerifyPathLatencies( Abc_Ntk_t * pNtk ) {
- int i;
- Abc_Obj_t *pObj;
- fPathError = 0;
-
- vprintf("\t\tVerifying latency along all paths...");
-
- Abc_NtkForEachObj( pNtk, pObj, i ) {
- if (Abc_ObjIsBo(pObj)) {
- Abc_FlowRetime_VerifyPathLatencies_rec( pObj, 0 );
- } else if (!pManMR->fIsForward && Abc_ObjIsPi(pObj)) {
- Abc_FlowRetime_VerifyPathLatencies_rec( pObj, 0 );
- }
-
- if (fPathError) {
- if (Abc_ObjFaninNum(pObj) > 0) {
- printf("fanin ");
- print_node(Abc_ObjFanin0(pObj));
- }
- printf("\n");
- exit(0);
- }
- }
-
- vprintf(" ok\n");
-
- Abc_NtkForEachObj( pNtk, pObj, i ) {
- pObj->fMarkA = 0;
- pObj->fMarkB = 0;
- pObj->fMarkC = 0;
- }
-}
-
-
-int
-Abc_FlowRetime_VerifyPathLatencies_rec( Abc_Obj_t * pObj, int markD ) {
- int i, j;
- Abc_Obj_t *pNext;
- int fCare = 0;
- int markC = pObj->fMarkC;
-
- if (!pObj->fMarkB) {
- pObj->fMarkB = 1; // visited
-
- if (Abc_ObjIsLatch(pObj))
- markC = 1; // latch in output
-
- if (!pManMR->fIsForward && !Abc_ObjIsPo(pObj) && !Abc_ObjFanoutNum(pObj))
- return -1; // dangling non-PO outputs : don't care what happens
-
- Abc_ObjForEachFanout( pObj, pNext, i ) {
- // reached end of cycle?
- if ( Abc_ObjIsBo(pNext) ||
- (pManMR->fIsForward && Abc_ObjIsPo(pNext)) ) {
- if (!markD && !Abc_ObjIsLatch(pObj)) {
- printf("\nERROR: no-latch path (end)\n");
- print_node(pNext);
- printf("\n");
- fPathError = 1;
- }
- } else if (!pManMR->fIsForward && Abc_ObjIsPo(pNext)) {
- if (markD || Abc_ObjIsLatch(pObj)) {
- printf("\nERROR: extra-latch path to outputs\n");
- print_node(pNext);
- printf("\n");
- fPathError = 1;
- }
- } else {
- j = Abc_FlowRetime_VerifyPathLatencies_rec( pNext, markD || Abc_ObjIsLatch(pObj) );
- if (j >= 0) {
- markC |= j;
- fCare = 1;
- }
- }
-
- if (fPathError) {
- print_node(pObj);
- printf("\n");
- return 0;
- }
- }
- }
-
- if (!fCare) return -1;
-
- if (markC && markD) {
- printf("\nERROR: mult-latch path\n");
- print_node(pObj);
- printf("\n");
- fPathError = 1;
- }
- if (!markC && !markD) {
- printf("\nERROR: no-latch path (inter)\n");
- print_node(pObj);
- printf("\n");
- fPathError = 1;
- }
-
- return (pObj->fMarkC = markC);
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Copies initial state from latches to BO nodes.]
-
- Description [Initial states are marked on BO nodes with INIT_0 and
- INIT_1 flags in their Flow_Data structures.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_CopyInitState( Abc_Obj_t * pSrc, Abc_Obj_t * pDest ) {
- Abc_Obj_t *pObj;
-
- if (!pManMR->fComputeInitState) return;
-
- assert(Abc_ObjIsLatch(pSrc));
- assert(Abc_ObjFanin0(pDest) == pSrc);
- assert(!Abc_ObjFaninC0(pDest));
-
- FUNSET(pDest, INIT_CARE);
- if (Abc_LatchIsInit0(pSrc)) {
- FSET(pDest, INIT_0);
- } else if (Abc_LatchIsInit1(pSrc)) {
- FSET(pDest, INIT_1);
- }
-
- if (!pManMR->fIsForward) {
- pObj = Abc_ObjData(pSrc);
- assert(Abc_ObjIsPi(pObj));
- FDATA(pDest)->pInitObj = pObj;
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Implements min-cut.]
-
- Description [Requires source-reachable nodes to be marked VISITED.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int
-Abc_FlowRetime_ImplementCut( Abc_Ntk_t * pNtk ) {
- int i, j, cut = 0, unmoved = 0;
- Abc_Obj_t *pObj, *pReg, *pNext, *pBo = NULL, *pBi = NULL;
- Vec_Ptr_t *vFreeRegs = Vec_PtrAlloc( Abc_NtkLatchNum(pNtk) );
- Vec_Ptr_t *vBoxIns = Vec_PtrAlloc( Abc_NtkLatchNum(pNtk) );
- Vec_Ptr_t *vMove = Vec_PtrAlloc( 100 );
-
- // remove latches from netlist
- Abc_NtkForEachLatch( pNtk, pObj, i ) {
- pBo = Abc_ObjFanout0(pObj);
- pBi = Abc_ObjFanin0(pObj);
- assert(Abc_ObjIsBo(pBo) && Abc_ObjIsBi(pBi));
- Vec_PtrPush( vBoxIns, pBi );
-
- // copy initial state values to BO
- Abc_FlowRetime_CopyInitState( pObj, pBo );
-
- // re-use latch elsewhere
- Vec_PtrPush( vFreeRegs, pObj );
- FSET(pBo, CROSS_BOUNDARY);
-
- // cut out of netlist
- Abc_ObjPatchFanin( pBo, pObj, pBi );
- Abc_ObjRemoveFanins( pObj );
-
- // free name
- if (Nm_ManFindNameById(pNtk->pManName, Abc_ObjId(pObj)))
- Nm_ManDeleteIdName( pNtk->pManName, Abc_ObjId(pObj));
- }
-
- // insert latches into netlist
- Abc_NtkForEachObj( pNtk, pObj, i ) {
- if (Abc_ObjIsLatch( pObj )) continue;
- if (FTEST(pObj, BIAS_NODE)) continue;
-
- // a latch is required on every node that lies across the min-cit
- assert(!pManMR->fIsForward || !FTEST(pObj, VISITED_E) || FTEST(pObj, VISITED_R));
- if (FTEST(pObj, VISITED_R) && !FTEST(pObj, VISITED_E)) {
- assert(FTEST(pObj, FLOW));
-
- // count size of cut
- cut++;
- if ((pManMR->fIsForward && Abc_ObjIsBo(pObj)) ||
- (!pManMR->fIsForward && Abc_ObjIsBi(pObj)))
- unmoved++;
-
- // only insert latch between fanouts that lie across min-cut
- // some fanout paths may be cut at deeper points
- Abc_ObjForEachFanout( pObj, pNext, j )
- if (Abc_FlowRetime_IsAcrossCut( pObj, pNext ))
- Vec_PtrPush(vMove, pNext);
-
- // check that move-set is non-zero
- if (Vec_PtrSize(vMove) == 0)
- print_node(pObj);
- assert(Vec_PtrSize(vMove) > 0);
-
- // insert one of re-useable registers
- assert(Vec_PtrSize( vFreeRegs ));
- pReg = (Abc_Obj_t *)Vec_PtrPop( vFreeRegs );
-
- Abc_ObjAddFanin(pReg, pObj);
- while(Vec_PtrSize( vMove )) {
- pNext = (Abc_Obj_t *)Vec_PtrPop( vMove );
- Abc_ObjPatchFanin( pNext, pObj, pReg );
- if (Abc_ObjIsBi(pNext)) assert(Abc_ObjFaninNum(pNext) == 1);
-
- }
- // APH: broken by bias nodes if (Abc_ObjIsBi(pObj)) assert(Abc_ObjFaninNum(pObj) == 1);
- }
- }
-
-#if defined(DEBUG_CHECK)
- Abc_FlowRetime_VerifyPathLatencies( pNtk );
-#endif
-
- // delete remaining latches
- while(Vec_PtrSize( vFreeRegs )) {
- pReg = (Abc_Obj_t *)Vec_PtrPop( vFreeRegs );
- Abc_NtkDeleteObj( pReg );
- }
-
- // update initial states
- Abc_FlowRetime_UpdateLags( );
- Abc_FlowRetime_InitState( pNtk );
-
- // restore latch boxes
- Abc_FlowRetime_FixLatchBoxes( pNtk, vBoxIns );
-
- Vec_PtrFree( vFreeRegs );
- Vec_PtrFree( vMove );
- Vec_PtrFree( vBoxIns );
-
- vprintf("\t\tmin-cut = %d (unmoved = %d)\n", cut, unmoved);
- return cut;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Adds dummy fanin.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_AddDummyFanin( Abc_Obj_t * pObj ) {
- Abc_Ntk_t *pNtk = Abc_ObjNtk( pObj );
-
- if (Abc_NtkIsStrash(pNtk))
- Abc_ObjAddFanin(pObj, Abc_AigConst1( pNtk ));
- else
- Abc_ObjAddFanin(pObj, Abc_NtkCreateNodeConst0( pNtk ));
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Prints information about a node.]
-
- Description [Debuging.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-print_node(Abc_Obj_t *pObj) {
- int i;
- Abc_Obj_t * pNext;
- char m[6];
-
- m[0] = 0;
- if (pObj->fMarkA)
- strcat(m, "A");
- if (pObj->fMarkB)
- strcat(m, "B");
- if (pObj->fMarkC)
- strcat(m, "C");
-
- printf("node %d type=%d lev=%d tedge=%d (%x%s) fanouts {", Abc_ObjId(pObj), Abc_ObjType(pObj),
- pObj->Level, Vec_PtrSize(FTIMEEDGES(pObj)), FDATA(pObj)->mark, m);
- Abc_ObjForEachFanout( pObj, pNext, i )
- printf("%d[%d](%d),", Abc_ObjId(pNext), Abc_ObjType(pNext), FDATA(pNext)->mark);
- printf("} fanins {");
- Abc_ObjForEachFanin( pObj, pNext, i )
- printf("%d[%d](%d),", Abc_ObjId(pNext), Abc_ObjType(pNext), FDATA(pNext)->mark);
- printf("}\n");
-}
-
-void
-print_node2(Abc_Obj_t *pObj) {
- int i;
- Abc_Obj_t * pNext;
- char m[6];
-
- m[0] = 0;
- if (pObj->fMarkA)
- strcat(m, "A");
- if (pObj->fMarkB)
- strcat(m, "B");
- if (pObj->fMarkC)
- strcat(m, "C");
-
- printf("node %d type=%d %s fanouts {", Abc_ObjId(pObj), Abc_ObjType(pObj), m);
- Abc_ObjForEachFanout( pObj, pNext, i )
- printf("%d ,", Abc_ObjId(pNext));
- printf("} fanins {");
- Abc_ObjForEachFanin( pObj, pNext, i )
- printf("%d ,", Abc_ObjId(pNext));
- printf("} ");
-}
-
-void
-print_node3(Abc_Obj_t *pObj) {
- int i;
- Abc_Obj_t * pNext;
- char m[6];
-
- m[0] = 0;
- if (pObj->fMarkA)
- strcat(m, "A");
- if (pObj->fMarkB)
- strcat(m, "B");
- if (pObj->fMarkC)
- strcat(m, "C");
-
- printf("\nnode %d type=%d mark=%d %s\n", Abc_ObjId(pObj), Abc_ObjType(pObj), FDATA(pObj)->mark, m);
- printf("fanouts\n");
- Abc_ObjForEachFanout( pObj, pNext, i ) {
- print_node(pNext);
- printf("\n");
- }
- printf("fanins\n");
- Abc_ObjForEachFanin( pObj, pNext, i ) {
- print_node(pNext);
- printf("\n");
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Transfers fanout.]
-
- Description [Does not produce an error if there is no fanout.
- Complements as necessary.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_ObjBetterTransferFanout( Abc_Obj_t * pFrom, Abc_Obj_t * pTo, int compl ) {
- Abc_Obj_t *pNext;
-
- while(Abc_ObjFanoutNum(pFrom) > 0) {
- pNext = Abc_ObjFanout0(pFrom);
- Abc_ObjPatchFanin( pNext, pFrom, Abc_ObjNotCond(pTo, compl) );
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Returns true is a connection spans the min-cut.]
-
- Description [pNext is a direct fanout of pObj.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int
-Abc_FlowRetime_IsAcrossCut( Abc_Obj_t *pObj, Abc_Obj_t *pNext ) {
-
- if (FTEST(pObj, VISITED_R) && !FTEST(pObj, VISITED_E)) {
- if (pManMR->fIsForward) {
- if (!FTEST(pNext, VISITED_R) ||
- (FTEST(pNext, BLOCK_OR_CONS) & pManMR->constraintMask)||
- FTEST(pNext, CROSS_BOUNDARY) ||
- Abc_ObjIsLatch(pNext))
- return 1;
- } else {
- if (FTEST(pNext, VISITED_E) ||
- FTEST(pNext, CROSS_BOUNDARY))
- return 1;
- }
- }
-
- return 0;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Resets flow problem]
-
- Description [If fClearAll is true, all marks will be cleared; this is
- typically appropriate after the circuit structure has
- been modified.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_ClearFlows( int fClearAll ) {
- int i;
-
- if (fClearAll)
- memset(pManMR->pDataArray, 0, sizeof(Flow_Data_t)*pManMR->nNodes);
- else {
- // clear only data related to flow problem
- for(i=0; i<pManMR->nNodes; i++) {
- pManMR->pDataArray[i].mark &= ~(VISITED | FLOW );
- pManMR->pDataArray[i].e_dist = 0;
- pManMR->pDataArray[i].r_dist = 0;
- pManMR->pDataArray[i].pred = NULL;
- }
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Duplicates network.]
-
- Description [Duplicates any type of network. Preserves copy data.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-static Abc_Ntk_t* Abc_FlowRetime_NtkDup( Abc_Ntk_t * pNtk ) {
- Abc_Ntk_t *pNtkCopy;
- Abc_Obj_t *pObj, *pObjCopy, *pNext, *pNextCopy;
- int i, j;
-
- pNtkCopy = Abc_NtkAlloc( pNtk->ntkType, pNtk->ntkFunc, 1 );
- pNtkCopy->pName = Extra_UtilStrsav(pNtk->pName);
- pNtkCopy->pSpec = Extra_UtilStrsav(pNtk->pSpec);
-
- // copy each object
- Abc_NtkForEachObj( pNtk, pObj, i) {
-
- if (Abc_NtkIsStrash( pNtk ) && Abc_AigNodeIsConst( pObj ))
- pObjCopy = Abc_AigConst1( pNtkCopy );
- else
- pObjCopy = Abc_NtkDupObj( pNtkCopy, pObj, 0 );
-
- FDATA( pObj )->pCopy = pObjCopy;
- FDATA( pObj )->mark = 0;
-
- // assert( pManMR->fIsForward || pObj->Id == pObjCopy->Id );
-
- // copy complementation
- pObjCopy->fCompl0 = pObj->fCompl0;
- pObjCopy->fCompl1 = pObj->fCompl1;
- pObjCopy->fPhase = pObj->fPhase;
- }
-
- // connect fanin
- Abc_NtkForEachObj( pNtk, pObj, i) {
- pObjCopy = FDATA(pObj)->pCopy;
- assert(pObjCopy);
- Abc_ObjForEachFanin( pObj, pNext, j ) {
- pNextCopy = FDATA(pNext)->pCopy;
- assert(pNextCopy);
- assert(pNext->Type == pNextCopy->Type);
-
- Abc_ObjAddFanin(pObjCopy, pNextCopy);
- }
- }
-
-#if defined(DEBUG_CHECK) || 1
- Abc_NtkForEachObj( pNtk, pObj, i) {
- pObjCopy = FDATA(pObj)->pCopy;
- assert( Abc_ObjFanoutNum( pObj ) == Abc_ObjFanoutNum( pObjCopy ) );
- assert( Abc_ObjFaninNum( pObj ) == Abc_ObjFaninNum( pObjCopy ) );
- }
-#endif
-
- assert(Abc_NtkObjNum( pNtk ) == Abc_NtkObjNum( pNtkCopy ) );
- assert(Abc_NtkLatchNum( pNtk ) == Abc_NtkLatchNum( pNtkCopy ) );
- assert(Abc_NtkPoNum( pNtk ) == Abc_NtkPoNum( pNtkCopy ) );
- assert(Abc_NtkPiNum( pNtk ) == Abc_NtkPiNum( pNtkCopy ) );
-
- return pNtkCopy;
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Silent restrash.]
-
- Description [Same functionality as Abc_NtkRestrash but w/o warnings.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Abc_FlowRetime_NtkSilentRestrash( Abc_Ntk_t * pNtk, int fCleanup )
-{
- Abc_Ntk_t * pNtkAig;
- Abc_Obj_t * pObj;
- int i, nNodes;//, RetValue;
- assert( Abc_NtkIsStrash(pNtk) );
- // start the new network (constants and CIs of the old network will point to the their counterparts in the new network)
- pNtkAig = Abc_NtkStartFrom( pNtk, ABC_NTK_STRASH, ABC_FUNC_AIG );
- // restrash the nodes (assuming a topological order of the old network)
- Abc_NtkForEachNode( pNtk, pObj, i )
- pObj->pCopy = Abc_AigAnd( (Abc_Aig_t *)pNtkAig->pManFunc, Abc_ObjChild0Copy(pObj), Abc_ObjChild1Copy(pObj) );
- // finalize the network
- Abc_NtkFinalize( pNtk, pNtkAig );
- // perform cleanup if requested
- if ( fCleanup )
- nNodes = Abc_AigCleanup((Abc_Aig_t *)pNtkAig->pManFunc);
- // duplicate EXDC
- if ( pNtk->pExdc )
- pNtkAig->pExdc = Abc_NtkDup( pNtk->pExdc );
- // make sure everything is okay
- if ( !Abc_NtkCheck( pNtkAig ) )
- {
- printf( "Abc_NtkStrash: The network check has failed.\n" );
- Abc_NtkDelete( pNtkAig );
- return NULL;
- }
- return pNtkAig;
-}
-
-
-
-/**Function*************************************************************
-
- Synopsis [Updates lag values.]
-
- Description [Recursive. Forward retiming.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_UpdateLags_forw_rec( Abc_Obj_t *pObj ) {
- Abc_Obj_t *pNext;
- int i;
-
- assert(!Abc_ObjIsPi(pObj));
- assert(!Abc_ObjIsLatch(pObj));
-
- if (Abc_ObjIsBo(pObj)) return;
- if (Abc_NodeIsTravIdCurrent(pObj)) return;
-
- Abc_NodeSetTravIdCurrent(pObj);
-
- if (Abc_ObjIsNode(pObj)) {
- Abc_FlowRetime_SetLag( pObj, -1+Abc_FlowRetime_GetLag(pObj) );
- }
-
- Abc_ObjForEachFanin( pObj, pNext, i ) {
- Abc_FlowRetime_UpdateLags_forw_rec( pNext );
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Updates lag values.]
-
- Description [Recursive. Backward retiming.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_UpdateLags_back_rec( Abc_Obj_t *pObj ) {
- Abc_Obj_t *pNext;
- int i;
-
- assert(!Abc_ObjIsPo(pObj));
- assert(!Abc_ObjIsLatch(pObj));
-
- if (Abc_ObjIsBo(pObj)) return;
- if (Abc_NodeIsTravIdCurrent(pObj)) return;
-
- Abc_NodeSetTravIdCurrent(pObj);
-
- if (Abc_ObjIsNode(pObj)) {
- Abc_FlowRetime_SetLag( pObj, 1+Abc_FlowRetime_GetLag(pObj) );
- }
-
- Abc_ObjForEachFanout( pObj, pNext, i ) {
- Abc_FlowRetime_UpdateLags_back_rec( pNext );
- }
-}
-
-/**Function*************************************************************
-
- Synopsis [Updates lag values.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_UpdateLags( ) {
- Abc_Obj_t *pObj, *pNext;
- int i, j;
-
- Abc_NtkIncrementTravId( pManMR->pNtk );
-
- Abc_NtkForEachLatch( pManMR->pNtk, pObj, i )
- if (pManMR->fIsForward) {
- Abc_ObjForEachFanin( pObj, pNext, j )
- Abc_FlowRetime_UpdateLags_forw_rec( pNext );
- } else {
- Abc_ObjForEachFanout( pObj, pNext, j )
- Abc_FlowRetime_UpdateLags_back_rec( pNext );
- }
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Gets lag value of a node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int
-Abc_FlowRetime_GetLag( Abc_Obj_t *pObj ) {
- assert( !Abc_ObjIsLatch(pObj) );
- assert( Abc_ObjId(pObj) < Vec_IntSize(pManMR->vLags) );
-
- return Vec_IntEntry(pManMR->vLags, Abc_ObjId(pObj));
-}
-
-/**Function*************************************************************
-
- Synopsis [Sets lag value of a node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void
-Abc_FlowRetime_SetLag( Abc_Obj_t *pObj, int lag ) {
- assert( Abc_ObjIsNode(pObj) );
- assert( Abc_ObjId(pObj) < Vec_IntSize(pManMR->vLags) );
-
- Vec_IntWriteEntry(pManMR->vLags, Abc_ObjId(pObj), lag);
-}
-
-
-static void Abc_ObjPrintNeighborhood_rec( Abc_Obj_t *pObj, Vec_Ptr_t *vNodes, int depth ) {
- Abc_Obj_t *pObj2;
- int i;
-
- if (pObj->fMarkC || depth < 0) return;
-
- pObj->fMarkC = 1;
- Vec_PtrPush( vNodes, pObj );
-
- Abc_ObjPrint( stdout, pObj );
-
- Abc_ObjForEachFanout(pObj, pObj2, i) {
- Abc_ObjPrintNeighborhood_rec( pObj2, vNodes, depth-1 );
- }
- Abc_ObjForEachFanin(pObj, pObj2, i) {
- Abc_ObjPrintNeighborhood_rec( pObj2, vNodes, depth-1 );
- }
-}
-
-void Abc_ObjPrintNeighborhood( Abc_Obj_t *pObj, int depth ) {
- Vec_Ptr_t *vNodes = Vec_PtrAlloc(100);
- Abc_Obj_t *pObj2;
-
- Abc_ObjPrintNeighborhood_rec( pObj, vNodes, depth );
-
- while(Vec_PtrSize(vNodes)) {
- pObj2 = Vec_PtrPop(vNodes);
- pObj2->fMarkC = 0;
- }
-
- Vec_PtrFree(vNodes);
-}
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/opt/fret/fretTime.c b/src/opt/fret/fretTime.c
deleted file mode 100644
index 47e90519..00000000
--- a/src/opt/fret/fretTime.c
+++ /dev/null
@@ -1,768 +0,0 @@
-/**CFile****************************************************************
-
- FileName [fretTime.c]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Flow-based retiming package.]
-
- Synopsis [Delay-constrained retiming code.]
-
- Author [Aaron Hurst]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - January 1, 2008.]
-
- Revision [$Id: fretTime.c,v 1.00 2008/01/01 00:00:00 ahurst Exp $]
-
-***********************************************************************/
-
-#include "abc.h"
-#include "vec.h"
-#include "fretime.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-static void Abc_FlowRetime_Dfs_forw( Abc_Obj_t * pObj, Vec_Ptr_t *vNodes );
-static void Abc_FlowRetime_Dfs_back( Abc_Obj_t * pObj, Vec_Ptr_t *vNodes );
-
-static void Abc_FlowRetime_ConstrainExact_forw( Abc_Obj_t * pObj );
-static void Abc_FlowRetime_ConstrainExact_back( Abc_Obj_t * pObj );
-static void Abc_FlowRetime_ConstrainConserv_forw( Abc_Ntk_t * pNtk );
-static void Abc_FlowRetime_ConstrainConserv_back( Abc_Ntk_t * pNtk );
-
-
-void trace2(Abc_Obj_t *pObj) {
- Abc_Obj_t *pNext;
- int i;
-
- print_node(pObj);
- Abc_ObjForEachFanin(pObj, pNext, i)
- if (pNext->Level >= pObj->Level - 1) {
- trace2(pNext);
- break;
- }
-}
-
-////////////////////////////////////////////////////////////////////////
-/// FUNCTION DEFINITIONS ///
-////////////////////////////////////////////////////////////////////////
-
-
-/**Function*************************************************************
-
- Synopsis [Initializes timing]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_InitTiming( Abc_Ntk_t *pNtk ) {
-
- pManMR->nConservConstraints = pManMR->nExactConstraints = 0;
-
- pManMR->vExactNodes = Vec_PtrAlloc(1000);
-
- pManMR->vTimeEdges = ALLOC( Vec_Ptr_t, Abc_NtkObjNumMax(pNtk)+1 );
- assert(pManMR->vTimeEdges);
- memset(pManMR->vTimeEdges, 0, (Abc_NtkObjNumMax(pNtk)+1) * sizeof(Vec_Ptr_t) );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Marks nodes with conservative constraints.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_ConstrainConserv( Abc_Ntk_t * pNtk ) {
- Abc_Obj_t *pObj;
- int i;
- void *pArray;
-
- // clear all exact constraints
- pManMR->nExactConstraints = 0;
- while( Vec_PtrSize( pManMR->vExactNodes )) {
- pObj = Vec_PtrPop( pManMR->vExactNodes );
-
- if ( Vec_PtrSize( FTIMEEDGES(pObj) )) {
- pArray = Vec_PtrReleaseArray( FTIMEEDGES(pObj) );
- FREE( pArray );
- }
- }
-
-#if !defined(IGNORE_TIMING)
- if (pManMR->fIsForward) {
- Abc_FlowRetime_ConstrainConserv_forw(pNtk);
- } else {
- Abc_FlowRetime_ConstrainConserv_back(pNtk);
- }
-#endif
-
- Abc_NtkForEachObj( pNtk, pObj, i)
- assert( !Vec_PtrSize(FTIMEEDGES(pObj)) );
-}
-
-
-void Abc_FlowRetime_ConstrainConserv_forw( Abc_Ntk_t * pNtk ) {
- Vec_Ptr_t *vNodes = pManMR->vNodes;
- Abc_Obj_t *pObj, *pNext, *pBi, *pBo;
- int i, j;
-
- assert(!Vec_PtrSize( vNodes ));
- pManMR->nConservConstraints = 0;
-
- // 1. hard constraints
-
- // (i) collect TFO of PIs
- Abc_NtkIncrementTravId(pNtk);
- Abc_NtkForEachPi(pNtk, pObj, i)
- Abc_FlowRetime_Dfs_forw( pObj, vNodes );
-
- // ... propagate values
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i) {
- pObj->Level = 0;
- Abc_ObjForEachFanin( pObj, pNext, j )
- {
- if ( Abc_NodeIsTravIdCurrent(pNext) &&
- pObj->Level < pNext->Level )
- pObj->Level = pNext->Level;
- }
- pObj->Level += Abc_ObjIsNode(pObj) ? 1 : 0;
-
- if ( Abc_ObjIsBi(pObj) )
- pObj->fMarkA = 1;
-
- assert(pObj->Level <= pManMR->maxDelay);
- }
-
- // collect TFO of latches
- // seed arrival times from BIs
- Vec_PtrClear(vNodes);
- Abc_NtkIncrementTravId(pNtk);
- Abc_NtkForEachLatch(pNtk, pObj, i) {
- pBo = Abc_ObjFanout0( pObj );
- pBi = Abc_ObjFanin0( pObj );
-
- Abc_NodeSetTravIdCurrent( pObj );
- Abc_FlowRetime_Dfs_forw( pBo, vNodes );
-
- if (pBi->fMarkA) {
- pBi->fMarkA = 0;
- pObj->Level = pBi->Level;
- assert(pObj->Level <= pManMR->maxDelay);
- } else
- pObj->Level = 0;
- }
-
-#if defined(DEBUG_CHECK)
- // DEBUG: check DFS ordering
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i) {
- pObj->fMarkB = 1;
-
- Abc_ObjForEachFanin( pObj, pNext, j )
- if ( Abc_NodeIsTravIdCurrent(pNext) && !Abc_ObjIsLatch(pNext))
- assert(pNext->fMarkB);
- }
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i)
- pObj->fMarkB = 0;
-#endif
-
- // ... propagate values
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i) {
- pObj->Level = 0;
- Abc_ObjForEachFanin( pObj, pNext, j )
- {
- if ( Abc_NodeIsTravIdCurrent(pNext) &&
- pObj->Level < pNext->Level )
- pObj->Level = pNext->Level;
- }
- pObj->Level += Abc_ObjIsNode(pObj) ? 1 : 0;
-
- if (pObj->Level > pManMR->maxDelay) {
- FSET(pObj, BLOCK);
- }
- }
-
- // 2. conservative constraints
-
- // first pass: seed latches with T=0
- Abc_NtkForEachLatch(pNtk, pObj, i) {
- pObj->Level = 0;
- }
-
- // ... propagate values
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i) {
- pObj->Level = 0;
- Abc_ObjForEachFanin( pObj, pNext, j ) {
- if ( Abc_NodeIsTravIdCurrent(pNext) &&
- pObj->Level < pNext->Level )
- pObj->Level = pNext->Level;
- }
- pObj->Level += Abc_ObjIsNode(pObj) ? 1 : 0;
-
- if ( Abc_ObjIsBi(pObj) )
- pObj->fMarkA = 1;
-
- assert(pObj->Level <= pManMR->maxDelay);
- }
-
- Abc_NtkForEachLatch(pNtk, pObj, i) {
- pBo = Abc_ObjFanout0( pObj );
- pBi = Abc_ObjFanin0( pObj );
-
- if (pBi->fMarkA) {
- pBi->fMarkA = 0;
- pObj->Level = pBi->Level;
- assert(pObj->Level <= pManMR->maxDelay);
- } else
- pObj->Level = 0;
- }
-
- // ... propagate values
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i) {
- pObj->Level = 0;
- Abc_ObjForEachFanin( pObj, pNext, j ) {
- if ( Abc_NodeIsTravIdCurrent(pNext) &&
- pObj->Level < pNext->Level )
- pObj->Level = pNext->Level;
- }
- pObj->Level += Abc_ObjIsNode(pObj) ? 1 : 0;
-
- // constrained?
- if (pObj->Level > pManMR->maxDelay) {
- FSET( pObj, CONSERVATIVE );
- pManMR->nConservConstraints++;
- } else
- FUNSET( pObj, CONSERVATIVE );
- }
-
- Vec_PtrClear( vNodes );
-}
-
-
-void Abc_FlowRetime_ConstrainConserv_back( Abc_Ntk_t * pNtk ) {
- Vec_Ptr_t *vNodes = pManMR->vNodes;
- Abc_Obj_t *pObj, *pNext, *pBi, *pBo;
- int i, j, l;
-
- assert(!Vec_PtrSize(vNodes));
-
- pManMR->nConservConstraints = 0;
-
- // 1. hard constraints
-
- // (i) collect TFO of POs
- Abc_NtkIncrementTravId(pNtk);
- Abc_NtkForEachPo(pNtk, pObj, i)
- Abc_FlowRetime_Dfs_back( pObj, vNodes );
-
- // ... propagate values
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i) {
- pObj->Level = 0;
- Abc_ObjForEachFanout( pObj, pNext, j )
- {
- l = pNext->Level + (Abc_ObjIsNode(pObj) ? 1 : 0);
- if ( Abc_NodeIsTravIdCurrent(pNext) &&
- pObj->Level < l )
- pObj->Level = l;
- }
-
- if ( Abc_ObjIsBo(pObj) )
- pObj->fMarkA = 1;
-
- assert(pObj->Level <= pManMR->maxDelay);
- }
-
- // collect TFO of latches
- // seed arrival times from BIs
- Vec_PtrClear(vNodes);
- Abc_NtkIncrementTravId(pNtk);
- Abc_NtkForEachLatch(pNtk, pObj, i) {
- pBo = Abc_ObjFanout0( pObj );
- pBi = Abc_ObjFanin0( pObj );
-
- Abc_NodeSetTravIdCurrent( pObj );
- Abc_FlowRetime_Dfs_back( pBi, vNodes );
-
- if (pBo->fMarkA) {
- pBo->fMarkA = 0;
- pObj->Level = pBo->Level;
- assert(pObj->Level <= pManMR->maxDelay);
- } else
- pObj->Level = 0;
- }
-
-#if defined(DEBUG_CHECK)
- // DEBUG: check DFS ordering
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i) {
- pObj->fMarkB = 1;
-
- Abc_ObjForEachFanout( pObj, pNext, j )
- if ( Abc_NodeIsTravIdCurrent(pNext) && !Abc_ObjIsLatch(pNext))
- assert(pNext->fMarkB);
- }
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i)
- pObj->fMarkB = 0;
-#endif
-
- // ... propagate values
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i) {
- pObj->Level = 0;
- Abc_ObjForEachFanout( pObj, pNext, j )
- {
- l = pNext->Level + (Abc_ObjIsNode(pObj) ? 1 : 0);
- if ( Abc_NodeIsTravIdCurrent(pNext) &&
- pObj->Level < l )
- pObj->Level = l;
- }
-
- if (pObj->Level + (Abc_ObjIsNode(pObj)?1:0) > pManMR->maxDelay) {
- FSET(pObj, BLOCK);
- }
- }
-
- // 2. conservative constraints
-
- // first pass: seed latches with T=0
- Abc_NtkForEachLatch(pNtk, pObj, i) {
- pObj->Level = 0;
- }
-
- // ... propagate values
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i) {
- pObj->Level = 0;
- Abc_ObjForEachFanout( pObj, pNext, j ) {
- l = pNext->Level + (Abc_ObjIsNode(pObj) ? 1 : 0);
- if ( Abc_NodeIsTravIdCurrent(pNext) &&
- pObj->Level < l )
- pObj->Level = l;
- }
-
- if ( Abc_ObjIsBo(pObj) ) {
- pObj->fMarkA = 1;
- }
-
- assert(pObj->Level <= pManMR->maxDelay);
- }
-
- Abc_NtkForEachLatch(pNtk, pObj, i) {
- pBo = Abc_ObjFanout0( pObj );
- assert(Abc_ObjIsBo(pBo));
- pBi = Abc_ObjFanin0( pObj );
- assert(Abc_ObjIsBi(pBi));
-
- if (pBo->fMarkA) {
- pBo->fMarkA = 0;
- pObj->Level = pBo->Level;
- } else
- pObj->Level = 0;
- }
-
- // ... propagate values
- Vec_PtrForEachEntryReverse( Abc_Obj_t *,vNodes, pObj, i) {
- pObj->Level = 0;
- Abc_ObjForEachFanout( pObj, pNext, j ) {
- l = pNext->Level + (Abc_ObjIsNode(pObj) ? 1 : 0);
- if ( Abc_NodeIsTravIdCurrent(pNext) &&
- pObj->Level < l )
- pObj->Level = l;
- }
-
- // constrained?
- if (pObj->Level > pManMR->maxDelay) {
- FSET( pObj, CONSERVATIVE );
- pManMR->nConservConstraints++;
- } else
- FUNSET( pObj, CONSERVATIVE );
- }
-
- Vec_PtrClear( vNodes );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Introduces exact timing constraints for a node.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_ConstrainExact( Abc_Obj_t * pObj ) {
-
- if (FTEST( pObj, CONSERVATIVE )) {
- pManMR->nConservConstraints--;
- FUNSET( pObj, CONSERVATIVE );
- }
-
-#if !defined(IGNORE_TIMING)
- if (pManMR->fIsForward) {
- Abc_FlowRetime_ConstrainExact_forw(pObj);
- } else {
- Abc_FlowRetime_ConstrainExact_back(pObj);
- }
-#endif
-}
-
-void Abc_FlowRetime_ConstrainExact_forw_rec( Abc_Obj_t * pObj, Vec_Ptr_t *vNodes, int latch ) {
- Abc_Obj_t *pNext;
- int i;
-
- // terminate?
- if (Abc_ObjIsLatch(pObj)) {
- if (latch) return;
- latch = 1;
- }
-
- // already visited?
- if (!latch) {
- if (pObj->fMarkA) return;
- pObj->fMarkA = 1;
- } else {
- if (pObj->fMarkB) return;
- pObj->fMarkB = 1;
- }
-
- // recurse
- Abc_ObjForEachFanin(pObj, pNext, i) {
- Abc_FlowRetime_ConstrainExact_forw_rec( pNext, vNodes, latch );
- }
-
- // add
- pObj->Level = 0;
- Vec_PtrPush(vNodes, Abc_ObjNotCond(pObj, latch));
-}
-
-void Abc_FlowRetime_ConstrainExact_forw( Abc_Obj_t * pObj ) {
- Vec_Ptr_t *vNodes = pManMR->vNodes;
- Abc_Obj_t *pNext, *pCur, *pReg;
- // Abc_Ntk_t *pNtk = pManMR->pNtk;
- int i, j;
-
- assert( !Vec_PtrSize(vNodes) );
- assert( !Abc_ObjIsLatch(pObj) );
- assert( !Vec_PtrSize( FTIMEEDGES(pObj) ));
- Vec_PtrPush( pManMR->vExactNodes, pObj );
-
- // rev topo order
- Abc_FlowRetime_ConstrainExact_forw_rec( pObj, vNodes, 0 );
-
- Vec_PtrForEachEntryReverse( Abc_Obj_t *, vNodes, pCur, i) {
- pReg = Abc_ObjRegular( pCur );
-
- if (pReg == pCur) {
- assert(!Abc_ObjIsLatch(pReg));
- Abc_ObjForEachFanin(pReg, pNext, j)
- pNext->Level = MAX( pNext->Level, pReg->Level + (Abc_ObjIsNode(pReg)?1:0));
- assert(pReg->Level <= pManMR->maxDelay);
- pReg->Level = 0;
- pReg->fMarkA = pReg->fMarkB = 0;
- }
- }
- Vec_PtrForEachEntryReverse( Abc_Obj_t *, vNodes, pCur, i) {
- pReg = Abc_ObjRegular( pCur );
- if (pReg != pCur) {
- Abc_ObjForEachFanin(pReg, pNext, j)
- if (!Abc_ObjIsLatch(pNext))
- pNext->Level = MAX( pNext->Level, pReg->Level + (Abc_ObjIsNode(pReg)?1:0));
-
- if (pReg->Level == pManMR->maxDelay) {
- Vec_PtrPush( FTIMEEDGES(pObj), pReg);
- pManMR->nExactConstraints++;
- }
- pReg->Level = 0;
- pReg->fMarkA = pReg->fMarkB = 0;
- }
- }
-
- Vec_PtrClear( vNodes );
-}
-
-void Abc_FlowRetime_ConstrainExact_back_rec( Abc_Obj_t * pObj, Vec_Ptr_t *vNodes, int latch ) {
- Abc_Obj_t *pNext;
- int i;
-
- // terminate?
- if (Abc_ObjIsLatch(pObj)) {
- if (latch) return;
- latch = 1;
- }
-
- // already visited?
- if (!latch) {
- if (pObj->fMarkA) return;
- pObj->fMarkA = 1;
- } else {
- if (pObj->fMarkB) return;
- pObj->fMarkB = 1;
- }
-
- // recurse
- Abc_ObjForEachFanout(pObj, pNext, i) {
- Abc_FlowRetime_ConstrainExact_back_rec( pNext, vNodes, latch );
- }
-
- // add
- pObj->Level = 0;
- Vec_PtrPush(vNodes, Abc_ObjNotCond(pObj, latch));
-}
-
-
-void Abc_FlowRetime_ConstrainExact_back( Abc_Obj_t * pObj ) {
- Vec_Ptr_t *vNodes = pManMR->vNodes;
- Abc_Obj_t *pNext, *pCur, *pReg;
- // Abc_Ntk_t *pNtk = pManMR->pNtk;
- int i, j;
-
- assert( !Vec_PtrSize( vNodes ));
- assert( !Abc_ObjIsLatch(pObj) );
- assert( !Vec_PtrSize( FTIMEEDGES(pObj) ));
- Vec_PtrPush( pManMR->vExactNodes, pObj );
-
- // rev topo order
- Abc_FlowRetime_ConstrainExact_back_rec( pObj, vNodes, 0 );
-
- Vec_PtrForEachEntryReverse( Abc_Obj_t *, vNodes, pCur, i) {
- pReg = Abc_ObjRegular( pCur );
-
- if (pReg == pCur) {
- assert(!Abc_ObjIsLatch(pReg));
- Abc_ObjForEachFanout(pReg, pNext, j)
- pNext->Level = MAX( pNext->Level, pReg->Level + (Abc_ObjIsNode(pReg)?1:0));
- assert(pReg->Level <= pManMR->maxDelay);
- pReg->Level = 0;
- pReg->fMarkA = pReg->fMarkB = 0;
- }
- }
- Vec_PtrForEachEntryReverse( Abc_Obj_t *, vNodes, pCur, i) {
- pReg = Abc_ObjRegular( pCur );
- if (pReg != pCur) {
- Abc_ObjForEachFanout(pReg, pNext, j)
- if (!Abc_ObjIsLatch(pNext))
- pNext->Level = MAX( pNext->Level, pReg->Level + (Abc_ObjIsNode(pReg)?1:0));
-
- if (pReg->Level == pManMR->maxDelay) {
- Vec_PtrPush( FTIMEEDGES(pObj), pReg);
- pManMR->nExactConstraints++;
- }
- pReg->Level = 0;
- pReg->fMarkA = pReg->fMarkB = 0;
- }
- }
-
- Vec_PtrClear( vNodes );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Introduces all exact timing constraints in a network]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_ConstrainExactAll( Abc_Ntk_t * pNtk ) {
- int i;
- Abc_Obj_t *pObj;
- void *pArray;
-
- // free existing constraints
- Abc_NtkForEachObj( pNtk, pObj, i )
- if ( Vec_PtrSize( FTIMEEDGES(pObj) )) {
- pArray = Vec_PtrReleaseArray( FTIMEEDGES(pObj) );
- FREE( pArray );
- }
- pManMR->nExactConstraints = 0;
-
- // generate all constraints
- Abc_NtkForEachObj(pNtk, pObj, i)
- if (!Abc_ObjIsLatch(pObj) && FTEST( pObj, CONSERVATIVE ) && !FTEST( pObj, BLOCK ))
- if (!Vec_PtrSize( FTIMEEDGES( pObj ) ))
- Abc_FlowRetime_ConstrainExact( pObj );
-}
-
-
-
-/**Function*************************************************************
-
- Synopsis [Deallocates exact constraints.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_FreeTiming( Abc_Ntk_t *pNtk ) {
- Abc_Obj_t *pObj;
- void *pArray;
-
- while( Vec_PtrSize( pManMR->vExactNodes )) {
- pObj = Vec_PtrPop( pManMR->vExactNodes );
-
- if ( Vec_PtrSize( FTIMEEDGES(pObj) )) {
- pArray = Vec_PtrReleaseArray( FTIMEEDGES(pObj) );
- FREE( pArray );
- }
- }
-
- Vec_PtrFree(pManMR->vExactNodes);
- FREE( pManMR->vTimeEdges );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [DFS order.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-void Abc_FlowRetime_Dfs_forw( Abc_Obj_t * pObj, Vec_Ptr_t *vNodes ) {
- Abc_Obj_t *pNext;
- int i;
-
- if (Abc_ObjIsLatch(pObj)) return;
-
- Abc_NodeSetTravIdCurrent( pObj );
-
- Abc_ObjForEachFanout( pObj, pNext, i )
- if (!Abc_NodeIsTravIdCurrent( pNext ))
- Abc_FlowRetime_Dfs_forw( pNext, vNodes );
-
- Vec_PtrPush( vNodes, pObj );
-}
-
-
-void Abc_FlowRetime_Dfs_back( Abc_Obj_t * pObj, Vec_Ptr_t *vNodes ) {
- Abc_Obj_t *pNext;
- int i;
-
- if (Abc_ObjIsLatch(pObj)) return;
-
- Abc_NodeSetTravIdCurrent( pObj );
-
- Abc_ObjForEachFanin( pObj, pNext, i )
- if (!Abc_NodeIsTravIdCurrent( pNext ))
- Abc_FlowRetime_Dfs_back( pNext, vNodes );
-
- Vec_PtrPush( vNodes, pObj );
-}
-
-
-/**Function*************************************************************
-
- Synopsis [Main timing-constrained routine.]
-
- Description [Refines constraints that are limiting area improvement.
- These are identified by computing
- the min-cuts both with and without the conservative
- constraints: these two situation represent an
- over- and under-constrained version of the timing.]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-int Abc_FlowRetime_RefineConstraints( ) {
- Abc_Ntk_t *pNtk = pManMR->pNtk;
- int i, flow, count = 0;
- Abc_Obj_t *pObj;
- int maxTighten = 99999;
-
- vprintf("\t\tsubiter %d : constraints = {cons, exact} = %d, %d\n",
- pManMR->subIteration, pManMR->nConservConstraints, pManMR->nExactConstraints);
-
- // 1. overconstrained
- pManMR->constraintMask = BLOCK | CONSERVATIVE;
- vprintf("\t\trefinement: over ");
- fflush(stdout);
- flow = Abc_FlowRetime_PushFlows( pNtk, 0 );
- vprintf("= %d ", flow);
-
- // remember nodes
- if (pManMR->fIsForward) {
- Abc_NtkForEachObj( pNtk, pObj, i )
- if (!FTEST(pObj, VISITED_R))
- pObj->fMarkC = 1;
- } else {
- Abc_NtkForEachObj( pNtk, pObj, i )
- if (!FTEST(pObj, VISITED_E))
- pObj->fMarkC = 1;
- }
-
- if (pManMR->fConservTimingOnly) {
- vprintf(" done\n");
- return 0;
- }
-
- // 2. underconstrained
- pManMR->constraintMask = BLOCK;
- Abc_FlowRetime_ClearFlows( 0 );
- vprintf("under = ");
- fflush(stdout);
- flow = Abc_FlowRetime_PushFlows( pNtk, 0 );
- vprintf("%d refined nodes = ", flow);
- fflush(stdout);
-
- // find area-limiting constraints
- if (pManMR->fIsForward) {
- Abc_NtkForEachObj( pNtk, pObj, i ) {
- if (pObj->fMarkC &&
- FTEST(pObj, VISITED_R) &&
- FTEST(pObj, CONSERVATIVE) &&
- count < maxTighten) {
- count++;
- Abc_FlowRetime_ConstrainExact( pObj );
- }
- pObj->fMarkC = 0;
- }
- } else {
- Abc_NtkForEachObj( pNtk, pObj, i ) {
- if (pObj->fMarkC &&
- FTEST(pObj, VISITED_E) &&
- FTEST(pObj, CONSERVATIVE) &&
- count < maxTighten) {
- count++;
- Abc_FlowRetime_ConstrainExact( pObj );
- }
- pObj->fMarkC = 0;
- }
- }
-
- vprintf("%d\n", count);
-
- return (count > 0);
-}
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/opt/fret/fretime.h b/src/opt/fret/fretime.h
deleted file mode 100644
index 2d70d7e3..00000000
--- a/src/opt/fret/fretime.h
+++ /dev/null
@@ -1,205 +0,0 @@
-/**CFile****************************************************************
-
- FileName [fretime.h]
-
- SystemName [ABC: Logic synthesis and verification system.]
-
- PackageName [Flow-based retiming package.]
-
- Synopsis [Header file for retiming package.]
-
- Author [Aaron Hurst]
-
- Affiliation [UC Berkeley]
-
- Date [Ver. 1.0. Started - January 1, 2008.]
-
- Revision [$Id: fretime.h,v 1.00 2008/01/01 00:00:00 ahurst Exp $]
-
-***********************************************************************/
-
-#if !defined(RETIME_H_)
-#define RETIME_H_
-
-
-#include "abc.h"
-
-ABC_NAMESPACE_HEADER_START
-
-
-// #define IGNORE_TIMING
-// #define DEBUG_PRINT_FLOWS
-// #define DEBUG_VISITED
-// #define DEBUG_PREORDER
-#define DEBUG_CHECK
-// #define DEBUG_PRINT_LEVELS
-
-////////////////////////////////////////////////////////////////////////
-/// DECLARATIONS ///
-////////////////////////////////////////////////////////////////////////
-
-#define MAX_DIST 30000
-
-// flags in Flow_Data structure...
-#define VISITED_E 0x001
-#define VISITED_R 0x002
-#define VISITED (VISITED_E | VISITED_R)
-#define FLOW 0x004
-#define CROSS_BOUNDARY 0x008
-#define BLOCK 0x010
-#define INIT_0 0x020
-#define INIT_1 0x040
-#define INIT_CARE (INIT_0 | INIT_1)
-#define CONSERVATIVE 0x080
-#define BLOCK_OR_CONS (BLOCK | CONSERVATIVE)
-#define BIAS_NODE 0x100
-
-typedef struct Flow_Data_t_ {
- unsigned int mark : 16;
-
- union {
- Abc_Obj_t *pred;
- /* unsigned int var; */
- Abc_Obj_t *pInitObj;
- Abc_Obj_t *pCopy;
- Vec_Ptr_t *vNodes;
- };
-
- unsigned int e_dist : 16;
- unsigned int r_dist : 16;
-} Flow_Data_t;
-
-// useful macros for manipulating Flow_Data structure...
-#define FDATA( x ) (pManMR->pDataArray+Abc_ObjId(x))
-#define FSET( x, y ) FDATA(x)->mark |= y
-#define FUNSET( x, y ) FDATA(x)->mark &= ~y
-#define FTEST( x, y ) (FDATA(x)->mark & y)
-#define FTIMEEDGES( x ) &(pManMR->vTimeEdges[Abc_ObjId( x )])
-
-typedef struct NodeLag_T_ {
- int id;
- int lag;
-} NodeLag_t;
-
-typedef struct InitConstraint_t_ {
- Abc_Obj_t *pBiasNode;
-
- Vec_Int_t vNodes;
- Vec_Int_t vLags;
-
-} InitConstraint_t;
-
-typedef struct MinRegMan_t_ {
-
- // problem description:
- int maxDelay;
- int fComputeInitState, fGuaranteeInitState, fBlockConst;
- int nNodes, nLatches;
- int fForwardOnly, fBackwardOnly;
- int fConservTimingOnly;
- int nMaxIters;
- int fVerbose;
- Abc_Ntk_t *pNtk;
-
- int nPreRefine;
-
- // problem state
- int fIsForward;
- int fSinkDistTerminate;
- int nExactConstraints, nConservConstraints;
- int fSolutionIsDc;
- int constraintMask;
- int iteration, subIteration;
- Vec_Int_t *vLags;
-
- // problem data
- Vec_Int_t *vSinkDistHist;
- Flow_Data_t *pDataArray;
- Vec_Ptr_t *vTimeEdges;
- Vec_Ptr_t *vExactNodes;
- Vec_Ptr_t *vInitConstraints;
- Abc_Ntk_t *pInitNtk;
- Vec_Ptr_t *vNodes; // re-useable struct
-
- NodeLag_t *pInitToOrig;
- int sizeInitToOrig;
-
-} MinRegMan_t ;
-
-extern MinRegMan_t *pManMR;
-
-#define vprintf if (pManMR->fVerbose) printf
-
-static inline void FSETPRED(Abc_Obj_t *pObj, Abc_Obj_t *pPred) {
- assert(!Abc_ObjIsLatch(pObj)); // must preserve field to maintain init state linkage
- FDATA(pObj)->pred = pPred;
-}
-static inline Abc_Obj_t * FGETPRED(Abc_Obj_t *pObj) {
- return FDATA(pObj)->pred;
-}
-
-/*=== fretMain.c ==========================================================*/
-
-Abc_Ntk_t * Abc_FlowRetime_MinReg( Abc_Ntk_t * pNtk, int fVerbose,
- int fComputeInitState, int fGuaranteeInitState, int fBlockConst,
- int fForward, int fBackward, int nMaxIters,
- int maxDelay, int fFastButConservative);
-
-void print_node(Abc_Obj_t *pObj);
-
-void Abc_ObjBetterTransferFanout( Abc_Obj_t * pFrom, Abc_Obj_t * pTo, int compl );
-
-int Abc_FlowRetime_PushFlows( Abc_Ntk_t * pNtk, int fVerbose );
-int Abc_FlowRetime_IsAcrossCut( Abc_Obj_t *pCur, Abc_Obj_t *pNext );
-void Abc_FlowRetime_ClearFlows( int fClearAll );
-
-int Abc_FlowRetime_GetLag( Abc_Obj_t *pObj );
-void Abc_FlowRetime_SetLag( Abc_Obj_t *pObj, int lag );
-
-void Abc_FlowRetime_UpdateLags( );
-
-void Abc_ObjPrintNeighborhood( Abc_Obj_t *pObj, int depth );
-
-Abc_Ntk_t * Abc_FlowRetime_NtkSilentRestrash( Abc_Ntk_t * pNtk, int fCleanup );
-
-/*=== fretFlow.c ==========================================================*/
-
-int dfsplain_e( Abc_Obj_t *pObj, Abc_Obj_t *pPred );
-int dfsplain_r( Abc_Obj_t *pObj, Abc_Obj_t *pPred );
-
-void dfsfast_preorder( Abc_Ntk_t *pNtk );
-int dfsfast_e( Abc_Obj_t *pObj, Abc_Obj_t *pPred );
-int dfsfast_r( Abc_Obj_t *pObj, Abc_Obj_t *pPred );
-
-/*=== fretInit.c ==========================================================*/
-
-void Abc_FlowRetime_PrintInitStateInfo( Abc_Ntk_t * pNtk );
-
-void Abc_FlowRetime_InitState( Abc_Ntk_t * pNtk );
-
-void Abc_FlowRetime_UpdateForwardInit( Abc_Ntk_t * pNtk );
-void Abc_FlowRetime_UpdateBackwardInit( Abc_Ntk_t * pNtk );
-
-void Abc_FlowRetime_SetupBackwardInit( Abc_Ntk_t * pNtk );
-int Abc_FlowRetime_SolveBackwardInit( Abc_Ntk_t * pNtk );
-
-void Abc_FlowRetime_ConstrainInit( );
-void Abc_FlowRetime_AddInitBias( );
-void Abc_FlowRetime_RemoveInitBias( );
-
-/*=== fretTime.c ==========================================================*/
-
-void Abc_FlowRetime_InitTiming( Abc_Ntk_t *pNtk );
-void Abc_FlowRetime_FreeTiming( Abc_Ntk_t *pNtk );
-
-int Abc_FlowRetime_RefineConstraints( );
-
-void Abc_FlowRetime_ConstrainConserv( Abc_Ntk_t * pNtk );
-void Abc_FlowRetime_ConstrainExact( Abc_Obj_t * pObj );
-void Abc_FlowRetime_ConstrainExactAll( Abc_Ntk_t * pNtk );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-#endif
diff --git a/src/opt/fret/module.make b/src/opt/fret/module.make
deleted file mode 100644
index fda6a73d..00000000
--- a/src/opt/fret/module.make
+++ /dev/null
@@ -1,5 +0,0 @@
-SRC += src/opt/fret/fretMain.c \
- src/opt/fret/fretFlow.c \
- src/opt/fret/fretInit.c \
- src/opt/fret/fretTime.c
-
diff --git a/src/aig/fsim/fsim.h b/src/opt/fsim/fsim.h
index fabc5254..5a17550b 100644
--- a/src/aig/fsim/fsim.h
+++ b/src/opt/fsim/fsim.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __FSIM_H__
-#define __FSIM_H__
+#ifndef ABC__aig__fsim__fsim_h
+#define ABC__aig__fsim__fsim_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/fsim/fsimCore.c b/src/opt/fsim/fsimCore.c
index 9516f09e..9516f09e 100644
--- a/src/aig/fsim/fsimCore.c
+++ b/src/opt/fsim/fsimCore.c
diff --git a/src/aig/fsim/fsimFront.c b/src/opt/fsim/fsimFront.c
index 6169543c..6169543c 100644
--- a/src/aig/fsim/fsimFront.c
+++ b/src/opt/fsim/fsimFront.c
diff --git a/src/aig/fsim/fsimInt.h b/src/opt/fsim/fsimInt.h
index f5dee298..0a7493a0 100644
--- a/src/aig/fsim/fsimInt.h
+++ b/src/opt/fsim/fsimInt.h
@@ -18,15 +18,15 @@
***********************************************************************/
-#ifndef __FSIM_INT_H__
-#define __FSIM_INT_H__
+#ifndef ABC__aig__fsim__fsimInt_h
+#define ABC__aig__fsim__fsimInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "saig.h"
+#include "aig/saig/saig.h"
#include "fsim.h"
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/fsim/fsimMan.c b/src/opt/fsim/fsimMan.c
index ea0cab43..ea0cab43 100644
--- a/src/aig/fsim/fsimMan.c
+++ b/src/opt/fsim/fsimMan.c
diff --git a/src/aig/fsim/fsimSim.c b/src/opt/fsim/fsimSim.c
index 56aeab2f..84844407 100644
--- a/src/aig/fsim/fsimSim.c
+++ b/src/opt/fsim/fsimSim.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "fsimInt.h"
-#include "ssw.h"
+#include "aig/ssw/ssw.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/fsim/fsimSwitch.c b/src/opt/fsim/fsimSwitch.c
index 3eef2d4c..3eef2d4c 100644
--- a/src/aig/fsim/fsimSwitch.c
+++ b/src/opt/fsim/fsimSwitch.c
diff --git a/src/aig/fsim/fsimTsim.c b/src/opt/fsim/fsimTsim.c
index e05e6409..5ad78b33 100644
--- a/src/aig/fsim/fsimTsim.c
+++ b/src/opt/fsim/fsimTsim.c
@@ -365,9 +365,9 @@ Vec_Ptr_t * Fsim_ManTerSimulate( Aig_Man_t * pAig, int fVerbose )
ABC_PRT( "Time", clock() - clk );
}
// allocate storage for terminary states
- nWords = Aig_BitWordNum( 2*Aig_ManRegNum(pAig) );
+ nWords = Abc_BitWordNum( 2*Aig_ManRegNum(pAig) );
vStates = Vec_PtrAlloc( 1000 );
- nBins = Aig_PrimeCudd( 500 );
+ nBins = Abc_PrimeCudd( 500 );
pBins = ABC_ALLOC( unsigned *, nBins );
memset( pBins, 0, sizeof(unsigned *) * nBins );
// perform simulation
diff --git a/src/opt/fsim/module.make b/src/opt/fsim/module.make
new file mode 100644
index 00000000..c728e128
--- /dev/null
+++ b/src/opt/fsim/module.make
@@ -0,0 +1,6 @@
+SRC += src/opt/fsim/fsimCore.c \
+ src/opt/fsim/fsimFront.c \
+ src/opt/fsim/fsimMan.c \
+ src/opt/fsim/fsimSim.c \
+ src/opt/fsim/fsimSwitch.c \
+ src/opt/fsim/fsimTsim.c
diff --git a/src/opt/fxu/fxu.h b/src/opt/fxu/fxu.h
index d42bf873..28856c28 100644
--- a/src/opt/fxu/fxu.h
+++ b/src/opt/fxu/fxu.h
@@ -16,15 +16,15 @@
***********************************************************************/
-#ifndef __FXU_H__
-#define __FXU_H__
+#ifndef ABC__opt__fxu__fxu_h
+#define ABC__opt__fxu__fxu_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "vec.h"
+#include "src/misc/vec/vec.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/opt/fxu/fxuInt.h b/src/opt/fxu/fxuInt.h
index 402b7cdd..1ca081c9 100644
--- a/src/opt/fxu/fxuInt.h
+++ b/src/opt/fxu/fxuInt.h
@@ -16,16 +16,15 @@
***********************************************************************/
-#ifndef __FXU_INT_H__
-#define __FXU_INT_H__
+#ifndef ABC__opt__fxu__fxuInt_h
+#define ABC__opt__fxu__fxuInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/opt/fxu/fxuMatrix.c b/src/opt/fxu/fxuMatrix.c
index a53de0a3..d032f7cd 100644
--- a/src/opt/fxu/fxuMatrix.c
+++ b/src/opt/fxu/fxuMatrix.c
@@ -25,8 +25,6 @@ ABC_NAMESPACE_IMPL_START
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
-extern unsigned int Cudd_Prime( unsigned int p );
-
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
@@ -47,7 +45,7 @@ Fxu_Matrix * Fxu_MatrixAllocate()
Fxu_Matrix * p;
p = ABC_ALLOC( Fxu_Matrix, 1 );
memset( p, 0, sizeof(Fxu_Matrix) );
- p->nTableSize = Cudd_Prime(10000);
+ p->nTableSize = Abc_PrimeCudd(10000);
p->pTable = ABC_ALLOC( Fxu_ListDouble, p->nTableSize );
memset( p->pTable, 0, sizeof(Fxu_ListDouble) * p->nTableSize );
#ifndef USE_SYSTEM_MEMORY_MANAGEMENT
diff --git a/src/opt/fxu/fxuReduce.c b/src/opt/fxu/fxuReduce.c
index b0e3e4a7..6d76576a 100644
--- a/src/opt/fxu/fxuReduce.c
+++ b/src/opt/fxu/fxuReduce.c
@@ -16,7 +16,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "fxuInt.h"
#include "fxu.h"
diff --git a/src/opt/fxu/fxuSingle.c b/src/opt/fxu/fxuSingle.c
index b1cc2e63..e4fd0c5c 100644
--- a/src/opt/fxu/fxuSingle.c
+++ b/src/opt/fxu/fxuSingle.c
@@ -17,7 +17,7 @@
***********************************************************************/
#include "fxuInt.h"
-#include "vec.h"
+#include "src/misc/vec/vec.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/lpk/lpk.h b/src/opt/lpk/lpk.h
index 498da845..ebc18907 100644
--- a/src/opt/lpk/lpk.h
+++ b/src/opt/lpk/lpk.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __LPK_H__
-#define __LPK_H__
+#ifndef ABC__opt__lpk__lpk_h
+#define ABC__opt__lpk__lpk_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/opt/lpk/lpkAbcDsd.c b/src/opt/lpk/lpkAbcDsd.c
index 34785941..2a6ba980 100644
--- a/src/opt/lpk/lpkAbcDsd.c
+++ b/src/opt/lpk/lpkAbcDsd.c
@@ -73,8 +73,8 @@ int Lpk_FunComputeMinSuppSizeVar( Lpk_Fun_t * p, unsigned ** ppTruths, int nTrut
nSuppSize0 = Kit_TruthSupportSize( ppCofs[2*i+0], p->nVars );
nSuppSize1 = Kit_TruthSupportSize( ppCofs[2*i+1], p->nVars );
}
- nSuppMaxCur = ABC_MAX( nSuppMaxCur, nSuppSize0 );
- nSuppMaxCur = ABC_MAX( nSuppMaxCur, nSuppSize1 );
+ nSuppMaxCur = Abc_MaxInt( nSuppMaxCur, nSuppSize0 );
+ nSuppMaxCur = Abc_MaxInt( nSuppMaxCur, nSuppSize1 );
nSuppTotalCur += nSuppSize0 + nSuppSize1;
}
if ( VarBest == -1 || nSuppMaxMin > nSuppMaxCur ||
@@ -110,9 +110,9 @@ unsigned Lpk_ComputeBoundSets_rec( Kit_DsdNtk_t * p, int iLit, Vec_Int_t * vSets
unsigned i, iLitFanin, uSupport, uSuppCur;
Kit_DsdObj_t * pObj;
// consider the case of simple gate
- pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
+ pObj = Kit_DsdNtkObj( p, Abc_Lit2Var(iLit) );
if ( pObj == NULL )
- return (1 << Kit_DsdLit2Var(iLit));
+ return (1 << Abc_Lit2Var(iLit));
if ( pObj->Type == KIT_DSD_AND || pObj->Type == KIT_DSD_XOR )
{
unsigned uSupps[16], Limit, s;
@@ -171,7 +171,7 @@ Vec_Int_t * Lpk_ComputeBoundSets( Kit_DsdNtk_t * p, int nSizeMax )
return vSets;
if ( Kit_DsdNtkRoot(p)->Type == KIT_DSD_VAR )
{
- uSupport = ( 1 << Kit_DsdLit2Var(Kit_DsdNtkRoot(p)->pFans[0]) );
+ uSupport = ( 1 << Abc_Lit2Var(Kit_DsdNtkRoot(p)->pFans[0]) );
if ( Kit_WordCountOnes(uSupport) <= nSizeMax )
Vec_IntPush( vSets, uSupport );
return vSets;
diff --git a/src/opt/lpk/lpkAbcMux.c b/src/opt/lpk/lpkAbcMux.c
index 4e9cc654..1e4b6e22 100644
--- a/src/opt/lpk/lpkAbcMux.c
+++ b/src/opt/lpk/lpkAbcMux.c
@@ -66,13 +66,13 @@ Lpk_Res_t * Lpk_MuxAnalize( Lpk_Man_t * pMan, Lpk_Fun_t * p )
// include cof var into 0-block
DelayA = Lpk_SuppDelay( p->puSupps[2*Var+0] | (1<<Var), p->pDelays );
DelayB = Lpk_SuppDelay( p->puSupps[2*Var+1] , p->pDelays );
- Delay0 = ABC_MAX( DelayA, DelayB + 1 );
+ Delay0 = Abc_MaxInt( DelayA, DelayB + 1 );
// include cof var into 1-block
DelayA = Lpk_SuppDelay( p->puSupps[2*Var+1] | (1<<Var), p->pDelays );
DelayB = Lpk_SuppDelay( p->puSupps[2*Var+0] , p->pDelays );
- Delay1 = ABC_MAX( DelayA, DelayB + 1 );
+ Delay1 = Abc_MaxInt( DelayA, DelayB + 1 );
// get the best delay
- Delay = ABC_MIN( Delay0, Delay1 );
+ Delay = Abc_MinInt( Delay0, Delay1 );
Area = 2;
Polarity = (int)(Delay == Delay1);
}
@@ -80,7 +80,7 @@ Lpk_Res_t * Lpk_MuxAnalize( Lpk_Man_t * pMan, Lpk_Fun_t * p )
{
DelayA = Lpk_SuppDelay( p->puSupps[2*Var+0] | (1<<Var), p->pDelays );
DelayB = Lpk_SuppDelay( p->puSupps[2*Var+1] , p->pDelays );
- Delay = ABC_MAX( DelayA, DelayB + 1 );
+ Delay = Abc_MaxInt( DelayA, DelayB + 1 );
Area = 1 + Lpk_LutNumLuts( nSuppSize1, p->nLutK );
Polarity = 0;
}
@@ -88,7 +88,7 @@ Lpk_Res_t * Lpk_MuxAnalize( Lpk_Man_t * pMan, Lpk_Fun_t * p )
{
DelayA = Lpk_SuppDelay( p->puSupps[2*Var+1] | (1<<Var), p->pDelays );
DelayB = Lpk_SuppDelay( p->puSupps[2*Var+0] , p->pDelays );
- Delay = ABC_MAX( DelayA, DelayB + 1 );
+ Delay = Abc_MaxInt( DelayA, DelayB + 1 );
Area = 1 + Lpk_LutNumLuts( nSuppSize0, p->nLutK );
Polarity = 1;
}
@@ -96,7 +96,7 @@ Lpk_Res_t * Lpk_MuxAnalize( Lpk_Man_t * pMan, Lpk_Fun_t * p )
{
DelayA = Lpk_SuppDelay( p->puSupps[2*Var+1] | (1<<Var), p->pDelays );
DelayB = Lpk_SuppDelay( p->puSupps[2*Var+0] , p->pDelays );
- Delay = ABC_MAX( DelayA, DelayB + 1 );
+ Delay = Abc_MaxInt( DelayA, DelayB + 1 );
Area = 1 + Lpk_LutNumLuts( nSuppSize1+2, p->nLutK );
Polarity = 1;
}
@@ -104,7 +104,7 @@ Lpk_Res_t * Lpk_MuxAnalize( Lpk_Man_t * pMan, Lpk_Fun_t * p )
{
DelayA = Lpk_SuppDelay( p->puSupps[2*Var+0] | (1<<Var), p->pDelays );
DelayB = Lpk_SuppDelay( p->puSupps[2*Var+1] , p->pDelays );
- Delay = ABC_MAX( DelayA, DelayB + 1 );
+ Delay = Abc_MaxInt( DelayA, DelayB + 1 );
Area = 1 + Lpk_LutNumLuts( nSuppSize0+2, p->nLutK );
Polarity = 0;
}
@@ -113,13 +113,13 @@ Lpk_Res_t * Lpk_MuxAnalize( Lpk_Man_t * pMan, Lpk_Fun_t * p )
// include cof var into 0-block
DelayA = Lpk_SuppDelay( p->puSupps[2*Var+0] | (1<<Var), p->pDelays );
DelayB = Lpk_SuppDelay( p->puSupps[2*Var+1] , p->pDelays );
- Delay0 = ABC_MAX( DelayA, DelayB + 1 );
+ Delay0 = Abc_MaxInt( DelayA, DelayB + 1 );
// include cof var into 1-block
DelayA = Lpk_SuppDelay( p->puSupps[2*Var+1] | (1<<Var), p->pDelays );
DelayB = Lpk_SuppDelay( p->puSupps[2*Var+0] , p->pDelays );
- Delay1 = ABC_MAX( DelayA, DelayB + 1 );
+ Delay1 = Abc_MaxInt( DelayA, DelayB + 1 );
// get the best delay
- Delay = ABC_MIN( Delay0, Delay1 );
+ Delay = Abc_MinInt( Delay0, Delay1 );
if ( Delay == Delay0 )
Area = Lpk_LutNumLuts( nSuppSize0+2, p->nLutK ) + Lpk_LutNumLuts( nSuppSize1, p->nLutK );
else
@@ -131,8 +131,8 @@ Lpk_Res_t * Lpk_MuxAnalize( Lpk_Man_t * pMan, Lpk_Fun_t * p )
continue;
if ( Area > (int)p->nAreaLim )
continue;
- nSuppSizeS = ABC_MIN( nSuppSize0 + 2 *!Polarity, nSuppSize1 + 2 * Polarity );
- nSuppSizeL = ABC_MAX( nSuppSize0 + 2 *!Polarity, nSuppSize1 + 2 * Polarity );
+ nSuppSizeS = Abc_MinInt( nSuppSize0 + 2 *!Polarity, nSuppSize1 + 2 * Polarity );
+ nSuppSizeL = Abc_MaxInt( nSuppSize0 + 2 *!Polarity, nSuppSize1 + 2 * Polarity );
if ( nSuppSizeL > (int)p->nVars )
continue;
if ( pRes->Variable == -1 || pRes->AreaEst > Area ||
diff --git a/src/opt/lpk/lpkAbcUtil.c b/src/opt/lpk/lpkAbcUtil.c
index b086d35f..b96614d2 100644
--- a/src/opt/lpk/lpkAbcUtil.c
+++ b/src/opt/lpk/lpkAbcUtil.c
@@ -217,7 +217,7 @@ int Lpk_SuppDelay( unsigned uSupp, char * pDelays )
int Delay, Var;
Delay = 0;
Lpk_SuppForEachVar( uSupp, Var )
- Delay = ABC_MAX( Delay, pDelays[Var] );
+ Delay = Abc_MaxInt( Delay, pDelays[Var] );
return Delay + 1;
}
diff --git a/src/opt/lpk/lpkCore.c b/src/opt/lpk/lpkCore.c
index a4c9471d..51f05b21 100644
--- a/src/opt/lpk/lpkCore.c
+++ b/src/opt/lpk/lpkCore.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "lpkInt.h"
-#include "cloud.h"
-#include "main.h"
+#include "src/bool/kit/cloud.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
@@ -140,7 +140,7 @@ int Lpk_ExploreCut( Lpk_Man_t * p, Lpk_Cut_t * pCut, Kit_DsdNtk_t * pNtk )
pRoot = Kit_DsdNtkRoot( pNtk );
if ( pRoot->Type == KIT_DSD_CONST1 )
{
- if ( Kit_DsdLitIsCompl(pNtk->Root) )
+ if ( Abc_LitIsCompl(pNtk->Root) )
pObjNew = Abc_NtkCreateNodeConst0( p->pNtk );
else
pObjNew = Abc_NtkCreateNodeConst1( p->pNtk );
@@ -150,8 +150,8 @@ int Lpk_ExploreCut( Lpk_Man_t * p, Lpk_Cut_t * pCut, Kit_DsdNtk_t * pNtk )
}
if ( pRoot->Type == KIT_DSD_VAR )
{
- pObjNew = Abc_NtkObj( p->pNtk, pCut->pLeaves[ Kit_DsdLit2Var(pRoot->pFans[0]) ] );
- if ( Kit_DsdLitIsCompl(pNtk->Root) ^ Kit_DsdLitIsCompl(pRoot->pFans[0]) )
+ pObjNew = Abc_NtkObj( p->pNtk, pCut->pLeaves[ Abc_Lit2Var(pRoot->pFans[0]) ] );
+ if ( Abc_LitIsCompl(pNtk->Root) ^ Abc_LitIsCompl(pRoot->pFans[0]) )
pObjNew = Abc_NtkCreateNodeInv( p->pNtk, pObjNew );
Abc_NtkUpdate( p->pObj, pObjNew, p->vLevels );
p->nGainTotal += pCut->nNodes - pCut->nNodesDup;
diff --git a/src/opt/lpk/lpkCut.c b/src/opt/lpk/lpkCut.c
index a07372e6..c4be0c35 100644
--- a/src/opt/lpk/lpkCut.c
+++ b/src/opt/lpk/lpkCut.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "lpkInt.h"
-#include "cloud.h"
+#include "src/bool/kit/cloud.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/lpk/lpkInt.h b/src/opt/lpk/lpkInt.h
index 5cb8c1a2..61fa1624 100644
--- a/src/opt/lpk/lpkInt.h
+++ b/src/opt/lpk/lpkInt.h
@@ -18,17 +18,17 @@
***********************************************************************/
-#ifndef __LPK_INT_H__
-#define __LPK_INT_H__
+#ifndef ABC__opt__lpk__lpkInt_h
+#define ABC__opt__lpk__lpkInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "abc.h"
-#include "kit.h"
-#include "if.h"
+#include "src/base/abc/abc.h"
+#include "src/bool/kit/kit.h"
+#include "src/map/if/if.h"
#include "lpk.h"
////////////////////////////////////////////////////////////////////////
diff --git a/src/opt/lpk/lpkMap.c b/src/opt/lpk/lpkMap.c
index c6c6b233..28780bc1 100644
--- a/src/opt/lpk/lpkMap.c
+++ b/src/opt/lpk/lpkMap.c
@@ -116,20 +116,20 @@ If_Obj_t * Lpk_MapTree_rec( Lpk_Man_t * p, Kit_DsdNtk_t * pNtk, If_Obj_t ** ppLe
assert( iLit >= 0 );
// consider the case of a gate
- pObj = Kit_DsdNtkObj( pNtk, Kit_DsdLit2Var(iLit) );
+ pObj = Kit_DsdNtkObj( pNtk, Abc_Lit2Var(iLit) );
if ( pObj == NULL )
{
- pObjNew = ppLeaves[Kit_DsdLit2Var(iLit)];
- return If_NotCond( pObjNew, Kit_DsdLitIsCompl(iLit) );
+ pObjNew = ppLeaves[Abc_Lit2Var(iLit)];
+ return If_NotCond( pObjNew, Abc_LitIsCompl(iLit) );
}
if ( pObj->Type == KIT_DSD_CONST1 )
{
- return If_NotCond( If_ManConst1(p->pIfMan), Kit_DsdLitIsCompl(iLit) );
+ return If_NotCond( If_ManConst1(p->pIfMan), Abc_LitIsCompl(iLit) );
}
if ( pObj->Type == KIT_DSD_VAR )
{
- pObjNew = ppLeaves[Kit_DsdLit2Var(pObj->pFans[0])];
- return If_NotCond( pObjNew, Kit_DsdLitIsCompl(iLit) ^ Kit_DsdLitIsCompl(pObj->pFans[0]) );
+ pObjNew = ppLeaves[Abc_Lit2Var(pObj->pFans[0])];
+ return If_NotCond( pObjNew, Abc_LitIsCompl(iLit) ^ Abc_LitIsCompl(pObj->pFans[0]) );
}
if ( pObj->Type == KIT_DSD_AND )
{
@@ -139,11 +139,11 @@ If_Obj_t * Lpk_MapTree_rec( Lpk_Man_t * p, Kit_DsdNtk_t * pNtk, If_Obj_t ** ppLe
if ( pFansNew[0] == NULL || pFansNew[1] == NULL )
return NULL;
pObjNew = If_ManCreateAnd( p->pIfMan, pFansNew[0], pFansNew[1] );
- return If_NotCond( pObjNew, Kit_DsdLitIsCompl(iLit) );
+ return If_NotCond( pObjNew, Abc_LitIsCompl(iLit) );
}
if ( pObj->Type == KIT_DSD_XOR )
{
- int fCompl = Kit_DsdLitIsCompl(iLit);
+ int fCompl = Abc_LitIsCompl(iLit);
assert( pObj->nFans == 2 );
pFansNew[0] = Lpk_MapTree_rec( p, pNtk, ppLeaves, pObj->pFans[0], NULL );
pFansNew[1] = pResult? pResult : Lpk_MapTree_rec( p, pNtk, ppLeaves, pObj->pFans[1], NULL );
@@ -170,7 +170,7 @@ If_Obj_t * Lpk_MapTree_rec( Lpk_Man_t * p, Kit_DsdNtk_t * pNtk, If_Obj_t ** ppLe
if ( !p->fCofactoring && p->pPars->nVarsShared > 0 && (int)pObj->nFans > p->pPars->nLutSize )
{
pObjNew = Lpk_MapTreeMulti( p, Kit_DsdObjTruth(pObj), pObj->nFans, pFansNew );
- return If_NotCond( pObjNew, Kit_DsdLitIsCompl(iLit) );
+ return If_NotCond( pObjNew, Abc_LitIsCompl(iLit) );
}
*/
/*
@@ -178,7 +178,7 @@ If_Obj_t * Lpk_MapTree_rec( Lpk_Man_t * p, Kit_DsdNtk_t * pNtk, If_Obj_t ** ppLe
{
pObjNew2 = Lpk_MapTreeMux_rec( p, Kit_DsdObjTruth(pObj), pObj->nFans, pFansNew );
// if ( pObjNew2 )
-// return If_NotCond( pObjNew2, Kit_DsdLitIsCompl(iLit) );
+// return If_NotCond( pObjNew2, Abc_LitIsCompl(iLit) );
}
*/
@@ -187,7 +187,7 @@ If_Obj_t * Lpk_MapTree_rec( Lpk_Man_t * p, Kit_DsdNtk_t * pNtk, If_Obj_t ** ppLe
{
pObjNew2 = Lpk_MapSuppRedDec_rec( p, Kit_DsdObjTruth(pObj), pObj->nFans, pFansNew );
if ( pObjNew2 )
- return If_NotCond( pObjNew2, Kit_DsdLitIsCompl(iLit) );
+ return If_NotCond( pObjNew2, Abc_LitIsCompl(iLit) );
}
pObjNew = Lpk_MapPrime( p, Kit_DsdObjTruth(pObj), pObj->nFans, pFansNew );
@@ -198,7 +198,7 @@ If_Obj_t * Lpk_MapTree_rec( Lpk_Man_t * p, Kit_DsdNtk_t * pNtk, If_Obj_t ** ppLe
If_ObjSetChoice( If_Regular(pObjNew), If_Regular(pObjNew2) );
If_ManCreateChoice( p->pIfMan, If_Regular(pObjNew) );
}
- return If_NotCond( pObjNew, Kit_DsdLitIsCompl(iLit) );
+ return If_NotCond( pObjNew, Abc_LitIsCompl(iLit) );
}
////////////////////////////////////////////////////////////////////////
diff --git a/src/opt/lpk/lpkMulti.c b/src/opt/lpk/lpkMulti.c
index cce154ee..d2bdcf45 100644
--- a/src/opt/lpk/lpkMulti.c
+++ b/src/opt/lpk/lpkMulti.c
@@ -57,7 +57,7 @@ void Lpk_CreateVarOrder( Kit_DsdNtk_t * pNtk, char pTable[][16] )
Kit_DsdObjForEachFanin( pNtk, pObj, iFaninLit, k )
{
if ( Kit_DsdLitIsLeaf( pNtk, iFaninLit ) )
- Above[nAbove++] = Kit_DsdLit2Var(iFaninLit);
+ Above[nAbove++] = Abc_Lit2Var(iFaninLit);
else
uSuppFanins |= Kit_DsdLitSupport( pNtk, iFaninLit );
}
@@ -190,7 +190,7 @@ int Lpk_FindHighest( Kit_DsdNtk_t ** ppNtks, int * piLits, int nSize, int * pPri
uSupps[i] = Kit_DsdLitSupport( ppNtks[i], piLits[i] );
else
{
- pObj = Kit_DsdNtkObj( ppNtks[i], Kit_DsdLit2Var(piLits[i]) );
+ pObj = Kit_DsdNtkObj( ppNtks[i], Abc_Lit2Var(piLits[i]) );
if ( pObj->Type == KIT_DSD_PRIME )
{
pTriv[i] = 0;
@@ -292,7 +292,7 @@ If_Obj_t * Lpk_MapTreeMulti_rec( Lpk_Man_t * p, Kit_DsdNtk_t ** ppNtks, int * pi
if ( p->pPars->fVeryVerbose )
printf( "%d ", i );
assert( piLits[i] >= 0 );
- pObj = Kit_DsdNtkObj( ppNtks[i], Kit_DsdLit2Var(piLits[i]) );
+ pObj = Kit_DsdNtkObj( ppNtks[i], Abc_Lit2Var(piLits[i]) );
if ( pObj == NULL )
piLitsNew[i] = -2;
else if ( pObj->Type == KIT_DSD_PRIME )
@@ -464,9 +464,9 @@ If_Obj_t * Lpk_MapTreeMulti( Lpk_Man_t * p, unsigned * pTruth, int nVars, If_Obj
// collect the roots
pRoot = Kit_DsdNtkRoot(ppNtks[i]);
if ( pRoot->Type == KIT_DSD_CONST1 )
- piLits[i] = Kit_DsdLitIsCompl(ppNtks[i]->Root)? -2: -1;
+ piLits[i] = Abc_LitIsCompl(ppNtks[i]->Root)? -2: -1;
else if ( pRoot->Type == KIT_DSD_VAR )
- piLits[i] = Kit_DsdLitNotCond( pRoot->pFans[0], Kit_DsdLitIsCompl(ppNtks[i]->Root) );
+ piLits[i] = Abc_LitNotCond( pRoot->pFans[0], Abc_LitIsCompl(ppNtks[i]->Root) );
else
piLits[i] = ppNtks[i]->Root;
}
diff --git a/src/opt/lpk/lpkSets.c b/src/opt/lpk/lpkSets.c
index 65b23ea9..980a49e3 100644
--- a/src/opt/lpk/lpkSets.c
+++ b/src/opt/lpk/lpkSets.c
@@ -58,9 +58,9 @@ unsigned Lpk_ComputeSets_rec( Kit_DsdNtk_t * p, int iLit, Vec_Int_t * vSets )
unsigned i, iLitFanin, uSupport, uSuppCur;
Kit_DsdObj_t * pObj;
// consider the case of simple gate
- pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
+ pObj = Kit_DsdNtkObj( p, Abc_Lit2Var(iLit) );
if ( pObj == NULL )
- return (1 << Kit_DsdLit2Var(iLit));
+ return (1 << Abc_Lit2Var(iLit));
if ( pObj->Type == KIT_DSD_AND || pObj->Type == KIT_DSD_XOR )
{
unsigned uSupps[16], Limit, s;
@@ -116,7 +116,7 @@ unsigned Lpk_ComputeSets( Kit_DsdNtk_t * p, Vec_Int_t * vSets )
return 0;
if ( Kit_DsdNtkRoot(p)->Type == KIT_DSD_VAR )
{
- uSupport = ( 1 << Kit_DsdLit2Var(Kit_DsdNtkRoot(p)->pFans[0]) );
+ uSupport = ( 1 << Abc_Lit2Var(Kit_DsdNtkRoot(p)->pFans[0]) );
Vec_IntPush( vSets, uSupport );
return uSupport;
}
diff --git a/src/opt/mfs/mfs.h b/src/opt/mfs/mfs.h
index 02fcc21b..9916b582 100644
--- a/src/opt/mfs/mfs.h
+++ b/src/opt/mfs/mfs.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __MFS_H__
-#define __MFS_H__
+#ifndef ABC__opt__mfs__mfs_h
+#define ABC__opt__mfs__mfs_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/opt/mfs/mfsGia.c b/src/opt/mfs/mfsGia.c
index af6cc159..07c258ab 100644
--- a/src/opt/mfs/mfsGia.c
+++ b/src/opt/mfs/mfsGia.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "mfsInt.h"
-#include "giaAig.h"
+#include "aig/gia/giaAig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/mfs/mfsInt.h b/src/opt/mfs/mfsInt.h
index 650a154a..fe154093 100644
--- a/src/opt/mfs/mfsInt.h
+++ b/src/opt/mfs/mfsInt.h
@@ -18,23 +18,22 @@
***********************************************************************/
-#ifndef __MFS_INT_H__
-#define __MFS_INT_H__
+#ifndef ABC__opt__mfs__mfsInt_h
+#define ABC__opt__mfs__mfsInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "mfs.h"
-#include "aig.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "satStore.h"
-#include "bdc.h"
-#include "gia.h"
+#include "src/aig/aig/aig.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/bsat/satStore.h"
+#include "src/bool/bdc/bdc.h"
+#include "src/aig/gia/gia.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/opt/mfs/mfsInter.c b/src/opt/mfs/mfsInter.c
index 0934513b..d18613c7 100644
--- a/src/opt/mfs/mfsInter.c
+++ b/src/opt/mfs/mfsInter.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "mfsInt.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/mfs/mfsMan.c b/src/opt/mfs/mfsMan.c
index df331b43..caa82e68 100644
--- a/src/opt/mfs/mfsMan.c
+++ b/src/opt/mfs/mfsMan.c
@@ -52,7 +52,7 @@ Mfs_Man_t * Mfs_ManAlloc( Mfs_Par_t * pPars )
p->vProjVarsCnf = Vec_IntAlloc( 100 );
p->vProjVarsSat = Vec_IntAlloc( 100 );
p->vDivLits = Vec_IntAlloc( 100 );
- p->nDivWords = Aig_BitWordNum(p->pPars->nDivMax + MFS_FANIN_MAX);
+ p->nDivWords = Abc_BitWordNum(p->pPars->nDivMax + MFS_FANIN_MAX);
p->vDivCexes = Vec_PtrAllocSimInfo( p->pPars->nDivMax+MFS_FANIN_MAX+1, p->nDivWords );
p->pMan = Int_ManAlloc();
p->vMem = Vec_IntAlloc( 0 );
diff --git a/src/opt/mfs/mfsResub.c b/src/opt/mfs/mfsResub.c
index 40cb6198..45f75674 100644
--- a/src/opt/mfs/mfsResub.c
+++ b/src/opt/mfs/mfsResub.c
@@ -142,8 +142,8 @@ p->timeGia += clock() - clk;
pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
if ( !sat_solver_var_value( p->pSat, iVar ) ) // remove 0s!!!
{
- assert( Aig_InfoHasBit(pData, p->nCexes) );
- Aig_InfoXorBit( pData, p->nCexes );
+ assert( Abc_InfoHasBit(pData, p->nCexes) );
+ Abc_InfoXorBit( pData, p->nCexes );
}
}
p->nCexes++;
@@ -242,13 +242,13 @@ p->timeInt += clock() - clk;
for ( i = 0; i < Vec_PtrSize(p->vDivs); i++ )
{
pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
- printf( "%d", Aig_InfoHasBit(pData, p->nCexes-1) );
+ printf( "%d", Abc_InfoHasBit(pData, p->nCexes-1) );
}
printf( "\n" );
}
// find the next divisor to try
- nWords = Aig_BitWordNum(p->nCexes);
+ nWords = Abc_BitWordNum(p->nCexes);
assert( nWords <= p->nDivWords );
for ( iVar = 0; iVar < Vec_PtrSize(p->vDivs)-Abc_ObjFaninNum(pNode); iVar++ )
{
@@ -387,13 +387,13 @@ p->timeInt += clock() - clk;
for ( i = 0; i < Vec_PtrSize(p->vDivs); i++ )
{
pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
- printf( "%d", Aig_InfoHasBit(pData, p->nCexes-1) );
+ printf( "%d", Abc_InfoHasBit(pData, p->nCexes-1) );
}
printf( "\n" );
}
// find the next divisor to try
- nWords = Aig_BitWordNum(p->nCexes);
+ nWords = Abc_BitWordNum(p->nCexes);
assert( nWords <= p->nDivWords );
fBreak = 0;
for ( iVar = 1; iVar < Vec_PtrSize(p->vDivs)-Abc_ObjFaninNum(pNode); iVar++ )
diff --git a/src/opt/mfs/mfsSat.c b/src/opt/mfs/mfsSat.c
index 37ee2b39..e5e9de1a 100644
--- a/src/opt/mfs/mfsSat.c
+++ b/src/opt/mfs/mfsSat.c
@@ -72,8 +72,8 @@ int Abc_NtkMfsSolveSat_iter( Mfs_Man_t * p )
Lits[b] = lit_neg( Lits[b] );
}
}
- assert( !Aig_InfoHasBit(p->uCare, Mint) );
- Aig_InfoSetBit( p->uCare, Mint );
+ assert( !Abc_InfoHasBit(p->uCare, Mint) );
+ Abc_InfoSetBit( p->uCare, Mint );
// add the blocking clause
RetValue = sat_solver_addclause( p->pSat, Lits, Lits + Vec_IntSize(p->vProjVarsSat) );
if ( RetValue == 0 )
@@ -106,7 +106,7 @@ int Abc_NtkMfsSolveSat( Mfs_Man_t * p, Abc_Obj_t * pNode )
// prepare the truth table of care set
p->nFanins = Vec_IntSize( p->vProjVarsSat );
- p->nWords = Aig_TruthWordNum( p->nFanins );
+ p->nWords = Abc_TruthWordNum( p->nFanins );
memset( p->uCare, 0, sizeof(unsigned) * p->nWords );
// iterate through the SAT assignments
diff --git a/src/opt/mfs/mfsStrash.c b/src/opt/mfs/mfsStrash.c
index a5c7b987..922af3a8 100644
--- a/src/opt/mfs/mfsStrash.c
+++ b/src/opt/mfs/mfsStrash.c
@@ -367,7 +367,7 @@ Aig_Man_t * Abc_NtkAigForConstraints( Mfs_Man_t * p, Abc_Obj_t * pNode )
ABC_NAMESPACE_IMPL_END
-#include "fra.h"
+#include "src/proof/fra/fra.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/nwk/module.make b/src/opt/nwk/module.make
new file mode 100644
index 00000000..13812d68
--- /dev/null
+++ b/src/opt/nwk/module.make
@@ -0,0 +1,14 @@
+SRC += src/opt/nwk/nwkAig.c \
+ src/opt/nwk/nwkCheck.c \
+ src/opt/nwk/nwkBidec.c \
+ src/opt/nwk/nwkDfs.c \
+ src/opt/nwk/nwkFanio.c \
+ src/opt/nwk/nwkFlow.c \
+ src/opt/nwk/nwkMan.c \
+ src/opt/nwk/nwkMap.c \
+ src/opt/nwk/nwkMerge.c \
+ src/opt/nwk/nwkObj.c \
+ src/opt/nwk/nwkSpeedup.c \
+ src/opt/nwk/nwkStrash.c \
+ src/opt/nwk/nwkTiming.c \
+ src/opt/nwk/nwkUtil.c
diff --git a/src/aig/ntl/ntlnwk.h b/src/opt/nwk/ntlnwk.h
index 0b07f243..5300e6f4 100644
--- a/src/aig/ntl/ntlnwk.h
+++ b/src/opt/nwk/ntlnwk.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __NTLNWK_H__
-#define __NTLNWK_H__
+#ifndef __NTLNWK_abc_opt_nwk_h
+#define __NTLNWK_abc_opt_nwk_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/nwk/nwk.h b/src/opt/nwk/nwk.h
index acbcbf4a..79c7bb1a 100644
--- a/src/aig/nwk/nwk.h
+++ b/src/opt/nwk/nwk.h
@@ -18,22 +18,22 @@
***********************************************************************/
-#ifndef __NWK_H__
-#define __NWK_H__
+#ifndef __NWK_abc_opt_nwk_h
+#define __NWK_abc_opt_nwk_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "aig.h"
-#include "hop.h"
-#include "tim.h"
-#include "if.h"
-#include "bdc.h"
+#include "src/aig/aig/aig.h"
+#include "src/aig/hop/hop.h"
+#include "src/misc/tim/tim.h"
+#include "src/map/if/if.h"
+#include "src/bool/bdc/bdc.h"
-#include "fra.h"
-#include "ssw.h"
+#include "src/proof/fra/fra.h"
+#include "src/proof/ssw/ssw.h"
#include "ntlnwk.h"
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/nwk/nwkAig.c b/src/opt/nwk/nwkAig.c
index b38fbdfa..7dae0dca 100644
--- a/src/aig/nwk/nwkAig.c
+++ b/src/opt/nwk/nwkAig.c
@@ -51,8 +51,8 @@ Nwk_Man_t * Nwk_ManDeriveFromAig( Aig_Man_t * p )
pNtk->nFanioPlus = 0;
Hop_ManStop( pNtk->pManHop );
pNtk->pManHop = NULL;
- pNtk->pName = Aig_UtilStrsav( p->pName );
- pNtk->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNtk->pName = Abc_UtilStrsav( p->pName );
+ pNtk->pSpec = Abc_UtilStrsav( p->pSpec );
pObj = Aig_ManConst1(p);
pObj->pData = Nwk_ManCreateNode( pNtk, 0, pObj->nRefs );
Aig_ManForEachPi( p, pObj, i )
diff --git a/src/aig/nwk/nwkBidec.c b/src/opt/nwk/nwkBidec.c
index 567b904b..1b6439d2 100644
--- a/src/aig/nwk/nwkBidec.c
+++ b/src/opt/nwk/nwkBidec.c
@@ -73,7 +73,7 @@ Hop_Obj_t * Nwk_NodeIfNodeResyn( Bdc_Man_t * p, Hop_Man_t * pHop, Hop_Obj_t * pR
// derive truth table
pTruth = Hop_ManConvertAigToTruth( pHop, Hop_Regular(pRoot), nVars, vTruth, 0 );
if ( Hop_IsComplement(pRoot) )
- for ( i = Aig_TruthWordNum(nVars)-1; i >= 0; i-- )
+ for ( i = Abc_TruthWordNum(nVars)-1; i >= 0; i-- )
pTruth[i] = ~pTruth[i];
// perform power-aware decomposition
if ( dProb >= 0.0 )
diff --git a/src/aig/nwk/nwkCheck.c b/src/opt/nwk/nwkCheck.c
index 24a0d513..24a0d513 100644
--- a/src/aig/nwk/nwkCheck.c
+++ b/src/opt/nwk/nwkCheck.c
diff --git a/src/aig/nwk/nwkDfs.c b/src/opt/nwk/nwkDfs.c
index 59752c59..59752c59 100644
--- a/src/aig/nwk/nwkDfs.c
+++ b/src/opt/nwk/nwkDfs.c
diff --git a/src/aig/nwk/nwkFanio.c b/src/opt/nwk/nwkFanio.c
index 2a12f5bf..79fc5b3a 100644
--- a/src/aig/nwk/nwkFanio.c
+++ b/src/opt/nwk/nwkFanio.c
@@ -175,7 +175,7 @@ void Nwk_ObjAddFanin( Nwk_Obj_t * pObj, Nwk_Obj_t * pFanin )
pObj->pFanio[i] = pObj->pFanio[i-1];
pObj->pFanio[pObj->nFanins++] = pFanin;
pFanin->pFanio[pFanin->nFanins + pFanin->nFanouts++] = pObj;
- pObj->Level = ABC_MAX( pObj->Level, pFanin->Level + Nwk_ObjIsNode(pObj) );
+ pObj->Level = Abc_MaxInt( pObj->Level, pFanin->Level + Nwk_ObjIsNode(pObj) );
}
/**Function*************************************************************
diff --git a/src/aig/nwk/nwkFlow.c b/src/opt/nwk/nwkFlow.c
index 3961e5c2..3961e5c2 100644
--- a/src/aig/nwk/nwkFlow.c
+++ b/src/opt/nwk/nwkFlow.c
diff --git a/src/aig/nwk/nwkFlow_depth.c b/src/opt/nwk/nwkFlow_depth.c
index 6c2e7eb9..6c2e7eb9 100644
--- a/src/aig/nwk/nwkFlow_depth.c
+++ b/src/opt/nwk/nwkFlow_depth.c
diff --git a/src/aig/nwk/nwkMan.c b/src/opt/nwk/nwkMan.c
index 2e2a3e56..f286dc50 100644
--- a/src/aig/nwk/nwkMan.c
+++ b/src/opt/nwk/nwkMan.c
@@ -150,7 +150,7 @@ int Nwk_ManCompareAndSaveBest( Nwk_Man_t * pNtk, void * pNtl )
(ParsBest.Depth == ParsNew.Depth && ParsBest.Flops == ParsNew.Flops && ParsBest.Nodes > ParsNew.Nodes) )
{
ABC_FREE( ParsBest.pName );
- ParsBest.pName = Aig_UtilStrsav( pNtk->pName );
+ ParsBest.pName = Abc_UtilStrsav( pNtk->pName );
ParsBest.Depth = ParsNew.Depth;
ParsBest.Flops = ParsNew.Flops;
ParsBest.Nodes = ParsNew.Nodes;
@@ -178,7 +178,7 @@ int Nwk_ManCompareAndSaveBest( Nwk_Man_t * pNtk, void * pNtl )
char * Nwk_FileNameGeneric( char * FileName )
{
char * pDot, * pRes;
- pRes = Aig_UtilStrsav( FileName );
+ pRes = Abc_UtilStrsav( FileName );
if ( (pDot = strrchr( pRes, '.' )) )
*pDot = 0;
return pRes;
diff --git a/src/aig/nwk/nwkMap.c b/src/opt/nwk/nwkMap.c
index 22f25dbc..61ee50e8 100644
--- a/src/aig/nwk/nwkMap.c
+++ b/src/opt/nwk/nwkMap.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "nwk.h"
-#include "if.h"
+#include "src/map/if/if.h"
ABC_NAMESPACE_IMPL_START
@@ -295,8 +295,8 @@ Nwk_Man_t * Nwk_ManFromIf( If_Man_t * pIfMan, Aig_Man_t * p, Vec_Ptr_t * vAigToI
}
// construct the network
pNtk = Nwk_ManAlloc();
- pNtk->pName = Aig_UtilStrsav( p->pName );
- pNtk->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNtk->pName = Abc_UtilStrsav( p->pName );
+ pNtk->pSpec = Abc_UtilStrsav( p->pSpec );
// pNtk->nLatches = Aig_ManRegNum(p);
// pNtk->nTruePis = Nwk_ManCiNum(pNtk) - pNtk->nLatches;
// pNtk->nTruePos = Nwk_ManCoNum(pNtk) - pNtk->nLatches;
diff --git a/src/aig/nwk/nwkMerge.c b/src/opt/nwk/nwkMerge.c
index 9a4f2f8c..fa9f7c78 100644
--- a/src/aig/nwk/nwkMerge.c
+++ b/src/opt/nwk/nwkMerge.c
@@ -49,7 +49,7 @@ Nwk_Grf_t * Nwk_ManGraphAlloc( int nVertsMax )
p = ABC_ALLOC( Nwk_Grf_t, 1 );
memset( p, 0, sizeof(Nwk_Grf_t) );
p->nVertsMax = nVertsMax;
- p->nEdgeHash = Aig_PrimeCudd( 3 * nVertsMax );
+ p->nEdgeHash = Abc_PrimeCudd( 3 * nVertsMax );
p->pEdgeHash = ABC_CALLOC( Nwk_Edg_t *, p->nEdgeHash );
p->pMemEdges = Aig_MmFixedStart( sizeof(Nwk_Edg_t), p->nEdgeHash );
p->vPairs = Vec_IntAlloc( 1000 );
diff --git a/src/aig/nwk/nwkMerge.h b/src/opt/nwk/nwkMerge.h
index f6be760f..f6be760f 100644
--- a/src/aig/nwk/nwkMerge.h
+++ b/src/opt/nwk/nwkMerge.h
diff --git a/src/aig/nwk/nwkObj.c b/src/opt/nwk/nwkObj.c
index e5930087..e5930087 100644
--- a/src/aig/nwk/nwkObj.c
+++ b/src/opt/nwk/nwkObj.c
diff --git a/src/aig/nwk/nwkSpeedup.c b/src/opt/nwk/nwkSpeedup.c
index 335d50f8..335d50f8 100644
--- a/src/aig/nwk/nwkSpeedup.c
+++ b/src/opt/nwk/nwkSpeedup.c
diff --git a/src/aig/nwk/nwkStrash.c b/src/opt/nwk/nwkStrash.c
index 54f1f027..74fc4d56 100644
--- a/src/aig/nwk/nwkStrash.c
+++ b/src/opt/nwk/nwkStrash.c
@@ -104,8 +104,8 @@ Aig_Man_t * Nwk_ManStrash( Nwk_Man_t * pNtk )
Nwk_Obj_t * pObj;
int i, Level;
pMan = Aig_ManStart( Nwk_ManGetAigNodeNum(pNtk) );
- pMan->pName = Aig_UtilStrsav( pNtk->pName );
- pMan->pSpec = Aig_UtilStrsav( pNtk->pSpec );
+ pMan->pName = Abc_UtilStrsav( pNtk->pName );
+ pMan->pSpec = Abc_UtilStrsav( pNtk->pSpec );
pMan->pManTime = Tim_ManDup( (Tim_Man_t *)pNtk->pManTime, 1 );
Tim_ManIncrementTravId( (Tim_Man_t *)pMan->pManTime );
Nwk_ManForEachObj( pNtk, pObj, i )
diff --git a/src/aig/nwk/nwkTiming.c b/src/opt/nwk/nwkTiming.c
index 53591ee8..9419c175 100644
--- a/src/aig/nwk/nwkTiming.c
+++ b/src/opt/nwk/nwkTiming.c
@@ -739,7 +739,7 @@ int Nwk_ObjLevelNew( Nwk_Obj_t * pObj )
for ( i = 0; i < nTerms; i++ )
{
pFanin = Nwk_ManCo(pObj->pMan, iTerm1 + i);
- Level = ABC_MAX( Level, Nwk_ObjLevel(pFanin) );
+ Level = Abc_MaxInt( Level, Nwk_ObjLevel(pFanin) );
}
Level++;
}
@@ -748,7 +748,7 @@ int Nwk_ObjLevelNew( Nwk_Obj_t * pObj )
}
assert( Nwk_ObjIsNode(pObj) || Nwk_ObjIsCo(pObj) );
Nwk_ObjForEachFanin( pObj, pFanin, i )
- Level = ABC_MAX( Level, Nwk_ObjLevel(pFanin) );
+ Level = Abc_MaxInt( Level, Nwk_ObjLevel(pFanin) );
return Level + (Nwk_ObjIsNode(pObj) && Nwk_ObjFaninNum(pObj) > 0);
}
diff --git a/src/aig/nwk/nwkUtil.c b/src/opt/nwk/nwkUtil.c
index a1948031..9d23c869 100644
--- a/src/aig/nwk/nwkUtil.c
+++ b/src/opt/nwk/nwkUtil.c
@@ -20,7 +20,7 @@
#include <math.h>
#include "nwk.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
@@ -271,7 +271,7 @@ void Nwk_ManDumpBlif( Nwk_Man_t * pNtk, char * pFileName, Vec_Ptr_t * vPiNames,
return;
}
// collect nodes in the DFS order
- nDigits = Aig_Base10Log( Nwk_ManObjNumMax(pNtk) );
+ nDigits = Abc_Base10Log( Nwk_ManObjNumMax(pNtk) );
// write the file
pFile = fopen( pFileName, "w" );
fprintf( pFile, "# BLIF file written by procedure Nwk_ManDumpBlif()\n" );
@@ -371,12 +371,12 @@ void Nwk_ManPrintFanioNew( Nwk_Man_t * pNtk )
nFanouts = Nwk_ObjFanoutNum(pNode);
nFaninsAll += nFanins;
nFanoutsAll += nFanouts;
- nFaninsMax = ABC_MAX( nFaninsMax, nFanins );
- nFanoutsMax = ABC_MAX( nFanoutsMax, nFanouts );
+ nFaninsMax = Abc_MaxInt( nFaninsMax, nFanins );
+ nFanoutsMax = Abc_MaxInt( nFanoutsMax, nFanouts );
}
// allocate storage for fanin/fanout numbers
- nSizeMax = ABC_MAX( 10 * (Aig_Base10Log(nFaninsMax) + 1), 10 * (Aig_Base10Log(nFanoutsMax) + 1) );
+ nSizeMax = Abc_MaxInt( 10 * (Abc_Base10Log(nFaninsMax) + 1), 10 * (Abc_Base10Log(nFanoutsMax) + 1) );
vFanins = Vec_IntStart( nSizeMax );
vFanouts = Vec_IntStart( nSizeMax );
diff --git a/src/aig/nwk/nwk_.c b/src/opt/nwk/nwk_.c
index 882b077c..882b077c 100644
--- a/src/aig/nwk/nwk_.c
+++ b/src/opt/nwk/nwk_.c
diff --git a/src/opt/res/res.h b/src/opt/res/res.h
index bd328d54..0a941c59 100644
--- a/src/opt/res/res.h
+++ b/src/opt/res/res.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __RES_H__
-#define __RES_H__
+#ifndef ABC__opt__res__res_h
+#define ABC__opt__res__res_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/opt/res/resCore.c b/src/opt/res/resCore.c
index eecdd481..effc7e65 100644
--- a/src/opt/res/resCore.c
+++ b/src/opt/res/resCore.c
@@ -18,10 +18,10 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "resInt.h"
-#include "kit.h"
-#include "satStore.h"
+#include "src/bool/kit/kit.h"
+#include "src/sat/bsat/satStore.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/res/resDivs.c b/src/opt/res/resDivs.c
index 6d9ffd9f..f378991d 100644
--- a/src/opt/res/resDivs.c
+++ b/src/opt/res/resDivs.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "resInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/res/resFilter.c b/src/opt/res/resFilter.c
index b9d62dd8..188b9dc3 100644
--- a/src/opt/res/resFilter.c
+++ b/src/opt/res/resFilter.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "resInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/res/resInt.h b/src/opt/res/resInt.h
index ae238359..cd0cf84b 100644
--- a/src/opt/res/resInt.h
+++ b/src/opt/res/resInt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __RES_INT_H__
-#define __RES_INT_H__
+#ifndef ABC__opt__res__resInt_h
+#define ABC__opt__res__resInt_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/opt/res/resSat.c b/src/opt/res/resSat.c
index 17f3d661..111442b4 100644
--- a/src/opt/res/resSat.c
+++ b/src/opt/res/resSat.c
@@ -18,10 +18,10 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "resInt.h"
-#include "hop.h"
-#include "satSolver.h"
+#include "src/aig/hop/hop.h"
+#include "src/sat/bsat/satSolver.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/res/resSim.c b/src/opt/res/resSim.c
index 740b7d0a..d8faf8bf 100644
--- a/src/opt/res/resSim.c
+++ b/src/opt/res/resSim.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "resInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/res/resSim_old.c b/src/opt/res/resSim_old.c
index ebadeec0..a6aced1d 100644
--- a/src/opt/res/resSim_old.c
+++ b/src/opt/res/resSim_old.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "base/abc/abc.h"
#include "resInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/res/resStrash.c b/src/opt/res/resStrash.c
index 1ee84957..c080a718 100644
--- a/src/opt/res/resStrash.c
+++ b/src/opt/res/resStrash.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "resInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/res/resWin.c b/src/opt/res/resWin.c
index e6eeac6a..09176833 100644
--- a/src/opt/res/resWin.c
+++ b/src/opt/res/resWin.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "src/base/abc/abc.h"
#include "resInt.h"
ABC_NAMESPACE_IMPL_START
@@ -145,10 +145,10 @@ int Res_WinCollectLeavesAndNodes( Res_Win_t * p )
// get the lowest leaf level
p->nLevLeafMin = ABC_INFINITY;
Vec_PtrForEachEntry( Abc_Obj_t *, p->vLeaves, pObj, k )
- p->nLevLeafMin = ABC_MIN( p->nLevLeafMin, (int)pObj->Level );
+ p->nLevLeafMin = Abc_MinInt( p->nLevLeafMin, (int)pObj->Level );
// set minimum traversal level
- p->nLevTravMin = ABC_MAX( ((int)p->pNode->Level) - p->nWinTfiMax - p->nLevTfiMinus, p->nLevLeafMin );
+ p->nLevTravMin = Abc_MaxInt( ((int)p->pNode->Level) - p->nWinTfiMax - p->nLevTfiMinus, p->nLevLeafMin );
assert( p->nLevTravMin >= 0 );
return 1;
}
diff --git a/src/opt/res/res_.c b/src/opt/res/res_.c
index ffbc4946..8d18eeaf 100644
--- a/src/opt/res/res_.c
+++ b/src/opt/res/res_.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "abc.h"
+#include "base/abc/abc.h"
#include "res.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/ret/retInt.h b/src/opt/ret/retInt.h
index 39a6296e..9460f6e8 100644
--- a/src/opt/ret/retInt.h
+++ b/src/opt/ret/retInt.h
@@ -18,15 +18,15 @@
***********************************************************************/
-#ifndef __RET_INT_H__
-#define __RET_INT_H__
+#ifndef ABC__opt__ret__retInt_h
+#define ABC__opt__ret__retInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "abc.h"
+#include "src/base/abc/abc.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/opt/rwr/rwr.h b/src/opt/rwr/rwr.h
index ed05d4a3..50ea7998 100644
--- a/src/opt/rwr/rwr.h
+++ b/src/opt/rwr/rwr.h
@@ -18,16 +18,16 @@
***********************************************************************/
-#ifndef __RWR_H__
-#define __RWR_H__
+#ifndef ABC__opt__rwr__rwr_h
+#define ABC__opt__rwr__rwr_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "abc.h"
-#include "cut.h"
+#include "src/base/abc/abc.h"
+#include "src/opt/cut/cut.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/opt/rwr/rwrDec.c b/src/opt/rwr/rwrDec.c
index a280f5f1..c1860a7b 100644
--- a/src/opt/rwr/rwrDec.c
+++ b/src/opt/rwr/rwrDec.c
@@ -18,9 +18,8 @@
***********************************************************************/
-#include "extra.h"
#include "rwr.h"
-#include "dec.h"
+#include "src/bool/dec/dec.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/rwr/rwrEva.c b/src/opt/rwr/rwrEva.c
index 5d826da9..83eb8d7b 100644
--- a/src/opt/rwr/rwrEva.c
+++ b/src/opt/rwr/rwrEva.c
@@ -18,10 +18,9 @@
***********************************************************************/
-#include "extra.h"
#include "rwr.h"
-#include "dec.h"
-#include "ivy.h"
+#include "src/bool/dec/dec.h"
+#include "src/aig/ivy/ivy.h"
ABC_NAMESPACE_IMPL_START
@@ -487,7 +486,7 @@ int Rwr_NodeGetDepth_rec( Abc_Obj_t * pObj, Vec_Ptr_t * vLeaves )
return 0;
Depth0 = Rwr_NodeGetDepth_rec( Abc_ObjFanin0(pObj), vLeaves );
Depth1 = Rwr_NodeGetDepth_rec( Abc_ObjFanin1(pObj), vLeaves );
- return 1 + ABC_MAX( Depth0, Depth1 );
+ return 1 + Abc_MaxInt( Depth0, Depth1 );
}
diff --git a/src/opt/rwr/rwrExp.c b/src/opt/rwr/rwrExp.c
index fa75f066..c4664fbf 100644
--- a/src/opt/rwr/rwrExp.c
+++ b/src/opt/rwr/rwrExp.c
@@ -18,7 +18,6 @@
***********************************************************************/
-#include "extra.h"
#include "rwr.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/rwr/rwrLib.c b/src/opt/rwr/rwrLib.c
index a7c01047..b1aa2ac7 100644
--- a/src/opt/rwr/rwrLib.c
+++ b/src/opt/rwr/rwrLib.c
@@ -18,7 +18,6 @@
***********************************************************************/
-#include "extra.h"
#include "rwr.h"
ABC_NAMESPACE_IMPL_START
@@ -76,7 +75,7 @@ void Rwr_ManPrecompute( Rwr_Man_t * p )
// break;
// compute the level and volume of the new nodes
- Level = 1 + ABC_MAX( p0->Level, p1->Level );
+ Level = 1 + Abc_MaxInt( p0->Level, p1->Level );
Volume = 1 + Rwr_ManNodeVolume( p, p0, p1 );
// try four different AND nodes
Rwr_ManTryNode( p, p0 , p1 , 0, Level, Volume );
diff --git a/src/opt/rwr/rwrMan.c b/src/opt/rwr/rwrMan.c
index 0f32c0da..00273b38 100644
--- a/src/opt/rwr/rwrMan.c
+++ b/src/opt/rwr/rwrMan.c
@@ -18,10 +18,9 @@
***********************************************************************/
-#include "extra.h"
#include "rwr.h"
-#include "main.h"
-#include "dec.h"
+#include "src/base/main/main.h"
+#include "src/bool/dec/dec.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/rwr/rwrPrint.c b/src/opt/rwr/rwrPrint.c
index 5574df88..11a084d3 100644
--- a/src/opt/rwr/rwrPrint.c
+++ b/src/opt/rwr/rwrPrint.c
@@ -18,7 +18,6 @@
***********************************************************************/
-#include "extra.h"
#include "rwr.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/rwr/rwrTemp.c b/src/opt/rwr/rwrTemp.c
index 654e37c1..6a670c3a 100644
--- a/src/opt/rwr/rwrTemp.c
+++ b/src/opt/rwr/rwrTemp.c
@@ -18,7 +18,6 @@
***********************************************************************/
-#include "extra.h"
#include "rwr.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/rwr/rwrUtil.c b/src/opt/rwr/rwrUtil.c
index 7613691a..1b2e8760 100644
--- a/src/opt/rwr/rwrUtil.c
+++ b/src/opt/rwr/rwrUtil.c
@@ -18,7 +18,6 @@
***********************************************************************/
-#include "extra.h"
#include "rwr.h"
ABC_NAMESPACE_IMPL_START
@@ -491,7 +490,7 @@ void Rwr_ManLoadFromArray( Rwr_Man_t * p, int fVerbose )
p0 = (Rwr_Node_t *)p->vForest->pArray[Entry0 >> 1];
p1 = (Rwr_Node_t *)p->vForest->pArray[Entry1 >> 1];
// compute the level and volume of the new nodes
- Level = 1 + ABC_MAX( p0->Level, p1->Level );
+ Level = 1 + Abc_MaxInt( p0->Level, p1->Level );
Volume = 1 + Rwr_ManNodeVolume( p, p0, p1 );
// set the complemented attributes
p0 = Rwr_NotCond( p0, (Entry0 & 1) );
@@ -586,7 +585,7 @@ void Rwr_ManLoadFromFile( Rwr_Man_t * p, char * pFileName )
p0 = (Rwr_Node_t *)p->vForest->pArray[pBuffer[2*i + 0] >> 1];
p1 = (Rwr_Node_t *)p->vForest->pArray[pBuffer[2*i + 1] >> 1];
// compute the level and volume of the new nodes
- Level = 1 + ABC_MAX( p0->Level, p1->Level );
+ Level = 1 + Abc_MaxInt( p0->Level, p1->Level );
Volume = 1 + Rwr_ManNodeVolume( p, p0, p1 );
// set the complemented attributes
p0 = Rwr_NotCond( p0, (pBuffer[2*i + 0] & 1) );
diff --git a/src/opt/rwt/module.make b/src/opt/rwt/module.make
new file mode 100644
index 00000000..a2a6f54c
--- /dev/null
+++ b/src/opt/rwt/module.make
@@ -0,0 +1,3 @@
+SRC += src/opt/rwt/rwtDec.c \
+ src/opt/rwt/rwtMan.c \
+ src/opt/rwt/rwtUtil.c
diff --git a/src/aig/rwt/rwt.h b/src/opt/rwt/rwt.h
index 5410c9de..a528a307 100644
--- a/src/aig/rwt/rwt.h
+++ b/src/opt/rwt/rwt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __RWT_H__
-#define __RWT_H__
+#ifndef ABC__aig__rwt__rwt_h
+#define ABC__aig__rwt__rwt_h
////////////////////////////////////////////////////////////////////////
@@ -31,9 +31,9 @@
#include <string.h>
#include <assert.h>
-#include "vec.h"
-#include "extra.h"
-#include "mem.h"
+#include "src/misc/vec/vec.h"
+#include "src/misc/extra/extra.h"
+#include "src/misc/mem/mem.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/aig/rwt/rwtDec.c b/src/opt/rwt/rwtDec.c
index a26e474d..82283a91 100644
--- a/src/aig/rwt/rwtDec.c
+++ b/src/opt/rwt/rwtDec.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "rwt.h"
-#include "deco.h"
+#include "src/bool/deco/deco.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/rwt/rwtMan.c b/src/opt/rwt/rwtMan.c
index 12caa87f..775d3a88 100644
--- a/src/aig/rwt/rwtMan.c
+++ b/src/opt/rwt/rwtMan.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "rwt.h"
-#include "deco.h"
+#include "src/bool/deco/deco.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/rwt/rwtUtil.c b/src/opt/rwt/rwtUtil.c
index 6cdaf657..6cdaf657 100644
--- a/src/aig/rwt/rwtUtil.c
+++ b/src/opt/rwt/rwtUtil.c
diff --git a/src/opt/sim/sim.h b/src/opt/sim/sim.h
index e1a34273..84b2ed51 100644
--- a/src/opt/sim/sim.h
+++ b/src/opt/sim/sim.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __SIM_H__
-#define __SIM_H__
+#ifndef ABC__opt__sim__sim_h
+#define ABC__opt__sim__sim_h
/*
diff --git a/src/opt/sim/simMan.c b/src/opt/sim/simMan.c
index f3a9650b..9856f484 100644
--- a/src/opt/sim/simMan.c
+++ b/src/opt/sim/simMan.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "sim.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/sim/simSat.c b/src/opt/sim/simSat.c
index 5654c493..5c97055b 100644
--- a/src/opt/sim/simSat.c
+++ b/src/opt/sim/simSat.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "sim.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/sim/simSeq.c b/src/opt/sim/simSeq.c
index fd75ba8d..0efe7378 100644
--- a/src/opt/sim/simSeq.c
+++ b/src/opt/sim/simSeq.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "sim.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/sim/simSupp.c b/src/opt/sim/simSupp.c
index 67ac5efe..a7ceaee7 100644
--- a/src/opt/sim/simSupp.c
+++ b/src/opt/sim/simSupp.c
@@ -18,9 +18,8 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
-#include "fraig.h"
+#include "src/base/abc/abc.h"
+#include "src/proof/fraig/fraig.h"
#include "sim.h"
ABC_NAMESPACE_IMPL_START
@@ -384,7 +383,7 @@ void Sim_UtilAssignFromFifo( Sim_Man_t * p )
iWordLim = iWord + 1;
// set the pattern for all PIs from iBit to iWord + p->nInputs
iBeg = p->iInput;
- iEnd = ABC_MIN( iBeg + 32, p->nInputs );
+ iEnd = Abc_MinInt( iBeg + 32, p->nInputs );
// for ( i = iBeg; i < iEnd; i++ )
Abc_NtkForEachCi( p->pNtk, pNode, i )
{
diff --git a/src/opt/sim/simSwitch.c b/src/opt/sim/simSwitch.c
index a9045ca1..26f8cd51 100644
--- a/src/opt/sim/simSwitch.c
+++ b/src/opt/sim/simSwitch.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "sim.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/sim/simSym.c b/src/opt/sim/simSym.c
index c6b588ac..801d4218 100644
--- a/src/opt/sim/simSym.c
+++ b/src/opt/sim/simSym.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "sim.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/sim/simSymSat.c b/src/opt/sim/simSymSat.c
index dcdff135..2043e2d7 100644
--- a/src/opt/sim/simSymSat.c
+++ b/src/opt/sim/simSymSat.c
@@ -18,10 +18,9 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
+#include "src/proof/fraig/fraig.h"
#include "sim.h"
-#include "fraig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/sim/simSymSim.c b/src/opt/sim/simSymSim.c
index e1676117..fddf602e 100644
--- a/src/opt/sim/simSymSim.c
+++ b/src/opt/sim/simSymSim.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "sim.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/sim/simSymStr.c b/src/opt/sim/simSymStr.c
index 4d83dc61..b9d58b9f 100644
--- a/src/opt/sim/simSymStr.c
+++ b/src/opt/sim/simSymStr.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "sim.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/opt/sim/simUtils.c b/src/opt/sim/simUtils.c
index 64814c0e..77597e83 100644
--- a/src/opt/sim/simUtils.c
+++ b/src/opt/sim/simUtils.c
@@ -18,8 +18,7 @@
***********************************************************************/
-#include "abc.h"
-#include "extra.h"
+#include "src/base/abc/abc.h"
#include "sim.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/phys/place/libhmetis.h b/src/phys/place/libhmetis.h
index 277299b8..e6251325 100644
--- a/src/phys/place/libhmetis.h
+++ b/src/phys/place/libhmetis.h
@@ -1,7 +1,7 @@
// A. Hurst ahurst@eecs.berkeley.edu
-#ifndef LIBHMETIS_H_
-#define LIBHMETIS_H_
+#ifndef ABC__phys__place__libhmetis_h
+#define ABC__phys__place__libhmetis_h
ABC_NAMESPACE_HEADER_START
diff --git a/src/phys/place/place_base.h b/src/phys/place/place_base.h
index ed15ef22..cbad1922 100644
--- a/src/phys/place/place_base.h
+++ b/src/phys/place/place_base.h
@@ -8,7 +8,7 @@
/*===================================================================*/
#if !defined(PLACE_BASE_H_)
-#define PLACE_BASE_H_
+#define ABC__phys__place__place_base_h
ABC_NAMESPACE_HEADER_START
@@ -21,7 +21,7 @@ ABC_NAMESPACE_HEADER_START
// --- a C++ bool-like type
//typedef char bool;
-#ifndef bool
+#ifndef ABC__phys__place__place_base_h
#define bool int
#endif
diff --git a/src/phys/place/place_gordian.h b/src/phys/place/place_gordian.h
index 6be6d907..a959ae50 100644
--- a/src/phys/place/place_gordian.h
+++ b/src/phys/place/place_gordian.h
@@ -8,7 +8,7 @@
/*===================================================================*/
#if !defined(PLACE_GORDIAN_H_)
-#define PLACE_GORDIAN_H_
+#define ABC__phys__place__place_gordian_h
#include "place_base.h"
diff --git a/src/phys/place/place_qpsolver.h b/src/phys/place/place_qpsolver.h
index f859a6ff..9ddf6447 100644
--- a/src/phys/place/place_qpsolver.h
+++ b/src/phys/place/place_qpsolver.h
@@ -8,7 +8,7 @@
/*===================================================================*/
#if !defined(_QPS_H)
-#define _QPS_H
+#define ABC__phys__place__place_qpsolver_h
#include <stdio.h>
diff --git a/src/aig/bbr/bbr.h b/src/proof/bbr/bbr.h
index bb83ac95..71061759 100644
--- a/src/aig/bbr/bbr.h
+++ b/src/proof/bbr/bbr.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __BBR_H__
-#define __BBR_H__
+#ifndef ABC__aig__bbr__bbr_h
+#define ABC__aig__bbr__bbr_h
////////////////////////////////////////////////////////////////////////
@@ -27,9 +27,9 @@
////////////////////////////////////////////////////////////////////////
#include <stdio.h>
-#include "aig.h"
-#include "saig.h"
-#include "cuddInt.h"
+#include "src/aig/aig/aig.h"
+#include "src/aig/saig/saig.h"
+#include "src/bdd/cudd/cuddInt.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/aig/bbr/bbrCex.c b/src/proof/bbr/bbrCex.c
index 4a1a1d67..7ee95e7c 100644
--- a/src/aig/bbr/bbrCex.c
+++ b/src/proof/bbr/bbrCex.c
@@ -85,7 +85,7 @@ Abc_Cex_t * Aig_ManVerifyUsingBddsCountExample( Aig_Man_t * p, DdManager * dd,
// write PIs of counter-example
Saig_ManForEachPi( p, pObj, i )
if ( pValues[i] == 1 )
- Aig_InfoSetBit( pCex->pData, nPiOffset + i );
+ Abc_InfoSetBit( pCex->pData, nPiOffset + i );
nPiOffset -= Saig_ManPiNum(p);
// write state in terms of NS variables
@@ -126,7 +126,7 @@ Abc_Cex_t * Aig_ManVerifyUsingBddsCountExample( Aig_Man_t * p, DdManager * dd,
// write PIs of counter-example
Saig_ManForEachPi( p, pObj, i )
if ( pValues[i] == 1 )
- Aig_InfoSetBit( pCex->pData, nPiOffset + i );
+ Abc_InfoSetBit( pCex->pData, nPiOffset + i );
nPiOffset -= Saig_ManPiNum(p);
// check that we get the init state
diff --git a/src/aig/bbr/bbrImage.c b/src/proof/bbr/bbrImage.c
index 8b18d84d..23b43169 100644
--- a/src/aig/bbr/bbrImage.c
+++ b/src/proof/bbr/bbrImage.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "bbr.h"
-#include "mtr.h"
+#include "src/bdd/mtr/mtr.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/bbr/bbrNtbdd.c b/src/proof/bbr/bbrNtbdd.c
index 09456df0..09456df0 100644
--- a/src/aig/bbr/bbrNtbdd.c
+++ b/src/proof/bbr/bbrNtbdd.c
diff --git a/src/aig/bbr/bbrReach.c b/src/proof/bbr/bbrReach.c
index 9c6dced3..1b5c3984 100644
--- a/src/aig/bbr/bbrReach.c
+++ b/src/proof/bbr/bbrReach.c
@@ -572,8 +572,8 @@ int Aig_ManVerifyUsingBdds( Aig_Man_t * pInit, Saig_ParBbr_t * pPars )
pCexNew->iPo = pCexOld->iPo;
// copy the bit-data
for ( iBitOld = 0; iBitOld < pCexOld->nRegs; iBitOld++ )
- if ( Aig_InfoHasBit( pCexOld->pData, iBitOld ) )
- Aig_InfoSetBit( pCexNew->pData, iBitOld );
+ if ( Abc_InfoHasBit( pCexOld->pData, iBitOld ) )
+ Abc_InfoSetBit( pCexNew->pData, iBitOld );
// copy the primary input data
iBitNew = iBitOld;
for ( i = 0; i <= pCexNew->iFrame; i++ )
@@ -582,8 +582,8 @@ int Aig_ManVerifyUsingBdds( Aig_Man_t * pInit, Saig_ParBbr_t * pPars )
{
if ( Entry == -1 )
continue;
- if ( Aig_InfoHasBit( pCexOld->pData, iBitOld + Entry ) )
- Aig_InfoSetBit( pCexNew->pData, iBitNew + k );
+ if ( Abc_InfoHasBit( pCexOld->pData, iBitOld + Entry ) )
+ Abc_InfoSetBit( pCexNew->pData, iBitNew + k );
}
iBitOld += Saig_ManPiNum(p);
iBitNew += Saig_ManPiNum(pInit);
diff --git a/src/aig/bbr/bbr_.c b/src/proof/bbr/bbr_.c
index df934f7d..df934f7d 100644
--- a/src/aig/bbr/bbr_.c
+++ b/src/proof/bbr/bbr_.c
diff --git a/src/proof/bbr/module.make b/src/proof/bbr/module.make
new file mode 100644
index 00000000..11ba768e
--- /dev/null
+++ b/src/proof/bbr/module.make
@@ -0,0 +1,4 @@
+SRC += src/proof/bbr/bbrCex.c \
+ src/proof/bbr/bbrImage.c \
+ src/proof/bbr/bbrNtbdd.c \
+ src/proof/bbr/bbrReach.c
diff --git a/src/aig/cec/cec.c b/src/proof/cec/cec.c
index 6968a599..6968a599 100644
--- a/src/aig/cec/cec.c
+++ b/src/proof/cec/cec.c
diff --git a/src/aig/cec/cec.h b/src/proof/cec/cec.h
index 9e2237d7..10b06c28 100644
--- a/src/aig/cec/cec.h
+++ b/src/proof/cec/cec.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __CEC_H__
-#define __CEC_H__
+#ifndef ABC__aig__cec__cec_h
+#define ABC__aig__cec__cec_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/cec/cecCec.c b/src/proof/cec/cecCec.c
index 9fd8a03f..1460ba91 100644
--- a/src/aig/cec/cecCec.c
+++ b/src/proof/cec/cecCec.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "cecInt.h"
-#include "fra.h"
-#include "giaAig.h"
+#include "src/proof/fra/fra.h"
+#include "src/aig/gia/giaAig.h"
ABC_NAMESPACE_IMPL_START
@@ -49,13 +49,13 @@ void Cec_ManTransformPattern( Gia_Man_t * p, int iOut, int * pValues )
int i;
assert( p->pCexComb == NULL );
p->pCexComb = (Abc_Cex_t *)ABC_CALLOC( char,
- sizeof(Abc_Cex_t) + sizeof(unsigned) * Gia_BitWordNum(Gia_ManCiNum(p)) );
+ sizeof(Abc_Cex_t) + sizeof(unsigned) * Abc_BitWordNum(Gia_ManCiNum(p)) );
p->pCexComb->iPo = iOut;
p->pCexComb->nPis = Gia_ManCiNum(p);
p->pCexComb->nBits = Gia_ManCiNum(p);
for ( i = 0; i < Gia_ManCiNum(p); i++ )
if ( pValues[i] )
- Aig_InfoSetBit( p->pCexComb->pData, i );
+ Abc_InfoSetBit( p->pCexComb->pData, i );
}
/**Function*************************************************************
diff --git a/src/aig/cec/cecChoice.c b/src/proof/cec/cecChoice.c
index 076b34a2..3ddb975e 100644
--- a/src/aig/cec/cecChoice.c
+++ b/src/proof/cec/cecChoice.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "cecInt.h"
-#include "giaAig.h"
-#include "dch.h"
+#include "src/aig/gia/giaAig.h"
+#include "src/proof/dch/dch.h"
ABC_NAMESPACE_IMPL_START
@@ -76,7 +76,7 @@ void Cec_ManCombSpecReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
if ( (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
{
Cec_ManCombSpecReduce_rec( pNew, p, pRepr );
- pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
+ pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
return;
}
pObj->Value = Cec_ManCombSpecReal( pNew, p, pObj );
@@ -103,7 +103,7 @@ Gia_Man_t * Cec_ManCombSpecReduce( Gia_Man_t * p, Vec_Int_t ** pvOutputs, int fR
Gia_ManSetPhase( p );
Gia_ManFillValue( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
@@ -117,7 +117,7 @@ Gia_Man_t * Cec_ManCombSpecReduce( Gia_Man_t * p, Vec_Int_t ** pvOutputs, int fR
if ( Gia_ObjIsConst( p, i ) )
{
iObjNew = Cec_ManCombSpecReal( pNew, p, pObj );
- iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pObj) );
+ iObjNew = Abc_LitNotCond( iObjNew, Gia_ObjPhase(pObj) );
if ( iObjNew != 0 )
{
Vec_IntPush( *pvOutputs, 0 );
@@ -132,26 +132,26 @@ Gia_Man_t * Cec_ManCombSpecReduce( Gia_Man_t * p, Vec_Int_t ** pvOutputs, int fR
{
iPrevNew = Cec_ManCombSpecReal( pNew, p, Gia_ManObj(p, iPrev) );
iObjNew = Cec_ManCombSpecReal( pNew, p, Gia_ManObj(p, iObj) );
- iPrevNew = Gia_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
- iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
+ iPrevNew = Abc_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
+ iObjNew = Abc_LitNotCond( iObjNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
if ( iPrevNew != iObjNew && iPrevNew != 0 && iObjNew != 1 )
{
Vec_IntPush( *pvOutputs, iPrev );
Vec_IntPush( *pvOutputs, iObj );
- Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Gia_LitNot(iObjNew)) );
+ Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Abc_LitNot(iObjNew)) );
}
iPrev = iObj;
}
iObj = i;
iPrevNew = Cec_ManCombSpecReal( pNew, p, Gia_ManObj(p, iPrev) );
iObjNew = Cec_ManCombSpecReal( pNew, p, Gia_ManObj(p, iObj) );
- iPrevNew = Gia_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
- iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
+ iPrevNew = Abc_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
+ iObjNew = Abc_LitNotCond( iObjNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
if ( iPrevNew != iObjNew && iPrevNew != 0 && iObjNew != 1 )
{
Vec_IntPush( *pvOutputs, iPrev );
Vec_IntPush( *pvOutputs, iObj );
- Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Gia_LitNot(iObjNew)) );
+ Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Abc_LitNot(iObjNew)) );
}
}
}
@@ -165,7 +165,7 @@ Gia_Man_t * Cec_ManCombSpecReduce( Gia_Man_t * p, Vec_Int_t ** pvOutputs, int fR
continue;
iPrevNew = Gia_ObjIsConst(p, i)? 0 : Cec_ManCombSpecReal( pNew, p, pRepr );
iObjNew = Cec_ManCombSpecReal( pNew, p, pObj );
- iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
+ iObjNew = Abc_LitNotCond( iObjNew, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
if ( iPrevNew != iObjNew )
{
Vec_IntPush( *pvOutputs, Gia_ObjId(p, pRepr) );
diff --git a/src/aig/cec/cecClass.c b/src/proof/cec/cecClass.c
index b6118038..46e585a9 100644
--- a/src/aig/cec/cecClass.c
+++ b/src/proof/cec/cecClass.c
@@ -470,7 +470,7 @@ void Cec_ManSimProcessRefined( Cec_ManSim_t * p, Vec_Int_t * vRefined )
int * pTable, nTableSize, i, k, Key;
if ( Vec_IntSize(vRefined) == 0 )
return;
- nTableSize = Gia_PrimeCudd( 100 + Vec_IntSize(vRefined) / 3 );
+ nTableSize = Abc_PrimeCudd( 100 + Vec_IntSize(vRefined) / 3 );
pTable = ABC_CALLOC( int, nTableSize );
Vec_IntForEachEntry( vRefined, i, k )
{
@@ -522,15 +522,15 @@ void Cec_ManSimSavePattern( Cec_ManSim_t * p, int iPat )
assert( p->pCexComb == NULL );
assert( iPat >= 0 && iPat < 32 * p->nWords );
p->pCexComb = (Abc_Cex_t *)ABC_CALLOC( char,
- sizeof(Abc_Cex_t) + sizeof(unsigned) * Gia_BitWordNum(Gia_ManCiNum(p->pAig)) );
+ sizeof(Abc_Cex_t) + sizeof(unsigned) * Abc_BitWordNum(Gia_ManCiNum(p->pAig)) );
p->pCexComb->iPo = p->iOut;
p->pCexComb->nPis = Gia_ManCiNum(p->pAig);
p->pCexComb->nBits = Gia_ManCiNum(p->pAig);
for ( i = 0; i < Gia_ManCiNum(p->pAig); i++ )
{
pInfo = (unsigned *)Vec_PtrEntry( p->vCiSimInfo, i );
- if ( Gia_InfoHasBit( pInfo, iPat ) )
- Gia_InfoSetBit( p->pCexComb->pData, i );
+ if ( Abc_InfoHasBit( pInfo, iPat ) )
+ Abc_InfoSetBit( p->pCexComb->pData, i );
}
}
@@ -563,8 +563,8 @@ void Cec_ManSimFindBestPattern( Cec_ManSim_t * p )
for ( i = 0; i < Gia_ManRegNum(p->pAig); i++ )
{
pInfo = (unsigned *)Vec_PtrEntry( p->vCiSimInfo, Gia_ManPiNum(p->pAig) + i );
- if ( Gia_InfoHasBit(p->pBestState->pData, i) != Gia_InfoHasBit(pInfo, iPatBest) )
- Gia_InfoXorBit( p->pBestState->pData, i );
+ if ( Abc_InfoHasBit(p->pBestState->pData, i) != Abc_InfoHasBit(pInfo, iPatBest) )
+ Abc_InfoXorBit( p->pBestState->pData, i );
}
p->pBestState->iPo = ScoreBest;
}
diff --git a/src/aig/cec/cecCore.c b/src/proof/cec/cecCore.c
index bf41304b..bf41304b 100644
--- a/src/aig/cec/cecCore.c
+++ b/src/proof/cec/cecCore.c
diff --git a/src/aig/cec/cecCorr.c b/src/proof/cec/cecCorr.c
index 59d091d8..6f3ce785 100644
--- a/src/aig/cec/cecCorr.c
+++ b/src/proof/cec/cecCorr.c
@@ -83,7 +83,7 @@ void Gia_ManCorrSpecReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
if ( f >= nPrefix && (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
{
Gia_ManCorrSpecReduce_rec( pNew, p, pRepr, f, nPrefix );
- iLitNew = Gia_LitNotCond( Gia_ObjCopyF(p, f, pRepr), Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
+ iLitNew = Abc_LitNotCond( Gia_ObjCopyF(p, f, pRepr), Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
Gia_ObjSetCopyF( p, f, pObj, iLitNew );
return;
}
@@ -115,7 +115,7 @@ Gia_Man_t * Gia_ManCorrSpecReduce( Gia_Man_t * p, int nFrames, int fScorr, Vec_I
p->pCopies = ABC_FALLOC( int, (nFrames+fScorr)*Gia_ManObjNum(p) );
Gia_ManSetPhase( p );
pNew = Gia_ManStart( nFrames * Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
Gia_ObjSetCopyF( p, 0, Gia_ManConst0(p), 0 );
Gia_ManForEachRo( p, pObj, i )
@@ -138,7 +138,7 @@ Gia_Man_t * Gia_ManCorrSpecReduce( Gia_Man_t * p, int nFrames, int fScorr, Vec_I
if ( Gia_ObjIsConst( p, i ) )
{
iObjNew = Gia_ManCorrSpecReal( pNew, p, pObj, nFrames, 0 );
- iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pObj) );
+ iObjNew = Abc_LitNotCond( iObjNew, Gia_ObjPhase(pObj) );
if ( iObjNew != 0 )
{
Vec_IntPush( *pvOutputs, 0 );
@@ -153,26 +153,26 @@ Gia_Man_t * Gia_ManCorrSpecReduce( Gia_Man_t * p, int nFrames, int fScorr, Vec_I
{
iPrevNew = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iPrev), nFrames, 0 );
iObjNew = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iObj), nFrames, 0 );
- iPrevNew = Gia_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
- iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
+ iPrevNew = Abc_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
+ iObjNew = Abc_LitNotCond( iObjNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
if ( iPrevNew != iObjNew && iPrevNew != 0 && iObjNew != 1 )
{
Vec_IntPush( *pvOutputs, iPrev );
Vec_IntPush( *pvOutputs, iObj );
- Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Gia_LitNot(iObjNew)) );
+ Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Abc_LitNot(iObjNew)) );
}
iPrev = iObj;
}
iObj = i;
iPrevNew = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iPrev), nFrames, 0 );
iObjNew = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iObj), nFrames, 0 );
- iPrevNew = Gia_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
- iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
+ iPrevNew = Abc_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
+ iObjNew = Abc_LitNotCond( iObjNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
if ( iPrevNew != iObjNew && iPrevNew != 0 && iObjNew != 1 )
{
Vec_IntPush( *pvOutputs, iPrev );
Vec_IntPush( *pvOutputs, iObj );
- Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Gia_LitNot(iObjNew)) );
+ Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Abc_LitNot(iObjNew)) );
}
}
}
@@ -186,7 +186,7 @@ Gia_Man_t * Gia_ManCorrSpecReduce( Gia_Man_t * p, int nFrames, int fScorr, Vec_I
continue;
iPrevNew = Gia_ObjIsConst(p, i)? 0 : Gia_ManCorrSpecReal( pNew, p, pRepr, nFrames, 0 );
iObjNew = Gia_ManCorrSpecReal( pNew, p, pObj, nFrames, 0 );
- iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
+ iObjNew = Abc_LitNotCond( iObjNew, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
if ( iPrevNew != iObjNew )
{
Vec_IntPush( *pvOutputs, Gia_ObjId(p, pRepr) );
@@ -231,7 +231,7 @@ Gia_Man_t * Gia_ManCorrSpecReduceInit( Gia_Man_t * p, int nFrames, int nPrefix,
p->pCopies = ABC_FALLOC( int, (nFrames+nPrefix+fScorr)*Gia_ManObjNum(p) );
Gia_ManSetPhase( p );
pNew = Gia_ManStart( (nFrames+nPrefix) * Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManHashAlloc( pNew );
Gia_ManForEachRo( p, pObj, i )
{
@@ -255,7 +255,7 @@ Gia_Man_t * Gia_ManCorrSpecReduceInit( Gia_Man_t * p, int nFrames, int nPrefix,
continue;
iPrevNew = Gia_ObjIsConst(p, i)? 0 : Gia_ManCorrSpecReal( pNew, p, pRepr, f, nPrefix );
iObjNew = Gia_ManCorrSpecReal( pNew, p, pObj, f, nPrefix );
- iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
+ iObjNew = Abc_LitNotCond( iObjNew, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
if ( iPrevNew != iObjNew )
{
Vec_IntPush( *pvOutputs, Gia_ObjId(p, pRepr) );
@@ -425,19 +425,19 @@ int Cec_ManLoadCounterExamplesTry( Vec_Ptr_t * vInfo, Vec_Ptr_t * vPres, int iBi
int i;
for ( i = 0; i < nLits; i++ )
{
- pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
- pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
- if ( Gia_InfoHasBit( pPres, iBit ) &&
- Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
+ pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+ pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+ if ( Abc_InfoHasBit( pPres, iBit ) &&
+ Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
return 0;
}
for ( i = 0; i < nLits; i++ )
{
- pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
- pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
- Gia_InfoSetBit( pPres, iBit );
- if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
- Gia_InfoXorBit( pInfo, iBit );
+ pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+ pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+ Abc_InfoSetBit( pPres, iBit );
+ if ( Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
+ Abc_InfoXorBit( pInfo, iBit );
}
return 1;
}
@@ -479,7 +479,7 @@ int Cec_ManLoadCounterExamples( Vec_Ptr_t * vInfo, Vec_Int_t * vCexStore, int iS
for ( k = 1; k < nBits; k++ )
if ( Cec_ManLoadCounterExamplesTry( vInfo, vPres, k, (int *)Vec_IntArray(vPat), Vec_IntSize(vPat) ) )
break;
- kMax = ABC_MAX( kMax, k );
+ kMax = Abc_MaxInt( kMax, k );
if ( k == nBits-1 )
break;
}
@@ -518,9 +518,9 @@ int Cec_ManLoadCounterExamples2( Vec_Ptr_t * vInfo, Vec_Int_t * vCexStore, int i
for ( k = 0; k < nLits; k++ )
{
iLit = Vec_IntEntry( vCexStore, iStart++ );
- pInfo = (unsigned *)Vec_PtrEntry( vInfo, Gia_Lit2Var(iLit) );
- if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(iLit) )
- Gia_InfoXorBit( pInfo, iBit );
+ pInfo = (unsigned *)Vec_PtrEntry( vInfo, Abc_Lit2Var(iLit) );
+ if ( Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(iLit) )
+ Abc_InfoXorBit( pInfo, iBit );
}
if ( ++iBit == nBits )
break;
@@ -663,7 +663,7 @@ void Gia_ManCorrReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj )
if ( (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
{
Gia_ManCorrReduce_rec( pNew, p, pRepr );
- pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+ pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
return;
}
if ( ~pObj->Value )
@@ -692,7 +692,7 @@ Gia_Man_t * Gia_ManCorrReduce( Gia_Man_t * p )
int i;
Gia_ManSetPhase( p );
pNew = Gia_ManStart( Gia_ManObjNum(p) );
- pNew->pName = Gia_UtilStrsav( p->pName );
+ pNew->pName = Abc_UtilStrsav( p->pName );
Gia_ManFillValue( p );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
@@ -999,11 +999,11 @@ unsigned * Cec_ManComputeInitState( Gia_Man_t * pAig, int nFrames )
Gia_ManForEachRiRo( pAig, pObjRi, pObjRo, i )
pObjRo->fMark1 = pObjRi->fMark1;
}
- pInitState = ABC_CALLOC( unsigned, Gia_BitWordNum(Gia_ManRegNum(pAig)) );
+ pInitState = ABC_CALLOC( unsigned, Abc_BitWordNum(Gia_ManRegNum(pAig)) );
Gia_ManForEachRo( pAig, pObj, i )
{
if ( pObj->fMark1 )
- Gia_InfoSetBit( pInitState, i );
+ Abc_InfoSetBit( pInitState, i );
// Abc_Print( 1, "%d", pObj->fMark1 );
}
// Abc_Print( 1, "\n" );
@@ -1078,7 +1078,7 @@ Gia_Man_t * Cec_ManLSCorrespondence( Gia_Man_t * pAig, Cec_ParCor_t * pPars )
pAig->pNexts = pTemp->pNexts; pTemp->pNexts = NULL;
// perform additional BMC
pPars->fUseCSat = 0;
- pPars->nBTLimit = ABC_MAX( pPars->nBTLimit, 1000 );
+ pPars->nBTLimit = Abc_MaxInt( pPars->nBTLimit, 1000 );
Cec_ManLSCorrespondenceBmc( pAig, pPars, pPars->nPrefix );
/*
// transfer the class info back
diff --git a/src/aig/cec/cecCorr_updated.c b/src/proof/cec/cecCorr_updated.c
index 8ce1bd74..1db30705 100644
--- a/src/aig/cec/cecCorr_updated.c
+++ b/src/proof/cec/cecCorr_updated.c
@@ -488,7 +488,7 @@ int Cec_ManLoadCounterExamples( Vec_Ptr_t * vInfo, Vec_Int_t * vCexStore, int iS
for ( k = 1; k < nBits; k++ )
if ( Cec_ManLoadCounterExamplesTry( vInfo, vPres, k, (int *)Vec_IntArray(vPat), Vec_IntSize(vPat) ) )
break;
- kMax = ABC_MAX( kMax, k );
+ kMax = Abc_MaxInt( kMax, k );
if ( k == nBits-1 )
break;
}
diff --git a/src/aig/cec/cecInt.h b/src/proof/cec/cecInt.h
index 6216eae2..371dedda 100644
--- a/src/aig/cec/cecInt.h
+++ b/src/proof/cec/cecInt.h
@@ -18,17 +18,17 @@
***********************************************************************/
-#ifndef __CEC_INT_H__
-#define __CEC_INT_H__
+#ifndef ABC__aig__cec__cecInt_h
+#define ABC__aig__cec__cecInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "satSolver.h"
-#include "bar.h"
-#include "gia.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/misc/bar/bar.h"
+#include "src/aig/gia/gia.h"
#include "cec.h"
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/cec/cecIso.c b/src/proof/cec/cecIso.c
index ec237fe5..f1ca2ff7 100644
--- a/src/aig/cec/cecIso.c
+++ b/src/proof/cec/cecIso.c
@@ -317,7 +317,7 @@ int * Cec_ManDetectIsomorphism( Gia_Man_t * p )
// start simulation info
pStore = ABC_ALLOC( unsigned, Gia_ManObjNum(p) * nWords );
// simulate and create table
- nTableSize = Gia_PrimeCudd( 100 + Gia_ManObjNum(p)/2 );
+ nTableSize = Abc_PrimeCudd( 100 + Gia_ManObjNum(p)/2 );
pTable = ABC_CALLOC( int, nTableSize );
Gia_ManCleanValue( p );
Gia_ManForEachObj1( p, pObj, i )
diff --git a/src/aig/cec/cecMan.c b/src/proof/cec/cecMan.c
index f03ec701..f03ec701 100644
--- a/src/aig/cec/cecMan.c
+++ b/src/proof/cec/cecMan.c
diff --git a/src/aig/cec/cecPat.c b/src/proof/cec/cecPat.c
index 82c12ea9..cb1dae46 100644
--- a/src/aig/cec/cecPat.c
+++ b/src/proof/cec/cecPat.c
@@ -174,7 +174,7 @@ void Cec_ManPatComputePattern1_rec( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t *
Gia_ObjSetTravIdCurrent(p, pObj);
if ( Gia_ObjIsCi(pObj) )
{
- Vec_IntPush( vPat, Gia_Var2Lit( Gia_ObjCioId(pObj), pObj->fMark1==0 ) );
+ Vec_IntPush( vPat, Abc_Var2Lit( Gia_ObjCioId(pObj), pObj->fMark1==0 ) );
return;
}
assert( Gia_ObjIsAnd(pObj) );
@@ -212,7 +212,7 @@ void Cec_ManPatComputePattern2_rec( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t *
Gia_ObjSetTravIdCurrent(p, pObj);
if ( Gia_ObjIsCi(pObj) )
{
- Vec_IntPush( vPat, Gia_Var2Lit( Gia_ObjCioId(pObj), pObj->fMark1==0 ) );
+ Vec_IntPush( vPat, Abc_Var2Lit( Gia_ObjCioId(pObj), pObj->fMark1==0 ) );
return;
}
assert( Gia_ObjIsAnd(pObj) );
@@ -282,8 +282,8 @@ void Cec_ManPatVerifyPattern( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vPat
Gia_ManIncrementTravId( p );
Vec_IntForEachEntry( vPat, Value, i )
{
- pTemp = Gia_ManCi( p, Gia_Lit2Var(Value) );
-// assert( Gia_LitIsCompl(Value) != (int)pTemp->fMark1 );
+ pTemp = Gia_ManCi( p, Abc_Lit2Var(Value) );
+// assert( Abc_LitIsCompl(Value) != (int)pTemp->fMark1 );
if ( pTemp->fMark1 )
{
pTemp->fMark0 = 0;
@@ -415,19 +415,19 @@ int Cec_ManPatCollectTry( Vec_Ptr_t * vInfo, Vec_Ptr_t * vPres, int iBit, int *
int i;
for ( i = 0; i < nLits; i++ )
{
- pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
- pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
- if ( Gia_InfoHasBit( pPres, iBit ) &&
- Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
+ pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+ pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+ if ( Abc_InfoHasBit( pPres, iBit ) &&
+ Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
return 0;
}
for ( i = 0; i < nLits; i++ )
{
- pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
- pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
- Gia_InfoSetBit( pPres, iBit );
- if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
- Gia_InfoXorBit( pInfo, iBit );
+ pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+ pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+ Abc_InfoSetBit( pPres, iBit );
+ if ( Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
+ Abc_InfoXorBit( pInfo, iBit );
}
return 1;
}
@@ -463,7 +463,7 @@ Vec_Ptr_t * Cec_ManPatCollectPatterns( Cec_ManPat_t * pMan, int nInputs, int nW
for ( k = 1; k < nBits; k++, k += ((k % (32 * nWordsInit)) == 0) )
if ( Cec_ManPatCollectTry( vInfo, vPres, k, (int *)Vec_IntArray(vPat), Vec_IntSize(vPat) ) )
break;
- kMax = ABC_MAX( kMax, k );
+ kMax = Abc_MaxInt( kMax, k );
if ( k == nBits-1 )
{
Vec_PtrReallocSimInfo( vInfo );
@@ -541,7 +541,7 @@ Vec_Ptr_t * Cec_ManPatPackPatterns( Vec_Int_t * vCexStore, int nInputs, int nReg
// RetValue = Cec_ManPatCollectTry( vInfo, vPres, k, (int *)Vec_IntArray(vPat), Vec_IntSize(vPat) );
// assert( RetValue == 1 );
- kMax = ABC_MAX( kMax, k );
+ kMax = Abc_MaxInt( kMax, k );
if ( k == nBits-1 )
{
Vec_PtrReallocSimInfo( vInfo );
diff --git a/src/aig/cec/cecSeq.c b/src/proof/cec/cecSeq.c
index dd561971..21ed8656 100644
--- a/src/aig/cec/cecSeq.c
+++ b/src/proof/cec/cecSeq.c
@@ -56,12 +56,12 @@ void Cec_ManSeqDeriveInfoFromCex( Vec_Ptr_t * vInfo, Gia_Man_t * pAig, Abc_Cex_t
{
pInfo = (unsigned *)Vec_PtrEntry( vInfo, k );
for ( w = 0; w < nWords; w++ )
- pInfo[w] = Gia_InfoHasBit( pCex->pData, k )? ~0 : 0;
+ pInfo[w] = Abc_InfoHasBit( pCex->pData, k )? ~0 : 0;
}
*/
// print warning about register values
for ( k = 0; k < pCex->nRegs; k++ )
- if ( Gia_InfoHasBit( pCex->pData, k ) )
+ if ( Abc_InfoHasBit( pCex->pData, k ) )
break;
if ( k < pCex->nRegs )
Abc_Print( 0, "The CEX has flop values different from 0, but they are currently not used by \"resim\".\n" );
@@ -79,7 +79,7 @@ void Cec_ManSeqDeriveInfoFromCex( Vec_Ptr_t * vInfo, Gia_Man_t * pAig, Abc_Cex_t
for ( w = 0; w < nWords; w++ )
pInfo[w] = Gia_ManRandom(0);
// set simulation pattern and make sure it is second (first will be erased during simulation)
- pInfo[0] = (pInfo[0] << 1) | Gia_InfoHasBit( pCex->pData, i );
+ pInfo[0] = (pInfo[0] << 1) | Abc_InfoHasBit( pCex->pData, i );
pInfo[0] <<= 1;
}
for ( ; k < Vec_PtrSize(vInfo); k++ )
@@ -112,7 +112,7 @@ void Cec_ManSeqDeriveInfoInitRandom( Vec_Ptr_t * vInfo, Gia_Man_t * pAig, Abc_Ce
{
pInfo = (unsigned *)Vec_PtrEntry( vInfo, k );
for ( w = 0; w < nWords; w++ )
- pInfo[w] = (pCex && Gia_InfoHasBit(pCex->pData, k))? ~0 : 0;
+ pInfo[w] = (pCex && Abc_InfoHasBit(pCex->pData, k))? ~0 : 0;
}
for ( ; k < Vec_PtrSize(vInfo); k++ )
diff --git a/src/aig/cec/cecSim.c b/src/proof/cec/cecSim.c
index 92f8fc2e..92f8fc2e 100644
--- a/src/aig/cec/cecSim.c
+++ b/src/proof/cec/cecSim.c
diff --git a/src/aig/cec/cecSolve.c b/src/proof/cec/cecSolve.c
index e86c2f35..bd7202e4 100644
--- a/src/aig/cec/cecSolve.c
+++ b/src/proof/cec/cecSolve.c
@@ -769,10 +769,10 @@ void Cec_ManSatSolveSeq_rec( Cec_ManSat_t * pSat, Gia_Man_t * p, Gia_Obj_t * pOb
if ( Gia_ObjIsCi(pObj) )
{
unsigned * pInfo = (unsigned *)Vec_PtrEntry( vInfo, nRegs + Gia_ObjCioId(pObj) );
- if ( Cec_ObjSatVarValue( pSat, pObj ) != Gia_InfoHasBit( pInfo, iPat ) )
- Gia_InfoXorBit( pInfo, iPat );
+ if ( Cec_ObjSatVarValue( pSat, pObj ) != Abc_InfoHasBit( pInfo, iPat ) )
+ Abc_InfoXorBit( pInfo, iPat );
pSat->nCexLits++;
-// Vec_IntPush( pSat->vCex, Gia_Var2Lit( Gia_ObjCioId(pObj), !Cec_ObjSatVarValue(pSat, pObj) ) );
+// Vec_IntPush( pSat->vCex, Abc_Var2Lit( Gia_ObjCioId(pObj), !Cec_ObjSatVarValue(pSat, pObj) ) );
return;
}
assert( Gia_ObjIsAnd(pObj) );
@@ -910,7 +910,7 @@ void Cec_ManSatSolveMiter_rec( Cec_ManSat_t * pSat, Gia_Man_t * p, Gia_Obj_t * p
if ( Gia_ObjIsCi(pObj) )
{
pSat->nCexLits++;
- Vec_IntPush( pSat->vCex, Gia_Var2Lit( Gia_ObjCioId(pObj), !Cec_ObjSatVarValue(pSat, pObj) ) );
+ Vec_IntPush( pSat->vCex, Abc_Var2Lit( Gia_ObjCioId(pObj), !Cec_ObjSatVarValue(pSat, pObj) ) );
return;
}
assert( Gia_ObjIsAnd(pObj) );
diff --git a/src/aig/cec/cecSweep.c b/src/proof/cec/cecSweep.c
index 7d59515e..4523810e 100644
--- a/src/aig/cec/cecSweep.c
+++ b/src/proof/cec/cecSweep.c
@@ -53,7 +53,7 @@ Gia_Man_t * Cec_ManFraSpecReduction( Cec_ManFra_t * p )
if ( p->pPars->nLevelMax )
Gia_ManLevelNum( p->pAig );
pNew = Gia_ManStart( Gia_ManObjNum(p->pAig) );
- pNew->pName = Gia_UtilStrsav( p->pAig->pName );
+ pNew->pName = Abc_UtilStrsav( p->pAig->pName );
Gia_ManHashAlloc( pNew );
piCopies = ABC_FALLOC( int, Gia_ManObjNum(p->pAig) );
pDepths = ABC_CALLOC( int, Gia_ManObjNum(p->pAig) );
@@ -70,17 +70,17 @@ Gia_Man_t * Cec_ManFraSpecReduction( Cec_ManFra_t * p )
if ( piCopies[Gia_ObjFaninId0(pObj,i)] == -1 ||
piCopies[Gia_ObjFaninId1(pObj,i)] == -1 )
continue;
- iRes0 = Gia_LitNotCond( piCopies[Gia_ObjFaninId0(pObj,i)], Gia_ObjFaninC0(pObj) );
- iRes1 = Gia_LitNotCond( piCopies[Gia_ObjFaninId1(pObj,i)], Gia_ObjFaninC1(pObj) );
+ iRes0 = Abc_LitNotCond( piCopies[Gia_ObjFaninId0(pObj,i)], Gia_ObjFaninC0(pObj) );
+ iRes1 = Abc_LitNotCond( piCopies[Gia_ObjFaninId1(pObj,i)], Gia_ObjFaninC1(pObj) );
iNode = piCopies[i] = Gia_ManHashAnd( pNew, iRes0, iRes1 );
- pDepths[i] = ABC_MAX( pDepths[Gia_ObjFaninId0(pObj,i)], pDepths[Gia_ObjFaninId1(pObj,i)] );
+ pDepths[i] = Abc_MaxInt( pDepths[Gia_ObjFaninId0(pObj,i)], pDepths[Gia_ObjFaninId1(pObj,i)] );
if ( Gia_ObjRepr(p->pAig, i) == GIA_VOID || Gia_ObjFailed(p->pAig, i) )
continue;
assert( Gia_ObjRepr(p->pAig, i) < i );
iRepr = piCopies[Gia_ObjRepr(p->pAig, i)];
if ( iRepr == -1 )
continue;
- if ( Gia_LitRegular(iNode) == Gia_LitRegular(iRepr) )
+ if ( Abc_LitRegular(iNode) == Abc_LitRegular(iRepr) )
continue;
if ( p->pPars->nLevelMax &&
(Gia_ObjLevel(p->pAig, pObj) > p->pPars->nLevelMax ||
@@ -103,7 +103,7 @@ Gia_Man_t * Cec_ManFraSpecReduction( Cec_ManFra_t * p )
}
pRepr = Gia_ManObj( p->pAig, Gia_ObjRepr(p->pAig, i) );
fCompl = Gia_ObjPhaseReal(pObj) ^ Gia_ObjPhaseReal(pRepr);
- piCopies[i] = Gia_LitNotCond( iRepr, fCompl );
+ piCopies[i] = Abc_LitNotCond( iRepr, fCompl );
if ( Gia_ObjProved(p->pAig, i) )
continue;
// produce speculative miter
@@ -112,7 +112,7 @@ Gia_Man_t * Cec_ManFraSpecReduction( Cec_ManFra_t * p )
Vec_IntPush( p->vXorNodes, Gia_ObjRepr(p->pAig, i) );
Vec_IntPush( p->vXorNodes, i );
// add to the depth of this node
- pDepths[i] = 1 + ABC_MAX( pDepths[i], pDepths[Gia_ObjRepr(p->pAig, i)] );
+ pDepths[i] = 1 + Abc_MaxInt( pDepths[i], pDepths[Gia_ObjRepr(p->pAig, i)] );
if ( p->pPars->nDepthMax && pDepths[i] >= p->pPars->nDepthMax )
piCopies[i] = -1;
}
diff --git a/src/aig/cec/cecSynth.c b/src/proof/cec/cecSynth.c
index 52b50a43..21470dd4 100644
--- a/src/aig/cec/cecSynth.c
+++ b/src/proof/cec/cecSynth.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "cecInt.h"
-#include "giaAig.h"
+#include "src/aig/gia/giaAig.h"
ABC_NAMESPACE_IMPL_START
@@ -170,9 +170,9 @@ Gia_Man_t * Gia_ManRegCreatePart( Gia_Man_t * p, Vec_Int_t * vPart, int * pnCoun
{
// pObjNew = Aig_Regular(pObj->pData);
// pMapBack[pObjNew->Id] = pObj->Id;
- assert( Gia_Lit2Var(Gia_ObjValue(pObj)) >= 0 );
- assert( Gia_Lit2Var(Gia_ObjValue(pObj)) < Gia_ManObjNum(pNew) );
- pMapBack[ Gia_Lit2Var(Gia_ObjValue(pObj)) ] = Gia_ObjId(p, pObj);
+ assert( Abc_Lit2Var(Gia_ObjValue(pObj)) >= 0 );
+ assert( Abc_Lit2Var(Gia_ObjValue(pObj)) < Gia_ManObjNum(pNew) );
+ pMapBack[ Abc_Lit2Var(Gia_ObjValue(pObj)) ] = Gia_ObjId(p, pObj);
}
// map register outputs
Vec_IntForEachEntry( vPart, iOut, i )
@@ -180,9 +180,9 @@ Gia_Man_t * Gia_ManRegCreatePart( Gia_Man_t * p, Vec_Int_t * vPart, int * pnCoun
pObj = Gia_ManCi(p, Gia_ManPiNum(p)+iOut);
// pObjNew = pObj->pData;
// pMapBack[pObjNew->Id] = pObj->Id;
- assert( Gia_Lit2Var(Gia_ObjValue(pObj)) >= 0 );
- assert( Gia_Lit2Var(Gia_ObjValue(pObj)) < Gia_ManObjNum(pNew) );
- pMapBack[ Gia_Lit2Var(Gia_ObjValue(pObj)) ] = Gia_ObjId(p, pObj);
+ assert( Abc_Lit2Var(Gia_ObjValue(pObj)) >= 0 );
+ assert( Abc_Lit2Var(Gia_ObjValue(pObj)) < Gia_ManObjNum(pNew) );
+ pMapBack[ Abc_Lit2Var(Gia_ObjValue(pObj)) ] = Gia_ObjId(p, pObj);
}
*ppMapBack = pMapBack;
}
diff --git a/src/proof/cec/module.make b/src/proof/cec/module.make
new file mode 100644
index 00000000..bac6e9bc
--- /dev/null
+++ b/src/proof/cec/module.make
@@ -0,0 +1,13 @@
+SRC += src/proof/cec/cecCec.c \
+ src/proof/cec/cecChoice.c \
+ src/proof/cec/cecClass.c \
+ src/proof/cec/cecCore.c \
+ src/proof/cec/cecCorr.c \
+ src/proof/cec/cecIso.c \
+ src/proof/cec/cecMan.c \
+ src/proof/cec/cecPat.c \
+ src/proof/cec/cecSeq.c \
+ src/proof/cec/cecSim.c \
+ src/proof/cec/cecSolve.c \
+ src/proof/cec/cecSynth.c \
+ src/proof/cec/cecSweep.c
diff --git a/src/aig/dch/dch.h b/src/proof/dch/dch.h
index 69f340e5..731eb776 100644
--- a/src/aig/dch/dch.h
+++ b/src/proof/dch/dch.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __DCH_H__
-#define __DCH_H__
+#ifndef ABC__aig__dch__dch_h
+#define ABC__aig__dch__dch_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/dch/dchAig.c b/src/proof/dch/dchAig.c
index 91a00c63..91a00c63 100644
--- a/src/aig/dch/dchAig.c
+++ b/src/proof/dch/dchAig.c
diff --git a/src/aig/dch/dchChoice.c b/src/proof/dch/dchChoice.c
index 1772f8aa..1772f8aa 100644
--- a/src/aig/dch/dchChoice.c
+++ b/src/proof/dch/dchChoice.c
diff --git a/src/aig/dch/dchClass.c b/src/proof/dch/dchClass.c
index 83a3bc2e..24476309 100644
--- a/src/aig/dch/dchClass.c
+++ b/src/proof/dch/dchClass.c
@@ -340,7 +340,7 @@ void Dch_ClassesPrepare( Dch_Cla_t * p, int fLatchCorr, int nMaxLevs )
int i, k, nTableSize, nNodes, iEntry, nEntries, nEntries2;
// allocate the hash table hashing simulation info into nodes
- nTableSize = Aig_PrimeCudd( Aig_ManObjNumMax(p->pAig)/4 );
+ nTableSize = Abc_PrimeCudd( Aig_ManObjNumMax(p->pAig)/4 );
ppTable = ABC_CALLOC( Aig_Obj_t *, nTableSize );
ppNexts = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) );
@@ -547,7 +547,7 @@ void Dch_ClassesCollectConst1Group( Dch_Cla_t * p, Aig_Obj_t * pObj, int nNodes,
{
int i, Limit;
Vec_PtrClear( vRoots );
- Limit = ABC_MIN( pObj->Id + nNodes, Aig_ManObjNumMax(p->pAig) );
+ Limit = Abc_MinInt( pObj->Id + nNodes, Aig_ManObjNumMax(p->pAig) );
for ( i = pObj->Id; i < Limit; i++ )
{
pObj = Aig_ManObj( p->pAig, i );
diff --git a/src/aig/dch/dchCnf.c b/src/proof/dch/dchCnf.c
index 4175a123..4175a123 100644
--- a/src/aig/dch/dchCnf.c
+++ b/src/proof/dch/dchCnf.c
diff --git a/src/aig/dch/dchCore.c b/src/proof/dch/dchCore.c
index bc78682b..bc78682b 100644
--- a/src/aig/dch/dchCore.c
+++ b/src/proof/dch/dchCore.c
diff --git a/src/aig/dch/dchInt.h b/src/proof/dch/dchInt.h
index 6072d97b..c9f2f4f6 100644
--- a/src/aig/dch/dchInt.h
+++ b/src/proof/dch/dchInt.h
@@ -18,16 +18,16 @@
***********************************************************************/
-#ifndef __DCH_INT_H__
-#define __DCH_INT_H__
+#ifndef ABC__aig__dch__dchInt_h
+#define ABC__aig__dch__dchInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "aig.h"
-#include "satSolver.h"
+#include "src/aig/aig/aig.h"
+#include "src/sat/bsat/satSolver.h"
#include "dch.h"
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/dch/dchMan.c b/src/proof/dch/dchMan.c
index dc856309..dc856309 100644
--- a/src/aig/dch/dchMan.c
+++ b/src/proof/dch/dchMan.c
diff --git a/src/aig/dch/dchSat.c b/src/proof/dch/dchSat.c
index f5e346ef..f5e346ef 100644
--- a/src/aig/dch/dchSat.c
+++ b/src/proof/dch/dchSat.c
diff --git a/src/aig/dch/dchSim.c b/src/proof/dch/dchSim.c
index b2d24761..b2d24761 100644
--- a/src/aig/dch/dchSim.c
+++ b/src/proof/dch/dchSim.c
diff --git a/src/aig/dch/dchSimSat.c b/src/proof/dch/dchSimSat.c
index 325543d1..808e754a 100644
--- a/src/aig/dch/dchSimSat.c
+++ b/src/proof/dch/dchSimSat.c
@@ -186,7 +186,7 @@ void Dch_ManResimulateCex( Dch_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pRepr )
Aig_ObjSetTravIdCurrent( p->pAigTotal, Aig_ManConst1(p->pAigTotal) );
Dch_ManResimulateSolved_rec( p, pObj );
Dch_ManResimulateSolved_rec( p, pRepr );
- p->nConeMax = ABC_MAX( p->nConeMax, p->nConeThis );
+ p->nConeMax = Abc_MaxInt( p->nConeMax, p->nConeThis );
// resimulate the cone of influence of the other nodes
Vec_PtrForEachEntry( Aig_Obj_t *, p->vSimRoots, pRoot, i )
Dch_ManResimulateOther_rec( p, pRoot );
@@ -236,7 +236,7 @@ void Dch_ManResimulateCex2( Dch_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pRepr )
Aig_ObjSetTravIdCurrent( p->pAigTotal, Aig_ManConst1(p->pAigTotal) );
Dch_ManResimulateSolved_rec( p, pObj );
Dch_ManResimulateSolved_rec( p, pRepr );
- p->nConeMax = ABC_MAX( p->nConeMax, p->nConeThis );
+ p->nConeMax = Abc_MaxInt( p->nConeMax, p->nConeThis );
// resimulate the cone of influence of the other nodes
Vec_PtrForEachEntry( Aig_Obj_t *, p->vSimRoots, pRoot, i )
Dch_ManResimulateOther_rec( p, pRoot );
diff --git a/src/aig/dch/dchSweep.c b/src/proof/dch/dchSweep.c
index 4b054be2..a1c4f79b 100644
--- a/src/aig/dch/dchSweep.c
+++ b/src/proof/dch/dchSweep.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "dchInt.h"
-#include "bar.h"
+#include "src/misc/bar/bar.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/proof/dch/module.make b/src/proof/dch/module.make
new file mode 100644
index 00000000..11163cef
--- /dev/null
+++ b/src/proof/dch/module.make
@@ -0,0 +1,10 @@
+SRC += src/proof/dch/dchAig.c \
+ src/proof/dch/dchChoice.c \
+ src/proof/dch/dchClass.c \
+ src/proof/dch/dchCnf.c \
+ src/proof/dch/dchCore.c \
+ src/proof/dch/dchMan.c \
+ src/proof/dch/dchSat.c \
+ src/proof/dch/dchSim.c \
+ src/proof/dch/dchSimSat.c \
+ src/proof/dch/dchSweep.c
diff --git a/src/aig/fra/fra.h b/src/proof/fra/fra.h
index ea362bdf..3e50ff57 100644
--- a/src/aig/fra/fra.h
+++ b/src/proof/fra/fra.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __FRA_H__
-#define __FRA_H__
+#ifndef ABC__aig__fra__fra_h
+#define ABC__aig__fra__fra_h
////////////////////////////////////////////////////////////////////////
@@ -32,11 +32,11 @@
#include <assert.h>
#include <time.h>
-#include "vec.h"
-#include "aig.h"
-#include "dar.h"
-#include "satSolver.h"
-#include "ioa.h"
+#include "src/misc/vec/vec.h"
+#include "src/aig/aig/aig.h"
+#include "src/opt/dar/dar.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/aig/ioa/ioa.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/aig/fra/fraBmc.c b/src/proof/fra/fraBmc.c
index 3907fcdd..7b4db3de 100644
--- a/src/aig/fra/fraBmc.c
+++ b/src/proof/fra/fraBmc.c
@@ -243,8 +243,8 @@ Aig_Man_t * Fra_BmcFrames( Fra_Bmc_t * p, int fKeepPos )
// start the fraig package
pAigFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * p->nFramesAll );
- pAigFrames->pName = Aig_UtilStrsav( p->pAig->pName );
- pAigFrames->pSpec = Aig_UtilStrsav( p->pAig->pSpec );
+ pAigFrames->pName = Abc_UtilStrsav( p->pAig->pName );
+ pAigFrames->pSpec = Abc_UtilStrsav( p->pAig->pSpec );
// create PI nodes for the frames
for ( f = 0; f < p->nFramesAll; f++ )
Bmc_ObjSetFrames( Aig_ManConst1(p->pAig), f, Aig_ManConst1(pAigFrames) );
diff --git a/src/aig/fra/fraCec.c b/src/proof/fra/fraCec.c
index c52f4308..ac11b0bb 100644
--- a/src/aig/fra/fraCec.c
+++ b/src/proof/fra/fraCec.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "fra.h"
-#include "cnf.h"
-#include "satSolver2.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver2.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/fra/fraClass.c b/src/proof/fra/fraClass.c
index 8cf2a54d..67351f6d 100644
--- a/src/aig/fra/fraClass.c
+++ b/src/proof/fra/fraClass.c
@@ -280,7 +280,7 @@ void Fra_ClassesPrepare( Fra_Cla_t * p, int fLatchCorr, int nMaxLevs )
int i, k, nTableSize, nEntries, nNodes, iEntry;
// allocate the hash table hashing simulation info into nodes
- nTableSize = Aig_PrimeCudd( Aig_ManObjNumMax(p->pAig) );
+ nTableSize = Abc_PrimeCudd( Aig_ManObjNumMax(p->pAig) );
ppTable = ABC_FALLOC( Aig_Obj_t *, nTableSize );
ppNexts = ABC_FALLOC( Aig_Obj_t *, nTableSize );
memset( ppTable, 0, sizeof(Aig_Obj_t *) * nTableSize );
@@ -655,7 +655,7 @@ void Fra_ClassesPostprocess( Fra_Cla_t * p )
if ( pRepr == NULL )
continue;
pWeights[i] = Fra_SmlNodeNotEquWeight( pComb, pRepr->Id, pObj->Id );
- WeightMax = ABC_MAX( WeightMax, pWeights[i] );
+ WeightMax = Abc_MaxInt( WeightMax, pWeights[i] );
}
Fra_SmlStop( pComb );
printf( "Before: Const = %6d. Class = %6d. ", Vec_PtrSize(p->vClasses1), Vec_PtrSize(p->vClasses) );
@@ -804,8 +804,8 @@ Aig_Man_t * Fra_ClassesDeriveAig( Fra_Cla_t * p, int nFramesK )
assert( nFramesK > 0 );
// start the fraig package
pManFraig = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * nFramesAll );
- pManFraig->pName = Aig_UtilStrsav( p->pAig->pName );
- pManFraig->pSpec = Aig_UtilStrsav( p->pAig->pSpec );
+ pManFraig->pName = Abc_UtilStrsav( p->pAig->pName );
+ pManFraig->pSpec = Abc_UtilStrsav( p->pAig->pSpec );
// allocate place for the node mapping
ppEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) );
Fra_ObjSetEqu( ppEquivs, Aig_ManConst1(p->pAig), Aig_ManConst1(pManFraig) );
diff --git a/src/aig/fra/fraClau.c b/src/proof/fra/fraClau.c
index 490c73ff..fb87550d 100644
--- a/src/aig/fra/fraClau.c
+++ b/src/proof/fra/fraClau.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "fra.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/fra/fraClaus.c b/src/proof/fra/fraClaus.c
index 9548c166..e71219b5 100644
--- a/src/aig/fra/fraClaus.c
+++ b/src/proof/fra/fraClaus.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "fra.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
ABC_NAMESPACE_IMPL_START
@@ -1033,8 +1033,8 @@ void Fra_ClausSimInfoRecord( Clu_Man_t * p, int * pModel )
{
if ( pModel[i] == l_True )
{
- assert( Aig_InfoHasBit( (unsigned *)Vec_PtrEntry(p->vCexes, i), p->nCexes ) == 0 );
- Aig_InfoSetBit( (unsigned *)Vec_PtrEntry(p->vCexes, i), p->nCexes );
+ assert( Abc_InfoHasBit( (unsigned *)Vec_PtrEntry(p->vCexes, i), p->nCexes ) == 0 );
+ Abc_InfoSetBit( (unsigned *)Vec_PtrEntry(p->vCexes, i), p->nCexes );
}
}
p->nCexes++;
@@ -1075,7 +1075,7 @@ int Fra_ClausSimInfoCheck( Clu_Man_t * p, int * pLits, int nLits )
uWord = ~(unsigned)0;
for ( i = 0; i < nLits; i++ )
uWord &= (lit_sign(pLits[i])? pSims[i][w] : ~pSims[i][w]);
- if ( uWord & Aig_InfoMask( p->nCexes % 32 ) )
+ if ( uWord & Abc_InfoMask( p->nCexes % 32 ) )
return 1;
}
return 0;
diff --git a/src/aig/fra/fraCnf.c b/src/proof/fra/fraCnf.c
index 5021e750..5021e750 100644
--- a/src/aig/fra/fraCnf.c
+++ b/src/proof/fra/fraCnf.c
diff --git a/src/aig/fra/fraCore.c b/src/proof/fra/fraCore.c
index d3b60ab7..d3b60ab7 100644
--- a/src/aig/fra/fraCore.c
+++ b/src/proof/fra/fraCore.c
diff --git a/src/aig/fra/fraHot.c b/src/proof/fra/fraHot.c
index 29c9c33d..29c9c33d 100644
--- a/src/aig/fra/fraHot.c
+++ b/src/proof/fra/fraHot.c
diff --git a/src/aig/fra/fraImp.c b/src/proof/fra/fraImp.c
index 34fa87e5..9877ceaa 100644
--- a/src/aig/fra/fraImp.c
+++ b/src/proof/fra/fraImp.c
@@ -293,8 +293,8 @@ Vec_Int_t * Fra_SmlSelectMaxCost( Vec_Int_t * vImps, int * pCosts, int nCostMax,
***********************************************************************/
int Sml_CompareMaxId( unsigned short * pImp1, unsigned short * pImp2 )
{
- int Max1 = ABC_MAX( pImp1[0], pImp1[1] );
- int Max2 = ABC_MAX( pImp2[0], pImp2[1] );
+ int Max1 = Abc_MaxInt( pImp1[0], pImp1[1] );
+ int Max2 = Abc_MaxInt( pImp2[0], pImp2[1] );
if ( Max1 < Max2 )
return -1;
if ( Max1 > Max2 )
@@ -367,8 +367,8 @@ Vec_Int_t * Fra_ImpDerive( Fra_Man_t * p, int nImpMaxLimit, int nImpUseLimit, in
nImpsCollected++;
Imp = Fra_ImpCreate( *pNodesI, *pNodesK );
pImpCosts[ Vec_IntSize(vImps) ] = Sml_NodeNotImpWeight(pComb, *pNodesI, *pNodesK);
- CostMin = ABC_MIN( CostMin, pImpCosts[ Vec_IntSize(vImps) ] );
- CostMax = ABC_MAX( CostMax, pImpCosts[ Vec_IntSize(vImps) ] );
+ CostMin = Abc_MinInt( CostMin, pImpCosts[ Vec_IntSize(vImps) ] );
+ CostMax = Abc_MaxInt( CostMax, pImpCosts[ Vec_IntSize(vImps) ] );
Vec_IntPush( vImps, Imp );
if ( Vec_IntSize(vImps) == nImpMaxLimit )
goto finish;
@@ -511,7 +511,7 @@ int Fra_ImpCheckForNode( Fra_Man_t * p, Vec_Int_t * vImps, Aig_Obj_t * pNode, in
continue;
Left = Fra_ImpLeft(Imp);
Right = Fra_ImpRight(Imp);
- Max = ABC_MAX( Left, Right );
+ Max = Abc_MaxInt( Left, Right );
assert( Max >= pNode->Id );
if ( Max > pNode->Id )
return i;
diff --git a/src/aig/fra/fraInd.c b/src/proof/fra/fraInd.c
index 2f2d8f2d..1224bab3 100644
--- a/src/aig/fra/fraInd.c
+++ b/src/proof/fra/fraInd.c
@@ -19,9 +19,9 @@
***********************************************************************/
#include "fra.h"
-#include "cnf.h"
-#include "dar.h"
-#include "saig.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/opt/dar/dar.h"
+#include "src/aig/saig/saig.h"
ABC_NAMESPACE_IMPL_START
@@ -137,8 +137,8 @@ Aig_Man_t * Fra_FramesWithClasses( Fra_Man_t * p )
// start the fraig package
pManFraig = Aig_ManStart( Aig_ManObjNumMax(p->pManAig) * p->nFramesAll );
- pManFraig->pName = Aig_UtilStrsav( p->pManAig->pName );
- pManFraig->pSpec = Aig_UtilStrsav( p->pManAig->pSpec );
+ pManFraig->pName = Abc_UtilStrsav( p->pManAig->pName );
+ pManFraig->pSpec = Abc_UtilStrsav( p->pManAig->pSpec );
pManFraig->nRegs = p->pManAig->nRegs;
// create PI nodes for the frames
for ( f = 0; f < p->nFramesAll; f++ )
diff --git a/src/aig/fra/fraIndVer.c b/src/proof/fra/fraIndVer.c
index 32069cfb..64437607 100644
--- a/src/aig/fra/fraIndVer.c
+++ b/src/proof/fra/fraIndVer.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "fra.h"
-#include "cnf.h"
+#include "src/sat/cnf/cnf.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/fra/fraLcr.c b/src/proof/fra/fraLcr.c
index b18a8fcd..b18a8fcd 100644
--- a/src/aig/fra/fraLcr.c
+++ b/src/proof/fra/fraLcr.c
diff --git a/src/aig/fra/fraMan.c b/src/proof/fra/fraMan.c
index 7e427e72..90e8b762 100644
--- a/src/aig/fra/fraMan.c
+++ b/src/proof/fra/fraMan.c
@@ -114,7 +114,7 @@ Fra_Man_t * Fra_ManStart( Aig_Man_t * pManAig, Fra_Par_t * pPars )
p->nSizeAlloc = Aig_ManObjNumMax( pManAig );
p->nFramesAll = pPars->nFramesK + 1;
// allocate storage for sim pattern
- p->nPatWords = Aig_BitWordNum( (Aig_ManPiNum(pManAig) - Aig_ManRegNum(pManAig)) * p->nFramesAll + Aig_ManRegNum(pManAig) );
+ p->nPatWords = Abc_BitWordNum( (Aig_ManPiNum(pManAig) - Aig_ManRegNum(pManAig)) * p->nFramesAll + Aig_ManRegNum(pManAig) );
p->pPatWords = ABC_ALLOC( unsigned, p->nPatWords );
p->vPiVars = Vec_PtrAlloc( 100 );
// equivalence classes
@@ -181,8 +181,8 @@ Aig_Man_t * Fra_ManPrepareComb( Fra_Man_t * p )
assert( p->pManFraig == NULL );
// start the fraig package
pManFraig = Aig_ManStart( Aig_ManObjNumMax(p->pManAig) );
- pManFraig->pName = Aig_UtilStrsav( p->pManAig->pName );
- pManFraig->pSpec = Aig_UtilStrsav( p->pManAig->pSpec );
+ pManFraig->pName = Abc_UtilStrsav( p->pManAig->pName );
+ pManFraig->pSpec = Abc_UtilStrsav( p->pManAig->pSpec );
pManFraig->nRegs = p->pManAig->nRegs;
pManFraig->nAsserts = p->pManAig->nAsserts;
// set the pointers to the available fraig nodes
diff --git a/src/aig/fra/fraPart.c b/src/proof/fra/fraPart.c
index e9739f97..e9739f97 100644
--- a/src/aig/fra/fraPart.c
+++ b/src/proof/fra/fraPart.c
diff --git a/src/aig/fra/fraSat.c b/src/proof/fra/fraSat.c
index 78d25c37..fef642f5 100644
--- a/src/aig/fra/fraSat.c
+++ b/src/proof/fra/fraSat.c
@@ -544,7 +544,7 @@ clk = clock();
Aig_ManIncrementTravId( p->pManFraig );
// determine the min and max level to visit
assert( p->pPars->dActConeRatio > 0 && p->pPars->dActConeRatio < 1 );
- LevelMax = ABC_MAX( (pNew ? pNew->Level : 0), (pOld ? pOld->Level : 0) );
+ LevelMax = Abc_MaxInt( (pNew ? pNew->Level : 0), (pOld ? pOld->Level : 0) );
LevelMin = (int)(LevelMax * (1.0 - p->pPars->dActConeRatio));
// traverse
if ( pOld && !Aig_ObjIsConst1(pOld) )
diff --git a/src/aig/fra/fraSec.c b/src/proof/fra/fraSec.c
index 3b28936d..8067b8c2 100644
--- a/src/aig/fra/fraSec.c
+++ b/src/proof/fra/fraSec.c
@@ -19,12 +19,12 @@
***********************************************************************/
#include "fra.h"
-#include "ioa.h"
-#include "int.h"
-#include "ssw.h"
-#include "saig.h"
-#include "bbr.h"
-#include "pdr.h"
+#include "src/aig/ioa/ioa.h"
+#include "src/proof/int/int.h"
+#include "src/proof/ssw/ssw.h"
+#include "src/aig/saig/saig.h"
+#include "src/proof/bbr/bbr.h"
+#include "src/proof/pdr/pdr.h"
ABC_NAMESPACE_IMPL_START
@@ -180,7 +180,7 @@ clk = clock();
if ( RetValue == -1 && pParSec->TimeLimit )
{
TimeLeft = (float)pParSec->TimeLimit - ((float)(clock()-clkTotal)/(float)(CLOCKS_PER_SEC));
- TimeLeft = ABC_MAX( TimeLeft, 0.0 );
+ TimeLeft = Abc_MaxInt( TimeLeft, 0.0 );
if ( TimeLeft == 0.0 )
{
if ( !pParSec->fSilent )
@@ -250,7 +250,7 @@ ABC_PRT( "Time", clock() - clk );
if ( RetValue == -1 && pParSec->TimeLimit )
{
TimeLeft = (float)pParSec->TimeLimit - ((float)(clock()-clkTotal)/(float)(CLOCKS_PER_SEC));
- TimeLeft = ABC_MAX( TimeLeft, 0.0 );
+ TimeLeft = Abc_MaxInt( TimeLeft, 0.0 );
if ( TimeLeft == 0.0 )
{
if ( !pParSec->fSilent )
@@ -285,7 +285,7 @@ ABC_PRT( "Time", clock() - clk );
if ( RetValue == -1 && pParSec->TimeLimit )
{
TimeLeft = (float)pParSec->TimeLimit - ((float)(clock()-clkTotal)/(float)(CLOCKS_PER_SEC));
- TimeLeft = ABC_MAX( TimeLeft, 0.0 );
+ TimeLeft = Abc_MaxInt( TimeLeft, 0.0 );
if ( TimeLeft == 0.0 )
{
if ( !pParSec->fSilent )
@@ -325,7 +325,7 @@ ABC_PRT( "Time", clock() - clk );
if ( RetValue == -1 && pParSec->TimeLimit )
{
TimeLeft = (float)pParSec->TimeLimit - ((float)(clock()-clkTotal)/(float)(CLOCKS_PER_SEC));
- TimeLeft = ABC_MAX( TimeLeft, 0.0 );
+ TimeLeft = Abc_MaxInt( TimeLeft, 0.0 );
if ( TimeLeft == 0.0 )
{
if ( !pParSec->fSilent )
@@ -629,7 +629,7 @@ ABC_PRT( "Time", clock() - clkTotal );
// the only way it can happen is when a PO is equal to a PI...
if ( Saig_ManFindFailedPoCex( pNew, pNew->pSeqModel ) == -1 )
for ( i = 0; i < pNew->nTruePis; i++ )
- Aig_InfoSetBit( pNew->pSeqModel->pData, i );
+ Abc_InfoSetBit( pNew->pSeqModel->pData, i );
}
if ( !pParSec->fSilent )
{
diff --git a/src/aig/fra/fraSim.c b/src/proof/fra/fraSim.c
index 8f912915..eb42c665 100644
--- a/src/aig/fra/fraSim.c
+++ b/src/proof/fra/fraSim.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "fra.h"
-#include "saig.h"
+#include "src/aig/saig/saig.h"
ABC_NAMESPACE_IMPL_START
@@ -224,7 +224,7 @@ void Fra_SmlSavePattern1( Fra_Man_t * p, int fInit )
nTruePis = Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
k = 0;
Aig_ManForEachLoSeq( p->pManAig, pObj, i )
- Aig_InfoXorBit( p->pPatWords, nTruePis * p->nFramesAll + k++ );
+ Abc_InfoXorBit( p->pPatWords, nTruePis * p->nFramesAll + k++ );
}
/**Function*************************************************************
@@ -246,21 +246,21 @@ void Fra_SmlSavePattern( Fra_Man_t * p )
Aig_ManForEachPi( p->pManFraig, pObj, i )
// if ( p->pSat->model.ptr[Fra_ObjSatNum(pObj)] == l_True )
if ( sat_solver_var_value(p->pSat, Fra_ObjSatNum(pObj)) )
- Aig_InfoSetBit( p->pPatWords, i );
+ Abc_InfoSetBit( p->pPatWords, i );
if ( p->vCex )
{
Vec_IntClear( p->vCex );
for ( i = 0; i < Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig); i++ )
- Vec_IntPush( p->vCex, Aig_InfoHasBit( p->pPatWords, i ) );
+ Vec_IntPush( p->vCex, Abc_InfoHasBit( p->pPatWords, i ) );
for ( i = Aig_ManPiNum(p->pManFraig) - Aig_ManRegNum(p->pManFraig); i < Aig_ManPiNum(p->pManFraig); i++ )
- Vec_IntPush( p->vCex, Aig_InfoHasBit( p->pPatWords, i ) );
+ Vec_IntPush( p->vCex, Abc_InfoHasBit( p->pPatWords, i ) );
}
/*
printf( "Pattern: " );
Aig_ManForEachPi( p->pManFraig, pObj, i )
- printf( "%d", Aig_InfoHasBit( p->pPatWords, i ) );
+ printf( "%d", Abc_InfoHasBit( p->pPatWords, i ) );
printf( "\n" );
*/
}
@@ -301,7 +301,7 @@ void Fra_SmlCheckOutputSavePattern( Fra_Man_t * p, Aig_Obj_t * pObjPo )
pModel = ABC_ALLOC( int, Aig_ManPiNum(p->pManFraig)+1 );
Aig_ManForEachPi( p->pManAig, pObjPi, i )
{
- pModel[i] = Aig_InfoHasBit(Fra_ObjSim(p->pSml, pObjPi->Id), BestPat);
+ pModel[i] = Abc_InfoHasBit(Fra_ObjSim(p->pSml, pObjPi->Id), BestPat);
// printf( "%d", pModel[i] );
}
pModel[Aig_ManPiNum(p->pManAig)] = pObjPo->Id;
@@ -439,11 +439,11 @@ void Fra_SmlAssignDist1( Fra_Sml_t * p, unsigned * pPat )
{
// copy the PI info
Aig_ManForEachPi( p->pAig, pObj, i )
- Fra_SmlAssignConst( p, pObj, Aig_InfoHasBit(pPat, i), 0 );
+ Fra_SmlAssignConst( p, pObj, Abc_InfoHasBit(pPat, i), 0 );
// flip one bit
- Limit = ABC_MIN( Aig_ManPiNum(p->pAig), p->nWordsTotal * 32 - 1 );
+ Limit = Abc_MinInt( Aig_ManPiNum(p->pAig), p->nWordsTotal * 32 - 1 );
for ( i = 0; i < Limit; i++ )
- Aig_InfoXorBit( Fra_ObjSim( p, Aig_ManPi(p->pAig,i)->Id ), i+1 );
+ Abc_InfoXorBit( Fra_ObjSim( p, Aig_ManPi(p->pAig,i)->Id ), i+1 );
}
else
{
@@ -453,19 +453,19 @@ void Fra_SmlAssignDist1( Fra_Sml_t * p, unsigned * pPat )
nTruePis = Aig_ManPiNum(p->pAig) - Aig_ManRegNum(p->pAig);
for ( f = 0; f < p->nFrames; f++ )
Aig_ManForEachPiSeq( p->pAig, pObj, i )
- Fra_SmlAssignConst( p, pObj, Aig_InfoHasBit(pPat, nTruePis * f + i), f );
+ Fra_SmlAssignConst( p, pObj, Abc_InfoHasBit(pPat, nTruePis * f + i), f );
// copy the latch info
k = 0;
Aig_ManForEachLoSeq( p->pAig, pObj, i )
- Fra_SmlAssignConst( p, pObj, Aig_InfoHasBit(pPat, nTruePis * p->nFrames + k++), 0 );
+ Fra_SmlAssignConst( p, pObj, Abc_InfoHasBit(pPat, nTruePis * p->nFrames + k++), 0 );
// assert( p->pManFraig == NULL || nTruePis * p->nFrames + k == Aig_ManPiNum(p->pManFraig) );
// flip one bit of the last frame
if ( fUseDist1 ) //&& p->nFrames == 2 )
{
- Limit = ABC_MIN( nTruePis, p->nWordsFrame * 32 - 1 );
+ Limit = Abc_MinInt( nTruePis, p->nWordsFrame * 32 - 1 );
for ( i = 0; i < Limit; i++ )
- Aig_InfoXorBit( Fra_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ) + p->nWordsFrame*(p->nFrames-1), i+1 );
+ Abc_InfoXorBit( Fra_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ) + p->nWordsFrame*(p->nFrames-1), i+1 );
}
}
}
@@ -931,16 +931,16 @@ Abc_Cex_t * Fra_SmlGetCounterExample( Fra_Sml_t * p )
Aig_ManForEachLoSeq( p->pAig, pObj, k )
{
pSims = Fra_ObjSim( p, pObj->Id );
- if ( Aig_InfoHasBit( pSims, iBit ) )
- Aig_InfoSetBit( pCex->pData, k );
+ if ( Abc_InfoHasBit( pSims, iBit ) )
+ Abc_InfoSetBit( pCex->pData, k );
}
for ( i = 0; i <= iFrame; i++ )
{
Aig_ManForEachPiSeq( p->pAig, pObj, k )
{
pSims = Fra_ObjSim( p, pObj->Id );
- if ( Aig_InfoHasBit( pSims, 32 * p->nWordsFrame * i + iBit ) )
- Aig_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * i + k );
+ if ( Abc_InfoHasBit( pSims, 32 * p->nWordsFrame * i + iBit ) )
+ Abc_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * i + k );
}
}
// verify the counter example
@@ -997,7 +997,7 @@ Abc_Cex_t * Fra_SmlCopyCounterExample( Aig_Man_t * pAig, Aig_Man_t * pFrames, in
for ( i = 0; i < Aig_ManPiNum(pFrames); i++ )
{
if ( pModel[i] )
- Aig_InfoSetBit( pCex->pData, pCex->nRegs + i );
+ Abc_InfoSetBit( pCex->pData, pCex->nRegs + i );
if ( pCex->nRegs + i == pCex->nBits - 1 )
break;
}
diff --git a/src/aig/fra/fra_.c b/src/proof/fra/fra_.c
index 8e5785ec..8e5785ec 100644
--- a/src/aig/fra/fra_.c
+++ b/src/proof/fra/fra_.c
diff --git a/src/proof/fra/module.make b/src/proof/fra/module.make
new file mode 100644
index 00000000..a54a98de
--- /dev/null
+++ b/src/proof/fra/module.make
@@ -0,0 +1,17 @@
+SRC += src/proof/fra/fraBmc.c \
+ src/proof/fra/fraCec.c \
+ src/proof/fra/fraClass.c \
+ src/proof/fra/fraClau.c \
+ src/proof/fra/fraClaus.c \
+ src/proof/fra/fraCnf.c \
+ src/proof/fra/fraCore.c \
+ src/proof/fra/fraHot.c \
+ src/proof/fra/fraImp.c \
+ src/proof/fra/fraInd.c \
+ src/proof/fra/fraIndVer.c \
+ src/proof/fra/fraLcr.c \
+ src/proof/fra/fraMan.c \
+ src/proof/fra/fraPart.c \
+ src/proof/fra/fraSat.c \
+ src/proof/fra/fraSec.c \
+ src/proof/fra/fraSim.c
diff --git a/src/sat/fraig/fraig.h b/src/proof/fraig/fraig.h
index 2b499967..6d672716 100644
--- a/src/sat/fraig/fraig.h
+++ b/src/proof/fraig/fraig.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __FRAIG_H__
-#define __FRAIG_H__
+#ifndef ABC__sat__fraig__fraig_h
+#define ABC__sat__fraig__fraig_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/sat/fraig/fraigApi.c b/src/proof/fraig/fraigApi.c
index 6e0ab959..6e0ab959 100644
--- a/src/sat/fraig/fraigApi.c
+++ b/src/proof/fraig/fraigApi.c
diff --git a/src/sat/fraig/fraigCanon.c b/src/proof/fraig/fraigCanon.c
index 47539db2..47539db2 100644
--- a/src/sat/fraig/fraigCanon.c
+++ b/src/proof/fraig/fraigCanon.c
diff --git a/src/sat/fraig/fraigChoice.c b/src/proof/fraig/fraigChoice.c
index 21d4fe10..21d4fe10 100644
--- a/src/sat/fraig/fraigChoice.c
+++ b/src/proof/fraig/fraigChoice.c
diff --git a/src/sat/fraig/fraigFanout.c b/src/proof/fraig/fraigFanout.c
index 0e6c86f8..0e6c86f8 100644
--- a/src/sat/fraig/fraigFanout.c
+++ b/src/proof/fraig/fraigFanout.c
diff --git a/src/sat/fraig/fraigFeed.c b/src/proof/fraig/fraigFeed.c
index 47f946e1..47f946e1 100644
--- a/src/sat/fraig/fraigFeed.c
+++ b/src/proof/fraig/fraigFeed.c
diff --git a/src/sat/fraig/fraigInt.h b/src/proof/fraig/fraigInt.h
index 7cc2194a..f6a5d74f 100644
--- a/src/sat/fraig/fraigInt.h
+++ b/src/proof/fraig/fraigInt.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __FRAIG_INT_H__
-#define __FRAIG_INT_H__
+#ifndef ABC__sat__fraig__fraigInt_h
+#define ABC__sat__fraig__fraigInt_h
////////////////////////////////////////////////////////////////////////
@@ -30,9 +30,9 @@
#include <assert.h>
#include <time.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "fraig.h"
-#include "msat.h"
+#include "src/sat/msat/msat.h"
ABC_NAMESPACE_HEADER_START
@@ -379,7 +379,6 @@ extern Fraig_Node_t * Fraig_NodeCreate( Fraig_Man_t * p, Fraig_Node_t * p1,
extern void Fraig_NodeSimulate( Fraig_Node_t * pNode, int iWordStart, int iWordStop, int fUseRand );
/*=== fraigPrime.c =============================================================*/
extern int s_FraigPrimes[FRAIG_MAX_PRIMES];
-extern unsigned int Cudd_PrimeFraig( unsigned int p );
/*=== fraigSat.c ===============================================================*/
extern int Fraig_NodeIsImplication( Fraig_Man_t * p, Fraig_Node_t * pOld, Fraig_Node_t * pNew, int nBTLimit );
/*=== fraigTable.c =============================================================*/
diff --git a/src/sat/fraig/fraigMan.c b/src/proof/fraig/fraigMan.c
index ba08d793..ba08d793 100644
--- a/src/sat/fraig/fraigMan.c
+++ b/src/proof/fraig/fraigMan.c
diff --git a/src/sat/fraig/fraigMem.c b/src/proof/fraig/fraigMem.c
index ef52765e..ef52765e 100644
--- a/src/sat/fraig/fraigMem.c
+++ b/src/proof/fraig/fraigMem.c
diff --git a/src/sat/fraig/fraigNode.c b/src/proof/fraig/fraigNode.c
index 9f95cd46..609d5f65 100644
--- a/src/sat/fraig/fraigNode.c
+++ b/src/proof/fraig/fraigNode.c
@@ -177,7 +177,7 @@ Fraig_Node_t * Fraig_NodeCreate( Fraig_Man_t * p, Fraig_Node_t * p1, Fraig_Node_
pNode->NumPi = -1;
// compute the level of this node
- pNode->Level = 1 + ABC_MAX(Fraig_Regular(p1)->Level, Fraig_Regular(p2)->Level);
+ pNode->Level = 1 + Abc_MaxInt(Fraig_Regular(p1)->Level, Fraig_Regular(p2)->Level);
pNode->fInv = Fraig_NodeIsSimComplement(p1) & Fraig_NodeIsSimComplement(p2);
pNode->fFailTfo = Fraig_Regular(p1)->fFailTfo | Fraig_Regular(p2)->fFailTfo;
diff --git a/src/sat/fraig/fraigPrime.c b/src/proof/fraig/fraigPrime.c
index 42a079fd..4878738d 100644
--- a/src/sat/fraig/fraigPrime.c
+++ b/src/proof/fraig/fraigPrime.c
@@ -104,42 +104,6 @@ int s_FraigPrimes[FRAIG_MAX_PRIMES] = { 2, 3, 5,
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
-/**Function********************************************************************
-
- Synopsis [Returns the next prime &gt;= p.]
-
- Description [Copied from CUDD, for stand-aloneness.]
-
- SideEffects [None]
-
- SeeAlso []
-
-******************************************************************************/
-unsigned int Cudd_PrimeFraig( unsigned int p)
-{
- int i,pn;
-
- p--;
- do {
- p++;
- if (p&1) {
- pn = 1;
- i = 3;
- while ((unsigned) (i * i) <= p) {
- if (p % i == 0) {
- pn = 0;
- break;
- }
- i += 2;
- }
- } else {
- pn = 0;
- }
- } while (!pn);
- return(p);
-
-} /* end of Cudd_Prime */
-
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
diff --git a/src/sat/fraig/fraigSat.c b/src/proof/fraig/fraigSat.c
index b96bc5a1..6ccd1b86 100644
--- a/src/sat/fraig/fraigSat.c
+++ b/src/proof/fraig/fraigSat.c
@@ -18,7 +18,7 @@
#include <math.h>
#include "fraigInt.h"
-#include "msatInt.h"
+#include "src/sat/msat/msatInt.h"
ABC_NAMESPACE_IMPL_START
@@ -1436,7 +1436,7 @@ void Fraig_SetActivity( Fraig_Man_t * pMan, Fraig_Node_t * pOld, Fraig_Node_t *
float * pFactors = Msat_SolverReadFactors(pMan->pSat);
if ( pFactors == NULL )
return;
- MaxLevel = ABC_MAX( pOld->Level, pNew->Level );
+ MaxLevel = Abc_MaxInt( pOld->Level, pNew->Level );
// create the variable order
for ( i = 0; i < Msat_IntVecReadSize(pMan->vVarsInt); i++ )
{
diff --git a/src/sat/fraig/fraigTable.c b/src/proof/fraig/fraigTable.c
index 79ab7ffc..6611e4fa 100644
--- a/src/sat/fraig/fraigTable.c
+++ b/src/proof/fraig/fraigTable.c
@@ -50,7 +50,7 @@ Fraig_HashTable_t * Fraig_HashTableCreate( int nSize )
p = ABC_ALLOC( Fraig_HashTable_t, 1 );
memset( p, 0, sizeof(Fraig_HashTable_t) );
// allocate and clean the bins
- p->nBins = Cudd_PrimeFraig(nSize);
+ p->nBins = Abc_PrimeCudd(nSize);
p->pBins = ABC_ALLOC( Fraig_Node_t *, p->nBins );
memset( p->pBins, 0, sizeof(Fraig_Node_t *) * p->nBins );
return p;
@@ -265,7 +265,7 @@ void Fraig_TableResizeS( Fraig_HashTable_t * p )
clk = clock();
// get the new table size
- nBinsNew = Cudd_PrimeFraig(2 * p->nBins);
+ nBinsNew = Abc_PrimeCudd(2 * p->nBins);
// allocate a new array
pBinsNew = ABC_ALLOC( Fraig_Node_t *, nBinsNew );
memset( pBinsNew, 0, sizeof(Fraig_Node_t *) * nBinsNew );
@@ -308,7 +308,7 @@ void Fraig_TableResizeF( Fraig_HashTable_t * p, int fUseSimR )
clk = clock();
// get the new table size
- nBinsNew = Cudd_PrimeFraig(2 * p->nBins);
+ nBinsNew = Abc_PrimeCudd(2 * p->nBins);
// allocate a new array
pBinsNew = ABC_ALLOC( Fraig_Node_t *, nBinsNew );
memset( pBinsNew, 0, sizeof(Fraig_Node_t *) * nBinsNew );
diff --git a/src/sat/fraig/fraigUtil.c b/src/proof/fraig/fraigUtil.c
index 0d4cdfaf..ae78a61f 100644
--- a/src/sat/fraig/fraigUtil.c
+++ b/src/proof/fraig/fraigUtil.c
@@ -460,7 +460,7 @@ int Fraig_MappingUpdateLevel_rec( Fraig_Man_t * pMan, Fraig_Node_t * pNode, int
// compute levels of the children nodes
Level1 = Fraig_MappingUpdateLevel_rec( pMan, Fraig_Regular(pNode->p1), fMaximum );
Level2 = Fraig_MappingUpdateLevel_rec( pMan, Fraig_Regular(pNode->p2), fMaximum );
- pNode->Level = 1 + ABC_MAX( Level1, Level2 );
+ pNode->Level = 1 + Abc_MaxInt( Level1, Level2 );
if ( pNode->pNextE )
{
LevelE = Fraig_MappingUpdateLevel_rec( pMan, pNode->pNextE, fMaximum );
diff --git a/src/sat/fraig/fraigVec.c b/src/proof/fraig/fraigVec.c
index 25d50bf3..25d50bf3 100644
--- a/src/sat/fraig/fraigVec.c
+++ b/src/proof/fraig/fraigVec.c
diff --git a/src/proof/fraig/module.make b/src/proof/fraig/module.make
new file mode 100644
index 00000000..4ca7cdce
--- /dev/null
+++ b/src/proof/fraig/module.make
@@ -0,0 +1,12 @@
+SRC += src/proof/fraig/fraigApi.c \
+ src/proof/fraig/fraigCanon.c \
+ src/proof/fraig/fraigFanout.c \
+ src/proof/fraig/fraigFeed.c \
+ src/proof/fraig/fraigMan.c \
+ src/proof/fraig/fraigMem.c \
+ src/proof/fraig/fraigNode.c \
+ src/proof/fraig/fraigPrime.c \
+ src/proof/fraig/fraigSat.c \
+ src/proof/fraig/fraigTable.c \
+ src/proof/fraig/fraigUtil.c \
+ src/proof/fraig/fraigVec.c
diff --git a/src/aig/int/int.h b/src/proof/int/int.h
index 4b8d78bb..a93e3c93 100644
--- a/src/aig/int/int.h
+++ b/src/proof/int/int.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __INT_H__
-#define __INT_H__
+#ifndef ABC__aig__int__int_h
+#define ABC__aig__int__int_h
/*
diff --git a/src/aig/int/intCheck.c b/src/proof/int/intCheck.c
index 6b36fe30..6b36fe30 100644
--- a/src/aig/int/intCheck.c
+++ b/src/proof/int/intCheck.c
diff --git a/src/aig/int/intContain.c b/src/proof/int/intContain.c
index 77b057a7..58b408d7 100644
--- a/src/aig/int/intContain.c
+++ b/src/proof/int/intContain.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "intInt.h"
-#include "fra.h"
+#include "src/proof/fra/fra.h"
ABC_NAMESPACE_IMPL_START
@@ -245,7 +245,7 @@ int Inter_ManCheckInductiveContainment( Aig_Man_t * pTrans, Aig_Man_t * pInter,
}
ABC_NAMESPACE_IMPL_END
-#include "fra.h"
+#include "src/proof/fra/fra.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/int/intCore.c b/src/proof/int/intCore.c
index 3bd111be..3bd111be 100644
--- a/src/aig/int/intCore.c
+++ b/src/proof/int/intCore.c
diff --git a/src/aig/int/intCtrex.c b/src/proof/int/intCtrex.c
index 0aa60040..9ba8c9df 100644
--- a/src/aig/int/intCtrex.c
+++ b/src/proof/int/intCtrex.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "intInt.h"
-#include "ssw.h"
+#include "src/proof/ssw/ssw.h"
ABC_NAMESPACE_IMPL_START
@@ -138,7 +138,7 @@ void * Inter_ManGetCounterExample( Aig_Man_t * pAig, int nFrames, int fVerbose )
pCtrex->iPo = 0;
for ( i = 0; i < Vec_IntSize(vCiIds); i++ )
if ( pModel[i] )
- Aig_InfoSetBit( pCtrex->pData, Saig_ManRegNum(pAig) + i );
+ Abc_InfoSetBit( pCtrex->pData, Saig_ManRegNum(pAig) + i );
ABC_FREE( pModel );
}
// free the sat_solver
diff --git a/src/aig/int/intDup.c b/src/proof/int/intDup.c
index 800375a9..551473ef 100644
--- a/src/aig/int/intDup.c
+++ b/src/proof/int/intDup.c
@@ -78,8 +78,8 @@ Aig_Man_t * Inter_ManStartDuplicated( Aig_Man_t * p )
assert( Aig_ManRegNum(p) > 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -128,8 +128,8 @@ Aig_Man_t * Inter_ManStartOneOutput( Aig_Man_t * p, int fAddFirstPo )
assert( Aig_ManRegNum(p) > 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( p->pName );
- pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+ pNew->pName = Abc_UtilStrsav( p->pName );
+ pNew->pSpec = Abc_UtilStrsav( p->pSpec );
// create the PIs
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
diff --git a/src/aig/int/intFrames.c b/src/proof/int/intFrames.c
index 0fbab6cb..0fbab6cb 100644
--- a/src/aig/int/intFrames.c
+++ b/src/proof/int/intFrames.c
diff --git a/src/aig/int/intInt.h b/src/proof/int/intInt.h
index 66ff9578..6a033d85 100644
--- a/src/aig/int/intInt.h
+++ b/src/proof/int/intInt.h
@@ -18,18 +18,18 @@
***********************************************************************/
-#ifndef __INT_INT_H__
-#define __INT_INT_H__
+#ifndef ABC__aig__int__intInt_h
+#define ABC__aig__int__intInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "satStore.h"
+#include "src/aig/saig/saig.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/bsat/satStore.h"
#include "int.h"
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/int/intInter.c b/src/proof/int/intInter.c
index ef32294b..ef32294b 100644
--- a/src/aig/int/intInter.c
+++ b/src/proof/int/intInter.c
diff --git a/src/aig/int/intM114.c b/src/proof/int/intM114.c
index 139c9bbd..139c9bbd 100644
--- a/src/aig/int/intM114.c
+++ b/src/proof/int/intM114.c
diff --git a/src/aig/int/intM114p.c b/src/proof/int/intM114p.c
index 0ad0552f..7c011426 100644
--- a/src/aig/int/intM114p.c
+++ b/src/proof/int/intM114p.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "intInt.h"
-#include "m114p.h"
+#include "src/sat/psat/m114p.h"
#ifdef ABC_USE_LIBRARIES
diff --git a/src/aig/int/intMan.c b/src/proof/int/intMan.c
index d6219f6b..6fd81d7a 100644
--- a/src/aig/int/intMan.c
+++ b/src/proof/int/intMan.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "intInt.h"
-#include "ioa.h"
+#include "src/aig/ioa/ioa.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/int/intUtil.c b/src/proof/int/intUtil.c
index ce48c37d..8027bdef 100644
--- a/src/aig/int/intUtil.c
+++ b/src/proof/int/intUtil.c
@@ -64,7 +64,7 @@ int Inter_ManCheckInitialState( Aig_Man_t * p )
p->pSeqModel = Abc_CexAlloc( Aig_ManRegNum(p), Saig_ManPiNum(p), 1 );
Saig_ManForEachPi( p, pObj, i )
if ( sat_solver_var_value( pSat, pCnf->pVarNums[Aig_ObjId(pObj)] ) )
- Aig_InfoSetBit( p->pSeqModel->pData, Aig_ManRegNum(p) + i );
+ Abc_InfoSetBit( p->pSeqModel->pData, Aig_ManRegNum(p) + i );
}
Cnf_DataFree( pCnf );
sat_solver_delete( pSat );
diff --git a/src/proof/int/module.make b/src/proof/int/module.make
new file mode 100644
index 00000000..4a66b6ca
--- /dev/null
+++ b/src/proof/int/module.make
@@ -0,0 +1,11 @@
+SRC += src/proof/int/intCheck.c \
+ src/proof/int/intContain.c \
+ src/proof/int/intCore.c \
+ src/proof/int/intCtrex.c \
+ src/proof/int/intDup.c \
+ src/proof/int/intFrames.c \
+ src/proof/int/intInter.c \
+ src/proof/int/intM114.c \
+ src/proof/int/intM114p.c \
+ src/proof/int/intMan.c \
+ src/proof/int/intUtil.c
diff --git a/src/aig/live/liveness.c b/src/proof/live/liveness.c
index 324865a9..8368e121 100644
--- a/src/aig/live/liveness.c
+++ b/src/proof/live/liveness.c
@@ -19,11 +19,11 @@
***********************************************************************/
#include <stdio.h>
-#include "main.h"
-#include "aig.h"
-#include "saig.h"
+#include "src/base/main/main.h"
+#include "src/aig/aig/aig.h"
+#include "src/aig/saig/saig.h"
#include <string.h>
-#include "mainInt.h"
+#include "src/base/main/mainInt.h"
ABC_NAMESPACE_IMPL_START
@@ -289,7 +289,7 @@ Aig_Man_t * LivenessToSafetyTransformation( int mode, Abc_Ntk_t * pNtk, Aig_Man_
piCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecPis, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
Vec_PtrPush( vecPiNames, nodeName );
}
@@ -311,7 +311,7 @@ Aig_Man_t * LivenessToSafetyTransformation( int mode, Abc_Ntk_t * pNtk, Aig_Man_
loCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecLos, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
Vec_PtrPush( vecLoNames, nodeName );
}
@@ -586,7 +586,7 @@ Aig_Man_t * LivenessToSafetyTransformationAbs( int mode, Abc_Ntk_t * pNtk, Aig_M
piCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecPis, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
Vec_PtrPush( vecPiNames, nodeName );
}
@@ -608,7 +608,7 @@ Aig_Man_t * LivenessToSafetyTransformationAbs( int mode, Abc_Ntk_t * pNtk, Aig_M
loCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecLos, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
Vec_PtrPush( vecLoNames, nodeName );
}
@@ -877,7 +877,7 @@ Aig_Man_t * LivenessToSafetyTransformationOneStepLoop( int mode, Abc_Ntk_t * pNt
// nodes, but this selection is arbitrary - need to be justified
//****************************************************************
pNew = Aig_ManStart( 2 * Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( "live2safe" );
+ pNew->pName = Abc_UtilStrsav( "live2safe" );
pNew->pSpec = NULL;
//****************************************************************
@@ -894,7 +894,7 @@ Aig_Man_t * LivenessToSafetyTransformationOneStepLoop( int mode, Abc_Ntk_t * pNt
piCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecPis, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
Vec_PtrPush( vecPiNames, nodeName );
}
@@ -916,7 +916,7 @@ Aig_Man_t * LivenessToSafetyTransformationOneStepLoop( int mode, Abc_Ntk_t * pNt
loCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecLos, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
Vec_PtrPush( vecLoNames, nodeName );
}
@@ -1535,7 +1535,7 @@ int Abc_CommandAbcLivenessToSafety( Abc_Frame_t * pAbc, int argc, char ** argv )
#endif
pNtkNew = Abc_NtkFromAigPhase( pAigNew );
- pNtkNew->pName = Aig_UtilStrsav( pAigNew->pName );
+ pNtkNew->pName = Abc_UtilStrsav( pAigNew->pName );
if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkCreateCone(): Network check has failed.\n" );
@@ -1764,7 +1764,7 @@ int Abc_CommandAbcLivenessToSafetyAbstraction( Abc_Frame_t * pAbc, int argc, cha
}
pNtkNew = Abc_NtkFromAigPhase( pAigNew );
- pNtkNew->pName = Aig_UtilStrsav( pAigNew->pName );
+ pNtkNew->pName = Abc_UtilStrsav( pAigNew->pName );
if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkCreateCone(): Network check has failed.\n" );
@@ -1921,7 +1921,7 @@ Aig_Man_t * LivenessToSafetyTransformationWithLTL( int mode, Abc_Ntk_t * pNtk, A
piCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecPis, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
Vec_PtrPush( vecPiNames, nodeName );
}
@@ -1943,7 +1943,7 @@ Aig_Man_t * LivenessToSafetyTransformationWithLTL( int mode, Abc_Ntk_t * pNtk, A
loCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecLos, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
Vec_PtrPush( vecLoNames, nodeName );
}
@@ -2540,7 +2540,7 @@ int Abc_CommandAbcLivenessToSafetyWithLTL( Abc_Frame_t * pAbc, int argc, char **
#endif
pNtkNew = Abc_NtkFromAigPhase( pAigNew );
- pNtkNew->pName = Aig_UtilStrsav( pAigNew->pName );
+ pNtkNew->pName = Abc_UtilStrsav( pAigNew->pName );
if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkCreateCone(): Network check has failed.\n" );
diff --git a/src/aig/live/liveness_sim.c b/src/proof/live/liveness_sim.c
index 5e494b87..50153e50 100644
--- a/src/aig/live/liveness_sim.c
+++ b/src/proof/live/liveness_sim.c
@@ -19,9 +19,9 @@
***********************************************************************/
#include <stdio.h>
-#include "main.h"
-#include "aig.h"
-#include "saig.h"
+#include "src/base/main/main.h"
+#include "src/aig/aig/aig.h"
+#include "src/aig/saig/saig.h"
#include <string.h>
ABC_NAMESPACE_IMPL_START
@@ -228,7 +228,7 @@ static Aig_Man_t * LivenessToSafetyTransformationSim( Abc_Ntk_t * pNtk, Aig_Man_
// nodes, but this selection is arbitrary - need to be justified
//****************************************************************
pNew = Aig_ManStart( 2 * Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( "live2safe" );
+ pNew->pName = Abc_UtilStrsav( "live2safe" );
pNew->pSpec = NULL;
//****************************************************************
@@ -245,7 +245,7 @@ static Aig_Man_t * LivenessToSafetyTransformationSim( Abc_Ntk_t * pNtk, Aig_Man_
piCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecPis, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
Vec_PtrPush( vecPiNames, nodeName );
}
@@ -254,7 +254,7 @@ static Aig_Man_t * LivenessToSafetyTransformationSim( Abc_Ntk_t * pNtk, Aig_Man_
//****************************************************************
#ifndef DUPLICATE_CKT_DEBUG
pObjSavePi = Aig_ObjCreatePi( pNew );
- nodeName = Aig_UtilStrsav("SAVE_BIERE"),
+ nodeName = Abc_UtilStrsav("SAVE_BIERE"),
Vec_PtrPush( vecPiNames, nodeName );
#endif
@@ -266,7 +266,7 @@ static Aig_Man_t * LivenessToSafetyTransformationSim( Abc_Ntk_t * pNtk, Aig_Man_
loCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecLos, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
Vec_PtrPush( vecLoNames, nodeName );
}
@@ -277,7 +277,7 @@ static Aig_Man_t * LivenessToSafetyTransformationSim( Abc_Ntk_t * pNtk, Aig_Man_
loCreated++;
pObjSavedLo = Aig_ObjCreatePi( pNew );
Vec_PtrPush( vecLos, pObjSavedLo );
- nodeName = Aig_UtilStrsav("SAVED_LO");
+ nodeName = Abc_UtilStrsav("SAVED_LO");
Vec_PtrPush( vecLoNames, nodeName );
#endif
@@ -505,7 +505,7 @@ static Aig_Man_t * LivenessToSafetyTransformationOneStepLoopSim( Abc_Ntk_t * pNt
// nodes, but this selection is arbitrary - need to be justified
//****************************************************************
pNew = Aig_ManStart( 2 * Aig_ManObjNumMax(p) );
- pNew->pName = Aig_UtilStrsav( "live2safe" );
+ pNew->pName = Abc_UtilStrsav( "live2safe" );
pNew->pSpec = NULL;
//****************************************************************
@@ -522,7 +522,7 @@ static Aig_Man_t * LivenessToSafetyTransformationOneStepLoopSim( Abc_Ntk_t * pNt
piCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecPis, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
Vec_PtrPush( vecPiNames, nodeName );
}
@@ -541,7 +541,7 @@ static Aig_Man_t * LivenessToSafetyTransformationOneStepLoopSim( Abc_Ntk_t * pNt
loCopied++;
pObj->pData = Aig_ObjCreatePi(pNew);
Vec_PtrPush( vecLos, pObj->pData );
- nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
+ nodeName = Abc_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
Vec_PtrPush( vecLoNames, nodeName );
}
diff --git a/src/aig/live/ltl_parser.c b/src/proof/live/ltl_parser.c
index de113ba7..5572611f 100644
--- a/src/aig/live/ltl_parser.c
+++ b/src/proof/live/ltl_parser.c
@@ -22,9 +22,9 @@
#include <string.h>
#include <assert.h>
#include <stdlib.h>
-#include "aig.h"
-#include "abc.h"
-#include "mainInt.h"
+#include "src/aig/aig/aig.h"
+#include "src/base/abc/abc.h"
+#include "src/base/main/mainInt.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/proof/live/module.make b/src/proof/live/module.make
new file mode 100644
index 00000000..55c70fc8
--- /dev/null
+++ b/src/proof/live/module.make
@@ -0,0 +1,3 @@
+SRC += src/proof/live/liveness.c \
+ src/proof/live/liveness_sim.c \
+ src/proof/live/ltl_parser.c
diff --git a/src/aig/llb/llb.c b/src/proof/llb/llb.c
index 348c0622..348c0622 100644
--- a/src/aig/llb/llb.c
+++ b/src/proof/llb/llb.c
diff --git a/src/aig/llb/llb.h b/src/proof/llb/llb.h
index e5fa6956..a9bfd891 100644
--- a/src/aig/llb/llb.h
+++ b/src/proof/llb/llb.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __LLB_H__
-#define __LLB_H__
+#ifndef ABC__aig__llb__llb_h
+#define ABC__aig__llb__llb_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/llb/llb1Cluster.c b/src/proof/llb/llb1Cluster.c
index 758994b5..1356e484 100644
--- a/src/aig/llb/llb1Cluster.c
+++ b/src/proof/llb/llb1Cluster.c
@@ -19,7 +19,6 @@
***********************************************************************/
#include "llbInt.h"
-#include "extra.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/llb/llb1Constr.c b/src/proof/llb/llb1Constr.c
index 67fb30ba..67fb30ba 100644
--- a/src/aig/llb/llb1Constr.c
+++ b/src/proof/llb/llb1Constr.c
diff --git a/src/aig/llb/llb1Core.c b/src/proof/llb/llb1Core.c
index ad2c5934..ee697748 100644
--- a/src/aig/llb/llb1Core.c
+++ b/src/proof/llb/llb1Core.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "llbInt.h"
-#include "gia.h"
-#include "giaAig.h"
+#include "src/aig/gia/gia.h"
+#include "src/aig/gia/giaAig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/llb/llb1Group.c b/src/proof/llb/llb1Group.c
index d865c239..c61f3a30 100644
--- a/src/aig/llb/llb1Group.c
+++ b/src/proof/llb/llb1Group.c
@@ -398,7 +398,7 @@ void Llb_ManPrintSpan( Llb_Man_t * p )
if ( Vec_IntEntry(p->vVarBegs, pVar->Id) == i )
Span++;
- SpanMax = ABC_MAX( SpanMax, Span );
+ SpanMax = Abc_MaxInt( SpanMax, Span );
printf( "%d ", Span );
Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vIns, pVar, k )
diff --git a/src/aig/llb/llb1Hint.c b/src/proof/llb/llb1Hint.c
index d8ffecd3..f68030ff 100644
--- a/src/aig/llb/llb1Hint.c
+++ b/src/proof/llb/llb1Hint.c
@@ -110,7 +110,7 @@ Vec_Int_t * Llb_ManCollectHighFanoutObjects( Aig_Man_t * pAig, int nCandMax, int
}
Vec_IntSort( vFanouts, 1 );
// pick the separator
- nCandMax = ABC_MIN( nCandMax, Vec_IntSize(vFanouts) - 1 );
+ nCandMax = Abc_MinInt( nCandMax, Vec_IntSize(vFanouts) - 1 );
PivotValue = Vec_IntEntry( vFanouts, nCandMax );
Vec_IntFree( vFanouts );
// collect obj satisfying the constraints
diff --git a/src/aig/llb/llb1Man.c b/src/proof/llb/llb1Man.c
index f5de25e0..f5de25e0 100644
--- a/src/aig/llb/llb1Man.c
+++ b/src/proof/llb/llb1Man.c
diff --git a/src/aig/llb/llb1Matrix.c b/src/proof/llb/llb1Matrix.c
index 7aa9c744..7aa9c744 100644
--- a/src/aig/llb/llb1Matrix.c
+++ b/src/proof/llb/llb1Matrix.c
diff --git a/src/aig/llb/llb1Pivot.c b/src/proof/llb/llb1Pivot.c
index d42bf659..d42bf659 100644
--- a/src/aig/llb/llb1Pivot.c
+++ b/src/proof/llb/llb1Pivot.c
diff --git a/src/aig/llb/llb1Reach.c b/src/proof/llb/llb1Reach.c
index e427eb24..fbf91351 100644
--- a/src/aig/llb/llb1Reach.c
+++ b/src/proof/llb/llb1Reach.c
@@ -19,7 +19,6 @@
***********************************************************************/
#include "llbInt.h"
-#include "extra.h"
ABC_NAMESPACE_IMPL_START
@@ -497,7 +496,7 @@ Abc_Cex_t * Llb_ManReachDeriveCex( Llb_Man_t * p )
nPiOffset = Saig_ManRegNum(p->pAig) + Saig_ManPiNum(p->pAig) * (Vec_PtrSize(p->vRings) - 1);
Saig_ManForEachPi( p->pAig, pObj, i )
if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
- Aig_InfoSetBit( pCex->pData, nPiOffset + i );
+ Abc_InfoSetBit( pCex->pData, nPiOffset + i );
// write state in terms of NS variables
if ( Vec_PtrSize(p->vRings) > 1 )
@@ -540,7 +539,7 @@ Abc_Cex_t * Llb_ManReachDeriveCex( Llb_Man_t * p )
nPiOffset -= Saig_ManPiNum(p->pAig);
Saig_ManForEachPi( p->pAig, pObj, i )
if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
- Aig_InfoSetBit( pCex->pData, nPiOffset + i );
+ Abc_InfoSetBit( pCex->pData, nPiOffset + i );
// check that we get the init state
if ( v == 0 )
diff --git a/src/aig/llb/llb1Sched.c b/src/proof/llb/llb1Sched.c
index 6bdae42e..6bdae42e 100644
--- a/src/aig/llb/llb1Sched.c
+++ b/src/proof/llb/llb1Sched.c
diff --git a/src/aig/llb/llb2Bad.c b/src/proof/llb/llb2Bad.c
index 9aecb9ff..9aecb9ff 100644
--- a/src/aig/llb/llb2Bad.c
+++ b/src/proof/llb/llb2Bad.c
diff --git a/src/aig/llb/llb2Core.c b/src/proof/llb/llb2Core.c
index 4ecd1cdf..c15574c2 100644
--- a/src/aig/llb/llb2Core.c
+++ b/src/proof/llb/llb2Core.c
@@ -130,7 +130,7 @@ Abc_Cex_t * Llb_CoreDeriveCex( Llb_Img_t * p )
nPiOffset = Saig_ManRegNum(p->pAig) + Saig_ManPiNum(p->pAig) * (Vec_PtrSize(p->vRings) - 1);
Saig_ManForEachPi( p->pAig, pObj, i )
if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
- Aig_InfoSetBit( pCex->pData, nPiOffset + i );
+ Abc_InfoSetBit( pCex->pData, nPiOffset + i );
// write state in terms of NS variables
if ( Vec_PtrSize(p->vRings) > 1 )
@@ -167,7 +167,7 @@ Abc_Cex_t * Llb_CoreDeriveCex( Llb_Img_t * p )
nPiOffset -= Saig_ManPiNum(p->pAig);
Saig_ManForEachPi( p->pAig, pObj, i )
if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
- Aig_InfoSetBit( pCex->pData, nPiOffset + i );
+ Abc_InfoSetBit( pCex->pData, nPiOffset + i );
// check that we get the init state
if ( v == 0 )
diff --git a/src/aig/llb/llb2Driver.c b/src/proof/llb/llb2Driver.c
index 041a39d5..041a39d5 100644
--- a/src/aig/llb/llb2Driver.c
+++ b/src/proof/llb/llb2Driver.c
diff --git a/src/aig/llb/llb2Dump.c b/src/proof/llb/llb2Dump.c
index 3e1dd8c5..74f07922 100644
--- a/src/aig/llb/llb2Dump.c
+++ b/src/proof/llb/llb2Dump.c
@@ -70,7 +70,7 @@ void Llb_ManDumpReached( DdManager * ddG, DdNode * bReached, char * pModel, char
Cudd_ReduceHeap( ddG, CUDD_REORDER_SYMM_SIFT, 1 );
// create input names
- nDigits = Extra_Base10Log( Cudd_ReadSize(ddG) );
+ nDigits = Abc_Base10Log( Cudd_ReadSize(ddG) );
vNamesIn = Vec_PtrAlloc( Cudd_ReadSize(ddG) );
for ( i = 0; i < Cudd_ReadSize(ddG); i++ )
{
diff --git a/src/aig/llb/llb2Flow.c b/src/proof/llb/llb2Flow.c
index 1b177807..ebb4e038 100644
--- a/src/aig/llb/llb2Flow.c
+++ b/src/proof/llb/llb2Flow.c
@@ -1161,7 +1161,7 @@ Vec_Ptr_t * Llb_ManFlowFindBestCut( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t
Vol = Llb_ManCutVolume( p, vLower, vUpper );
assert( Vol > nVolMin );
- VolCmp = ABC_MIN( nVolMin, Vol - nVolMin );
+ VolCmp = Abc_MinInt( nVolMin, Vol - nVolMin );
vCone = Vec_PtrAlloc( 100 );
vSet = Vec_PtrAlloc( 100 );
Llb_ManFlowPrepareCut( p, vLower, vUpper );
@@ -1178,7 +1178,7 @@ Vec_Ptr_t * Llb_ManFlowFindBestCut( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t
VolLower = Llb_ManCutVolume( p, vLower, vMinCut );
VolUpper = Llb_ManCutVolume( p, vMinCut, vUpper );
- Vol = ABC_MIN( VolLower, VolUpper );
+ Vol = Abc_MinInt( VolLower, VolUpper );
if ( Vol >= VolCmp && (iMinCut == -1 ||
iMinCut > Vec_PtrSize(vMinCut) ||
(iMinCut == Vec_PtrSize(vMinCut) && iVolBest < Vol)) )
diff --git a/src/aig/llb/llb2Image.c b/src/proof/llb/llb2Image.c
index 5baa5c57..5baa5c57 100644
--- a/src/aig/llb/llb2Image.c
+++ b/src/proof/llb/llb2Image.c
diff --git a/src/aig/llb/llb3Image.c b/src/proof/llb/llb3Image.c
index 09f2700c..f674d4b1 100644
--- a/src/aig/llb/llb3Image.c
+++ b/src/proof/llb/llb3Image.c
@@ -423,7 +423,7 @@ Extra_bddPrintSupport( p->dd, bCube ); printf( "\n" );
Vec_IntPush( pTemp->vVars, i );
}
}
- p->nSuppMax = ABC_MAX( p->nSuppMax, nSuppSize );
+ p->nSuppMax = Abc_MaxInt( p->nSuppMax, nSuppSize );
// remove variables and collect partitions with singleton variables
vSingles = Vec_PtrAlloc( 0 );
Llb_PartForEachVar( p, pPart1, pVar, i )
@@ -641,7 +641,7 @@ void Llb_NonlinAddPartition( Llb_Mgr_t * p, int i, DdNode * bFunc )
if ( p->pSupp[k] && p->pVars2Q[k] )
Llb_NonlinAddPair( p, bFunc, i, k );
}
- p->nSuppMax = ABC_MAX( p->nSuppMax, nSuppSize );
+ p->nSuppMax = Abc_MaxInt( p->nSuppMax, nSuppSize );
}
/**Function*************************************************************
diff --git a/src/aig/llb/llb3Nonlin.c b/src/proof/llb/llb3Nonlin.c
index e20a1541..45f6f11e 100644
--- a/src/aig/llb/llb3Nonlin.c
+++ b/src/proof/llb/llb3Nonlin.c
@@ -118,11 +118,11 @@ if ( fVerbose )
printf( "Size1 =%6d ", Size1 );
Cudd_RecursiveDeref( dd, bCof );
- iValue = ABC_MAX(Size0, Size1) - ABC_MIN(Size0, Size1) + Size0 + Size1 - Size;
+ iValue = Abc_MaxInt(Size0, Size1) - Abc_MinInt(Size0, Size1) + Size0 + Size1 - Size;
if ( fVerbose )
printf( "D =%6d ", Size0 + Size1 - Size );
if ( fVerbose )
-printf( "B =%6d ", ABC_MAX(Size0, Size1) - ABC_MIN(Size0, Size1) );
+printf( "B =%6d ", Abc_MaxInt(Size0, Size1) - Abc_MinInt(Size0, Size1) );
if ( fVerbose )
printf( "S =%6d\n", iValue );
if ( Size0 > 1 && Size1 > 1 && iValueBest > iValue )
@@ -286,7 +286,7 @@ Abc_Cex_t * Llb_NonlinDeriveCex( Llb_Mnn_t * p )
nPiOffset = Saig_ManRegNum(p->pAig) + Saig_ManPiNum(p->pAig) * (Vec_PtrSize(p->vRings) - 1);
Saig_ManForEachPi( p->pAig, pObj, i )
if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
- Aig_InfoSetBit( pCex->pData, nPiOffset + i );
+ Abc_InfoSetBit( pCex->pData, nPiOffset + i );
// write state in terms of NS variables
if ( Vec_PtrSize(p->vRings) > 1 )
@@ -324,7 +324,7 @@ Abc_Cex_t * Llb_NonlinDeriveCex( Llb_Mnn_t * p )
nPiOffset -= Saig_ManPiNum(p->pAig);
Saig_ManForEachPi( p->pAig, pObj, i )
if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
- Aig_InfoSetBit( pCex->pData, nPiOffset + i );
+ Abc_InfoSetBit( pCex->pData, nPiOffset + i );
// check that we get the init state
if ( v == 0 )
@@ -407,7 +407,7 @@ int Llb_NonlinCompPerms( DdManager * dd, int * pVar2Lev )
pSubt = &(dd->subtables[dd->perm[i]]);
if ( pSubt->keys == pSubt->dead + 1 )
continue;
- Entry = ABC_MAX(dd->perm[i], pVar2Lev[i]) - ABC_MIN(dd->perm[i], pVar2Lev[i]);
+ Entry = Abc_MaxInt(dd->perm[i], pVar2Lev[i]) - Abc_MinInt(dd->perm[i], pVar2Lev[i]);
Sum += Entry;
//printf( "%d-%d(%d) ", dd->perm[i], pV2L[i], Entry );
}
diff --git a/src/aig/llb/llb4Cex.c b/src/proof/llb/llb4Cex.c
index 4f06b8c6..a68be711 100644
--- a/src/aig/llb/llb4Cex.c
+++ b/src/proof/llb/llb4Cex.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "llbInt.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
ABC_NAMESPACE_IMPL_START
@@ -97,9 +97,9 @@ Abc_Cex_t * Llb4_Nonlin4TransformCex( Aig_Man_t * pAig, Vec_Ptr_t * vStates, int
// create assumptions
Vec_IntClear( vAssumps );
Saig_ManForEachLo( pAig, pObj, k )
- Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !Aig_InfoHasBit(pThis,k) ) );
+ Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !Abc_InfoHasBit(pThis,k) ) );
Saig_ManForEachLi( pAig, pObj, k )
- Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !Aig_InfoHasBit(pNext,k) ) );
+ Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !Abc_InfoHasBit(pNext,k) ) );
// solve SAT problem
status = sat_solver_solve( pSat, Vec_IntArray(vAssumps), Vec_IntArray(vAssumps) + Vec_IntSize(vAssumps),
(ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
@@ -116,7 +116,7 @@ Abc_Cex_t * Llb4_Nonlin4TransformCex( Aig_Man_t * pAig, Vec_Ptr_t * vStates, int
// get the assignment of PIs
Saig_ManForEachPi( pAig, pObj, k )
if ( sat_solver_var_value(pSat, pCnf->pVarNums[Aig_ObjId(pObj)]) )
- Aig_InfoSetBit( pCex->pData, iBit + k );
+ Abc_InfoSetBit( pCex->pData, iBit + k );
// update the counter
iBit += Saig_ManPiNum(pAig);
pThis = pNext;
@@ -150,7 +150,7 @@ Abc_Cex_t * Llb4_Nonlin4TransformCex( Aig_Man_t * pAig, Vec_Ptr_t * vStates, int
// create assumptions
Vec_IntClear( vAssumps );
Saig_ManForEachLo( pAig, pObj, k )
- Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !Aig_InfoHasBit(pThis,k) ) );
+ Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !Abc_InfoHasBit(pThis,k) ) );
// solve the last frame
status = sat_solver_solve( pSat, Vec_IntArray(vAssumps), Vec_IntArray(vAssumps) + Vec_IntSize(vAssumps),
(ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
@@ -166,7 +166,7 @@ Abc_Cex_t * Llb4_Nonlin4TransformCex( Aig_Man_t * pAig, Vec_Ptr_t * vStates, int
// get the assignment of PIs
Saig_ManForEachPi( pAig, pObj, k )
if ( sat_solver_var_value(pSat, pCnf->pVarNums[Aig_ObjId(pObj)]) )
- Aig_InfoSetBit( pCex->pData, iBit + k );
+ Abc_InfoSetBit( pCex->pData, iBit + k );
iBit += Saig_ManPiNum(pAig);
assert( iBit == pCex->nBits );
@@ -209,13 +209,13 @@ Vec_Ptr_t * Llb4_Nonlin4VerifyCex( Aig_Man_t * pAig, Abc_Cex_t * p )
Aig_Obj_t * pObj, * pObjRi, * pObjRo;
int i, k, iBit = 0;
// create storage for states
- vStates = Vec_PtrAllocSimInfo( p->iFrame+1, Aig_BitWordNum(Aig_ManRegNum(pAig)) );
- Vec_PtrCleanSimInfo( vStates, 0, Aig_BitWordNum(Aig_ManRegNum(pAig)) );
+ vStates = Vec_PtrAllocSimInfo( p->iFrame+1, Abc_BitWordNum(Aig_ManRegNum(pAig)) );
+ Vec_PtrCleanSimInfo( vStates, 0, Abc_BitWordNum(Aig_ManRegNum(pAig)) );
// verify counter-example
Aig_ManCleanMarkB(pAig);
Aig_ManConst1(pAig)->fMarkB = 1;
Saig_ManForEachLo( pAig, pObj, i )
- pObj->fMarkB = 0; //Aig_InfoHasBit(p->pData, iBit++);
+ pObj->fMarkB = 0; //Abc_InfoHasBit(p->pData, iBit++);
// do not require equal flop count in the AIG and in the CEX
iBit = p->nRegs;
for ( i = 0; i <= p->iFrame; i++ )
@@ -223,10 +223,10 @@ Vec_Ptr_t * Llb4_Nonlin4VerifyCex( Aig_Man_t * pAig, Abc_Cex_t * p )
// save current state
Saig_ManForEachLo( pAig, pObj, k )
if ( pObj->fMarkB )
- Aig_InfoSetBit( (unsigned *)Vec_PtrEntry(vStates, i), k );
+ Abc_InfoSetBit( (unsigned *)Vec_PtrEntry(vStates, i), k );
// compute new state
Saig_ManForEachPi( pAig, pObj, k )
- pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+ pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
Aig_ManForEachNode( pAig, pObj, k )
pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) &
(Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj));
diff --git a/src/aig/llb/llb4Cluster.c b/src/proof/llb/llb4Cluster.c
index 8d29eed4..8d29eed4 100644
--- a/src/aig/llb/llb4Cluster.c
+++ b/src/proof/llb/llb4Cluster.c
diff --git a/src/aig/llb/llb4Image.c b/src/proof/llb/llb4Image.c
index 031c8830..91eb62f8 100644
--- a/src/aig/llb/llb4Image.c
+++ b/src/proof/llb/llb4Image.c
@@ -391,7 +391,7 @@ liveEnd = p->dd->keys - p->dd->dead;
Vec_IntPush( pTemp->vVars, i );
}
}
- p->nSuppMax = ABC_MAX( p->nSuppMax, nSuppSize );
+ p->nSuppMax = Abc_MaxInt( p->nSuppMax, nSuppSize );
// remove variables and collect partitions with singleton variables
vSingles = Vec_PtrAlloc( 0 );
Llb_PartForEachVar( p, pPart1, pVar, i )
@@ -548,7 +548,7 @@ void Llb_Nonlin4AddPartition( Llb_Mgr_t * p, int i, DdNode * bFunc )
if ( p->pSupp[k] && Vec_IntEntry(p->vVars2Q, k) )
Llb_Nonlin4AddPair( p, i, k );
}
- p->nSuppMax = ABC_MAX( p->nSuppMax, nSuppSize );
+ p->nSuppMax = Abc_MaxInt( p->nSuppMax, nSuppSize );
}
/**Function*************************************************************
diff --git a/src/aig/llb/llb4Map.c b/src/proof/llb/llb4Map.c
index 9dabb19d..b1442699 100644
--- a/src/aig/llb/llb4Map.c
+++ b/src/proof/llb/llb4Map.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "llbInt.h"
-#include "abc.h"
-#include "if.h"
+#include "src/base/abc/abc.h"
+#include "src/map/if/if.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/llb/llb4Nonlin.c b/src/proof/llb/llb4Nonlin.c
index b29796f1..33c6b3f7 100644
--- a/src/aig/llb/llb4Nonlin.c
+++ b/src/proof/llb/llb4Nonlin.c
@@ -501,7 +501,7 @@ void Llb_Nonlin4RecordState( Aig_Man_t * pAig, Vec_Int_t * vOrder, unsigned * pS
int i;
Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
if ( pValues[Llb_ObjBddVar(vOrder, fBackward? pObjLi : pObjLo)] == 1 )
- Aig_InfoSetBit( pState, i );
+ Abc_InfoSetBit( pState, i );
}
/**Function*************************************************************
@@ -573,8 +573,8 @@ Vec_Ptr_t * Llb_Nonlin4DeriveCex( Llb_Mnx_t * p, int fBackward, int fVerbose )
p->dd->TimeStop = 0;
// start the state set
- vStates = Vec_PtrAllocSimInfo( Vec_PtrSize(p->vRings), Aig_BitWordNum(Aig_ManRegNum(p->pAig)) );
- Vec_PtrCleanSimInfo( vStates, 0, Aig_BitWordNum(Aig_ManRegNum(p->pAig)) );
+ vStates = Vec_PtrAllocSimInfo( Vec_PtrSize(p->vRings), Abc_BitWordNum(Aig_ManRegNum(p->pAig)) );
+ Vec_PtrCleanSimInfo( vStates, 0, Abc_BitWordNum(Aig_ManRegNum(p->pAig)) );
if ( fBackward )
Vec_PtrReverseOrder( vStates );
diff --git a/src/aig/llb/llb4Sweep.c b/src/proof/llb/llb4Sweep.c
index d13c366f..d13c366f 100644
--- a/src/aig/llb/llb4Sweep.c
+++ b/src/proof/llb/llb4Sweep.c
diff --git a/src/aig/llb/llbInt.h b/src/proof/llb/llbInt.h
index 4bc2496d..d81aadcf 100644
--- a/src/aig/llb/llbInt.h
+++ b/src/proof/llb/llbInt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __LLB_INT_H__
-#define __LLB_INT_H__
+#ifndef ABC__aig__llb__llbInt_h
+#define ABC__aig__llb__llbInt_h
////////////////////////////////////////////////////////////////////////
@@ -27,11 +27,10 @@
////////////////////////////////////////////////////////////////////////
#include <stdio.h>
-#include "aig.h"
-#include "saig.h"
-#include "ssw.h"
-#include "cuddInt.h"
-#include "extra.h"
+#include "src/aig/aig/aig.h"
+#include "src/aig/saig/saig.h"
+#include "src/proof/ssw/ssw.h"
+#include "src/misc/extra/extraBdd.h"
#include "llb.h"
////////////////////////////////////////////////////////////////////////
diff --git a/src/proof/llb/module.make b/src/proof/llb/module.make
new file mode 100644
index 00000000..849a9e0e
--- /dev/null
+++ b/src/proof/llb/module.make
@@ -0,0 +1,23 @@
+SRC += src/proof/llb/llb.c \
+ src/proof/llb/llb1Cluster.c \
+ src/proof/llb/llb1Constr.c \
+ src/proof/llb/llb1Core.c \
+ src/proof/llb/llb1Group.c \
+ src/proof/llb/llb1Hint.c \
+ src/proof/llb/llb1Man.c \
+ src/proof/llb/llb1Matrix.c \
+ src/proof/llb/llb1Pivot.c \
+ src/proof/llb/llb1Reach.c \
+ src/proof/llb/llb1Sched.c \
+ src/proof/llb/llb2Bad.c \
+ src/proof/llb/llb2Core.c \
+ src/proof/llb/llb2Driver.c \
+ src/proof/llb/llb2Dump.c \
+ src/proof/llb/llb2Flow.c \
+ src/proof/llb/llb2Image.c \
+ src/proof/llb/llb3Image.c \
+ src/proof/llb/llb3Nonlin.c \
+ src/proof/llb/llb4Cex.c \
+ src/proof/llb/llb4Image.c \
+ src/proof/llb/llb4Nonlin.c \
+ src/proof/llb/llb4Sweep.c
diff --git a/src/proof/pdr/module.make b/src/proof/pdr/module.make
new file mode 100644
index 00000000..93fd8071
--- /dev/null
+++ b/src/proof/pdr/module.make
@@ -0,0 +1,8 @@
+SRC += src/proof/pdr/pdr.c \
+ src/proof/pdr/pdrCnf.c \
+ src/proof/pdr/pdrCore.c \
+ src/proof/pdr/pdrInv.c \
+ src/proof/pdr/pdrMan.c \
+ src/proof/pdr/pdrSat.c \
+ src/proof/pdr/pdrTsim.c \
+ src/proof/pdr/pdrUtil.c
diff --git a/src/sat/pdr/pdr.c b/src/proof/pdr/pdr.c
index 6bdf75b5..6bdf75b5 100644
--- a/src/sat/pdr/pdr.c
+++ b/src/proof/pdr/pdr.c
diff --git a/src/sat/pdr/pdr.h b/src/proof/pdr/pdr.h
index 03854509..4f0f769e 100644
--- a/src/sat/pdr/pdr.h
+++ b/src/proof/pdr/pdr.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __PDR_H__
-#define __PDR_H__
+#ifndef ABC__sat__pdr__pdr_h
+#define ABC__sat__pdr__pdr_h
ABC_NAMESPACE_HEADER_START
diff --git a/src/sat/pdr/pdrClass.c b/src/proof/pdr/pdrClass.c
index 3e990958..519384c5 100644
--- a/src/sat/pdr/pdrClass.c
+++ b/src/proof/pdr/pdrClass.c
@@ -50,8 +50,8 @@ Aig_Man_t * Pdr_ManRehashWithMap( Aig_Man_t * pAig, Vec_Int_t * vMap )
assert( Vec_IntSize(vMap) == Aig_ManRegNum(pAig) );
// start the fraig package
pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) );
- pFrames->pName = Aig_UtilStrsav( pAig->pName );
- pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+ pFrames->pName = Abc_UtilStrsav( pAig->pName );
+ pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
// create CI mapping
Aig_ManCleanData( pAig );
Aig_ManConst1(pAig)->pData = Aig_ManConst1(pFrames);
diff --git a/src/sat/pdr/pdrCnf.c b/src/proof/pdr/pdrCnf.c
index fddd292b..fddd292b 100644
--- a/src/sat/pdr/pdrCnf.c
+++ b/src/proof/pdr/pdrCnf.c
diff --git a/src/sat/pdr/pdrCore.c b/src/proof/pdr/pdrCore.c
index 025ada06..025ada06 100644
--- a/src/sat/pdr/pdrCore.c
+++ b/src/proof/pdr/pdrCore.c
diff --git a/src/sat/pdr/pdrInt.h b/src/proof/pdr/pdrInt.h
index f49ee7d0..baf4ca02 100644
--- a/src/sat/pdr/pdrInt.h
+++ b/src/proof/pdr/pdrInt.h
@@ -18,16 +18,16 @@
***********************************************************************/
-#ifndef __PDR_INT_H__
-#define __PDR_INT_H__
+#ifndef ABC__sat__pdr__pdrInt_h
+#define ABC__sat__pdr__pdrInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/aig/saig/saig.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
#include "pdr.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/sat/pdr/pdrInv.c b/src/proof/pdr/pdrInv.c
index 2f630e28..30d1145d 100644
--- a/src/sat/pdr/pdrInv.c
+++ b/src/proof/pdr/pdrInv.c
@@ -18,11 +18,9 @@
***********************************************************************/
-#include "abc.h" // for Abc_NtkCollectCioNames()
-#include "main.h" // for Abc_FrameReadGlobalFrame()
-
#include "pdrInt.h"
-#include "extra.h"
+#include "src/base/abc/abc.h" // for Abc_NtkCollectCioNames()
+#include "src/base/main/main.h" // for Abc_FrameReadGlobalFrame()
ABC_NAMESPACE_IMPL_START
@@ -56,9 +54,9 @@ void Pdr_ManPrintProgress( Pdr_Man_t * p, int fClose, int Time )
// count the total length of the printout
Length = 0;
Vec_VecForEachLevel( p->vClauses, vVec, i )
- Length += 1 + Extra_Base10Log(Vec_PtrSize(vVec)+1);
+ Length += 1 + Abc_Base10Log(Vec_PtrSize(vVec)+1);
// determine the starting point
- LengthStart = ABC_MAX( 0, Length - 70 );
+ LengthStart = Abc_MaxInt( 0, Length - 70 );
printf( "%3d :", Vec_PtrSize(p->vSolvers)-1 );
ThisSize = 6;
if ( LengthStart > 0 )
@@ -71,12 +69,12 @@ void Pdr_ManPrintProgress( Pdr_Man_t * p, int fClose, int Time )
{
if ( Length < LengthStart )
{
- Length += 1 + Extra_Base10Log(Vec_PtrSize(vVec)+1);
+ Length += 1 + Abc_Base10Log(Vec_PtrSize(vVec)+1);
continue;
}
printf( " %d", Vec_PtrSize(vVec) );
- Length += 1 + Extra_Base10Log(Vec_PtrSize(vVec)+1);
- ThisSize += 1 + Extra_Base10Log(Vec_PtrSize(vVec)+1);
+ Length += 1 + Abc_Base10Log(Vec_PtrSize(vVec)+1);
+ ThisSize += 1 + Abc_Base10Log(Vec_PtrSize(vVec)+1);
}
if ( fClose )
{
diff --git a/src/sat/pdr/pdrMan.c b/src/proof/pdr/pdrMan.c
index 95a38efb..33c94d40 100644
--- a/src/sat/pdr/pdrMan.c
+++ b/src/proof/pdr/pdrMan.c
@@ -179,7 +179,7 @@ Abc_Cex_t * Pdr_ManDeriveCex( Pdr_Man_t * p )
if ( lit_sign(Lit) )
continue;
assert( lit_var(Lit) < pCex->nPis );
- Aig_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + lit_var(Lit) );
+ Abc_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + lit_var(Lit) );
}
assert( f == nFrames );
return pCex;
diff --git a/src/sat/pdr/pdrSat.c b/src/proof/pdr/pdrSat.c
index cc4c2b1b..c191654a 100644
--- a/src/sat/pdr/pdrSat.c
+++ b/src/proof/pdr/pdrSat.c
@@ -151,7 +151,7 @@ Vec_Int_t * Pdr_ManCubeToLits( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, int fCom
else
pObj = Saig_ManLo( p->pAig, lit_var(pCube->Lits[i]) );
iVar = Pdr_ObjSatVar( p, k, pObj ); assert( iVar >= 0 );
- iVarMax = ABC_MAX( iVarMax, iVar );
+ iVarMax = Abc_MaxInt( iVarMax, iVar );
Vec_IntPush( p->vLits, toLitCond( iVar, fCompl ^ lit_sign(pCube->Lits[i]) ) );
}
// sat_solver_setnvars( Pdr_ManSolver(p, k), iVarMax + 1 );
diff --git a/src/sat/pdr/pdrTsim.c b/src/proof/pdr/pdrTsim.c
index 6fec1605..6fec1605 100644
--- a/src/sat/pdr/pdrTsim.c
+++ b/src/proof/pdr/pdrTsim.c
diff --git a/src/sat/pdr/pdrUtil.c b/src/proof/pdr/pdrUtil.c
index 1107aec7..17383425 100644
--- a/src/sat/pdr/pdrUtil.c
+++ b/src/proof/pdr/pdrUtil.c
@@ -617,11 +617,11 @@ int Pdr_NtkFindSatAssign_rec( Aig_Man_t * pAig, Aig_Obj_t * pNode, int Value, Pd
if ( Aig_ObjIsPi(pNode) )
{
// if ( vSuppLits )
-// Vec_IntPush( vSuppLits, Aig_Var2Lit( Aig_ObjPioNum(pNode), !Value ) );
+// Vec_IntPush( vSuppLits, Abc_Var2Lit( Aig_ObjPioNum(pNode), !Value ) );
if ( Saig_ObjIsLo(pAig, pNode) )
{
-// pCube->Lits[pCube->nLits++] = Aig_Var2Lit( Aig_ObjPioNum(pNode) - Saig_ManPiNum(pAig), !Value );
- pCube->Lits[pCube->nLits++] = Aig_Var2Lit( Aig_ObjPioNum(pNode) - Saig_ManPiNum(pAig), Value );
+// pCube->Lits[pCube->nLits++] = Abc_Var2Lit( Aig_ObjPioNum(pNode) - Saig_ManPiNum(pAig), !Value );
+ pCube->Lits[pCube->nLits++] = Abc_Var2Lit( Aig_ObjPioNum(pNode) - Saig_ManPiNum(pAig), Value );
pCube->Sign |= ((word)1 << (pCube->Lits[pCube->nLits-1] % 63));
}
return 1;
diff --git a/src/proof/ssw/module.make b/src/proof/ssw/module.make
new file mode 100644
index 00000000..58345a1b
--- /dev/null
+++ b/src/proof/ssw/module.make
@@ -0,0 +1,20 @@
+SRC += src/proof/ssw/sswAig.c \
+ src/proof/ssw/sswBmc.c \
+ src/proof/ssw/sswClass.c \
+ src/proof/ssw/sswCnf.c \
+ src/proof/ssw/sswConstr.c \
+ src/proof/ssw/sswCore.c \
+ src/proof/ssw/sswDyn.c \
+ src/proof/ssw/sswFilter.c \
+ src/proof/ssw/sswIslands.c \
+ src/proof/ssw/sswLcorr.c \
+ src/proof/ssw/sswMan.c \
+ src/proof/ssw/sswPart.c \
+ src/proof/ssw/sswPairs.c \
+ src/proof/ssw/sswRarity.c \
+ src/proof/ssw/sswSat.c \
+ src/proof/ssw/sswSemi.c \
+ src/proof/ssw/sswSim.c \
+ src/proof/ssw/sswSimSat.c \
+ src/proof/ssw/sswSweep.c \
+ src/proof/ssw/sswUnique.c
diff --git a/src/aig/ssw/ssw.h b/src/proof/ssw/ssw.h
index 22b6c6e5..4680f6fb 100644
--- a/src/aig/ssw/ssw.h
+++ b/src/proof/ssw/ssw.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __SSW_H__
-#define __SSW_H__
+#ifndef ABC__aig__ssw__ssw_h
+#define ABC__aig__ssw__ssw_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/ssw/sswAig.c b/src/proof/ssw/sswAig.c
index f3174470..8ab99f83 100644
--- a/src/aig/ssw/sswAig.c
+++ b/src/proof/ssw/sswAig.c
@@ -221,7 +221,7 @@ Aig_Man_t * Ssw_SpeculativeReduction( Ssw_Man_t * p )
// start the fraig package
pFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * p->nFrames );
- pFrames->pName = Aig_UtilStrsav( p->pAig->pName );
+ pFrames->pName = Abc_UtilStrsav( p->pAig->pName );
// map constants and PIs
Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), 0, Aig_ManConst1(pFrames) );
Saig_ManForEachPi( p->pAig, pObj, i )
diff --git a/src/aig/ssw/sswBmc.c b/src/proof/ssw/sswBmc.c
index d565d5d3..8cb14f4a 100644
--- a/src/aig/ssw/sswBmc.c
+++ b/src/proof/ssw/sswBmc.c
@@ -106,7 +106,7 @@ Abc_Cex_t * Ssw_BmcGetCounterExample( Ssw_Frm_t * pFrm, Ssw_Sat_t * pSat, int iP
if ( pObjFrames == NULL )
continue;
if ( Ssw_CnfGetNodeValue( pSat, pObjFrames ) )
- Aig_InfoSetBit( pCex->pData, nShift + i );
+ Abc_InfoSetBit( pCex->pData, nShift + i );
}
return pCex;
}
diff --git a/src/aig/ssw/sswClass.c b/src/proof/ssw/sswClass.c
index 51514f47..dd075f44 100644
--- a/src/aig/ssw/sswClass.c
+++ b/src/proof/ssw/sswClass.c
@@ -505,7 +505,7 @@ int Ssw_ClassesPrepareRehash( Ssw_Cla_t * p, Vec_Ptr_t * vCands, int fConstCorr
int i, k, nTableSize, nNodes, iEntry, nEntries, nEntries2;
// allocate the hash table hashing simulation info into nodes
- nTableSize = Aig_PrimeCudd( Vec_PtrSize(vCands)/2 );
+ nTableSize = Abc_PrimeCudd( Vec_PtrSize(vCands)/2 );
ppTable = ABC_CALLOC( Aig_Obj_t *, nTableSize );
ppNexts = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) );
@@ -603,7 +603,7 @@ Ssw_Cla_t * Ssw_ClassesPrepare( Aig_Man_t * pAig, int nFramesK, int fLatchCorr,
// int nWords = 4;
// int nIters = 0;
- int nFrames = ABC_MAX( nFramesK, 4 );
+ int nFrames = Abc_MaxInt( nFramesK, 4 );
int nWords = 2;
int nIters = 16;
Ssw_Cla_t * p;
diff --git a/src/aig/ssw/sswCnf.c b/src/proof/ssw/sswCnf.c
index 1970c62f..1970c62f 100644
--- a/src/aig/ssw/sswCnf.c
+++ b/src/proof/ssw/sswCnf.c
diff --git a/src/aig/ssw/sswConstr.c b/src/proof/ssw/sswConstr.c
index 6af312ab..239e35b9 100644
--- a/src/aig/ssw/sswConstr.c
+++ b/src/proof/ssw/sswConstr.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "sswInt.h"
-#include "cnf.h"
-#include "bar.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/misc/bar/bar.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/ssw/sswCore.c b/src/proof/ssw/sswCore.c
index 0b2393df..df48a5b8 100644
--- a/src/aig/ssw/sswCore.c
+++ b/src/proof/ssw/sswCore.c
@@ -353,8 +353,8 @@ clk = clock();
nSatFailsReal = p->nSatFailsReal;
nUniques = p->nUniques;
- p->nVarsMax = ABC_MAX( p->nVarsMax, p->pMSat->nSatVars );
- p->nCallsMax = ABC_MAX( p->nCallsMax, p->pMSat->nSolverCalls );
+ p->nVarsMax = Abc_MaxInt( p->nVarsMax, p->pMSat->nSatVars );
+ p->nCallsMax = Abc_MaxInt( p->nCallsMax, p->pMSat->nSolverCalls );
Ssw_SatStop( p->pMSat );
p->pMSat = NULL;
Ssw_ManCleanup( p );
diff --git a/src/aig/ssw/sswDyn.c b/src/proof/ssw/sswDyn.c
index 7bdb2652..d9a16e22 100644
--- a/src/aig/ssw/sswDyn.c
+++ b/src/proof/ssw/sswDyn.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "sswInt.h"
-#include "bar.h"
+#include "src/misc/bar/bar.h"
ABC_NAMESPACE_IMPL_START
@@ -441,8 +441,8 @@ p->timeReduce += clock() - clk;
// replace the solver
if ( p->pMSat )
{
- p->nVarsMax = ABC_MAX( p->nVarsMax, p->pMSat->nSatVars );
- p->nCallsMax = ABC_MAX( p->nCallsMax, p->pMSat->nSolverCalls );
+ p->nVarsMax = Abc_MaxInt( p->nVarsMax, p->pMSat->nSatVars );
+ p->nCallsMax = Abc_MaxInt( p->nCallsMax, p->pMSat->nSolverCalls );
Ssw_SatStop( p->pMSat );
p->nRecycles++;
p->nRecyclesTotal++;
diff --git a/src/aig/ssw/sswFilter.c b/src/proof/ssw/sswFilter.c
index 7298c5f8..380ac7e5 100644
--- a/src/aig/ssw/sswFilter.c
+++ b/src/proof/ssw/sswFilter.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "sswInt.h"
-#include "giaAig.h"
+#include "src/aig/gia/giaAig.h"
ABC_NAMESPACE_IMPL_START
@@ -50,7 +50,7 @@ void Ssw_ManRefineByFilterSim( Ssw_Man_t * p, int nFrames )
assert( nFrames > 0 );
// assign register outputs
Saig_ManForEachLi( p->pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
+ pObj->fMarkB = Abc_InfoHasBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
// simulate the timeframes
for ( f = 0; f < nFrames; f++ )
{
@@ -100,7 +100,7 @@ void Ssw_ManRollForward( Ssw_Man_t * p, int nFrames )
assert( nFrames > 0 );
// assign register outputs
Saig_ManForEachLi( p->pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
+ pObj->fMarkB = Abc_InfoHasBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
// simulate the timeframes
for ( f = 0; f < nFrames; f++ )
{
@@ -120,8 +120,8 @@ void Ssw_ManRollForward( Ssw_Man_t * p, int nFrames )
}
// record the new pattern
Saig_ManForEachLi( p->pAig, pObj, i )
- if ( pObj->fMarkB ^ Aig_InfoHasBit(p->pPatWords, Saig_ManPiNum(p->pAig) + i) )
- Aig_InfoXorBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
+ if ( pObj->fMarkB ^ Abc_InfoHasBit(p->pPatWords, Saig_ManPiNum(p->pAig) + i) )
+ Abc_InfoXorBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
}
/**Function*************************************************************
@@ -149,7 +149,7 @@ void Ssw_ManFindStartingState( Ssw_Man_t * p, Abc_Cex_t * pCex )
// set the PI simulation information
Aig_ManConst1(p->pAig)->fMarkB = 1;
Saig_ManForEachPi( p->pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit( pCex->pData, iBit++ );
+ pObj->fMarkB = Abc_InfoHasBit( pCex->pData, iBit++ );
Saig_ManForEachLiLo( p->pAig, pObjLi, pObj, i )
pObj->fMarkB = pObjLi->fMarkB;
// simulate internal nodes
@@ -167,8 +167,8 @@ void Ssw_ManFindStartingState( Ssw_Man_t * p, Abc_Cex_t * pCex )
// printf( "The counter-example does not refine the output.\n" );
// record the new pattern
Saig_ManForEachLo( p->pAig, pObj, i )
- if ( pObj->fMarkB ^ Aig_InfoHasBit(p->pPatWords, Saig_ManPiNum(p->pAig) + i) )
- Aig_InfoXorBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
+ if ( pObj->fMarkB ^ Abc_InfoHasBit(p->pPatWords, Saig_ManPiNum(p->pAig) + i) )
+ Abc_InfoXorBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
}
/**Function*************************************************************
@@ -283,7 +283,7 @@ int Ssw_ManSweepBmcFilter( Ssw_Man_t * p, int TimeLimit )
p->pFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * p->pPars->nFramesK );
Saig_ManForEachLo( p->pAig, pObj, i )
{
- if ( Aig_InfoHasBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i ) )
+ if ( Abc_InfoHasBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i ) )
{
Ssw_ObjSetFrame( p, pObj, 0, Aig_ManConst1(p->pFrames) );
//printf( "1" );
@@ -433,7 +433,7 @@ void Ssw_SignalFilter( Aig_Man_t * pAig, int nFramesMax, int nConfMax, int nRoun
if ( TimeLimit2 )
{
if ( TimeLimitPart )
- TimeLimitPart = ABC_MIN( TimeLimitPart, TimeLimit2 );
+ TimeLimitPart = Abc_MinInt( TimeLimitPart, TimeLimit2 );
else
TimeLimitPart = TimeLimit2;
}
diff --git a/src/aig/ssw/sswInt.h b/src/proof/ssw/sswInt.h
index 15756782..acd273fd 100644
--- a/src/aig/ssw/sswInt.h
+++ b/src/proof/ssw/sswInt.h
@@ -18,18 +18,18 @@
***********************************************************************/
-#ifndef __SSW_INT_H__
-#define __SSW_INT_H__
+#ifndef ABC__aig__ssw__sswInt_h
+#define ABC__aig__ssw__sswInt_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "saig.h"
-#include "satSolver.h"
+#include "src/aig/saig/saig.h"
+#include "src/sat/bsat/satSolver.h"
#include "ssw.h"
-#include "ioa.h"
+#include "src/aig/ioa/ioa.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/aig/ssw/sswIslands.c b/src/proof/ssw/sswIslands.c
index 0802aca5..0802aca5 100644
--- a/src/aig/ssw/sswIslands.c
+++ b/src/proof/ssw/sswIslands.c
diff --git a/src/aig/ssw/sswLcorr.c b/src/proof/ssw/sswLcorr.c
index 7cd94727..ce9c2563 100644
--- a/src/aig/ssw/sswLcorr.c
+++ b/src/proof/ssw/sswLcorr.c
@@ -117,7 +117,7 @@ void Ssw_SmlAddPattern( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pCand )
if ( Value == 0 )
continue;
pInfo = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjPioNum(pObj) );
- Aig_InfoSetBit( pInfo, p->nPatterns );
+ Abc_InfoSetBit( pInfo, p->nPatterns );
}
}
@@ -303,8 +303,8 @@ int Ssw_ManSweepLatch( Ssw_Man_t * p )
p->pMSat->nSatVars > p->pPars->nSatVarMax &&
p->nRecycleCalls > p->pPars->nRecycleCalls )
{
- p->nVarsMax = ABC_MAX( p->nVarsMax, p->pMSat->nSatVars );
- p->nCallsMax = ABC_MAX( p->nCallsMax, p->pMSat->nSolverCalls );
+ p->nVarsMax = Abc_MaxInt( p->nVarsMax, p->pMSat->nSatVars );
+ p->nCallsMax = Abc_MaxInt( p->nCallsMax, p->pMSat->nSolverCalls );
Ssw_SatStop( p->pMSat );
p->pMSat = Ssw_SatStart( 0 );
p->nRecycles++;
diff --git a/src/aig/ssw/sswMan.c b/src/proof/ssw/sswMan.c
index 0f1317e1..c635569d 100644
--- a/src/aig/ssw/sswMan.c
+++ b/src/proof/ssw/sswMan.c
@@ -59,7 +59,7 @@ Ssw_Man_t * Ssw_ManCreate( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
p->vCommon = Vec_PtrAlloc( 100 );
p->iOutputLit = -1;
// allocate storage for sim pattern
- p->nPatWords = Aig_BitWordNum( Saig_ManPiNum(pAig) * p->nFrames + Saig_ManRegNum(pAig) );
+ p->nPatWords = Abc_BitWordNum( Saig_ManPiNum(pAig) * p->nFrames + Saig_ManRegNum(pAig) );
p->pPatWords = ABC_CALLOC( unsigned, p->nPatWords );
// other
p->vNewLos = Vec_PtrAlloc( 100 );
diff --git a/src/aig/ssw/sswPairs.c b/src/proof/ssw/sswPairs.c
index 0aba942f..0aba942f 100644
--- a/src/aig/ssw/sswPairs.c
+++ b/src/proof/ssw/sswPairs.c
diff --git a/src/aig/ssw/sswPart.c b/src/proof/ssw/sswPart.c
index 8a0e69da..d2f07dc8 100644
--- a/src/aig/ssw/sswPart.c
+++ b/src/proof/ssw/sswPart.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "sswInt.h"
-#include "ioa.h"
+#include "src/aig/ioa/ioa.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/ssw/sswRarity.c b/src/proof/ssw/sswRarity.c
index 5480afb5..264bb2c8 100644
--- a/src/aig/ssw/sswRarity.c
+++ b/src/proof/ssw/sswRarity.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "sswInt.h"
-#include "giaAig.h"
+#include "src/aig/gia/giaAig.h"
ABC_NAMESPACE_IMPL_START
@@ -173,8 +173,8 @@ Abc_Cex_t * Ssw_RarDeriveCex( Ssw_RarMan_t * p, int iFrame, int iPo, int iPatFin
Saig_ManForEachPi( p->pAig, pObj, i )
{
pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
- if ( Aig_InfoHasBit( (unsigned *)pSim, iPatThis ) )
- Aig_InfoSetBit( pCex->pData, iBit );
+ if ( Abc_InfoHasBit( (unsigned *)pSim, iPatThis ) )
+ Abc_InfoSetBit( pCex->pData, iBit );
iBit++;
}
}
@@ -784,7 +784,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
// set the flops
pPattern = (unsigned *)Ssw_RarPatSim( p, iPatBest );
for ( k = 0; k < Aig_ManRegNum(p->pAig); k++ )
- Vec_IntPush( vInits, Aig_InfoHasBit(pPattern, k) );
+ Vec_IntPush( vInits, Abc_InfoHasBit(pPattern, k) );
//printf( "Best pattern %5d\n", iPatBest );
Vec_IntPush( p->vPatBests, iPatBest );
}
@@ -810,7 +810,7 @@ static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex
int f, i, iBit;
// assign register outputs
Saig_ManForEachLi( pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit( pCex->pData, i );
+ pObj->fMarkB = Abc_InfoHasBit( pCex->pData, i );
// simulate the timeframes
iBit = pCex->nRegs;
for ( f = 0; f <= pCex->iFrame; f++ )
@@ -818,7 +818,7 @@ static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex
// set the PI simulation information
Aig_ManConst1(pAig)->fMarkB = 1;
Saig_ManForEachPi( pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit( pCex->pData, iBit++ );
+ pObj->fMarkB = Abc_InfoHasBit( pCex->pData, iBit++ );
Saig_ManForEachLiLo( pAig, pObjLi, pObj, i )
pObj->fMarkB = pObjLi->fMarkB;
// simulate internal nodes
diff --git a/src/aig/ssw/sswRarity2.c b/src/proof/ssw/sswRarity2.c
index d8cb9c16..ac22b0d5 100644
--- a/src/aig/ssw/sswRarity2.c
+++ b/src/proof/ssw/sswRarity2.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "sswInt.h"
-#include "giaAig.h"
+#include "src/aig/gia/giaAig.h"
ABC_NAMESPACE_IMPL_START
@@ -158,7 +158,7 @@ static void Ssw_RarUpdateCounters( Ssw_RarMan_t * p )
Saig_ManForEachLi( p->pAig, pObj, i )
{
pData = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjId(pObj) ) + p->nWords * (p->nFrames - 1);
- if ( Aig_InfoHasBit(pData, k) && i / p->nBinSize < p->nGroups )
+ if ( Abc_InfoHasBit(pData, k) && i / p->nBinSize < p->nGroups )
p->pGroupValues[i / p->nBinSize] |= (1 << (i % p->nBinSize));
}
for ( i = 0; i < p->nGroups; i++ )
@@ -200,7 +200,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
Saig_ManForEachLi( p->pAig, pObj, i )
{
pData = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjId(pObj) ) + p->nWords * (p->nFrames - 1);
- if ( Aig_InfoHasBit(pData, k) && i / p->nBinSize < p->nGroups )
+ if ( Abc_InfoHasBit(pData, k) && i / p->nBinSize < p->nGroups )
p->pGroupValues[i / p->nBinSize] |= (1 << (i % p->nBinSize));
}
// find the cost of its values
@@ -235,7 +235,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
Saig_ManForEachLi( p->pAig, pObj, k )
{
pData = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjId(pObj) ) + p->nWords * (p->nFrames - 1);
- Vec_IntPush( vInits, Aig_InfoHasBit(pData, iPatBest) );
+ Vec_IntPush( vInits, Abc_InfoHasBit(pData, iPatBest) );
}
//printf( "Best pattern %5d\n", iPatBest );
}
@@ -261,7 +261,7 @@ static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex
int f, i, iBit;
// assign register outputs
Saig_ManForEachLi( pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit( pCex->pData, i );
+ pObj->fMarkB = Abc_InfoHasBit( pCex->pData, i );
// simulate the timeframes
iBit = pCex->nRegs;
for ( f = 0; f <= pCex->iFrame; f++ )
@@ -269,7 +269,7 @@ static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex
// set the PI simulation information
Aig_ManConst1(pAig)->fMarkB = 1;
Saig_ManForEachPi( pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit( pCex->pData, iBit++ );
+ pObj->fMarkB = Abc_InfoHasBit( pCex->pData, iBit++ );
Saig_ManForEachLiLo( pAig, pObjLi, pObj, i )
pObj->fMarkB = pObjLi->fMarkB;
// simulate internal nodes
@@ -421,7 +421,7 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
p->ppClasses = Ssw_ClassesPrepareSimple( pAig, fLatchOnly, 0 );
else
p->ppClasses = Ssw_ClassesPrepareFromReprs( pAig );
- Ssw_ClassesSetData( p->ppClasses, p->pSml, NULL, Ssw_SmlObjIsConstWord, Ssw_SmlObjsAreEqualWord );
+ Ssw_ClassesSetData( p->ppClasses, p->pSml, NULL, (int(*)(void *,Aig_Obj_t *))Ssw_SmlObjIsConstWord, (int(*)(void *,Aig_Obj_t *,Aig_Obj_t *))Ssw_SmlObjsAreEqualWord );
// print the stats
if ( fVerbose )
{
diff --git a/src/aig/ssw/sswSat.c b/src/proof/ssw/sswSat.c
index 7d371cac..7d371cac 100644
--- a/src/aig/ssw/sswSat.c
+++ b/src/proof/ssw/sswSat.c
diff --git a/src/aig/ssw/sswSemi.c b/src/proof/ssw/sswSemi.c
index 2a28a29b..74305adf 100644
--- a/src/aig/ssw/sswSemi.c
+++ b/src/proof/ssw/sswSemi.c
@@ -71,7 +71,7 @@ Ssw_Sem_t * Ssw_SemManStart( Ssw_Man_t * pMan, int nConfMax, int fVerbose )
memset( p, 0, sizeof(Ssw_Sem_t) );
p->nConfMaxStart = nConfMax;
p->nConfMax = nConfMax;
- p->nFramesSweep = ABC_MAX( (1<<21)/Aig_ManNodeNum(pMan->pAig), pMan->nFrames );
+ p->nFramesSweep = Abc_MaxInt( (1<<21)/Aig_ManNodeNum(pMan->pAig), pMan->nFrames );
p->fVerbose = fVerbose;
// equivalences considered
p->pMan = pMan;
@@ -81,8 +81,8 @@ Ssw_Sem_t * Ssw_SemManStart( Ssw_Man_t * pMan, int nConfMax, int fVerbose )
// storage for patterns
p->nPatternsAlloc = 512;
p->nPatterns = 1;
- p->vPatterns = Vec_PtrAllocSimInfo( Aig_ManRegNum(p->pMan->pAig), Aig_BitWordNum(p->nPatternsAlloc) );
- Vec_PtrCleanSimInfo( p->vPatterns, 0, Aig_BitWordNum(p->nPatternsAlloc) );
+ p->vPatterns = Vec_PtrAllocSimInfo( Aig_ManRegNum(p->pMan->pAig), Abc_BitWordNum(p->nPatternsAlloc) );
+ Vec_PtrCleanSimInfo( p->vPatterns, 0, Abc_BitWordNum(p->nPatternsAlloc) );
p->vHistory = Vec_IntAlloc( 100 );
Vec_IntPush( p->vHistory, 0 );
// update arrays of the manager
@@ -157,8 +157,8 @@ void Ssw_ManFilterBmcSavePattern( Ssw_Sem_t * p )
Saig_ManForEachLo( p->pMan->pAig, pObj, i )
{
pInfo = (unsigned *)Vec_PtrEntry( p->vPatterns, i );
- if ( Aig_InfoHasBit( p->pMan->pPatWords, Saig_ManPiNum(p->pMan->pAig) + i ) )
- Aig_InfoSetBit( pInfo, p->nPatterns );
+ if ( Abc_InfoHasBit( p->pMan->pPatWords, Saig_ManPiNum(p->pMan->pAig) + i ) )
+ Abc_InfoSetBit( pInfo, p->nPatterns );
}
p->nPatterns++;
}
@@ -187,7 +187,7 @@ clk = clock();
Saig_ManForEachLo( p->pAig, pObj, i )
{
pInfo = (unsigned *)Vec_PtrEntry( pBmc->vPatterns, i );
- pObjNew = Aig_NotCond( Aig_ManConst1(p->pFrames), !Aig_InfoHasBit(pInfo, iPat) );
+ pObjNew = Aig_NotCond( Aig_ManConst1(p->pFrames), !Abc_InfoHasBit(pInfo, iPat) );
Ssw_ObjSetFrame( p, pObj, 0, pObjNew );
}
diff --git a/src/aig/ssw/sswSim.c b/src/proof/ssw/sswSim.c
index daee24ec..9ce89a71 100644
--- a/src/aig/ssw/sswSim.c
+++ b/src/proof/ssw/sswSim.c
@@ -422,7 +422,7 @@ void Ssw_SmlSavePattern1( Ssw_Man_t * p, int fInit )
nTruePis = Saig_ManPiNum(p->pAig);
k = 0;
Saig_ManForEachLo( p->pAig, pObj, i )
- Aig_InfoXorBit( p->pPatWords, nTruePis * p->nFrames + k++ );
+ Abc_InfoXorBit( p->pPatWords, nTruePis * p->nFrames + k++ );
}
@@ -460,7 +460,7 @@ int * Ssw_SmlCheckOutputSavePattern( Ssw_Sml_t * p, Aig_Obj_t * pObjPo )
pModel = ABC_ALLOC( int, Aig_ManPiNum(p->pAig)+1 );
Aig_ManForEachPi( p->pAig, pObjPi, i )
{
- pModel[i] = Aig_InfoHasBit(Ssw_ObjSim(p, pObjPi->Id), BestPat);
+ pModel[i] = Abc_InfoHasBit(Ssw_ObjSim(p, pObjPi->Id), BestPat);
// printf( "%d", pModel[i] );
}
pModel[Aig_ManPiNum(p->pAig)] = pObjPo->Id;
@@ -629,11 +629,11 @@ void Ssw_SmlAssignDist1( Ssw_Sml_t * p, unsigned * pPat )
{
// copy the PI info
Aig_ManForEachPi( p->pAig, pObj, i )
- Ssw_SmlObjAssignConst( p, pObj, Aig_InfoHasBit(pPat, i), 0 );
+ Ssw_SmlObjAssignConst( p, pObj, Abc_InfoHasBit(pPat, i), 0 );
// flip one bit
- Limit = ABC_MIN( Aig_ManPiNum(p->pAig), p->nWordsTotal * 32 - 1 );
+ Limit = Abc_MinInt( Aig_ManPiNum(p->pAig), p->nWordsTotal * 32 - 1 );
for ( i = 0; i < Limit; i++ )
- Aig_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig,i)->Id ), i+1 );
+ Abc_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig,i)->Id ), i+1 );
}
else
{
@@ -643,19 +643,19 @@ void Ssw_SmlAssignDist1( Ssw_Sml_t * p, unsigned * pPat )
nTruePis = Aig_ManPiNum(p->pAig) - Aig_ManRegNum(p->pAig);
for ( f = 0; f < p->nFrames; f++ )
Saig_ManForEachPi( p->pAig, pObj, i )
- Ssw_SmlObjAssignConst( p, pObj, Aig_InfoHasBit(pPat, nTruePis * f + i), f );
+ Ssw_SmlObjAssignConst( p, pObj, Abc_InfoHasBit(pPat, nTruePis * f + i), f );
// copy the latch info
k = 0;
Saig_ManForEachLo( p->pAig, pObj, i )
- Ssw_SmlObjAssignConst( p, pObj, Aig_InfoHasBit(pPat, nTruePis * p->nFrames + k++), 0 );
+ Ssw_SmlObjAssignConst( p, pObj, Abc_InfoHasBit(pPat, nTruePis * p->nFrames + k++), 0 );
// assert( p->pFrames == NULL || nTruePis * p->nFrames + k == Aig_ManPiNum(p->pFrames) );
// flip one bit of the last frame
if ( fUseDist1 ) //&& p->nFrames == 2 )
{
- Limit = ABC_MIN( nTruePis, p->nWordsFrame * 32 - 1 );
+ Limit = Abc_MinInt( nTruePis, p->nWordsFrame * 32 - 1 );
for ( i = 0; i < Limit; i++ )
- Aig_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ) + p->nWordsFrame*(p->nFrames-1), i+1 );
+ Abc_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ) + p->nWordsFrame*(p->nFrames-1), i+1 );
}
}
}
@@ -679,12 +679,12 @@ void Ssw_SmlAssignDist1Plus( Ssw_Sml_t * p, unsigned * pPat )
// copy the pattern into the primary inputs
Aig_ManForEachPi( p->pAig, pObj, i )
- Ssw_SmlObjAssignConst( p, pObj, Aig_InfoHasBit(pPat, i), 0 );
+ Ssw_SmlObjAssignConst( p, pObj, Abc_InfoHasBit(pPat, i), 0 );
// set distance one PIs for the first frame
- Limit = ABC_MIN( Saig_ManPiNum(p->pAig), p->nWordsFrame * 32 - 1 );
+ Limit = Abc_MinInt( Saig_ManPiNum(p->pAig), p->nWordsFrame * 32 - 1 );
for ( i = 0; i < Limit; i++ )
- Aig_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ), i+1 );
+ Abc_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ), i+1 );
// create random info for the remaining timeframes
for ( f = 1; f < p->nFrames; f++ )
@@ -1374,16 +1374,16 @@ Abc_Cex_t * Ssw_SmlGetCounterExample( Ssw_Sml_t * p )
Saig_ManForEachLo( p->pAig, pObj, k )
{
pSims = Ssw_ObjSim( p, pObj->Id );
- if ( Aig_InfoHasBit( pSims, iBit ) )
- Aig_InfoSetBit( pCex->pData, k );
+ if ( Abc_InfoHasBit( pSims, iBit ) )
+ Abc_InfoSetBit( pCex->pData, k );
}
for ( i = 0; i <= iFrame; i++ )
{
Saig_ManForEachPi( p->pAig, pObj, k )
{
pSims = Ssw_ObjSim( p, pObj->Id );
- if ( Aig_InfoHasBit( pSims, 32 * p->nWordsFrame * i + iBit ) )
- Aig_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * i + k );
+ if ( Abc_InfoHasBit( pSims, 32 * p->nWordsFrame * i + iBit ) )
+ Abc_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * i + k );
}
}
// verify the counter example
diff --git a/src/aig/ssw/sswSimSat.c b/src/proof/ssw/sswSimSat.c
index 6b18a3a6..4c094a2d 100644
--- a/src/aig/ssw/sswSimSat.c
+++ b/src/proof/ssw/sswSimSat.c
@@ -49,7 +49,7 @@ void Ssw_ManResimulateBit( Ssw_Man_t * p, Aig_Obj_t * pCand, Aig_Obj_t * pRepr )
// set the PI simulation information
Aig_ManConst1(p->pAig)->fMarkB = 1;
Aig_ManForEachPi( p->pAig, pObj, i )
- pObj->fMarkB = Aig_InfoHasBit( p->pPatWords, i );
+ pObj->fMarkB = Abc_InfoHasBit( p->pPatWords, i );
// simulate internal nodes
Aig_ManForEachNode( p->pAig, pObj, i )
pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) )
diff --git a/src/aig/ssw/sswSweep.c b/src/proof/ssw/sswSweep.c
index edae0846..e2a4f65d 100644
--- a/src/aig/ssw/sswSweep.c
+++ b/src/proof/ssw/sswSweep.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "sswInt.h"
-#include "bar.h"
+#include "src/misc/bar/bar.h"
ABC_NAMESPACE_IMPL_START
@@ -119,7 +119,7 @@ void Ssw_SmlSavePatternAigPhase( Ssw_Man_t * p, int f )
memset( p->pPatWords, 0, sizeof(unsigned) * p->nPatWords );
Aig_ManForEachPi( p->pAig, pObj, i )
if ( Aig_ObjPhaseReal( Ssw_ObjFrame(p, pObj, f) ) )
- Aig_InfoSetBit( p->pPatWords, i );
+ Abc_InfoSetBit( p->pPatWords, i );
}
/**Function*************************************************************
@@ -140,7 +140,7 @@ void Ssw_SmlSavePatternAig( Ssw_Man_t * p, int f )
memset( p->pPatWords, 0, sizeof(unsigned) * p->nPatWords );
Aig_ManForEachPi( p->pAig, pObj, i )
if ( Ssw_ManGetSatVarValue( p, pObj, f ) )
- Aig_InfoSetBit( p->pPatWords, i );
+ Abc_InfoSetBit( p->pPatWords, i );
}
/**Function*************************************************************
@@ -168,7 +168,7 @@ void Ssw_SmlAddPatternDyn( Ssw_Man_t * p )
if ( sat_solver_var_value( p->pMSat->pSat, nVarNum ) )
{
pInfo = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjPioNum(pObj) );
- Aig_InfoSetBit( pInfo, p->nPatterns );
+ Abc_InfoSetBit( pInfo, p->nPatterns );
}
}
}
diff --git a/src/aig/ssw/sswUnique.c b/src/proof/ssw/sswUnique.c
index b5f6a853..b5f6a853 100644
--- a/src/aig/ssw/sswUnique.c
+++ b/src/proof/ssw/sswUnique.c
diff --git a/src/sat/bsat/satChecker.c b/src/sat/bsat/satChecker.c
index 041bc9ed..7aec4a4d 100644
--- a/src/sat/bsat/satChecker.c
+++ b/src/sat/bsat/satChecker.c
@@ -23,7 +23,7 @@
#include <string.h>
#include <assert.h>
#include <time.h>
-#include "vec.h"
+#include "misc/vec/vec.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/sat/bsat/satInterA.c b/src/sat/bsat/satInterA.c
index a635516c..01a5ca31 100644
--- a/src/sat/bsat/satInterA.c
+++ b/src/sat/bsat/satInterA.c
@@ -24,7 +24,7 @@
#include <assert.h>
#include <time.h>
#include "satStore.h"
-#include "aig.h"
+#include "src/aig/aig/aig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/sat/bsat/satInterB.c b/src/sat/bsat/satInterB.c
index 1ffb0dc5..5d348f62 100644
--- a/src/sat/bsat/satInterB.c
+++ b/src/sat/bsat/satInterB.c
@@ -24,7 +24,7 @@
#include <assert.h>
#include <time.h>
#include "satStore.h"
-#include "aig.h"
+#include "src/aig/aig/aig.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/sat/bsat/satInterP.c b/src/sat/bsat/satInterP.c
index ff0b0e94..b8ab473a 100644
--- a/src/sat/bsat/satInterP.c
+++ b/src/sat/bsat/satInterP.c
@@ -25,7 +25,7 @@
#include <time.h>
#include "satStore.h"
-#include "vec.h"
+#include "src/misc/vec/vec.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/sat/bsat/satMem.h b/src/sat/bsat/satMem.h
index 8ea153a6..9dc9e692 100644
--- a/src/sat/bsat/satMem.h
+++ b/src/sat/bsat/satMem.h
@@ -18,14 +18,14 @@
***********************************************************************/
-#ifndef __SAT_MEM_H__
-#define __SAT_MEM_H__
+#ifndef ABC__sat__bsat__satMem_h
+#define ABC__sat__bsat__satMem_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/sat/bsat/satProof.c b/src/sat/bsat/satProof.c
index 79179952..111b3ece 100644
--- a/src/sat/bsat/satProof.c
+++ b/src/sat/bsat/satProof.c
@@ -19,8 +19,8 @@
***********************************************************************/
#include "satSolver2.h"
-#include "vec.h"
-#include "aig.h"
+#include "src/misc/vec/vec.h"
+#include "src/aig/aig/aig.h"
#include "satTruth.h"
#include "vecRec.h"
@@ -610,7 +610,7 @@ void * Sat_ProofInterpolant( sat_solver2 * s, void * pGloVars )
// start the AIG
pAig = Aig_ManStart( 10000 );
- pAig->pName = Aig_UtilStrsav( "interpol" );
+ pAig->pName = Abc_UtilStrsav( "interpol" );
for ( i = 0; i < Vec_IntSize(vGlobVars); i++ )
Aig_ObjCreatePi( pAig );
diff --git a/src/sat/bsat/satSolver.h b/src/sat/bsat/satSolver.h
index 0ca934ed..30b3742b 100644
--- a/src/sat/bsat/satSolver.h
+++ b/src/sat/bsat/satSolver.h
@@ -19,8 +19,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA
**************************************************************************************************/
// Modified to compile with MS Visual Studio 6.0 by Alan Mishchenko
-#ifndef satSolver_h
-#define satSolver_h
+#ifndef ABC__sat__bsat__satSolver_h
+#define ABC__sat__bsat__satSolver_h
#include <stdio.h>
diff --git a/src/sat/bsat/satSolver2.h b/src/sat/bsat/satSolver2.h
index baccf68d..29279b86 100644
--- a/src/sat/bsat/satSolver2.h
+++ b/src/sat/bsat/satSolver2.h
@@ -19,8 +19,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA
**************************************************************************************************/
// Modified to compile with MS Visual Studio 6.0 by Alan Mishchenko
-#ifndef satSolver2_h
-#define satSolver2_h
+#ifndef ABC__sat__bsat__satSolver2_h
+#define ABC__sat__bsat__satSolver2_h
#include <stdio.h>
diff --git a/src/sat/bsat/satSolver_old.h b/src/sat/bsat/satSolver_old.h
index 4c577b1e..d2228f79 100644
--- a/src/sat/bsat/satSolver_old.h
+++ b/src/sat/bsat/satSolver_old.h
@@ -19,8 +19,8 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA
**************************************************************************************************/
// Modified to compile with MS Visual Studio 6.0 by Alan Mishchenko
-#ifndef satSolver_h
-#define satSolver_h
+#ifndef ABC__sat__bsat__satSolver_old_h
+#define ABC__sat__bsat__satSolver_old_h
#include <stdio.h>
diff --git a/src/sat/bsat/satStore.h b/src/sat/bsat/satStore.h
index 0293aea7..206c6939 100644
--- a/src/sat/bsat/satStore.h
+++ b/src/sat/bsat/satStore.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __SAT_STORE_H__
-#define __SAT_STORE_H__
+#ifndef ABC__sat__bsat__satStore_h
+#define ABC__sat__bsat__satStore_h
/*
diff --git a/src/sat/bsat/satTruth.h b/src/sat/bsat/satTruth.h
index e07518b0..2f17b6f0 100644
--- a/src/sat/bsat/satTruth.h
+++ b/src/sat/bsat/satTruth.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __SAT_TRUTH_H__
-#define __SAT_TRUTH_H__
+#ifndef ABC__sat__bsat__satTruth_h
+#define ABC__sat__bsat__satTruth_h
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
@@ -29,7 +29,7 @@
#include <stdlib.h>
#include <string.h>
#include <assert.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/sat/bsat/satVec.h b/src/sat/bsat/satVec.h
index bf117521..01740580 100644
--- a/src/sat/bsat/satVec.h
+++ b/src/sat/bsat/satVec.h
@@ -19,10 +19,10 @@ OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWA
**************************************************************************************************/
// Modified to compile with MS Visual Studio 6.0 by Alan Mishchenko
-#ifndef satVec_h
-#define satVec_h
+#ifndef ABC__sat__bsat__satVec_h
+#define ABC__sat__bsat__satVec_h
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/sat/bsat/vecRec.h b/src/sat/bsat/vecRec.h
index e92129be..82d7183d 100644
--- a/src/sat/bsat/vecRec.h
+++ b/src/sat/bsat/vecRec.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __VEC_REC_H__
-#define __VEC_REC_H__
+#ifndef ABC__sat__bsat__vecRec_h
+#define ABC__sat__bsat__vecRec_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/cnf/cnf.h b/src/sat/cnf/cnf.h
index 129375d2..0b6fc8c2 100644
--- a/src/aig/cnf/cnf.h
+++ b/src/sat/cnf/cnf.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __CNF_H__
-#define __CNF_H__
+#ifndef ABC__aig__cnf__cnf_h
+#define ABC__aig__cnf__cnf_h
////////////////////////////////////////////////////////////////////////
@@ -32,9 +32,9 @@
#include <assert.h>
#include <time.h>
-#include "vec.h"
-#include "aig.h"
-#include "darInt.h"
+#include "src/misc/vec/vec.h"
+#include "src/aig/aig/aig.h"
+#include "src/opt/dar/darInt.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
diff --git a/src/aig/cnf/cnfCore.c b/src/sat/cnf/cnfCore.c
index eb46e704..eb46e704 100644
--- a/src/aig/cnf/cnfCore.c
+++ b/src/sat/cnf/cnfCore.c
diff --git a/src/aig/cnf/cnfCut.c b/src/sat/cnf/cnfCut.c
index d41fc1fc..fef199c7 100644
--- a/src/aig/cnf/cnfCut.c
+++ b/src/sat/cnf/cnfCut.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "cnf.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
@@ -46,10 +46,10 @@ ABC_NAMESPACE_IMPL_START
Cnf_Cut_t * Cnf_CutAlloc( Cnf_Man_t * p, int nLeaves )
{
Cnf_Cut_t * pCut;
- int nSize = sizeof(Cnf_Cut_t) + sizeof(int) * nLeaves + sizeof(unsigned) * Aig_TruthWordNum(nLeaves);
+ int nSize = sizeof(Cnf_Cut_t) + sizeof(int) * nLeaves + sizeof(unsigned) * Abc_TruthWordNum(nLeaves);
pCut = (Cnf_Cut_t *)Aig_MmFlexEntryFetch( p->pMemCuts, nSize );
pCut->nFanins = nLeaves;
- pCut->nWords = Aig_TruthWordNum(nLeaves);
+ pCut->nWords = Abc_TruthWordNum(nLeaves);
pCut->vIsop[0] = pCut->vIsop[1] = NULL;
return pCut;
}
diff --git a/src/aig/cnf/cnfData.c b/src/sat/cnf/cnfData.c
index 3d3cdf37..3d3cdf37 100644
--- a/src/aig/cnf/cnfData.c
+++ b/src/sat/cnf/cnfData.c
diff --git a/src/aig/cnf/cnfFast.c b/src/sat/cnf/cnfFast.c
index afa05a05..6ec2b6a6 100644
--- a/src/aig/cnf/cnfFast.c
+++ b/src/sat/cnf/cnfFast.c
@@ -19,7 +19,7 @@
***********************************************************************/
#include "cnf.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/aig/cnf/cnfMan.c b/src/sat/cnf/cnfMan.c
index 6b107651..a670a69d 100644
--- a/src/aig/cnf/cnfMan.c
+++ b/src/sat/cnf/cnfMan.c
@@ -19,9 +19,9 @@
***********************************************************************/
#include "cnf.h"
-#include "satSolver.h"
-#include "satSolver2.h"
-#include "zlib.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/bsat/satSolver2.h"
+#include "src/misc/zlib/zlib.h"
ABC_NAMESPACE_IMPL_START
@@ -61,9 +61,9 @@ Cnf_Man_t * Cnf_ManStart()
p->pMemCuts = Aig_MmFlexStart();
p->nMergeLimit = 10;
// allocate temporary truth tables
- p->pTruths[0] = ABC_ALLOC( unsigned, 4 * Aig_TruthWordNum(p->nMergeLimit) );
+ p->pTruths[0] = ABC_ALLOC( unsigned, 4 * Abc_TruthWordNum(p->nMergeLimit) );
for ( i = 1; i < 4; i++ )
- p->pTruths[i] = p->pTruths[i-1] + Aig_TruthWordNum(p->nMergeLimit);
+ p->pTruths[i] = p->pTruths[i-1] + Abc_TruthWordNum(p->nMergeLimit);
p->vMemory = Vec_IntAlloc( 1 << 18 );
return p;
}
diff --git a/src/aig/cnf/cnfMap.c b/src/sat/cnf/cnfMap.c
index 8907485e..8907485e 100644
--- a/src/aig/cnf/cnfMap.c
+++ b/src/sat/cnf/cnfMap.c
diff --git a/src/aig/cnf/cnfPost.c b/src/sat/cnf/cnfPost.c
index f7491889..f7491889 100644
--- a/src/aig/cnf/cnfPost.c
+++ b/src/sat/cnf/cnfPost.c
diff --git a/src/aig/cnf/cnfUtil.c b/src/sat/cnf/cnfUtil.c
index 236b6bfa..236b6bfa 100644
--- a/src/aig/cnf/cnfUtil.c
+++ b/src/sat/cnf/cnfUtil.c
diff --git a/src/aig/cnf/cnfWrite.c b/src/sat/cnf/cnfWrite.c
index 54c28967..54c28967 100644
--- a/src/aig/cnf/cnfWrite.c
+++ b/src/sat/cnf/cnfWrite.c
diff --git a/src/aig/cnf/cnf_.c b/src/sat/cnf/cnf_.c
index acf75093..acf75093 100644
--- a/src/aig/cnf/cnf_.c
+++ b/src/sat/cnf/cnf_.c
diff --git a/src/sat/cnf/module.make b/src/sat/cnf/module.make
new file mode 100644
index 00000000..880e9662
--- /dev/null
+++ b/src/sat/cnf/module.make
@@ -0,0 +1,9 @@
+SRC += src/sat/cnf/cnfCore.c \
+ src/sat/cnf/cnfCut.c \
+ src/sat/cnf/cnfData.c \
+ src/sat/cnf/cnfFast.c \
+ src/sat/cnf/cnfMan.c \
+ src/sat/cnf/cnfMap.c \
+ src/sat/cnf/cnfPost.c \
+ src/sat/cnf/cnfUtil.c \
+ src/sat/cnf/cnfWrite.c
diff --git a/src/sat/csat/csat_apis.c b/src/sat/csat/csat_apis.c
index 78ed2601..582dc1e7 100644
--- a/src/sat/csat/csat_apis.c
+++ b/src/sat/csat/csat_apis.c
@@ -16,11 +16,11 @@
***********************************************************************/
-#include "abc.h"
-#include "fraig.h"
+#include "src/base/abc/abc.h"
+#include "src/proof/fraig/fraig.h"
#include "csat_apis.h"
-#include "stmm.h"
-#include "main.h"
+#include "src/misc/st/stmm.h"
+#include "src/base/main/main.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/sat/csat/csat_apis.h b/src/sat/csat/csat_apis.h
index a6c1b18a..476e8c2c 100644
--- a/src/sat/csat/csat_apis.h
+++ b/src/sat/csat/csat_apis.h
@@ -16,8 +16,8 @@
***********************************************************************/
-#ifndef __ABC_APIS_H__
-#define __ABC_APIS_H__
+#ifndef ABC__sat__csat__csat_apis_h
+#define ABC__sat__csat__csat_apis_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/sat/fraig/module.make b/src/sat/fraig/module.make
deleted file mode 100644
index cc6eb9d3..00000000
--- a/src/sat/fraig/module.make
+++ /dev/null
@@ -1,12 +0,0 @@
-SRC += src/sat/fraig/fraigApi.c \
- src/sat/fraig/fraigCanon.c \
- src/sat/fraig/fraigFanout.c \
- src/sat/fraig/fraigFeed.c \
- src/sat/fraig/fraigMan.c \
- src/sat/fraig/fraigMem.c \
- src/sat/fraig/fraigNode.c \
- src/sat/fraig/fraigPrime.c \
- src/sat/fraig/fraigSat.c \
- src/sat/fraig/fraigTable.c \
- src/sat/fraig/fraigUtil.c \
- src/sat/fraig/fraigVec.c
diff --git a/src/sat/lsat/solver.h b/src/sat/lsat/solver.h
index a50c4abe..2baff658 100644
--- a/src/sat/lsat/solver.h
+++ b/src/sat/lsat/solver.h
@@ -18,8 +18,8 @@ DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************************************/
-#ifndef Minisat_solver_h
-#define Minisat_solver_h
+#ifndef ABC__sat__lsat__solver_h
+#define ABC__sat__lsat__solver_h
ABC_NAMESPACE_HEADER_START
diff --git a/src/sat/msat/msat.h b/src/sat/msat/msat.h
index 6dc68cf8..4830b12e 100644
--- a/src/sat/msat/msat.h
+++ b/src/sat/msat/msat.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __MSAT_H__
-#define __MSAT_H__
+#ifndef ABC__sat__msat__msat_h
+#define ABC__sat__msat__msat_h
////////////////////////////////////////////////////////////////////////
diff --git a/src/sat/msat/msatInt.h b/src/sat/msat/msatInt.h
index b4b5ff77..58baa7b4 100644
--- a/src/sat/msat/msatInt.h
+++ b/src/sat/msat/msatInt.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __MSAT_INT_H__
-#define __MSAT_INT_H__
+#ifndef ABC__sat__msat__msatInt_h
+#define ABC__sat__msat__msatInt_h
////////////////////////////////////////////////////////////////////////
@@ -33,7 +33,7 @@
#include <time.h>
#include <math.h>
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "msat.h"
ABC_NAMESPACE_HEADER_START
diff --git a/src/sat/pdr/module.make b/src/sat/pdr/module.make
deleted file mode 100644
index 5cf4491c..00000000
--- a/src/sat/pdr/module.make
+++ /dev/null
@@ -1,8 +0,0 @@
-SRC += src/sat/pdr/pdr.c \
- src/sat/pdr/pdrCnf.c \
- src/sat/pdr/pdrCore.c \
- src/sat/pdr/pdrInv.c \
- src/sat/pdr/pdrMan.c \
- src/sat/pdr/pdrSat.c \
- src/sat/pdr/pdrTsim.c \
- src/sat/pdr/pdrUtil.c
diff --git a/src/sat/proof/pr.c b/src/sat/proof/pr.c
index 0da16eaf..45bc2e33 100644
--- a/src/sat/proof/pr.c
+++ b/src/sat/proof/pr.c
@@ -25,7 +25,7 @@
#include <time.h>
//#include "vec.h"
-#include "abc_global.h"
+#include "src/misc/util/abc_global.h"
#include "pr.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/sat/proof/pr.h b/src/sat/proof/pr.h
index 9088c89b..b060b52b 100644
--- a/src/sat/proof/pr.h
+++ b/src/sat/proof/pr.h
@@ -18,8 +18,8 @@
***********************************************************************/
-#ifndef __PR_H__
-#define __PR_H__
+#ifndef ABC__sat__proof__pr_h
+#define ABC__sat__proof__pr_h
#ifdef _WIN32
diff --git a/src/sat/psat/m114p.h b/src/sat/psat/m114p.h
index 9319d918..12f98135 100644
--- a/src/sat/psat/m114p.h
+++ b/src/sat/psat/m114p.h
@@ -1,7 +1,7 @@
// C-language header for MiniSat 1.14p
-#ifndef m114p_h
-#define m114p_h
+#ifndef ABC__sat__psat__m114p_h
+#define ABC__sat__psat__m114p_h
#include "m114p_types.h"
diff --git a/src/sat/psat/m114p_types.h b/src/sat/psat/m114p_types.h
index 29d70a87..770cd417 100644
--- a/src/sat/psat/m114p_types.h
+++ b/src/sat/psat/m114p_types.h
@@ -1,7 +1,7 @@
// C-language header for MiniSat 1.14p
-#ifndef m114p_types_h
-#define m114p_types_h
+#ifndef ABC__sat__psat__m114p_types_h
+#define ABC__sat__psat__m114p_types_h
ABC_NAMESPACE_HEADER_START
diff --git a/src/template.c b/src/template.c
index 17d33424..8b799151 100644
--- a/src/template.c
+++ b/src/template.c
@@ -18,7 +18,7 @@
***********************************************************************/
-#include "aig.h"
+#include "aig/aig/aig.h"
ABC_NAMESPACE_IMPL_START