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author | Alan Mishchenko <alanmi@berkeley.edu> | 2017-10-22 15:44:13 -0700 |
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committer | Alan Mishchenko <alanmi@berkeley.edu> | 2017-10-22 15:44:13 -0700 |
commit | accf4825e586cb8b3444551a1145ae4d88662f82 (patch) | |
tree | 75b02b5bd79e1c37000fc76abfcbf42de477e782 /abclib.dsp | |
parent | 5ab3f0fa6ba1519e24368651f7c5fb87cd5ee33e (diff) | |
download | abc-accf4825e586cb8b3444551a1145ae4d88662f82.tar.gz abc-accf4825e586cb8b3444551a1145ae4d88662f82.tar.bz2 abc-accf4825e586cb8b3444551a1145ae4d88662f82.zip |
Adding API to dump MiniAIG into a Verilog file and other small changes.
Diffstat (limited to 'abclib.dsp')
-rw-r--r-- | abclib.dsp | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -4771,6 +4771,10 @@ SOURCE=.\src\aig\gia\giaIiff.c # End Source File # Begin Source File +SOURCE=.\src\aig\gia\giaIiff.h +# End Source File +# Begin Source File + SOURCE=.\src\aig\gia\giaIso.c # End Source File # Begin Source File |