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| author | Alan Mishchenko <alanmi@berkeley.edu> | 2014-04-05 11:06:35 -0700 |
|---|---|---|
| committer | Alan Mishchenko <alanmi@berkeley.edu> | 2014-04-05 11:06:35 -0700 |
| commit | 5608d947eda6635ac6d82f4f144adbfc5170f302 (patch) | |
| tree | e70ed713d2595b6de6d88c0c7b9c8066fc6b36fe /src/aig/gia/giaIf.c | |
| parent | 424b86a55673f53ec102687c04d2762b88ad5a47 (diff) | |
| download | abc-5608d947eda6635ac6d82f4f144adbfc5170f302.tar.gz abc-5608d947eda6635ac6d82f4f144adbfc5170f302.tar.bz2 abc-5608d947eda6635ac6d82f4f144adbfc5170f302.zip | |
Preparing new implementation of SOP/DSD balancing in 'if' mapper.
Diffstat (limited to 'src/aig/gia/giaIf.c')
| -rw-r--r-- | src/aig/gia/giaIf.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/aig/gia/giaIf.c b/src/aig/gia/giaIf.c index a3f49039..e52bdf29 100644 --- a/src/aig/gia/giaIf.c +++ b/src/aig/gia/giaIf.c @@ -691,7 +691,7 @@ Gia_Man_t * Gia_ManFromIfAig( If_Man_t * pIfMan ) Vec_Int_t * vCover; int i, k; assert( pIfMan->pPars->pLutStruct == NULL ); - assert( pIfMan->pPars->fDelayOpt || pIfMan->pPars->fUserRecLib ); + assert( pIfMan->pPars->fDelayOpt || pIfMan->pPars->fDsdBalance || pIfMan->pPars->fUserRecLib ); // create new manager pNew = Gia_ManStart( If_ManObjNum(pIfMan) ); Gia_ManHashAlloc( pNew ); @@ -713,6 +713,8 @@ Gia_Man_t * Gia_ManFromIfAig( If_Man_t * pIfMan ) // get the functionality if ( pIfMan->pPars->fDelayOpt ) pIfObj->iCopy = Gia_ManNodeIfSopToGia( pNew, pIfMan, pCutBest, vLeaves, fHash ); + else if ( pIfMan->pPars->fDsdBalance ) + pIfObj->iCopy = If_DsdCutBalance( pNew, pIfMan, pCutBest, vLeaves, fHash ); else if ( pIfMan->pPars->fUserRecLib ) pIfObj->iCopy = Abc_RecToGia3( pNew, pIfMan, pCutBest, vLeaves, fHash ); else assert( 0 ); @@ -1292,7 +1294,7 @@ Gia_Man_t * Gia_ManFromIfLogic( If_Man_t * pIfMan ) { pCutBest = If_ObjCutBest( pIfObj ); // perform sorting of cut leaves by delay, so that the slowest pin drives the fastest input of the LUT - if ( !pIfMan->pPars->fUseTtPerm && !pIfMan->pPars->fDelayOpt && !pIfMan->pPars->pLutStruct && !pIfMan->pPars->fUserRecLib && !pIfMan->pPars->nGateSize && !pIfMan->pPars->fEnableCheck75 && !pIfMan->pPars->fEnableCheck75u && !pIfMan->pPars->fEnableCheck07 ) + if ( !pIfMan->pPars->fUseTtPerm && !pIfMan->pPars->fDelayOpt && !pIfMan->pPars->fDsdBalance && !pIfMan->pPars->pLutStruct && !pIfMan->pPars->fUserRecLib && !pIfMan->pPars->nGateSize && !pIfMan->pPars->fEnableCheck75 && !pIfMan->pPars->fEnableCheck75u && !pIfMan->pPars->fEnableCheck07 ) If_CutRotatePins( pIfMan, pCutBest ); // collect leaves of the best cut Vec_IntClear( vLeaves ); @@ -1534,7 +1536,7 @@ Gia_Man_t * Gia_ManPerformMapping( Gia_Man_t * p, void * pp, int fNormalized ) If_Man_t * pIfMan; If_Par_t * pPars = (If_Par_t *)pp; // disable cut minimization when GIA strucure is needed - if ( !pPars->fDelayOpt && !pPars->fUserRecLib && !pPars->fDeriveLuts && !pPars->fUseDsd && !pPars->fUseTtPerm ) + if ( !pPars->fDelayOpt && !pPars->fDsdBalance && !pPars->fUserRecLib && !pPars->fDeriveLuts && !pPars->fUseDsd && !pPars->fUseTtPerm ) pPars->fCutMin = 0; // reconstruct GIA according to the hierarchy manager @@ -1593,7 +1595,7 @@ Gia_Man_t * Gia_ManPerformMapping( Gia_Man_t * p, void * pp, int fNormalized ) return NULL; } // transform the result of mapping into the new network - if ( pIfMan->pPars->fDelayOpt || pIfMan->pPars->fUserRecLib ) + if ( pIfMan->pPars->fDelayOpt || pIfMan->pPars->fDsdBalance || pIfMan->pPars->fUserRecLib ) pNew = Gia_ManFromIfAig( pIfMan ); else pNew = Gia_ManFromIfLogic( pIfMan ); |