Version abc80123

6 files changed, 122 insertions, 24 deletions

diff --git a/src/aig/ntl/ntl.h b/src/aig/ntl/ntl.h
index 1a3695e8..dbd8676b 100644
--- a/src/aig/ntl/ntl.h
+++ b/src/aig/ntl/ntl.h
@@ -70,6 +70,7 @@ struct Ntl_Man_t_
     Vec_Ptr_t *        vCis;           // the primary inputs of the extracted part
     Vec_Ptr_t *        vCos;           // the primary outputs of the extracted part 
     Vec_Ptr_t *        vNodes;         // the nodes of the abstracted part
+    Vec_Int_t *        vBox1Cos;       // the first COs of the boxes
     Aig_Man_t *        pAig;           // the extracted AIG
     Tim_Man_t *        pManTime;       // the timing manager
 };
@@ -143,6 +144,8 @@ static inline int         Ntl_ModelPoNum( Ntl_Mod_t * p )         { return p->nO
 static inline int         Ntl_ModelNodeNum( Ntl_Mod_t * p )       { return p->nObjs[NTL_OBJ_NODE];              } 
 static inline int         Ntl_ModelLatchNum( Ntl_Mod_t * p )      { return p->nObjs[NTL_OBJ_LATCH];             } 
 static inline int         Ntl_ModelBoxNum( Ntl_Mod_t * p )        { return p->nObjs[NTL_OBJ_BOX];               } 
+static inline int         Ntl_ModelCiNum( Ntl_Mod_t * p )         { return p->nObjs[NTL_OBJ_PI] + p->nObjs[NTL_OBJ_LATCH]; } 
+static inline int         Ntl_ModelCoNum( Ntl_Mod_t * p )         { return p->nObjs[NTL_OBJ_PO] + p->nObjs[NTL_OBJ_LATCH]; } 
 
 static inline Ntl_Obj_t * Ntl_ModelPi( Ntl_Mod_t * p, int i )     { return Vec_PtrEntry(p->vPis, i);            } 
 static inline Ntl_Obj_t * Ntl_ModelPo( Ntl_Mod_t * p, int i )     { return Vec_PtrEntry(p->vPos, i);            } 
@@ -217,6 +220,7 @@ static inline void        Ntl_ObjSetFanout( Ntl_Obj_t * p, Ntl_Net_t * pNet, int
 ////////////////////////////////////////////////////////////////////////
 
 /*=== ntlAig.c ==========================================================*/
+extern Aig_Obj_t *     Ntl_ManExtractAigNode( Ntl_Obj_t * pNode );
 extern int             Ntl_ManExtract( Ntl_Man_t * p );
 extern int             Ntl_ManInsert( Ntl_Man_t * p, Vec_Ptr_t * vMapping );
 extern int             Ntl_ManInsertTest( Ntl_Man_t * p );
@@ -239,7 +243,7 @@ extern void            Ntl_ModelFree( Ntl_Mod_t * p );
 extern Vec_Ptr_t *     Ntl_MappingAlloc( int nLuts, int nVars );
 extern Vec_Ptr_t *     Ntl_MappingFromAig( Aig_Man_t * p );
 extern Vec_Ptr_t *     Ntl_MappingFpga( Aig_Man_t * p );
-extern Vec_Ptr_t *     Ntl_MappingIf( Aig_Man_t * p );
+extern Vec_Ptr_t *     Ntl_MappingIf( Ntl_Man_t * pMan, Aig_Man_t * p );
 /*=== ntlObj.c ============================================================*/
 extern Ntl_Obj_t *     Ntl_ModelCreatePi( Ntl_Mod_t * pModel );
 extern Ntl_Obj_t *     Ntl_ModelCreatePo( Ntl_Mod_t * pModel, Ntl_Net_t * pNet );
@@ -254,6 +258,8 @@ extern Ntl_Net_t *     Ntl_ModelFindNet( Ntl_Mod_t * p, char * pName );
 extern Ntl_Net_t *     Ntl_ModelFindOrCreateNet( Ntl_Mod_t * p, char * pName );
 extern int             Ntl_ModelSetNetDriver( Ntl_Obj_t * pObj, Ntl_Net_t * pNet );
 extern int             Ntl_ModelFindPioNumber( Ntl_Mod_t * p, char * pName, int * pNumber );
+/*=== ntlTime.c ==========================================================*/
+extern Tim_Man_t *     Ntl_ManCreateTiming( Ntl_Man_t * p );
 /*=== ntlReadBlif.c ==========================================================*/
 extern Ntl_Man_t *     Ioa_ReadBlif( char * pFileName, int fCheck );
 /*=== ntlWriteBlif.c ==========================================================*/
diff --git a/src/aig/ntl/ntlAig.c b/src/aig/ntl/ntlAig.c
index c81280d7..c0a122d3 100644
--- a/src/aig/ntl/ntlAig.c
+++ b/src/aig/ntl/ntlAig.c
@@ -367,7 +367,7 @@ Aig_Obj_t * Ntl_ManExtractAigNode( Ntl_Obj_t * pNode )
   SeeAlso     []
 
 ***********************************************************************/
-int Ntl_ManExtract( Ntl_Man_t * p )
+int Ntl_ManExtract_old( Ntl_Man_t * p )
 {
     Ntl_Obj_t * pNode;
     Ntl_Net_t * pNet;
@@ -394,6 +394,30 @@ int Ntl_ManExtract( Ntl_Man_t * p )
 
 /**Function*************************************************************
 
+  Synopsis    [Extracts AIG from the netlist.]
+
+  Description []
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+int Ntl_ManExtract( Ntl_Man_t * p )
+{
+    // start the AIG manager
+    assert( p->pAig == NULL );
+    p->pAig = Aig_ManStart( 10000 );
+    // check the DFS traversal
+    if ( !Ntl_ManDfs( p ) )
+        return 0;
+    // cleanup the AIG
+    Aig_ManCleanup( p->pAig );
+    return 1;
+}
+
+/**Function*************************************************************
+
   Synopsis    [Inserts the given mapping into the netlist.]
 
   Description []
@@ -557,8 +581,8 @@ int Ntl_ManInsertTestIf( Ntl_Man_t * p )
     if ( !Ntl_ManExtract( p ) )
         return 0;
     assert( p->pAig != NULL );
-    Ntl_ManPerformSynthesis( p );
-    vMapping = Ntl_MappingIf( p->pAig );
+//    Ntl_ManPerformSynthesis( p );
+    vMapping = Ntl_MappingIf( p, p->pAig );
     RetValue = Ntl_ManInsert( p, vMapping );
     Vec_PtrFree( vMapping );
     return RetValue;
diff --git a/src/aig/ntl/ntlDfs.c b/src/aig/ntl/ntlDfs.c
index 41867b29..1e9503a4 100644
--- a/src/aig/ntl/ntlDfs.c
+++ b/src/aig/ntl/ntlDfs.c
@@ -63,13 +63,27 @@ int Ntl_ManDfs_rec( Ntl_Man_t * p, Ntl_Net_t * pNet )
     // add box inputs/outputs to COs/CIs
     if ( Ntl_ObjIsBox(pObj) )
     {
+        int LevelCur, LevelMax = -AIG_INFINITY;
+        Vec_IntPush( p->vBox1Cos, Aig_ManPoNum(p->pAig) );
         Ntl_ObjForEachFanin( pObj, pNetFanin, i )
+        {
+            LevelCur = Aig_ObjLevel( Aig_Regular(pNetFanin->pFunc) );
+            LevelMax = AIG_MAX( LevelMax, LevelCur );
             Vec_PtrPush( p->vCos, pNetFanin );
+            Aig_ObjCreatePo( p->pAig, pNetFanin->pFunc );
+        }
         Ntl_ObjForEachFanout( pObj, pNetFanin, i )
+        {
             Vec_PtrPush( p->vCis, pNetFanin );
+            pNetFanin->pFunc = Aig_ObjCreatePi( p->pAig );
+            Aig_ObjSetLevel( pNetFanin->pFunc, LevelMax + 1 );
+        }
+//printf( "Creating fake PO with ID = %d.\n", Aig_ManPo(p->pAig, Vec_IntEntryLast(p->vBox1Cos))->Id );
     }
     // store the node
     Vec_PtrPush( p->vNodes, pObj );
+    if ( Ntl_ObjIsNode(pObj) )
+        pNet->pFunc = Ntl_ManExtractAigNode( pObj );
     pNet->nVisits = 2;
     return 1;
 }
@@ -95,6 +109,7 @@ int Ntl_ManDfs( Ntl_Man_t * p )
     assert( Vec_PtrSize(p->vCis) == 0 );
     assert( Vec_PtrSize(p->vCos) == 0 );
     assert( Vec_PtrSize(p->vNodes) == 0 );
+    assert( Vec_IntSize(p->vBox1Cos) == 0 );
     // get the root model
     pRoot = Vec_PtrEntry( p->vModels, 0 );
     // collect primary inputs
@@ -103,6 +118,7 @@ int Ntl_ManDfs( Ntl_Man_t * p )
         assert( Ntl_ObjFanoutNum(pObj) == 1 );
         pNet = Ntl_ObjFanout0(pObj);
         Vec_PtrPush( p->vCis, pNet );
+        pNet->pFunc = Aig_ObjCreatePi( p->pAig );
         if ( pNet->nVisits )
         {
             printf( "Ntl_ManDfs(): Primary input appears twice in the list.\n" );
@@ -116,6 +132,7 @@ int Ntl_ManDfs( Ntl_Man_t * p )
         assert( Ntl_ObjFanoutNum(pObj) == 1 );
         pNet = Ntl_ObjFanout0(pObj);
         Vec_PtrPush( p->vCis, pNet );
+        pNet->pFunc = Aig_ObjCreatePi( p->pAig );
         if ( pNet->nVisits )
         {
             printf( "Ntl_ManDfs(): Latch output is duplicated or defined as a primary input.\n" );
@@ -136,6 +153,7 @@ int Ntl_ManDfs( Ntl_Man_t * p )
             return 0;
         }
         Vec_PtrPush( p->vCos, pNet );
+        Aig_ObjCreatePo( p->pAig, pNet->pFunc );
     }
     // visit the nodes starting from latch inputs outputs
     Ntl_ModelForEachLatch( pRoot, pObj, i )
@@ -150,6 +168,7 @@ int Ntl_ManDfs( Ntl_Man_t * p )
             return 0;
         }
         Vec_PtrPush( p->vCos, pNet );
+        Aig_ObjCreatePo( p->pAig, pNet->pFunc );
     }
     // report the number of dangling objects
     nUselessObjects = Ntl_ModelNodeNum(pRoot) + Ntl_ModelBoxNum(pRoot) - Vec_PtrSize(p->vNodes);
diff --git a/src/aig/ntl/ntlMan.c b/src/aig/ntl/ntlMan.c
index ce008c9c..9b4aff5f 100644
--- a/src/aig/ntl/ntlMan.c
+++ b/src/aig/ntl/ntlMan.c
@@ -49,6 +49,7 @@ Ntl_Man_t * Ntl_ManAlloc( char * pFileName )
     p->vCis = Vec_PtrAlloc( 1000 );
     p->vCos = Vec_PtrAlloc( 1000 );
     p->vNodes = Vec_PtrAlloc( 1000 );
+    p->vBox1Cos = Vec_IntAlloc( 1000 );
     // start the manager
     p->pMemObjs = Aig_MmFlexStart();
     p->pMemSops = Aig_MmFlexStart();
@@ -82,6 +83,7 @@ void Ntl_ManFree( Ntl_Man_t * p )
     if ( p->vCis )     Vec_PtrFree( p->vCis );
     if ( p->vCos )     Vec_PtrFree( p->vCos );
     if ( p->vNodes )   Vec_PtrFree( p->vNodes );
+    if ( p->vBox1Cos ) Vec_IntFree( p->vBox1Cos );
     if ( p->pMemObjs ) Aig_MmFlexStop( p->pMemObjs, 0 );
     if ( p->pMemSops ) Aig_MmFlexStop( p->pMemSops, 0 );
     if ( p->pAig )     Aig_ManStop( p->pAig );
diff --git a/src/aig/ntl/ntlMap.c b/src/aig/ntl/ntlMap.c
index d4c7d81b..59c40453 100644
--- a/src/aig/ntl/ntlMap.c
+++ b/src/aig/ntl/ntlMap.c
@@ -412,7 +412,7 @@ void Ntk_ManSetIfParsDefault( If_Par_t * pPars )
   SeeAlso     []
 
 ***********************************************************************/
-If_Man_t * Ntk_ManToIf( Aig_Man_t * p, If_Par_t * pPars )
+If_Man_t * Ntk_ManToIf_old( Aig_Man_t * p, If_Par_t * pPars )
 {
     If_Man_t * pIfMan;
     Aig_Obj_t * pNode;//, * pFanin, * pPrev;
@@ -455,6 +455,58 @@ If_Man_t * Ntk_ManToIf( Aig_Man_t * p, If_Par_t * pPars )
 
 /**Function*************************************************************
 
+  Synopsis    [Load the network into FPGA manager.]
+
+  Description []
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+If_Man_t * Ntk_ManToIf( Aig_Man_t * p, If_Par_t * pPars )
+{
+    If_Man_t * pIfMan;
+    Aig_Obj_t * pNode;//, * pFanin, * pPrev;
+    int i;
+    // start the mapping manager and set its parameters
+    pIfMan = If_ManStart( pPars );
+    // print warning about excessive memory usage
+    if ( 1.0 * Aig_ManObjNum(p) * pIfMan->nObjBytes / (1<<30) > 1.0 )
+        printf( "Warning: The mapper will allocate %.1f Gb for to represent the subject graph with %d AIG nodes.\n", 
+            1.0 * Aig_ManObjNum(p) * pIfMan->nObjBytes / (1<<30), Aig_ManObjNum(p) );
+    // load the AIG into the mapper
+    Aig_ManForEachObj( p, pNode, i )
+    {
+        if ( Aig_ObjIsAnd(pNode) )
+            pNode->pData = (Aig_Obj_t *)If_ManCreateAnd( pIfMan, 
+                If_NotCond( (If_Obj_t *)Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ), 
+                If_NotCond( (If_Obj_t *)Aig_ObjFanin1(pNode)->pData, Aig_ObjFaninC1(pNode) ) );
+        else if ( Aig_ObjIsPi(pNode) )
+        {
+            pNode->pData = If_ManCreateCi( pIfMan );
+            ((If_Obj_t *)pNode->pData)->Level = pNode->Level;
+        }
+        else if ( Aig_ObjIsPo(pNode) )
+            If_ManCreateCo( pIfMan, If_NotCond( Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ) );
+        else if ( Aig_ObjIsConst1(pNode) )
+            Aig_ManConst1(p)->pData = If_ManConst1( pIfMan );
+        else // add the node to the mapper
+            assert( 0 );
+        // set up the choice node
+//        if ( Aig_AigNodeIsChoice( pNode ) )
+//        {
+//            pIfMan->nChoices++;
+//            for ( pPrev = pNode, pFanin = pNode->pData; pFanin; pPrev = pFanin, pFanin = pFanin->pData )
+//                If_ObjSetChoice( (If_Obj_t *)pPrev->pData, (If_Obj_t *)pFanin->pData );
+//            If_ManCreateChoice( pIfMan, (If_Obj_t *)pNode->pData );
+//        }
+    }
+    return pIfMan;
+}
+
+/**Function*************************************************************
+
   Synopsis    [Creates the mapped network.]
 
   Description []
@@ -491,10 +543,9 @@ Vec_Ptr_t * Ntk_ManFromIf( Aig_Man_t * p, If_Man_t * pMan )
         Vec_IntWriteEntry( vIfToAig, pNode->Id, pObj->Id );
     }
     // create the mapping
-    If_ManScanMappingDirect( pMan );
+    vIfMap   = If_ManCollectMappingDirect( pMan );
     nVarsMax = pMan->pPars->nLutSize;
     nWords   = Aig_TruthWordNum( nVarsMax );
-    vIfMap   = pMan->vMapped;
     vMapping = Ntl_MappingAlloc( Vec_PtrSize(vIfMap) + (int)(Aig_ManConst1(p)->nRefs > 0), nVarsMax );
     nLuts    = 0;
     if ( Aig_ManConst1(p)->nRefs > 0 )
@@ -521,6 +572,7 @@ Vec_Ptr_t * Ntk_ManFromIf( Aig_Man_t * p, If_Man_t * pMan )
     }
     assert( nLuts == Vec_PtrSize(vMapping) );
     Vec_IntFree( vIfToAig );
+    Vec_PtrFree( vIfMap );
     return vMapping;
 }
 
@@ -535,7 +587,7 @@ Vec_Ptr_t * Ntk_ManFromIf( Aig_Man_t * p, If_Man_t * pMan )
   SeeAlso     []
 
 ***********************************************************************/
-Vec_Ptr_t * Ntl_MappingIf( Aig_Man_t * p )
+Vec_Ptr_t * Ntl_MappingIf( Ntl_Man_t * pMan, Aig_Man_t * p )
 {
     Vec_Ptr_t * vMapping;
     If_Par_t Pars, * pPars = &Pars;
@@ -549,6 +601,7 @@ Vec_Ptr_t * Ntl_MappingIf( Aig_Man_t * p )
     pIfMan = Ntk_ManToIf( p, pPars );    
     if ( pIfMan == NULL )
         return NULL;
+    pIfMan->pManTim = Ntl_ManCreateTiming( pMan );
     if ( !If_ManPerformMapping( pIfMan ) )
     {
         If_ManStop( pIfMan );
diff --git a/src/aig/ntl/ntlTime.c b/src/aig/ntl/ntlTime.c
index c81686fa..50f3d290 100644
--- a/src/aig/ntl/ntlTime.c
+++ b/src/aig/ntl/ntlTime.c
@@ -82,26 +82,19 @@ Tim_Man_t * Ntl_ManCreateTiming( Ntl_Man_t * p )
     Vec_Ptr_t * vDelayTables;
     Ntl_Mod_t * pRoot, * pModel;
     Ntl_Obj_t * pObj;
-    int i, curPi, curPo, Entry;
+    int i, curPi, iBox, Entry;
     assert( p->pAig != NULL );
+    pRoot = Vec_PtrEntry( p->vModels, 0 );
     // start the timing manager
     pMan = Tim_ManStart( Aig_ManPiNum(p->pAig), Aig_ManPoNum(p->pAig) );
-    // add arrival time info for the true PIs
-    pRoot = Vec_PtrEntry( p->vModels, 0 );
-    Ntl_ModelForEachPi( pRoot, pObj, i )
-        Tim_ManInitPiArrival( pMan, i, 0.0 );
     // unpack the data in the arrival times
     if ( pRoot->vArrivals )
         Vec_IntForEachEntry( pRoot->vArrivals, Entry, i )
-            Tim_ManInitPiArrival( pMan, Entry, Vec_IntEntry(pRoot->vArrivals,++i) );
-    // add the required time into for the true POs
-    pRoot = Vec_PtrEntry( p->vModels, 0 );
-    Ntl_ModelForEachPo( pRoot, pObj, i )
-        Tim_ManInitPoRequired( pMan, i, AIG_INFINITY );
+            Tim_ManInitPiArrival( pMan, Entry, Aig_Int2Float(Vec_IntEntry(pRoot->vArrivals,++i)) );
     // unpack the data in the required times
     if ( pRoot->vRequireds )
         Vec_IntForEachEntry( pRoot->vRequireds, Entry, i )
-            Tim_ManInitPoRequired( pMan, Entry, Vec_IntEntry(pRoot->vRequireds,++i) );
+            Tim_ManInitPoRequired( pMan, Entry, Aig_Int2Float(Vec_IntEntry(pRoot->vRequireds,++i)) );
     // derive timing tables
     vDelayTables = Vec_PtrAlloc( Vec_PtrSize(p->vModels) );
     Ntl_ManForEachModel( p, pModel, i )
@@ -112,17 +105,18 @@ Tim_Man_t * Ntl_ManCreateTiming( Ntl_Man_t * p )
     }
     Tim_ManSetDelayTables( pMan, vDelayTables );
     // set up the boxes
-    curPi = Ntl_ModelPiNum(pRoot);
-    curPo = Ntl_ModelPoNum(pRoot);
+    iBox = 0;
+    curPi = Ntl_ModelCiNum(pRoot);
     Ntl_ManForEachBox( p, pObj, i )
     {
-        Tim_ManCreateBoxFirst( pMan, curPo, Ntl_ObjFanoutNum(pObj), curPi, Ntl_ObjFaninNum(pObj), pObj->pImplem->pDelayTable );
-        curPo += Ntl_ObjFanoutNum(pObj);
-        curPi += Ntl_ObjFaninNum(pObj);
+        Tim_ManCreateBoxFirst( pMan, Vec_IntEntry(p->vBox1Cos, iBox), Ntl_ObjFaninNum(pObj), curPi, Ntl_ObjFanoutNum(pObj), pObj->pImplem->pDelayTable );
+        curPi += Ntl_ObjFanoutNum(pObj);
+        iBox++;
     }
     // forget refs to the delay tables in the network
     Ntl_ManForEachModel( p, pModel, i )
         pModel->pDelayTable = NULL;
+//    Tim_ManPrint( pMan );
     return pMan;
 }