diff options
| author | Alan Mishchenko <alanmi@berkeley.edu> | 2008-04-16 08:01:00 -0700 |
|---|---|---|
| committer | Alan Mishchenko <alanmi@berkeley.edu> | 2008-04-16 08:01:00 -0700 |
| commit | b51685d6936fa397e143e1dc3b1127327325c100 (patch) | |
| tree | e5d47fee0a5d81c30a31e07c3cf9f26cdfb4f787 /src/aig/saig/saig.h | |
| parent | 45827110d61cb2a7013e1251b32428bca70ceeeb (diff) | |
| download | abc-b51685d6936fa397e143e1dc3b1127327325c100.tar.gz abc-b51685d6936fa397e143e1dc3b1127327325c100.tar.bz2 abc-b51685d6936fa397e143e1dc3b1127327325c100.zip | |
Version abc80416
Diffstat (limited to 'src/aig/saig/saig.h')
| -rw-r--r-- | src/aig/saig/saig.h | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/src/aig/saig/saig.h b/src/aig/saig/saig.h new file mode 100644 index 00000000..ce09fd32 --- /dev/null +++ b/src/aig/saig/saig.h @@ -0,0 +1,82 @@ +/**CFile**************************************************************** + + FileName [saig.h] + + SystemName [ABC: Logic synthesis and verification system.] + + PackageName [Sequential AIG package.] + + Synopsis [External declarations.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - June 20, 2005.] + + Revision [$Id: saig.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#ifndef __SAIG_H__ +#define __SAIG_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +//////////////////////////////////////////////////////////////////////// +/// INCLUDES /// +//////////////////////////////////////////////////////////////////////// + +#include "aig.h" + +//////////////////////////////////////////////////////////////////////// +/// PARAMETERS /// +//////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////// +/// BASIC TYPES /// +//////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////// +/// MACRO DEFINITIONS /// +//////////////////////////////////////////////////////////////////////// + +static inline int Saig_ManPiNum( Aig_Man_t * p ) { return p->nTruePis; } +static inline int Saig_ManPoNum( Aig_Man_t * p ) { return p->nTruePos; } +static inline int Saig_ManRegNum( Aig_Man_t * p ) { return p->nRegs; } +static inline Aig_Obj_t * Saig_ManLo( Aig_Man_t * p, int i ) { return (Aig_Obj_t *)Vec_PtrEntry(p->vPis, Saig_ManPiNum(p)+i); } +static inline Aig_Obj_t * Saig_ManLi( Aig_Man_t * p, int i ) { return (Aig_Obj_t *)Vec_PtrEntry(p->vPos, Saig_ManPoNum(p)+i); } + +// iterator over the primary inputs/outputs +#define Saig_ManForEachPi( p, pObj, i ) \ + Vec_PtrForEachEntryStop( p->vPis, pObj, i, Saig_ManPiNum(p) ) +#define Saig_ManForEachPo( p, pObj, i ) \ + Vec_PtrForEachEntryStop( p->vPos, pObj, i, Saig_ManPoNum(p) ) +// iterator over the latch inputs/outputs +#define Saig_ManForEachLo( p, pObj, i ) \ + for ( i = 0; (i < Saig_ManRegNum(p)) && (((pObj) = Vec_PtrEntry(p->vPis, i+Saig_ManPiNum(p))), 1); i++ ) +#define Saig_ManForEachLi( p, pObj, i ) \ + for ( i = 0; (i < Saig_ManRegNum(p)) && (((pObj) = Vec_PtrEntry(p->vPos, i+Saig_ManPoNum(p))), 1); i++ ) +// iterator over the latch input and outputs +#define Saig_ManForEachLiLo( p, pObjLi, pObjLo, i ) \ + for ( i = 0; (i < Saig_ManRegNum(p)) && (((pObjLi) = Saig_ManLi(p, i)), 1) \ + && (((pObjLo)=Saig_ManLo(p, i)), 1); i++ ) + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +/*=== saigPhase.c ==========================================================*/ + +#ifdef __cplusplus +} +#endif + +#endif + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + |