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| author | Alan Mishchenko <alanmi@berkeley.edu> | 2013-05-03 19:58:25 -0700 |
|---|---|---|
| committer | Alan Mishchenko <alanmi@berkeley.edu> | 2013-05-03 19:58:25 -0700 |
| commit | 50095be5ac2c1b9830a74c87fd0d8e2edc8b8438 (patch) | |
| tree | 06e61100033466fac89fadda0eeb22dff338c8bf /src/base/abci/abcDar.c | |
| parent | a59968ce8c55618ca7c84972faacba31c591a39f (diff) | |
| download | abc-50095be5ac2c1b9830a74c87fd0d8e2edc8b8438.tar.gz abc-50095be5ac2c1b9830a74c87fd0d8e2edc8b8438.tar.bz2 abc-50095be5ac2c1b9830a74c87fd0d8e2edc8b8438.zip | |
Adding runtime limit per output to multi-output DPR (pdr -H <num_sec>).
Diffstat (limited to 'src/base/abci/abcDar.c')
| -rw-r--r-- | src/base/abci/abcDar.c | 43 |
1 files changed, 28 insertions, 15 deletions
diff --git a/src/base/abci/abcDar.c b/src/base/abci/abcDar.c index abf08599..c351df45 100644 --- a/src/base/abci/abcDar.c +++ b/src/base/abci/abcDar.c @@ -2176,8 +2176,12 @@ int Abc_NtkDarBmc3( Abc_Ntk_t * pNtk, Saig_ParBmc_t * pPars, int fOrDecomp ) else if ( Vec_PtrCountZero(pMan->vSeqModelVec) == 0 ) Abc_Print( 1, "All %d outputs are found to be SAT. ", nOutputs ); else - Abc_Print( 1, "Some outputs (%d out of %d) are found to be SAT. ", - nOutputs - Vec_PtrCountZero(pMan->vSeqModelVec), nOutputs ); + { + Abc_Print( 1, "Some outputs are SAT (%d out of %d)", nOutputs - Vec_PtrCountZero(pMan->vSeqModelVec), nOutputs ); + if ( pPars->nDropOuts ) + Abc_Print( 1, " while others timed out (%d out of %d)", pPars->nDropOuts, nOutputs ); + Abc_Print( 1, ". " ); + } if ( pNtk->vSeqModelVec ) Vec_PtrFreeFree( pNtk->vSeqModelVec ); pNtk->vSeqModelVec = pMan->vSeqModelVec; pMan->vSeqModelVec = NULL; @@ -2743,22 +2747,15 @@ int Abc_NtkDarPdr( Abc_Ntk_t * pNtk, Pdr_Par_t * pPars ) return -1; } RetValue = Pdr_ManSolve( pMan, pPars ); + pPars->nDropOuts = Saig_ManPoNum(pMan) - pPars->nProveOuts - pPars->nFailOuts; if ( !pPars->fSilent ) { - if ( RetValue == 1 ) + if ( pPars->fSolveAll ) + Abc_Print( 1, "Properties: All = %d. Proved = %d. Disproved = %d. Undecided = %d. ", + Saig_ManPoNum(pMan), pPars->nProveOuts, pPars->nFailOuts, pPars->nDropOuts ); + else if ( RetValue == 1 ) Abc_Print( 1, "Property proved. " ); - else if ( pPars->fSolveAll ) - { - int nOutputs = Saig_ManPoNum(pMan) - Saig_ManConstrNum(pMan); - if ( pMan->vSeqModelVec == NULL || Vec_PtrCountZero(pMan->vSeqModelVec) == nOutputs ) - Abc_Print( 1, "None of the %d outputs is found to be SAT. ", nOutputs ); - else if ( Vec_PtrCountZero(pMan->vSeqModelVec) == 0 ) - Abc_Print( 1, "All %d outputs are found to be SAT. ", nOutputs ); - else - Abc_Print( 1, "Some outputs (%d out of %d) are found to be SAT. ", - nOutputs - Vec_PtrCountZero(pMan->vSeqModelVec), nOutputs ); - } - else + else { if ( RetValue == 0 ) { @@ -2777,6 +2774,22 @@ int Abc_NtkDarPdr( Abc_Ntk_t * pNtk, Pdr_Par_t * pPars ) assert( 0 ); } ABC_PRT( "Time", clock() - clk ); +/* + Abc_Print( 1, "Status: " ); + if ( pPars->pOutMap ) + { + int i; + for ( i = 0; i < Saig_ManPoNum(pMan); i++ ) + if ( pPars->pOutMap[i] == 1 ) + Abc_Print( 1, "%d=%s ", i, "unsat" ); + else if ( pPars->pOutMap[i] == 0 ) + Abc_Print( 1, "%d=%s ", i, "sat" ); + else if ( pPars->pOutMap[i] < 0 ) + Abc_Print( 1, "%d=%s ", i, "undec" ); + else assert( 0 ); + } + Abc_Print( 1, "\n" ); +*/ } ABC_FREE( pNtk->pSeqModel ); pNtk->pSeqModel = pMan->pSeqModel; |