Version abc60611

6 files changed, 211 insertions, 74 deletions

diff --git a/src/base/io/io.h b/src/base/io/io.h
index b408293e..8c8d6bed 100644
--- a/src/base/io/io.h
+++ b/src/base/io/io.h
@@ -68,6 +68,7 @@ extern Abc_Ntk_t *        Io_ReadPla( char * pFileName, int fCheck );
 /*=== abcUtil.c ==========================================================*/
 extern Abc_Obj_t *        Io_ReadCreatePi( Abc_Ntk_t * pNtk, char * pName );
 extern Abc_Obj_t *        Io_ReadCreatePo( Abc_Ntk_t * pNtk, char * pName );
+extern Abc_Obj_t *        Io_ReadCreateAssert( Abc_Ntk_t * pNtk, char * pName );
 extern Abc_Obj_t *        Io_ReadCreateLatch( Abc_Ntk_t * pNtk, char * pNetLI, char * pNetLO );
 extern Abc_Obj_t *        Io_ReadCreateNode( Abc_Ntk_t * pNtk, char * pNameOut, char * pNamesIn[], int nInputs );
 extern Abc_Obj_t *        Io_ReadCreateConst( Abc_Ntk_t * pNtk, char * pName, bool fConst1 );
diff --git a/src/base/io/ioReadBaf.c b/src/base/io/ioReadBaf.c
index e2aa2109..8f4a8ec4 100644
--- a/src/base/io/ioReadBaf.c
+++ b/src/base/io/ioReadBaf.c
@@ -100,8 +100,6 @@ Abc_Ntk_t * Io_ReadBaf( char * pFileName, int fCheck )
         pObj = Abc_NtkCreateLatch(pNtkNew);
         Abc_NtkLogicStoreName( pObj, pCur );  while ( *pCur++ ); 
         Vec_PtrPush( vNodes, pObj );
-        Vec_PtrPush( pNtkNew->vCis, pObj );
-        Vec_PtrPush( pNtkNew->vCos, pObj );
     }
 
     // get the pointer to the beginning of the node array
diff --git a/src/base/io/ioReadBlif.c b/src/base/io/ioReadBlif.c
index 3d33e6a3..11dd2db1 100644
--- a/src/base/io/ioReadBlif.c
+++ b/src/base/io/ioReadBlif.c
@@ -33,6 +33,7 @@ struct Io_ReadBlif_t_
     char *               pFileName;    // the name of the file
     Extra_FileReader_t * pReader;      // the input file reader
     // current processing info
+    Abc_Ntk_t *          pNtkMaster;   // the primary network
     Abc_Ntk_t *          pNtkCur;      // the primary network
     int                  LineCur;      // the line currently parsed
     // temporary storage for tokens
@@ -54,6 +55,7 @@ static Abc_Ntk_t * Io_ReadBlifNetwork( Io_ReadBlif_t * p );
 static Abc_Ntk_t * Io_ReadBlifNetworkOne( Io_ReadBlif_t * p );
 static int Io_ReadBlifNetworkInputs( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
 static int Io_ReadBlifNetworkOutputs( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
+static int Io_ReadBlifNetworkAsserts( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
 static int Io_ReadBlifNetworkLatch( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
 static int Io_ReadBlifNetworkNames( Io_ReadBlif_t * p, Vec_Ptr_t ** pvTokens );
 static int Io_ReadBlifNetworkGate( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
@@ -151,7 +153,7 @@ Abc_Ntk_t * Io_ReadBlifNetwork( Io_ReadBlif_t * p )
         // add this network as part of the hierarchy
         if ( pNtkMaster == NULL ) // no master network so far
         {
-            pNtkMaster = pNtk;
+            p->pNtkMaster = pNtkMaster = pNtk;
             continue;
         }
         // make sure hierarchy does not have the network with this name
@@ -222,11 +224,12 @@ Abc_Ntk_t * Io_ReadBlifNetworkOne( Io_ReadBlif_t * p )
     }
 
     // read the inputs/outputs
+    if ( p->pNtkMaster == NULL )
     pProgress = Extra_ProgressBarStart( stdout, Extra_FileReaderGetFileSize(p->pReader) );
     fTokensReady = fStatus = 0;
     for ( iLine = 0; fTokensReady || (p->vTokens = Io_ReadBlifGetTokens(p)); iLine++ )
     {
-        if ( iLine % 1000 == 0 )
+        if ( p->pNtkMaster == NULL && iLine % 1000 == 0 )
         Extra_ProgressBarUpdate( pProgress, Extra_FileReaderGetCurPosition(p->pReader), NULL );
 
         // consider different line types
@@ -242,6 +245,8 @@ Abc_Ntk_t * Io_ReadBlifNetworkOne( Io_ReadBlif_t * p )
             fStatus = Io_ReadBlifNetworkInputs( p, p->vTokens );
         else if ( !strcmp( pDirective, ".outputs" ) )
             fStatus = Io_ReadBlifNetworkOutputs( p, p->vTokens );
+        else if ( !strcmp( pDirective, ".asserts" ) )
+            fStatus = Io_ReadBlifNetworkAsserts( p, p->vTokens );
         else if ( !strcmp( pDirective, ".input_arrival" ) )
             fStatus = Io_ReadBlifNetworkInputArrival( p, p->vTokens );
         else if ( !strcmp( pDirective, ".default_input_arrival" ) )
@@ -257,8 +262,10 @@ Abc_Ntk_t * Io_ReadBlifNetworkOne( Io_ReadBlif_t * p )
         }
         else if ( !strcmp( pDirective, ".blackbox" ) )
         {
-            pNtk->ntkType = ABC_NTK_BLACKBOX;
+            pNtk->ntkType = ABC_NTK_NETLIST;
             pNtk->ntkFunc = ABC_FUNC_BLACKBOX;
+            Extra_MmFlexStop( pNtk->pManFunc, 0 );
+            pNtk->pManFunc = NULL;
         }
         else
             printf( "%s (line %d): Skipping directive \"%s\".\n", p->pFileName, 
@@ -268,6 +275,7 @@ Abc_Ntk_t * Io_ReadBlifNetworkOne( Io_ReadBlif_t * p )
         if ( fStatus == 1 )
             return NULL;
     }
+    if ( p->pNtkMaster == NULL )
     Extra_ProgressBarStop( pProgress );
     return pNtk;
 }
@@ -321,6 +329,25 @@ int Io_ReadBlifNetworkOutputs( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
   SeeAlso     []
 
 ***********************************************************************/
+int Io_ReadBlifNetworkAsserts( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
+{
+    int i;
+    for ( i = 1; i < vTokens->nSize; i++ )
+        Io_ReadCreateAssert( p->pNtkCur, vTokens->pArray[i] );
+    return 0;
+}
+
+/**Function*************************************************************
+
+  Synopsis    []
+
+  Description []
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
 int Io_ReadBlifNetworkLatch( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
 {
     Abc_Ntk_t * pNtk = p->pNtkCur;
@@ -340,7 +367,7 @@ int Io_ReadBlifNetworkLatch( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
         Abc_LatchSetInitDc( pLatch );
     else
     {
-        ResetValue = atoi(vTokens->pArray[3]);
+        ResetValue = atoi(vTokens->pArray[vTokens->nSize-1]);
         if ( ResetValue != 0 && ResetValue != 1 && ResetValue != 2 )
         {
             p->LineCur = Extra_FileReaderGetLineNumber(p->pReader, 0);
@@ -870,50 +897,55 @@ int Io_ReadBlifNetworkConnectBoxesOneBox( Io_ReadBlif_t * p, Abc_Obj_t * pBox, s
     // create the fanins of the box
     Abc_NtkForEachPi( pNtkModel, pObj, i )
         pObj->pCopy = NULL;
-    Vec_PtrForEachEntryStart( pNames, pName, i, 1 )
+    if ( Abc_NtkPiNum(pNtkModel) == 0 )
+        Start = 1;
+    else
     {
-        pActual = Io_ReadBlifCleanName(pName);
-        if ( pActual == NULL )
-        {
-            p->LineCur = (int)pBox->pCopy;
-            sprintf( p->sError, "Cannot parse formal/actual name pair \"%s\".", pName );
-            Io_ReadBlifPrintErrorMessage( p );
-            return 1;
-        }
-        Length = pActual - pName - 1;
-        pName[Length] = 0;
-        // find the PI net with this name
-        pObj = Abc_NtkFindNet( pNtkModel, pName );
-        if ( pObj == NULL )
-        {
-            p->LineCur = (int)pBox->pCopy;
-            sprintf( p->sError, "Cannot find formal input \"%s\" as an PI of model \"%s\".", pName, Vec_PtrEntry(pNames, 0) );
-            Io_ReadBlifPrintErrorMessage( p );
-            return 1;
-        }
-        // get the PI
-        pObj = Abc_ObjFanin0(pObj);
-        // quit if this is not a PI net
-        if ( !Abc_ObjIsPi(pObj) )
-        {
-            pName[Length] = '=';
-            Start = i;
-            break;
-        }
-        // remember the actual name in the net
-        if ( pObj->pCopy != NULL )
-        {
-            p->LineCur = (int)pBox->pCopy;
-            sprintf( p->sError, "Formal input \"%s\" is used more than once.", pName );
-            Io_ReadBlifPrintErrorMessage( p );
-            return 1;
-        }
-        pObj->pCopy = (void *)pActual;
-        // quit if we processed all PIs
-        if ( i == Abc_NtkPiNum(pNtkModel) )
+        Vec_PtrForEachEntryStart( pNames, pName, i, 1 )
         {
-            Start = i+1;
-            break;
+            pActual = Io_ReadBlifCleanName(pName);
+            if ( pActual == NULL )
+            {
+                p->LineCur = (int)pBox->pCopy;
+                sprintf( p->sError, "Cannot parse formal/actual name pair \"%s\".", pName );
+                Io_ReadBlifPrintErrorMessage( p );
+                return 1;
+            }
+            Length = pActual - pName - 1;
+            pName[Length] = 0;
+            // find the PI net with this name
+            pObj = Abc_NtkFindNet( pNtkModel, pName );
+            if ( pObj == NULL )
+            {
+                p->LineCur = (int)pBox->pCopy;
+                sprintf( p->sError, "Cannot find formal input \"%s\" as an PI of model \"%s\".", pName, Vec_PtrEntry(pNames, 0) );
+                Io_ReadBlifPrintErrorMessage( p );
+                return 1;
+            }
+            // get the PI
+            pObj = Abc_ObjFanin0(pObj);
+            // quit if this is not a PI net
+            if ( !Abc_ObjIsPi(pObj) )
+            {
+                pName[Length] = '=';
+                Start = i;
+                break;
+            }
+            // remember the actual name in the net
+            if ( pObj->pCopy != NULL )
+            {
+                p->LineCur = (int)pBox->pCopy;
+                sprintf( p->sError, "Formal input \"%s\" is used more than once.", pName );
+                Io_ReadBlifPrintErrorMessage( p );
+                return 1;
+            }
+            pObj->pCopy = (void *)pActual;
+            // quit if we processed all PIs
+            if ( i == Abc_NtkPiNum(pNtkModel) )
+            {
+                Start = i+1;
+                break;
+            }
         }
     }
     // create the fanins of the box
@@ -986,6 +1018,8 @@ int Io_ReadBlifNetworkConnectBoxesOneBox( Io_ReadBlif_t * p, Abc_Obj_t * pBox, s
         pObj->pCopy = NULL;
 
     // remove the array of names, assign the pointer to the model
+    Vec_PtrForEachEntry( pBox->pData, pName, i )
+        free( pName );
     Vec_PtrFree( pBox->pData );
     pBox->pData = pNtkModel;
     return 0;
diff --git a/src/base/io/ioUtil.c b/src/base/io/ioUtil.c
index fc37bc3f..5482eed4 100644
--- a/src/base/io/ioUtil.c
+++ b/src/base/io/ioUtil.c
@@ -80,6 +80,31 @@ Abc_Obj_t * Io_ReadCreatePo( Abc_Ntk_t * pNtk, char * pName )
 
 /**Function*************************************************************
 
+  Synopsis    [Creates PO terminal and net.]
+
+  Description []
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+Abc_Obj_t * Io_ReadCreateAssert( Abc_Ntk_t * pNtk, char * pName )
+{
+    Abc_Obj_t * pNet, * pTerm;
+    // get the PO net
+    pNet  = Abc_NtkFindNet( pNtk, pName );
+    if ( pNet && Abc_ObjFaninNum(pNet) == 0 )
+        printf( "Warning: Assert \"%s\" appears twice in the list.\n", pName );
+    pNet  = Abc_NtkFindOrCreateNet( pNtk, pName );
+    // add the PO node
+    pTerm = Abc_NtkCreateAssert( pNtk );
+    Abc_ObjAddFanin( pTerm, pNet );
+    return pTerm;
+}
+
+/**Function*************************************************************
+
   Synopsis    [Create a latch with the given input/output.]
 
   Description [By default, the latch value is unknown (ABC_INIT_NONE).]
diff --git a/src/base/io/ioWriteBlif.c b/src/base/io/ioWriteBlif.c
index 1e27498d..8cbd0cd0 100644
--- a/src/base/io/ioWriteBlif.c
+++ b/src/base/io/ioWriteBlif.c
@@ -30,6 +30,7 @@ static void Io_NtkWrite( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches );
 static void Io_NtkWriteOne( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches );
 static void Io_NtkWritePis( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches );
 static void Io_NtkWritePos( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches );
+static void Io_NtkWriteAsserts( FILE * pFile, Abc_Ntk_t * pNtk );
 static void Io_NtkWriteNodeGate( FILE * pFile, Abc_Obj_t * pNode );
 static void Io_NtkWriteNodeFanins( FILE * pFile, Abc_Obj_t * pNode );
 static void Io_NtkWriteNode( FILE * pFile, Abc_Obj_t * pNode );
@@ -115,7 +116,7 @@ void Io_WriteBlifNetlist( Abc_Ntk_t * pNtk, char * FileName, int fWriteLatches )
 void Io_NtkWrite( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches )
 {
     Abc_Ntk_t * pExdc;
-    assert( Abc_NtkIsNetlist(pNtk) || Abc_NtkIsBlackbox(pNtk) );
+    assert( Abc_NtkIsNetlist(pNtk) );
     // write the model name
     fprintf( pFile, ".model %s\n", Abc_NtkName(pNtk) );
     // write the network
@@ -159,8 +160,16 @@ void Io_NtkWriteOne( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches )
     Io_NtkWritePos( pFile, pNtk, fWriteLatches );
     fprintf( pFile, "\n" );
 
+    // write the assertions
+    if ( Abc_NtkAssertNum(pNtk) )
+    {
+        fprintf( pFile, ".asserts" );
+        Io_NtkWriteAsserts( pFile, pNtk );
+        fprintf( pFile, "\n" );
+    }
+
     // write the blackbox
-    if ( Abc_NtkIsBlackbox( pNtk ) )
+    if ( Abc_NtkHasBlackbox( pNtk ) )
     {
         fprintf( pFile, ".blackbox\n" );
         return;
@@ -296,6 +305,8 @@ void Io_NtkWritePos( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches )
     {
         Abc_NtkForEachCo( pNtk, pTerm, i )
         {
+            if ( Abc_ObjIsAssert(pTerm) )
+                continue;
             pNet = Abc_ObjFanin0(pTerm);
             // get the line length after this name is written
             AddedLength = strlen(Abc_ObjName(pNet)) + 1;
@@ -313,6 +324,45 @@ void Io_NtkWritePos( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches )
     }
 }
 
+/**Function*************************************************************
+
+  Synopsis    [Writes the assertion list.]
+
+  Description []
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+void Io_NtkWriteAsserts( FILE * pFile, Abc_Ntk_t * pNtk )
+{
+    Abc_Obj_t * pTerm, * pNet;
+    int LineLength;
+    int AddedLength;
+    int NameCounter;
+    int i;
+
+    LineLength  = 8;
+    NameCounter = 0;
+
+    Abc_NtkForEachAssert( pNtk, pTerm, i )
+    {
+        pNet = Abc_ObjFanin0(pTerm);
+        // get the line length after this name is written
+        AddedLength = strlen(Abc_ObjName(pNet)) + 1;
+        if ( NameCounter && LineLength + AddedLength + 3 > IO_WRITE_LINE_LENGTH )
+        { // write the line extender
+            fprintf( pFile, " \\\n" );
+            // reset the line length
+            LineLength  = 0;
+            NameCounter = 0;
+        }
+        fprintf( pFile, " %s", Abc_ObjName(pNet) );
+        LineLength += AddedLength;
+        NameCounter++;
+    }
+}
 
 /**Function*************************************************************
 
diff --git a/src/base/io/ioWriteVer.c b/src/base/io/ioWriteVer.c
index 75467d4d..e18f9b12 100644
--- a/src/base/io/ioWriteVer.c
+++ b/src/base/io/ioWriteVer.c
@@ -33,7 +33,6 @@ static void Io_WriteVerilogWires( FILE * pFile, Abc_Ntk_t * pNtk, int Start );
 static void Io_WriteVerilogRegs( FILE * pFile, Abc_Ntk_t * pNtk, int Start );
 static void Io_WriteVerilogGates( FILE * pFile, Abc_Ntk_t * pNtk );
 static void Io_WriteVerilogNodes( FILE * pFile, Abc_Ntk_t * pNtk );
-static void Io_WriteVerilogArgs( FILE * pFile, Abc_Obj_t * pObj, int nInMax, int fPadZeros );
 static void Io_WriteVerilogLatches( FILE * pFile, Abc_Ntk_t * pNtk );
 static int Io_WriteVerilogCheckNtk( Abc_Ntk_t * pNtk );
 static char * Io_WriteVerilogGetName( Abc_Obj_t * pObj );
@@ -225,7 +224,7 @@ void Io_WriteVerilogWires( FILE * pFile, Abc_Ntk_t * pNtk, int Start )
     int i, Counter, nNodes;
 
     // count the number of wires
-    nNodes = 0;
+    nNodes = Abc_NtkLatchNum(pNtk);
     Abc_NtkForEachNode( pNtk, pTerm, i )
     {
         if ( i == 0 ) 
@@ -261,6 +260,24 @@ void Io_WriteVerilogWires( FILE * pFile, Abc_Ntk_t * pNtk, int Start )
         LineLength += AddedLength;
         NameCounter++;
     }
+    Abc_NtkForEachLatch( pNtk, pTerm, i )
+    {
+        pNet = Abc_ObjFanin0(pTerm);
+        Counter++;
+        // get the line length after this name is written
+        AddedLength = strlen(Abc_ObjName(pNet)) + 2;
+        if ( NameCounter && LineLength + AddedLength + 3 > IO_WRITE_LINE_LENGTH )
+        { // write the line extender
+            fprintf( pFile, "\n   " );
+            // reset the line length
+            LineLength  = 3;
+            NameCounter = 0;
+        }
+        fprintf( pFile, " %s%s", Io_WriteVerilogGetName(pNet), (Counter==nNodes)? "" : "," );
+        LineLength += AddedLength;
+        NameCounter++;
+    }
+    assert( Counter == nNodes );
 }
 
 /**Function*************************************************************
@@ -325,12 +342,15 @@ void Io_WriteVerilogLatches( FILE * pFile, Abc_Ntk_t * pNtk )
     int i;
     Abc_NtkForEachLatch( pNtk, pLatch, i )
     {
+//        fprintf( pFile, "  always@(posedge  gclk) begin %s",     Abc_ObjName(Abc_ObjFanout0(pLatch)) );
+        fprintf( pFile, "  always begin %s",     Abc_ObjName(Abc_ObjFanout0(pLatch)) );
+        fprintf( pFile, " = %s; end\n", Abc_ObjName(Abc_ObjFanin0(pLatch)) );
         if ( Abc_LatchInit(pLatch) == ABC_INIT_ZERO )
-            fprintf( pFile, "  initial begin %s = 1\'b0; end\n", Abc_ObjName(Abc_ObjFanout0(pLatch)) );
+//            fprintf( pFile, "  initial begin %s = 1\'b0; end\n", Abc_ObjName(Abc_ObjFanout0(pLatch)) );
+            fprintf( pFile, "  initial begin %s = 0; end\n", Abc_ObjName(Abc_ObjFanout0(pLatch)) );
         else if ( Abc_LatchInit(pLatch) == ABC_INIT_ONE )
-            fprintf( pFile, "  initial begin %s = 1\'b1; end\n", Abc_ObjName(Abc_ObjFanout0(pLatch)) );
-        fprintf( pFile, "  always@(posedge  gclk) begin %s",     Abc_ObjName(Abc_ObjFanout0(pLatch)) );
-        fprintf( pFile, " = %s; end\n", Abc_ObjName(Abc_ObjFanin0(pLatch)) );
+//            fprintf( pFile, "  initial begin %s = 1\'b1; end\n", Abc_ObjName(Abc_ObjFanout0(pLatch)) );
+            fprintf( pFile, "  initial begin %s = 1; end\n", Abc_ObjName(Abc_ObjFanout0(pLatch)) );
     }
 }
 
@@ -378,7 +398,7 @@ void Io_WriteVerilogGates( FILE * pFile, Abc_Ntk_t * pNtk )
   SeeAlso     []
 
 ***********************************************************************/
-void Io_WriteVerilogNodes( FILE * pFile, Abc_Ntk_t * pNtk )
+void Io_WriteVerilogNodes2( FILE * pFile, Abc_Ntk_t * pNtk )
 {
     Abc_Obj_t * pObj, * pFanin;
     int i, k, nFanins;
@@ -390,7 +410,8 @@ void Io_WriteVerilogNodes( FILE * pFile, Abc_Ntk_t * pNtk )
         nFanins = Abc_ObjFaninNum(pObj);
         if ( nFanins == 0 )
         {
-            fprintf( pFile, "  assign %s = 1'b%d;\n", Io_WriteVerilogGetName(Abc_ObjFanout0(pObj)), !Abc_SopIsComplement(pObj->pData) );
+//            fprintf( pFile, "  assign %s = 1'b%d;\n", Io_WriteVerilogGetName(Abc_ObjFanout0(pObj)), !Abc_SopIsComplement(pObj->pData) );
+            fprintf( pFile, "  assign %s = %d;\n", Io_WriteVerilogGetName(Abc_ObjFanout0(pObj)), !Abc_SopIsComplement(pObj->pData) );
             continue;
         }
         if ( nFanins == 1 )
@@ -410,7 +431,7 @@ void Io_WriteVerilogNodes( FILE * pFile, Abc_Ntk_t * pNtk )
 
 /**Function*************************************************************
 
-  Synopsis    [Writes the inputs.]
+  Synopsis    [Writes the nodes.]
 
   Description []
                
@@ -419,24 +440,32 @@ void Io_WriteVerilogNodes( FILE * pFile, Abc_Ntk_t * pNtk )
   SeeAlso     []
 
 ***********************************************************************/
-void Io_WriteVerilogArgs( FILE * pFile, Abc_Obj_t * pObj, int nInMax, int fPadZeros )
+void Io_WriteVerilogNodes( FILE * pFile, Abc_Ntk_t * pNtk )
 {
-    Abc_Obj_t * pFanin;
-    int i, Counter = 2;
-    fprintf( pFile, "(.z (%s)", Io_WriteVerilogGetName(Abc_ObjFanout0(pObj)) );
-    Abc_ObjForEachFanin( pObj, pFanin, i )
-    {
-        if ( Counter++ % 4 == 0 )
-            fprintf( pFile, "\n   " );
-        fprintf( pFile, " .i%d (%s)", i+1, Io_WriteVerilogGetName(Abc_ObjFanin(pObj,i)) );
-    }
-    for ( ; i < nInMax; i++ )
+    Abc_Obj_t * pObj, * pFanin;
+    int i, k, nFanins;
+    char pOper[] = " ? ", Symb;
+    Abc_NtkForEachNode( pNtk, pObj, i )
     {
-        if ( Counter++ % 4 == 0 )
-            fprintf( pFile, "\n   " );
-        fprintf( pFile, " .i%d (%s)", i+1, fPadZeros? "1\'b0" : "1\'b1" );
+        assert( Abc_SopGetCubeNum(pObj->pData) == 1 );
+        nFanins = Abc_ObjFaninNum(pObj);
+        if ( nFanins == 0 )
+        {
+            fprintf( pFile, "  assign %s = 1'b%d;\n", Io_WriteVerilogGetName(Abc_ObjFanout0(pObj)), !Abc_SopIsComplement(pObj->pData) );
+            continue;
+        }
+        fprintf( pFile, "  assign %s = ", Io_WriteVerilogGetName(Abc_ObjFanout0(pObj)) );
+        pOper[1] = Abc_SopIsComplement(pObj->pData) ? '|' : '&';
+        Abc_ObjForEachFanin( pObj, pFanin, k )
+        {
+            Symb = ((char*)pObj->pData)[k];
+            assert( Symb == '0' || Symb == '1' );
+            if ( Symb == '0' )
+                fprintf( pFile, "~" );
+            fprintf( pFile, "%s%s", Io_WriteVerilogGetName(pFanin), (k==nFanins-1? "" : pOper) );
+        }
+        fprintf( pFile, ";\n" );
     }
-    fprintf( pFile, ");\n" );
 }
 
 /**Function*************************************************************