Version abc51205

8 files changed, 78 insertions, 11 deletions

diff --git a/src/map/fpga/fpga.c b/src/map/fpga/fpga.c
index 68b5f124..d9629ecc 100644
--- a/src/map/fpga/fpga.c
+++ b/src/map/fpga/fpga.c
@@ -57,8 +57,8 @@ void Fpga_Init( Abc_Frame_t * pAbc )
 {
     // set the default library
     //Fpga_LutLib_t s_LutLib = { "lutlib", 6, {0,1,2,4,8,16,32}, {0,1,2,3,4,5,6} };
-    Fpga_LutLib_t s_LutLib = { "lutlib", 5, {0,1,1,1,1,1}, {0,1,1,1,1,1} };
-    //Fpga_LutLib_t s_LutLib = { "lutlib", 4, {0,1,1,1,1}, {0,1,1,1,1} };
+//    Fpga_LutLib_t s_LutLib = { "lutlib", 5, {0,1,1,1,1,1}, {0,1,1,1,1,1} };
+    Fpga_LutLib_t s_LutLib = { "lutlib", 4, {0,1,1,1,1}, {0,1,1,1,1} };
     //Fpga_LutLib_t s_LutLib = { "lutlib", 3, {0,1,1,1}, {0,1,1,1} };
 
     Abc_FrameSetLibLut( Fpga_LutLibDup(&s_LutLib) );
diff --git a/src/map/fpga/fpga.h b/src/map/fpga/fpga.h
index dc2c0334..874a2d79 100644
--- a/src/map/fpga/fpga.h
+++ b/src/map/fpga/fpga.h
@@ -92,6 +92,7 @@ extern void            Fpga_ManSetChoiceNodeNum( Fpga_Man_t * p, int nChoiceNode
 extern void            Fpga_ManSetChoiceNum( Fpga_Man_t * p, int nChoices );
 extern void            Fpga_ManSetVerbose( Fpga_Man_t * p, int fVerbose );
 extern void            Fpga_ManSetSwitching( Fpga_Man_t * p, int fSwitching );
+extern void            Fpga_ManSetDelayTarget( Fpga_Man_t * p, float DelayTarget );
 extern void            Fpga_ManSetLatchNum( Fpga_Man_t * p, int nLatches );
 extern void            Fpga_ManSetName( Fpga_Man_t * p, char * pFileName );
 
diff --git a/src/map/fpga/fpgaCore.c b/src/map/fpga/fpgaCore.c
index c573fbad..36842ecf 100644
--- a/src/map/fpga/fpgaCore.c
+++ b/src/map/fpga/fpgaCore.c
@@ -118,7 +118,7 @@ PRT( "Time", p->timeMatch );
     {
 clk = clock();
         // compute the required times and the fanouts
-        Fpga_TimeComputeRequiredGlobal( p );
+        Fpga_TimeComputeRequiredGlobal( p, 1 );
         // remap topologically
         Fpga_MappingMatches( p, 0 );
         // get the resulting area
@@ -143,7 +143,7 @@ PRT( "Time", clock() - clk );
     {
 clk = clock();
         // compute the required times and the fanouts
-        Fpga_TimeComputeRequiredGlobal( p );
+        Fpga_TimeComputeRequiredGlobal( p, 0 );
         // remap topologically
         if ( p->fSwitching )
             Fpga_MappingMatchesSwitch( p );
diff --git a/src/map/fpga/fpgaCreate.c b/src/map/fpga/fpgaCreate.c
index 04d6e978..e6a9716f 100644
--- a/src/map/fpga/fpgaCreate.c
+++ b/src/map/fpga/fpgaCreate.c
@@ -66,6 +66,7 @@ void            Fpga_ManSetChoiceNodeNum( Fpga_Man_t * p, int nChoiceNodes ) { p
 void            Fpga_ManSetChoiceNum( Fpga_Man_t * p, int nChoices )         { p->nChoices = nChoices;          }   
 void            Fpga_ManSetVerbose( Fpga_Man_t * p, int fVerbose )           { p->fVerbose = fVerbose;          }   
 void            Fpga_ManSetSwitching( Fpga_Man_t * p, int fSwitching )       { p->fSwitching = fSwitching;      }   
+void            Fpga_ManSetDelayTarget( Fpga_Man_t * p, float DelayTarget )  { p->DelayTarget = DelayTarget;    }   
 void            Fpga_ManSetLatchNum( Fpga_Man_t * p, int nLatches )          { p->nLatches = nLatches;          }   
 void            Fpga_ManSetName( Fpga_Man_t * p, char * pFileName )          { p->pFileName = pFileName;        }   
 
diff --git a/src/map/fpga/fpgaInt.h b/src/map/fpga/fpgaInt.h
index c0dff20d..b6ac71d4 100644
--- a/src/map/fpga/fpgaInt.h
+++ b/src/map/fpga/fpgaInt.h
@@ -123,7 +123,8 @@ struct Fpga_ManStruct_t_
     int                 fAreaRecovery; // the flag to use area flow as the first parameter
     int                 fVerbose;      // the verbosiness flag
     int                 fSwitching;    // minimize the switching activity (instead of area)
-    int                 nTravIds;
+    int                 nTravIds;      // the counter of traversal IDs
+    float               DelayTarget;   // the target required times
 
     // support of choice nodes
     int                 nChoiceNodes;  // the number of choice nodes
@@ -331,7 +332,7 @@ extern float             Fpga_MappingGetSwitching( Fpga_Man_t * pMan, Fpga_NodeV
 extern float             Fpga_TimeCutComputeArrival( Fpga_Man_t * pMan, Fpga_Cut_t * pCut );
 extern float             Fpga_TimeCutComputeArrival_rec( Fpga_Man_t * pMan, Fpga_Cut_t * pCut );
 extern float             Fpga_TimeComputeArrivalMax( Fpga_Man_t * p );
-extern void              Fpga_TimeComputeRequiredGlobal( Fpga_Man_t * p );
+extern void              Fpga_TimeComputeRequiredGlobal( Fpga_Man_t * p, int fFirstTime );
 extern void              Fpga_TimeComputeRequired( Fpga_Man_t * p, float fRequired );
 extern void              Fpga_TimePropagateRequired( Fpga_Man_t * p, Fpga_NodeVec_t * vNodes );
 extern void              Fpga_TimePropagateArrival( Fpga_Man_t * p );
diff --git a/src/map/fpga/fpgaMatch.c b/src/map/fpga/fpgaMatch.c
index 21c7541d..736d38b2 100644
--- a/src/map/fpga/fpgaMatch.c
+++ b/src/map/fpga/fpgaMatch.c
@@ -501,7 +501,7 @@ void Fpga_Experiment( Fpga_Man_t * p )
         AreaBefore = pNode->pCutBest->aFlow;
         pNode->pCutBest->aFlow = FPGA_FLOAT_LARGE;
 
-        Fpga_TimeComputeRequiredGlobal( p );
+        Fpga_TimeComputeRequiredGlobal( p, 0 );
 
         vNodesTfo = Fpga_CollectNodeTfo( p, pNode );
         if ( Fpga_MappingMatchesAreaArray( p, vNodesTfo ) == 0 )
diff --git a/src/map/fpga/fpgaTime.c b/src/map/fpga/fpgaTime.c
index ed40c13e..76109b6e 100644
--- a/src/map/fpga/fpgaTime.c
+++ b/src/map/fpga/fpgaTime.c
@@ -109,9 +109,24 @@ float Fpga_TimeComputeArrivalMax( Fpga_Man_t * p )
   SeeAlso     []
 
 ***********************************************************************/
-void Fpga_TimeComputeRequiredGlobal( Fpga_Man_t * p )
+void Fpga_TimeComputeRequiredGlobal( Fpga_Man_t * p, int fFirstTime )
 {
     p->fRequiredGlo = Fpga_TimeComputeArrivalMax( p );
+    // update the required times according to the target
+    if ( p->DelayTarget != -1 )
+    {
+        if ( p->fRequiredGlo > p->DelayTarget + p->fEpsilon )
+        {
+            if ( fFirstTime )
+                printf( "Cannot meet the target required times (%4.2f). Mapping continues anyway.\n", p->DelayTarget );
+        }
+        else if ( p->fRequiredGlo < p->DelayTarget - p->fEpsilon )
+        {
+            if ( fFirstTime )
+                printf( "Relaxing the required times from (%4.2f) to the target (%4.2f).\n", p->fRequiredGlo, p->DelayTarget );
+            p->fRequiredGlo = p->DelayTarget;
+        }
+    }
     Fpga_TimeComputeRequired( p, p->fRequiredGlo );
 }
 
diff --git a/src/map/fpga/fpgaUtils.c b/src/map/fpga/fpgaUtils.c
index a6a3b313..f4eefa8c 100644
--- a/src/map/fpga/fpgaUtils.c
+++ b/src/map/fpga/fpgaUtils.c
@@ -30,6 +30,7 @@ static int   Fpga_MappingCompareOutputDelay( Fpga_Node_t ** ppNode1, Fpga_Node_t
 static void  Fpga_MappingFindLatest( Fpga_Man_t * p, int * pNodes, int nNodesMax );
 static void  Fpga_DfsLim_rec( Fpga_Node_t * pNode, int Level, Fpga_NodeVec_t * vNodes );
 static int   Fpga_CollectNodeTfo_rec( Fpga_Node_t * pNode, Fpga_Node_t * pPivot, Fpga_NodeVec_t * vVisited, Fpga_NodeVec_t * vTfo );
+static Fpga_NodeVec_t * Fpga_MappingOrderCosByLevel( Fpga_Man_t * pMan );
 static Fpga_Man_t * s_pMan = NULL;
 
 ////////////////////////////////////////////////////////////////////////
@@ -50,9 +51,11 @@ static Fpga_Man_t * s_pMan = NULL;
 ***********************************************************************/
 Fpga_NodeVec_t * Fpga_MappingDfs( Fpga_Man_t * pMan, int fCollectEquiv )
 {
-    Fpga_NodeVec_t * vNodes;
+    Fpga_NodeVec_t * vNodes, * vNodesCo;
     Fpga_Node_t * pNode;
     int i;
+    // collect the CO nodes by level
+    vNodesCo = Fpga_MappingOrderCosByLevel( pMan );
     // start the array
     vNodes = Fpga_NodeVecAlloc( 100 );
     // collect the PIs
@@ -63,12 +66,17 @@ Fpga_NodeVec_t * Fpga_MappingDfs( Fpga_Man_t * pMan, int fCollectEquiv )
         pNode->fMark0 = 1;
     }
     // perform the traversal
-    for ( i = 0; i < pMan->nOutputs; i++ )
-        Fpga_MappingDfs_rec( Fpga_Regular(pMan->pOutputs[i]), vNodes, fCollectEquiv );
+//    for ( i = 0; i < pMan->nOutputs; i++ )
+//        Fpga_MappingDfs_rec( Fpga_Regular(pMan->pOutputs[i]), vNodes, fCollectEquiv );
+    for ( i = 0; i < vNodesCo->nSize; i++ )
+        for ( pNode = vNodesCo->pArray[i]; pNode; pNode = (Fpga_Node_t *)pNode->pData0 )
+            Fpga_MappingDfs_rec( pNode, vNodes, fCollectEquiv );
+    // clean the node marks
     for ( i = 0; i < vNodes->nSize; i++ )
         vNodes->pArray[i]->fMark0 = 0;
 //    for ( i = 0; i < pMan->nOutputs; i++ )
 //        Fpga_MappingUnmark_rec( Fpga_Regular(pMan->pOutputs[i]) );
+    Fpga_NodeVecFree( vNodesCo );
     return vNodes;
 }
 
@@ -930,6 +938,47 @@ void Fpga_ManReportChoices( Fpga_Man_t * pMan )
 */
 }
 
+/**Function*************************************************************
+
+  Synopsis    [Returns the array of CO nodes sorted by level.]
+
+  Description []
+               
+  SideEffects []
+
+  SeeAlso     []
+
+***********************************************************************/
+Fpga_NodeVec_t * Fpga_MappingOrderCosByLevel( Fpga_Man_t * pMan )
+{
+    Fpga_Node_t * pNode;
+    Fpga_NodeVec_t * vNodes;
+    int i, nLevels;
+    // get the largest node
+    nLevels = Fpga_MappingMaxLevel( pMan );
+    // allocate the array of nodes
+    vNodes = Fpga_NodeVecAlloc( nLevels + 1 );
+    for ( i = 0; i <= nLevels; i++ )
+        Fpga_NodeVecPush( vNodes, NULL );
+    // clean the marks
+    for ( i = 0; i < pMan->nOutputs; i++ )
+        Fpga_Regular(pMan->pOutputs[i])->fMark0 = 0;
+    // put the nodes into the structure
+    for ( i = 0; i < pMan->nOutputs; i++ )
+    {
+        pNode = Fpga_Regular(pMan->pOutputs[i]);
+        if ( pNode->fMark0 )
+            continue;
+        pNode->fMark0 = 1;
+        pNode->pData0 = (char *)Fpga_NodeVecReadEntry( vNodes, pNode->Level );
+        Fpga_NodeVecWriteEntry( vNodes, pNode->Level, pNode );
+    }
+    for ( i = 0; i < pMan->nOutputs; i++ )
+        Fpga_Regular(pMan->pOutputs[i])->fMark0 = 0;
+    return vNodes;
+
+}
+
 ////////////////////////////////////////////////////////////////////////
 ///                       END OF FILE                                ///
 ////////////////////////////////////////////////////////////////////////