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| author | Alan Mishchenko <alanmi@berkeley.edu> | 2005-11-27 08:01:00 -0800 |
|---|---|---|
| committer | Alan Mishchenko <alanmi@berkeley.edu> | 2005-11-27 08:01:00 -0800 |
| commit | 3a1ca9fa0ebfb2ae431501067d1a1a63fe6ecba5 (patch) | |
| tree | d574e57b40998f09f5868ffd1be35b8c7baf5f27 /src/map/fpga | |
| parent | e3c40ed61ee3febefb002d3b929f157ccdffca81 (diff) | |
| download | abc-3a1ca9fa0ebfb2ae431501067d1a1a63fe6ecba5.tar.gz abc-3a1ca9fa0ebfb2ae431501067d1a1a63fe6ecba5.tar.bz2 abc-3a1ca9fa0ebfb2ae431501067d1a1a63fe6ecba5.zip | |
Version abc51127
Diffstat (limited to 'src/map/fpga')
| -rw-r--r-- | src/map/fpga/fpgaCore.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/map/fpga/fpgaCore.c b/src/map/fpga/fpgaCore.c index 2de8b73a..c573fbad 100644 --- a/src/map/fpga/fpgaCore.c +++ b/src/map/fpga/fpgaCore.c @@ -85,7 +85,7 @@ int Fpga_Mapping( Fpga_Man_t * p ) It iterates the loop, in which the required times are computed and the mapping is updated. It is conceptually similar to the paper: V. Manohararajah, S. D. Brown, Z. G. Vranesic, Heuristics for area - minimization in LUT-based FGPA technology mapping. Proc. IWLS '04.] + minimization in LUT-based FPGA technology mapping. Proc. IWLS '04.] SideEffects [] |