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author | Alan Mishchenko <alanmi@berkeley.edu> | 2006-11-28 08:01:00 -0800 |
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committer | Alan Mishchenko <alanmi@berkeley.edu> | 2006-11-28 08:01:00 -0800 |
commit | 44d220d28fa2ee56cb539e03684f021731814f17 (patch) | |
tree | 97ece1e77fa8fff2283c62fb9253424e566e7fba /src/map/fpga | |
parent | 6ad22b4d3b0446652919d95b15fefb374bddfac0 (diff) | |
download | abc-44d220d28fa2ee56cb539e03684f021731814f17.tar.gz abc-44d220d28fa2ee56cb539e03684f021731814f17.tar.bz2 abc-44d220d28fa2ee56cb539e03684f021731814f17.zip |
Version abc61128
Diffstat (limited to 'src/map/fpga')
-rw-r--r-- | src/map/fpga/fpga.c | 4 | ||||
-rw-r--r-- | src/map/fpga/fpgaCore.c | 19 | ||||
-rw-r--r-- | src/map/fpga/fpgaCut.c | 4 | ||||
-rw-r--r-- | src/map/fpga/fpgaMatch.c | 12 |
4 files changed, 32 insertions, 7 deletions
diff --git a/src/map/fpga/fpga.c b/src/map/fpga/fpga.c index d04c9910..d7a128b0 100644 --- a/src/map/fpga/fpga.c +++ b/src/map/fpga/fpga.c @@ -57,8 +57,8 @@ void Fpga_Init( Abc_Frame_t * pAbc ) { // set the default library //Fpga_LutLib_t s_LutLib = { "lutlib", 6, {0,1,2,4,8,16,32}, {0,1,2,3,4,5,6} }; -// Fpga_LutLib_t s_LutLib = { "lutlib", 5, {0,1,1,1,1,1}, {0,1,1,1,1,1} }; - Fpga_LutLib_t s_LutLib = { "lutlib", 4, {0,1,1,1,1}, {0,1,1,1,1} }; + Fpga_LutLib_t s_LutLib = { "lutlib", 5, {0,1,1,1,1,1}, {0,1,1,1,1,1} }; +// Fpga_LutLib_t s_LutLib = { "lutlib", 4, {0,1,1,1,1}, {0,1,1,1,1} }; //Fpga_LutLib_t s_LutLib = { "lutlib", 3, {0,1,1,1}, {0,1,1,1} }; Abc_FrameSetLibLut( Fpga_LutLibDup(&s_LutLib) ); diff --git a/src/map/fpga/fpgaCore.c b/src/map/fpga/fpgaCore.c index 56facf20..634a8eb1 100644 --- a/src/map/fpga/fpgaCore.c +++ b/src/map/fpga/fpgaCore.c @@ -79,8 +79,12 @@ int Fpga_Mapping( Fpga_Man_t * p ) // print the AI-graph used for mapping //Fpga_ManShow( p, "test" ); +// if ( p->fVerbose ) +// Fpga_MappingPrintOutputArrivals( p ); if ( p->fVerbose ) - Fpga_MappingPrintOutputArrivals( p ); + { + PRT( "Total time", clock() - clkTotal ); + } return 1; } @@ -101,14 +105,14 @@ int Fpga_Mapping( Fpga_Man_t * p ) ***********************************************************************/ int Fpga_MappingPostProcess( Fpga_Man_t * p ) { - int fShowSwitching = 1; + int fShowSwitching = 0; int fRecoverAreaFlow = 1; int fRecoverArea = 1; float aAreaTotalCur, aAreaTotalCur2; int Iter, clk; -if ( p->fVerbose ) - printf( "Best clock period = %5.2f\n", Fpga_TimeComputeArrivalMax(p) ); +//if ( p->fVerbose ) +// printf( "Best clock period = %5.2f\n", Fpga_TimeComputeArrivalMax(p) ); // compute area, set references, and collect nodes used in the mapping Iter = 1; @@ -118,6 +122,9 @@ if ( p->fVerbose ) printf( "Iteration %dD : Area = %8.1f ", Iter++, aAreaTotalCur ); if ( fShowSwitching ) printf( "Switch = %8.1f ", Fpga_MappingGetSwitching(p,p->vMapping) ); +else +printf( "Delay = %5.2f ", Fpga_TimeComputeArrivalMax(p) ); + PRT( "Time", p->timeMatch ); } @@ -141,6 +148,8 @@ if ( p->fVerbose ) printf( "Iteration %dF : Area = %8.1f ", Iter++, aAreaTotalCur ); if ( fShowSwitching ) printf( "Switch = %8.1f ", Fpga_MappingGetSwitching(p,p->vMapping) ); +else +printf( "Delay = %5.2f ", Fpga_TimeComputeArrivalMax(p) ); PRT( "Time", clock() - clk ); } } @@ -166,6 +175,8 @@ if ( p->fVerbose ) printf( "Iteration %d%s : Area = %8.1f ", Iter++, (p->fSwitching?"S":"A"), aAreaTotalCur ); if ( fShowSwitching ) printf( "Switch = %8.1f ", Fpga_MappingGetSwitching(p,p->vMapping) ); +else +printf( "Delay = %5.2f ", Fpga_TimeComputeArrivalMax(p) ); PRT( "Time", clock() - clk ); } } diff --git a/src/map/fpga/fpgaCut.c b/src/map/fpga/fpgaCut.c index c2aba4a3..a5505e72 100644 --- a/src/map/fpga/fpgaCut.c +++ b/src/map/fpga/fpgaCut.c @@ -130,6 +130,7 @@ void Fpga_MappingCuts( Fpga_Man_t * p ) Fpga_CutTable_t * pTable; Fpga_Node_t * pNode; int nCuts, nNodes, i; + int clk = clock(); // set the elementary cuts for the PI variables assert( p->nVarsMax > 1 && p->nVarsMax < 11 ); @@ -154,8 +155,9 @@ void Fpga_MappingCuts( Fpga_Man_t * p ) if ( p->fVerbose ) { nCuts = Fpga_CutCountAll(p); - printf( "Nodes = %6d. Total %d-feasible cuts = %d. Cuts per node = %.1f.\n", + printf( "Nodes = %6d. Total %d-cuts = %d. Cuts per node = %.1f. ", p->nNodes, p->nVarsMax, nCuts, ((float)nCuts)/p->nNodes ); + PRT( "Time", clock() - clk ); } // print the cuts for the first primary output diff --git a/src/map/fpga/fpgaMatch.c b/src/map/fpga/fpgaMatch.c index 736d38b2..d413a067 100644 --- a/src/map/fpga/fpgaMatch.c +++ b/src/map/fpga/fpgaMatch.c @@ -87,6 +87,18 @@ int Fpga_MappingMatches( Fpga_Man_t * p, int fDelayOriented ) Extra_ProgressBarUpdate( pProgress, i, "Matches ..." ); } Extra_ProgressBarStop( pProgress ); +/* + if ( !fDelayOriented ) + { + float Area = 0.0; + for ( i = 0; i < p->nOutputs; i++ ) + { + printf( "%5.2f ", Fpga_Regular(p->pOutputs[i])->pCutBest->aFlow ); + Area += Fpga_Regular(p->pOutputs[i])->pCutBest->aFlow; + } + printf( "\nTotal = %5.2f\n", Area ); + } +*/ return 1; } |