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author | Alan Mishchenko <alanmi@berkeley.edu> | 2015-01-27 09:54:35 -0800 |
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committer | Alan Mishchenko <alanmi@berkeley.edu> | 2015-01-27 09:54:35 -0800 |
commit | 0f22046bcb71ba096fedfc6a75b6bc7fd4090e70 (patch) | |
tree | b5b5642f8651b024a5176a4e26870d565ca9c514 /src/map/if/ifDelay.c | |
parent | 8ff4b79fc2f5d62c98af94e761535095d3fd8d8e (diff) | |
download | abc-0f22046bcb71ba096fedfc6a75b6bc7fd4090e70.tar.gz abc-0f22046bcb71ba096fedfc6a75b6bc7fd4090e70.tar.bz2 abc-0f22046bcb71ba096fedfc6a75b6bc7fd4090e70.zip |
New assertions and bug fix in DSD balancing.
Diffstat (limited to 'src/map/if/ifDelay.c')
-rw-r--r-- | src/map/if/ifDelay.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/map/if/ifDelay.c b/src/map/if/ifDelay.c index 5afb77eb..cb25e767 100644 --- a/src/map/if/ifDelay.c +++ b/src/map/if/ifDelay.c @@ -204,9 +204,9 @@ int If_CutSopBalanceEvalInt( Vec_Int_t * vCover, int * pTimes, int * pFaninLits, { Literal = 3 & (Entry >> (k << 1)); if ( Literal == 1 ) // neg literal - nLits++, Delay = If_LogCounterAddAig( pCounterAnd, &nCounterAnd, pFaninLitsAnd, pTimes[k], Abc_LitNot(pFaninLits[k]), vAig, nSuppAll, 0, 0 ); + nLits++, Delay = If_LogCounterAddAig( pCounterAnd, &nCounterAnd, pFaninLitsAnd, pTimes[k], vAig ? Abc_LitNot(pFaninLits[k]) : -1, vAig, nSuppAll, 0, 0 ); else if ( Literal == 2 ) // pos literal - nLits++, Delay = If_LogCounterAddAig( pCounterAnd, &nCounterAnd, pFaninLitsAnd, pTimes[k], pFaninLits[k], vAig, nSuppAll, 0, 0 ); + nLits++, Delay = If_LogCounterAddAig( pCounterAnd, &nCounterAnd, pFaninLitsAnd, pTimes[k], vAig ? pFaninLits[k] : -1, vAig, nSuppAll, 0, 0 ); else if ( Literal != 0 ) assert( 0 ); } @@ -216,7 +216,7 @@ int If_CutSopBalanceEvalInt( Vec_Int_t * vCover, int * pTimes, int * pFaninLits, iRes = If_LogCreateAndXorMulti( vAig, pFaninLitsAnd, nCounterAnd, nSuppAll, 0 ); else *pArea += nLits == 1 ? 0 : nLits - 1; - Delay = If_LogCounterAddAig( pCounterOr, &nCounterOr, pFaninLitsOr, Delay, Abc_LitNot(iRes), vAig, nSuppAll, 0, 0 ); + Delay = If_LogCounterAddAig( pCounterOr, &nCounterOr, pFaninLitsOr, Delay, vAig ? Abc_LitNot(iRes) : -1, vAig, nSuppAll, 0, 0 ); } assert( nCounterOr > 0 ); if ( vAig ) |