summaryrefslogtreecommitdiffstats
path: root/src/opt/mfs/mfsResub.c
diff options
context:
space:
mode:
authorAlan Mishchenko <alanmi@berkeley.edu>2012-01-21 04:30:10 -0800
committerAlan Mishchenko <alanmi@berkeley.edu>2012-01-21 04:30:10 -0800
commit8014f25f6db719fa62336f997963532a14c568f6 (patch)
treec691ee91a3a2d452a2bd24ac89a8c717beaa7af7 /src/opt/mfs/mfsResub.c
parentc44cc5de9429e6b4f1c05045fcf43c9cb96437b5 (diff)
downloadabc-8014f25f6db719fa62336f997963532a14c568f6.tar.gz
abc-8014f25f6db719fa62336f997963532a14c568f6.tar.bz2
abc-8014f25f6db719fa62336f997963532a14c568f6.zip
Major restructuring of the code.
Diffstat (limited to 'src/opt/mfs/mfsResub.c')
-rw-r--r--src/opt/mfs/mfsResub.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/opt/mfs/mfsResub.c b/src/opt/mfs/mfsResub.c
index 40cb6198..45f75674 100644
--- a/src/opt/mfs/mfsResub.c
+++ b/src/opt/mfs/mfsResub.c
@@ -142,8 +142,8 @@ p->timeGia += clock() - clk;
pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
if ( !sat_solver_var_value( p->pSat, iVar ) ) // remove 0s!!!
{
- assert( Aig_InfoHasBit(pData, p->nCexes) );
- Aig_InfoXorBit( pData, p->nCexes );
+ assert( Abc_InfoHasBit(pData, p->nCexes) );
+ Abc_InfoXorBit( pData, p->nCexes );
}
}
p->nCexes++;
@@ -242,13 +242,13 @@ p->timeInt += clock() - clk;
for ( i = 0; i < Vec_PtrSize(p->vDivs); i++ )
{
pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
- printf( "%d", Aig_InfoHasBit(pData, p->nCexes-1) );
+ printf( "%d", Abc_InfoHasBit(pData, p->nCexes-1) );
}
printf( "\n" );
}
// find the next divisor to try
- nWords = Aig_BitWordNum(p->nCexes);
+ nWords = Abc_BitWordNum(p->nCexes);
assert( nWords <= p->nDivWords );
for ( iVar = 0; iVar < Vec_PtrSize(p->vDivs)-Abc_ObjFaninNum(pNode); iVar++ )
{
@@ -387,13 +387,13 @@ p->timeInt += clock() - clk;
for ( i = 0; i < Vec_PtrSize(p->vDivs); i++ )
{
pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
- printf( "%d", Aig_InfoHasBit(pData, p->nCexes-1) );
+ printf( "%d", Abc_InfoHasBit(pData, p->nCexes-1) );
}
printf( "\n" );
}
// find the next divisor to try
- nWords = Aig_BitWordNum(p->nCexes);
+ nWords = Abc_BitWordNum(p->nCexes);
assert( nWords <= p->nDivWords );
fBreak = 0;
for ( iVar = 1; iVar < Vec_PtrSize(p->vDivs)-Abc_ObjFaninNum(pNode); iVar++ )