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author | Alan Mishchenko <alanmi@berkeley.edu> | 2012-07-07 18:15:08 -0700 |
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committer | Alan Mishchenko <alanmi@berkeley.edu> | 2012-07-07 18:15:08 -0700 |
commit | 4760983a461142eacceeed45ddcf5598e6a389a2 (patch) | |
tree | 87afc6370242742e1571cc42ff7824a9d8ce722f /src/opt | |
parent | 3aab7245738a69f1dd4d898493d5dabf6596ea61 (diff) | |
download | abc-4760983a461142eacceeed45ddcf5598e6a389a2.tar.gz abc-4760983a461142eacceeed45ddcf5598e6a389a2.tar.bz2 abc-4760983a461142eacceeed45ddcf5598e6a389a2.zip |
Fixing time primtouts throughout the code.
Diffstat (limited to 'src/opt')
-rw-r--r-- | src/opt/cut/abcCut.c | 7 | ||||
-rw-r--r-- | src/opt/dar/darLib.c | 4 | ||||
-rw-r--r-- | src/opt/dar/darScript.c | 3 | ||||
-rw-r--r-- | src/opt/fsim/fsimSim.c | 6 | ||||
-rw-r--r-- | src/opt/fsim/fsimTsim.c | 3 | ||||
-rw-r--r-- | src/opt/fxu/fxuReduce.c | 2 | ||||
-rw-r--r-- | src/opt/mfs/mfsCore.c | 4 | ||||
-rw-r--r-- | src/opt/mfs/mfsCore_.c | 8 | ||||
-rw-r--r-- | src/opt/mfs/mfsGia.c | 3 | ||||
-rw-r--r-- | src/opt/mfs/mfsInter.c | 2 | ||||
-rw-r--r-- | src/opt/mfs/mfsResub_.c | 6 | ||||
-rw-r--r-- | src/opt/nwk/nwkFlow_depth.c | 4 |
12 files changed, 31 insertions, 21 deletions
diff --git a/src/opt/cut/abcCut.c b/src/opt/cut/abcCut.c index 0b57b844..56918f01 100644 --- a/src/opt/cut/abcCut.c +++ b/src/opt/cut/abcCut.c @@ -77,7 +77,7 @@ Cut_Man_t * Abc_NtkCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams ) Vec_Ptr_t * vNodes; Vec_Int_t * vChoices; int i; - int clk = clock(); + clock_t clk = clock(); extern void Abc_NtkBalanceAttach( Abc_Ntk_t * pNtk ); extern void Abc_NtkBalanceDetach( Abc_Ntk_t * pNtk ); @@ -163,7 +163,8 @@ void Abc_NtkCutsOracle( Abc_Ntk_t * pNtk, Cut_Oracle_t * p ) { Abc_Obj_t * pObj; Vec_Ptr_t * vNodes; - int i, clk = clock(); + int i; + clock_t clk = clock(); int fDrop = Cut_OracleReadDrop(p); assert( Abc_NtkIsStrash(pNtk) ); @@ -225,7 +226,7 @@ Cut_Man_t * Abc_NtkSeqCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams ) Abc_Obj_t * pObj, * pNode; int i, nIters, fStatus; Vec_Int_t * vChoices; - int clk = clock(); + clock_t clk = clock(); assert( Abc_NtkIsSeq(pNtk) ); assert( pParams->fSeq ); diff --git a/src/opt/dar/darLib.c b/src/opt/dar/darLib.c index 67a5f59e..acf49b02 100644 --- a/src/opt/dar/darLib.c +++ b/src/opt/dar/darLib.c @@ -592,7 +592,7 @@ Dar_Lib_t * Dar_LibRead() ***********************************************************************/ void Dar_LibStart() { -// int clk = clock(); +// clock_t clk = clock(); assert( s_DarLib == NULL ); s_DarLib = Dar_LibRead(); // printf( "The 4-input library started with %d nodes and %d subgraphs. ", s_DarLib->nObjs - 4, s_DarLib->nSubgrTotal ); @@ -1189,7 +1189,7 @@ int Dar2_LibEval( Gia_Man_t * p, Vec_Int_t * vCutLits, unsigned uTruth, int fKee // int fTraining = 0; Dar_LibObj_t * pObj; int Out, k, Class, nNodesSaved, nNodesAdded, nNodesGained; - clock_t clk = clock(); +// clock_t clk = clock(); assert( Vec_IntSize(vCutLits) == 4 ); assert( (uTruth >> 16) == 0 ); // check if the cut exits and assigns leaves and their levels diff --git a/src/opt/dar/darScript.c b/src/opt/dar/darScript.c index be67b212..b59626af 100644 --- a/src/opt/dar/darScript.c +++ b/src/opt/dar/darScript.c @@ -721,7 +721,8 @@ Aig_Man_t * Dar_ManChoiceNew( Aig_Man_t * pAig, Dch_Pars_t * pPars ) int fConstruct = 0; Aig_Man_t * pMan, * pTemp; Vec_Ptr_t * vAigs; - int i, clk; + int i; + clock_t clk; clk = clock(); // vAigs = Dar_ManChoiceSynthesisExt(); diff --git a/src/opt/fsim/fsimSim.c b/src/opt/fsim/fsimSim.c index 84844407..5a3fffb0 100644 --- a/src/opt/fsim/fsimSim.c +++ b/src/opt/fsim/fsimSim.c @@ -384,7 +384,8 @@ static inline void Fsim_ManSimulateRound( Fsim_Man_t * p ) void Fsim_ManSimulateRoundTest( Fsim_Man_t * p ) { Fsim_Obj_t * pObj; - int i, clk = clock(); + int i; + clock_t clk = clock(); Fsim_ManForEachObj( p, pObj, i ) { } @@ -471,7 +472,8 @@ int Fsim_ManSimulate( Aig_Man_t * pAig, Fsim_ParSim_t * pPars ) { Fsim_Man_t * p; Sec_MtrStatus_t Status; - int i, iOut, iPat, clk, clkTotal = clock(), clk2, clk2Total = 0; + int i, iOut, iPat; + clock_t clk, clkTotal = clock(), clk2, clk2Total = 0; assert( Aig_ManRegNum(pAig) > 0 ); if ( pPars->fCheckMiter ) { diff --git a/src/opt/fsim/fsimTsim.c b/src/opt/fsim/fsimTsim.c index 5ad78b33..78db166f 100644 --- a/src/opt/fsim/fsimTsim.c +++ b/src/opt/fsim/fsimTsim.c @@ -341,7 +341,8 @@ Vec_Ptr_t * Fsim_ManTerSimulate( Aig_Man_t * pAig, int fVerbose ) Fsim_Man_t * p; Vec_Ptr_t * vStates; unsigned ** pBins, * pState; - int i, nWords, nBins, clk, clkTotal = clock(); + int i, nWords, nBins; + clock_t clk, clkTotal = clock(); assert( Aig_ManRegNum(pAig) > 0 ); // create manager clk = clock(); diff --git a/src/opt/fxu/fxuReduce.c b/src/opt/fxu/fxuReduce.c index 6d76576a..f9d88f7a 100644 --- a/src/opt/fxu/fxuReduce.c +++ b/src/opt/fxu/fxuReduce.c @@ -60,7 +60,7 @@ int Fxu_PreprocessCubePairs( Fxu_Matrix * p, Vec_Ptr_t * vCovers, int nPairsTota int nCubes, nBitsMax, nSum; int CutOffNum = -1, CutOffQuant = -1; // Suppress "might be used uninitialized" int iPair, iQuant, k, c; -// int clk = clock(); +// clock_t clk = clock(); char * pSopCover; int nFanins; diff --git a/src/opt/mfs/mfsCore.c b/src/opt/mfs/mfsCore.c index 8ca9edcf..8482d7a3 100644 --- a/src/opt/mfs/mfsCore.c +++ b/src/opt/mfs/mfsCore.c @@ -86,7 +86,7 @@ int Abc_NtkMfsEdgePower( Mfs_Man_t * p, Abc_Obj_t * pNode ) int Abc_WinNode(Mfs_Man_t * p, Abc_Obj_t *pNode) { -// int clk; +// clock_t clk; // Abc_Obj_t * pFanin; // int i; @@ -119,7 +119,7 @@ int Abc_WinNode(Mfs_Man_t * p, Abc_Obj_t *pNode) /* int Abc_NtkMfsPowerResubNode( Mfs_Man_t * p, Abc_Obj_t * pNode ) { - int clk; + clock_t clk; Abc_Obj_t * pFanin; int i; diff --git a/src/opt/mfs/mfsCore_.c b/src/opt/mfs/mfsCore_.c index 69f64ae5..659a82fc 100644 --- a/src/opt/mfs/mfsCore_.c +++ b/src/opt/mfs/mfsCore_.c @@ -74,7 +74,7 @@ void Abc_NtkMfsParsDefault( Mfs_Par_t * pPars ) ***********************************************************************/ int Abc_NtkMfsResub( Mfs_Man_t * p, Abc_Obj_t * pNode ) { - int clk; + clock_t clk; p->nNodesTried++; // prepare data structure for this node Mfs_ManClean( p ); @@ -140,7 +140,8 @@ int Abc_NtkMfsNode( Mfs_Man_t * p, Abc_Obj_t * pNode ) float dProb; extern Hop_Obj_t * Abc_NodeIfNodeResyn( Bdc_Man_t * p, Hop_Man_t * pHop, Hop_Obj_t * pRoot, int nVars, Vec_Int_t * vTruth, unsigned * puCare, float dProb ); - int nGain, clk; + int nGain; + clock_t clk; p->nNodesTried++; // prepare data structure for this node Mfs_ManClean( p ); @@ -213,7 +214,8 @@ int Abc_NtkMfs( Abc_Ntk_t * pNtk, Mfs_Par_t * pPars ) Abc_Obj_t * pObj; Vec_Vec_t * vLevels; Vec_Ptr_t * vNodes; - int i, k, nNodes, nFaninMax, clk = clock(), clk2; + int i, k, nNodes, nFaninMax; + clock_t clk = clock(), clk2; int nTotalNodesBeg = Abc_NtkNodeNum(pNtk); int nTotalEdgesBeg = Abc_NtkGetTotalFanins(pNtk); diff --git a/src/opt/mfs/mfsGia.c b/src/opt/mfs/mfsGia.c index 07c258ab..88c0a45e 100644 --- a/src/opt/mfs/mfsGia.c +++ b/src/opt/mfs/mfsGia.c @@ -205,7 +205,8 @@ int Abc_NtkMfsTryResubOnceGia( Mfs_Man_t * p, int * pCands, int nCands ) int fVeryVerbose = 0; int fUseGia = 1; unsigned * pData; - int i, iVar, status, iOut, clk = clock(); + int i, iVar, status, iOut; + clock_t clk = clock(); p->nSatCalls++; // return -1; assert( p->pGia != NULL ); diff --git a/src/opt/mfs/mfsInter.c b/src/opt/mfs/mfsInter.c index b3de7b96..08713c75 100644 --- a/src/opt/mfs/mfsInter.c +++ b/src/opt/mfs/mfsInter.c @@ -337,7 +337,7 @@ Hop_Obj_t * Abc_NtkMfsInterplate( Mfs_Man_t * p, int * pCands, int nCands ) Hop_Obj_t * pFunc; int nFanins, status; int c, i, * pGloVars; -// int clk = clock(); +// clock_t clk = clock(); // p->nDcMints += Abc_NtkMfsInterplateEval( p, pCands, nCands ); diff --git a/src/opt/mfs/mfsResub_.c b/src/opt/mfs/mfsResub_.c index bca1285d..b79ccd9e 100644 --- a/src/opt/mfs/mfsResub_.c +++ b/src/opt/mfs/mfsResub_.c @@ -143,7 +143,8 @@ int Abc_NtkMfsSolveSatResub( Mfs_Man_t * p, Abc_Obj_t * pNode, int iFanin, int f int fVeryVerbose = p->pPars->fVeryVerbose && Vec_PtrSize(p->vDivs) < 80; unsigned * pData; int pCands[MFS_FANIN_MAX]; - int RetValue, iVar, i, nCands, nWords, w, clk; + int RetValue, iVar, i, nCands, nWords, w; + clock_t clk; Abc_Obj_t * pFanin; Hop_Obj_t * pFunc; assert( iFanin >= 0 ); @@ -292,7 +293,8 @@ int Abc_NtkMfsSolveSatResub2( Mfs_Man_t * p, Abc_Obj_t * pNode, int iFanin, int int fVeryVerbose = p->pPars->fVeryVerbose && Vec_PtrSize(p->vDivs) < 80; unsigned * pData, * pData2; int pCands[MFS_FANIN_MAX]; - int RetValue, iVar, iVar2, i, w, nCands, clk, nWords, fBreak; + int RetValue, iVar, iVar2, i, w, nCands, nWords, fBreak; + clock_t clk; Abc_Obj_t * pFanin; Hop_Obj_t * pFunc; assert( iFanin >= 0 ); diff --git a/src/opt/nwk/nwkFlow_depth.c b/src/opt/nwk/nwkFlow_depth.c index 6c2e7eb9..e4f4406f 100644 --- a/src/opt/nwk/nwkFlow_depth.c +++ b/src/opt/nwk/nwkFlow_depth.c @@ -465,7 +465,7 @@ Vec_Ptr_t * Nwk_ManRetimeCutForward( Nwk_Man_t * pMan, int nLatches, int fVerbos Vec_Ptr_t * vNodes; Nwk_Obj_t * pObj; int i, RetValue, Counter = 0, Counter2 = 0; - int clk = clock(); + clock_t clk = clock(); // set the sequential parameters pMan->nLatches = nLatches; pMan->nTruePis = Nwk_ManCiNum(pMan) - nLatches; @@ -550,7 +550,7 @@ Vec_Ptr_t * Nwk_ManRetimeCutBackward( Nwk_Man_t * pMan, int nLatches, int fVerbo Vec_Ptr_t * vNodes; Nwk_Obj_t * pObj; int i, RetValue, Counter = 0, Counter2 = 0; - int clk = clock(); + clock_t clk = clock(); // set the sequential parameters pMan->nLatches = nLatches; pMan->nTruePis = Nwk_ManCiNum(pMan) - nLatches; |